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/flight/pios/stm32f0x/libraries/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_syscfg.h

https://gitlab.com/sonium/librepilot
C Header | 262 lines | 120 code | 37 blank | 105 comment | 95 complexity | 45627763bc5767b63bc80d13120f974b MD5 | raw file
    

  1. /**
    2. 

  2.   ******************************************************************************
    3. 

  3.   * @file    stm32f0xx_syscfg.h
    4. 

  4.   * @author  MCD Application Team
    5. 

  5.   * @version V1.3.0
    6. 

  6.   * @date    16-January-2014
    7. 

  7.   * @brief   This file contains all the functions prototypes for the SYSCFG firmware 
    8. 

  8.   *          library.
    9. 

  9.   ******************************************************************************
    10. 

  10.   * @attention
    11. 

  11.   *
    12. 

  12.   * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
    13. 

  13.   *
    14. 

  14.   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
    15. 

  15.   * You may not use this file except in compliance with the License.
    16. 

  16.   * You may obtain a copy of the License at:
    17. 

  17.   *
    18. 

  18.   *        http://www.st.com/software_license_agreement_liberty_v2
    19. 

  19.   *
    20. 

  20.   * Unless required by applicable law or agreed to in writing, software 
    21. 

  21.   * distributed under the License is distributed on an "AS IS" BASIS, 
    22. 

  22.   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
    23. 

  23.   * See the License for the specific language governing permissions and
    24. 

  24.   * limitations under the License.
    25. 

  25.   *
    26. 

  26.   ******************************************************************************
    27. 

  27.   */
    28. 

  28. 

  29. /*!< Define to prevent recursive inclusion -------------------------------------*/
    30. 

  30. #ifndef __STM32F0XX_SYSCFG_H
    31. 

  31. #define __STM32F0XX_SYSCFG_H
    32. 

  32. 

  33. #ifdef __cplusplus
    34. 

  34.  extern "C" {
    35. 

  35. #endif
    36. 

  36. 

  37. /*!< Includes ------------------------------------------------------------------*/
    38. 

  38. #include "stm32f0xx.h"
    39. 

  39. 

  40. /** @addtogroup STM32F0xx_StdPeriph_Driver
    41. 

  41.   * @{
    42. 

  42.   */
    43. 

  43. 

  44. /** @addtogroup SYSCFG
    45. 

  45.   * @{
    46. 

  46.   */
    47. 

  47. /* Exported types ------------------------------------------------------------*/
    48. 

  48. /* Exported constants --------------------------------------------------------*/
    49. 

  49. 

  50. /** @defgroup SYSCFG_Exported_Constants
    51. 

  51.   * @{
    52. 

  52.   */ 
    53. 

  53.   
    54. 

  54. /** @defgroup SYSCFG_EXTI_Port_Sources 
    55. 

  55.   * @{
    56. 

  56.   */ 
    57. 

  57. #define EXTI_PortSourceGPIOA       ((uint8_t)0x00)
    58. 

  58. #define EXTI_PortSourceGPIOB       ((uint8_t)0x01)
    59. 

  59. #define EXTI_PortSourceGPIOC       ((uint8_t)0x02)
    60. 

  60. #define EXTI_PortSourceGPIOD       ((uint8_t)0x03) /*!< not available for STM32F031 devices */
    61. 

  61. #define EXTI_PortSourceGPIOE       ((uint8_t)0x04) /*!< only available for STM32F072 devices */
    62. 

  62. #define EXTI_PortSourceGPIOF       ((uint8_t)0x05)
    63. 

  63. 

  64. #define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \
    65. 

  65.                                          ((PORTSOURCE) == EXTI_PortSourceGPIOB) || \
    66. 

  66.                                          ((PORTSOURCE) == EXTI_PortSourceGPIOC) || \
    67. 

  67.                                          ((PORTSOURCE) == EXTI_PortSourceGPIOD) || \
    68. 

  68.                                          ((PORTSOURCE) == EXTI_PortSourceGPIOE) || \
    69. 

  69.                                          ((PORTSOURCE) == EXTI_PortSourceGPIOF)) 
    70. 

  70. /**
    71. 

  71.   * @}
    72. 

  72.   */
    73. 

  73. 

  74. /** @defgroup SYSCFG_EXTI_Pin_sources 
    75. 

  75.   * @{
    76. 

  76.   */ 
    77. 

  77. #define EXTI_PinSource0            ((uint8_t)0x00)
    78. 

  78. #define EXTI_PinSource1            ((uint8_t)0x01)
    79. 

  79. #define EXTI_PinSource2            ((uint8_t)0x02)
    80. 

  80. #define EXTI_PinSource3            ((uint8_t)0x03)
    81. 

  81. #define EXTI_PinSource4            ((uint8_t)0x04)
    82. 

  82. #define EXTI_PinSource5            ((uint8_t)0x05)
    83. 

  83. #define EXTI_PinSource6            ((uint8_t)0x06)
    84. 

  84. #define EXTI_PinSource7            ((uint8_t)0x07)
    85. 

  85. #define EXTI_PinSource8            ((uint8_t)0x08)
    86. 

  86. #define EXTI_PinSource9            ((uint8_t)0x09)
    87. 

  87. #define EXTI_PinSource10           ((uint8_t)0x0A)
    88. 

  88. #define EXTI_PinSource11           ((uint8_t)0x0B)
    89. 

  89. #define EXTI_PinSource12           ((uint8_t)0x0C)
    90. 

  90. #define EXTI_PinSource13           ((uint8_t)0x0D)
    91. 

  91. #define EXTI_PinSource14           ((uint8_t)0x0E)
    92. 

  92. #define EXTI_PinSource15           ((uint8_t)0x0F)
    93. 

  93. 

  94. #define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \
    95. 

  95.                                        ((PINSOURCE) == EXTI_PinSource1) || \
    96. 

  96.                                        ((PINSOURCE) == EXTI_PinSource2) || \
    97. 

  97.                                        ((PINSOURCE) == EXTI_PinSource3) || \
    98. 

  98.                                        ((PINSOURCE) == EXTI_PinSource4) || \
    99. 

  99.                                        ((PINSOURCE) == EXTI_PinSource5) || \
    100. 

  100.                                        ((PINSOURCE) == EXTI_PinSource6) || \
    101. 

  101.                                        ((PINSOURCE) == EXTI_PinSource7) || \
    102. 

  102.                                        ((PINSOURCE) == EXTI_PinSource8) || \
    103. 

  103.                                        ((PINSOURCE) == EXTI_PinSource9) || \
    104. 

  104.                                        ((PINSOURCE) == EXTI_PinSource10) || \
    105. 

  105.                                        ((PINSOURCE) == EXTI_PinSource11) || \
    106. 

  106.                                        ((PINSOURCE) == EXTI_PinSource12) || \
    107. 

  107.                                        ((PINSOURCE) == EXTI_PinSource13) || \
    108. 

  108.                                        ((PINSOURCE) == EXTI_PinSource14) || \
    109. 

  109.                                        ((PINSOURCE) == EXTI_PinSource15))
    110. 

  110. /**
    111. 

  111.   * @}
    112. 

  112.   */
    113. 

  113. 

  114. /** @defgroup SYSCFG_Memory_Remap_Config 
    115. 

  115.   * @{
    116. 

  116.   */ 
    117. 

  117. #define SYSCFG_MemoryRemap_Flash                ((uint8_t)0x00)
    118. 

  118. #define SYSCFG_MemoryRemap_SystemMemory         ((uint8_t)0x01)
    119. 

  119. #define SYSCFG_MemoryRemap_SRAM                 ((uint8_t)0x03)
    120. 

  120. 

  121. 

  122. #define IS_SYSCFG_MEMORY_REMAP(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
    123. 

  123.                                        ((REMAP) == SYSCFG_MemoryRemap_SystemMemory) || \
    124. 

  124.                                        ((REMAP) == SYSCFG_MemoryRemap_SRAM))
    125. 

  125. 

  126. /**
    127. 

  127.   * @}
    128. 

  128.   */
    129. 

  129. 

  130. /** @defgroup SYSCFG_DMA_Remap_Config 
    131. 

  131.   * @{
    132. 

  132.   */ 
    133. 

  133. #define SYSCFG_DMARemap_TIM3        SYSCFG_CFGR1_TIM3_DMA_RMP      /* Remap TIM3 DMA requests from channel4 to channel6, 
    134. 

  134.                                                                       available only for STM32F072 devices */
    135. 

  135. #define SYSCFG_DMARemap_TIM2        SYSCFG_CFGR1_TIM2_DMA_RMP      /* Remap TIM2 DMA requests from channel3/4 to channel7, 
    136. 

  136.                                                                       available only for STM32F072 devices */ 
    137. 

  137. #define SYSCFG_DMARemap_TIM1        SYSCFG_CFGR1_TIM1_DMA_RMP      /* Remap TIM1 DMA requests from channel2/3/4 to channel6, 
    138. 

  138.                                                                       available only for STM32F072 devices */
    139. 

  139. #define SYSCFG_DMARemap_I2C1        SYSCFG_CFGR1_I2C1_DMA_RMP      /* Remap I2C1 DMA requests from channel3/2 to channel7/6, 
    140. 

  140.                                                                       available only for STM32F072 devices */
    141. 

  141. #define SYSCFG_DMARemap_USART3      SYSCFG_CFGR1_USART3_DMA_RMP    /* Remap USART3 DMA requests from channel6/7 to channel3/2, 
    142. 

  142.                                                                       available only for STM32F072 devices */
    143. 

  143. #define SYSCFG_DMARemap_USART2      SYSCFG_CFGR1_USART2_DMA_RMP    /* Remap USART2 DMA requests from channel4/5 to channel6/7, 
    144. 

  144.                                                                       available only for STM32F072 devices */
    145. 

  145. #define SYSCFG_DMARemap_SPI2        SYSCFG_CFGR1_SPI2_DMA_RMP      /* Remap SPI2 DMA requests from channel4/5 to channel6/7, 
    146. 

  146.                                                                       available only for STM32F072 devices */
    147. 

  147. #define SYSCFG_DMARemap_TIM17_2     SYSCFG_CFGR1_TIM17_DMA_RMP2    /* Remap TIM17 DMA requests from channel1/2 to channel7, 
    148. 

  148.                                                                       available only for STM32F072 devices */
    149. 

  149. #define SYSCFG_DMARemap_TIM16_2     SYSCFG_CFGR1_TIM16_DMA_RMP2    /* Remap TIM16 DMA requests from channel3/4 to channel6, 
    150. 

  150.                                                                       available only for STM32F072 devices */
    151. 

  151. #define SYSCFG_DMARemap_TIM17       SYSCFG_CFGR1_TIM17_DMA_RMP    /* Remap TIM17 DMA requests from channel1 to channel2 */
    152. 

  152. #define SYSCFG_DMARemap_TIM16       SYSCFG_CFGR1_TIM16_DMA_RMP    /* Remap TIM16 DMA requests from channel3 to channel4 */
    153. 

  153. #define SYSCFG_DMARemap_USART1Rx    SYSCFG_CFGR1_USART1RX_DMA_RMP /* Remap USART1 Rx DMA requests from channel3 to channel5 */
    154. 

  154. #define SYSCFG_DMARemap_USART1Tx    SYSCFG_CFGR1_USART1TX_DMA_RMP /* Remap USART1 Tx DMA requests from channel2 to channel4 */
    155. 

  155. #define SYSCFG_DMARemap_ADC1        SYSCFG_CFGR1_ADC_DMA_RMP      /* Remap ADC1 DMA requests from channel1 to channel2 */
    156. 

  156.   
    157. 

  157. #define IS_SYSCFG_DMA_REMAP(REMAP) (((REMAP) == SYSCFG_DMARemap_TIM17) || \
    158. 

  158.                                     ((REMAP) == SYSCFG_DMARemap_TIM16) || \
    159. 

  159.                                     ((REMAP) == SYSCFG_DMARemap_USART1Rx) || \
    160. 

  160.                                     ((REMAP) == SYSCFG_DMARemap_USART1Tx) || \
    161. 

  161.                                     ((REMAP) == SYSCFG_CFGR1_TIM3_DMA_RMP) || \
    162. 

  162.                                     ((REMAP) == SYSCFG_CFGR1_TIM2_DMA_RMP) || \
    163. 

  163.                                     ((REMAP) == SYSCFG_CFGR1_TIM1_DMA_RMP) || \
    164. 

  164.                                     ((REMAP) == SYSCFG_CFGR1_I2C1_DMA_RMP) || \
    165. 

  165.                                     ((REMAP) == SYSCFG_CFGR1_USART3_DMA_RMP) || \
    166. 

  166.                                     ((REMAP) == SYSCFG_CFGR1_USART2_DMA_RMP) || \
    167. 

  167.                                     ((REMAP) == SYSCFG_CFGR1_SPI2_DMA_RMP) || \
    168. 

  168.                                     ((REMAP) == SYSCFG_CFGR1_TIM17_DMA_RMP2) || \
    169. 

  169.                                     ((REMAP) == SYSCFG_CFGR1_TIM16_DMA_RMP2) || \
    170. 

  170.                                     ((REMAP) == SYSCFG_DMARemap_ADC1))
    171. 

  171. 

  172. /**
    173. 

  173.   * @}
    174. 

  174.   */
    175. 

  175. 

  176. /** @defgroup SYSCFG_I2C_FastModePlus_Config 
    177. 

  177.   * @{
    178. 

  178.   */ 
    179. 

  179. #define SYSCFG_I2CFastModePlus_PB6       SYSCFG_CFGR1_I2C_FMP_PB6 /* Enable Fast Mode Plus on PB6 */
    180. 

  180. #define SYSCFG_I2CFastModePlus_PB7       SYSCFG_CFGR1_I2C_FMP_PB7 /* Enable Fast Mode Plus on PB7 */
    181. 

  181. #define SYSCFG_I2CFastModePlus_PB8       SYSCFG_CFGR1_I2C_FMP_PB8 /* Enable Fast Mode Plus on PB8 */
    182. 

  182. #define SYSCFG_I2CFastModePlus_PB9       SYSCFG_CFGR1_I2C_FMP_PB9 /* Enable Fast Mode Plus on PB9 */
    183. 

  183. #define SYSCFG_I2CFastModePlus_I2C1      SYSCFG_CFGR1_I2C_FMP_I2C1 /* Enable Fast Mode Plus on PB10, PB11, PF6 and PF7(only for STM32F0031 and STM32F030 devices) */
    184. 

  184. #define SYSCFG_I2CFastModePlus_I2C2      SYSCFG_CFGR1_I2C_FMP_I2C2 /* Enable Fast Mode Plus on I2C2 pins, available only for STM32F072 devices */
    185. 

  185. #define SYSCFG_I2CFastModePlus_PA9       SYSCFG_CFGR1_I2C_FMP_PA9 /* Enable Fast Mode Plus on PA9 (only for STM32F031 and STM32F030 devices) */
    186. 

  186. #define SYSCFG_I2CFastModePlus_PA10      SYSCFG_CFGR1_I2C_FMP_PA10/* Enable Fast Mode Plus on PA10(only for STM32F031 and STM32F030 devices) */
    187. 

  187. 

  188. #define IS_SYSCFG_I2C_FMP(PIN) (((PIN) == SYSCFG_I2CFastModePlus_PB6)  || \
    189. 

  189.                                 ((PIN) == SYSCFG_I2CFastModePlus_PB7)  || \
    190. 

  190.                                 ((PIN) == SYSCFG_I2CFastModePlus_PB8)  || \
    191. 

  191.                                 ((PIN) == SYSCFG_I2CFastModePlus_PB9)  || \
    192. 

  192.                                 ((PIN) == SYSCFG_I2CFastModePlus_I2C1) || \
    193. 

  193.                                 ((PIN) == SYSCFG_I2CFastModePlus_I2C2) || \
    194. 

  194.                                 ((PIN) == SYSCFG_I2CFastModePlus_PA9)  || \
    195. 

  195.                                 ((PIN) == SYSCFG_I2CFastModePlus_PA10))
    196. 

  196. 

  197. 

  198. /**
    199. 

  199.   * @}
    200. 

  200.   */
    201. 

  201. 

  202. /** @defgroup SYSCFG_Lock_Config 
    203. 

  203.   * @{
    204. 

  204.   */ 
    205. 

  205. #define SYSCFG_Break_PVD                     SYSCFG_CFGR2_PVD_LOCK       /*!< Connects the PVD event to the Break Input of TIM1, not available for STM32F030 devices */
    206. 

  206. #define SYSCFG_Break_SRAMParity              SYSCFG_CFGR2_SRAM_PARITY_LOCK  /*!< Connects the SRAM_PARITY error signal to the Break Input of TIM1 */
    207. 

  207. #define SYSCFG_Break_Lockup                  SYSCFG_CFGR2_LOCKUP_LOCK       /*!< Connects Lockup output of CortexM0 to the break input of TIM1 */
    208. 

  208. 

  209. #define IS_SYSCFG_LOCK_CONFIG(CONFIG) (((CONFIG) == SYSCFG_Break_PVD)        || \
    210. 

  210.                                        ((CONFIG) == SYSCFG_Break_SRAMParity) || \
    211. 

  211.                                        ((CONFIG) == SYSCFG_Break_Lockup))
    212. 

  212. 

  213. /**
    214. 

  214.   * @}
    215. 

  215.   */
    216. 

  216. 

  217. /** @defgroup SYSCFG_flags_definition 
    218. 

  218.   * @{
    219. 

  219.   */
    220. 

  220. 

  221. #define SYSCFG_FLAG_PE               SYSCFG_CFGR2_SRAM_PE
    222. 

  222. 

  223. #define IS_SYSCFG_FLAG(FLAG) (((FLAG) == SYSCFG_FLAG_PE))
    224. 

  224. 

  225. /**
    226. 

  226.   * @}
    227. 

  227.   */
    228. 

  228. 

  229. /**
    230. 

  230.   * @}
    231. 

  231.   */
    232. 

  232. 

  233. /* Exported macro ------------------------------------------------------------*/
    234. 

  234. /* Exported functions ------------------------------------------------------- */
    235. 

  235. 

  236. /*  Function used to set the SYSCFG configuration to the default reset state **/
    237. 

  237. void SYSCFG_DeInit(void);
    238. 

  238. 

  239. /* SYSCFG configuration functions *********************************************/ 
    240. 

  240. void SYSCFG_MemoryRemapConfig(uint32_t SYSCFG_MemoryRemap);
    241. 

  241. void SYSCFG_DMAChannelRemapConfig(uint32_t SYSCFG_DMARemap, FunctionalState NewState);
    242. 

  242. void SYSCFG_I2CFastModePlusConfig(uint32_t SYSCFG_I2CFastModePlus, FunctionalState NewState);
    243. 

  243. void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex);
    244. 

  244. void SYSCFG_BreakConfig(uint32_t SYSCFG_Break);
    245. 

  245. FlagStatus SYSCFG_GetFlagStatus(uint32_t SYSCFG_Flag);
    246. 

  246. void SYSCFG_ClearFlag(uint32_t SYSCFG_Flag);
    247. 

  247. 

  248. #ifdef __cplusplus
    249. 

  249. }
    250. 

  250. #endif
    251. 

  251. 

  252. #endif /*__STM32F0XX_SYSCFG_H */
    253. 

  253. 

  254. /**
    255. 

  255.   * @}
    256. 

  256.   */ 
    257. 

  257. 

  258. /**
    259. 

  259.   * @}
    260. 

  260.   */ 
    261. 

  261. 

  262. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
    263. 

  263.