/ProiectLicenta/src/main.c

https://gitlab.com/marius33/ProiectLicenta-PANCC1101 · C · 133 lines · 94 code · 30 blank · 9 comment · 11 complexity · de1c954adb7837b3b978579ac34f4c95 MD5 · raw file

  1. #include <asf.h>
  2. #include <stdbool.h>
  3. #include <core_cm4.h>
  4. void disableSWO(void)
  5. {
  6. CoreDebug_Type *core = CoreDebug_BASE;
  7. core->DEMCR = (0<<CoreDebug_DEMCR_TRCENA_Pos);
  8. }
  9. /* USB related */
  10. struct {
  11. uint8_t expected_length;
  12. uint8_t data[64];
  13. uint8_t length;
  14. } usb_buff;
  15. bool authorize_cdc_transfer = false;
  16. void usb_init(void){
  17. usb_buff.length = 0;
  18. usb_buff.expected_length = 0;
  19. udc_start();
  20. }
  21. bool cdc_enable(void){
  22. authorize_cdc_transfer = true;
  23. return true;
  24. }
  25. void cdc_disable(void){
  26. authorize_cdc_transfer = false;
  27. }
  28. void usb_rx_notify(void){
  29. if(authorize_cdc_transfer){
  30. while(udi_cdc_is_rx_ready()){
  31. if(usb_buff.expected_length == 0)
  32. usb_buff.expected_length = udi_cdc_getc();
  33. else
  34. usb_buff.data[usb_buff.length++] = udi_cdc_getc();
  35. }
  36. }
  37. }
  38. /* writes data in the usb tx buffer while it can
  39. returns the numbes of bytes that have not been written yet
  40. 0 - on success
  41. >0 - on not done
  42. */
  43. uint8_t usb_write(uint8_t* data, uint8_t len){
  44. while(udi_cdc_is_tx_ready() && (len--))
  45. udi_cdc_putc(*(data++));
  46. return len;
  47. }
  48. /* Blocking function that waits untill a character can be put in the tx usb buffer */
  49. static inline void udi_cdc_wait_tx_ready(void){
  50. while(!udi_cdc_is_tx_ready());
  51. }
  52. void usb_transmit(uint8_t* data, uint8_t len){
  53. udi_cdc_wait_tx_ready();
  54. udi_cdc_putc(len);
  55. while(len--){
  56. udi_cdc_wait_tx_ready();
  57. udi_cdc_putc(*(data++));
  58. }
  59. }
  60. void process_usb(void){
  61. if(usb_buff.length==usb_buff.expected_length){
  62. /* Do stuff here */
  63. usb_buff.length = 0;
  64. usb_buff.expected_length = 0;
  65. }
  66. }
  67. //GDO0 asserts when a packet has been received with CRC OK. De-asserts when the first byte is read from the RX FIFO.
  68. static void eic_callback_gdo0(void)
  69. {
  70. if (eic_line_interrupt_is_pending(EIC, EXT_INT4)) {
  71. eic_line_clear_interrupt(EIC, EXT_INT4);
  72. ddls_read_packet();
  73. }
  74. }
  75. static void eic_setup(void)
  76. {
  77. eic_enable(EIC);
  78. struct eic_line_config eic_line_conf;
  79. eic_line_conf.eic_mode = EIC_MODE_EDGE_TRIGGERED;
  80. eic_line_conf.eic_edge = EIC_EDGE_RISING_EDGE;
  81. eic_line_conf.eic_level = EIC_LEVEL_HIGH_LEVEL;
  82. eic_line_conf.eic_filter = EIC_FILTER_ENABLED;
  83. eic_line_conf.eic_async = EIC_ASYNCH_MODE;
  84. eic_line_set_config(EIC, EXT_INT4, &eic_line_conf);
  85. eic_line_set_callback(EIC, EXT_INT4, eic_callback_gdo0, EIC_4_IRQn, 1);
  86. eic_line_enable(EIC, EXT_INT4);
  87. }
  88. int main (void){
  89. disableSWO();
  90. sysclk_init();
  91. irq_initialize_vectors();
  92. cpu_irq_enable();
  93. board_init();
  94. usb_init();
  95. eic_setup();
  96. ddls_init();
  97. ioport_set_pin_level(PIN_PA11, false);
  98. ioport_set_pin_level(PIN_PA12, true);
  99. while(true){
  100. process_usb();
  101. process_ddls();
  102. }
  103. }