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/release/src-rt/linux/linux-2.6/drivers/kvm/paging_tmpl.h

https://gitlab.com/envieidoc/advancedtomato2
C Header | 484 lines | 350 code | 58 blank | 76 comment | 75 complexity | efda0adf32ae98457ca8b767f55b40a4 MD5 | raw file
  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. /*
  20. * We need the mmu code to access both 32-bit and 64-bit guest ptes,
  21. * so the code in this file is compiled twice, once per pte size.
  22. */
  23. #if PTTYPE == 64
  24. #define pt_element_t u64
  25. #define guest_walker guest_walker64
  26. #define FNAME(name) paging##64_##name
  27. #define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK
  28. #define PT_DIR_BASE_ADDR_MASK PT64_DIR_BASE_ADDR_MASK
  29. #define PT_INDEX(addr, level) PT64_INDEX(addr, level)
  30. #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  31. #define PT_LEVEL_MASK(level) PT64_LEVEL_MASK(level)
  32. #define PT_PTE_COPY_MASK PT64_PTE_COPY_MASK
  33. #ifdef CONFIG_X86_64
  34. #define PT_MAX_FULL_LEVELS 4
  35. #else
  36. #define PT_MAX_FULL_LEVELS 2
  37. #endif
  38. #elif PTTYPE == 32
  39. #define pt_element_t u32
  40. #define guest_walker guest_walker32
  41. #define FNAME(name) paging##32_##name
  42. #define PT_BASE_ADDR_MASK PT32_BASE_ADDR_MASK
  43. #define PT_DIR_BASE_ADDR_MASK PT32_DIR_BASE_ADDR_MASK
  44. #define PT_INDEX(addr, level) PT32_INDEX(addr, level)
  45. #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  46. #define PT_LEVEL_MASK(level) PT32_LEVEL_MASK(level)
  47. #define PT_PTE_COPY_MASK PT32_PTE_COPY_MASK
  48. #define PT_MAX_FULL_LEVELS 2
  49. #else
  50. #error Invalid PTTYPE value
  51. #endif
  52. /*
  53. * The guest_walker structure emulates the behavior of the hardware page
  54. * table walker.
  55. */
  56. struct guest_walker {
  57. int level;
  58. gfn_t table_gfn[PT_MAX_FULL_LEVELS];
  59. pt_element_t *table;
  60. pt_element_t *ptep;
  61. pt_element_t inherited_ar;
  62. gfn_t gfn;
  63. u32 error_code;
  64. };
  65. /*
  66. * Fetch a guest pte for a guest virtual address
  67. */
  68. static int FNAME(walk_addr)(struct guest_walker *walker,
  69. struct kvm_vcpu *vcpu, gva_t addr,
  70. int write_fault, int user_fault, int fetch_fault)
  71. {
  72. hpa_t hpa;
  73. struct kvm_memory_slot *slot;
  74. pt_element_t *ptep;
  75. pt_element_t root;
  76. gfn_t table_gfn;
  77. pgprintk("%s: addr %lx\n", __FUNCTION__, addr);
  78. walker->level = vcpu->mmu.root_level;
  79. walker->table = NULL;
  80. root = vcpu->cr3;
  81. #if PTTYPE == 64
  82. if (!is_long_mode(vcpu)) {
  83. walker->ptep = &vcpu->pdptrs[(addr >> 30) & 3];
  84. root = *walker->ptep;
  85. if (!(root & PT_PRESENT_MASK))
  86. goto not_present;
  87. --walker->level;
  88. }
  89. #endif
  90. table_gfn = (root & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  91. walker->table_gfn[walker->level - 1] = table_gfn;
  92. pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
  93. walker->level - 1, table_gfn);
  94. slot = gfn_to_memslot(vcpu->kvm, table_gfn);
  95. hpa = safe_gpa_to_hpa(vcpu, root & PT64_BASE_ADDR_MASK);
  96. walker->table = kmap_atomic(pfn_to_page(hpa >> PAGE_SHIFT), KM_USER0);
  97. ASSERT((!is_long_mode(vcpu) && is_pae(vcpu)) ||
  98. (vcpu->cr3 & ~(PAGE_MASK | CR3_FLAGS_MASK)) == 0);
  99. walker->inherited_ar = PT_USER_MASK | PT_WRITABLE_MASK;
  100. for (;;) {
  101. int index = PT_INDEX(addr, walker->level);
  102. hpa_t paddr;
  103. ptep = &walker->table[index];
  104. ASSERT(((unsigned long)walker->table & PAGE_MASK) ==
  105. ((unsigned long)ptep & PAGE_MASK));
  106. if (!is_present_pte(*ptep))
  107. goto not_present;
  108. if (write_fault && !is_writeble_pte(*ptep))
  109. if (user_fault || is_write_protection(vcpu))
  110. goto access_error;
  111. if (user_fault && !(*ptep & PT_USER_MASK))
  112. goto access_error;
  113. #if PTTYPE == 64
  114. if (fetch_fault && is_nx(vcpu) && (*ptep & PT64_NX_MASK))
  115. goto access_error;
  116. #endif
  117. if (!(*ptep & PT_ACCESSED_MASK)) {
  118. mark_page_dirty(vcpu->kvm, table_gfn);
  119. *ptep |= PT_ACCESSED_MASK;
  120. }
  121. if (walker->level == PT_PAGE_TABLE_LEVEL) {
  122. walker->gfn = (*ptep & PT_BASE_ADDR_MASK)
  123. >> PAGE_SHIFT;
  124. break;
  125. }
  126. if (walker->level == PT_DIRECTORY_LEVEL
  127. && (*ptep & PT_PAGE_SIZE_MASK)
  128. && (PTTYPE == 64 || is_pse(vcpu))) {
  129. walker->gfn = (*ptep & PT_DIR_BASE_ADDR_MASK)
  130. >> PAGE_SHIFT;
  131. walker->gfn += PT_INDEX(addr, PT_PAGE_TABLE_LEVEL);
  132. break;
  133. }
  134. walker->inherited_ar &= walker->table[index];
  135. table_gfn = (*ptep & PT_BASE_ADDR_MASK) >> PAGE_SHIFT;
  136. paddr = safe_gpa_to_hpa(vcpu, *ptep & PT_BASE_ADDR_MASK);
  137. kunmap_atomic(walker->table, KM_USER0);
  138. walker->table = kmap_atomic(pfn_to_page(paddr >> PAGE_SHIFT),
  139. KM_USER0);
  140. --walker->level;
  141. walker->table_gfn[walker->level - 1 ] = table_gfn;
  142. pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
  143. walker->level - 1, table_gfn);
  144. }
  145. walker->ptep = ptep;
  146. pgprintk("%s: pte %llx\n", __FUNCTION__, (u64)*ptep);
  147. return 1;
  148. not_present:
  149. walker->error_code = 0;
  150. goto err;
  151. access_error:
  152. walker->error_code = PFERR_PRESENT_MASK;
  153. err:
  154. if (write_fault)
  155. walker->error_code |= PFERR_WRITE_MASK;
  156. if (user_fault)
  157. walker->error_code |= PFERR_USER_MASK;
  158. if (fetch_fault)
  159. walker->error_code |= PFERR_FETCH_MASK;
  160. return 0;
  161. }
  162. static void FNAME(release_walker)(struct guest_walker *walker)
  163. {
  164. if (walker->table)
  165. kunmap_atomic(walker->table, KM_USER0);
  166. }
  167. static void FNAME(mark_pagetable_dirty)(struct kvm *kvm,
  168. struct guest_walker *walker)
  169. {
  170. mark_page_dirty(kvm, walker->table_gfn[walker->level - 1]);
  171. }
  172. static void FNAME(set_pte)(struct kvm_vcpu *vcpu, u64 guest_pte,
  173. u64 *shadow_pte, u64 access_bits, gfn_t gfn)
  174. {
  175. ASSERT(*shadow_pte == 0);
  176. access_bits &= guest_pte;
  177. *shadow_pte = (guest_pte & PT_PTE_COPY_MASK);
  178. set_pte_common(vcpu, shadow_pte, guest_pte & PT_BASE_ADDR_MASK,
  179. guest_pte & PT_DIRTY_MASK, access_bits, gfn);
  180. }
  181. static void FNAME(set_pde)(struct kvm_vcpu *vcpu, u64 guest_pde,
  182. u64 *shadow_pte, u64 access_bits, gfn_t gfn)
  183. {
  184. gpa_t gaddr;
  185. ASSERT(*shadow_pte == 0);
  186. access_bits &= guest_pde;
  187. gaddr = (gpa_t)gfn << PAGE_SHIFT;
  188. if (PTTYPE == 32 && is_cpuid_PSE36())
  189. gaddr |= (guest_pde & PT32_DIR_PSE36_MASK) <<
  190. (32 - PT32_DIR_PSE36_SHIFT);
  191. *shadow_pte = guest_pde & PT_PTE_COPY_MASK;
  192. set_pte_common(vcpu, shadow_pte, gaddr,
  193. guest_pde & PT_DIRTY_MASK, access_bits, gfn);
  194. }
  195. /*
  196. * Fetch a shadow pte for a specific level in the paging hierarchy.
  197. */
  198. static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
  199. struct guest_walker *walker)
  200. {
  201. hpa_t shadow_addr;
  202. int level;
  203. u64 *prev_shadow_ent = NULL;
  204. pt_element_t *guest_ent = walker->ptep;
  205. if (!is_present_pte(*guest_ent))
  206. return NULL;
  207. shadow_addr = vcpu->mmu.root_hpa;
  208. level = vcpu->mmu.shadow_root_level;
  209. if (level == PT32E_ROOT_LEVEL) {
  210. shadow_addr = vcpu->mmu.pae_root[(addr >> 30) & 3];
  211. shadow_addr &= PT64_BASE_ADDR_MASK;
  212. --level;
  213. }
  214. for (; ; level--) {
  215. u32 index = SHADOW_PT_INDEX(addr, level);
  216. u64 *shadow_ent = ((u64 *)__va(shadow_addr)) + index;
  217. struct kvm_mmu_page *shadow_page;
  218. u64 shadow_pte;
  219. int metaphysical;
  220. gfn_t table_gfn;
  221. unsigned hugepage_access = 0;
  222. if (is_present_pte(*shadow_ent) || is_io_pte(*shadow_ent)) {
  223. if (level == PT_PAGE_TABLE_LEVEL)
  224. return shadow_ent;
  225. shadow_addr = *shadow_ent & PT64_BASE_ADDR_MASK;
  226. prev_shadow_ent = shadow_ent;
  227. continue;
  228. }
  229. if (level == PT_PAGE_TABLE_LEVEL) {
  230. if (walker->level == PT_DIRECTORY_LEVEL) {
  231. if (prev_shadow_ent)
  232. *prev_shadow_ent |= PT_SHADOW_PS_MARK;
  233. FNAME(set_pde)(vcpu, *guest_ent, shadow_ent,
  234. walker->inherited_ar,
  235. walker->gfn);
  236. } else {
  237. ASSERT(walker->level == PT_PAGE_TABLE_LEVEL);
  238. FNAME(set_pte)(vcpu, *guest_ent, shadow_ent,
  239. walker->inherited_ar,
  240. walker->gfn);
  241. }
  242. return shadow_ent;
  243. }
  244. if (level - 1 == PT_PAGE_TABLE_LEVEL
  245. && walker->level == PT_DIRECTORY_LEVEL) {
  246. metaphysical = 1;
  247. hugepage_access = *guest_ent;
  248. hugepage_access &= PT_USER_MASK | PT_WRITABLE_MASK;
  249. hugepage_access >>= PT_WRITABLE_SHIFT;
  250. table_gfn = (*guest_ent & PT_BASE_ADDR_MASK)
  251. >> PAGE_SHIFT;
  252. } else {
  253. metaphysical = 0;
  254. table_gfn = walker->table_gfn[level - 2];
  255. }
  256. shadow_page = kvm_mmu_get_page(vcpu, table_gfn, addr, level-1,
  257. metaphysical, hugepage_access,
  258. shadow_ent);
  259. shadow_addr = shadow_page->page_hpa;
  260. shadow_pte = shadow_addr | PT_PRESENT_MASK | PT_ACCESSED_MASK
  261. | PT_WRITABLE_MASK | PT_USER_MASK;
  262. *shadow_ent = shadow_pte;
  263. prev_shadow_ent = shadow_ent;
  264. }
  265. }
  266. /*
  267. * The guest faulted for write. We need to
  268. *
  269. * - check write permissions
  270. * - update the guest pte dirty bit
  271. * - update our own dirty page tracking structures
  272. */
  273. static int FNAME(fix_write_pf)(struct kvm_vcpu *vcpu,
  274. u64 *shadow_ent,
  275. struct guest_walker *walker,
  276. gva_t addr,
  277. int user,
  278. int *write_pt)
  279. {
  280. pt_element_t *guest_ent;
  281. int writable_shadow;
  282. gfn_t gfn;
  283. struct kvm_mmu_page *page;
  284. if (is_writeble_pte(*shadow_ent))
  285. return !user || (*shadow_ent & PT_USER_MASK);
  286. writable_shadow = *shadow_ent & PT_SHADOW_WRITABLE_MASK;
  287. if (user) {
  288. /*
  289. * User mode access. Fail if it's a kernel page or a read-only
  290. * page.
  291. */
  292. if (!(*shadow_ent & PT_SHADOW_USER_MASK) || !writable_shadow)
  293. return 0;
  294. ASSERT(*shadow_ent & PT_USER_MASK);
  295. } else
  296. /*
  297. * Kernel mode access. Fail if it's a read-only page and
  298. * supervisor write protection is enabled.
  299. */
  300. if (!writable_shadow) {
  301. if (is_write_protection(vcpu))
  302. return 0;
  303. *shadow_ent &= ~PT_USER_MASK;
  304. }
  305. guest_ent = walker->ptep;
  306. if (!is_present_pte(*guest_ent)) {
  307. *shadow_ent = 0;
  308. return 0;
  309. }
  310. gfn = walker->gfn;
  311. if (user) {
  312. /*
  313. * Usermode page faults won't be for page table updates.
  314. */
  315. while ((page = kvm_mmu_lookup_page(vcpu, gfn)) != NULL) {
  316. pgprintk("%s: zap %lx %x\n",
  317. __FUNCTION__, gfn, page->role.word);
  318. kvm_mmu_zap_page(vcpu, page);
  319. }
  320. } else if (kvm_mmu_lookup_page(vcpu, gfn)) {
  321. pgprintk("%s: found shadow page for %lx, marking ro\n",
  322. __FUNCTION__, gfn);
  323. mark_page_dirty(vcpu->kvm, gfn);
  324. FNAME(mark_pagetable_dirty)(vcpu->kvm, walker);
  325. *guest_ent |= PT_DIRTY_MASK;
  326. *write_pt = 1;
  327. return 0;
  328. }
  329. mark_page_dirty(vcpu->kvm, gfn);
  330. *shadow_ent |= PT_WRITABLE_MASK;
  331. FNAME(mark_pagetable_dirty)(vcpu->kvm, walker);
  332. *guest_ent |= PT_DIRTY_MASK;
  333. rmap_add(vcpu, shadow_ent);
  334. return 1;
  335. }
  336. /*
  337. * Page fault handler. There are several causes for a page fault:
  338. * - there is no shadow pte for the guest pte
  339. * - write access through a shadow pte marked read only so that we can set
  340. * the dirty bit
  341. * - write access to a shadow pte marked read only so we can update the page
  342. * dirty bitmap, when userspace requests it
  343. * - mmio access; in this case we will never install a present shadow pte
  344. * - normal guest page fault due to the guest pte marked not present, not
  345. * writable, or not executable
  346. *
  347. * Returns: 1 if we need to emulate the instruction, 0 otherwise, or
  348. * a negative value on error.
  349. */
  350. static int FNAME(page_fault)(struct kvm_vcpu *vcpu, gva_t addr,
  351. u32 error_code)
  352. {
  353. int write_fault = error_code & PFERR_WRITE_MASK;
  354. int user_fault = error_code & PFERR_USER_MASK;
  355. int fetch_fault = error_code & PFERR_FETCH_MASK;
  356. struct guest_walker walker;
  357. u64 *shadow_pte;
  358. int fixed;
  359. int write_pt = 0;
  360. int r;
  361. pgprintk("%s: addr %lx err %x\n", __FUNCTION__, addr, error_code);
  362. kvm_mmu_audit(vcpu, "pre page fault");
  363. r = mmu_topup_memory_caches(vcpu);
  364. if (r)
  365. return r;
  366. /*
  367. * Look up the shadow pte for the faulting address.
  368. */
  369. r = FNAME(walk_addr)(&walker, vcpu, addr, write_fault, user_fault,
  370. fetch_fault);
  371. /*
  372. * The page is not mapped by the guest. Let the guest handle it.
  373. */
  374. if (!r) {
  375. pgprintk("%s: guest page fault\n", __FUNCTION__);
  376. inject_page_fault(vcpu, addr, walker.error_code);
  377. FNAME(release_walker)(&walker);
  378. return 0;
  379. }
  380. shadow_pte = FNAME(fetch)(vcpu, addr, &walker);
  381. pgprintk("%s: shadow pte %p %llx\n", __FUNCTION__,
  382. shadow_pte, *shadow_pte);
  383. /*
  384. * Update the shadow pte.
  385. */
  386. if (write_fault)
  387. fixed = FNAME(fix_write_pf)(vcpu, shadow_pte, &walker, addr,
  388. user_fault, &write_pt);
  389. else
  390. fixed = fix_read_pf(shadow_pte);
  391. pgprintk("%s: updated shadow pte %p %llx\n", __FUNCTION__,
  392. shadow_pte, *shadow_pte);
  393. FNAME(release_walker)(&walker);
  394. /*
  395. * mmio: emulate if accessible, otherwise its a guest fault.
  396. */
  397. if (is_io_pte(*shadow_pte))
  398. return 1;
  399. ++vcpu->stat.pf_fixed;
  400. kvm_mmu_audit(vcpu, "post page fault (fixed)");
  401. return write_pt;
  402. }
  403. static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr)
  404. {
  405. struct guest_walker walker;
  406. gpa_t gpa = UNMAPPED_GVA;
  407. int r;
  408. r = FNAME(walk_addr)(&walker, vcpu, vaddr, 0, 0, 0);
  409. if (r) {
  410. gpa = (gpa_t)walker.gfn << PAGE_SHIFT;
  411. gpa |= vaddr & ~PAGE_MASK;
  412. }
  413. FNAME(release_walker)(&walker);
  414. return gpa;
  415. }
  416. #undef pt_element_t
  417. #undef guest_walker
  418. #undef FNAME
  419. #undef PT_BASE_ADDR_MASK
  420. #undef PT_INDEX
  421. #undef SHADOW_PT_INDEX
  422. #undef PT_LEVEL_MASK
  423. #undef PT_PTE_COPY_MASK
  424. #undef PT_NON_PTE_COPY_MASK
  425. #undef PT_DIR_BASE_ADDR_MASK
  426. #undef PT_MAX_FULL_LEVELS