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/release/src-rt-6.x/linux/linux-2.6/arch/mips/jazz/jazzdma.c

https://gitlab.com/envieidoc/advancedtomato2
C | 566 lines | 366 code | 85 blank | 115 comment | 63 complexity | e36aef8b179f4e13e7544de5fad50099 MD5 | raw file
  1. /*
  2. * Mips Jazz DMA controller support
  3. * Copyright (C) 1995, 1996 by Andreas Busse
  4. *
  5. * NOTE: Some of the argument checking could be removed when
  6. * things have settled down. Also, instead of returning 0xffffffff
  7. * on failure of vdma_alloc() one could leave page #0 unused
  8. * and return the more usual NULL pointer as logical address.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/errno.h>
  14. #include <linux/mm.h>
  15. #include <linux/bootmem.h>
  16. #include <linux/spinlock.h>
  17. #include <asm/mipsregs.h>
  18. #include <asm/jazz.h>
  19. #include <asm/io.h>
  20. #include <asm/uaccess.h>
  21. #include <asm/dma.h>
  22. #include <asm/jazzdma.h>
  23. #include <asm/pgtable.h>
  24. /*
  25. * Set this to one to enable additional vdma debug code.
  26. */
  27. #define CONF_DEBUG_VDMA 0
  28. static unsigned long vdma_pagetable_start;
  29. static DEFINE_SPINLOCK(vdma_lock);
  30. /*
  31. * Debug stuff
  32. */
  33. #define vdma_debug ((CONF_DEBUG_VDMA) ? debuglvl : 0)
  34. static int debuglvl = 3;
  35. /*
  36. * Initialize the pagetable with a one-to-one mapping of
  37. * the first 16 Mbytes of main memory and declare all
  38. * entries to be unused. Using this method will at least
  39. * allow some early device driver operations to work.
  40. */
  41. static inline void vdma_pgtbl_init(void)
  42. {
  43. VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
  44. unsigned long paddr = 0;
  45. int i;
  46. for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
  47. pgtbl[i].frame = paddr;
  48. pgtbl[i].owner = VDMA_PAGE_EMPTY;
  49. paddr += VDMA_PAGESIZE;
  50. }
  51. }
  52. /*
  53. * Initialize the Jazz R4030 dma controller
  54. */
  55. void __init vdma_init(void)
  56. {
  57. /*
  58. * Allocate 32k of memory for DMA page tables. This needs to be page
  59. * aligned and should be uncached to avoid cache flushing after every
  60. * update.
  61. */
  62. vdma_pagetable_start =
  63. (unsigned long) alloc_bootmem_low_pages(VDMA_PGTBL_SIZE);
  64. if (!vdma_pagetable_start)
  65. BUG();
  66. dma_cache_wback_inv(vdma_pagetable_start, VDMA_PGTBL_SIZE);
  67. vdma_pagetable_start = KSEG1ADDR(vdma_pagetable_start);
  68. /*
  69. * Clear the R4030 translation table
  70. */
  71. vdma_pgtbl_init();
  72. r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE,
  73. CPHYSADDR(vdma_pagetable_start));
  74. r4030_write_reg32(JAZZ_R4030_TRSTBL_LIM, VDMA_PGTBL_SIZE);
  75. r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
  76. printk("VDMA: R4030 DMA pagetables initialized.\n");
  77. }
  78. /*
  79. * Allocate DMA pagetables using a simple first-fit algorithm
  80. */
  81. unsigned long vdma_alloc(unsigned long paddr, unsigned long size)
  82. {
  83. VDMA_PGTBL_ENTRY *entry = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
  84. int first, last, pages, frame, i;
  85. unsigned long laddr, flags;
  86. /* check arguments */
  87. if (paddr > 0x1fffffff) {
  88. if (vdma_debug)
  89. printk("vdma_alloc: Invalid physical address: %08lx\n",
  90. paddr);
  91. return VDMA_ERROR; /* invalid physical address */
  92. }
  93. if (size > 0x400000 || size == 0) {
  94. if (vdma_debug)
  95. printk("vdma_alloc: Invalid size: %08lx\n", size);
  96. return VDMA_ERROR; /* invalid physical address */
  97. }
  98. spin_lock_irqsave(&vdma_lock, flags);
  99. /*
  100. * Find free chunk
  101. */
  102. pages = (size + 4095) >> 12; /* no. of pages to allocate */
  103. first = 0;
  104. while (1) {
  105. while (entry[first].owner != VDMA_PAGE_EMPTY &&
  106. first < VDMA_PGTBL_ENTRIES) first++;
  107. if (first + pages > VDMA_PGTBL_ENTRIES) { /* nothing free */
  108. spin_unlock_irqrestore(&vdma_lock, flags);
  109. return VDMA_ERROR;
  110. }
  111. last = first + 1;
  112. while (entry[last].owner == VDMA_PAGE_EMPTY
  113. && last - first < pages)
  114. last++;
  115. if (last - first == pages)
  116. break; /* found */
  117. }
  118. /*
  119. * Mark pages as allocated
  120. */
  121. laddr = (first << 12) + (paddr & (VDMA_PAGESIZE - 1));
  122. frame = paddr & ~(VDMA_PAGESIZE - 1);
  123. for (i = first; i < last; i++) {
  124. entry[i].frame = frame;
  125. entry[i].owner = laddr;
  126. frame += VDMA_PAGESIZE;
  127. }
  128. /*
  129. * Update translation table and return logical start address
  130. */
  131. r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
  132. if (vdma_debug > 1)
  133. printk("vdma_alloc: Allocated %d pages starting from %08lx\n",
  134. pages, laddr);
  135. if (vdma_debug > 2) {
  136. printk("LADDR: ");
  137. for (i = first; i < last; i++)
  138. printk("%08x ", i << 12);
  139. printk("\nPADDR: ");
  140. for (i = first; i < last; i++)
  141. printk("%08x ", entry[i].frame);
  142. printk("\nOWNER: ");
  143. for (i = first; i < last; i++)
  144. printk("%08x ", entry[i].owner);
  145. printk("\n");
  146. }
  147. spin_unlock_irqrestore(&vdma_lock, flags);
  148. return laddr;
  149. }
  150. EXPORT_SYMBOL(vdma_alloc);
  151. /*
  152. * Free previously allocated dma translation pages
  153. * Note that this does NOT change the translation table,
  154. * it just marks the free'd pages as unused!
  155. */
  156. int vdma_free(unsigned long laddr)
  157. {
  158. VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
  159. int i;
  160. i = laddr >> 12;
  161. if (pgtbl[i].owner != laddr) {
  162. printk
  163. ("vdma_free: trying to free other's dma pages, laddr=%8lx\n",
  164. laddr);
  165. return -1;
  166. }
  167. while (i < VDMA_PGTBL_ENTRIES && pgtbl[i].owner == laddr) {
  168. pgtbl[i].owner = VDMA_PAGE_EMPTY;
  169. i++;
  170. }
  171. if (vdma_debug > 1)
  172. printk("vdma_free: freed %ld pages starting from %08lx\n",
  173. i - (laddr >> 12), laddr);
  174. return 0;
  175. }
  176. EXPORT_SYMBOL(vdma_free);
  177. /*
  178. * Map certain page(s) to another physical address.
  179. * Caller must have allocated the page(s) before.
  180. */
  181. int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size)
  182. {
  183. VDMA_PGTBL_ENTRY *pgtbl =
  184. (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
  185. int first, pages, npages;
  186. if (laddr > 0xffffff) {
  187. if (vdma_debug)
  188. printk
  189. ("vdma_map: Invalid logical address: %08lx\n",
  190. laddr);
  191. return -EINVAL; /* invalid logical address */
  192. }
  193. if (paddr > 0x1fffffff) {
  194. if (vdma_debug)
  195. printk
  196. ("vdma_map: Invalid physical address: %08lx\n",
  197. paddr);
  198. return -EINVAL; /* invalid physical address */
  199. }
  200. npages = pages =
  201. (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
  202. first = laddr >> 12;
  203. if (vdma_debug)
  204. printk("vdma_remap: first=%x, pages=%x\n", first, pages);
  205. if (first + pages > VDMA_PGTBL_ENTRIES) {
  206. if (vdma_debug)
  207. printk("vdma_alloc: Invalid size: %08lx\n", size);
  208. return -EINVAL;
  209. }
  210. paddr &= ~(VDMA_PAGESIZE - 1);
  211. while (pages > 0 && first < VDMA_PGTBL_ENTRIES) {
  212. if (pgtbl[first].owner != laddr) {
  213. if (vdma_debug)
  214. printk("Trying to remap other's pages.\n");
  215. return -EPERM; /* not owner */
  216. }
  217. pgtbl[first].frame = paddr;
  218. paddr += VDMA_PAGESIZE;
  219. first++;
  220. pages--;
  221. }
  222. /*
  223. * Update translation table
  224. */
  225. r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
  226. if (vdma_debug > 2) {
  227. int i;
  228. pages = (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
  229. first = laddr >> 12;
  230. printk("LADDR: ");
  231. for (i = first; i < first + pages; i++)
  232. printk("%08x ", i << 12);
  233. printk("\nPADDR: ");
  234. for (i = first; i < first + pages; i++)
  235. printk("%08x ", pgtbl[i].frame);
  236. printk("\nOWNER: ");
  237. for (i = first; i < first + pages; i++)
  238. printk("%08x ", pgtbl[i].owner);
  239. printk("\n");
  240. }
  241. return 0;
  242. }
  243. /*
  244. * Translate a physical address to a logical address.
  245. * This will return the logical address of the first
  246. * match.
  247. */
  248. unsigned long vdma_phys2log(unsigned long paddr)
  249. {
  250. int i;
  251. int frame;
  252. VDMA_PGTBL_ENTRY *pgtbl =
  253. (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
  254. frame = paddr & ~(VDMA_PAGESIZE - 1);
  255. for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
  256. if (pgtbl[i].frame == frame)
  257. break;
  258. }
  259. if (i == VDMA_PGTBL_ENTRIES)
  260. return ~0UL;
  261. return (i << 12) + (paddr & (VDMA_PAGESIZE - 1));
  262. }
  263. EXPORT_SYMBOL(vdma_phys2log);
  264. /*
  265. * Translate a logical DMA address to a physical address
  266. */
  267. unsigned long vdma_log2phys(unsigned long laddr)
  268. {
  269. VDMA_PGTBL_ENTRY *pgtbl =
  270. (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
  271. return pgtbl[laddr >> 12].frame + (laddr & (VDMA_PAGESIZE - 1));
  272. }
  273. EXPORT_SYMBOL(vdma_log2phys);
  274. /*
  275. * Print DMA statistics
  276. */
  277. void vdma_stats(void)
  278. {
  279. int i;
  280. printk("vdma_stats: CONFIG: %08x\n",
  281. r4030_read_reg32(JAZZ_R4030_CONFIG));
  282. printk("R4030 translation table base: %08x\n",
  283. r4030_read_reg32(JAZZ_R4030_TRSTBL_BASE));
  284. printk("R4030 translation table limit: %08x\n",
  285. r4030_read_reg32(JAZZ_R4030_TRSTBL_LIM));
  286. printk("vdma_stats: INV_ADDR: %08x\n",
  287. r4030_read_reg32(JAZZ_R4030_INV_ADDR));
  288. printk("vdma_stats: R_FAIL_ADDR: %08x\n",
  289. r4030_read_reg32(JAZZ_R4030_R_FAIL_ADDR));
  290. printk("vdma_stats: M_FAIL_ADDR: %08x\n",
  291. r4030_read_reg32(JAZZ_R4030_M_FAIL_ADDR));
  292. printk("vdma_stats: IRQ_SOURCE: %08x\n",
  293. r4030_read_reg32(JAZZ_R4030_IRQ_SOURCE));
  294. printk("vdma_stats: I386_ERROR: %08x\n",
  295. r4030_read_reg32(JAZZ_R4030_I386_ERROR));
  296. printk("vdma_chnl_modes: ");
  297. for (i = 0; i < 8; i++)
  298. printk("%04x ",
  299. (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
  300. (i << 5)));
  301. printk("\n");
  302. printk("vdma_chnl_enables: ");
  303. for (i = 0; i < 8; i++)
  304. printk("%04x ",
  305. (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
  306. (i << 5)));
  307. printk("\n");
  308. }
  309. /*
  310. * DMA transfer functions
  311. */
  312. /*
  313. * Enable a DMA channel. Also clear any error conditions.
  314. */
  315. void vdma_enable(int channel)
  316. {
  317. int status;
  318. if (vdma_debug)
  319. printk("vdma_enable: channel %d\n", channel);
  320. /*
  321. * Check error conditions first
  322. */
  323. status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
  324. if (status & 0x400)
  325. printk("VDMA: Channel %d: Address error!\n", channel);
  326. if (status & 0x200)
  327. printk("VDMA: Channel %d: Memory error!\n", channel);
  328. /*
  329. * Clear all interrupt flags
  330. */
  331. r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
  332. r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
  333. (channel << 5)) | R4030_TC_INTR
  334. | R4030_MEM_INTR | R4030_ADDR_INTR);
  335. /*
  336. * Enable the desired channel
  337. */
  338. r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
  339. r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
  340. (channel << 5)) |
  341. R4030_CHNL_ENABLE);
  342. }
  343. EXPORT_SYMBOL(vdma_enable);
  344. /*
  345. * Disable a DMA channel
  346. */
  347. void vdma_disable(int channel)
  348. {
  349. if (vdma_debug) {
  350. int status =
  351. r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
  352. (channel << 5));
  353. printk("vdma_disable: channel %d\n", channel);
  354. printk("VDMA: channel %d status: %04x (%s) mode: "
  355. "%02x addr: %06x count: %06x\n",
  356. channel, status,
  357. ((status & 0x600) ? "ERROR" : "OK"),
  358. (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
  359. (channel << 5)),
  360. (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ADDR +
  361. (channel << 5)),
  362. (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_COUNT +
  363. (channel << 5)));
  364. }
  365. r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
  366. r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
  367. (channel << 5)) &
  368. ~R4030_CHNL_ENABLE);
  369. /*
  370. * After disabling a DMA channel a remote bus register should be
  371. * read to ensure that the current DMA acknowledge cycle is completed.
  372. */
  373. *((volatile unsigned int *) JAZZ_DUMMY_DEVICE);
  374. }
  375. EXPORT_SYMBOL(vdma_disable);
  376. /*
  377. * Set DMA mode. This function accepts the mode values used
  378. * to set a PC-style DMA controller. For the SCSI and FDC
  379. * channels, we also set the default modes each time we're
  380. * called.
  381. * NOTE: The FAST and BURST dma modes are supported by the
  382. * R4030 Rev. 2 and PICA chipsets only. I leave them disabled
  383. * for now.
  384. */
  385. void vdma_set_mode(int channel, int mode)
  386. {
  387. if (vdma_debug)
  388. printk("vdma_set_mode: channel %d, mode 0x%x\n", channel,
  389. mode);
  390. switch (channel) {
  391. case JAZZ_SCSI_DMA: /* scsi */
  392. r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
  393. /* R4030_MODE_FAST | */
  394. /* R4030_MODE_BURST | */
  395. R4030_MODE_INTR_EN |
  396. R4030_MODE_WIDTH_16 |
  397. R4030_MODE_ATIME_80);
  398. break;
  399. case JAZZ_FLOPPY_DMA: /* floppy */
  400. r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
  401. /* R4030_MODE_FAST | */
  402. /* R4030_MODE_BURST | */
  403. R4030_MODE_INTR_EN |
  404. R4030_MODE_WIDTH_8 |
  405. R4030_MODE_ATIME_120);
  406. break;
  407. case JAZZ_AUDIOL_DMA:
  408. case JAZZ_AUDIOR_DMA:
  409. printk("VDMA: Audio DMA not supported yet.\n");
  410. break;
  411. default:
  412. printk
  413. ("VDMA: vdma_set_mode() called with unsupported channel %d!\n",
  414. channel);
  415. }
  416. switch (mode) {
  417. case DMA_MODE_READ:
  418. r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
  419. r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
  420. (channel << 5)) &
  421. ~R4030_CHNL_WRITE);
  422. break;
  423. case DMA_MODE_WRITE:
  424. r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
  425. r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
  426. (channel << 5)) |
  427. R4030_CHNL_WRITE);
  428. break;
  429. default:
  430. printk
  431. ("VDMA: vdma_set_mode() called with unknown dma mode 0x%x\n",
  432. mode);
  433. }
  434. }
  435. EXPORT_SYMBOL(vdma_set_mode);
  436. /*
  437. * Set Transfer Address
  438. */
  439. void vdma_set_addr(int channel, long addr)
  440. {
  441. if (vdma_debug)
  442. printk("vdma_set_addr: channel %d, addr %lx\n", channel,
  443. addr);
  444. r4030_write_reg32(JAZZ_R4030_CHNL_ADDR + (channel << 5), addr);
  445. }
  446. EXPORT_SYMBOL(vdma_set_addr);
  447. /*
  448. * Set Transfer Count
  449. */
  450. void vdma_set_count(int channel, int count)
  451. {
  452. if (vdma_debug)
  453. printk("vdma_set_count: channel %d, count %08x\n", channel,
  454. (unsigned) count);
  455. r4030_write_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5), count);
  456. }
  457. EXPORT_SYMBOL(vdma_set_count);
  458. /*
  459. * Get Residual
  460. */
  461. int vdma_get_residue(int channel)
  462. {
  463. int residual;
  464. residual = r4030_read_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5));
  465. if (vdma_debug)
  466. printk("vdma_get_residual: channel %d: residual=%d\n",
  467. channel, residual);
  468. return residual;
  469. }
  470. /*
  471. * Get DMA channel enable register
  472. */
  473. int vdma_get_enable(int channel)
  474. {
  475. int enable;
  476. enable = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
  477. if (vdma_debug)
  478. printk("vdma_get_enable: channel %d: enable=%d\n", channel,
  479. enable);
  480. return enable;
  481. }