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/modules/tools/generator/tests/ftest/fixtures/gen/src/cortexM4/Os_Internal_Arch_Cfg.c.php

https://gitlab.com/glpuga/FirmwareCIAA
PHP | 453 lines | 336 code | 29 blank | 88 comment | 24 complexity | af6cec2640ea198b6905bdcb9074ccf1 MD5 | raw file
  1. /********************************************************
  2. * DO NOT CHANGE THIS FILE, IT IS GENERATED AUTOMATICALY*
  3. ********************************************************/
  4. /* Copyright 2014, 2015 Mariano Cerdeiro
  5. * Copyright 2014, Pablo Ridolfi
  6. * Copyright 2015, Alejandro Permingeat
  7. * All rights reserved.
  8. *
  9. * This file is part of CIAA Firmware.
  10. *
  11. * Redistribution and use in source and binary forms, with or without
  12. * modification, are permitted provided that the following conditions are met:
  13. *
  14. * 1. Redistributions of source code must retain the above copyright notice,
  15. * this list of conditions and the following disclaimer.
  16. *
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. *
  21. * 3. Neither the name of the copyright holder nor the names of its
  22. * contributors may be used to endorse or promote products derived from this
  23. * software without specific prior written permission.
  24. *
  25. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  26. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  27. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  28. * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
  29. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  30. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  31. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  32. * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  33. * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  34. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  35. * POSSIBILITY OF SUCH DAMAGE.
  36. *
  37. */
  38. /** \brief FreeOSEK Os Generated Internal Achitecture Configuration Implementation File
  39. **
  40. ** \file cortexM4/Os_Internal_Arch_Cfg.c
  41. ** \arch cortexM4
  42. **/
  43. /** \addtogroup FreeOSEK
  44. ** @{ */
  45. /** \addtogroup FreeOSEK_Os
  46. ** @{ */
  47. /** \addtogroup FreeOSEK_Os_Internal
  48. ** @{ */
  49. /*==================[inclusions]=============================================*/
  50. #include "Os_Internal.h"
  51. /*==================[macros and definitions]=================================*/
  52. /*==================[internal data declaration]==============================*/
  53. /*==================[internal functions declaration]=========================*/
  54. /*==================[internal data definition]===============================*/
  55. /*==================[external data definition]===============================*/
  56. #if (CPU == mk60fx512vlq15)
  57. /* Reset_Handler is defined in startup_MK60F15.S_CPP */
  58. void Reset_Handler( void );
  59. extern uint32_t __StackTop;
  60. #elif (CPU == lpc4337)
  61. /* ResetISR is defined in cr_startup_lpc43xx.c */
  62. extern void ResetISR(void);
  63. /** \brief External declaration for the pointer to the stack top from the Linker Script */
  64. extern void _vStackTop(void);
  65. #else
  66. #error Not supported CPU
  67. #endif
  68. /** \brief Handlers used by OSEK */
  69. extern void SysTick_Handler(void);
  70. extern void PendSV_Handler(void);
  71. /*==================[internal functions definition]==========================*/
  72. /* Default exception handlers. */
  73. __attribute__ ((section(".after_vectors")))
  74. void NMI_Handler(void) {
  75. while (1) {
  76. }
  77. }
  78. __attribute__ ((section(".after_vectors")))
  79. void HardFault_Handler(void) {
  80. while (1) {
  81. }
  82. }
  83. __attribute__ ((section(".after_vectors")))
  84. void MemManage_Handler(void) {
  85. while (1) {
  86. }
  87. }
  88. __attribute__ ((section(".after_vectors")))
  89. void BusFault_Handler(void) {
  90. while (1) {
  91. }
  92. }
  93. __attribute__ ((section(".after_vectors")))
  94. void UsageFault_Handler(void) {
  95. while (1) {
  96. }
  97. }
  98. __attribute__ ((section(".after_vectors")))
  99. void SVC_Handler(void) {
  100. while (1) {
  101. }
  102. }
  103. __attribute__ ((section(".after_vectors")))
  104. void DebugMon_Handler(void) {
  105. while (1) {
  106. }
  107. }
  108. /*==================[external functions definition]==========================*/
  109. <?php
  110. switch ($definitions["CPU"])
  111. {
  112. case "mk60fx512vlq15":
  113. /* Interrupt sources for MK60F12.
  114. * See externals/platforms/cortexM4/k60_120/inc/device/MK60F12/MK60F12.h.
  115. */
  116. $intList = array (
  117. 0 => "DMA0_DMA16",
  118. 1 => "DMA1_DMA17",
  119. 2 => "DMA2_DMA18",
  120. 3 => "DMA3_DMA19",
  121. 4 => "DMA4_DMA20",
  122. 5 => "DMA5_DMA21",
  123. 6 => "DMA6_DMA22",
  124. 7 => "DMA7_DMA23",
  125. 8 => "DMA8_DMA24",
  126. 9 => "DMA9_DMA25",
  127. 10 => "DMA10_DMA26",
  128. 11 => "DMA11_DMA27",
  129. 12 => "DMA12_DMA28",
  130. 13 => "DMA13_DMA29",
  131. 14 => "DMA14_DMA30",
  132. 15 => "DMA15_DMA31",
  133. 16 => "DMA_ERR",
  134. 17 => "MCM",
  135. 18 => "FTFE",
  136. 19 => "Read_Collision",
  137. 20 => "LVD_LVW",
  138. 21 => "LLW",
  139. 22 => "WDG",
  140. 23 => "RNG",
  141. 24 => "I2C0",
  142. 25 => "I2C1",
  143. 26 => "SPI0",
  144. 27 => "SPI1",
  145. 28 => "SPI2",
  146. 29 => "CAN0_READ",
  147. 30 => "CAN0_BOFF",
  148. 31 => "CAN0_ERR",
  149. 32 => "CAN0_TXW",
  150. 33 => "CAN0_RXW",
  151. 34 => "CAN0_WAKEUP",
  152. 35 => "I2S0_TX",
  153. 36 => "I2S0_RR",
  154. 37 => "CAN1_READ",
  155. 38 => "CAN1_BOFF",
  156. 39 => "CAN1_EERROR",
  157. 40 => "CAN1_TXW",
  158. 41 => "CAN1_RXW",
  159. 42 => "CAN1_WAKEUP",
  160. 43 => "RES59",
  161. 44 => "UART0_LON",
  162. 45 => "UART0",
  163. 46 => "UART0_ERR",
  164. 47 => "UART1",
  165. 48 => "UART1_ERR",
  166. 49 => "UART2",
  167. 50 => "UART2_ERR",
  168. 51 => "UART3",
  169. 52 => "UART3_ERR",
  170. 53 => "UART4",
  171. 54 => "UART4_ERR",
  172. 55 => "UART5",
  173. 56 => "UART5_ERR",
  174. 57 => "ADC0",
  175. 58 => "ADC1",
  176. 59 => "CMP0",
  177. 60 => "CMP1",
  178. 61 => "CMP2",
  179. 62 => "FTM0",
  180. 63 => "FTM1",
  181. 64 => "FTM2",
  182. 65 => "CMT",
  183. 66 => "RTC",
  184. 67 => "RTC_SEC",
  185. 68 => "PIT0",
  186. 69 => "PIT1",
  187. 70 => "PIT2",
  188. 71 => "PIT3",
  189. 72 => "PDB0",
  190. 73 => "USB0",
  191. 74 => "USBDCD",
  192. 75 => "ENET_1588_Timer",
  193. 76 => "ENET_TX",
  194. 77 => "ENET_RX",
  195. 78 => "ENET_ERR",
  196. 79 => "RES95",
  197. 80 => "SDHC",
  198. 81 => "DAC0",
  199. 82 => "DAC1",
  200. 83 => "TSI0",
  201. 84 => "MCG",
  202. 84 => "LPTimer",
  203. 85 => "RES102",
  204. 86 => "PORTA",
  205. 87 => "PORTB",
  206. 88 => "PORTC",
  207. 89 => "PORTD",
  208. 90 => "PORTE",
  209. 91 => "PORTF",
  210. 92 => "RES109",
  211. 93 => "SWI",
  212. 94 => "NFC",
  213. 95 => "USBHS",
  214. 96 => "RES113",
  215. 97 => "CMP3",
  216. 98 => "RES115",
  217. 99 => "RES116",
  218. 100 => "FTM3",
  219. 101 => "ADC2",
  220. 102 => "ADC3",
  221. 103 => "I2S1_TX",
  222. 104 => "I2S1_RX",
  223. );
  224. break;
  225. case "lpc4337":
  226. /* Interrupt sources for LPC43xx.
  227. * See externals/platforms/cortexM4/lpc43xx/inc/cmsis_43xx.h.
  228. */
  229. $intList = array (
  230. 0 => "DAC",
  231. 1 => "M0APP",
  232. 2 => "DMA",
  233. 3 => "RES1",
  234. 4 => "FLASH_EEPROM",
  235. 5 => "ETH",
  236. 6 => "SDIO",
  237. 7 => "LCD",
  238. 8 => "USB0",
  239. 9 => "USB1",
  240. 10 => "SCT",
  241. 11 => "RIT",
  242. 12 => "TIMER0",
  243. 13 => "TIMER1",
  244. 14 => "TIMER2",
  245. 15 => "TIMER3",
  246. 16 => "MCPWM",
  247. 17 => "ADC0",
  248. 18 => "I2C0",
  249. 19 => "I2C1",
  250. 20 => "SPI",
  251. 21 => "ADC1",
  252. 22 => "SSP0",
  253. 23 => "SSP1",
  254. 24 => "UART0",
  255. 25 => "UART1",
  256. 26 => "UART2",
  257. 27 => "UART3",
  258. 28 => "I2S0",
  259. 29 => "I2S1",
  260. 30 => "SPIFI",
  261. 31 => "SGPIO",
  262. 32 => "GPIO0",
  263. 33 => "GPIO1",
  264. 34 => "GPIO2",
  265. 35 => "GPIO3",
  266. 36 => "GPIO4",
  267. 37 => "GPIO5",
  268. 38 => "GPIO6",
  269. 39 => "GPIO7",
  270. 40 => "GINT0",
  271. 41 => "GINT1",
  272. 42 => "EVRT",
  273. 43 => "CAN1",
  274. 44 => "RES6",
  275. 45 => "ADCHS",
  276. 46 => "ATIMER",
  277. 47 => "RTC",
  278. 48 => "RES8",
  279. 49 => "WDT",
  280. 50 => "M0SUB",
  281. 51 => "CAN0",
  282. 52 => "QEI"
  283. );
  284. break;
  285. default:
  286. $this->log->error("the CPU " . $definitions["CPU"] . " is not supported.");
  287. break;
  288. }
  289. $MAX_INT_COUNT = max(array_keys($intList))+1;
  290. if ($definitions["CPU"] == "mk60fx512vlq15") : ?>
  291. __attribute__ ((section(".isr_vector")))
  292. void (* const g_pfnVectors[])(void) = {
  293. /* System ISRs */
  294. &__StackTop, /* The initial stack pointer */
  295. Reset_Handler, /* The reset handler */
  296. NMI_Handler, /* The NMI handler */
  297. HardFault_Handler, /* The hard fault handler */
  298. MemManage_Handler, /* The MPU fault handler */
  299. BusFault_Handler, /* The bus fault handler */
  300. UsageFault_Handler, /* The usage fault handler */
  301. 0, /* Reserved */
  302. 0, /* Reserved */
  303. 0, /* Reserved */
  304. 0, /* Reserved */
  305. SVC_Handler, /* SVCall handler */
  306. DebugMon_Handler, /* Debug monitor handler */
  307. 0, /* Reserved */
  308. PendSV_Handler, /* The PendSV handler */
  309. SysTick_Handler, /* The SysTick handler */
  310. <?php elseif ($definitions["CPU"] == "lpc4337") : ?>
  311. /** \brief LPC4337 Interrupt vector */
  312. __attribute__ ((section(".isr_vector")))
  313. void (* const g_pfnVectors[])(void) = {
  314. /* System ISRs */
  315. &_vStackTop, /* The initial stack pointer */
  316. ResetISR, /* The reset handler */
  317. NMI_Handler, /* The NMI handler */
  318. HardFault_Handler, /* The hard fault handler */
  319. MemManage_Handler, /* The MPU fault handler */
  320. BusFault_Handler, /* The bus fault handler */
  321. UsageFault_Handler, /* The usage fault handler */
  322. 0, /* Reserved */
  323. 0, /* Reserved */
  324. 0, /* Reserved */
  325. 0, /* Reserved */
  326. SVC_Handler, /* SVCall handler */
  327. DebugMon_Handler, /* Debug monitor handler */
  328. 0, /* Reserved */
  329. PendSV_Handler, /* The PendSV handler */
  330. SysTick_Handler, /* The SysTick handler */
  331. <?php else :
  332. $this->log->error("Not supported CPU: " . $definitions["CPU"]);
  333. endif;
  334. ?>
  335. /*** User Interruptions ***/
  336. <?php
  337. /* get ISRs defined by user application */
  338. $intnames = $this->config->getList("/OSEK","ISR");
  339. for($i=0; $i < $MAX_INT_COUNT; $i++)
  340. {
  341. $src_found = 0;
  342. foreach ($intnames as $int)
  343. {
  344. $intcat = $this->config->getValue("/OSEK/" . $int,"CATEGORY");
  345. $source = $this->config->getValue("/OSEK/" . $int,"INTERRUPT");
  346. if($intList[$i] == $source)
  347. {
  348. if ($intcat == 2)
  349. {
  350. print " OSEK_ISR2_$int, /* 0x".dechex($i+16)." 0x".str_pad(strtoupper(dechex(($i+16)*4)), 8, "0", STR_PAD_LEFT)." ISR for " . $intList[$i] . " (IRQ $i) Category 2 */\n";
  351. $src_found = 1;
  352. } elseif ($intcat == 1)
  353. {
  354. print " OSEK_ISR_$int, /* 0x".dechex($i+16)." 0x".str_pad(strtoupper(dechex(($i+16)*4)), 8, "0", STR_PAD_LEFT)." ISR for " . $intList[$i] . " (IRQ $i) Category 1 */\n";
  355. $src_found = 1;
  356. } else
  357. {
  358. $this->log->error("Interrupt $int type $inttype has an invalid category $intcat");
  359. }
  360. }
  361. }
  362. if($src_found == 0)
  363. {
  364. print " OSEK_ISR_NoHandler, /* 0x".dechex($i+16)." 0x".str_pad(strtoupper(dechex(($i+16)*4)), 8, "0", STR_PAD_LEFT)." - No Handler set for ISR " . $intList[$i] . " (IRQ $i) */\n";
  365. }
  366. }
  367. ?>
  368. };
  369. /** \brief Interrupt enabling and priority setting function */
  370. void Enable_User_ISRs(void)
  371. {
  372. <?php
  373. /* get ISRs defined by user application */
  374. $intnames = $this->config->getList("/OSEK","ISR");
  375. foreach ($intnames as $int)
  376. {
  377. $source = $this->config->getValue("/OSEK/" . $int,"INTERRUPT");
  378. $prio = $this->config->getValue("/OSEK/" . $int,"PRIORITY");
  379. print " /* Enabling IRQ $source with priority $prio */\n";
  380. print " NVIC_EnableIRQ(" . array_search($source, $intList) . ");\n";
  381. print " NVIC_SetPriority(" . array_search($source, $intList) . ", $prio);\n\n";
  382. }
  383. ?>
  384. }
  385. /** \brief Enable user defined category 2 ISRs */
  386. void Enable_ISR2_Arch(void)
  387. {
  388. <?php
  389. /* get ISRs defined by user application */
  390. $intnames = $this->config->getList("/OSEK","ISR");
  391. foreach ($intnames as $int)
  392. {
  393. $source = $this->config->getValue("/OSEK/" . $int,"INTERRUPT");
  394. $cat = $this->config->getValue("/OSEK/" . $int,"CATEGORY");
  395. if($cat == 2)
  396. {
  397. print " /* Enabling IRQ $source */\n";
  398. print " NVIC_EnableIRQ(" . array_search($source, $intList) . ");\n";
  399. }
  400. }
  401. ?>
  402. }
  403. /** \brief Disable user defined category 2 ISRs */
  404. void Disable_ISR2_Arch(void)
  405. {
  406. <?php
  407. /* get ISRs defined by user application */
  408. $intnames = $this->config->getList("/OSEK","ISR");
  409. foreach ($intnames as $int)
  410. {
  411. $source = $this->config->getValue("/OSEK/" . $int,"INTERRUPT");
  412. $cat = $this->config->getValue("/OSEK/" . $int,"CATEGORY");
  413. if($cat == 2)
  414. {
  415. print " /* Disabling IRQ $source */\n";
  416. print " NVIC_DisableIRQ(" . array_search($source, $intList) . ");\n";
  417. }
  418. }
  419. ?>
  420. }
  421. /** @} doxygen end group definition */
  422. /** @} doxygen end group definition */
  423. /** @} doxygen end group definition */
  424. /*==================[end of file]============================================*/