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/sound/soc/codecs/tlv320aic26.c

https://gitlab.com/SerenityS/android_kernel_lge_g3
C | 458 lines | 326 code | 69 blank | 63 comment | 18 complexity | 5356cb2661f219b25621b537d0ccc5dd MD5 | raw file
  1. /*
  2. * Texas Instruments TLV320AIC26 low power audio CODEC
  3. * ALSA SoC CODEC driver
  4. *
  5. * Copyright (C) 2008 Secret Lab Technologies Ltd.
  6. */
  7. #include <linux/module.h>
  8. #include <linux/moduleparam.h>
  9. #include <linux/init.h>
  10. #include <linux/delay.h>
  11. #include <linux/pm.h>
  12. #include <linux/device.h>
  13. #include <linux/sysfs.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/slab.h>
  16. #include <sound/core.h>
  17. #include <sound/pcm.h>
  18. #include <sound/pcm_params.h>
  19. #include <sound/soc.h>
  20. #include <sound/initval.h>
  21. #include "tlv320aic26.h"
  22. MODULE_DESCRIPTION("ASoC TLV320AIC26 codec driver");
  23. MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
  24. MODULE_LICENSE("GPL");
  25. /* AIC26 driver private data */
  26. struct aic26 {
  27. struct spi_device *spi;
  28. struct snd_soc_codec codec;
  29. int master;
  30. int datfm;
  31. int mclk;
  32. /* Keyclick parameters */
  33. int keyclick_amplitude;
  34. int keyclick_freq;
  35. int keyclick_len;
  36. };
  37. /* ---------------------------------------------------------------------
  38. * Register access routines
  39. */
  40. static unsigned int aic26_reg_read(struct snd_soc_codec *codec,
  41. unsigned int reg)
  42. {
  43. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  44. u16 *cache = codec->reg_cache;
  45. u16 cmd, value;
  46. u8 buffer[2];
  47. int rc;
  48. if (reg >= AIC26_NUM_REGS) {
  49. WARN_ON_ONCE(1);
  50. return 0;
  51. }
  52. /* Do SPI transfer; first 16bits are command; remaining is
  53. * register contents */
  54. cmd = AIC26_READ_COMMAND_WORD(reg);
  55. buffer[0] = (cmd >> 8) & 0xff;
  56. buffer[1] = cmd & 0xff;
  57. rc = spi_write_then_read(aic26->spi, buffer, 2, buffer, 2);
  58. if (rc) {
  59. dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
  60. return -EIO;
  61. }
  62. value = (buffer[0] << 8) | buffer[1];
  63. /* Update the cache before returning with the value */
  64. cache[reg] = value;
  65. return value;
  66. }
  67. static unsigned int aic26_reg_read_cache(struct snd_soc_codec *codec,
  68. unsigned int reg)
  69. {
  70. u16 *cache = codec->reg_cache;
  71. if (reg >= AIC26_NUM_REGS) {
  72. WARN_ON_ONCE(1);
  73. return 0;
  74. }
  75. return cache[reg];
  76. }
  77. static int aic26_reg_write(struct snd_soc_codec *codec, unsigned int reg,
  78. unsigned int value)
  79. {
  80. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  81. u16 *cache = codec->reg_cache;
  82. u16 cmd;
  83. u8 buffer[4];
  84. int rc;
  85. if (reg >= AIC26_NUM_REGS) {
  86. WARN_ON_ONCE(1);
  87. return -EINVAL;
  88. }
  89. /* Do SPI transfer; first 16bits are command; remaining is data
  90. * to write into register */
  91. cmd = AIC26_WRITE_COMMAND_WORD(reg);
  92. buffer[0] = (cmd >> 8) & 0xff;
  93. buffer[1] = cmd & 0xff;
  94. buffer[2] = value >> 8;
  95. buffer[3] = value;
  96. rc = spi_write(aic26->spi, buffer, 4);
  97. if (rc) {
  98. dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
  99. return -EIO;
  100. }
  101. /* update cache before returning */
  102. cache[reg] = value;
  103. return 0;
  104. }
  105. /* ---------------------------------------------------------------------
  106. * Digital Audio Interface Operations
  107. */
  108. static int aic26_hw_params(struct snd_pcm_substream *substream,
  109. struct snd_pcm_hw_params *params,
  110. struct snd_soc_dai *dai)
  111. {
  112. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  113. struct snd_soc_codec *codec = rtd->codec;
  114. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  115. int fsref, divisor, wlen, pval, jval, dval, qval;
  116. u16 reg;
  117. dev_dbg(&aic26->spi->dev, "aic26_hw_params(substream=%p, params=%p)\n",
  118. substream, params);
  119. dev_dbg(&aic26->spi->dev, "rate=%i format=%i\n", params_rate(params),
  120. params_format(params));
  121. switch (params_rate(params)) {
  122. case 8000: fsref = 48000; divisor = AIC26_DIV_6; break;
  123. case 11025: fsref = 44100; divisor = AIC26_DIV_4; break;
  124. case 12000: fsref = 48000; divisor = AIC26_DIV_4; break;
  125. case 16000: fsref = 48000; divisor = AIC26_DIV_3; break;
  126. case 22050: fsref = 44100; divisor = AIC26_DIV_2; break;
  127. case 24000: fsref = 48000; divisor = AIC26_DIV_2; break;
  128. case 32000: fsref = 48000; divisor = AIC26_DIV_1_5; break;
  129. case 44100: fsref = 44100; divisor = AIC26_DIV_1; break;
  130. case 48000: fsref = 48000; divisor = AIC26_DIV_1; break;
  131. default:
  132. dev_dbg(&aic26->spi->dev, "bad rate\n"); return -EINVAL;
  133. }
  134. /* select data word length */
  135. switch (params_format(params)) {
  136. case SNDRV_PCM_FORMAT_S8: wlen = AIC26_WLEN_16; break;
  137. case SNDRV_PCM_FORMAT_S16_BE: wlen = AIC26_WLEN_16; break;
  138. case SNDRV_PCM_FORMAT_S24_BE: wlen = AIC26_WLEN_24; break;
  139. case SNDRV_PCM_FORMAT_S32_BE: wlen = AIC26_WLEN_32; break;
  140. default:
  141. dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
  142. }
  143. /**
  144. * Configure PLL
  145. * fsref = (mclk * PLLM) / 2048
  146. * where PLLM = J.DDDD (DDDD register ranges from 0 to 9999, decimal)
  147. */
  148. pval = 1;
  149. /* compute J portion of multiplier */
  150. jval = fsref / (aic26->mclk / 2048);
  151. /* compute fractional DDDD component of multiplier */
  152. dval = fsref - (jval * (aic26->mclk / 2048));
  153. dval = (10000 * dval) / (aic26->mclk / 2048);
  154. dev_dbg(&aic26->spi->dev, "Setting PLLM to %d.%04d\n", jval, dval);
  155. qval = 0;
  156. reg = 0x8000 | qval << 11 | pval << 8 | jval << 2;
  157. aic26_reg_write(codec, AIC26_REG_PLL_PROG1, reg);
  158. reg = dval << 2;
  159. aic26_reg_write(codec, AIC26_REG_PLL_PROG2, reg);
  160. /* Audio Control 3 (master mode, fsref rate) */
  161. reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL3);
  162. reg &= ~0xf800;
  163. if (aic26->master)
  164. reg |= 0x0800;
  165. if (fsref == 48000)
  166. reg |= 0x2000;
  167. aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);
  168. /* Audio Control 1 (FSref divisor) */
  169. reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL1);
  170. reg &= ~0x0fff;
  171. reg |= wlen | aic26->datfm | (divisor << 3) | divisor;
  172. aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL1, reg);
  173. return 0;
  174. }
  175. /**
  176. * aic26_mute - Mute control to reduce noise when changing audio format
  177. */
  178. static int aic26_mute(struct snd_soc_dai *dai, int mute)
  179. {
  180. struct snd_soc_codec *codec = dai->codec;
  181. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  182. u16 reg = aic26_reg_read_cache(codec, AIC26_REG_DAC_GAIN);
  183. dev_dbg(&aic26->spi->dev, "aic26_mute(dai=%p, mute=%i)\n",
  184. dai, mute);
  185. if (mute)
  186. reg |= 0x8080;
  187. else
  188. reg &= ~0x8080;
  189. aic26_reg_write(codec, AIC26_REG_DAC_GAIN, reg);
  190. return 0;
  191. }
  192. static int aic26_set_sysclk(struct snd_soc_dai *codec_dai,
  193. int clk_id, unsigned int freq, int dir)
  194. {
  195. struct snd_soc_codec *codec = codec_dai->codec;
  196. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  197. dev_dbg(&aic26->spi->dev, "aic26_set_sysclk(dai=%p, clk_id==%i,"
  198. " freq=%i, dir=%i)\n",
  199. codec_dai, clk_id, freq, dir);
  200. /* MCLK needs to fall between 2MHz and 50 MHz */
  201. if ((freq < 2000000) || (freq > 50000000))
  202. return -EINVAL;
  203. aic26->mclk = freq;
  204. return 0;
  205. }
  206. static int aic26_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
  207. {
  208. struct snd_soc_codec *codec = codec_dai->codec;
  209. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  210. dev_dbg(&aic26->spi->dev, "aic26_set_fmt(dai=%p, fmt==%i)\n",
  211. codec_dai, fmt);
  212. /* set master/slave audio interface */
  213. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  214. case SND_SOC_DAIFMT_CBM_CFM: aic26->master = 1; break;
  215. case SND_SOC_DAIFMT_CBS_CFS: aic26->master = 0; break;
  216. default:
  217. dev_dbg(&aic26->spi->dev, "bad master\n"); return -EINVAL;
  218. }
  219. /* interface format */
  220. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  221. case SND_SOC_DAIFMT_I2S: aic26->datfm = AIC26_DATFM_I2S; break;
  222. case SND_SOC_DAIFMT_DSP_A: aic26->datfm = AIC26_DATFM_DSP; break;
  223. case SND_SOC_DAIFMT_RIGHT_J: aic26->datfm = AIC26_DATFM_RIGHTJ; break;
  224. case SND_SOC_DAIFMT_LEFT_J: aic26->datfm = AIC26_DATFM_LEFTJ; break;
  225. default:
  226. dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
  227. }
  228. return 0;
  229. }
  230. /* ---------------------------------------------------------------------
  231. * Digital Audio Interface Definition
  232. */
  233. #define AIC26_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
  234. SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
  235. SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
  236. SNDRV_PCM_RATE_48000)
  237. #define AIC26_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |\
  238. SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE)
  239. static const struct snd_soc_dai_ops aic26_dai_ops = {
  240. .hw_params = aic26_hw_params,
  241. .digital_mute = aic26_mute,
  242. .set_sysclk = aic26_set_sysclk,
  243. .set_fmt = aic26_set_fmt,
  244. };
  245. static struct snd_soc_dai_driver aic26_dai = {
  246. .name = "tlv320aic26-hifi",
  247. .playback = {
  248. .stream_name = "Playback",
  249. .channels_min = 2,
  250. .channels_max = 2,
  251. .rates = AIC26_RATES,
  252. .formats = AIC26_FORMATS,
  253. },
  254. .capture = {
  255. .stream_name = "Capture",
  256. .channels_min = 2,
  257. .channels_max = 2,
  258. .rates = AIC26_RATES,
  259. .formats = AIC26_FORMATS,
  260. },
  261. .ops = &aic26_dai_ops,
  262. };
  263. /* ---------------------------------------------------------------------
  264. * ALSA controls
  265. */
  266. static const char *aic26_capture_src_text[] = {"Mic", "Aux"};
  267. static const struct soc_enum aic26_capture_src_enum =
  268. SOC_ENUM_SINGLE(AIC26_REG_AUDIO_CTRL1, 12, 2, aic26_capture_src_text);
  269. static const struct snd_kcontrol_new aic26_snd_controls[] = {
  270. /* Output */
  271. SOC_DOUBLE("PCM Playback Volume", AIC26_REG_DAC_GAIN, 8, 0, 0x7f, 1),
  272. SOC_DOUBLE("PCM Playback Switch", AIC26_REG_DAC_GAIN, 15, 7, 1, 1),
  273. SOC_SINGLE("PCM Capture Volume", AIC26_REG_ADC_GAIN, 8, 0x7f, 0),
  274. SOC_SINGLE("PCM Capture Mute", AIC26_REG_ADC_GAIN, 15, 1, 1),
  275. SOC_SINGLE("Keyclick activate", AIC26_REG_AUDIO_CTRL2, 15, 0x1, 0),
  276. SOC_SINGLE("Keyclick amplitude", AIC26_REG_AUDIO_CTRL2, 12, 0x7, 0),
  277. SOC_SINGLE("Keyclick frequency", AIC26_REG_AUDIO_CTRL2, 8, 0x7, 0),
  278. SOC_SINGLE("Keyclick period", AIC26_REG_AUDIO_CTRL2, 4, 0xf, 0),
  279. SOC_ENUM("Capture Source", aic26_capture_src_enum),
  280. };
  281. /* ---------------------------------------------------------------------
  282. * SPI device portion of driver: sysfs files for debugging
  283. */
  284. static ssize_t aic26_keyclick_show(struct device *dev,
  285. struct device_attribute *attr, char *buf)
  286. {
  287. struct aic26 *aic26 = dev_get_drvdata(dev);
  288. int val, amp, freq, len;
  289. val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
  290. amp = (val >> 12) & 0x7;
  291. freq = (125 << ((val >> 8) & 0x7)) >> 1;
  292. len = 2 * (1 + ((val >> 4) & 0xf));
  293. return sprintf(buf, "amp=%x freq=%iHz len=%iclks\n", amp, freq, len);
  294. }
  295. /* Any write to the keyclick attribute will trigger the keyclick event */
  296. static ssize_t aic26_keyclick_set(struct device *dev,
  297. struct device_attribute *attr,
  298. const char *buf, size_t count)
  299. {
  300. struct aic26 *aic26 = dev_get_drvdata(dev);
  301. int val;
  302. val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
  303. val |= 0x8000;
  304. aic26_reg_write(&aic26->codec, AIC26_REG_AUDIO_CTRL2, val);
  305. return count;
  306. }
  307. static DEVICE_ATTR(keyclick, 0644, aic26_keyclick_show, aic26_keyclick_set);
  308. /* ---------------------------------------------------------------------
  309. * SoC CODEC portion of driver: probe and release routines
  310. */
  311. static int aic26_probe(struct snd_soc_codec *codec)
  312. {
  313. int ret, err, i, reg;
  314. dev_info(codec->dev, "Probing AIC26 SoC CODEC driver\n");
  315. /* Reset the codec to power on defaults */
  316. aic26_reg_write(codec, AIC26_REG_RESET, 0xBB00);
  317. /* Power up CODEC */
  318. aic26_reg_write(codec, AIC26_REG_POWER_CTRL, 0);
  319. /* Audio Control 3 (master mode, fsref rate) */
  320. reg = aic26_reg_read(codec, AIC26_REG_AUDIO_CTRL3);
  321. reg &= ~0xf800;
  322. reg |= 0x0800; /* set master mode */
  323. aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);
  324. /* Fill register cache */
  325. for (i = 0; i < codec->driver->reg_cache_size; i++)
  326. aic26_reg_read(codec, i);
  327. /* Register the sysfs files for debugging */
  328. /* Create SysFS files */
  329. ret = device_create_file(codec->dev, &dev_attr_keyclick);
  330. if (ret)
  331. dev_info(codec->dev, "error creating sysfs files\n");
  332. /* register controls */
  333. dev_dbg(codec->dev, "Registering controls\n");
  334. err = snd_soc_add_codec_controls(codec, aic26_snd_controls,
  335. ARRAY_SIZE(aic26_snd_controls));
  336. WARN_ON(err < 0);
  337. return 0;
  338. }
  339. static struct snd_soc_codec_driver aic26_soc_codec_dev = {
  340. .probe = aic26_probe,
  341. .read = aic26_reg_read,
  342. .write = aic26_reg_write,
  343. .reg_cache_size = AIC26_NUM_REGS,
  344. .reg_word_size = sizeof(u16),
  345. };
  346. /* ---------------------------------------------------------------------
  347. * SPI device portion of driver: probe and release routines and SPI
  348. * driver registration.
  349. */
  350. static int aic26_spi_probe(struct spi_device *spi)
  351. {
  352. struct aic26 *aic26;
  353. int ret;
  354. dev_dbg(&spi->dev, "probing tlv320aic26 spi device\n");
  355. /* Allocate driver data */
  356. aic26 = devm_kzalloc(&spi->dev, sizeof *aic26, GFP_KERNEL);
  357. if (!aic26)
  358. return -ENOMEM;
  359. /* Initialize the driver data */
  360. aic26->spi = spi;
  361. dev_set_drvdata(&spi->dev, aic26);
  362. aic26->master = 1;
  363. ret = snd_soc_register_codec(&spi->dev,
  364. &aic26_soc_codec_dev, &aic26_dai, 1);
  365. return ret;
  366. }
  367. static int aic26_spi_remove(struct spi_device *spi)
  368. {
  369. snd_soc_unregister_codec(&spi->dev);
  370. return 0;
  371. }
  372. static struct spi_driver aic26_spi = {
  373. .driver = {
  374. .name = "tlv320aic26-codec",
  375. .owner = THIS_MODULE,
  376. },
  377. .probe = aic26_spi_probe,
  378. .remove = aic26_spi_remove,
  379. };
  380. static int __init aic26_init(void)
  381. {
  382. return spi_register_driver(&aic26_spi);
  383. }
  384. module_init(aic26_init);
  385. static void __exit aic26_exit(void)
  386. {
  387. spi_unregister_driver(&aic26_spi);
  388. }
  389. module_exit(aic26_exit);