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/drivers/acpi/pci_irq.c

https://gitlab.com/openbar/rpi-linux
C | 513 lines | 350 code | 66 blank | 97 comment | 61 complexity | 8eb56ce495fcb170dc6aa75a3469570c MD5 | raw file
  1. /*
  2. * pci_irq.c - ACPI PCI Interrupt Routing ($Revision: 11 $)
  3. *
  4. * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
  5. * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
  6. * Copyright (C) 2002 Dominik Brodowski <devel@brodo.de>
  7. * (c) Copyright 2008 Hewlett-Packard Development Company, L.P.
  8. * Bjorn Helgaas <bjorn.helgaas@hp.com>
  9. *
  10. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or (at
  15. * your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful, but
  18. * WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  20. * General Public License for more details.
  21. *
  22. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  23. */
  24. #include <linux/dmi.h>
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/init.h>
  28. #include <linux/types.h>
  29. #include <linux/spinlock.h>
  30. #include <linux/pm.h>
  31. #include <linux/pci.h>
  32. #include <linux/acpi.h>
  33. #include <linux/slab.h>
  34. #define PREFIX "ACPI: "
  35. #define _COMPONENT ACPI_PCI_COMPONENT
  36. ACPI_MODULE_NAME("pci_irq");
  37. struct acpi_prt_entry {
  38. struct acpi_pci_id id;
  39. u8 pin;
  40. acpi_handle link;
  41. u32 index; /* GSI, or link _CRS index */
  42. };
  43. static inline char pin_name(int pin)
  44. {
  45. return 'A' + pin - 1;
  46. }
  47. /* --------------------------------------------------------------------------
  48. PCI IRQ Routing Table (PRT) Support
  49. -------------------------------------------------------------------------- */
  50. /* http://bugzilla.kernel.org/show_bug.cgi?id=4773 */
  51. static const struct dmi_system_id medion_md9580[] = {
  52. {
  53. .ident = "Medion MD9580-F laptop",
  54. .matches = {
  55. DMI_MATCH(DMI_SYS_VENDOR, "MEDIONNB"),
  56. DMI_MATCH(DMI_PRODUCT_NAME, "A555"),
  57. },
  58. },
  59. { }
  60. };
  61. /* http://bugzilla.kernel.org/show_bug.cgi?id=5044 */
  62. static const struct dmi_system_id dell_optiplex[] = {
  63. {
  64. .ident = "Dell Optiplex GX1",
  65. .matches = {
  66. DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
  67. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex GX1 600S+"),
  68. },
  69. },
  70. { }
  71. };
  72. /* http://bugzilla.kernel.org/show_bug.cgi?id=10138 */
  73. static const struct dmi_system_id hp_t5710[] = {
  74. {
  75. .ident = "HP t5710",
  76. .matches = {
  77. DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
  78. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5000 series"),
  79. DMI_MATCH(DMI_BOARD_NAME, "098Ch"),
  80. },
  81. },
  82. { }
  83. };
  84. struct prt_quirk {
  85. const struct dmi_system_id *system;
  86. unsigned int segment;
  87. unsigned int bus;
  88. unsigned int device;
  89. unsigned char pin;
  90. const char *source; /* according to BIOS */
  91. const char *actual_source;
  92. };
  93. #define PCI_INTX_PIN(c) (c - 'A' + 1)
  94. /*
  95. * These systems have incorrect _PRT entries. The BIOS claims the PCI
  96. * interrupt at the listed segment/bus/device/pin is connected to the first
  97. * link device, but it is actually connected to the second.
  98. */
  99. static const struct prt_quirk prt_quirks[] = {
  100. { medion_md9580, 0, 0, 9, PCI_INTX_PIN('A'),
  101. "\\_SB_.PCI0.ISA_.LNKA",
  102. "\\_SB_.PCI0.ISA_.LNKB"},
  103. { dell_optiplex, 0, 0, 0xd, PCI_INTX_PIN('A'),
  104. "\\_SB_.LNKB",
  105. "\\_SB_.LNKA"},
  106. { hp_t5710, 0, 0, 1, PCI_INTX_PIN('A'),
  107. "\\_SB_.PCI0.LNK1",
  108. "\\_SB_.PCI0.LNK3"},
  109. };
  110. static void do_prt_fixups(struct acpi_prt_entry *entry,
  111. struct acpi_pci_routing_table *prt)
  112. {
  113. int i;
  114. const struct prt_quirk *quirk;
  115. for (i = 0; i < ARRAY_SIZE(prt_quirks); i++) {
  116. quirk = &prt_quirks[i];
  117. /* All current quirks involve link devices, not GSIs */
  118. if (!prt->source)
  119. continue;
  120. if (dmi_check_system(quirk->system) &&
  121. entry->id.segment == quirk->segment &&
  122. entry->id.bus == quirk->bus &&
  123. entry->id.device == quirk->device &&
  124. entry->pin == quirk->pin &&
  125. !strcmp(prt->source, quirk->source) &&
  126. strlen(prt->source) >= strlen(quirk->actual_source)) {
  127. printk(KERN_WARNING PREFIX "firmware reports "
  128. "%04x:%02x:%02x PCI INT %c connected to %s; "
  129. "changing to %s\n",
  130. entry->id.segment, entry->id.bus,
  131. entry->id.device, pin_name(entry->pin),
  132. prt->source, quirk->actual_source);
  133. strcpy(prt->source, quirk->actual_source);
  134. }
  135. }
  136. }
  137. static int acpi_pci_irq_check_entry(acpi_handle handle, struct pci_dev *dev,
  138. int pin, struct acpi_pci_routing_table *prt,
  139. struct acpi_prt_entry **entry_ptr)
  140. {
  141. int segment = pci_domain_nr(dev->bus);
  142. int bus = dev->bus->number;
  143. int device = pci_ari_enabled(dev->bus) ? 0 : PCI_SLOT(dev->devfn);
  144. struct acpi_prt_entry *entry;
  145. if (((prt->address >> 16) & 0xffff) != device ||
  146. prt->pin + 1 != pin)
  147. return -ENODEV;
  148. entry = kzalloc(sizeof(struct acpi_prt_entry), GFP_KERNEL);
  149. if (!entry)
  150. return -ENOMEM;
  151. /*
  152. * Note that the _PRT uses 0=INTA, 1=INTB, etc, while PCI uses
  153. * 1=INTA, 2=INTB. We use the PCI encoding throughout, so convert
  154. * it here.
  155. */
  156. entry->id.segment = segment;
  157. entry->id.bus = bus;
  158. entry->id.device = (prt->address >> 16) & 0xFFFF;
  159. entry->pin = prt->pin + 1;
  160. do_prt_fixups(entry, prt);
  161. entry->index = prt->source_index;
  162. /*
  163. * Type 1: Dynamic
  164. * ---------------
  165. * The 'source' field specifies the PCI interrupt link device used to
  166. * configure the IRQ assigned to this slot|dev|pin. The 'source_index'
  167. * indicates which resource descriptor in the resource template (of
  168. * the link device) this interrupt is allocated from.
  169. *
  170. * NOTE: Don't query the Link Device for IRQ information at this time
  171. * because Link Device enumeration may not have occurred yet
  172. * (e.g. exists somewhere 'below' this _PRT entry in the ACPI
  173. * namespace).
  174. */
  175. if (prt->source[0])
  176. acpi_get_handle(handle, prt->source, &entry->link);
  177. /*
  178. * Type 2: Static
  179. * --------------
  180. * The 'source' field is NULL, and the 'source_index' field specifies
  181. * the IRQ value, which is hardwired to specific interrupt inputs on
  182. * the interrupt controller.
  183. */
  184. ACPI_DEBUG_PRINT_RAW((ACPI_DB_INFO,
  185. " %04x:%02x:%02x[%c] -> %s[%d]\n",
  186. entry->id.segment, entry->id.bus,
  187. entry->id.device, pin_name(entry->pin),
  188. prt->source, entry->index));
  189. *entry_ptr = entry;
  190. return 0;
  191. }
  192. static int acpi_pci_irq_find_prt_entry(struct pci_dev *dev,
  193. int pin, struct acpi_prt_entry **entry_ptr)
  194. {
  195. acpi_status status;
  196. struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
  197. struct acpi_pci_routing_table *entry;
  198. acpi_handle handle = NULL;
  199. if (dev->bus->bridge)
  200. handle = ACPI_HANDLE(dev->bus->bridge);
  201. if (!handle)
  202. return -ENODEV;
  203. /* 'handle' is the _PRT's parent (root bridge or PCI-PCI bridge) */
  204. status = acpi_get_irq_routing_table(handle, &buffer);
  205. if (ACPI_FAILURE(status)) {
  206. kfree(buffer.pointer);
  207. return -ENODEV;
  208. }
  209. entry = buffer.pointer;
  210. while (entry && (entry->length > 0)) {
  211. if (!acpi_pci_irq_check_entry(handle, dev, pin,
  212. entry, entry_ptr))
  213. break;
  214. entry = (struct acpi_pci_routing_table *)
  215. ((unsigned long)entry + entry->length);
  216. }
  217. kfree(buffer.pointer);
  218. return 0;
  219. }
  220. /* --------------------------------------------------------------------------
  221. PCI Interrupt Routing Support
  222. -------------------------------------------------------------------------- */
  223. #ifdef CONFIG_X86_IO_APIC
  224. extern int noioapicquirk;
  225. extern int noioapicreroute;
  226. static int bridge_has_boot_interrupt_variant(struct pci_bus *bus)
  227. {
  228. struct pci_bus *bus_it;
  229. for (bus_it = bus ; bus_it ; bus_it = bus_it->parent) {
  230. if (!bus_it->self)
  231. return 0;
  232. if (bus_it->self->irq_reroute_variant)
  233. return bus_it->self->irq_reroute_variant;
  234. }
  235. return 0;
  236. }
  237. /*
  238. * Some chipsets (e.g. Intel 6700PXH) generate a legacy INTx when the IRQ
  239. * entry in the chipset's IO-APIC is masked (as, e.g. the RT kernel does
  240. * during interrupt handling). When this INTx generation cannot be disabled,
  241. * we reroute these interrupts to their legacy equivalent to get rid of
  242. * spurious interrupts.
  243. */
  244. static int acpi_reroute_boot_interrupt(struct pci_dev *dev,
  245. struct acpi_prt_entry *entry)
  246. {
  247. if (noioapicquirk || noioapicreroute) {
  248. return 0;
  249. } else {
  250. switch (bridge_has_boot_interrupt_variant(dev->bus)) {
  251. case 0:
  252. /* no rerouting necessary */
  253. return 0;
  254. case INTEL_IRQ_REROUTE_VARIANT:
  255. /*
  256. * Remap according to INTx routing table in 6700PXH
  257. * specs, intel order number 302628-002, section
  258. * 2.15.2. Other chipsets (80332, ...) have the same
  259. * mapping and are handled here as well.
  260. */
  261. dev_info(&dev->dev, "PCI IRQ %d -> rerouted to legacy "
  262. "IRQ %d\n", entry->index,
  263. (entry->index % 4) + 16);
  264. entry->index = (entry->index % 4) + 16;
  265. return 1;
  266. default:
  267. dev_warn(&dev->dev, "Cannot reroute IRQ %d to legacy "
  268. "IRQ: unknown mapping\n", entry->index);
  269. return -1;
  270. }
  271. }
  272. }
  273. #endif /* CONFIG_X86_IO_APIC */
  274. static struct acpi_prt_entry *acpi_pci_irq_lookup(struct pci_dev *dev, int pin)
  275. {
  276. struct acpi_prt_entry *entry = NULL;
  277. struct pci_dev *bridge;
  278. u8 bridge_pin, orig_pin = pin;
  279. int ret;
  280. ret = acpi_pci_irq_find_prt_entry(dev, pin, &entry);
  281. if (!ret && entry) {
  282. #ifdef CONFIG_X86_IO_APIC
  283. acpi_reroute_boot_interrupt(dev, entry);
  284. #endif /* CONFIG_X86_IO_APIC */
  285. ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %s[%c] _PRT entry\n",
  286. pci_name(dev), pin_name(pin)));
  287. return entry;
  288. }
  289. /*
  290. * Attempt to derive an IRQ for this device from a parent bridge's
  291. * PCI interrupt routing entry (eg. yenta bridge and add-in card bridge).
  292. */
  293. bridge = dev->bus->self;
  294. while (bridge) {
  295. pin = pci_swizzle_interrupt_pin(dev, pin);
  296. if ((bridge->class >> 8) == PCI_CLASS_BRIDGE_CARDBUS) {
  297. /* PC card has the same IRQ as its cardbridge */
  298. bridge_pin = bridge->pin;
  299. if (!bridge_pin) {
  300. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  301. "No interrupt pin configured for device %s\n",
  302. pci_name(bridge)));
  303. return NULL;
  304. }
  305. pin = bridge_pin;
  306. }
  307. ret = acpi_pci_irq_find_prt_entry(bridge, pin, &entry);
  308. if (!ret && entry) {
  309. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  310. "Derived GSI for %s INT %c from %s\n",
  311. pci_name(dev), pin_name(orig_pin),
  312. pci_name(bridge)));
  313. return entry;
  314. }
  315. dev = bridge;
  316. bridge = dev->bus->self;
  317. }
  318. dev_warn(&dev->dev, "can't derive routing for PCI INT %c\n",
  319. pin_name(orig_pin));
  320. return NULL;
  321. }
  322. #if IS_ENABLED(CONFIG_ISA) || IS_ENABLED(CONFIG_EISA)
  323. static int acpi_isa_register_gsi(struct pci_dev *dev)
  324. {
  325. u32 dev_gsi;
  326. /* Interrupt Line values above 0xF are forbidden */
  327. if (dev->irq > 0 && (dev->irq <= 0xF) &&
  328. acpi_isa_irq_available(dev->irq) &&
  329. (acpi_isa_irq_to_gsi(dev->irq, &dev_gsi) == 0)) {
  330. dev_warn(&dev->dev, "PCI INT %c: no GSI - using ISA IRQ %d\n",
  331. pin_name(dev->pin), dev->irq);
  332. acpi_register_gsi(&dev->dev, dev_gsi,
  333. ACPI_LEVEL_SENSITIVE,
  334. ACPI_ACTIVE_LOW);
  335. return 0;
  336. }
  337. return -EINVAL;
  338. }
  339. #else
  340. static inline int acpi_isa_register_gsi(struct pci_dev *dev)
  341. {
  342. return -ENODEV;
  343. }
  344. #endif
  345. int acpi_pci_irq_enable(struct pci_dev *dev)
  346. {
  347. struct acpi_prt_entry *entry;
  348. int gsi;
  349. u8 pin;
  350. int triggering = ACPI_LEVEL_SENSITIVE;
  351. int polarity = ACPI_ACTIVE_LOW;
  352. char *link = NULL;
  353. char link_desc[16];
  354. int rc;
  355. pin = dev->pin;
  356. if (!pin) {
  357. ACPI_DEBUG_PRINT((ACPI_DB_INFO,
  358. "No interrupt pin configured for device %s\n",
  359. pci_name(dev)));
  360. return 0;
  361. }
  362. if (dev->irq_managed && dev->irq > 0)
  363. return 0;
  364. entry = acpi_pci_irq_lookup(dev, pin);
  365. if (!entry) {
  366. /*
  367. * IDE legacy mode controller IRQs are magic. Why do compat
  368. * extensions always make such a nasty mess.
  369. */
  370. if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE &&
  371. (dev->class & 0x05) == 0)
  372. return 0;
  373. }
  374. if (entry) {
  375. if (entry->link)
  376. gsi = acpi_pci_link_allocate_irq(entry->link,
  377. entry->index,
  378. &triggering, &polarity,
  379. &link);
  380. else
  381. gsi = entry->index;
  382. } else
  383. gsi = -1;
  384. /*
  385. * No IRQ known to the ACPI subsystem - maybe the BIOS /
  386. * driver reported one, then use it. Exit in any case.
  387. */
  388. if (gsi < 0) {
  389. if (acpi_isa_register_gsi(dev))
  390. dev_warn(&dev->dev, "PCI INT %c: no GSI\n",
  391. pin_name(pin));
  392. kfree(entry);
  393. return 0;
  394. }
  395. rc = acpi_register_gsi(&dev->dev, gsi, triggering, polarity);
  396. if (rc < 0) {
  397. dev_warn(&dev->dev, "PCI INT %c: failed to register GSI\n",
  398. pin_name(pin));
  399. kfree(entry);
  400. return rc;
  401. }
  402. dev->irq = rc;
  403. dev->irq_managed = 1;
  404. if (link)
  405. snprintf(link_desc, sizeof(link_desc), " -> Link[%s]", link);
  406. else
  407. link_desc[0] = '\0';
  408. dev_dbg(&dev->dev, "PCI INT %c%s -> GSI %u (%s, %s) -> IRQ %d\n",
  409. pin_name(pin), link_desc, gsi,
  410. (triggering == ACPI_LEVEL_SENSITIVE) ? "level" : "edge",
  411. (polarity == ACPI_ACTIVE_LOW) ? "low" : "high", dev->irq);
  412. kfree(entry);
  413. return 0;
  414. }
  415. void acpi_pci_irq_disable(struct pci_dev *dev)
  416. {
  417. struct acpi_prt_entry *entry;
  418. int gsi;
  419. u8 pin;
  420. pin = dev->pin;
  421. if (!pin || !dev->irq_managed || dev->irq <= 0)
  422. return;
  423. /* Keep IOAPIC pin configuration when suspending */
  424. if (dev->dev.power.is_prepared)
  425. return;
  426. #ifdef CONFIG_PM
  427. if (dev->dev.power.runtime_status == RPM_SUSPENDING)
  428. return;
  429. #endif
  430. entry = acpi_pci_irq_lookup(dev, pin);
  431. if (!entry)
  432. return;
  433. if (entry->link)
  434. gsi = acpi_pci_link_free_irq(entry->link);
  435. else
  436. gsi = entry->index;
  437. kfree(entry);
  438. /*
  439. * TBD: It might be worth clearing dev->irq by magic constant
  440. * (e.g. PCI_UNDEFINED_IRQ).
  441. */
  442. dev_dbg(&dev->dev, "PCI INT %c disabled\n", pin_name(pin));
  443. if (gsi >= 0) {
  444. acpi_unregister_gsi(gsi);
  445. dev->irq_managed = 0;
  446. }
  447. }