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/hw/i386/xen/xen_platform.c

https://gitlab.com/paelzer/qemu
C | 519 lines | 385 code | 72 blank | 62 comment | 36 complexity | a59e882ffd768917ad140ef91c684faa MD5 | raw file
  1. /*
  2. * XEN platform pci device, formerly known as the event channel device
  3. *
  4. * Copyright (c) 2003-2004 Intel Corp.
  5. * Copyright (c) 2006 XenSource
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a copy
  8. * of this software and associated documentation files (the "Software"), to deal
  9. * in the Software without restriction, including without limitation the rights
  10. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11. * copies of the Software, and to permit persons to whom the Software is
  12. * furnished to do so, subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in
  15. * all copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23. * THE SOFTWARE.
  24. */
  25. #include "qemu/osdep.h"
  26. #include "qapi/error.h"
  27. #include "hw/ide.h"
  28. #include "hw/pci/pci.h"
  29. #include "hw/xen/xen_common.h"
  30. #include "migration/vmstate.h"
  31. #include "hw/xen/xen-legacy-backend.h"
  32. #include "trace.h"
  33. #include "sysemu/xen.h"
  34. #include "sysemu/block-backend.h"
  35. #include "qemu/error-report.h"
  36. #include "qemu/module.h"
  37. #include "qom/object.h"
  38. //#define DEBUG_PLATFORM
  39. #ifdef DEBUG_PLATFORM
  40. #define DPRINTF(fmt, ...) do { \
  41. fprintf(stderr, "xen_platform: " fmt, ## __VA_ARGS__); \
  42. } while (0)
  43. #else
  44. #define DPRINTF(fmt, ...) do { } while (0)
  45. #endif
  46. #define PFFLAG_ROM_LOCK 1 /* Sets whether ROM memory area is RW or RO */
  47. struct PCIXenPlatformState {
  48. /*< private >*/
  49. PCIDevice parent_obj;
  50. /*< public >*/
  51. MemoryRegion fixed_io;
  52. MemoryRegion bar;
  53. MemoryRegion mmio_bar;
  54. uint8_t flags; /* used only for version_id == 2 */
  55. uint16_t driver_product_version;
  56. /* Log from guest drivers */
  57. char log_buffer[4096];
  58. int log_buffer_off;
  59. };
  60. #define TYPE_XEN_PLATFORM "xen-platform"
  61. OBJECT_DECLARE_SIMPLE_TYPE(PCIXenPlatformState, XEN_PLATFORM)
  62. #define XEN_PLATFORM_IOPORT 0x10
  63. /* Send bytes to syslog */
  64. static void log_writeb(PCIXenPlatformState *s, char val)
  65. {
  66. if (val == '\n' || s->log_buffer_off == sizeof(s->log_buffer) - 1) {
  67. /* Flush buffer */
  68. s->log_buffer[s->log_buffer_off] = 0;
  69. trace_xen_platform_log(s->log_buffer);
  70. s->log_buffer_off = 0;
  71. } else {
  72. s->log_buffer[s->log_buffer_off++] = val;
  73. }
  74. }
  75. /*
  76. * Unplug device flags.
  77. *
  78. * The logic got a little confused at some point in the past but this is
  79. * what they do now.
  80. *
  81. * bit 0: Unplug all IDE and SCSI disks.
  82. * bit 1: Unplug all NICs.
  83. * bit 2: Unplug IDE disks except primary master. This is overridden if
  84. * bit 0 is also present in the mask.
  85. * bit 3: Unplug all NVMe disks.
  86. *
  87. */
  88. #define _UNPLUG_IDE_SCSI_DISKS 0
  89. #define UNPLUG_IDE_SCSI_DISKS (1u << _UNPLUG_IDE_SCSI_DISKS)
  90. #define _UNPLUG_ALL_NICS 1
  91. #define UNPLUG_ALL_NICS (1u << _UNPLUG_ALL_NICS)
  92. #define _UNPLUG_AUX_IDE_DISKS 2
  93. #define UNPLUG_AUX_IDE_DISKS (1u << _UNPLUG_AUX_IDE_DISKS)
  94. #define _UNPLUG_NVME_DISKS 3
  95. #define UNPLUG_NVME_DISKS (1u << _UNPLUG_NVME_DISKS)
  96. static void unplug_nic(PCIBus *b, PCIDevice *d, void *o)
  97. {
  98. /* We have to ignore passthrough devices */
  99. if (pci_get_word(d->config + PCI_CLASS_DEVICE) ==
  100. PCI_CLASS_NETWORK_ETHERNET
  101. && strcmp(d->name, "xen-pci-passthrough") != 0) {
  102. object_unparent(OBJECT(d));
  103. }
  104. }
  105. /* Remove the peer of the NIC device. Normally, this would be a tap device. */
  106. static void del_nic_peer(NICState *nic, void *opaque)
  107. {
  108. NetClientState *nc;
  109. nc = qemu_get_queue(nic);
  110. if (nc->peer)
  111. qemu_del_net_client(nc->peer);
  112. }
  113. static void pci_unplug_nics(PCIBus *bus)
  114. {
  115. qemu_foreach_nic(del_nic_peer, NULL);
  116. pci_for_each_device(bus, 0, unplug_nic, NULL);
  117. }
  118. static void unplug_disks(PCIBus *b, PCIDevice *d, void *opaque)
  119. {
  120. uint32_t flags = *(uint32_t *)opaque;
  121. bool aux = (flags & UNPLUG_AUX_IDE_DISKS) &&
  122. !(flags & UNPLUG_IDE_SCSI_DISKS);
  123. /* We have to ignore passthrough devices */
  124. if (!strcmp(d->name, "xen-pci-passthrough")) {
  125. return;
  126. }
  127. switch (pci_get_word(d->config + PCI_CLASS_DEVICE)) {
  128. case PCI_CLASS_STORAGE_IDE:
  129. pci_piix3_xen_ide_unplug(DEVICE(d), aux);
  130. break;
  131. case PCI_CLASS_STORAGE_SCSI:
  132. if (!aux) {
  133. object_unparent(OBJECT(d));
  134. }
  135. break;
  136. case PCI_CLASS_STORAGE_EXPRESS:
  137. if (flags & UNPLUG_NVME_DISKS) {
  138. object_unparent(OBJECT(d));
  139. }
  140. default:
  141. break;
  142. }
  143. }
  144. static void pci_unplug_disks(PCIBus *bus, uint32_t flags)
  145. {
  146. pci_for_each_device(bus, 0, unplug_disks, &flags);
  147. }
  148. static void platform_fixed_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
  149. {
  150. PCIXenPlatformState *s = opaque;
  151. switch (addr) {
  152. case 0: {
  153. PCIDevice *pci_dev = PCI_DEVICE(s);
  154. /* Unplug devices. See comment above flag definitions */
  155. if (val & (UNPLUG_IDE_SCSI_DISKS | UNPLUG_AUX_IDE_DISKS |
  156. UNPLUG_NVME_DISKS)) {
  157. DPRINTF("unplug disks\n");
  158. pci_unplug_disks(pci_get_bus(pci_dev), val);
  159. }
  160. if (val & UNPLUG_ALL_NICS) {
  161. DPRINTF("unplug nics\n");
  162. pci_unplug_nics(pci_get_bus(pci_dev));
  163. }
  164. break;
  165. }
  166. case 2:
  167. switch (val) {
  168. case 1:
  169. DPRINTF("Citrix Windows PV drivers loaded in guest\n");
  170. break;
  171. case 0:
  172. DPRINTF("Guest claimed to be running PV product 0?\n");
  173. break;
  174. default:
  175. DPRINTF("Unknown PV product %d loaded in guest\n", val);
  176. break;
  177. }
  178. s->driver_product_version = val;
  179. break;
  180. }
  181. }
  182. static void platform_fixed_ioport_writel(void *opaque, uint32_t addr,
  183. uint32_t val)
  184. {
  185. switch (addr) {
  186. case 0:
  187. /* PV driver version */
  188. break;
  189. }
  190. }
  191. static void platform_fixed_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
  192. {
  193. PCIXenPlatformState *s = opaque;
  194. switch (addr) {
  195. case 0: /* Platform flags */ {
  196. hvmmem_type_t mem_type = (val & PFFLAG_ROM_LOCK) ?
  197. HVMMEM_ram_ro : HVMMEM_ram_rw;
  198. if (xen_set_mem_type(xen_domid, mem_type, 0xc0, 0x40)) {
  199. DPRINTF("unable to change ro/rw state of ROM memory area!\n");
  200. } else {
  201. s->flags = val & PFFLAG_ROM_LOCK;
  202. DPRINTF("changed ro/rw state of ROM memory area. now is %s state.\n",
  203. (mem_type == HVMMEM_ram_ro ? "ro":"rw"));
  204. }
  205. break;
  206. }
  207. case 2:
  208. log_writeb(s, val);
  209. break;
  210. }
  211. }
  212. static uint32_t platform_fixed_ioport_readw(void *opaque, uint32_t addr)
  213. {
  214. switch (addr) {
  215. case 0:
  216. /* Magic value so that you can identify the interface. */
  217. return 0x49d2;
  218. default:
  219. return 0xffff;
  220. }
  221. }
  222. static uint32_t platform_fixed_ioport_readb(void *opaque, uint32_t addr)
  223. {
  224. PCIXenPlatformState *s = opaque;
  225. switch (addr) {
  226. case 0:
  227. /* Platform flags */
  228. return s->flags;
  229. case 2:
  230. /* Version number */
  231. return 1;
  232. default:
  233. return 0xff;
  234. }
  235. }
  236. static void platform_fixed_ioport_reset(void *opaque)
  237. {
  238. PCIXenPlatformState *s = opaque;
  239. platform_fixed_ioport_writeb(s, 0, 0);
  240. }
  241. static uint64_t platform_fixed_ioport_read(void *opaque,
  242. hwaddr addr,
  243. unsigned size)
  244. {
  245. switch (size) {
  246. case 1:
  247. return platform_fixed_ioport_readb(opaque, addr);
  248. case 2:
  249. return platform_fixed_ioport_readw(opaque, addr);
  250. default:
  251. return -1;
  252. }
  253. }
  254. static void platform_fixed_ioport_write(void *opaque, hwaddr addr,
  255. uint64_t val, unsigned size)
  256. {
  257. switch (size) {
  258. case 1:
  259. platform_fixed_ioport_writeb(opaque, addr, val);
  260. break;
  261. case 2:
  262. platform_fixed_ioport_writew(opaque, addr, val);
  263. break;
  264. case 4:
  265. platform_fixed_ioport_writel(opaque, addr, val);
  266. break;
  267. }
  268. }
  269. static const MemoryRegionOps platform_fixed_io_ops = {
  270. .read = platform_fixed_ioport_read,
  271. .write = platform_fixed_ioport_write,
  272. .valid = {
  273. .unaligned = true,
  274. },
  275. .impl = {
  276. .min_access_size = 1,
  277. .max_access_size = 4,
  278. .unaligned = true,
  279. },
  280. .endianness = DEVICE_LITTLE_ENDIAN,
  281. };
  282. static void platform_fixed_ioport_init(PCIXenPlatformState* s)
  283. {
  284. memory_region_init_io(&s->fixed_io, OBJECT(s), &platform_fixed_io_ops, s,
  285. "xen-fixed", 16);
  286. memory_region_add_subregion(get_system_io(), XEN_PLATFORM_IOPORT,
  287. &s->fixed_io);
  288. }
  289. /* Xen Platform PCI Device */
  290. static uint64_t xen_platform_ioport_readb(void *opaque, hwaddr addr,
  291. unsigned int size)
  292. {
  293. if (addr == 0) {
  294. return platform_fixed_ioport_readb(opaque, 0);
  295. } else {
  296. return ~0u;
  297. }
  298. }
  299. static void xen_platform_ioport_writeb(void *opaque, hwaddr addr,
  300. uint64_t val, unsigned int size)
  301. {
  302. PCIXenPlatformState *s = opaque;
  303. PCIDevice *pci_dev = PCI_DEVICE(s);
  304. switch (addr) {
  305. case 0: /* Platform flags */
  306. platform_fixed_ioport_writeb(opaque, 0, (uint32_t)val);
  307. break;
  308. case 4:
  309. if (val == 1) {
  310. /*
  311. * SUSE unplug for Xenlinux
  312. * xen-kmp used this since xen-3.0.4, instead the official protocol
  313. * from xen-3.3+ It did an unconditional "outl(1, (ioaddr + 4));"
  314. * Pre VMDP 1.7 used 4 and 8 depending on how VMDP was configured.
  315. * If VMDP was to control both disk and LAN it would use 4.
  316. * If it controlled just disk or just LAN, it would use 8 below.
  317. */
  318. pci_unplug_disks(pci_get_bus(pci_dev), UNPLUG_IDE_SCSI_DISKS);
  319. pci_unplug_nics(pci_get_bus(pci_dev));
  320. }
  321. break;
  322. case 8:
  323. switch (val) {
  324. case 1:
  325. pci_unplug_disks(pci_get_bus(pci_dev), UNPLUG_IDE_SCSI_DISKS);
  326. break;
  327. case 2:
  328. pci_unplug_nics(pci_get_bus(pci_dev));
  329. break;
  330. default:
  331. log_writeb(s, (uint32_t)val);
  332. break;
  333. }
  334. break;
  335. default:
  336. break;
  337. }
  338. }
  339. static const MemoryRegionOps xen_pci_io_ops = {
  340. .read = xen_platform_ioport_readb,
  341. .write = xen_platform_ioport_writeb,
  342. .impl.min_access_size = 1,
  343. .impl.max_access_size = 1,
  344. };
  345. static void platform_ioport_bar_setup(PCIXenPlatformState *d)
  346. {
  347. memory_region_init_io(&d->bar, OBJECT(d), &xen_pci_io_ops, d,
  348. "xen-pci", 0x100);
  349. }
  350. static uint64_t platform_mmio_read(void *opaque, hwaddr addr,
  351. unsigned size)
  352. {
  353. DPRINTF("Warning: attempted read from physical address "
  354. "0x" TARGET_FMT_plx " in xen platform mmio space\n", addr);
  355. return 0;
  356. }
  357. static void platform_mmio_write(void *opaque, hwaddr addr,
  358. uint64_t val, unsigned size)
  359. {
  360. DPRINTF("Warning: attempted write of 0x%"PRIx64" to physical "
  361. "address 0x" TARGET_FMT_plx " in xen platform mmio space\n",
  362. val, addr);
  363. }
  364. static const MemoryRegionOps platform_mmio_handler = {
  365. .read = &platform_mmio_read,
  366. .write = &platform_mmio_write,
  367. .endianness = DEVICE_NATIVE_ENDIAN,
  368. };
  369. static void platform_mmio_setup(PCIXenPlatformState *d)
  370. {
  371. memory_region_init_io(&d->mmio_bar, OBJECT(d), &platform_mmio_handler, d,
  372. "xen-mmio", 0x1000000);
  373. }
  374. static int xen_platform_post_load(void *opaque, int version_id)
  375. {
  376. PCIXenPlatformState *s = opaque;
  377. platform_fixed_ioport_writeb(s, 0, s->flags);
  378. return 0;
  379. }
  380. static const VMStateDescription vmstate_xen_platform = {
  381. .name = "platform",
  382. .version_id = 4,
  383. .minimum_version_id = 4,
  384. .post_load = xen_platform_post_load,
  385. .fields = (VMStateField[]) {
  386. VMSTATE_PCI_DEVICE(parent_obj, PCIXenPlatformState),
  387. VMSTATE_UINT8(flags, PCIXenPlatformState),
  388. VMSTATE_END_OF_LIST()
  389. }
  390. };
  391. static void xen_platform_realize(PCIDevice *dev, Error **errp)
  392. {
  393. PCIXenPlatformState *d = XEN_PLATFORM(dev);
  394. uint8_t *pci_conf;
  395. /* Device will crash on reset if xen is not initialized */
  396. if (!xen_enabled()) {
  397. error_setg(errp, "xen-platform device requires the Xen accelerator");
  398. return;
  399. }
  400. pci_conf = dev->config;
  401. pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
  402. pci_config_set_prog_interface(pci_conf, 0);
  403. pci_conf[PCI_INTERRUPT_PIN] = 1;
  404. platform_ioport_bar_setup(d);
  405. pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->bar);
  406. /* reserve 16MB mmio address for share memory*/
  407. platform_mmio_setup(d);
  408. pci_register_bar(dev, 1, PCI_BASE_ADDRESS_MEM_PREFETCH,
  409. &d->mmio_bar);
  410. platform_fixed_ioport_init(d);
  411. }
  412. static void platform_reset(DeviceState *dev)
  413. {
  414. PCIXenPlatformState *s = XEN_PLATFORM(dev);
  415. platform_fixed_ioport_reset(s);
  416. }
  417. static void xen_platform_class_init(ObjectClass *klass, void *data)
  418. {
  419. DeviceClass *dc = DEVICE_CLASS(klass);
  420. PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
  421. k->realize = xen_platform_realize;
  422. k->vendor_id = PCI_VENDOR_ID_XEN;
  423. k->device_id = PCI_DEVICE_ID_XEN_PLATFORM;
  424. k->class_id = PCI_CLASS_OTHERS << 8 | 0x80;
  425. k->subsystem_vendor_id = PCI_VENDOR_ID_XEN;
  426. k->subsystem_id = PCI_DEVICE_ID_XEN_PLATFORM;
  427. k->revision = 1;
  428. set_bit(DEVICE_CATEGORY_MISC, dc->categories);
  429. dc->desc = "XEN platform pci device";
  430. dc->reset = platform_reset;
  431. dc->vmsd = &vmstate_xen_platform;
  432. }
  433. static const TypeInfo xen_platform_info = {
  434. .name = TYPE_XEN_PLATFORM,
  435. .parent = TYPE_PCI_DEVICE,
  436. .instance_size = sizeof(PCIXenPlatformState),
  437. .class_init = xen_platform_class_init,
  438. .interfaces = (InterfaceInfo[]) {
  439. { INTERFACE_CONVENTIONAL_PCI_DEVICE },
  440. { },
  441. },
  442. };
  443. static void xen_platform_register_types(void)
  444. {
  445. type_register_static(&xen_platform_info);
  446. }
  447. type_init(xen_platform_register_types)