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/drivers/net/wireless/mediatek/mt76/mt7615/init.c

https://bitbucket.org/mirror/linux
C | 461 lines | 368 code | 75 blank | 18 comment | 23 complexity | 54c2ece30f1ef00eab3f28bb605b8eb9 MD5 | raw file
Possible License(s): LGPL-2.0, AGPL-1.0, GPL-2.0
  1. // SPDX-License-Identifier: ISC
  2. /* Copyright (C) 2019 MediaTek Inc.
  3. *
  4. * Author: Roy Luo <royluo@google.com>
  5. * Ryder Lee <ryder.lee@mediatek.com>
  6. * Felix Fietkau <nbd@nbd.name>
  7. * Lorenzo Bianconi <lorenzo@kernel.org>
  8. */
  9. #include <linux/etherdevice.h>
  10. #include "mt7615.h"
  11. #include "mac.h"
  12. #include "eeprom.h"
  13. void mt7615_phy_init(struct mt7615_dev *dev)
  14. {
  15. /* disable rf low power beacon mode */
  16. mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(0), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN);
  17. mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(1), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN);
  18. }
  19. EXPORT_SYMBOL_GPL(mt7615_phy_init);
  20. static void
  21. mt7615_init_mac_chain(struct mt7615_dev *dev, int chain)
  22. {
  23. u32 val;
  24. if (!chain)
  25. val = MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN;
  26. else
  27. val = MT_CFG_CCR_MAC_D1_1X_GC_EN | MT_CFG_CCR_MAC_D1_2X_GC_EN;
  28. /* enable band 0/1 clk */
  29. mt76_set(dev, MT_CFG_CCR, val);
  30. mt76_rmw(dev, MT_TMAC_TRCR(chain),
  31. MT_TMAC_TRCR_CCA_SEL | MT_TMAC_TRCR_SEC_CCA_SEL,
  32. FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) |
  33. FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0));
  34. mt76_wr(dev, MT_AGG_ACR(chain),
  35. MT_AGG_ACR_PKT_TIME_EN | MT_AGG_ACR_NO_BA_AR_RULE |
  36. FIELD_PREP(MT_AGG_ACR_CFEND_RATE, MT7615_CFEND_RATE_DEFAULT) |
  37. FIELD_PREP(MT_AGG_ACR_BAR_RATE, MT7615_BAR_RATE_DEFAULT));
  38. mt76_wr(dev, MT_AGG_ARUCR(chain),
  39. FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) |
  40. FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) |
  41. FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) |
  42. FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) |
  43. FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) |
  44. FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) |
  45. FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) |
  46. FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1));
  47. mt76_wr(dev, MT_AGG_ARDCR(chain),
  48. FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), MT7615_RATE_RETRY - 1) |
  49. FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), MT7615_RATE_RETRY - 1) |
  50. FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7615_RATE_RETRY - 1) |
  51. FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7615_RATE_RETRY - 1) |
  52. FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7615_RATE_RETRY - 1) |
  53. FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7615_RATE_RETRY - 1) |
  54. FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7615_RATE_RETRY - 1) |
  55. FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7615_RATE_RETRY - 1));
  56. mt76_clear(dev, MT_DMA_RCFR0(chain), MT_DMA_RCFR0_MCU_RX_TDLS);
  57. if (!mt7615_firmware_offload(dev)) {
  58. u32 mask, set;
  59. mask = MT_DMA_RCFR0_MCU_RX_MGMT |
  60. MT_DMA_RCFR0_MCU_RX_CTL_NON_BAR |
  61. MT_DMA_RCFR0_MCU_RX_CTL_BAR |
  62. MT_DMA_RCFR0_MCU_RX_BYPASS |
  63. MT_DMA_RCFR0_RX_DROPPED_UCAST |
  64. MT_DMA_RCFR0_RX_DROPPED_MCAST;
  65. set = FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_UCAST, 2) |
  66. FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_MCAST, 2);
  67. mt76_rmw(dev, MT_DMA_RCFR0(chain), mask, set);
  68. }
  69. }
  70. void mt7615_mac_init(struct mt7615_dev *dev)
  71. {
  72. int i;
  73. mt7615_init_mac_chain(dev, 0);
  74. mt76_rmw_field(dev, MT_TMAC_CTCR0,
  75. MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
  76. mt76_rmw_field(dev, MT_TMAC_CTCR0,
  77. MT_TMAC_CTCR0_INS_DDLMT_DENSITY, 0x3);
  78. mt76_rmw(dev, MT_TMAC_CTCR0,
  79. MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
  80. MT_TMAC_CTCR0_INS_DDLMT_EN,
  81. MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
  82. MT_TMAC_CTCR0_INS_DDLMT_EN);
  83. mt7615_mcu_set_rts_thresh(&dev->phy, 0x92b);
  84. mt7615_mac_set_scs(&dev->phy, true);
  85. mt76_rmw(dev, MT_AGG_SCR, MT_AGG_SCR_NLNAV_MID_PTEC_DIS,
  86. MT_AGG_SCR_NLNAV_MID_PTEC_DIS);
  87. mt76_wr(dev, MT_AGG_ARCR,
  88. FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) |
  89. MT_AGG_ARCR_RATE_DOWN_RATIO_EN |
  90. FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) |
  91. FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4));
  92. for (i = 0; i < MT7615_WTBL_SIZE; i++)
  93. mt7615_mac_wtbl_update(dev, i,
  94. MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
  95. mt76_set(dev, MT_WF_RMAC_MIB_TIME0, MT_WF_RMAC_MIB_RXTIME_EN);
  96. mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0, MT_WF_RMAC_MIB_RXTIME_EN);
  97. /* disable hdr translation and hw AMSDU */
  98. mt76_wr(dev, MT_DMA_DCR0,
  99. FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 3072) |
  100. MT_DMA_DCR0_RX_VEC_DROP);
  101. /* disable TDLS filtering */
  102. mt76_clear(dev, MT_WF_PFCR, MT_WF_PFCR_TDLS_EN);
  103. mt76_set(dev, MT_WF_MIB_SCR0, MT_MIB_SCR0_AGG_CNT_RANGE_EN);
  104. if (is_mt7663(&dev->mt76)) {
  105. mt76_wr(dev, MT_WF_AGG(0x160), 0x5c341c02);
  106. mt76_wr(dev, MT_WF_AGG(0x164), 0x70708040);
  107. } else {
  108. mt7615_init_mac_chain(dev, 1);
  109. }
  110. }
  111. EXPORT_SYMBOL_GPL(mt7615_mac_init);
  112. void mt7615_check_offload_capability(struct mt7615_dev *dev)
  113. {
  114. struct ieee80211_hw *hw = mt76_hw(dev);
  115. struct wiphy *wiphy = hw->wiphy;
  116. if (mt7615_firmware_offload(dev)) {
  117. ieee80211_hw_set(hw, SUPPORTS_PS);
  118. ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
  119. wiphy->max_remain_on_channel_duration = 5000;
  120. wiphy->features |= NL80211_FEATURE_SCHED_SCAN_RANDOM_MAC_ADDR |
  121. NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR |
  122. WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL |
  123. NL80211_FEATURE_P2P_GO_CTWIN |
  124. NL80211_FEATURE_P2P_GO_OPPPS;
  125. } else {
  126. dev->ops->hw_scan = NULL;
  127. dev->ops->cancel_hw_scan = NULL;
  128. dev->ops->sched_scan_start = NULL;
  129. dev->ops->sched_scan_stop = NULL;
  130. dev->ops->set_rekey_data = NULL;
  131. dev->ops->remain_on_channel = NULL;
  132. dev->ops->cancel_remain_on_channel = NULL;
  133. wiphy->max_sched_scan_plan_interval = 0;
  134. wiphy->max_sched_scan_ie_len = 0;
  135. wiphy->max_scan_ie_len = IEEE80211_MAX_DATA_LEN;
  136. wiphy->max_sched_scan_ssids = 0;
  137. wiphy->max_match_sets = 0;
  138. wiphy->max_sched_scan_reqs = 0;
  139. }
  140. }
  141. EXPORT_SYMBOL_GPL(mt7615_check_offload_capability);
  142. bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev)
  143. {
  144. flush_work(&dev->mcu_work);
  145. return test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
  146. }
  147. EXPORT_SYMBOL_GPL(mt7615_wait_for_mcu_init);
  148. #define CCK_RATE(_idx, _rate) { \
  149. .bitrate = _rate, \
  150. .flags = IEEE80211_RATE_SHORT_PREAMBLE, \
  151. .hw_value = (MT_PHY_TYPE_CCK << 8) | (_idx), \
  152. .hw_value_short = (MT_PHY_TYPE_CCK << 8) | (4 + (_idx)), \
  153. }
  154. #define OFDM_RATE(_idx, _rate) { \
  155. .bitrate = _rate, \
  156. .hw_value = (MT_PHY_TYPE_OFDM << 8) | (_idx), \
  157. .hw_value_short = (MT_PHY_TYPE_OFDM << 8) | (_idx), \
  158. }
  159. struct ieee80211_rate mt7615_rates[] = {
  160. CCK_RATE(0, 10),
  161. CCK_RATE(1, 20),
  162. CCK_RATE(2, 55),
  163. CCK_RATE(3, 110),
  164. OFDM_RATE(11, 60),
  165. OFDM_RATE(15, 90),
  166. OFDM_RATE(10, 120),
  167. OFDM_RATE(14, 180),
  168. OFDM_RATE(9, 240),
  169. OFDM_RATE(13, 360),
  170. OFDM_RATE(8, 480),
  171. OFDM_RATE(12, 540),
  172. };
  173. EXPORT_SYMBOL_GPL(mt7615_rates);
  174. static const struct ieee80211_iface_limit if_limits[] = {
  175. {
  176. .max = 1,
  177. .types = BIT(NL80211_IFTYPE_ADHOC)
  178. }, {
  179. .max = MT7615_MAX_INTERFACES,
  180. .types = BIT(NL80211_IFTYPE_AP) |
  181. #ifdef CONFIG_MAC80211_MESH
  182. BIT(NL80211_IFTYPE_MESH_POINT) |
  183. #endif
  184. BIT(NL80211_IFTYPE_P2P_CLIENT) |
  185. BIT(NL80211_IFTYPE_P2P_GO) |
  186. BIT(NL80211_IFTYPE_STATION)
  187. }
  188. };
  189. static const struct ieee80211_iface_combination if_comb[] = {
  190. {
  191. .limits = if_limits,
  192. .n_limits = ARRAY_SIZE(if_limits),
  193. .max_interfaces = 4,
  194. .num_different_channels = 1,
  195. .beacon_int_infra_match = true,
  196. }
  197. };
  198. void mt7615_init_txpower(struct mt7615_dev *dev,
  199. struct ieee80211_supported_band *sband)
  200. {
  201. int i, n_chains = hweight8(dev->mphy.antenna_mask), target_chains;
  202. int delta_idx, delta = mt76_tx_power_nss_delta(n_chains);
  203. u8 *eep = (u8 *)dev->mt76.eeprom.data;
  204. enum nl80211_band band = sband->band;
  205. u8 rate_val;
  206. delta_idx = mt7615_eeprom_get_power_delta_index(dev, band);
  207. rate_val = eep[delta_idx];
  208. if ((rate_val & ~MT_EE_RATE_POWER_MASK) ==
  209. (MT_EE_RATE_POWER_EN | MT_EE_RATE_POWER_SIGN))
  210. delta += rate_val & MT_EE_RATE_POWER_MASK;
  211. if (!is_mt7663(&dev->mt76) && mt7615_ext_pa_enabled(dev, band))
  212. target_chains = 1;
  213. else
  214. target_chains = n_chains;
  215. for (i = 0; i < sband->n_channels; i++) {
  216. struct ieee80211_channel *chan = &sband->channels[i];
  217. u8 target_power = 0;
  218. int j;
  219. for (j = 0; j < target_chains; j++) {
  220. int index;
  221. index = mt7615_eeprom_get_target_power_index(dev, chan, j);
  222. if (index < 0)
  223. continue;
  224. target_power = max(target_power, eep[index]);
  225. }
  226. target_power = DIV_ROUND_UP(target_power + delta, 2);
  227. chan->max_power = min_t(int, chan->max_reg_power,
  228. target_power);
  229. chan->orig_mpwr = target_power;
  230. }
  231. }
  232. EXPORT_SYMBOL_GPL(mt7615_init_txpower);
  233. static void
  234. mt7615_regd_notifier(struct wiphy *wiphy,
  235. struct regulatory_request *request)
  236. {
  237. struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
  238. struct mt7615_dev *dev = mt7615_hw_dev(hw);
  239. struct mt76_phy *mphy = hw->priv;
  240. struct mt7615_phy *phy = mphy->priv;
  241. struct cfg80211_chan_def *chandef = &mphy->chandef;
  242. dev->mt76.region = request->dfs_region;
  243. if (!(chandef->chan->flags & IEEE80211_CHAN_RADAR))
  244. return;
  245. mt7615_dfs_init_radar_detector(phy);
  246. }
  247. static void
  248. mt7615_init_wiphy(struct ieee80211_hw *hw)
  249. {
  250. struct mt7615_phy *phy = mt7615_hw_phy(hw);
  251. struct wiphy *wiphy = hw->wiphy;
  252. hw->queues = 4;
  253. hw->max_rates = 3;
  254. hw->max_report_rates = 7;
  255. hw->max_rate_tries = 11;
  256. phy->slottime = 9;
  257. hw->sta_data_size = sizeof(struct mt7615_sta);
  258. hw->vif_data_size = sizeof(struct mt7615_vif);
  259. wiphy->iface_combinations = if_comb;
  260. wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
  261. wiphy->reg_notifier = mt7615_regd_notifier;
  262. wiphy->max_sched_scan_plan_interval = MT7615_MAX_SCHED_SCAN_INTERVAL;
  263. wiphy->max_sched_scan_ie_len = IEEE80211_MAX_DATA_LEN;
  264. wiphy->max_scan_ie_len = MT7615_SCAN_IE_LEN;
  265. wiphy->max_sched_scan_ssids = MT7615_MAX_SCHED_SCAN_SSID;
  266. wiphy->max_match_sets = MT7615_MAX_SCAN_MATCH;
  267. wiphy->max_sched_scan_reqs = 1;
  268. wiphy->max_scan_ssids = 4;
  269. wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);
  270. wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
  271. ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
  272. ieee80211_hw_set(hw, TX_STATUS_NO_AMPDU_LEN);
  273. if (is_mt7615(&phy->dev->mt76))
  274. hw->max_tx_fragments = MT_TXP_MAX_BUF_NUM;
  275. else
  276. hw->max_tx_fragments = MT_HW_TXP_MAX_BUF_NUM;
  277. }
  278. static void
  279. mt7615_cap_dbdc_enable(struct mt7615_dev *dev)
  280. {
  281. dev->mphy.sband_5g.sband.vht_cap.cap &=
  282. ~(IEEE80211_VHT_CAP_SHORT_GI_160 |
  283. IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ);
  284. if (dev->chainmask == 0xf)
  285. dev->mphy.antenna_mask = dev->chainmask >> 2;
  286. else
  287. dev->mphy.antenna_mask = dev->chainmask >> 1;
  288. dev->phy.chainmask = dev->mphy.antenna_mask;
  289. dev->mphy.hw->wiphy->available_antennas_rx = dev->phy.chainmask;
  290. dev->mphy.hw->wiphy->available_antennas_tx = dev->phy.chainmask;
  291. mt76_set_stream_caps(&dev->mphy, true);
  292. }
  293. static void
  294. mt7615_cap_dbdc_disable(struct mt7615_dev *dev)
  295. {
  296. dev->mphy.sband_5g.sband.vht_cap.cap |=
  297. IEEE80211_VHT_CAP_SHORT_GI_160 |
  298. IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ;
  299. dev->mphy.antenna_mask = dev->chainmask;
  300. dev->phy.chainmask = dev->chainmask;
  301. dev->mphy.hw->wiphy->available_antennas_rx = dev->chainmask;
  302. dev->mphy.hw->wiphy->available_antennas_tx = dev->chainmask;
  303. mt76_set_stream_caps(&dev->mphy, true);
  304. }
  305. int mt7615_register_ext_phy(struct mt7615_dev *dev)
  306. {
  307. struct mt7615_phy *phy = mt7615_ext_phy(dev);
  308. struct mt76_phy *mphy;
  309. int ret;
  310. if (!is_mt7615(&dev->mt76))
  311. return -EOPNOTSUPP;
  312. if (test_bit(MT76_STATE_RUNNING, &dev->mphy.state))
  313. return -EINVAL;
  314. if (phy)
  315. return 0;
  316. mt7615_cap_dbdc_enable(dev);
  317. mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7615_ops);
  318. if (!mphy)
  319. return -ENOMEM;
  320. phy = mphy->priv;
  321. phy->dev = dev;
  322. phy->mt76 = mphy;
  323. phy->chainmask = dev->chainmask & ~dev->phy.chainmask;
  324. mphy->antenna_mask = BIT(hweight8(phy->chainmask)) - 1;
  325. mt7615_init_wiphy(mphy->hw);
  326. INIT_DELAYED_WORK(&phy->mac_work, mt7615_mac_work);
  327. INIT_DELAYED_WORK(&phy->scan_work, mt7615_scan_work);
  328. skb_queue_head_init(&phy->scan_event_list);
  329. INIT_WORK(&phy->roc_work, mt7615_roc_work);
  330. timer_setup(&phy->roc_timer, mt7615_roc_timer, 0);
  331. init_waitqueue_head(&phy->roc_wait);
  332. mt7615_mac_set_scs(phy, true);
  333. /*
  334. * Make the secondary PHY MAC address local without overlapping with
  335. * the usual MAC address allocation scheme on multiple virtual interfaces
  336. */
  337. mphy->hw->wiphy->perm_addr[0] |= 2;
  338. mphy->hw->wiphy->perm_addr[0] ^= BIT(7);
  339. /* second phy can only handle 5 GHz */
  340. mphy->sband_2g.sband.n_channels = 0;
  341. mphy->hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL;
  342. /* The second interface does not get any packets unless it has a vif */
  343. ieee80211_hw_set(mphy->hw, WANT_MONITOR_VIF);
  344. ret = mt76_register_phy(mphy);
  345. if (ret)
  346. ieee80211_free_hw(mphy->hw);
  347. return ret;
  348. }
  349. EXPORT_SYMBOL_GPL(mt7615_register_ext_phy);
  350. void mt7615_unregister_ext_phy(struct mt7615_dev *dev)
  351. {
  352. struct mt7615_phy *phy = mt7615_ext_phy(dev);
  353. struct mt76_phy *mphy = dev->mt76.phy2;
  354. if (!phy)
  355. return;
  356. mt7615_cap_dbdc_disable(dev);
  357. mt76_unregister_phy(mphy);
  358. ieee80211_free_hw(mphy->hw);
  359. }
  360. EXPORT_SYMBOL_GPL(mt7615_unregister_ext_phy);
  361. void mt7615_init_device(struct mt7615_dev *dev)
  362. {
  363. struct ieee80211_hw *hw = mt76_hw(dev);
  364. dev->phy.dev = dev;
  365. dev->phy.mt76 = &dev->mt76.phy;
  366. dev->mt76.phy.priv = &dev->phy;
  367. INIT_DELAYED_WORK(&dev->phy.mac_work, mt7615_mac_work);
  368. INIT_DELAYED_WORK(&dev->phy.scan_work, mt7615_scan_work);
  369. skb_queue_head_init(&dev->phy.scan_event_list);
  370. INIT_LIST_HEAD(&dev->sta_poll_list);
  371. spin_lock_init(&dev->sta_poll_lock);
  372. init_waitqueue_head(&dev->reset_wait);
  373. init_waitqueue_head(&dev->phy.roc_wait);
  374. INIT_WORK(&dev->reset_work, mt7615_mac_reset_work);
  375. INIT_WORK(&dev->phy.roc_work, mt7615_roc_work);
  376. timer_setup(&dev->phy.roc_timer, mt7615_roc_timer, 0);
  377. mt7615_init_wiphy(hw);
  378. dev->mphy.sband_2g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
  379. dev->mphy.sband_5g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING;
  380. dev->mphy.sband_5g.sband.vht_cap.cap |=
  381. IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
  382. IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
  383. mt7615_cap_dbdc_disable(dev);
  384. dev->phy.dfs_state = -1;
  385. }
  386. EXPORT_SYMBOL_GPL(mt7615_init_device);