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/linux-2.6.26/arch/sparc64/kernel/setup.c

https://bitbucket.org/ayufan/caster
C | 428 lines | 336 code | 63 blank | 29 comment | 52 complexity | 189233fcf889c1a6b30529c9b377ade3 MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
  1. /*
  2. * linux/arch/sparc64/kernel/setup.c
  3. *
  4. * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu)
  5. * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
  6. */
  7. #include <linux/errno.h>
  8. #include <linux/sched.h>
  9. #include <linux/kernel.h>
  10. #include <linux/mm.h>
  11. #include <linux/stddef.h>
  12. #include <linux/unistd.h>
  13. #include <linux/ptrace.h>
  14. #include <linux/slab.h>
  15. #include <asm/smp.h>
  16. #include <linux/user.h>
  17. #include <linux/screen_info.h>
  18. #include <linux/delay.h>
  19. #include <linux/fs.h>
  20. #include <linux/seq_file.h>
  21. #include <linux/syscalls.h>
  22. #include <linux/kdev_t.h>
  23. #include <linux/major.h>
  24. #include <linux/string.h>
  25. #include <linux/init.h>
  26. #include <linux/inet.h>
  27. #include <linux/console.h>
  28. #include <linux/root_dev.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/cpu.h>
  31. #include <linux/initrd.h>
  32. #include <asm/system.h>
  33. #include <asm/io.h>
  34. #include <asm/processor.h>
  35. #include <asm/oplib.h>
  36. #include <asm/page.h>
  37. #include <asm/pgtable.h>
  38. #include <asm/idprom.h>
  39. #include <asm/head.h>
  40. #include <asm/starfire.h>
  41. #include <asm/mmu_context.h>
  42. #include <asm/timer.h>
  43. #include <asm/sections.h>
  44. #include <asm/setup.h>
  45. #include <asm/mmu.h>
  46. #include <asm/ns87303.h>
  47. #ifdef CONFIG_IP_PNP
  48. #include <net/ipconfig.h>
  49. #endif
  50. #include "entry.h"
  51. /* Used to synchronize accesses to NatSemi SUPER I/O chip configure
  52. * operations in asm/ns87303.h
  53. */
  54. DEFINE_SPINLOCK(ns87303_lock);
  55. struct screen_info screen_info = {
  56. 0, 0, /* orig-x, orig-y */
  57. 0, /* unused */
  58. 0, /* orig-video-page */
  59. 0, /* orig-video-mode */
  60. 128, /* orig-video-cols */
  61. 0, 0, 0, /* unused, ega_bx, unused */
  62. 54, /* orig-video-lines */
  63. 0, /* orig-video-isVGA */
  64. 16 /* orig-video-points */
  65. };
  66. static void
  67. prom_console_write(struct console *con, const char *s, unsigned n)
  68. {
  69. prom_write(s, n);
  70. }
  71. /* Exported for mm/init.c:paging_init. */
  72. unsigned long cmdline_memory_size = 0;
  73. static struct console prom_early_console = {
  74. .name = "earlyprom",
  75. .write = prom_console_write,
  76. .flags = CON_PRINTBUFFER | CON_BOOT | CON_ANYTIME,
  77. .index = -1,
  78. };
  79. /*
  80. * Process kernel command line switches that are specific to the
  81. * SPARC or that require special low-level processing.
  82. */
  83. static void __init process_switch(char c)
  84. {
  85. switch (c) {
  86. case 'd':
  87. case 's':
  88. break;
  89. case 'h':
  90. prom_printf("boot_flags_init: Halt!\n");
  91. prom_halt();
  92. break;
  93. case 'p':
  94. /* Just ignore, this behavior is now the default. */
  95. break;
  96. case 'P':
  97. /* Force UltraSPARC-III P-Cache on. */
  98. if (tlb_type != cheetah) {
  99. printk("BOOT: Ignoring P-Cache force option.\n");
  100. break;
  101. }
  102. cheetah_pcache_forced_on = 1;
  103. add_taint(TAINT_MACHINE_CHECK);
  104. cheetah_enable_pcache();
  105. break;
  106. default:
  107. printk("Unknown boot switch (-%c)\n", c);
  108. break;
  109. }
  110. }
  111. static void __init boot_flags_init(char *commands)
  112. {
  113. while (*commands) {
  114. /* Move to the start of the next "argument". */
  115. while (*commands && *commands == ' ')
  116. commands++;
  117. /* Process any command switches, otherwise skip it. */
  118. if (*commands == '\0')
  119. break;
  120. if (*commands == '-') {
  121. commands++;
  122. while (*commands && *commands != ' ')
  123. process_switch(*commands++);
  124. continue;
  125. }
  126. if (!strncmp(commands, "mem=", 4)) {
  127. /*
  128. * "mem=XXX[kKmM]" overrides the PROM-reported
  129. * memory size.
  130. */
  131. cmdline_memory_size = simple_strtoul(commands + 4,
  132. &commands, 0);
  133. if (*commands == 'K' || *commands == 'k') {
  134. cmdline_memory_size <<= 10;
  135. commands++;
  136. } else if (*commands=='M' || *commands=='m') {
  137. cmdline_memory_size <<= 20;
  138. commands++;
  139. }
  140. }
  141. while (*commands && *commands != ' ')
  142. commands++;
  143. }
  144. }
  145. extern unsigned short root_flags;
  146. extern unsigned short root_dev;
  147. extern unsigned short ram_flags;
  148. #define RAMDISK_IMAGE_START_MASK 0x07FF
  149. #define RAMDISK_PROMPT_FLAG 0x8000
  150. #define RAMDISK_LOAD_FLAG 0x4000
  151. extern int root_mountflags;
  152. char reboot_command[COMMAND_LINE_SIZE];
  153. static struct pt_regs fake_swapper_regs = { { 0, }, 0, 0, 0, 0 };
  154. void __init per_cpu_patch(void)
  155. {
  156. struct cpuid_patch_entry *p;
  157. unsigned long ver;
  158. int is_jbus;
  159. if (tlb_type == spitfire && !this_is_starfire)
  160. return;
  161. is_jbus = 0;
  162. if (tlb_type != hypervisor) {
  163. __asm__ ("rdpr %%ver, %0" : "=r" (ver));
  164. is_jbus = ((ver >> 32UL) == __JALAPENO_ID ||
  165. (ver >> 32UL) == __SERRANO_ID);
  166. }
  167. p = &__cpuid_patch;
  168. while (p < &__cpuid_patch_end) {
  169. unsigned long addr = p->addr;
  170. unsigned int *insns;
  171. switch (tlb_type) {
  172. case spitfire:
  173. insns = &p->starfire[0];
  174. break;
  175. case cheetah:
  176. case cheetah_plus:
  177. if (is_jbus)
  178. insns = &p->cheetah_jbus[0];
  179. else
  180. insns = &p->cheetah_safari[0];
  181. break;
  182. case hypervisor:
  183. insns = &p->sun4v[0];
  184. break;
  185. default:
  186. prom_printf("Unknown cpu type, halting.\n");
  187. prom_halt();
  188. };
  189. *(unsigned int *) (addr + 0) = insns[0];
  190. wmb();
  191. __asm__ __volatile__("flush %0" : : "r" (addr + 0));
  192. *(unsigned int *) (addr + 4) = insns[1];
  193. wmb();
  194. __asm__ __volatile__("flush %0" : : "r" (addr + 4));
  195. *(unsigned int *) (addr + 8) = insns[2];
  196. wmb();
  197. __asm__ __volatile__("flush %0" : : "r" (addr + 8));
  198. *(unsigned int *) (addr + 12) = insns[3];
  199. wmb();
  200. __asm__ __volatile__("flush %0" : : "r" (addr + 12));
  201. p++;
  202. }
  203. }
  204. void __init sun4v_patch(void)
  205. {
  206. extern void sun4v_hvapi_init(void);
  207. struct sun4v_1insn_patch_entry *p1;
  208. struct sun4v_2insn_patch_entry *p2;
  209. if (tlb_type != hypervisor)
  210. return;
  211. p1 = &__sun4v_1insn_patch;
  212. while (p1 < &__sun4v_1insn_patch_end) {
  213. unsigned long addr = p1->addr;
  214. *(unsigned int *) (addr + 0) = p1->insn;
  215. wmb();
  216. __asm__ __volatile__("flush %0" : : "r" (addr + 0));
  217. p1++;
  218. }
  219. p2 = &__sun4v_2insn_patch;
  220. while (p2 < &__sun4v_2insn_patch_end) {
  221. unsigned long addr = p2->addr;
  222. *(unsigned int *) (addr + 0) = p2->insns[0];
  223. wmb();
  224. __asm__ __volatile__("flush %0" : : "r" (addr + 0));
  225. *(unsigned int *) (addr + 4) = p2->insns[1];
  226. wmb();
  227. __asm__ __volatile__("flush %0" : : "r" (addr + 4));
  228. p2++;
  229. }
  230. sun4v_hvapi_init();
  231. }
  232. #ifdef CONFIG_SMP
  233. void __init boot_cpu_id_too_large(int cpu)
  234. {
  235. prom_printf("Serious problem, boot cpu id (%d) >= NR_CPUS (%d)\n",
  236. cpu, NR_CPUS);
  237. prom_halt();
  238. }
  239. #endif
  240. void __init setup_arch(char **cmdline_p)
  241. {
  242. /* Initialize PROM console and command line. */
  243. *cmdline_p = prom_getbootargs();
  244. strcpy(boot_command_line, *cmdline_p);
  245. parse_early_param();
  246. boot_flags_init(*cmdline_p);
  247. register_console(&prom_early_console);
  248. if (tlb_type == hypervisor)
  249. printk("ARCH: SUN4V\n");
  250. else
  251. printk("ARCH: SUN4U\n");
  252. #ifdef CONFIG_DUMMY_CONSOLE
  253. conswitchp = &dummy_con;
  254. #elif defined(CONFIG_PROM_CONSOLE)
  255. conswitchp = &prom_con;
  256. #endif
  257. idprom_init();
  258. if (!root_flags)
  259. root_mountflags &= ~MS_RDONLY;
  260. ROOT_DEV = old_decode_dev(root_dev);
  261. #ifdef CONFIG_BLK_DEV_RAM
  262. rd_image_start = ram_flags & RAMDISK_IMAGE_START_MASK;
  263. rd_prompt = ((ram_flags & RAMDISK_PROMPT_FLAG) != 0);
  264. rd_doload = ((ram_flags & RAMDISK_LOAD_FLAG) != 0);
  265. #endif
  266. task_thread_info(&init_task)->kregs = &fake_swapper_regs;
  267. #ifdef CONFIG_IP_PNP
  268. if (!ic_set_manually) {
  269. int chosen = prom_finddevice ("/chosen");
  270. u32 cl, sv, gw;
  271. cl = prom_getintdefault (chosen, "client-ip", 0);
  272. sv = prom_getintdefault (chosen, "server-ip", 0);
  273. gw = prom_getintdefault (chosen, "gateway-ip", 0);
  274. if (cl && sv) {
  275. ic_myaddr = cl;
  276. ic_servaddr = sv;
  277. if (gw)
  278. ic_gateway = gw;
  279. #if defined(CONFIG_IP_PNP_BOOTP) || defined(CONFIG_IP_PNP_RARP)
  280. ic_proto_enabled = 0;
  281. #endif
  282. }
  283. }
  284. #endif
  285. /* Get boot processor trap_block[] setup. */
  286. init_cur_cpu_trap(current_thread_info());
  287. paging_init();
  288. }
  289. /* BUFFER is PAGE_SIZE bytes long. */
  290. extern void smp_info(struct seq_file *);
  291. extern void smp_bogo(struct seq_file *);
  292. extern void mmu_info(struct seq_file *);
  293. unsigned int dcache_parity_tl1_occurred;
  294. unsigned int icache_parity_tl1_occurred;
  295. int ncpus_probed;
  296. static int show_cpuinfo(struct seq_file *m, void *__unused)
  297. {
  298. seq_printf(m,
  299. "cpu\t\t: %s\n"
  300. "fpu\t\t: %s\n"
  301. "prom\t\t: %s\n"
  302. "type\t\t: %s\n"
  303. "ncpus probed\t: %d\n"
  304. "ncpus active\t: %d\n"
  305. "D$ parity tl1\t: %u\n"
  306. "I$ parity tl1\t: %u\n"
  307. #ifndef CONFIG_SMP
  308. "Cpu0ClkTck\t: %016lx\n"
  309. #endif
  310. ,
  311. sparc_cpu_type,
  312. sparc_fpu_type,
  313. prom_version,
  314. ((tlb_type == hypervisor) ?
  315. "sun4v" :
  316. "sun4u"),
  317. ncpus_probed,
  318. num_online_cpus(),
  319. dcache_parity_tl1_occurred,
  320. icache_parity_tl1_occurred
  321. #ifndef CONFIG_SMP
  322. , cpu_data(0).clock_tick
  323. #endif
  324. );
  325. #ifdef CONFIG_SMP
  326. smp_bogo(m);
  327. #endif
  328. mmu_info(m);
  329. #ifdef CONFIG_SMP
  330. smp_info(m);
  331. #endif
  332. return 0;
  333. }
  334. static void *c_start(struct seq_file *m, loff_t *pos)
  335. {
  336. /* The pointer we are returning is arbitrary,
  337. * it just has to be non-NULL and not IS_ERR
  338. * in the success case.
  339. */
  340. return *pos == 0 ? &c_start : NULL;
  341. }
  342. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  343. {
  344. ++*pos;
  345. return c_start(m, pos);
  346. }
  347. static void c_stop(struct seq_file *m, void *v)
  348. {
  349. }
  350. const struct seq_operations cpuinfo_op = {
  351. .start =c_start,
  352. .next = c_next,
  353. .stop = c_stop,
  354. .show = show_cpuinfo,
  355. };
  356. extern int stop_a_enabled;
  357. void sun_do_break(void)
  358. {
  359. if (!stop_a_enabled)
  360. return;
  361. prom_printf("\n");
  362. flush_user_windows();
  363. prom_cmdline();
  364. }
  365. int stop_a_enabled = 1;