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/drivers/i2c/soft_i2c.c

https://github.com/openlinux/u-boot_for_ok2440
C | 428 lines | 265 code | 43 blank | 120 comment | 18 complexity | 16c53f79497c1019732dea62b46d4dfa MD5 | raw file
  1/*
  2 * (C) Copyright 2001, 2002
  3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4 *
  5 * See file CREDITS for list of people who contributed to this
  6 * project.
  7 *
  8 * This program is free software; you can redistribute it and/or
  9 * modify it under the terms of the GNU General Public License as
 10 * published by the Free Software Foundation; either version 2 of
 11 * the License, or (at your option) any later version.
 12 *
 13 * This program is distributed in the hope that it will be useful,
 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 16 * GNU General Public License for more details.
 17 *
 18 * You should have received a copy of the GNU General Public License
 19 * along with this program; if not, write to the Free Software
 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 21 * MA 02111-1307 USA
 22 *
 23 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
 24 * vanbaren@cideas.com.  It was heavily influenced by LiMon, written by
 25 * Neil Russell.
 26 */
 27
 28#include <common.h>
 29#ifdef	CONFIG_MPC8260			/* only valid for MPC8260 */
 30#include <ioports.h>
 31#include <asm/io.h>
 32#endif
 33#ifdef	CONFIG_AT91RM9200		/* need this for the at91rm9200 */
 34#include <asm/io.h>
 35#include <asm/arch/hardware.h>
 36#endif
 37#ifdef	CONFIG_IXP425			/* only valid for IXP425 */
 38#include <asm/arch/ixp425.h>
 39#endif
 40#ifdef CONFIG_LPC2292
 41#include <asm/arch/hardware.h>
 42#endif
 43#if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866)
 44#include <asm/io.h>
 45#endif
 46#include <i2c.h>
 47
 48/* #define	DEBUG_I2C	*/
 49
 50#ifdef DEBUG_I2C
 51DECLARE_GLOBAL_DATA_PTR;
 52#endif
 53
 54/*-----------------------------------------------------------------------
 55 * Definitions
 56 */
 57
 58#define RETRIES		0
 59
 60#define I2C_ACK		0		/* PD_SDA level to ack a byte */
 61#define I2C_NOACK	1		/* PD_SDA level to noack a byte */
 62
 63
 64#ifdef DEBUG_I2C
 65#define PRINTD(fmt,args...)	do {	\
 66	if (gd->have_console)		\
 67		printf (fmt ,##args);	\
 68	} while (0)
 69#else
 70#define PRINTD(fmt,args...)
 71#endif
 72
 73#if defined(CONFIG_I2C_MULTI_BUS)
 74static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0;
 75#endif /* CONFIG_I2C_MULTI_BUS */
 76
 77/*-----------------------------------------------------------------------
 78 * Local functions
 79 */
 80#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
 81static void  send_reset	(void);
 82#endif
 83static void  send_start	(void);
 84static void  send_stop	(void);
 85static void  send_ack	(int);
 86static int   write_byte	(uchar byte);
 87static uchar read_byte	(int);
 88
 89#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
 90/*-----------------------------------------------------------------------
 91 * Send a reset sequence consisting of 9 clocks with the data signal high
 92 * to clock any confused device back into an idle state.  Also send a
 93 * <stop> at the end of the sequence for belts & suspenders.
 94 */
 95static void send_reset(void)
 96{
 97	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
 98	int j;
 99
100	I2C_SCL(1);
101	I2C_SDA(1);
102#ifdef	I2C_INIT
103	I2C_INIT;
104#endif
105	I2C_TRISTATE;
106	for(j = 0; j < 9; j++) {
107		I2C_SCL(0);
108		I2C_DELAY;
109		I2C_DELAY;
110		I2C_SCL(1);
111		I2C_DELAY;
112		I2C_DELAY;
113	}
114	send_stop();
115	I2C_TRISTATE;
116}
117#endif
118
119/*-----------------------------------------------------------------------
120 * START: High -> Low on SDA while SCL is High
121 */
122static void send_start(void)
123{
124	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
125
126	I2C_DELAY;
127	I2C_SDA(1);
128	I2C_ACTIVE;
129	I2C_DELAY;
130	I2C_SCL(1);
131	I2C_DELAY;
132	I2C_SDA(0);
133	I2C_DELAY;
134}
135
136/*-----------------------------------------------------------------------
137 * STOP: Low -> High on SDA while SCL is High
138 */
139static void send_stop(void)
140{
141	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
142
143	I2C_SCL(0);
144	I2C_DELAY;
145	I2C_SDA(0);
146	I2C_ACTIVE;
147	I2C_DELAY;
148	I2C_SCL(1);
149	I2C_DELAY;
150	I2C_SDA(1);
151	I2C_DELAY;
152	I2C_TRISTATE;
153}
154
155/*-----------------------------------------------------------------------
156 * ack should be I2C_ACK or I2C_NOACK
157 */
158static void send_ack(int ack)
159{
160	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
161
162	I2C_SCL(0);
163	I2C_DELAY;
164	I2C_ACTIVE;
165	I2C_SDA(ack);
166	I2C_DELAY;
167	I2C_SCL(1);
168	I2C_DELAY;
169	I2C_DELAY;
170	I2C_SCL(0);
171	I2C_DELAY;
172}
173
174/*-----------------------------------------------------------------------
175 * Send 8 bits and look for an acknowledgement.
176 */
177static int write_byte(uchar data)
178{
179	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
180	int j;
181	int nack;
182
183	I2C_ACTIVE;
184	for(j = 0; j < 8; j++) {
185		I2C_SCL(0);
186		I2C_DELAY;
187		I2C_SDA(data & 0x80);
188		I2C_DELAY;
189		I2C_SCL(1);
190		I2C_DELAY;
191		I2C_DELAY;
192
193		data <<= 1;
194	}
195
196	/*
197	 * Look for an <ACK>(negative logic) and return it.
198	 */
199	I2C_SCL(0);
200	I2C_DELAY;
201	I2C_SDA(1);
202	I2C_TRISTATE;
203	I2C_DELAY;
204	I2C_SCL(1);
205	I2C_DELAY;
206	I2C_DELAY;
207	nack = I2C_READ;
208	I2C_SCL(0);
209	I2C_DELAY;
210	I2C_ACTIVE;
211
212	return(nack);	/* not a nack is an ack */
213}
214
215#if defined(CONFIG_I2C_MULTI_BUS)
216/*
217 * Functions for multiple I2C bus handling
218 */
219unsigned int i2c_get_bus_num(void)
220{
221	return i2c_bus_num;
222}
223
224int i2c_set_bus_num(unsigned int bus)
225{
226#if defined(CONFIG_I2C_MUX)
227	if (bus < CONFIG_SYS_MAX_I2C_BUS) {
228		i2c_bus_num = bus;
229	} else {
230		int	ret;
231
232		ret = i2x_mux_select_mux(bus);
233		if (ret == 0)
234			i2c_bus_num = bus;
235		else
236			return ret;
237	}
238#else
239	if (bus >= CONFIG_SYS_MAX_I2C_BUS)
240		return -1;
241	i2c_bus_num = bus;
242#endif
243	return 0;
244}
245#endif
246
247/*-----------------------------------------------------------------------
248 * if ack == I2C_ACK, ACK the byte so can continue reading, else
249 * send I2C_NOACK to end the read.
250 */
251static uchar read_byte(int ack)
252{
253	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
254	int  data;
255	int  j;
256
257	/*
258	 * Read 8 bits, MSB first.
259	 */
260	I2C_TRISTATE;
261	I2C_SDA(1);
262	data = 0;
263	for(j = 0; j < 8; j++) {
264		I2C_SCL(0);
265		I2C_DELAY;
266		I2C_SCL(1);
267		I2C_DELAY;
268		data <<= 1;
269		data |= I2C_READ;
270		I2C_DELAY;
271	}
272	send_ack(ack);
273
274	return(data);
275}
276
277/*=====================================================================*/
278/*                         Public Functions                            */
279/*=====================================================================*/
280
281/*-----------------------------------------------------------------------
282 * Initialization
283 */
284void i2c_init (int speed, int slaveaddr)
285{
286#if defined(CONFIG_SYS_I2C_INIT_BOARD)
287	/* call board specific i2c bus reset routine before accessing the   */
288	/* environment, which might be in a chip on that bus. For details   */
289	/* about this problem see doc/I2C_Edge_Conditions.                  */
290	i2c_init_board();
291#else
292	/*
293	 * WARNING: Do NOT save speed in a static variable: if the
294	 * I2C routines are called before RAM is initialized (to read
295	 * the DIMM SPD, for instance), RAM won't be usable and your
296	 * system will crash.
297	 */
298	send_reset ();
299#endif
300}
301
302/*-----------------------------------------------------------------------
303 * Probe to see if a chip is present.  Also good for checking for the
304 * completion of EEPROM writes since the chip stops responding until
305 * the write completes (typically 10mSec).
306 */
307int i2c_probe(uchar addr)
308{
309	int rc;
310
311	/*
312	 * perform 1 byte write transaction with just address byte
313	 * (fake write)
314	 */
315	send_start();
316	rc = write_byte ((addr << 1) | 0);
317	send_stop();
318
319	return (rc ? 1 : 0);
320}
321
322/*-----------------------------------------------------------------------
323 * Read bytes
324 */
325int  i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
326{
327	int shift;
328	PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
329		chip, addr, alen, buffer, len);
330
331#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
332	/*
333	 * EEPROM chips that implement "address overflow" are ones
334	 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
335	 * address and the extra bits end up in the "chip address"
336	 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
337	 * four 256 byte chips.
338	 *
339	 * Note that we consider the length of the address field to
340	 * still be one byte because the extra address bits are
341	 * hidden in the chip address.
342	 */
343	chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
344
345	PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
346		chip, addr);
347#endif
348
349	/*
350	 * Do the addressing portion of a write cycle to set the
351	 * chip's address pointer.  If the address length is zero,
352	 * don't do the normal write cycle to set the address pointer,
353	 * there is no address pointer in this chip.
354	 */
355	send_start();
356	if(alen > 0) {
357		if(write_byte(chip << 1)) {	/* write cycle */
358			send_stop();
359			PRINTD("i2c_read, no chip responded %02X\n", chip);
360			return(1);
361		}
362		shift = (alen-1) * 8;
363		while(alen-- > 0) {
364			if(write_byte(addr >> shift)) {
365				PRINTD("i2c_read, address not <ACK>ed\n");
366				return(1);
367			}
368			shift -= 8;
369		}
370
371		/* Some I2C chips need a stop/start sequence here,
372		 * other chips don't work with a full stop and need
373		 * only a start.  Default behaviour is to send the
374		 * stop/start sequence.
375		 */
376#ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
377		send_start();
378#else
379		send_stop();
380		send_start();
381#endif
382	}
383	/*
384	 * Send the chip address again, this time for a read cycle.
385	 * Then read the data.  On the last byte, we do a NACK instead
386	 * of an ACK(len == 0) to terminate the read.
387	 */
388	write_byte((chip << 1) | 1);	/* read cycle */
389	while(len-- > 0) {
390		*buffer++ = read_byte(len == 0);
391	}
392	send_stop();
393	return(0);
394}
395
396/*-----------------------------------------------------------------------
397 * Write bytes
398 */
399int  i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
400{
401	int shift, failures = 0;
402
403	PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
404		chip, addr, alen, buffer, len);
405
406	send_start();
407	if(write_byte(chip << 1)) {	/* write cycle */
408		send_stop();
409		PRINTD("i2c_write, no chip responded %02X\n", chip);
410		return(1);
411	}
412	shift = (alen-1) * 8;
413	while(alen-- > 0) {
414		if(write_byte(addr >> shift)) {
415			PRINTD("i2c_write, address not <ACK>ed\n");
416			return(1);
417		}
418		shift -= 8;
419	}
420
421	while(len-- > 0) {
422		if(write_byte(*buffer++)) {
423			failures++;
424		}
425	}
426	send_stop();
427	return(failures);
428}