PageRenderTime 72ms CodeModel.GetById 30ms RepoModel.GetById 1ms app.codeStats 0ms

/arch/arm64/include/asm/processor.h

https://github.com/anarsoul/linux-2.6
C Header | 315 lines | 210 code | 51 blank | 54 comment | 8 complexity | 4a5d51156fa1eeb538ecfad1920bfdaf MD5 | raw file
  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Based on arch/arm/include/asm/processor.h
  4. *
  5. * Copyright (C) 1995-1999 Russell King
  6. * Copyright (C) 2012 ARM Ltd.
  7. */
  8. #ifndef __ASM_PROCESSOR_H
  9. #define __ASM_PROCESSOR_H
  10. #define KERNEL_DS UL(-1)
  11. #define USER_DS ((UL(1) << MAX_USER_VA_BITS) - 1)
  12. /*
  13. * On arm64 systems, unaligned accesses by the CPU are cheap, and so there is
  14. * no point in shifting all network buffers by 2 bytes just to make some IP
  15. * header fields appear aligned in memory, potentially sacrificing some DMA
  16. * performance on some platforms.
  17. */
  18. #define NET_IP_ALIGN 0
  19. #ifndef __ASSEMBLY__
  20. #ifdef __KERNEL__
  21. #include <linux/build_bug.h>
  22. #include <linux/cache.h>
  23. #include <linux/init.h>
  24. #include <linux/stddef.h>
  25. #include <linux/string.h>
  26. #include <asm/alternative.h>
  27. #include <asm/cpufeature.h>
  28. #include <asm/hw_breakpoint.h>
  29. #include <asm/lse.h>
  30. #include <asm/pgtable-hwdef.h>
  31. #include <asm/pointer_auth.h>
  32. #include <asm/ptrace.h>
  33. #include <asm/types.h>
  34. /*
  35. * TASK_SIZE - the maximum size of a user space task.
  36. * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area.
  37. */
  38. #define DEFAULT_MAP_WINDOW_64 (UL(1) << VA_BITS)
  39. #define TASK_SIZE_64 (UL(1) << vabits_user)
  40. #ifdef CONFIG_COMPAT
  41. #if defined(CONFIG_ARM64_64K_PAGES) && defined(CONFIG_KUSER_HELPERS)
  42. /*
  43. * With CONFIG_ARM64_64K_PAGES enabled, the last page is occupied
  44. * by the compat vectors page.
  45. */
  46. #define TASK_SIZE_32 UL(0x100000000)
  47. #else
  48. #define TASK_SIZE_32 (UL(0x100000000) - PAGE_SIZE)
  49. #endif /* CONFIG_ARM64_64K_PAGES */
  50. #define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \
  51. TASK_SIZE_32 : TASK_SIZE_64)
  52. #define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \
  53. TASK_SIZE_32 : TASK_SIZE_64)
  54. #define DEFAULT_MAP_WINDOW (test_thread_flag(TIF_32BIT) ? \
  55. TASK_SIZE_32 : DEFAULT_MAP_WINDOW_64)
  56. #else
  57. #define TASK_SIZE TASK_SIZE_64
  58. #define DEFAULT_MAP_WINDOW DEFAULT_MAP_WINDOW_64
  59. #endif /* CONFIG_COMPAT */
  60. #ifdef CONFIG_ARM64_FORCE_52BIT
  61. #define STACK_TOP_MAX TASK_SIZE_64
  62. #define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 4))
  63. #else
  64. #define STACK_TOP_MAX DEFAULT_MAP_WINDOW_64
  65. #define TASK_UNMAPPED_BASE (PAGE_ALIGN(DEFAULT_MAP_WINDOW / 4))
  66. #endif /* CONFIG_ARM64_FORCE_52BIT */
  67. #ifdef CONFIG_COMPAT
  68. #define AARCH32_VECTORS_BASE 0xffff0000
  69. #define STACK_TOP (test_thread_flag(TIF_32BIT) ? \
  70. AARCH32_VECTORS_BASE : STACK_TOP_MAX)
  71. #else
  72. #define STACK_TOP STACK_TOP_MAX
  73. #endif /* CONFIG_COMPAT */
  74. #ifndef CONFIG_ARM64_FORCE_52BIT
  75. #define arch_get_mmap_end(addr) ((addr > DEFAULT_MAP_WINDOW) ? TASK_SIZE :\
  76. DEFAULT_MAP_WINDOW)
  77. #define arch_get_mmap_base(addr, base) ((addr > DEFAULT_MAP_WINDOW) ? \
  78. base + TASK_SIZE - DEFAULT_MAP_WINDOW :\
  79. base)
  80. #endif /* CONFIG_ARM64_FORCE_52BIT */
  81. extern phys_addr_t arm64_dma_phys_limit;
  82. #define ARCH_LOW_ADDRESS_LIMIT (arm64_dma_phys_limit - 1)
  83. struct debug_info {
  84. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  85. /* Have we suspended stepping by a debugger? */
  86. int suspended_step;
  87. /* Allow breakpoints and watchpoints to be disabled for this thread. */
  88. int bps_disabled;
  89. int wps_disabled;
  90. /* Hardware breakpoints pinned to this task. */
  91. struct perf_event *hbp_break[ARM_MAX_BRP];
  92. struct perf_event *hbp_watch[ARM_MAX_WRP];
  93. #endif
  94. };
  95. struct cpu_context {
  96. unsigned long x19;
  97. unsigned long x20;
  98. unsigned long x21;
  99. unsigned long x22;
  100. unsigned long x23;
  101. unsigned long x24;
  102. unsigned long x25;
  103. unsigned long x26;
  104. unsigned long x27;
  105. unsigned long x28;
  106. unsigned long fp;
  107. unsigned long sp;
  108. unsigned long pc;
  109. };
  110. struct thread_struct {
  111. struct cpu_context cpu_context; /* cpu context */
  112. /*
  113. * Whitelisted fields for hardened usercopy:
  114. * Maintainers must ensure manually that this contains no
  115. * implicit padding.
  116. */
  117. struct {
  118. unsigned long tp_value; /* TLS register */
  119. unsigned long tp2_value;
  120. struct user_fpsimd_state fpsimd_state;
  121. } uw;
  122. unsigned int fpsimd_cpu;
  123. void *sve_state; /* SVE registers, if any */
  124. unsigned int sve_vl; /* SVE vector length */
  125. unsigned int sve_vl_onexec; /* SVE vl after next exec */
  126. unsigned long fault_address; /* fault info */
  127. unsigned long fault_code; /* ESR_EL1 value */
  128. struct debug_info debug; /* debugging */
  129. #ifdef CONFIG_ARM64_PTR_AUTH
  130. struct ptrauth_keys keys_user;
  131. #endif
  132. };
  133. static inline void arch_thread_struct_whitelist(unsigned long *offset,
  134. unsigned long *size)
  135. {
  136. /* Verify that there is no padding among the whitelisted fields: */
  137. BUILD_BUG_ON(sizeof_field(struct thread_struct, uw) !=
  138. sizeof_field(struct thread_struct, uw.tp_value) +
  139. sizeof_field(struct thread_struct, uw.tp2_value) +
  140. sizeof_field(struct thread_struct, uw.fpsimd_state));
  141. *offset = offsetof(struct thread_struct, uw);
  142. *size = sizeof_field(struct thread_struct, uw);
  143. }
  144. #ifdef CONFIG_COMPAT
  145. #define task_user_tls(t) \
  146. ({ \
  147. unsigned long *__tls; \
  148. if (is_compat_thread(task_thread_info(t))) \
  149. __tls = &(t)->thread.uw.tp2_value; \
  150. else \
  151. __tls = &(t)->thread.uw.tp_value; \
  152. __tls; \
  153. })
  154. #else
  155. #define task_user_tls(t) (&(t)->thread.uw.tp_value)
  156. #endif
  157. /* Sync TPIDR_EL0 back to thread_struct for current */
  158. void tls_preserve_current_state(void);
  159. #define INIT_THREAD { \
  160. .fpsimd_cpu = NR_CPUS, \
  161. }
  162. static inline void start_thread_common(struct pt_regs *regs, unsigned long pc)
  163. {
  164. memset(regs, 0, sizeof(*regs));
  165. forget_syscall(regs);
  166. regs->pc = pc;
  167. if (system_uses_irq_prio_masking())
  168. regs->pmr_save = GIC_PRIO_IRQON;
  169. }
  170. static inline void start_thread(struct pt_regs *regs, unsigned long pc,
  171. unsigned long sp)
  172. {
  173. start_thread_common(regs, pc);
  174. regs->pstate = PSR_MODE_EL0t;
  175. if (arm64_get_ssbd_state() != ARM64_SSBD_FORCE_ENABLE)
  176. regs->pstate |= PSR_SSBS_BIT;
  177. regs->sp = sp;
  178. }
  179. #ifdef CONFIG_COMPAT
  180. static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc,
  181. unsigned long sp)
  182. {
  183. start_thread_common(regs, pc);
  184. regs->pstate = PSR_AA32_MODE_USR;
  185. if (pc & 1)
  186. regs->pstate |= PSR_AA32_T_BIT;
  187. #ifdef __AARCH64EB__
  188. regs->pstate |= PSR_AA32_E_BIT;
  189. #endif
  190. if (arm64_get_ssbd_state() != ARM64_SSBD_FORCE_ENABLE)
  191. regs->pstate |= PSR_AA32_SSBS_BIT;
  192. regs->compat_sp = sp;
  193. }
  194. #endif
  195. /* Forward declaration, a strange C thing */
  196. struct task_struct;
  197. /* Free all resources held by a thread. */
  198. extern void release_thread(struct task_struct *);
  199. unsigned long get_wchan(struct task_struct *p);
  200. static inline void cpu_relax(void)
  201. {
  202. asm volatile("yield" ::: "memory");
  203. }
  204. /* Thread switching */
  205. extern struct task_struct *cpu_switch_to(struct task_struct *prev,
  206. struct task_struct *next);
  207. #define task_pt_regs(p) \
  208. ((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1)
  209. #define KSTK_EIP(tsk) ((unsigned long)task_pt_regs(tsk)->pc)
  210. #define KSTK_ESP(tsk) user_stack_pointer(task_pt_regs(tsk))
  211. /*
  212. * Prefetching support
  213. */
  214. #define ARCH_HAS_PREFETCH
  215. static inline void prefetch(const void *ptr)
  216. {
  217. asm volatile("prfm pldl1keep, %a0\n" : : "p" (ptr));
  218. }
  219. #define ARCH_HAS_PREFETCHW
  220. static inline void prefetchw(const void *ptr)
  221. {
  222. asm volatile("prfm pstl1keep, %a0\n" : : "p" (ptr));
  223. }
  224. #define ARCH_HAS_SPINLOCK_PREFETCH
  225. static inline void spin_lock_prefetch(const void *ptr)
  226. {
  227. asm volatile(ARM64_LSE_ATOMIC_INSN(
  228. "prfm pstl1strm, %a0",
  229. "nop") : : "p" (ptr));
  230. }
  231. #define HAVE_ARCH_PICK_MMAP_LAYOUT
  232. #endif
  233. extern unsigned long __ro_after_init signal_minsigstksz; /* sigframe size */
  234. extern void __init minsigstksz_setup(void);
  235. /*
  236. * Not at the top of the file due to a direct #include cycle between
  237. * <asm/fpsimd.h> and <asm/processor.h>. Deferring this #include
  238. * ensures that contents of processor.h are visible to fpsimd.h even if
  239. * processor.h is included first.
  240. *
  241. * These prctl helpers are the only things in this file that require
  242. * fpsimd.h. The core code expects them to be in this header.
  243. */
  244. #include <asm/fpsimd.h>
  245. /* Userspace interface for PR_SVE_{SET,GET}_VL prctl()s: */
  246. #define SVE_SET_VL(arg) sve_set_current_vl(arg)
  247. #define SVE_GET_VL() sve_get_current_vl()
  248. /* PR_PAC_RESET_KEYS prctl */
  249. #define PAC_RESET_KEYS(tsk, arg) ptrauth_prctl_reset_keys(tsk, arg)
  250. /*
  251. * For CONFIG_GCC_PLUGIN_STACKLEAK
  252. *
  253. * These need to be macros because otherwise we get stuck in a nightmare
  254. * of header definitions for the use of task_stack_page.
  255. */
  256. #define current_top_of_stack() \
  257. ({ \
  258. struct stack_info _info; \
  259. BUG_ON(!on_accessible_stack(current, current_stack_pointer, &_info)); \
  260. _info.high; \
  261. })
  262. #define on_thread_stack() (on_task_stack(current, current_stack_pointer, NULL))
  263. #endif /* __ASSEMBLY__ */
  264. #endif /* __ASM_PROCESSOR_H */