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/drivers/net/ethernet/sfc/ef100_tx.c

https://github.com/penberg/linux
C | 408 lines | 299 code | 54 blank | 55 comment | 45 complexity | 7a9795964faeb0e8fc09057911729319 MD5 | raw file
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /****************************************************************************
  3. * Driver for Solarflare network controllers and boards
  4. * Copyright 2018 Solarflare Communications Inc.
  5. * Copyright 2019-2020 Xilinx Inc.
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published
  9. * by the Free Software Foundation, incorporated herein by reference.
  10. */
  11. #include <net/ip6_checksum.h>
  12. #include "net_driver.h"
  13. #include "tx_common.h"
  14. #include "nic_common.h"
  15. #include "mcdi_functions.h"
  16. #include "ef100_regs.h"
  17. #include "io.h"
  18. #include "ef100_tx.h"
  19. #include "ef100_nic.h"
  20. int ef100_tx_probe(struct efx_tx_queue *tx_queue)
  21. {
  22. /* Allocate an extra descriptor for the QMDA status completion entry */
  23. return efx_nic_alloc_buffer(tx_queue->efx, &tx_queue->txd.buf,
  24. (tx_queue->ptr_mask + 2) *
  25. sizeof(efx_oword_t),
  26. GFP_KERNEL);
  27. return 0;
  28. }
  29. void ef100_tx_init(struct efx_tx_queue *tx_queue)
  30. {
  31. /* must be the inverse of lookup in efx_get_tx_channel */
  32. tx_queue->core_txq =
  33. netdev_get_tx_queue(tx_queue->efx->net_dev,
  34. tx_queue->channel->channel -
  35. tx_queue->efx->tx_channel_offset);
  36. if (efx_mcdi_tx_init(tx_queue, false))
  37. netdev_WARN(tx_queue->efx->net_dev,
  38. "failed to initialise TXQ %d\n", tx_queue->queue);
  39. }
  40. static bool ef100_tx_can_tso(struct efx_tx_queue *tx_queue, struct sk_buff *skb)
  41. {
  42. struct efx_nic *efx = tx_queue->efx;
  43. struct ef100_nic_data *nic_data;
  44. struct efx_tx_buffer *buffer;
  45. struct tcphdr *tcphdr;
  46. struct iphdr *iphdr;
  47. size_t header_len;
  48. u32 mss;
  49. nic_data = efx->nic_data;
  50. if (!skb_is_gso_tcp(skb))
  51. return false;
  52. if (!(efx->net_dev->features & NETIF_F_TSO))
  53. return false;
  54. mss = skb_shinfo(skb)->gso_size;
  55. if (unlikely(mss < 4)) {
  56. WARN_ONCE(1, "MSS of %u is too small for TSO\n", mss);
  57. return false;
  58. }
  59. header_len = efx_tx_tso_header_length(skb);
  60. if (header_len > nic_data->tso_max_hdr_len)
  61. return false;
  62. if (skb_shinfo(skb)->gso_segs > nic_data->tso_max_payload_num_segs) {
  63. /* net_dev->gso_max_segs should've caught this */
  64. WARN_ON_ONCE(1);
  65. return false;
  66. }
  67. if (skb->data_len / mss > nic_data->tso_max_frames)
  68. return false;
  69. /* net_dev->gso_max_size should've caught this */
  70. if (WARN_ON_ONCE(skb->data_len > nic_data->tso_max_payload_len))
  71. return false;
  72. /* Reserve an empty buffer for the TSO V3 descriptor.
  73. * Convey the length of the header since we already know it.
  74. */
  75. buffer = efx_tx_queue_get_insert_buffer(tx_queue);
  76. buffer->flags = EFX_TX_BUF_TSO_V3 | EFX_TX_BUF_CONT;
  77. buffer->len = header_len;
  78. buffer->unmap_len = 0;
  79. buffer->skb = skb;
  80. ++tx_queue->insert_count;
  81. /* Adjust the TCP checksum to exclude the total length, since we set
  82. * ED_INNER_IP_LEN in the descriptor.
  83. */
  84. tcphdr = tcp_hdr(skb);
  85. if (skb_is_gso_v6(skb)) {
  86. tcphdr->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
  87. &ipv6_hdr(skb)->daddr,
  88. 0, IPPROTO_TCP, 0);
  89. } else {
  90. iphdr = ip_hdr(skb);
  91. tcphdr->check = ~csum_tcpudp_magic(iphdr->saddr, iphdr->daddr,
  92. 0, IPPROTO_TCP, 0);
  93. }
  94. return true;
  95. }
  96. static efx_oword_t *ef100_tx_desc(struct efx_tx_queue *tx_queue, unsigned int index)
  97. {
  98. if (likely(tx_queue->txd.buf.addr))
  99. return ((efx_oword_t *)tx_queue->txd.buf.addr) + index;
  100. else
  101. return NULL;
  102. }
  103. void ef100_notify_tx_desc(struct efx_tx_queue *tx_queue)
  104. {
  105. unsigned int write_ptr;
  106. efx_dword_t reg;
  107. if (unlikely(tx_queue->notify_count == tx_queue->write_count))
  108. return;
  109. write_ptr = tx_queue->write_count & tx_queue->ptr_mask;
  110. /* The write pointer goes into the high word */
  111. EFX_POPULATE_DWORD_1(reg, ERF_GZ_TX_RING_PIDX, write_ptr);
  112. efx_writed_page(tx_queue->efx, &reg,
  113. ER_GZ_TX_RING_DOORBELL, tx_queue->queue);
  114. tx_queue->notify_count = tx_queue->write_count;
  115. tx_queue->xmit_more_available = false;
  116. }
  117. static void ef100_tx_push_buffers(struct efx_tx_queue *tx_queue)
  118. {
  119. ef100_notify_tx_desc(tx_queue);
  120. ++tx_queue->pushes;
  121. }
  122. static void ef100_set_tx_csum_partial(const struct sk_buff *skb,
  123. struct efx_tx_buffer *buffer, efx_oword_t *txd)
  124. {
  125. efx_oword_t csum;
  126. int csum_start;
  127. if (!skb || skb->ip_summed != CHECKSUM_PARTIAL)
  128. return;
  129. /* skb->csum_start has the offset from head, but we need the offset
  130. * from data.
  131. */
  132. csum_start = skb_checksum_start_offset(skb);
  133. EFX_POPULATE_OWORD_3(csum,
  134. ESF_GZ_TX_SEND_CSO_PARTIAL_EN, 1,
  135. ESF_GZ_TX_SEND_CSO_PARTIAL_START_W,
  136. csum_start >> 1,
  137. ESF_GZ_TX_SEND_CSO_PARTIAL_CSUM_W,
  138. skb->csum_offset >> 1);
  139. EFX_OR_OWORD(*txd, *txd, csum);
  140. }
  141. static void ef100_set_tx_hw_vlan(const struct sk_buff *skb, efx_oword_t *txd)
  142. {
  143. u16 vlan_tci = skb_vlan_tag_get(skb);
  144. efx_oword_t vlan;
  145. EFX_POPULATE_OWORD_2(vlan,
  146. ESF_GZ_TX_SEND_VLAN_INSERT_EN, 1,
  147. ESF_GZ_TX_SEND_VLAN_INSERT_TCI, vlan_tci);
  148. EFX_OR_OWORD(*txd, *txd, vlan);
  149. }
  150. static void ef100_make_send_desc(struct efx_nic *efx,
  151. const struct sk_buff *skb,
  152. struct efx_tx_buffer *buffer, efx_oword_t *txd,
  153. unsigned int segment_count)
  154. {
  155. /* TX send descriptor */
  156. EFX_POPULATE_OWORD_3(*txd,
  157. ESF_GZ_TX_SEND_NUM_SEGS, segment_count,
  158. ESF_GZ_TX_SEND_LEN, buffer->len,
  159. ESF_GZ_TX_SEND_ADDR, buffer->dma_addr);
  160. if (likely(efx->net_dev->features & NETIF_F_HW_CSUM))
  161. ef100_set_tx_csum_partial(skb, buffer, txd);
  162. if (efx->net_dev->features & NETIF_F_HW_VLAN_CTAG_TX &&
  163. skb && skb_vlan_tag_present(skb))
  164. ef100_set_tx_hw_vlan(skb, txd);
  165. }
  166. static void ef100_make_tso_desc(struct efx_nic *efx,
  167. const struct sk_buff *skb,
  168. struct efx_tx_buffer *buffer, efx_oword_t *txd,
  169. unsigned int segment_count)
  170. {
  171. u32 mangleid = (efx->net_dev->features & NETIF_F_TSO_MANGLEID) ||
  172. skb_shinfo(skb)->gso_type & SKB_GSO_TCP_FIXEDID ?
  173. ESE_GZ_TX_DESC_IP4_ID_NO_OP :
  174. ESE_GZ_TX_DESC_IP4_ID_INC_MOD16;
  175. u16 vlan_enable = efx->net_dev->features & NETIF_F_HW_VLAN_CTAG_TX ?
  176. skb_vlan_tag_present(skb) : 0;
  177. unsigned int len, ip_offset, tcp_offset, payload_segs;
  178. u16 vlan_tci = skb_vlan_tag_get(skb);
  179. u32 mss = skb_shinfo(skb)->gso_size;
  180. len = skb->len - buffer->len;
  181. /* We use 1 for the TSO descriptor and 1 for the header */
  182. payload_segs = segment_count - 2;
  183. ip_offset = skb_network_offset(skb);
  184. tcp_offset = skb_transport_offset(skb);
  185. EFX_POPULATE_OWORD_13(*txd,
  186. ESF_GZ_TX_DESC_TYPE, ESE_GZ_TX_DESC_TYPE_TSO,
  187. ESF_GZ_TX_TSO_MSS, mss,
  188. ESF_GZ_TX_TSO_HDR_NUM_SEGS, 1,
  189. ESF_GZ_TX_TSO_PAYLOAD_NUM_SEGS, payload_segs,
  190. ESF_GZ_TX_TSO_HDR_LEN_W, buffer->len >> 1,
  191. ESF_GZ_TX_TSO_PAYLOAD_LEN, len,
  192. ESF_GZ_TX_TSO_CSO_INNER_L4, 1,
  193. ESF_GZ_TX_TSO_INNER_L3_OFF_W, ip_offset >> 1,
  194. ESF_GZ_TX_TSO_INNER_L4_OFF_W, tcp_offset >> 1,
  195. ESF_GZ_TX_TSO_ED_INNER_IP4_ID, mangleid,
  196. ESF_GZ_TX_TSO_ED_INNER_IP_LEN, 1,
  197. ESF_GZ_TX_TSO_VLAN_INSERT_EN, vlan_enable,
  198. ESF_GZ_TX_TSO_VLAN_INSERT_TCI, vlan_tci
  199. );
  200. }
  201. static void ef100_tx_make_descriptors(struct efx_tx_queue *tx_queue,
  202. const struct sk_buff *skb,
  203. unsigned int segment_count)
  204. {
  205. unsigned int old_write_count = tx_queue->write_count;
  206. unsigned int new_write_count = old_write_count;
  207. struct efx_tx_buffer *buffer;
  208. unsigned int next_desc_type;
  209. unsigned int write_ptr;
  210. efx_oword_t *txd;
  211. unsigned int nr_descs = tx_queue->insert_count - old_write_count;
  212. if (unlikely(nr_descs == 0))
  213. return;
  214. if (segment_count)
  215. next_desc_type = ESE_GZ_TX_DESC_TYPE_TSO;
  216. else
  217. next_desc_type = ESE_GZ_TX_DESC_TYPE_SEND;
  218. /* if it's a raw write (such as XDP) then always SEND single frames */
  219. if (!skb)
  220. nr_descs = 1;
  221. do {
  222. write_ptr = new_write_count & tx_queue->ptr_mask;
  223. buffer = &tx_queue->buffer[write_ptr];
  224. txd = ef100_tx_desc(tx_queue, write_ptr);
  225. ++new_write_count;
  226. /* Create TX descriptor ring entry */
  227. tx_queue->packet_write_count = new_write_count;
  228. switch (next_desc_type) {
  229. case ESE_GZ_TX_DESC_TYPE_SEND:
  230. ef100_make_send_desc(tx_queue->efx, skb,
  231. buffer, txd, nr_descs);
  232. break;
  233. case ESE_GZ_TX_DESC_TYPE_TSO:
  234. /* TX TSO descriptor */
  235. WARN_ON_ONCE(!(buffer->flags & EFX_TX_BUF_TSO_V3));
  236. ef100_make_tso_desc(tx_queue->efx, skb,
  237. buffer, txd, nr_descs);
  238. break;
  239. default:
  240. /* TX segment descriptor */
  241. EFX_POPULATE_OWORD_3(*txd,
  242. ESF_GZ_TX_DESC_TYPE, ESE_GZ_TX_DESC_TYPE_SEG,
  243. ESF_GZ_TX_SEG_LEN, buffer->len,
  244. ESF_GZ_TX_SEG_ADDR, buffer->dma_addr);
  245. }
  246. /* if it's a raw write (such as XDP) then always SEND */
  247. next_desc_type = skb ? ESE_GZ_TX_DESC_TYPE_SEG :
  248. ESE_GZ_TX_DESC_TYPE_SEND;
  249. } while (new_write_count != tx_queue->insert_count);
  250. wmb(); /* Ensure descriptors are written before they are fetched */
  251. tx_queue->write_count = new_write_count;
  252. /* The write_count above must be updated before reading
  253. * channel->holdoff_doorbell to avoid a race with the
  254. * completion path, so ensure these operations are not
  255. * re-ordered. This also flushes the update of write_count
  256. * back into the cache.
  257. */
  258. smp_mb();
  259. }
  260. void ef100_tx_write(struct efx_tx_queue *tx_queue)
  261. {
  262. ef100_tx_make_descriptors(tx_queue, NULL, 0);
  263. ef100_tx_push_buffers(tx_queue);
  264. }
  265. void ef100_ev_tx(struct efx_channel *channel, const efx_qword_t *p_event)
  266. {
  267. unsigned int tx_done =
  268. EFX_QWORD_FIELD(*p_event, ESF_GZ_EV_TXCMPL_NUM_DESC);
  269. unsigned int qlabel =
  270. EFX_QWORD_FIELD(*p_event, ESF_GZ_EV_TXCMPL_Q_LABEL);
  271. struct efx_tx_queue *tx_queue =
  272. efx_channel_get_tx_queue(channel, qlabel);
  273. unsigned int tx_index = (tx_queue->read_count + tx_done - 1) &
  274. tx_queue->ptr_mask;
  275. efx_xmit_done(tx_queue, tx_index);
  276. }
  277. /* Add a socket buffer to a TX queue
  278. *
  279. * You must hold netif_tx_lock() to call this function.
  280. *
  281. * Returns 0 on success, error code otherwise. In case of an error this
  282. * function will free the SKB.
  283. */
  284. int ef100_enqueue_skb(struct efx_tx_queue *tx_queue, struct sk_buff *skb)
  285. {
  286. unsigned int old_insert_count = tx_queue->insert_count;
  287. struct efx_nic *efx = tx_queue->efx;
  288. bool xmit_more = netdev_xmit_more();
  289. unsigned int fill_level;
  290. unsigned int segments;
  291. int rc;
  292. if (!tx_queue->buffer || !tx_queue->ptr_mask) {
  293. netif_stop_queue(efx->net_dev);
  294. dev_kfree_skb_any(skb);
  295. return -ENODEV;
  296. }
  297. segments = skb_is_gso(skb) ? skb_shinfo(skb)->gso_segs : 0;
  298. if (segments == 1)
  299. segments = 0; /* Don't use TSO/GSO for a single segment. */
  300. if (segments && !ef100_tx_can_tso(tx_queue, skb)) {
  301. rc = efx_tx_tso_fallback(tx_queue, skb);
  302. tx_queue->tso_fallbacks++;
  303. if (rc)
  304. goto err;
  305. else
  306. return 0;
  307. }
  308. /* Map for DMA and create descriptors */
  309. rc = efx_tx_map_data(tx_queue, skb, segments);
  310. if (rc)
  311. goto err;
  312. ef100_tx_make_descriptors(tx_queue, skb, segments);
  313. fill_level = efx_channel_tx_fill_level(tx_queue->channel);
  314. if (fill_level > efx->txq_stop_thresh) {
  315. netif_tx_stop_queue(tx_queue->core_txq);
  316. /* Re-read after a memory barrier in case we've raced with
  317. * the completion path. Otherwise there's a danger we'll never
  318. * restart the queue if all completions have just happened.
  319. */
  320. smp_mb();
  321. fill_level = efx_channel_tx_fill_level(tx_queue->channel);
  322. if (fill_level < efx->txq_stop_thresh)
  323. netif_tx_start_queue(tx_queue->core_txq);
  324. }
  325. if (__netdev_tx_sent_queue(tx_queue->core_txq, skb->len, xmit_more))
  326. tx_queue->xmit_more_available = false; /* push doorbell */
  327. else if (tx_queue->write_count - tx_queue->notify_count > 255)
  328. /* Ensure we never push more than 256 packets at once */
  329. tx_queue->xmit_more_available = false; /* push */
  330. else
  331. tx_queue->xmit_more_available = true; /* don't push yet */
  332. if (!tx_queue->xmit_more_available)
  333. ef100_tx_push_buffers(tx_queue);
  334. if (segments) {
  335. tx_queue->tso_bursts++;
  336. tx_queue->tso_packets += segments;
  337. tx_queue->tx_packets += segments;
  338. } else {
  339. tx_queue->tx_packets++;
  340. }
  341. return 0;
  342. err:
  343. efx_enqueue_unwind(tx_queue, old_insert_count);
  344. if (!IS_ERR_OR_NULL(skb))
  345. dev_kfree_skb_any(skb);
  346. /* If we're not expecting another transmit and we had something to push
  347. * on this queue then we need to push here to get the previous packets
  348. * out. We only enter this branch from before the 'Update BQL' section
  349. * above, so xmit_more_available still refers to the old state.
  350. */
  351. if (tx_queue->xmit_more_available && !xmit_more)
  352. ef100_tx_push_buffers(tx_queue);
  353. return rc;
  354. }