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/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium.dts

https://github.com/tiwai/sound
Device Tree | 594 lines | 478 code | 107 blank | 9 comment | 0 complexity | 6da7efd3f5d355b00a3e4152c2015ebb MD5 | raw file
    

  1. // SPDX-License-Identifier: GPL-2.0
    2. 

  2. 

  3. /dts-v1/;
    4. 

  4. 

  5. #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
    6. 

  6. #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
    7. 

  7. #include <dt-bindings/sound/qcom,q6afe.h>
    8. 

  8. #include <dt-bindings/sound/qcom,q6asm.h>
    9. 

  9. #include "sdm845.dtsi"
    10. 

  10. #include "pm8998.dtsi"
    11. 

  11. #include "pmi8998.dtsi"
    12. 

  12. 

  13. /*
    14. 

  14.  * Delete following upstream (sdm845.dtsi) reserved
    15. 

  15.  * memory mappings which are different in this device.
    16. 

  16.  */
    17. 

  17. /delete-node/ &tz_mem;
    18. 

  18. /delete-node/ &adsp_mem;
    19. 

  19. /delete-node/ &wlan_msa_mem;
    20. 

  20. /delete-node/ &mpss_region;
    21. 

  21. /delete-node/ &venus_mem;
    22. 

  22. /delete-node/ &cdsp_mem;
    23. 

  23. /delete-node/ &mba_region;
    24. 

  24. /delete-node/ &slpi_mem;
    25. 

  25. /delete-node/ &spss_mem;
    26. 

  26. /delete-node/ &rmtfs_mem;
    27. 

  27. 

  28. / {
    29. 

  29. 	model = "Xiaomi Pocophone F1";
    30. 

  30. 	compatible = "xiaomi,beryllium", "qcom,sdm845";
    31. 

  31. 	chassis-type = "handset";
    32. 

  32. 

  33. 	/* required for bootloader to select correct board */
    34. 

  34. 	qcom,board-id = <69 0>;
    35. 

  35. 	qcom,msm-id = <321 0x20001>;
    36. 

  36. 

  37. 	aliases {
    38. 

  38. 		hsuart0 = &uart6;
    39. 

  39. 	};
    40. 

  40. 

  41. 	gpio-keys {
    42. 

  42. 		compatible = "gpio-keys";
    43. 

  43. 		autorepeat;
    44. 

  44. 

  45. 		pinctrl-names = "default";
    46. 

  46. 		pinctrl-0 = <&vol_up_pin_a>;
    47. 

  47. 

  48. 		vol-up {
    49. 

  49. 			label = "Volume Up";
    50. 

  50. 			linux,code = <KEY_VOLUMEUP>;
    51. 

  51. 			gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
    52. 

  52. 		};
    53. 

  53. 	};
    54. 

  54. 

  55. 	/* Reserved memory changes from downstream */
    56. 

  56. 	reserved-memory {
    57. 

  57. 		tz_mem: memory@86200000 {
    58. 

  58. 			reg = <0 0x86200000 0 0x4900000>;
    59. 

  59. 			no-map;
    60. 

  60. 		};
    61. 

  61. 

  62. 		adsp_mem: memory@8c500000 {
    63. 

  63. 			reg = <0 0x8c500000 0 0x1e00000>;
    64. 

  64. 			no-map;
    65. 

  65. 		};
    66. 

  66. 

  67. 		wlan_msa_mem: memory@8e300000 {
    68. 

  68. 			reg = <0 0x8e300000 0 0x100000>;
    69. 

  69. 			no-map;
    70. 

  70. 		};
    71. 

  71. 

  72. 		mpss_region: memory@8e400000 {
    73. 

  73. 			reg = <0 0x8e400000 0 0x7800000>;
    74. 

  74. 			no-map;
    75. 

  75. 		};
    76. 

  76. 

  77. 		venus_mem: memory@95c00000 {
    78. 

  78. 			reg = <0 0x95c00000 0 0x500000>;
    79. 

  79. 			no-map;
    80. 

  80. 		};
    81. 

  81. 

  82. 		cdsp_mem: memory@96100000 {
    83. 

  83. 			reg = <0 0x96100000 0 0x800000>;
    84. 

  84. 			no-map;
    85. 

  85. 		};
    86. 

  86. 

  87. 		mba_region: memory@96900000 {
    88. 

  88. 			reg = <0 0x96900000 0 0x200000>;
    89. 

  89. 			no-map;
    90. 

  90. 		};
    91. 

  91. 

  92. 		slpi_mem: memory@96b00000 {
    93. 

  93. 			reg = <0 0x96b00000 0 0x1400000>;
    94. 

  94. 			no-map;
    95. 

  95. 		};
    96. 

  96. 

  97. 		spss_mem: memory@97f00000 {
    98. 

  98. 			reg = <0 0x97f00000 0 0x100000>;
    99. 

  99. 			no-map;
    100. 

  100. 		};
    101. 

  101. 

  102. 		rmtfs_mem: memory@f6301000 {
    103. 

  103. 			compatible = "qcom,rmtfs-mem";
    104. 

  104. 			reg = <0 0xf6301000 0 0x200000>;
    105. 

  105. 			no-map;
    106. 

  106. 

  107. 			qcom,client-id = <1>;
    108. 

  108. 			qcom,vmid = <15>;
    109. 

  109. 		};
    110. 

  110. 	};
    111. 

  111. 

  112. 	vreg_s4a_1p8: vreg-s4a-1p8 {
    113. 

  113. 		compatible = "regulator-fixed";
    114. 

  114. 		regulator-name = "vreg_s4a_1p8";
    115. 

  115. 

  116. 		regulator-min-microvolt = <1800000>;
    117. 

  117. 		regulator-max-microvolt = <1800000>;
    118. 

  118. 		regulator-always-on;
    119. 

  119. 	};
    120. 

  120. };
    121. 

  121. 

  122. &adsp_pas {
    123. 

  123. 	status = "okay";
    124. 

  124. 	firmware-name = "qcom/sdm845/beryllium/adsp.mbn";
    125. 

  125. };
    126. 

  126. 

  127. &apps_rsc {
    128. 

  128. 	pm8998-rpmh-regulators {
    129. 

  129. 		compatible = "qcom,pm8998-rpmh-regulators";
    130. 

  130. 		qcom,pmic-id = "a";
    131. 

  131. 

  132. 		vreg_l1a_0p875: ldo1 {
    133. 

  133. 			regulator-min-microvolt = <880000>;
    134. 

  134. 			regulator-max-microvolt = <880000>;
    135. 

  135. 			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    136. 

  136. 		};
    137. 

  137. 

  138. 		vreg_l5a_0p8: ldo5 {
    139. 

  139. 			regulator-min-microvolt = <800000>;
    140. 

  140. 			regulator-max-microvolt = <800000>;
    141. 

  141. 			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    142. 

  142. 		};
    143. 

  143. 

  144. 		vreg_l7a_1p8: ldo7 {
    145. 

  145. 			regulator-min-microvolt = <1800000>;
    146. 

  146. 			regulator-max-microvolt = <1800000>;
    147. 

  147. 			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    148. 

  148. 		};
    149. 

  149. 

  150. 		vreg_l12a_1p8: ldo12 {
    151. 

  151. 			regulator-min-microvolt = <1800000>;
    152. 

  152. 			regulator-max-microvolt = <1800000>;
    153. 

  153. 			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    154. 

  154. 		};
    155. 

  155. 

  156. 		vreg_l13a_2p95: ldo13 {
    157. 

  157. 			regulator-min-microvolt = <1800000>;
    158. 

  158. 			regulator-max-microvolt = <2960000>;
    159. 

  159. 			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    160. 

  160. 		};
    161. 

  161. 

  162. 		vreg_l14a_1p8: ldo14 {
    163. 

  163. 			regulator-min-microvolt = <1800000>;
    164. 

  164. 			regulator-max-microvolt = <1800000>;
    165. 

  165. 			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    166. 

  166. 			regulator-boot-on;
    167. 

  167. 			regulator-always-on;
    168. 

  168. 		};
    169. 

  169. 

  170. 		vreg_l17a_1p3: ldo17 {
    171. 

  171. 			regulator-min-microvolt = <1304000>;
    172. 

  172. 			regulator-max-microvolt = <1304000>;
    173. 

  173. 			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    174. 

  174. 		};
    175. 

  175. 

  176. 		vreg_l20a_2p95: ldo20 {
    177. 

  177. 			regulator-min-microvolt = <2960000>;
    178. 

  178. 			regulator-max-microvolt = <2968000>;
    179. 

  179. 			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    180. 

  180. 		};
    181. 

  181. 

  182. 		vreg_l21a_2p95: ldo21 {
    183. 

  183. 			regulator-min-microvolt = <2960000>;
    184. 

  184. 			regulator-max-microvolt = <2968000>;
    185. 

  185. 			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    186. 

  186. 		};
    187. 

  187. 

  188. 		vreg_l23a_3p3: ldo23 {
    189. 

  189. 			regulator-min-microvolt = <3300000>;
    190. 

  190. 			regulator-max-microvolt = <3312000>;
    191. 

  191. 			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    192. 

  192. 		};
    193. 

  193. 

  194. 		vreg_l24a_3p075: ldo24 {
    195. 

  195. 			regulator-min-microvolt = <3088000>;
    196. 

  196. 			regulator-max-microvolt = <3088000>;
    197. 

  197. 			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    198. 

  198. 		};
    199. 

  199. 

  200. 		vreg_l25a_3p3: ldo25 {
    201. 

  201. 			regulator-min-microvolt = <3300000>;
    202. 

  202. 			regulator-max-microvolt = <3312000>;
    203. 

  203. 			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    204. 

  204. 		};
    205. 

  205. 

  206. 		vreg_l26a_1p2: ldo26 {
    207. 

  207. 			regulator-min-microvolt = <1200000>;
    208. 

  208. 			regulator-max-microvolt = <1200000>;
    209. 

  209. 			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
    210. 

  210. 			regulator-boot-on;
    211. 

  211. 		};
    212. 

  212. 	};
    213. 

  213. };
    214. 

  214. 

  215. &cdsp_pas {
    216. 

  216. 	status = "okay";
    217. 

  217. 	firmware-name = "qcom/sdm845/beryllium/cdsp.mbn";
    218. 

  218. };
    219. 

  219. 

  220. &dsi0 {
    221. 

  221. 	status = "okay";
    222. 

  222. 	vdda-supply = <&vreg_l26a_1p2>;
    223. 

  223. 

  224. 	panel@0 {
    225. 

  225. 		compatible = "tianma,fhd-video";
    226. 

  226. 		reg = <0>;
    227. 

  227. 		vddio-supply = <&vreg_l14a_1p8>;
    228. 

  228. 		vddpos-supply = <&lab>;
    229. 

  229. 		vddneg-supply = <&ibb>;
    230. 

  230. 

  231. 		#address-cells = <1>;
    232. 

  232. 		#size-cells = <0>;
    233. 

  233. 

  234. 		backlight = <&pmi8998_wled>;
    235. 

  235. 		reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
    236. 

  236. 

  237. 		port {
    238. 

  238. 			tianma_nt36672a_in_0: endpoint {
    239. 

  239. 				remote-endpoint = <&dsi0_out>;
    240. 

  240. 			};
    241. 

  241. 		};
    242. 

  242. 	};
    243. 

  243. };
    244. 

  244. 

  245. &dsi0_out {
    246. 

  246. 	remote-endpoint = <&tianma_nt36672a_in_0>;
    247. 

  247. 	data-lanes = <0 1 2 3>;
    248. 

  248. };
    249. 

  249. 

  250. &dsi0_phy {
    251. 

  251. 	status = "okay";
    252. 

  252. 	vdds-supply = <&vreg_l1a_0p875>;
    253. 

  253. };
    254. 

  254. 

  255. &gcc {
    256. 

  256. 	protected-clocks = <GCC_QSPI_CORE_CLK>,
    257. 

  257. 			   <GCC_QSPI_CORE_CLK_SRC>,
    258. 

  258. 			   <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
    259. 

  259. 			   <GCC_LPASS_Q6_AXI_CLK>,
    260. 

  260. 			   <GCC_LPASS_SWAY_CLK>;
    261. 

  261. };
    262. 

  262. 

  263. &gmu {
    264. 

  264. 	status = "okay";
    265. 

  265. };
    266. 

  266. 

  267. &gpu {
    268. 

  268. 	status = "okay";
    269. 

  269. 

  270. 	zap-shader {
    271. 

  271. 		memory-region = <&gpu_mem>;
    272. 

  272. 		firmware-name = "qcom/sdm845/beryllium/a630_zap.mbn";
    273. 

  273. 	};
    274. 

  274. };
    275. 

  275. 

  276. &ibb {
    277. 

  277. 	regulator-min-microvolt = <4600000>;
    278. 

  278. 	regulator-max-microvolt = <6000000>;
    279. 

  279. 	regulator-over-current-protection;
    280. 

  280. 	regulator-pull-down;
    281. 

  281. 	regulator-soft-start;
    282. 

  282. 	qcom,discharge-resistor-kohms = <300>;
    283. 

  283. };
    284. 

  284. 

  285. &lab {
    286. 

  286. 	regulator-min-microvolt = <4600000>;
    287. 

  287. 	regulator-max-microvolt = <6000000>;
    288. 

  288. 	regulator-over-current-protection;
    289. 

  289. 	regulator-pull-down;
    290. 

  290. 	regulator-soft-start;
    291. 

  291. };
    292. 

  292. 

  293. &mdss {
    294. 

  294. 	status = "okay";
    295. 

  295. };
    296. 

  296. 

  297. &mss_pil {
    298. 

  298. 	status = "okay";
    299. 

  299. 	firmware-name = "qcom/sdm845/beryllium/mba.mbn", "qcom/sdm845/beryllium/modem.mbn";
    300. 

  300. };
    301. 

  301. 

  302. &ipa {
    303. 

  303. 	status = "okay";
    304. 

  304. 	memory-region = <&ipa_fw_mem>;
    305. 

  305. 	firmware-name = "qcom/sdm845/beryllium/ipa_fws.mbn";
    306. 

  306. };
    307. 

  307. 

  308. &pm8998_gpio {
    309. 

  309. 	vol_up_pin_a: vol-up-active {
    310. 

  310. 		pins = "gpio6";
    311. 

  311. 		function = "normal";
    312. 

  312. 		input-enable;
    313. 

  313. 		bias-pull-up;
    314. 

  314. 		qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
    315. 

  315. 	};
    316. 

  316. };
    317. 

  317. 

  318. &pmi8998_wled {
    319. 

  319. 	status = "okay";
    320. 

  320. 	qcom,current-boost-limit = <970>;
    321. 

  321. 	qcom,ovp-millivolt = <29600>;
    322. 

  322. 	qcom,current-limit-microamp = <20000>;
    323. 

  323. 	qcom,num-strings = <2>;
    324. 

  324. 	qcom,switching-freq = <600>;
    325. 

  325. 	qcom,external-pfet;
    326. 

  326. 	qcom,cabc;
    327. 

  327. };
    328. 

  328. 

  329. &pm8998_pon {
    330. 

  330. 	resin {
    331. 

  331. 		compatible = "qcom,pm8941-resin";
    332. 

  332. 		interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
    333. 

  333. 		debounce = <15625>;
    334. 

  334. 		bias-pull-up;
    335. 

  335. 		linux,code = <KEY_VOLUMEDOWN>;
    336. 

  336. 	};
    337. 

  337. };
    338. 

  338. 

  339. /* QUAT I2S Uses 1 I2S SD Line for audio on TAS2559/60 amplifiers */
    340. 

  340. &q6afedai {
    341. 

  341. 	qi2s@22 {
    342. 

  342. 		reg = <22>;
    343. 

  343. 		qcom,sd-lines = <0>;
    344. 

  344. 	};
    345. 

  345. };
    346. 

  346. 

  347. &q6asmdai {
    348. 

  348. 	dai@0 {
    349. 

  349. 		reg = <0>;
    350. 

  350. 	};
    351. 

  351. 

  352. 	dai@1 {
    353. 

  353. 		reg = <1>;
    354. 

  354. 	};
    355. 

  355. 

  356. 	dai@2 {
    357. 

  357. 		reg = <2>;
    358. 

  358. 	};
    359. 

  359. };
    360. 

  360. 

  361. &qupv3_id_0 {
    362. 

  362. 	status = "okay";
    363. 

  363. };
    364. 

  364. 

  365. &sdhc_2 {
    366. 

  366. 	status = "okay";
    367. 

  367. 

  368. 	pinctrl-names = "default";
    369. 

  369. 	pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
    370. 

  370. 

  371. 	vmmc-supply = <&vreg_l21a_2p95>;
    372. 

  372. 	vqmmc-supply = <&vreg_l13a_2p95>;
    373. 

  373. 

  374. 	bus-width = <4>;
    375. 

  375. 	cd-gpios = <&tlmm 126 GPIO_ACTIVE_HIGH>;
    376. 

  376. };
    377. 

  377. 

  378. &sound {
    379. 

  379. 	compatible = "qcom,db845c-sndcard";
    380. 

  380. 	pinctrl-0 = <&quat_mi2s_active
    381. 

  381. 			&quat_mi2s_sd0_active>;
    382. 

  382. 	pinctrl-names = "default";
    383. 

  383. 	model = "Xiaomi Poco F1";
    384. 

  384. 	audio-routing =
    385. 

  385. 		"RX_BIAS", "MCLK",
    386. 

  386. 		"AMIC1", "MIC BIAS1",
    387. 

  387. 		"AMIC2", "MIC BIAS2",
    388. 

  388. 		"AMIC3", "MIC BIAS3";
    389. 

  389. 

  390. 	mm1-dai-link {
    391. 

  391. 		link-name = "MultiMedia1";
    392. 

  392. 		cpu {
    393. 

  393. 			sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA1>;
    394. 

  394. 		};
    395. 

  395. 	};
    396. 

  396. 

  397. 	mm2-dai-link {
    398. 

  398. 		link-name = "MultiMedia2";
    399. 

  399. 		cpu {
    400. 

  400. 			sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA2>;
    401. 

  401. 		};
    402. 

  402. 	};
    403. 

  403. 

  404. 	mm3-dai-link {
    405. 

  405. 		link-name = "MultiMedia3";
    406. 

  406. 		cpu {
    407. 

  407. 			sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA3>;
    408. 

  408. 		};
    409. 

  409. 	};
    410. 

  410. 

  411. 	slim-dai-link {
    412. 

  412. 		link-name = "SLIM Playback";
    413. 

  413. 		cpu {
    414. 

  414. 			sound-dai = <&q6afedai SLIMBUS_0_RX>;
    415. 

  415. 		};
    416. 

  416. 

  417. 		platform {
    418. 

  418. 			sound-dai = <&q6routing>;
    419. 

  419. 		};
    420. 

  420. 

  421. 		codec {
    422. 

  422. 			sound-dai =  <&wcd9340 0>;
    423. 

  423. 		};
    424. 

  424. 	};
    425. 

  425. 

  426. 	slimcap-dai-link {
    427. 

  427. 		link-name = "SLIM Capture";
    428. 

  428. 		cpu {
    429. 

  429. 			sound-dai = <&q6afedai SLIMBUS_0_TX>;
    430. 

  430. 		};
    431. 

  431. 

  432. 		platform {
    433. 

  433. 			sound-dai = <&q6routing>;
    434. 

  434. 		};
    435. 

  435. 

  436. 		codec {
    437. 

  437. 			sound-dai = <&wcd9340 1>;
    438. 

  438. 		};
    439. 

  439. 	};
    440. 

  440. };
    441. 

  441. 

  442. &tlmm {
    443. 

  443. 	gpio-reserved-ranges = <0 4>, <81 4>;
    444. 

  444. 

  445. 	sdc2_default_state: sdc2-default {
    446. 

  446. 		clk {
    447. 

  447. 			pins = "sdc2_clk";
    448. 

  448. 			bias-disable;
    449. 

  449. 			drive-strength = <16>;
    450. 

  450. 		};
    451. 

  451. 

  452. 		cmd {
    453. 

  453. 			pins = "sdc2_cmd";
    454. 

  454. 			bias-pull-up;
    455. 

  455. 			drive-strength = <10>;
    456. 

  456. 		};
    457. 

  457. 

  458. 		data {
    459. 

  459. 			pins = "sdc2_data";
    460. 

  460. 			bias-pull-up;
    461. 

  461. 			drive-strength = <10>;
    462. 

  462. 		};
    463. 

  463. 	};
    464. 

  464. 

  465. 	sdc2_card_det_n: sd-card-det-n {
    466. 

  466. 		pins = "gpio126";
    467. 

  467. 		function = "gpio";
    468. 

  468. 		bias-pull-up;
    469. 

  469. 	};
    470. 

  470. 

  471. 	wcd_intr_default: wcd_intr_default {
    472. 

  472. 		pins = <54>;
    473. 

  473. 		function = "gpio";
    474. 

  474. 

  475. 		input-enable;
    476. 

  476. 		bias-pull-down;
    477. 

  477. 		drive-strength = <2>;
    478. 

  478. 	};
    479. 

  479. };
    480. 

  480. 

  481. &uart6 {
    482. 

  482. 	status = "okay";
    483. 

  483. 

  484. 	bluetooth {
    485. 

  485. 		compatible = "qcom,wcn3990-bt";
    486. 

  486. 

  487. 		vddio-supply = <&vreg_s4a_1p8>;
    488. 

  488. 		vddxo-supply = <&vreg_l7a_1p8>;
    489. 

  489. 		vddrf-supply = <&vreg_l17a_1p3>;
    490. 

  490. 		vddch0-supply = <&vreg_l25a_3p3>;
    491. 

  491. 		max-speed = <3200000>;
    492. 

  492. 	};
    493. 

  493. };
    494. 

  494. 

  495. &ufs_mem_hc {
    496. 

  496. 	status = "okay";
    497. 

  497. 

  498. 	reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
    499. 

  499. 

  500. 	vcc-supply = <&vreg_l20a_2p95>;
    501. 

  501. 	vcc-max-microamp = <800000>;
    502. 

  502. };
    503. 

  503. 

  504. &ufs_mem_phy {
    505. 

  505. 	status = "okay";
    506. 

  506. 

  507. 	vdda-phy-supply = <&vreg_l1a_0p875>;
    508. 

  508. 	vdda-pll-supply = <&vreg_l26a_1p2>;
    509. 

  509. };
    510. 

  510. 

  511. &usb_1 {
    512. 

  512. 	status = "okay";
    513. 

  513. };
    514. 

  514. 

  515. &usb_1_dwc3 {
    516. 

  516. 	dr_mode = "peripheral";
    517. 

  517. };
    518. 

  518. 

  519. &usb_1_hsphy {
    520. 

  520. 	status = "okay";
    521. 

  521. 

  522. 	vdd-supply = <&vreg_l1a_0p875>;
    523. 

  523. 	vdda-pll-supply = <&vreg_l12a_1p8>;
    524. 

  524. 	vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
    525. 

  525. 

  526. 	qcom,imp-res-offset-value = <8>;
    527. 

  527. 	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
    528. 

  528. 	qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
    529. 

  529. 	qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
    530. 

  530. };
    531. 

  531. 

  532. &usb_1_qmpphy {
    533. 

  533. 	status = "okay";
    534. 

  534. 

  535. 	vdda-phy-supply = <&vreg_l26a_1p2>;
    536. 

  536. 	vdda-pll-supply = <&vreg_l1a_0p875>;
    537. 

  537. };
    538. 

  538. 

  539. &venus {
    540. 

  540. 	status = "okay";
    541. 

  541. 	firmware-name = "qcom/sdm845/beryllium/venus.mbn";
    542. 

  542. };
    543. 

  543. 

  544. &wcd9340{
    545. 

  545. 	pinctrl-0 = <&wcd_intr_default>;
    546. 

  546. 	pinctrl-names = "default";
    547. 

  547. 	clock-names = "extclk";
    548. 

  548. 	clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
    549. 

  549. 	reset-gpios = <&tlmm 64 0>;
    550. 

  550. 	vdd-buck-supply = <&vreg_s4a_1p8>;
    551. 

  551. 	vdd-buck-sido-supply = <&vreg_s4a_1p8>;
    552. 

  552. 	vdd-tx-supply = <&vreg_s4a_1p8>;
    553. 

  553. 	vdd-rx-supply = <&vreg_s4a_1p8>;
    554. 

  554. 	vdd-io-supply = <&vreg_s4a_1p8>;
    555. 

  555. 	qcom,micbias1-microvolt = <2700000>;
    556. 

  556. 	qcom,micbias2-microvolt = <1800000>;
    557. 

  557. 	qcom,micbias3-microvolt = <2700000>;
    558. 

  558. 	qcom,micbias4-microvolt = <2700000>;
    559. 

  559. };
    560. 

  560. 

  561. &wifi {
    562. 

  562. 	status = "okay";
    563. 

  563. 

  564. 	vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
    565. 

  565. 	vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
    566. 

  566. 	vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
    567. 

  567. 	vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
    568. 

  568. 	vdd-3.3-ch1-supply = <&vreg_l23a_3p3>;
    569. 

  569. };
    570. 

  570. 

  571. /* PINCTRL - additions to nodes defined in sdm845.dtsi */
    572. 

  572. 

  573. &qup_uart6_default {
    574. 

  574. 	pinmux {
    575. 

  575. 		pins = "gpio45", "gpio46", "gpio47", "gpio48";
    576. 

  576. 		function = "qup6";
    577. 

  577. 	};
    578. 

  578. 

  579. 	cts {
    580. 

  580. 		pins = "gpio45";
    581. 

  581. 		bias-disable;
    582. 

  582. 	};
    583. 

  583. 

  584. 	rts-tx {
    585. 

  585. 		pins = "gpio46", "gpio47";
    586. 

  586. 		drive-strength = <2>;
    587. 

  587. 		bias-disable;
    588. 

  588. 	};
    589. 

  589. 

  590. 	rx {
    591. 

  591. 		pins = "gpio48";
    592. 

  592. 		bias-pull-up;
    593. 

  593. 	};
    594. 

  594. };
    595. 

  595.