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/tools/perf/arch/powerpc/util/perf_regs.c

https://github.com/tiwai/sound
C | 228 lines | 165 code | 28 blank | 35 comment | 20 complexity | 274f387863a38b688d7a32a515503a39 MD5 | raw file
  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <errno.h>
  3. #include <string.h>
  4. #include <regex.h>
  5. #include <linux/zalloc.h>
  6. #include "../../../util/perf_regs.h"
  7. #include "../../../util/debug.h"
  8. #include "../../../util/event.h"
  9. #include "../../../util/header.h"
  10. #include "../../../perf-sys.h"
  11. #include "utils_header.h"
  12. #include <linux/kernel.h>
  13. #define PVR_POWER9 0x004E
  14. #define PVR_POWER10 0x0080
  15. const struct sample_reg sample_reg_masks[] = {
  16. SMPL_REG(r0, PERF_REG_POWERPC_R0),
  17. SMPL_REG(r1, PERF_REG_POWERPC_R1),
  18. SMPL_REG(r2, PERF_REG_POWERPC_R2),
  19. SMPL_REG(r3, PERF_REG_POWERPC_R3),
  20. SMPL_REG(r4, PERF_REG_POWERPC_R4),
  21. SMPL_REG(r5, PERF_REG_POWERPC_R5),
  22. SMPL_REG(r6, PERF_REG_POWERPC_R6),
  23. SMPL_REG(r7, PERF_REG_POWERPC_R7),
  24. SMPL_REG(r8, PERF_REG_POWERPC_R8),
  25. SMPL_REG(r9, PERF_REG_POWERPC_R9),
  26. SMPL_REG(r10, PERF_REG_POWERPC_R10),
  27. SMPL_REG(r11, PERF_REG_POWERPC_R11),
  28. SMPL_REG(r12, PERF_REG_POWERPC_R12),
  29. SMPL_REG(r13, PERF_REG_POWERPC_R13),
  30. SMPL_REG(r14, PERF_REG_POWERPC_R14),
  31. SMPL_REG(r15, PERF_REG_POWERPC_R15),
  32. SMPL_REG(r16, PERF_REG_POWERPC_R16),
  33. SMPL_REG(r17, PERF_REG_POWERPC_R17),
  34. SMPL_REG(r18, PERF_REG_POWERPC_R18),
  35. SMPL_REG(r19, PERF_REG_POWERPC_R19),
  36. SMPL_REG(r20, PERF_REG_POWERPC_R20),
  37. SMPL_REG(r21, PERF_REG_POWERPC_R21),
  38. SMPL_REG(r22, PERF_REG_POWERPC_R22),
  39. SMPL_REG(r23, PERF_REG_POWERPC_R23),
  40. SMPL_REG(r24, PERF_REG_POWERPC_R24),
  41. SMPL_REG(r25, PERF_REG_POWERPC_R25),
  42. SMPL_REG(r26, PERF_REG_POWERPC_R26),
  43. SMPL_REG(r27, PERF_REG_POWERPC_R27),
  44. SMPL_REG(r28, PERF_REG_POWERPC_R28),
  45. SMPL_REG(r29, PERF_REG_POWERPC_R29),
  46. SMPL_REG(r30, PERF_REG_POWERPC_R30),
  47. SMPL_REG(r31, PERF_REG_POWERPC_R31),
  48. SMPL_REG(nip, PERF_REG_POWERPC_NIP),
  49. SMPL_REG(msr, PERF_REG_POWERPC_MSR),
  50. SMPL_REG(orig_r3, PERF_REG_POWERPC_ORIG_R3),
  51. SMPL_REG(ctr, PERF_REG_POWERPC_CTR),
  52. SMPL_REG(link, PERF_REG_POWERPC_LINK),
  53. SMPL_REG(xer, PERF_REG_POWERPC_XER),
  54. SMPL_REG(ccr, PERF_REG_POWERPC_CCR),
  55. SMPL_REG(softe, PERF_REG_POWERPC_SOFTE),
  56. SMPL_REG(trap, PERF_REG_POWERPC_TRAP),
  57. SMPL_REG(dar, PERF_REG_POWERPC_DAR),
  58. SMPL_REG(dsisr, PERF_REG_POWERPC_DSISR),
  59. SMPL_REG(sier, PERF_REG_POWERPC_SIER),
  60. SMPL_REG(mmcra, PERF_REG_POWERPC_MMCRA),
  61. SMPL_REG(mmcr0, PERF_REG_POWERPC_MMCR0),
  62. SMPL_REG(mmcr1, PERF_REG_POWERPC_MMCR1),
  63. SMPL_REG(mmcr2, PERF_REG_POWERPC_MMCR2),
  64. SMPL_REG(mmcr3, PERF_REG_POWERPC_MMCR3),
  65. SMPL_REG(sier2, PERF_REG_POWERPC_SIER2),
  66. SMPL_REG(sier3, PERF_REG_POWERPC_SIER3),
  67. SMPL_REG(pmc1, PERF_REG_POWERPC_PMC1),
  68. SMPL_REG(pmc2, PERF_REG_POWERPC_PMC2),
  69. SMPL_REG(pmc3, PERF_REG_POWERPC_PMC3),
  70. SMPL_REG(pmc4, PERF_REG_POWERPC_PMC4),
  71. SMPL_REG(pmc5, PERF_REG_POWERPC_PMC5),
  72. SMPL_REG(pmc6, PERF_REG_POWERPC_PMC6),
  73. SMPL_REG(sdar, PERF_REG_POWERPC_SDAR),
  74. SMPL_REG(siar, PERF_REG_POWERPC_SIAR),
  75. SMPL_REG_END
  76. };
  77. /* REG or %rREG */
  78. #define SDT_OP_REGEX1 "^(%r)?([1-2]?[0-9]|3[0-1])$"
  79. /* -NUM(REG) or NUM(REG) or -NUM(%rREG) or NUM(%rREG) */
  80. #define SDT_OP_REGEX2 "^(\\-)?([0-9]+)\\((%r)?([1-2]?[0-9]|3[0-1])\\)$"
  81. static regex_t sdt_op_regex1, sdt_op_regex2;
  82. static int sdt_init_op_regex(void)
  83. {
  84. static int initialized;
  85. int ret = 0;
  86. if (initialized)
  87. return 0;
  88. ret = regcomp(&sdt_op_regex1, SDT_OP_REGEX1, REG_EXTENDED);
  89. if (ret)
  90. goto error;
  91. ret = regcomp(&sdt_op_regex2, SDT_OP_REGEX2, REG_EXTENDED);
  92. if (ret)
  93. goto free_regex1;
  94. initialized = 1;
  95. return 0;
  96. free_regex1:
  97. regfree(&sdt_op_regex1);
  98. error:
  99. pr_debug4("Regex compilation error.\n");
  100. return ret;
  101. }
  102. /*
  103. * Parse OP and convert it into uprobe format, which is, +/-NUM(%gprREG).
  104. * Possible variants of OP are:
  105. * Format Example
  106. * -------------------------
  107. * NUM(REG) 48(18)
  108. * -NUM(REG) -48(18)
  109. * NUM(%rREG) 48(%r18)
  110. * -NUM(%rREG) -48(%r18)
  111. * REG 18
  112. * %rREG %r18
  113. * iNUM i0
  114. * i-NUM i-1
  115. *
  116. * SDT marker arguments on Powerpc uses %rREG form with -mregnames flag
  117. * and REG form with -mno-regnames. Here REG is general purpose register,
  118. * which is in 0 to 31 range.
  119. */
  120. int arch_sdt_arg_parse_op(char *old_op, char **new_op)
  121. {
  122. int ret, new_len;
  123. regmatch_t rm[5];
  124. char prefix;
  125. /* Constant argument. Uprobe does not support it */
  126. if (old_op[0] == 'i') {
  127. pr_debug4("Skipping unsupported SDT argument: %s\n", old_op);
  128. return SDT_ARG_SKIP;
  129. }
  130. ret = sdt_init_op_regex();
  131. if (ret < 0)
  132. return ret;
  133. if (!regexec(&sdt_op_regex1, old_op, 3, rm, 0)) {
  134. /* REG or %rREG --> %gprREG */
  135. new_len = 5; /* % g p r NULL */
  136. new_len += (int)(rm[2].rm_eo - rm[2].rm_so);
  137. *new_op = zalloc(new_len);
  138. if (!*new_op)
  139. return -ENOMEM;
  140. scnprintf(*new_op, new_len, "%%gpr%.*s",
  141. (int)(rm[2].rm_eo - rm[2].rm_so), old_op + rm[2].rm_so);
  142. } else if (!regexec(&sdt_op_regex2, old_op, 5, rm, 0)) {
  143. /*
  144. * -NUM(REG) or NUM(REG) or -NUM(%rREG) or NUM(%rREG) -->
  145. * +/-NUM(%gprREG)
  146. */
  147. prefix = (rm[1].rm_so == -1) ? '+' : '-';
  148. new_len = 8; /* +/- ( % g p r ) NULL */
  149. new_len += (int)(rm[2].rm_eo - rm[2].rm_so);
  150. new_len += (int)(rm[4].rm_eo - rm[4].rm_so);
  151. *new_op = zalloc(new_len);
  152. if (!*new_op)
  153. return -ENOMEM;
  154. scnprintf(*new_op, new_len, "%c%.*s(%%gpr%.*s)", prefix,
  155. (int)(rm[2].rm_eo - rm[2].rm_so), old_op + rm[2].rm_so,
  156. (int)(rm[4].rm_eo - rm[4].rm_so), old_op + rm[4].rm_so);
  157. } else {
  158. pr_debug4("Skipping unsupported SDT argument: %s\n", old_op);
  159. return SDT_ARG_SKIP;
  160. }
  161. return SDT_ARG_VALID;
  162. }
  163. uint64_t arch__intr_reg_mask(void)
  164. {
  165. struct perf_event_attr attr = {
  166. .type = PERF_TYPE_HARDWARE,
  167. .config = PERF_COUNT_HW_CPU_CYCLES,
  168. .sample_type = PERF_SAMPLE_REGS_INTR,
  169. .precise_ip = 1,
  170. .disabled = 1,
  171. .exclude_kernel = 1,
  172. };
  173. int fd;
  174. u32 version;
  175. u64 extended_mask = 0, mask = PERF_REGS_MASK;
  176. /*
  177. * Get the PVR value to set the extended
  178. * mask specific to platform.
  179. */
  180. version = (((mfspr(SPRN_PVR)) >> 16) & 0xFFFF);
  181. if (version == PVR_POWER9)
  182. extended_mask = PERF_REG_PMU_MASK_300;
  183. else if (version == PVR_POWER10)
  184. extended_mask = PERF_REG_PMU_MASK_31;
  185. else
  186. return mask;
  187. attr.sample_regs_intr = extended_mask;
  188. attr.sample_period = 1;
  189. event_attr_init(&attr);
  190. /*
  191. * check if the pmu supports perf extended regs, before
  192. * returning the register mask to sample.
  193. */
  194. fd = sys_perf_event_open(&attr, 0, -1, -1, 0);
  195. if (fd != -1) {
  196. close(fd);
  197. mask |= extended_mask;
  198. }
  199. return mask;
  200. }