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/wirish/boards/maple_native/board.cpp

https://github.com/torfbolt/libmaple
C++ | 197 lines | 140 code | 21 blank | 36 comment | 0 complexity | 7d42df3a8a7e049454f8002cd3606fbb MD5 | raw file
    

  1. /******************************************************************************
    2. 

  2.  * The MIT License
    3. 

  3.  *
    4. 

  4.  * Copyright (c) 2011 LeafLabs, LLC.
    5. 

  5.  *
    6. 

  6.  * Permission is hereby granted, free of charge, to any person
    7. 

  7.  * obtaining a copy of this software and associated documentation
    8. 

  8.  * files (the "Software"), to deal in the Software without
    9. 

  9.  * restriction, including without limitation the rights to use, copy,
    10. 

  10.  * modify, merge, publish, distribute, sublicense, and/or sell copies
    11. 

  11.  * of the Software, and to permit persons to whom the Software is
    12. 

  12.  * furnished to do so, subject to the following conditions:
    13. 

  13.  *
    14. 

  14.  * The above copyright notice and this permission notice shall be
    15. 

  15.  * included in all copies or substantial portions of the Software.
    16. 

  16.  *
    17. 

  17.  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
    18. 

  18.  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
    19. 

  19.  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
    20. 

  20.  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
    21. 

  21.  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
    22. 

  22.  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
    23. 

  23.  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
    24. 

  24.  * SOFTWARE.
    25. 

  25.  *****************************************************************************/
    26. 

  26. 

  27. /**
    28. 

  28.  * @file   wirish/boards/maple_native/board.cpp
    29. 

  29.  * @author Marti Bolivar <mbolivar@leaflabs.com>
    30. 

  30.  * @brief  Maple Native board file.
    31. 

  31.  */
    32. 

  32. 

  33. #include <board/board.h>
    34. 

  34. 

  35. #include <libmaple/fsmc.h>
    36. 

  36. #include <libmaple/gpio.h>
    37. 

  37. #include <libmaple/rcc.h>
    38. 

  38. #include <libmaple/timer.h>
    39. 

  39. 

  40. #include <wirish/wirish_types.h>
    41. 

  41. 

  42. static void initSRAMChip(void);
    43. 

  43. 

  44. void boardInit(void) {
    45. 

  45.     initSRAMChip();
    46. 

  46. }
    47. 

  47. 

  48. extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = {
    49. 

  49. 

  50.     /* Top header */
    51. 

  51. 

  52.     {GPIOB,   NULL, NULL, 10, 0, ADCx}, /* D0/PB10 */
    53. 

  53.     {GPIOB,   NULL, NULL, 11, 0, ADCx}, /* D1/PB11 */
    54. 

  54.     {GPIOB,   NULL, NULL, 12, 0, ADCx}, /* D2/PB12 */
    55. 

  55.     {GPIOB,   NULL, NULL, 13, 0, ADCx}, /* D3/PB13 */
    56. 

  56.     {GPIOB,   NULL, NULL, 14, 0, ADCx}, /* D4/PB14 */
    57. 

  57.     {GPIOB,   NULL, NULL, 15, 0, ADCx}, /* D5/PB15 */
    58. 

  58.     {GPIOG,   NULL, NULL, 15, 0, ADCx}, /* D6/PG15 (BUT) */
    59. 

  59.     {GPIOC,   NULL, ADC1,  0, 0,   10}, /* D7/PC0 */
    60. 

  60.     {GPIOC,   NULL, ADC1,  1, 0,   11}, /* D8/PC1 */
    61. 

  61.     {GPIOC,   NULL, ADC1,  2, 0,   12}, /* D9/PC2 */
    62. 

  62.     {GPIOC,   NULL, ADC1,  3, 0,   13}, /* D10/PC3 */
    63. 

  63.     {GPIOC,   NULL, ADC1,  4, 0,   14}, /* D11/PC4 */
    64. 

  64.     {GPIOC,   NULL, ADC1,  5, 0,   15}, /* D12/PC5 */
    65. 

  65.     {GPIOC, TIMER8, NULL,  6, 1, ADCx}, /* D13/PC6 */
    66. 

  66.     {GPIOC, TIMER8, NULL,  7, 2, ADCx}, /* D14/PC7 */
    67. 

  67.     {GPIOC, TIMER8, NULL,  8, 3, ADCx}, /* D15/PC8 */
    68. 

  68.     {GPIOC, TIMER8, NULL,  9, 4, ADCx}, /* D16/PC9 */
    69. 

  69.     {GPIOC,   NULL, NULL, 10, 0, ADCx}, /* D17/PC10 */
    70. 

  70.     {GPIOC,   NULL, NULL, 11, 0, ADCx}, /* D18/PC11 */
    71. 

  71.     {GPIOC,   NULL, NULL, 12, 0, ADCx}, /* D19/PC12 */
    72. 

  72.     {GPIOC,   NULL, NULL, 13, 0, ADCx}, /* D20/PC13 */
    73. 

  73.     {GPIOC,   NULL, NULL, 14, 0, ADCx}, /* D21/PC14 */
    74. 

  74.     {GPIOC,   NULL, NULL, 15, 0, ADCx}, /* D22/PC15 (LED) */
    75. 

  75.     {GPIOA, TIMER1, NULL,  8, 1, ADCx}, /* D23/PA8 */
    76. 

  76.     {GPIOA, TIMER1, NULL,  9, 2, ADCx}, /* D24/PA9 */
    77. 

  77.     {GPIOA, TIMER1, NULL, 10, 3, ADCx}, /* D25/PA10 */
    78. 

  78.     {GPIOB, TIMER4, NULL,  9, 4, ADCx}, /* D26/PB9 */
    79. 

  79. 

  80.     /* Bottom header */
    81. 

  81.     /* Note: D{48, 49, 50, 51} are also TIMER2_CH{1, 2, 3, 4}, respectively. */
    82. 

  82.     /* TODO remap timer 2 in boardInit(); make the appropriate changes here */
    83. 

  83. 

  84.     {GPIOD,   NULL, NULL,  2, 0, ADCx}, /* D27/PD2 */
    85. 

  85.     {GPIOD,   NULL, NULL,  3, 0, ADCx}, /* D28/PD3 */
    86. 

  86.     {GPIOD,   NULL, NULL,  6, 0, ADCx}, /* D29/PD6 */
    87. 

  87.     {GPIOG,   NULL, NULL, 11, 0, ADCx}, /* D30/PG11 */
    88. 

  88.     {GPIOG,   NULL, NULL, 12, 0, ADCx}, /* D31/PG12 */
    89. 

  89.     {GPIOG,   NULL, NULL, 13, 0, ADCx}, /* D32/PG13 */
    90. 

  90.     {GPIOG,   NULL, NULL, 14, 0, ADCx}, /* D33/PG14 */
    91. 

  91.     {GPIOG,   NULL, NULL,  8, 0, ADCx}, /* D34/PG8 */
    92. 

  92.     {GPIOG,   NULL, NULL,  7, 0, ADCx}, /* D35/PG7 */
    93. 

  93.     {GPIOG,   NULL, NULL,  6, 0, ADCx}, /* D36/PG6 */
    94. 

  94.     {GPIOB,   NULL, NULL,  5, 0, ADCx}, /* D37/PB5 */
    95. 

  95.     {GPIOB, TIMER4, NULL,  6, 1, ADCx}, /* D38/PB6 */
    96. 

  96.     {GPIOB, TIMER4, NULL,  7, 2, ADCx}, /* D39/PB7 */
    97. 

  97.     {GPIOF,   NULL, NULL, 11, 0, ADCx}, /* D40/PF11 */
    98. 

  98.     {GPIOF,   NULL, ADC3,  6, 0,    4}, /* D41/PF6 */
    99. 

  99.     {GPIOF,   NULL, ADC3,  7, 0,    5}, /* D42/PF7 */
    100. 

  100.     {GPIOF,   NULL, ADC3,  8, 0,    6}, /* D43/PF8 */
    101. 

  101.     {GPIOF,   NULL, ADC3,  9, 0,    7}, /* D44/PF9 */
    102. 

  102.     {GPIOF,   NULL, ADC3, 10, 0,    8}, /* D45/PF10 */
    103. 

  103.     {GPIOB, TIMER3, ADC1,  1, 4,    9}, /* D46/PB1 */
    104. 

  104.     {GPIOB, TIMER3, ADC1,  0, 3,    8}, /* D47/PB0 */
    105. 

  105.     {GPIOA, TIMER5, ADC1,  0, 1,    0}, /* D48/PA0 */
    106. 

  106.     {GPIOA, TIMER5, ADC1,  1, 2,    1}, /* D49/PA1 */
    107. 

  107.     {GPIOA, TIMER5, ADC1,  2, 3,    2}, /* D50/PA2 */
    108. 

  108.     {GPIOA, TIMER5, ADC1,  3, 4,    3}, /* D51/PA3 */
    109. 

  109.     {GPIOA,   NULL, ADC1,  4, 0,    4}, /* D52/PA4 */
    110. 

  110.     {GPIOA,   NULL, ADC1,  5, 0,    5}, /* D53/PA5 */
    111. 

  111.     {GPIOA, TIMER3, ADC1,  6, 1,    6}, /* D54/PA6 */
    112. 

  112.     {GPIOA, TIMER3, ADC1,  7, 2,    7}, /* D55/PA7 */
    113. 

  113. 

  114.     /* FSMC (triple) header */
    115. 

  115. 

  116.     {GPIOF,   NULL, NULL,  0, 0, ADCx}, /* D56/PF0 */
    117. 

  117.     {GPIOD,   NULL, NULL, 11, 0, ADCx}, /* D57/PD11 */
    118. 

  118.     {GPIOD,   NULL, NULL, 14, 0, ADCx}, /* D58/PD14 */
    119. 

  119.     {GPIOF,   NULL, NULL,  1, 0, ADCx}, /* D59/PF1 */
    120. 

  120.     {GPIOD,   NULL, NULL, 12, 0, ADCx}, /* D60/PD12 */
    121. 

  121.     {GPIOD,   NULL, NULL, 15, 0, ADCx}, /* D61/PD15 */
    122. 

  122.     {GPIOF,   NULL, NULL,  2, 0, ADCx}, /* D62/PF2 */
    123. 

  123.     {GPIOD,   NULL, NULL, 13, 0, ADCx}, /* D63/PD13 */
    124. 

  124.     {GPIOD,   NULL, NULL,  0, 0, ADCx}, /* D64/PD0 */
    125. 

  125.     {GPIOF,   NULL, NULL,  3, 0, ADCx}, /* D65/PF3 */
    126. 

  126.     {GPIOE,   NULL, NULL,  3, 0, ADCx}, /* D66/PE3 */
    127. 

  127.     {GPIOD,   NULL, NULL,  1, 0, ADCx}, /* D67/PD1 */
    128. 

  128.     {GPIOF,   NULL, NULL,  4, 0, ADCx}, /* D68/PF4 */
    129. 

  129.     {GPIOE,   NULL, NULL,  4, 0, ADCx}, /* D69/PE4 */
    130. 

  130.     {GPIOE,   NULL, NULL,  7, 0, ADCx}, /* D70/PE7 */
    131. 

  131.     {GPIOF,   NULL, NULL,  5, 0, ADCx}, /* D71/PF5 */
    132. 

  132.     {GPIOE,   NULL, NULL,  5, 0, ADCx}, /* D72/PE5 */
    133. 

  133.     {GPIOE,   NULL, NULL,  8, 0, ADCx}, /* D73/PE8 */
    134. 

  134.     {GPIOF,   NULL, NULL, 12, 0, ADCx}, /* D74/PF12 */
    135. 

  135.     {GPIOE,   NULL, NULL,  6, 0, ADCx}, /* D75/PE6 */
    136. 

  136.     {GPIOE,   NULL, NULL,  9, 0, ADCx}, /* D76/PE9 */
    137. 

  137.     {GPIOF,   NULL, NULL, 13, 0, ADCx}, /* D77/PF13 */
    138. 

  138.     {GPIOE,   NULL, NULL, 10, 0, ADCx}, /* D78/PE10 */
    139. 

  139.     {GPIOF,   NULL, NULL, 14, 0, ADCx}, /* D79/PF14 */
    140. 

  140.     {GPIOG,   NULL, NULL,  9, 0, ADCx}, /* D80/PG9 */
    141. 

  141.     {GPIOE,   NULL, NULL, 11, 0, ADCx}, /* D81/PE11 */
    142. 

  142.     {GPIOF,   NULL, NULL, 15, 0, ADCx}, /* D82/PF15 */
    143. 

  143.     {GPIOG,   NULL, NULL, 10, 0, ADCx}, /* D83/PG10 */
    144. 

  144.     {GPIOE,   NULL, NULL, 12, 0, ADCx}, /* D84/PE12 */
    145. 

  145.     {GPIOG,   NULL, NULL,  0, 0, ADCx}, /* D85/PG0 */
    146. 

  146.     {GPIOD,   NULL, NULL,  5, 0, ADCx}, /* D86/PD5 */
    147. 

  147.     {GPIOE,   NULL, NULL, 13, 0, ADCx}, /* D87/PE13 */
    148. 

  148.     {GPIOG,   NULL, NULL,  1, 0, ADCx}, /* D88/PG1 */
    149. 

  149.     {GPIOD,   NULL, NULL,  4, 0, ADCx}, /* D89/PD4 */
    150. 

  150.     {GPIOE,   NULL, NULL, 14, 0, ADCx}, /* D90/PE14 */
    151. 

  151.     {GPIOG,   NULL, NULL,  2, 0, ADCx}, /* D91/PG2 */
    152. 

  152.     {GPIOE,   NULL, NULL,  1, 0, ADCx}, /* D92/PE1 */
    153. 

  153.     {GPIOE,   NULL, NULL, 15, 0, ADCx}, /* D93/PE15 */
    154. 

  154.     {GPIOG,   NULL, NULL,  3, 0, ADCx}, /* D94/PG3 */
    155. 

  155.     {GPIOE,   NULL, NULL,  0, 0, ADCx}, /* D95/PE0 */
    156. 

  156.     {GPIOD,   NULL, NULL,  8, 0, ADCx}, /* D96/PD8 */
    157. 

  157.     {GPIOG,   NULL, NULL,  4, 0, ADCx}, /* D97/PG4 */
    158. 

  158.     {GPIOD,   NULL, NULL,  9, 0, ADCx}, /* D98/PD9 */
    159. 

  159.     {GPIOG,   NULL, NULL,  5, 0, ADCx}, /* D99/PG5 */
    160. 

  160.     {GPIOD,   NULL, NULL, 10, 0, ADCx}, /* D100/PD10 */
    161. 

  161. 

  162.     /* JTAG header */
    163. 

  163. 

  164.     {GPIOA,   NULL, NULL, 13, 0, ADCx}, /* D101/PA13 */
    165. 

  165.     {GPIOA,   NULL, NULL, 14, 0, ADCx}, /* D102/PA14 */
    166. 

  166.     {GPIOA,   NULL, NULL, 15, 0, ADCx}, /* D103/PA15 */
    167. 

  167.     {GPIOB,   NULL, NULL,  3, 0, ADCx}, /* D104/PB3  */
    168. 

  168.     {GPIOB,   NULL, NULL,  4, 0, ADCx}  /* D105/PB4  */
    169. 

  169. };
    170. 

  170. 

  171. extern const uint8 boardPWMPins[BOARD_NR_PWM_PINS] __FLASH__ = {
    172. 

  172.     13, 14, 15, 16, 23, 24, 25, 26, 38, 39, 46, 47, 48, 49, 50, 51, 54, 55
    173. 

  173. };
    174. 

  174. 

  175. extern const uint8 boardADCPins[BOARD_NR_ADC_PINS] __FLASH__ = {
    176. 

  176.     7, 8, 9, 10, 11, 12, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
    177. 

  177.     54, 55
    178. 

  178. };
    179. 

  179. 

  180. extern const uint8 boardUsedPins[BOARD_NR_USED_PINS] __FLASH__ = {
    181. 

  181.     BOARD_LED_PIN, BOARD_BUTTON_PIN, BOARD_JTMS_SWDIO_PIN,
    182. 

  182.     BOARD_JTCK_SWCLK_PIN, BOARD_JTDI_PIN, BOARD_JTDO_PIN, BOARD_NJTRST_PIN,
    183. 

  183.     56, 58, 59, 61, 62, 64, 65, 67, 68, 70, 71, 73, 74, 76, 77, 78, 79, 81,
    184. 

  184.     82, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100
    185. 

  185. };
    186. 

  186. 

  187. static void initSRAMChip(void) {
    188. 

  188.     fsmc_nor_psram_reg_map *regs = FSMC_NOR_PSRAM1_BASE;
    189. 

  189. 

  190.     fsmc_sram_init_gpios();
    191. 

  191.     rcc_clk_enable(RCC_FSMC);
    192. 

  192. 

  193.     regs->BCR = (FSMC_BCR_WREN | FSMC_BCR_MWID_16BITS | FSMC_BCR_MTYP_SRAM |
    194. 

  194.                  FSMC_BCR_MBKEN);
    195. 

  195.     fsmc_nor_psram_set_addset(regs, 0);
    196. 

  196.     fsmc_nor_psram_set_datast(regs, 3);
    197. 

  197. }
    198. 

  198.