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/drivers/i2c/soft_i2c.c

https://github.com/zhanggf/U-boot-2009.11_tekkaman
C | 428 lines | 265 code | 43 blank | 120 comment | 18 complexity | 16c53f79497c1019732dea62b46d4dfa MD5 | raw file
  1. /*
  2. * (C) Copyright 2001, 2002
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
  24. * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
  25. * Neil Russell.
  26. */
  27. #include <common.h>
  28. #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
  29. #include <ioports.h>
  30. #include <asm/io.h>
  31. #endif
  32. #ifdef CONFIG_AT91RM9200 /* need this for the at91rm9200 */
  33. #include <asm/io.h>
  34. #include <asm/arch/hardware.h>
  35. #endif
  36. #ifdef CONFIG_IXP425 /* only valid for IXP425 */
  37. #include <asm/arch/ixp425.h>
  38. #endif
  39. #ifdef CONFIG_LPC2292
  40. #include <asm/arch/hardware.h>
  41. #endif
  42. #if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866)
  43. #include <asm/io.h>
  44. #endif
  45. #include <i2c.h>
  46. /* #define DEBUG_I2C */
  47. #ifdef DEBUG_I2C
  48. DECLARE_GLOBAL_DATA_PTR;
  49. #endif
  50. /*-----------------------------------------------------------------------
  51. * Definitions
  52. */
  53. #define RETRIES 0
  54. #define I2C_ACK 0 /* PD_SDA level to ack a byte */
  55. #define I2C_NOACK 1 /* PD_SDA level to noack a byte */
  56. #ifdef DEBUG_I2C
  57. #define PRINTD(fmt,args...) do { \
  58. if (gd->have_console) \
  59. printf (fmt ,##args); \
  60. } while (0)
  61. #else
  62. #define PRINTD(fmt,args...)
  63. #endif
  64. #if defined(CONFIG_I2C_MULTI_BUS)
  65. static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0;
  66. #endif /* CONFIG_I2C_MULTI_BUS */
  67. /*-----------------------------------------------------------------------
  68. * Local functions
  69. */
  70. #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
  71. static void send_reset (void);
  72. #endif
  73. static void send_start (void);
  74. static void send_stop (void);
  75. static void send_ack (int);
  76. static int write_byte (uchar byte);
  77. static uchar read_byte (int);
  78. #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
  79. /*-----------------------------------------------------------------------
  80. * Send a reset sequence consisting of 9 clocks with the data signal high
  81. * to clock any confused device back into an idle state. Also send a
  82. * <stop> at the end of the sequence for belts & suspenders.
  83. */
  84. static void send_reset(void)
  85. {
  86. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  87. int j;
  88. I2C_SCL(1);
  89. I2C_SDA(1);
  90. #ifdef I2C_INIT
  91. I2C_INIT;
  92. #endif
  93. I2C_TRISTATE;
  94. for(j = 0; j < 9; j++) {
  95. I2C_SCL(0);
  96. I2C_DELAY;
  97. I2C_DELAY;
  98. I2C_SCL(1);
  99. I2C_DELAY;
  100. I2C_DELAY;
  101. }
  102. send_stop();
  103. I2C_TRISTATE;
  104. }
  105. #endif
  106. /*-----------------------------------------------------------------------
  107. * START: High -> Low on SDA while SCL is High
  108. */
  109. static void send_start(void)
  110. {
  111. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  112. I2C_DELAY;
  113. I2C_SDA(1);
  114. I2C_ACTIVE;
  115. I2C_DELAY;
  116. I2C_SCL(1);
  117. I2C_DELAY;
  118. I2C_SDA(0);
  119. I2C_DELAY;
  120. }
  121. /*-----------------------------------------------------------------------
  122. * STOP: Low -> High on SDA while SCL is High
  123. */
  124. static void send_stop(void)
  125. {
  126. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  127. I2C_SCL(0);
  128. I2C_DELAY;
  129. I2C_SDA(0);
  130. I2C_ACTIVE;
  131. I2C_DELAY;
  132. I2C_SCL(1);
  133. I2C_DELAY;
  134. I2C_SDA(1);
  135. I2C_DELAY;
  136. I2C_TRISTATE;
  137. }
  138. /*-----------------------------------------------------------------------
  139. * ack should be I2C_ACK or I2C_NOACK
  140. */
  141. static void send_ack(int ack)
  142. {
  143. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  144. I2C_SCL(0);
  145. I2C_DELAY;
  146. I2C_ACTIVE;
  147. I2C_SDA(ack);
  148. I2C_DELAY;
  149. I2C_SCL(1);
  150. I2C_DELAY;
  151. I2C_DELAY;
  152. I2C_SCL(0);
  153. I2C_DELAY;
  154. }
  155. /*-----------------------------------------------------------------------
  156. * Send 8 bits and look for an acknowledgement.
  157. */
  158. static int write_byte(uchar data)
  159. {
  160. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  161. int j;
  162. int nack;
  163. I2C_ACTIVE;
  164. for(j = 0; j < 8; j++) {
  165. I2C_SCL(0);
  166. I2C_DELAY;
  167. I2C_SDA(data & 0x80);
  168. I2C_DELAY;
  169. I2C_SCL(1);
  170. I2C_DELAY;
  171. I2C_DELAY;
  172. data <<= 1;
  173. }
  174. /*
  175. * Look for an <ACK>(negative logic) and return it.
  176. */
  177. I2C_SCL(0);
  178. I2C_DELAY;
  179. I2C_SDA(1);
  180. I2C_TRISTATE;
  181. I2C_DELAY;
  182. I2C_SCL(1);
  183. I2C_DELAY;
  184. I2C_DELAY;
  185. nack = I2C_READ;
  186. I2C_SCL(0);
  187. I2C_DELAY;
  188. I2C_ACTIVE;
  189. return(nack); /* not a nack is an ack */
  190. }
  191. #if defined(CONFIG_I2C_MULTI_BUS)
  192. /*
  193. * Functions for multiple I2C bus handling
  194. */
  195. unsigned int i2c_get_bus_num(void)
  196. {
  197. return i2c_bus_num;
  198. }
  199. int i2c_set_bus_num(unsigned int bus)
  200. {
  201. #if defined(CONFIG_I2C_MUX)
  202. if (bus < CONFIG_SYS_MAX_I2C_BUS) {
  203. i2c_bus_num = bus;
  204. } else {
  205. int ret;
  206. ret = i2x_mux_select_mux(bus);
  207. if (ret == 0)
  208. i2c_bus_num = bus;
  209. else
  210. return ret;
  211. }
  212. #else
  213. if (bus >= CONFIG_SYS_MAX_I2C_BUS)
  214. return -1;
  215. i2c_bus_num = bus;
  216. #endif
  217. return 0;
  218. }
  219. #endif
  220. /*-----------------------------------------------------------------------
  221. * if ack == I2C_ACK, ACK the byte so can continue reading, else
  222. * send I2C_NOACK to end the read.
  223. */
  224. static uchar read_byte(int ack)
  225. {
  226. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  227. int data;
  228. int j;
  229. /*
  230. * Read 8 bits, MSB first.
  231. */
  232. I2C_TRISTATE;
  233. I2C_SDA(1);
  234. data = 0;
  235. for(j = 0; j < 8; j++) {
  236. I2C_SCL(0);
  237. I2C_DELAY;
  238. I2C_SCL(1);
  239. I2C_DELAY;
  240. data <<= 1;
  241. data |= I2C_READ;
  242. I2C_DELAY;
  243. }
  244. send_ack(ack);
  245. return(data);
  246. }
  247. /*=====================================================================*/
  248. /* Public Functions */
  249. /*=====================================================================*/
  250. /*-----------------------------------------------------------------------
  251. * Initialization
  252. */
  253. void i2c_init (int speed, int slaveaddr)
  254. {
  255. #if defined(CONFIG_SYS_I2C_INIT_BOARD)
  256. /* call board specific i2c bus reset routine before accessing the */
  257. /* environment, which might be in a chip on that bus. For details */
  258. /* about this problem see doc/I2C_Edge_Conditions. */
  259. i2c_init_board();
  260. #else
  261. /*
  262. * WARNING: Do NOT save speed in a static variable: if the
  263. * I2C routines are called before RAM is initialized (to read
  264. * the DIMM SPD, for instance), RAM won't be usable and your
  265. * system will crash.
  266. */
  267. send_reset ();
  268. #endif
  269. }
  270. /*-----------------------------------------------------------------------
  271. * Probe to see if a chip is present. Also good for checking for the
  272. * completion of EEPROM writes since the chip stops responding until
  273. * the write completes (typically 10mSec).
  274. */
  275. int i2c_probe(uchar addr)
  276. {
  277. int rc;
  278. /*
  279. * perform 1 byte write transaction with just address byte
  280. * (fake write)
  281. */
  282. send_start();
  283. rc = write_byte ((addr << 1) | 0);
  284. send_stop();
  285. return (rc ? 1 : 0);
  286. }
  287. /*-----------------------------------------------------------------------
  288. * Read bytes
  289. */
  290. int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
  291. {
  292. int shift;
  293. PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
  294. chip, addr, alen, buffer, len);
  295. #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
  296. /*
  297. * EEPROM chips that implement "address overflow" are ones
  298. * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
  299. * address and the extra bits end up in the "chip address"
  300. * bit slots. This makes a 24WC08 (1Kbyte) chip look like
  301. * four 256 byte chips.
  302. *
  303. * Note that we consider the length of the address field to
  304. * still be one byte because the extra address bits are
  305. * hidden in the chip address.
  306. */
  307. chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
  308. PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
  309. chip, addr);
  310. #endif
  311. /*
  312. * Do the addressing portion of a write cycle to set the
  313. * chip's address pointer. If the address length is zero,
  314. * don't do the normal write cycle to set the address pointer,
  315. * there is no address pointer in this chip.
  316. */
  317. send_start();
  318. if(alen > 0) {
  319. if(write_byte(chip << 1)) { /* write cycle */
  320. send_stop();
  321. PRINTD("i2c_read, no chip responded %02X\n", chip);
  322. return(1);
  323. }
  324. shift = (alen-1) * 8;
  325. while(alen-- > 0) {
  326. if(write_byte(addr >> shift)) {
  327. PRINTD("i2c_read, address not <ACK>ed\n");
  328. return(1);
  329. }
  330. shift -= 8;
  331. }
  332. /* Some I2C chips need a stop/start sequence here,
  333. * other chips don't work with a full stop and need
  334. * only a start. Default behaviour is to send the
  335. * stop/start sequence.
  336. */
  337. #ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
  338. send_start();
  339. #else
  340. send_stop();
  341. send_start();
  342. #endif
  343. }
  344. /*
  345. * Send the chip address again, this time for a read cycle.
  346. * Then read the data. On the last byte, we do a NACK instead
  347. * of an ACK(len == 0) to terminate the read.
  348. */
  349. write_byte((chip << 1) | 1); /* read cycle */
  350. while(len-- > 0) {
  351. *buffer++ = read_byte(len == 0);
  352. }
  353. send_stop();
  354. return(0);
  355. }
  356. /*-----------------------------------------------------------------------
  357. * Write bytes
  358. */
  359. int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
  360. {
  361. int shift, failures = 0;
  362. PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
  363. chip, addr, alen, buffer, len);
  364. send_start();
  365. if(write_byte(chip << 1)) { /* write cycle */
  366. send_stop();
  367. PRINTD("i2c_write, no chip responded %02X\n", chip);
  368. return(1);
  369. }
  370. shift = (alen-1) * 8;
  371. while(alen-- > 0) {
  372. if(write_byte(addr >> shift)) {
  373. PRINTD("i2c_write, address not <ACK>ed\n");
  374. return(1);
  375. }
  376. shift -= 8;
  377. }
  378. while(len-- > 0) {
  379. if(write_byte(*buffer++)) {
  380. failures++;
  381. }
  382. }
  383. send_stop();
  384. return(failures);
  385. }