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/drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c

https://github.com/gby/linux
C | 150 lines | 90 code | 14 blank | 46 comment | 0 complexity | 02623a0fe6c0a063e5d18cf22f2a3fd0 MD5 | raw file
  1. /*
  2. This file is provided under a dual BSD/GPLv2 license. When using or
  3. redistributing this file, you may do so under either license.
  4. GPL LICENSE SUMMARY
  5. Copyright(c) 2015 Intel Corporation.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of version 2 of the GNU General Public License as
  8. published by the Free Software Foundation.
  9. This program is distributed in the hope that it will be useful, but
  10. WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  12. General Public License for more details.
  13. Contact Information:
  14. qat-linux@intel.com
  15. BSD LICENSE
  16. Copyright(c) 2015 Intel Corporation.
  17. Redistribution and use in source and binary forms, with or without
  18. modification, are permitted provided that the following conditions
  19. are met:
  20. * Redistributions of source code must retain the above copyright
  21. notice, this list of conditions and the following disclaimer.
  22. * Redistributions in binary form must reproduce the above copyright
  23. notice, this list of conditions and the following disclaimer in
  24. the documentation and/or other materials provided with the
  25. distribution.
  26. * Neither the name of Intel Corporation nor the names of its
  27. contributors may be used to endorse or promote products derived
  28. from this software without specific prior written permission.
  29. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  30. "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  31. LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  32. A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  33. OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  34. SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  35. LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  36. DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  37. THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38. (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  39. OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40. */
  41. #include <adf_accel_devices.h>
  42. #include <adf_pf2vf_msg.h>
  43. #include <adf_common_drv.h>
  44. #include "adf_dh895xccvf_hw_data.h"
  45. static struct adf_hw_device_class dh895xcciov_class = {
  46. .name = ADF_DH895XCCVF_DEVICE_NAME,
  47. .type = DEV_DH895XCCVF,
  48. .instances = 0
  49. };
  50. static u32 get_accel_mask(u32 fuse)
  51. {
  52. return ADF_DH895XCCIOV_ACCELERATORS_MASK;
  53. }
  54. static u32 get_ae_mask(u32 fuse)
  55. {
  56. return ADF_DH895XCCIOV_ACCELENGINES_MASK;
  57. }
  58. static u32 get_num_accels(struct adf_hw_device_data *self)
  59. {
  60. return ADF_DH895XCCIOV_MAX_ACCELERATORS;
  61. }
  62. static u32 get_num_aes(struct adf_hw_device_data *self)
  63. {
  64. return ADF_DH895XCCIOV_MAX_ACCELENGINES;
  65. }
  66. static u32 get_misc_bar_id(struct adf_hw_device_data *self)
  67. {
  68. return ADF_DH895XCCIOV_PMISC_BAR;
  69. }
  70. static u32 get_etr_bar_id(struct adf_hw_device_data *self)
  71. {
  72. return ADF_DH895XCCIOV_ETR_BAR;
  73. }
  74. static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
  75. {
  76. return DEV_SKU_VF;
  77. }
  78. static u32 get_pf2vf_offset(u32 i)
  79. {
  80. return ADF_DH895XCCIOV_PF2VF_OFFSET;
  81. }
  82. static u32 get_vintmsk_offset(u32 i)
  83. {
  84. return ADF_DH895XCCIOV_VINTMSK_OFFSET;
  85. }
  86. static int adf_vf_int_noop(struct adf_accel_dev *accel_dev)
  87. {
  88. return 0;
  89. }
  90. static void adf_vf_void_noop(struct adf_accel_dev *accel_dev)
  91. {
  92. }
  93. void adf_init_hw_data_dh895xcciov(struct adf_hw_device_data *hw_data)
  94. {
  95. hw_data->dev_class = &dh895xcciov_class;
  96. hw_data->num_banks = ADF_DH895XCCIOV_ETR_MAX_BANKS;
  97. hw_data->num_accel = ADF_DH895XCCIOV_MAX_ACCELERATORS;
  98. hw_data->num_logical_accel = 1;
  99. hw_data->num_engines = ADF_DH895XCCIOV_MAX_ACCELENGINES;
  100. hw_data->tx_rx_gap = ADF_DH895XCCIOV_RX_RINGS_OFFSET;
  101. hw_data->tx_rings_mask = ADF_DH895XCCIOV_TX_RINGS_MASK;
  102. hw_data->alloc_irq = adf_vf_isr_resource_alloc;
  103. hw_data->free_irq = adf_vf_isr_resource_free;
  104. hw_data->enable_error_correction = adf_vf_void_noop;
  105. hw_data->init_admin_comms = adf_vf_int_noop;
  106. hw_data->exit_admin_comms = adf_vf_void_noop;
  107. hw_data->send_admin_init = adf_vf2pf_init;
  108. hw_data->init_arb = adf_vf_int_noop;
  109. hw_data->exit_arb = adf_vf_void_noop;
  110. hw_data->disable_iov = adf_vf2pf_shutdown;
  111. hw_data->get_accel_mask = get_accel_mask;
  112. hw_data->get_ae_mask = get_ae_mask;
  113. hw_data->get_num_accels = get_num_accels;
  114. hw_data->get_num_aes = get_num_aes;
  115. hw_data->get_etr_bar_id = get_etr_bar_id;
  116. hw_data->get_misc_bar_id = get_misc_bar_id;
  117. hw_data->get_pf2vf_offset = get_pf2vf_offset;
  118. hw_data->get_vintmsk_offset = get_vintmsk_offset;
  119. hw_data->get_sku = get_sku;
  120. hw_data->enable_ints = adf_vf_void_noop;
  121. hw_data->enable_vf2pf_comms = adf_enable_vf2pf_comms;
  122. hw_data->min_iov_compat_ver = ADF_PFVF_COMPATIBILITY_VERSION;
  123. hw_data->dev_class->instances++;
  124. adf_devmgr_update_class_index(hw_data);
  125. }
  126. void adf_clean_hw_data_dh895xcciov(struct adf_hw_device_data *hw_data)
  127. {
  128. hw_data->dev_class->instances--;
  129. adf_devmgr_update_class_index(hw_data);
  130. }