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/arch/arm/mach-realview/realview_pb11mp.c

https://bitbucket.org/Lloir/lge-kernel-jb
C | 390 lines | 314 code | 37 blank | 39 comment | 1 complexity | 88d90950367ed904d550f59e02e5a2f0 MD5 | raw file
    

  1. /*
    2. 

  2.  *  linux/arch/arm/mach-realview/realview_pb11mp.c
    3. 

  3.  *
    4. 

  4.  *  Copyright (C) 2008 ARM Limited
    5. 

  5.  *  Copyright (C) 2000 Deep Blue Solutions Ltd
    6. 

  6.  *
    7. 

  7.  * This program is free software; you can redistribute it and/or modify
    8. 

  8.  * it under the terms of the GNU General Public License as published by
    9. 

  9.  * the Free Software Foundation; either version 2 of the License, or
    10. 

  10.  * (at your option) any later version.
    11. 

  11.  *
    12. 

  12.  * This program is distributed in the hope that it will be useful,
    13. 

  13.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    14. 

  14.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    15. 

  15.  * GNU General Public License for more details.
    16. 

  16.  *
    17. 

  17.  * You should have received a copy of the GNU General Public License
    18. 

  18.  * along with this program; if not, write to the Free Software
    19. 

  19.  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
    20. 

  20.  */
    21. 

  21. 

  22. #include <linux/init.h>
    23. 

  23. #include <linux/platform_device.h>
    24. 

  24. #include <linux/sysdev.h>
    25. 

  25. #include <linux/amba/bus.h>
    26. 

  26. #include <linux/amba/pl061.h>
    27. 

  27. #include <linux/amba/mmci.h>
    28. 

  28. #include <linux/amba/pl022.h>
    29. 

  29. #include <linux/io.h>
    30. 

  30. 

  31. #include <mach/hardware.h>
    32. 

  32. #include <asm/irq.h>
    33. 

  33. #include <asm/leds.h>
    34. 

  34. #include <asm/mach-types.h>
    35. 

  35. #include <asm/pmu.h>
    36. 

  36. #include <asm/pgtable.h>
    37. 

  37. #include <asm/hardware/gic.h>
    38. 

  38. #include <asm/hardware/cache-l2x0.h>
    39. 

  39. #include <asm/localtimer.h>
    40. 

  40. 

  41. #include <asm/mach/arch.h>
    42. 

  42. #include <asm/mach/flash.h>
    43. 

  43. #include <asm/mach/map.h>
    44. 

  44. #include <asm/mach/time.h>
    45. 

  45. 

  46. #include <mach/board-pb11mp.h>
    47. 

  47. #include <mach/irqs.h>
    48. 

  48. 

  49. #include "core.h"
    50. 

  50. 

  51. static struct map_desc realview_pb11mp_io_desc[] __initdata = {
    52. 

  52. 	{
    53. 

  53. 		.virtual	= IO_ADDRESS(REALVIEW_SYS_BASE),
    54. 

  54. 		.pfn		= __phys_to_pfn(REALVIEW_SYS_BASE),
    55. 

  55. 		.length		= SZ_4K,
    56. 

  56. 		.type		= MT_DEVICE,
    57. 

  57. 	}, {
    58. 

  58. 		.virtual	= IO_ADDRESS(REALVIEW_PB11MP_GIC_CPU_BASE),
    59. 

  59. 		.pfn		= __phys_to_pfn(REALVIEW_PB11MP_GIC_CPU_BASE),
    60. 

  60. 		.length		= SZ_4K,
    61. 

  61. 		.type		= MT_DEVICE,
    62. 

  62. 	}, {
    63. 

  63. 		.virtual	= IO_ADDRESS(REALVIEW_PB11MP_GIC_DIST_BASE),
    64. 

  64. 		.pfn		= __phys_to_pfn(REALVIEW_PB11MP_GIC_DIST_BASE),
    65. 

  65. 		.length		= SZ_4K,
    66. 

  66. 		.type		= MT_DEVICE,
    67. 

  67. 	}, {
    68. 

  68. 		.virtual	= IO_ADDRESS(REALVIEW_TC11MP_GIC_CPU_BASE),
    69. 

  69. 		.pfn		= __phys_to_pfn(REALVIEW_TC11MP_GIC_CPU_BASE),
    70. 

  70. 		.length		= SZ_4K,
    71. 

  71. 		.type		= MT_DEVICE,
    72. 

  72. 	}, {
    73. 

  73. 		.virtual	= IO_ADDRESS(REALVIEW_TC11MP_GIC_DIST_BASE),
    74. 

  74. 		.pfn		= __phys_to_pfn(REALVIEW_TC11MP_GIC_DIST_BASE),
    75. 

  75. 		.length		= SZ_4K,
    76. 

  76. 		.type		= MT_DEVICE,
    77. 

  77. 	}, {
    78. 

  78. 		.virtual	= IO_ADDRESS(REALVIEW_SCTL_BASE),
    79. 

  79. 		.pfn		= __phys_to_pfn(REALVIEW_SCTL_BASE),
    80. 

  80. 		.length		= SZ_4K,
    81. 

  81. 		.type		= MT_DEVICE,
    82. 

  82. 	}, {
    83. 

  83. 		.virtual	= IO_ADDRESS(REALVIEW_PB11MP_TIMER0_1_BASE),
    84. 

  84. 		.pfn		= __phys_to_pfn(REALVIEW_PB11MP_TIMER0_1_BASE),
    85. 

  85. 		.length		= SZ_4K,
    86. 

  86. 		.type		= MT_DEVICE,
    87. 

  87. 	}, {
    88. 

  88. 		.virtual	= IO_ADDRESS(REALVIEW_PB11MP_TIMER2_3_BASE),
    89. 

  89. 		.pfn		= __phys_to_pfn(REALVIEW_PB11MP_TIMER2_3_BASE),
    90. 

  90. 		.length		= SZ_4K,
    91. 

  91. 		.type		= MT_DEVICE,
    92. 

  92. 	}, {
    93. 

  93. 		.virtual	= IO_ADDRESS(REALVIEW_TC11MP_L220_BASE),
    94. 

  94. 		.pfn		= __phys_to_pfn(REALVIEW_TC11MP_L220_BASE),
    95. 

  95. 		.length		= SZ_8K,
    96. 

  96. 		.type		= MT_DEVICE,
    97. 

  97. 	},
    98. 

  98. #ifdef CONFIG_DEBUG_LL
    99. 

  99. 	{
    100. 

  100. 		.virtual	= IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE),
    101. 

  101. 		.pfn		= __phys_to_pfn(REALVIEW_PB11MP_UART0_BASE),
    102. 

  102. 		.length		= SZ_4K,
    103. 

  103. 		.type		= MT_DEVICE,
    104. 

  104. 	},
    105. 

  105. #endif
    106. 

  106. };
    107. 

  107. 

  108. static void __init realview_pb11mp_map_io(void)
    109. 

  109. {
    110. 

  110. 	iotable_init(realview_pb11mp_io_desc, ARRAY_SIZE(realview_pb11mp_io_desc));
    111. 

  111. }
    112. 

  112. 

  113. static struct pl061_platform_data gpio0_plat_data = {
    114. 

  114. 	.gpio_base	= 0,
    115. 

  115. 	.irq_base	= -1,
    116. 

  116. };
    117. 

  117. 

  118. static struct pl061_platform_data gpio1_plat_data = {
    119. 

  119. 	.gpio_base	= 8,
    120. 

  120. 	.irq_base	= -1,
    121. 

  121. };
    122. 

  122. 

  123. static struct pl061_platform_data gpio2_plat_data = {
    124. 

  124. 	.gpio_base	= 16,
    125. 

  125. 	.irq_base	= -1,
    126. 

  126. };
    127. 

  127. 

  128. static struct pl022_ssp_controller ssp0_plat_data = {
    129. 

  129. 	.bus_id = 0,
    130. 

  130. 	.enable_dma = 0,
    131. 

  131. 	.num_chipselect = 1,
    132. 

  132. };
    133. 

  133. 

  134. /*
    135. 

  135.  * RealView PB11MPCore AMBA devices
    136. 

  136.  */
    137. 

  137. 

  138. #define GPIO2_IRQ		{ IRQ_PB11MP_GPIO2, NO_IRQ }
    139. 

  139. #define GPIO2_DMA		{ 0, 0 }
    140. 

  140. #define GPIO3_IRQ		{ IRQ_PB11MP_GPIO3, NO_IRQ }
    141. 

  141. #define GPIO3_DMA		{ 0, 0 }
    142. 

  142. #define AACI_IRQ		{ IRQ_TC11MP_AACI, NO_IRQ }
    143. 

  143. #define AACI_DMA		{ 0x80, 0x81 }
    144. 

  144. #define MMCI0_IRQ		{ IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
    145. 

  145. #define MMCI0_DMA		{ 0x84, 0 }
    146. 

  146. #define KMI0_IRQ		{ IRQ_TC11MP_KMI0, NO_IRQ }
    147. 

  147. #define KMI0_DMA		{ 0, 0 }
    148. 

  148. #define KMI1_IRQ		{ IRQ_TC11MP_KMI1, NO_IRQ }
    149. 

  149. #define KMI1_DMA		{ 0, 0 }
    150. 

  150. #define PB11MP_SMC_IRQ		{ NO_IRQ, NO_IRQ }
    151. 

  151. #define PB11MP_SMC_DMA		{ 0, 0 }
    152. 

  152. #define MPMC_IRQ		{ NO_IRQ, NO_IRQ }
    153. 

  153. #define MPMC_DMA		{ 0, 0 }
    154. 

  154. #define PB11MP_CLCD_IRQ		{ IRQ_PB11MP_CLCD, NO_IRQ }
    155. 

  155. #define PB11MP_CLCD_DMA		{ 0, 0 }
    156. 

  156. #define DMAC_IRQ		{ IRQ_PB11MP_DMAC, NO_IRQ }
    157. 

  157. #define DMAC_DMA		{ 0, 0 }
    158. 

  158. #define SCTL_IRQ		{ NO_IRQ, NO_IRQ }
    159. 

  159. #define SCTL_DMA		{ 0, 0 }
    160. 

  160. #define PB11MP_WATCHDOG_IRQ	{ IRQ_PB11MP_WATCHDOG, NO_IRQ }
    161. 

  161. #define PB11MP_WATCHDOG_DMA	{ 0, 0 }
    162. 

  162. #define PB11MP_GPIO0_IRQ	{ IRQ_PB11MP_GPIO0, NO_IRQ }
    163. 

  163. #define PB11MP_GPIO0_DMA	{ 0, 0 }
    164. 

  164. #define GPIO1_IRQ		{ IRQ_PB11MP_GPIO1, NO_IRQ }
    165. 

  165. #define GPIO1_DMA		{ 0, 0 }
    166. 

  166. #define PB11MP_RTC_IRQ		{ IRQ_TC11MP_RTC, NO_IRQ }
    167. 

  167. #define PB11MP_RTC_DMA		{ 0, 0 }
    168. 

  168. #define SCI_IRQ			{ IRQ_PB11MP_SCI, NO_IRQ }
    169. 

  169. #define SCI_DMA			{ 7, 6 }
    170. 

  170. #define PB11MP_UART0_IRQ	{ IRQ_TC11MP_UART0, NO_IRQ }
    171. 

  171. #define PB11MP_UART0_DMA	{ 15, 14 }
    172. 

  172. #define PB11MP_UART1_IRQ	{ IRQ_TC11MP_UART1, NO_IRQ }
    173. 

  173. #define PB11MP_UART1_DMA	{ 13, 12 }
    174. 

  174. #define PB11MP_UART2_IRQ	{ IRQ_PB11MP_UART2, NO_IRQ }
    175. 

  175. #define PB11MP_UART2_DMA	{ 11, 10 }
    176. 

  176. #define PB11MP_UART3_IRQ	{ IRQ_PB11MP_UART3, NO_IRQ }
    177. 

  177. #define PB11MP_UART3_DMA	{ 0x86, 0x87 }
    178. 

  178. #define PB11MP_SSP_IRQ		{ IRQ_PB11MP_SSP, NO_IRQ }
    179. 

  179. #define PB11MP_SSP_DMA		{ 9, 8 }
    180. 

  180. 

  181. /* FPGA Primecells */
    182. 

  182. AMBA_DEVICE(aaci,	"fpga:aaci",	AACI,		NULL);
    183. 

  183. AMBA_DEVICE(mmc0,	"fpga:mmc0",	MMCI0,		&realview_mmc0_plat_data);
    184. 

  184. AMBA_DEVICE(kmi0,	"fpga:kmi0",	KMI0,		NULL);
    185. 

  185. AMBA_DEVICE(kmi1,	"fpga:kmi1",	KMI1,		NULL);
    186. 

  186. AMBA_DEVICE(uart3,	"fpga:uart3",	PB11MP_UART3,	NULL);
    187. 

  187. 

  188. /* DevChip Primecells */
    189. 

  189. AMBA_DEVICE(smc,	"dev:smc",	PB11MP_SMC,	NULL);
    190. 

  190. AMBA_DEVICE(sctl,	"dev:sctl",	SCTL,		NULL);
    191. 

  191. AMBA_DEVICE(wdog,	"dev:wdog",	PB11MP_WATCHDOG, NULL);
    192. 

  192. AMBA_DEVICE(gpio0,	"dev:gpio0",	PB11MP_GPIO0,	&gpio0_plat_data);
    193. 

  193. AMBA_DEVICE(gpio1,	"dev:gpio1",	GPIO1,		&gpio1_plat_data);
    194. 

  194. AMBA_DEVICE(gpio2,	"dev:gpio2",	GPIO2,		&gpio2_plat_data);
    195. 

  195. AMBA_DEVICE(rtc,	"dev:rtc",	PB11MP_RTC,	NULL);
    196. 

  196. AMBA_DEVICE(sci0,	"dev:sci0",	SCI,		NULL);
    197. 

  197. AMBA_DEVICE(uart0,	"dev:uart0",	PB11MP_UART0,	NULL);
    198. 

  198. AMBA_DEVICE(uart1,	"dev:uart1",	PB11MP_UART1,	NULL);
    199. 

  199. AMBA_DEVICE(uart2,	"dev:uart2",	PB11MP_UART2,	NULL);
    200. 

  200. AMBA_DEVICE(ssp0,	"dev:ssp0",	PB11MP_SSP,	&ssp0_plat_data);
    201. 

  201. 

  202. /* Primecells on the NEC ISSP chip */
    203. 

  203. AMBA_DEVICE(clcd,	"issp:clcd",	PB11MP_CLCD,	&clcd_plat_data);
    204. 

  204. AMBA_DEVICE(dmac,	"issp:dmac",	DMAC,		NULL);
    205. 

  205. 

  206. static struct amba_device *amba_devs[] __initdata = {
    207. 

  207. 	&dmac_device,
    208. 

  208. 	&uart0_device,
    209. 

  209. 	&uart1_device,
    210. 

  210. 	&uart2_device,
    211. 

  211. 	&uart3_device,
    212. 

  212. 	&smc_device,
    213. 

  213. 	&clcd_device,
    214. 

  214. 	&sctl_device,
    215. 

  215. 	&wdog_device,
    216. 

  216. 	&gpio0_device,
    217. 

  217. 	&gpio1_device,
    218. 

  218. 	&gpio2_device,
    219. 

  219. 	&rtc_device,
    220. 

  220. 	&sci0_device,
    221. 

  221. 	&ssp0_device,
    222. 

  222. 	&aaci_device,
    223. 

  223. 	&mmc0_device,
    224. 

  224. 	&kmi0_device,
    225. 

  225. 	&kmi1_device,
    226. 

  226. };
    227. 

  227. 

  228. /*
    229. 

  229.  * RealView PB11MPCore platform devices
    230. 

  230.  */
    231. 

  231. static struct resource realview_pb11mp_flash_resource[] = {
    232. 

  232. 	[0] = {
    233. 

  233. 		.start		= REALVIEW_PB11MP_FLASH0_BASE,
    234. 

  234. 		.end		= REALVIEW_PB11MP_FLASH0_BASE + REALVIEW_PB11MP_FLASH0_SIZE - 1,
    235. 

  235. 		.flags		= IORESOURCE_MEM,
    236. 

  236. 	},
    237. 

  237. 	[1] = {
    238. 

  238. 		.start		= REALVIEW_PB11MP_FLASH1_BASE,
    239. 

  239. 		.end		= REALVIEW_PB11MP_FLASH1_BASE + REALVIEW_PB11MP_FLASH1_SIZE - 1,
    240. 

  240. 		.flags		= IORESOURCE_MEM,
    241. 

  241. 	},
    242. 

  242. };
    243. 

  243. 

  244. static struct resource realview_pb11mp_smsc911x_resources[] = {
    245. 

  245. 	[0] = {
    246. 

  246. 		.start		= REALVIEW_PB11MP_ETH_BASE,
    247. 

  247. 		.end		= REALVIEW_PB11MP_ETH_BASE + SZ_64K - 1,
    248. 

  248. 		.flags		= IORESOURCE_MEM,
    249. 

  249. 	},
    250. 

  250. 	[1] = {
    251. 

  251. 		.start		= IRQ_TC11MP_ETH,
    252. 

  252. 		.end		= IRQ_TC11MP_ETH,
    253. 

  253. 		.flags		= IORESOURCE_IRQ,
    254. 

  254. 	},
    255. 

  255. };
    256. 

  256. 

  257. static struct resource realview_pb11mp_isp1761_resources[] = {
    258. 

  258. 	[0] = {
    259. 

  259. 		.start		= REALVIEW_PB11MP_USB_BASE,
    260. 

  260. 		.end		= REALVIEW_PB11MP_USB_BASE + SZ_128K - 1,
    261. 

  261. 		.flags		= IORESOURCE_MEM,
    262. 

  262. 	},
    263. 

  263. 	[1] = {
    264. 

  264. 		.start		= IRQ_TC11MP_USB,
    265. 

  265. 		.end		= IRQ_TC11MP_USB,
    266. 

  266. 		.flags		= IORESOURCE_IRQ,
    267. 

  267. 	},
    268. 

  268. };
    269. 

  269. 

  270. static struct resource pmu_resources[] = {
    271. 

  271. 	[0] = {
    272. 

  272. 		.start		= IRQ_TC11MP_PMU_CPU0,
    273. 

  273. 		.end		= IRQ_TC11MP_PMU_CPU0,
    274. 

  274. 		.flags		= IORESOURCE_IRQ,
    275. 

  275. 	},
    276. 

  276. 	[1] = {
    277. 

  277. 		.start		= IRQ_TC11MP_PMU_CPU1,
    278. 

  278. 		.end		= IRQ_TC11MP_PMU_CPU1,
    279. 

  279. 		.flags		= IORESOURCE_IRQ,
    280. 

  280. 	},
    281. 

  281. 	[2] = {
    282. 

  282. 		.start		= IRQ_TC11MP_PMU_CPU2,
    283. 

  283. 		.end		= IRQ_TC11MP_PMU_CPU2,
    284. 

  284. 		.flags		= IORESOURCE_IRQ,
    285. 

  285. 	},
    286. 

  286. 	[3] = {
    287. 

  287. 		.start		= IRQ_TC11MP_PMU_CPU3,
    288. 

  288. 		.end		= IRQ_TC11MP_PMU_CPU3,
    289. 

  289. 		.flags		= IORESOURCE_IRQ,
    290. 

  290. 	},
    291. 

  291. };
    292. 

  292. 

  293. static struct platform_device pmu_device = {
    294. 

  294. 	.name			= "arm-pmu",
    295. 

  295. 	.id			= ARM_PMU_DEVICE_CPU,
    296. 

  296. 	.num_resources		= ARRAY_SIZE(pmu_resources),
    297. 

  297. 	.resource		= pmu_resources,
    298. 

  298. };
    299. 

  299. 

  300. static void __init gic_init_irq(void)
    301. 

  301. {
    302. 

  302. 	unsigned int pldctrl;
    303. 

  303. 

  304. 	/* new irq mode with no DCC */
    305. 

  305. 	writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
    306. 

  306. 	pldctrl = readl(__io_address(REALVIEW_SYS_BASE)	+ REALVIEW_PB11MP_SYS_PLD_CTRL1);
    307. 

  307. 	pldctrl |= 2 << 22;
    308. 

  308. 	writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
    309. 

  309. 	writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
    310. 

  310. 

  311. 	/* ARM11MPCore test chip GIC, primary */
    312. 

  312. 	gic_init(0, 29, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE),
    313. 

  313. 		 __io_address(REALVIEW_TC11MP_GIC_CPU_BASE));
    314. 

  314. 

  315. 	/* board GIC, secondary */
    316. 

  316. 	gic_init(1, IRQ_PB11MP_GIC_START,
    317. 

  317. 		 __io_address(REALVIEW_PB11MP_GIC_DIST_BASE),
    318. 

  318. 		 __io_address(REALVIEW_PB11MP_GIC_CPU_BASE));
    319. 

  319. 	gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1);
    320. 

  320. }
    321. 

  321. 

  322. static void __init realview_pb11mp_timer_init(void)
    323. 

  323. {
    324. 

  324. 	timer0_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE);
    325. 

  325. 	timer1_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE) + 0x20;
    326. 

  326. 	timer2_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE);
    327. 

  327. 	timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20;
    328. 

  328. 

  329. #ifdef CONFIG_LOCAL_TIMERS
    330. 

  330. 	twd_base = __io_address(REALVIEW_TC11MP_TWD_BASE);
    331. 

  331. #endif
    332. 

  332. 	realview_timer_init(IRQ_TC11MP_TIMER0_1);
    333. 

  333. }
    334. 

  334. 

  335. static struct sys_timer realview_pb11mp_timer = {
    336. 

  336. 	.init		= realview_pb11mp_timer_init,
    337. 

  337. };
    338. 

  338. 

  339. static void realview_pb11mp_reset(char mode)
    340. 

  340. {
    341. 

  341. 	void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
    342. 

  342. 	void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
    343. 

  343. 

  344. 	/*
    345. 

  345. 	 * To reset, we hit the on-board reset register
    346. 

  346. 	 * in the system FPGA
    347. 

  347. 	 */
    348. 

  348. 	__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
    349. 

  349. 	__raw_writel(0x0000, reset_ctrl);
    350. 

  350. 	__raw_writel(0x0004, reset_ctrl);
    351. 

  351. }
    352. 

  352. 

  353. static void __init realview_pb11mp_init(void)
    354. 

  354. {
    355. 

  355. 	int i;
    356. 

  356. 

  357. #ifdef CONFIG_CACHE_L2X0
    358. 

  358. 	/* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
    359. 

  359. 	 * Bits:  .... ...0 0111 1001 0000 .... .... .... */
    360. 

  360. 	l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
    361. 

  361. #endif
    362. 

  362. 

  363. 	realview_flash_register(realview_pb11mp_flash_resource,
    364. 

  364. 				ARRAY_SIZE(realview_pb11mp_flash_resource));
    365. 

  365. 	realview_eth_register(NULL, realview_pb11mp_smsc911x_resources);
    366. 

  366. 	platform_device_register(&realview_i2c_device);
    367. 

  367. 	platform_device_register(&realview_cf_device);
    368. 

  368. 	realview_usb_register(realview_pb11mp_isp1761_resources);
    369. 

  369. 	platform_device_register(&pmu_device);
    370. 

  370. 

  371. 	for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
    372. 

  372. 		struct amba_device *d = amba_devs[i];
    373. 

  373. 		amba_device_register(d, &iomem_resource);
    374. 

  374. 	}
    375. 

  375. 

  376. #ifdef CONFIG_LEDS
    377. 

  377. 	leds_event = realview_leds_event;
    378. 

  378. #endif
    379. 

  379. 	realview_reset = realview_pb11mp_reset;
    380. 

  380. }
    381. 

  381. 

  382. MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
    383. 

  383. 	/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
    384. 

  384. 	.boot_params	= PHYS_OFFSET + 0x00000100,
    385. 

  385. 	.fixup		= realview_fixup,
    386. 

  386. 	.map_io		= realview_pb11mp_map_io,
    387. 

  387. 	.init_irq	= gic_init_irq,
    388. 

  388. 	.timer		= &realview_pb11mp_timer,
    389. 

  389. 	.init_machine	= realview_pb11mp_init,
    390. 

  390. MACHINE_END
    391. 

  391.