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/drivers/video/vermilion/vermilion.c

https://github.com/mstsirkin/linux
C | 1185 lines | 884 code | 182 blank | 119 comment | 117 complexity | 045fc8270bb96a742682ee1e0c180f5b MD5 | raw file
  1. /*
  2. * Copyright (c) Intel Corp. 2007.
  3. * All Rights Reserved.
  4. *
  5. * Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
  6. * develop this driver.
  7. *
  8. * This file is part of the Vermilion Range fb driver.
  9. * The Vermilion Range fb driver is free software;
  10. * you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * The Vermilion Range fb driver is distributed
  16. * in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this driver; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  24. *
  25. * Authors:
  26. * Thomas Hellström <thomas-at-tungstengraphics-dot-com>
  27. * Michel Dänzer <michel-at-tungstengraphics-dot-com>
  28. * Alan Hourihane <alanh-at-tungstengraphics-dot-com>
  29. */
  30. #include <linux/module.h>
  31. #include <linux/kernel.h>
  32. #include <linux/errno.h>
  33. #include <linux/string.h>
  34. #include <linux/delay.h>
  35. #include <linux/slab.h>
  36. #include <linux/mm.h>
  37. #include <linux/fb.h>
  38. #include <linux/pci.h>
  39. #include <asm/cacheflush.h>
  40. #include <asm/tlbflush.h>
  41. #include <linux/mmzone.h>
  42. /* #define VERMILION_DEBUG */
  43. #include "vermilion.h"
  44. #define MODULE_NAME "vmlfb"
  45. #define VML_TOHW(_val, _width) ((((_val) << (_width)) + 0x7FFF - (_val)) >> 16)
  46. static struct mutex vml_mutex;
  47. static struct list_head global_no_mode;
  48. static struct list_head global_has_mode;
  49. static struct fb_ops vmlfb_ops;
  50. static struct vml_sys *subsys = NULL;
  51. static char *vml_default_mode = "1024x768@60";
  52. static struct fb_videomode defaultmode = {
  53. NULL, 60, 1024, 768, 12896, 144, 24, 29, 3, 136, 6,
  54. 0, FB_VMODE_NONINTERLACED
  55. };
  56. static u32 vml_mem_requested = (10 * 1024 * 1024);
  57. static u32 vml_mem_contig = (4 * 1024 * 1024);
  58. static u32 vml_mem_min = (4 * 1024 * 1024);
  59. static u32 vml_clocks[] = {
  60. 6750,
  61. 13500,
  62. 27000,
  63. 29700,
  64. 37125,
  65. 54000,
  66. 59400,
  67. 74250,
  68. 120000,
  69. 148500
  70. };
  71. static u32 vml_num_clocks = ARRAY_SIZE(vml_clocks);
  72. /*
  73. * Allocate a contiguous vram area and make its linear kernel map
  74. * uncached.
  75. */
  76. static int vmlfb_alloc_vram_area(struct vram_area *va, unsigned max_order,
  77. unsigned min_order)
  78. {
  79. gfp_t flags;
  80. unsigned long i;
  81. max_order++;
  82. do {
  83. /*
  84. * Really try hard to get the needed memory.
  85. * We need memory below the first 32MB, so we
  86. * add the __GFP_DMA flag that guarantees that we are
  87. * below the first 16MB.
  88. */
  89. flags = __GFP_DMA | __GFP_HIGH;
  90. va->logical =
  91. __get_free_pages(flags, --max_order);
  92. } while (va->logical == 0 && max_order > min_order);
  93. if (!va->logical)
  94. return -ENOMEM;
  95. va->phys = virt_to_phys((void *)va->logical);
  96. va->size = PAGE_SIZE << max_order;
  97. va->order = max_order;
  98. /*
  99. * It seems like __get_free_pages only ups the usage count
  100. * of the first page. This doesn't work with fault mapping, so
  101. * up the usage count once more (XXX: should use split_page or
  102. * compound page).
  103. */
  104. memset((void *)va->logical, 0x00, va->size);
  105. for (i = va->logical; i < va->logical + va->size; i += PAGE_SIZE) {
  106. get_page(virt_to_page(i));
  107. }
  108. /*
  109. * Change caching policy of the linear kernel map to avoid
  110. * mapping type conflicts with user-space mappings.
  111. */
  112. set_pages_uc(virt_to_page(va->logical), va->size >> PAGE_SHIFT);
  113. printk(KERN_DEBUG MODULE_NAME
  114. ": Allocated %ld bytes vram area at 0x%08lx\n",
  115. va->size, va->phys);
  116. return 0;
  117. }
  118. /*
  119. * Free a contiguous vram area and reset its linear kernel map
  120. * mapping type.
  121. */
  122. static void vmlfb_free_vram_area(struct vram_area *va)
  123. {
  124. unsigned long j;
  125. if (va->logical) {
  126. /*
  127. * Reset the linear kernel map caching policy.
  128. */
  129. set_pages_wb(virt_to_page(va->logical),
  130. va->size >> PAGE_SHIFT);
  131. /*
  132. * Decrease the usage count on the pages we've used
  133. * to compensate for upping when allocating.
  134. */
  135. for (j = va->logical; j < va->logical + va->size;
  136. j += PAGE_SIZE) {
  137. (void)put_page_testzero(virt_to_page(j));
  138. }
  139. printk(KERN_DEBUG MODULE_NAME
  140. ": Freeing %ld bytes vram area at 0x%08lx\n",
  141. va->size, va->phys);
  142. free_pages(va->logical, va->order);
  143. va->logical = 0;
  144. }
  145. }
  146. /*
  147. * Free allocated vram.
  148. */
  149. static void vmlfb_free_vram(struct vml_info *vinfo)
  150. {
  151. int i;
  152. for (i = 0; i < vinfo->num_areas; ++i) {
  153. vmlfb_free_vram_area(&vinfo->vram[i]);
  154. }
  155. vinfo->num_areas = 0;
  156. }
  157. /*
  158. * Allocate vram. Currently we try to allocate contiguous areas from the
  159. * __GFP_DMA zone and puzzle them together. A better approach would be to
  160. * allocate one contiguous area for scanout and use one-page allocations for
  161. * offscreen areas. This requires user-space and GPU virtual mappings.
  162. */
  163. static int vmlfb_alloc_vram(struct vml_info *vinfo,
  164. size_t requested,
  165. size_t min_total, size_t min_contig)
  166. {
  167. int i, j;
  168. int order;
  169. int contiguous;
  170. int err;
  171. struct vram_area *va;
  172. struct vram_area *va2;
  173. vinfo->num_areas = 0;
  174. for (i = 0; i < VML_VRAM_AREAS; ++i) {
  175. va = &vinfo->vram[i];
  176. order = 0;
  177. while (requested > (PAGE_SIZE << order) && order < MAX_ORDER)
  178. order++;
  179. err = vmlfb_alloc_vram_area(va, order, 0);
  180. if (err)
  181. break;
  182. if (i == 0) {
  183. vinfo->vram_start = va->phys;
  184. vinfo->vram_logical = (void __iomem *) va->logical;
  185. vinfo->vram_contig_size = va->size;
  186. vinfo->num_areas = 1;
  187. } else {
  188. contiguous = 0;
  189. for (j = 0; j < i; ++j) {
  190. va2 = &vinfo->vram[j];
  191. if (va->phys + va->size == va2->phys ||
  192. va2->phys + va2->size == va->phys) {
  193. contiguous = 1;
  194. break;
  195. }
  196. }
  197. if (contiguous) {
  198. vinfo->num_areas++;
  199. if (va->phys < vinfo->vram_start) {
  200. vinfo->vram_start = va->phys;
  201. vinfo->vram_logical =
  202. (void __iomem *)va->logical;
  203. }
  204. vinfo->vram_contig_size += va->size;
  205. } else {
  206. vmlfb_free_vram_area(va);
  207. break;
  208. }
  209. }
  210. if (requested < va->size)
  211. break;
  212. else
  213. requested -= va->size;
  214. }
  215. if (vinfo->vram_contig_size > min_total &&
  216. vinfo->vram_contig_size > min_contig) {
  217. printk(KERN_DEBUG MODULE_NAME
  218. ": Contiguous vram: %ld bytes at physical 0x%08lx.\n",
  219. (unsigned long)vinfo->vram_contig_size,
  220. (unsigned long)vinfo->vram_start);
  221. return 0;
  222. }
  223. printk(KERN_ERR MODULE_NAME
  224. ": Could not allocate requested minimal amount of vram.\n");
  225. vmlfb_free_vram(vinfo);
  226. return -ENOMEM;
  227. }
  228. /*
  229. * Find the GPU to use with our display controller.
  230. */
  231. static int vmlfb_get_gpu(struct vml_par *par)
  232. {
  233. mutex_lock(&vml_mutex);
  234. par->gpu = pci_get_device(PCI_VENDOR_ID_INTEL, VML_DEVICE_GPU, NULL);
  235. if (!par->gpu) {
  236. mutex_unlock(&vml_mutex);
  237. return -ENODEV;
  238. }
  239. mutex_unlock(&vml_mutex);
  240. if (pci_enable_device(par->gpu) < 0)
  241. return -ENODEV;
  242. return 0;
  243. }
  244. /*
  245. * Find a contiguous vram area that contains a given offset from vram start.
  246. */
  247. static int vmlfb_vram_offset(struct vml_info *vinfo, unsigned long offset)
  248. {
  249. unsigned long aoffset;
  250. unsigned i;
  251. for (i = 0; i < vinfo->num_areas; ++i) {
  252. aoffset = offset - (vinfo->vram[i].phys - vinfo->vram_start);
  253. if (aoffset < vinfo->vram[i].size) {
  254. return 0;
  255. }
  256. }
  257. return -EINVAL;
  258. }
  259. /*
  260. * Remap the MMIO register spaces of the VDC and the GPU.
  261. */
  262. static int vmlfb_enable_mmio(struct vml_par *par)
  263. {
  264. int err;
  265. par->vdc_mem_base = pci_resource_start(par->vdc, 0);
  266. par->vdc_mem_size = pci_resource_len(par->vdc, 0);
  267. if (!request_mem_region(par->vdc_mem_base, par->vdc_mem_size, "vmlfb")) {
  268. printk(KERN_ERR MODULE_NAME
  269. ": Could not claim display controller MMIO.\n");
  270. return -EBUSY;
  271. }
  272. par->vdc_mem = ioremap_nocache(par->vdc_mem_base, par->vdc_mem_size);
  273. if (par->vdc_mem == NULL) {
  274. printk(KERN_ERR MODULE_NAME
  275. ": Could not map display controller MMIO.\n");
  276. err = -ENOMEM;
  277. goto out_err_0;
  278. }
  279. par->gpu_mem_base = pci_resource_start(par->gpu, 0);
  280. par->gpu_mem_size = pci_resource_len(par->gpu, 0);
  281. if (!request_mem_region(par->gpu_mem_base, par->gpu_mem_size, "vmlfb")) {
  282. printk(KERN_ERR MODULE_NAME ": Could not claim GPU MMIO.\n");
  283. err = -EBUSY;
  284. goto out_err_1;
  285. }
  286. par->gpu_mem = ioremap_nocache(par->gpu_mem_base, par->gpu_mem_size);
  287. if (par->gpu_mem == NULL) {
  288. printk(KERN_ERR MODULE_NAME ": Could not map GPU MMIO.\n");
  289. err = -ENOMEM;
  290. goto out_err_2;
  291. }
  292. return 0;
  293. out_err_2:
  294. release_mem_region(par->gpu_mem_base, par->gpu_mem_size);
  295. out_err_1:
  296. iounmap(par->vdc_mem);
  297. out_err_0:
  298. release_mem_region(par->vdc_mem_base, par->vdc_mem_size);
  299. return err;
  300. }
  301. /*
  302. * Unmap the VDC and GPU register spaces.
  303. */
  304. static void vmlfb_disable_mmio(struct vml_par *par)
  305. {
  306. iounmap(par->gpu_mem);
  307. release_mem_region(par->gpu_mem_base, par->gpu_mem_size);
  308. iounmap(par->vdc_mem);
  309. release_mem_region(par->vdc_mem_base, par->vdc_mem_size);
  310. }
  311. /*
  312. * Release and uninit the VDC and GPU.
  313. */
  314. static void vmlfb_release_devices(struct vml_par *par)
  315. {
  316. if (atomic_dec_and_test(&par->refcount)) {
  317. pci_set_drvdata(par->vdc, NULL);
  318. pci_disable_device(par->gpu);
  319. pci_disable_device(par->vdc);
  320. }
  321. }
  322. /*
  323. * Free up allocated resources for a device.
  324. */
  325. static void __devexit vml_pci_remove(struct pci_dev *dev)
  326. {
  327. struct fb_info *info;
  328. struct vml_info *vinfo;
  329. struct vml_par *par;
  330. info = pci_get_drvdata(dev);
  331. if (info) {
  332. vinfo = container_of(info, struct vml_info, info);
  333. par = vinfo->par;
  334. mutex_lock(&vml_mutex);
  335. unregister_framebuffer(info);
  336. fb_dealloc_cmap(&info->cmap);
  337. vmlfb_free_vram(vinfo);
  338. vmlfb_disable_mmio(par);
  339. vmlfb_release_devices(par);
  340. kfree(vinfo);
  341. kfree(par);
  342. mutex_unlock(&vml_mutex);
  343. }
  344. }
  345. static void vmlfb_set_pref_pixel_format(struct fb_var_screeninfo *var)
  346. {
  347. switch (var->bits_per_pixel) {
  348. case 16:
  349. var->blue.offset = 0;
  350. var->blue.length = 5;
  351. var->green.offset = 5;
  352. var->green.length = 5;
  353. var->red.offset = 10;
  354. var->red.length = 5;
  355. var->transp.offset = 15;
  356. var->transp.length = 1;
  357. break;
  358. case 32:
  359. var->blue.offset = 0;
  360. var->blue.length = 8;
  361. var->green.offset = 8;
  362. var->green.length = 8;
  363. var->red.offset = 16;
  364. var->red.length = 8;
  365. var->transp.offset = 24;
  366. var->transp.length = 0;
  367. break;
  368. default:
  369. break;
  370. }
  371. var->blue.msb_right = var->green.msb_right =
  372. var->red.msb_right = var->transp.msb_right = 0;
  373. }
  374. /*
  375. * Device initialization.
  376. * We initialize one vml_par struct per device and one vml_info
  377. * struct per pipe. Currently we have only one pipe.
  378. */
  379. static int __devinit vml_pci_probe(struct pci_dev *dev,
  380. const struct pci_device_id *id)
  381. {
  382. struct vml_info *vinfo;
  383. struct fb_info *info;
  384. struct vml_par *par;
  385. int err = 0;
  386. par = kzalloc(sizeof(*par), GFP_KERNEL);
  387. if (par == NULL)
  388. return -ENOMEM;
  389. vinfo = kzalloc(sizeof(*vinfo), GFP_KERNEL);
  390. if (vinfo == NULL) {
  391. err = -ENOMEM;
  392. goto out_err_0;
  393. }
  394. vinfo->par = par;
  395. par->vdc = dev;
  396. atomic_set(&par->refcount, 1);
  397. switch (id->device) {
  398. case VML_DEVICE_VDC:
  399. if ((err = vmlfb_get_gpu(par)))
  400. goto out_err_1;
  401. pci_set_drvdata(dev, &vinfo->info);
  402. break;
  403. default:
  404. err = -ENODEV;
  405. goto out_err_1;
  406. break;
  407. }
  408. info = &vinfo->info;
  409. info->flags = FBINFO_DEFAULT | FBINFO_PARTIAL_PAN_OK;
  410. err = vmlfb_enable_mmio(par);
  411. if (err)
  412. goto out_err_2;
  413. err = vmlfb_alloc_vram(vinfo, vml_mem_requested,
  414. vml_mem_contig, vml_mem_min);
  415. if (err)
  416. goto out_err_3;
  417. strcpy(info->fix.id, "Vermilion Range");
  418. info->fix.mmio_start = 0;
  419. info->fix.mmio_len = 0;
  420. info->fix.smem_start = vinfo->vram_start;
  421. info->fix.smem_len = vinfo->vram_contig_size;
  422. info->fix.type = FB_TYPE_PACKED_PIXELS;
  423. info->fix.visual = FB_VISUAL_TRUECOLOR;
  424. info->fix.ypanstep = 1;
  425. info->fix.xpanstep = 1;
  426. info->fix.ywrapstep = 0;
  427. info->fix.accel = FB_ACCEL_NONE;
  428. info->screen_base = vinfo->vram_logical;
  429. info->pseudo_palette = vinfo->pseudo_palette;
  430. info->par = par;
  431. info->fbops = &vmlfb_ops;
  432. info->device = &dev->dev;
  433. INIT_LIST_HEAD(&vinfo->head);
  434. vinfo->pipe_disabled = 1;
  435. vinfo->cur_blank_mode = FB_BLANK_UNBLANK;
  436. info->var.grayscale = 0;
  437. info->var.bits_per_pixel = 16;
  438. vmlfb_set_pref_pixel_format(&info->var);
  439. if (!fb_find_mode
  440. (&info->var, info, vml_default_mode, NULL, 0, &defaultmode, 16)) {
  441. printk(KERN_ERR MODULE_NAME ": Could not find initial mode\n");
  442. }
  443. if (fb_alloc_cmap(&info->cmap, 256, 1) < 0) {
  444. err = -ENOMEM;
  445. goto out_err_4;
  446. }
  447. err = register_framebuffer(info);
  448. if (err) {
  449. printk(KERN_ERR MODULE_NAME ": Register framebuffer error.\n");
  450. goto out_err_5;
  451. }
  452. printk("Initialized vmlfb\n");
  453. return 0;
  454. out_err_5:
  455. fb_dealloc_cmap(&info->cmap);
  456. out_err_4:
  457. vmlfb_free_vram(vinfo);
  458. out_err_3:
  459. vmlfb_disable_mmio(par);
  460. out_err_2:
  461. vmlfb_release_devices(par);
  462. out_err_1:
  463. kfree(vinfo);
  464. out_err_0:
  465. kfree(par);
  466. return err;
  467. }
  468. static int vmlfb_open(struct fb_info *info, int user)
  469. {
  470. /*
  471. * Save registers here?
  472. */
  473. return 0;
  474. }
  475. static int vmlfb_release(struct fb_info *info, int user)
  476. {
  477. /*
  478. * Restore registers here.
  479. */
  480. return 0;
  481. }
  482. static int vml_nearest_clock(int clock)
  483. {
  484. int i;
  485. int cur_index;
  486. int cur_diff;
  487. int diff;
  488. cur_index = 0;
  489. cur_diff = clock - vml_clocks[0];
  490. cur_diff = (cur_diff < 0) ? -cur_diff : cur_diff;
  491. for (i = 1; i < vml_num_clocks; ++i) {
  492. diff = clock - vml_clocks[i];
  493. diff = (diff < 0) ? -diff : diff;
  494. if (diff < cur_diff) {
  495. cur_index = i;
  496. cur_diff = diff;
  497. }
  498. }
  499. return vml_clocks[cur_index];
  500. }
  501. static int vmlfb_check_var_locked(struct fb_var_screeninfo *var,
  502. struct vml_info *vinfo)
  503. {
  504. u32 pitch;
  505. u64 mem;
  506. int nearest_clock;
  507. int clock;
  508. int clock_diff;
  509. struct fb_var_screeninfo v;
  510. v = *var;
  511. clock = PICOS2KHZ(var->pixclock);
  512. if (subsys && subsys->nearest_clock) {
  513. nearest_clock = subsys->nearest_clock(subsys, clock);
  514. } else {
  515. nearest_clock = vml_nearest_clock(clock);
  516. }
  517. /*
  518. * Accept a 20% diff.
  519. */
  520. clock_diff = nearest_clock - clock;
  521. clock_diff = (clock_diff < 0) ? -clock_diff : clock_diff;
  522. if (clock_diff > clock / 5) {
  523. #if 0
  524. printk(KERN_DEBUG MODULE_NAME ": Diff failure. %d %d\n",clock_diff,clock);
  525. #endif
  526. return -EINVAL;
  527. }
  528. v.pixclock = KHZ2PICOS(nearest_clock);
  529. if (var->xres > VML_MAX_XRES || var->yres > VML_MAX_YRES) {
  530. printk(KERN_DEBUG MODULE_NAME ": Resolution failure.\n");
  531. return -EINVAL;
  532. }
  533. if (var->xres_virtual > VML_MAX_XRES_VIRTUAL) {
  534. printk(KERN_DEBUG MODULE_NAME
  535. ": Virtual resolution failure.\n");
  536. return -EINVAL;
  537. }
  538. switch (v.bits_per_pixel) {
  539. case 0 ... 16:
  540. v.bits_per_pixel = 16;
  541. break;
  542. case 17 ... 32:
  543. v.bits_per_pixel = 32;
  544. break;
  545. default:
  546. printk(KERN_DEBUG MODULE_NAME ": Invalid bpp: %d.\n",
  547. var->bits_per_pixel);
  548. return -EINVAL;
  549. }
  550. pitch = ALIGN((var->xres * var->bits_per_pixel) >> 3, 0x40);
  551. mem = pitch * var->yres_virtual;
  552. if (mem > vinfo->vram_contig_size) {
  553. return -ENOMEM;
  554. }
  555. switch (v.bits_per_pixel) {
  556. case 16:
  557. if (var->blue.offset != 0 ||
  558. var->blue.length != 5 ||
  559. var->green.offset != 5 ||
  560. var->green.length != 5 ||
  561. var->red.offset != 10 ||
  562. var->red.length != 5 ||
  563. var->transp.offset != 15 || var->transp.length != 1) {
  564. vmlfb_set_pref_pixel_format(&v);
  565. }
  566. break;
  567. case 32:
  568. if (var->blue.offset != 0 ||
  569. var->blue.length != 8 ||
  570. var->green.offset != 8 ||
  571. var->green.length != 8 ||
  572. var->red.offset != 16 ||
  573. var->red.length != 8 ||
  574. (var->transp.length != 0 && var->transp.length != 8) ||
  575. (var->transp.length == 8 && var->transp.offset != 24)) {
  576. vmlfb_set_pref_pixel_format(&v);
  577. }
  578. break;
  579. default:
  580. return -EINVAL;
  581. }
  582. *var = v;
  583. return 0;
  584. }
  585. static int vmlfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
  586. {
  587. struct vml_info *vinfo = container_of(info, struct vml_info, info);
  588. int ret;
  589. mutex_lock(&vml_mutex);
  590. ret = vmlfb_check_var_locked(var, vinfo);
  591. mutex_unlock(&vml_mutex);
  592. return ret;
  593. }
  594. static void vml_wait_vblank(struct vml_info *vinfo)
  595. {
  596. /* Wait for vblank. For now, just wait for a 50Hz cycle (20ms)) */
  597. mdelay(20);
  598. }
  599. static void vmlfb_disable_pipe(struct vml_info *vinfo)
  600. {
  601. struct vml_par *par = vinfo->par;
  602. /* Disable the MDVO pad */
  603. VML_WRITE32(par, VML_RCOMPSTAT, 0);
  604. while (!(VML_READ32(par, VML_RCOMPSTAT) & VML_MDVO_VDC_I_RCOMP)) ;
  605. /* Disable display planes */
  606. VML_WRITE32(par, VML_DSPCCNTR,
  607. VML_READ32(par, VML_DSPCCNTR) & ~VML_GFX_ENABLE);
  608. (void)VML_READ32(par, VML_DSPCCNTR);
  609. /* Wait for vblank for the disable to take effect */
  610. vml_wait_vblank(vinfo);
  611. /* Next, disable display pipes */
  612. VML_WRITE32(par, VML_PIPEACONF, 0);
  613. (void)VML_READ32(par, VML_PIPEACONF);
  614. vinfo->pipe_disabled = 1;
  615. }
  616. #ifdef VERMILION_DEBUG
  617. static void vml_dump_regs(struct vml_info *vinfo)
  618. {
  619. struct vml_par *par = vinfo->par;
  620. printk(KERN_DEBUG MODULE_NAME ": Modesetting register dump:\n");
  621. printk(KERN_DEBUG MODULE_NAME ": \tHTOTAL_A : 0x%08x\n",
  622. (unsigned)VML_READ32(par, VML_HTOTAL_A));
  623. printk(KERN_DEBUG MODULE_NAME ": \tHBLANK_A : 0x%08x\n",
  624. (unsigned)VML_READ32(par, VML_HBLANK_A));
  625. printk(KERN_DEBUG MODULE_NAME ": \tHSYNC_A : 0x%08x\n",
  626. (unsigned)VML_READ32(par, VML_HSYNC_A));
  627. printk(KERN_DEBUG MODULE_NAME ": \tVTOTAL_A : 0x%08x\n",
  628. (unsigned)VML_READ32(par, VML_VTOTAL_A));
  629. printk(KERN_DEBUG MODULE_NAME ": \tVBLANK_A : 0x%08x\n",
  630. (unsigned)VML_READ32(par, VML_VBLANK_A));
  631. printk(KERN_DEBUG MODULE_NAME ": \tVSYNC_A : 0x%08x\n",
  632. (unsigned)VML_READ32(par, VML_VSYNC_A));
  633. printk(KERN_DEBUG MODULE_NAME ": \tDSPCSTRIDE : 0x%08x\n",
  634. (unsigned)VML_READ32(par, VML_DSPCSTRIDE));
  635. printk(KERN_DEBUG MODULE_NAME ": \tDSPCSIZE : 0x%08x\n",
  636. (unsigned)VML_READ32(par, VML_DSPCSIZE));
  637. printk(KERN_DEBUG MODULE_NAME ": \tDSPCPOS : 0x%08x\n",
  638. (unsigned)VML_READ32(par, VML_DSPCPOS));
  639. printk(KERN_DEBUG MODULE_NAME ": \tDSPARB : 0x%08x\n",
  640. (unsigned)VML_READ32(par, VML_DSPARB));
  641. printk(KERN_DEBUG MODULE_NAME ": \tDSPCADDR : 0x%08x\n",
  642. (unsigned)VML_READ32(par, VML_DSPCADDR));
  643. printk(KERN_DEBUG MODULE_NAME ": \tBCLRPAT_A : 0x%08x\n",
  644. (unsigned)VML_READ32(par, VML_BCLRPAT_A));
  645. printk(KERN_DEBUG MODULE_NAME ": \tCANVSCLR_A : 0x%08x\n",
  646. (unsigned)VML_READ32(par, VML_CANVSCLR_A));
  647. printk(KERN_DEBUG MODULE_NAME ": \tPIPEASRC : 0x%08x\n",
  648. (unsigned)VML_READ32(par, VML_PIPEASRC));
  649. printk(KERN_DEBUG MODULE_NAME ": \tPIPEACONF : 0x%08x\n",
  650. (unsigned)VML_READ32(par, VML_PIPEACONF));
  651. printk(KERN_DEBUG MODULE_NAME ": \tDSPCCNTR : 0x%08x\n",
  652. (unsigned)VML_READ32(par, VML_DSPCCNTR));
  653. printk(KERN_DEBUG MODULE_NAME ": \tRCOMPSTAT : 0x%08x\n",
  654. (unsigned)VML_READ32(par, VML_RCOMPSTAT));
  655. printk(KERN_DEBUG MODULE_NAME ": End of modesetting register dump.\n");
  656. }
  657. #endif
  658. static int vmlfb_set_par_locked(struct vml_info *vinfo)
  659. {
  660. struct vml_par *par = vinfo->par;
  661. struct fb_info *info = &vinfo->info;
  662. struct fb_var_screeninfo *var = &info->var;
  663. u32 htotal, hactive, hblank_start, hblank_end, hsync_start, hsync_end;
  664. u32 vtotal, vactive, vblank_start, vblank_end, vsync_start, vsync_end;
  665. u32 dspcntr;
  666. int clock;
  667. vinfo->bytes_per_pixel = var->bits_per_pixel >> 3;
  668. vinfo->stride = ALIGN(var->xres_virtual * vinfo->bytes_per_pixel, 0x40);
  669. info->fix.line_length = vinfo->stride;
  670. if (!subsys)
  671. return 0;
  672. htotal =
  673. var->xres + var->right_margin + var->hsync_len + var->left_margin;
  674. hactive = var->xres;
  675. hblank_start = var->xres;
  676. hblank_end = htotal;
  677. hsync_start = hactive + var->right_margin;
  678. hsync_end = hsync_start + var->hsync_len;
  679. vtotal =
  680. var->yres + var->lower_margin + var->vsync_len + var->upper_margin;
  681. vactive = var->yres;
  682. vblank_start = var->yres;
  683. vblank_end = vtotal;
  684. vsync_start = vactive + var->lower_margin;
  685. vsync_end = vsync_start + var->vsync_len;
  686. dspcntr = VML_GFX_ENABLE | VML_GFX_GAMMABYPASS;
  687. clock = PICOS2KHZ(var->pixclock);
  688. if (subsys->nearest_clock) {
  689. clock = subsys->nearest_clock(subsys, clock);
  690. } else {
  691. clock = vml_nearest_clock(clock);
  692. }
  693. printk(KERN_DEBUG MODULE_NAME
  694. ": Set mode Hfreq : %d kHz, Vfreq : %d Hz.\n", clock / htotal,
  695. ((clock / htotal) * 1000) / vtotal);
  696. switch (var->bits_per_pixel) {
  697. case 16:
  698. dspcntr |= VML_GFX_ARGB1555;
  699. break;
  700. case 32:
  701. if (var->transp.length == 8)
  702. dspcntr |= VML_GFX_ARGB8888 | VML_GFX_ALPHAMULT;
  703. else
  704. dspcntr |= VML_GFX_RGB0888;
  705. break;
  706. default:
  707. return -EINVAL;
  708. }
  709. vmlfb_disable_pipe(vinfo);
  710. mb();
  711. if (subsys->set_clock)
  712. subsys->set_clock(subsys, clock);
  713. else
  714. return -EINVAL;
  715. VML_WRITE32(par, VML_HTOTAL_A, ((htotal - 1) << 16) | (hactive - 1));
  716. VML_WRITE32(par, VML_HBLANK_A,
  717. ((hblank_end - 1) << 16) | (hblank_start - 1));
  718. VML_WRITE32(par, VML_HSYNC_A,
  719. ((hsync_end - 1) << 16) | (hsync_start - 1));
  720. VML_WRITE32(par, VML_VTOTAL_A, ((vtotal - 1) << 16) | (vactive - 1));
  721. VML_WRITE32(par, VML_VBLANK_A,
  722. ((vblank_end - 1) << 16) | (vblank_start - 1));
  723. VML_WRITE32(par, VML_VSYNC_A,
  724. ((vsync_end - 1) << 16) | (vsync_start - 1));
  725. VML_WRITE32(par, VML_DSPCSTRIDE, vinfo->stride);
  726. VML_WRITE32(par, VML_DSPCSIZE,
  727. ((var->yres - 1) << 16) | (var->xres - 1));
  728. VML_WRITE32(par, VML_DSPCPOS, 0x00000000);
  729. VML_WRITE32(par, VML_DSPARB, VML_FIFO_DEFAULT);
  730. VML_WRITE32(par, VML_BCLRPAT_A, 0x00000000);
  731. VML_WRITE32(par, VML_CANVSCLR_A, 0x00000000);
  732. VML_WRITE32(par, VML_PIPEASRC,
  733. ((var->xres - 1) << 16) | (var->yres - 1));
  734. wmb();
  735. VML_WRITE32(par, VML_PIPEACONF, VML_PIPE_ENABLE);
  736. wmb();
  737. VML_WRITE32(par, VML_DSPCCNTR, dspcntr);
  738. wmb();
  739. VML_WRITE32(par, VML_DSPCADDR, (u32) vinfo->vram_start +
  740. var->yoffset * vinfo->stride +
  741. var->xoffset * vinfo->bytes_per_pixel);
  742. VML_WRITE32(par, VML_RCOMPSTAT, VML_MDVO_PAD_ENABLE);
  743. while (!(VML_READ32(par, VML_RCOMPSTAT) &
  744. (VML_MDVO_VDC_I_RCOMP | VML_MDVO_PAD_ENABLE))) ;
  745. vinfo->pipe_disabled = 0;
  746. #ifdef VERMILION_DEBUG
  747. vml_dump_regs(vinfo);
  748. #endif
  749. return 0;
  750. }
  751. static int vmlfb_set_par(struct fb_info *info)
  752. {
  753. struct vml_info *vinfo = container_of(info, struct vml_info, info);
  754. int ret;
  755. mutex_lock(&vml_mutex);
  756. list_move(&vinfo->head, (subsys) ? &global_has_mode : &global_no_mode);
  757. ret = vmlfb_set_par_locked(vinfo);
  758. mutex_unlock(&vml_mutex);
  759. return ret;
  760. }
  761. static int vmlfb_blank_locked(struct vml_info *vinfo)
  762. {
  763. struct vml_par *par = vinfo->par;
  764. u32 cur = VML_READ32(par, VML_PIPEACONF);
  765. switch (vinfo->cur_blank_mode) {
  766. case FB_BLANK_UNBLANK:
  767. if (vinfo->pipe_disabled) {
  768. vmlfb_set_par_locked(vinfo);
  769. }
  770. VML_WRITE32(par, VML_PIPEACONF, cur & ~VML_PIPE_FORCE_BORDER);
  771. (void)VML_READ32(par, VML_PIPEACONF);
  772. break;
  773. case FB_BLANK_NORMAL:
  774. if (vinfo->pipe_disabled) {
  775. vmlfb_set_par_locked(vinfo);
  776. }
  777. VML_WRITE32(par, VML_PIPEACONF, cur | VML_PIPE_FORCE_BORDER);
  778. (void)VML_READ32(par, VML_PIPEACONF);
  779. break;
  780. case FB_BLANK_VSYNC_SUSPEND:
  781. case FB_BLANK_HSYNC_SUSPEND:
  782. if (!vinfo->pipe_disabled) {
  783. vmlfb_disable_pipe(vinfo);
  784. }
  785. break;
  786. case FB_BLANK_POWERDOWN:
  787. if (!vinfo->pipe_disabled) {
  788. vmlfb_disable_pipe(vinfo);
  789. }
  790. break;
  791. default:
  792. return -EINVAL;
  793. }
  794. return 0;
  795. }
  796. static int vmlfb_blank(int blank_mode, struct fb_info *info)
  797. {
  798. struct vml_info *vinfo = container_of(info, struct vml_info, info);
  799. int ret;
  800. mutex_lock(&vml_mutex);
  801. vinfo->cur_blank_mode = blank_mode;
  802. ret = vmlfb_blank_locked(vinfo);
  803. mutex_unlock(&vml_mutex);
  804. return ret;
  805. }
  806. static int vmlfb_pan_display(struct fb_var_screeninfo *var,
  807. struct fb_info *info)
  808. {
  809. struct vml_info *vinfo = container_of(info, struct vml_info, info);
  810. struct vml_par *par = vinfo->par;
  811. mutex_lock(&vml_mutex);
  812. VML_WRITE32(par, VML_DSPCADDR, (u32) vinfo->vram_start +
  813. var->yoffset * vinfo->stride +
  814. var->xoffset * vinfo->bytes_per_pixel);
  815. (void)VML_READ32(par, VML_DSPCADDR);
  816. mutex_unlock(&vml_mutex);
  817. return 0;
  818. }
  819. static int vmlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
  820. u_int transp, struct fb_info *info)
  821. {
  822. u32 v;
  823. if (regno >= 16)
  824. return -EINVAL;
  825. if (info->var.grayscale) {
  826. red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
  827. }
  828. if (info->fix.visual != FB_VISUAL_TRUECOLOR)
  829. return -EINVAL;
  830. red = VML_TOHW(red, info->var.red.length);
  831. blue = VML_TOHW(blue, info->var.blue.length);
  832. green = VML_TOHW(green, info->var.green.length);
  833. transp = VML_TOHW(transp, info->var.transp.length);
  834. v = (red << info->var.red.offset) |
  835. (green << info->var.green.offset) |
  836. (blue << info->var.blue.offset) |
  837. (transp << info->var.transp.offset);
  838. switch (info->var.bits_per_pixel) {
  839. case 16:
  840. ((u32 *) info->pseudo_palette)[regno] = v;
  841. break;
  842. case 24:
  843. case 32:
  844. ((u32 *) info->pseudo_palette)[regno] = v;
  845. break;
  846. }
  847. return 0;
  848. }
  849. static int vmlfb_mmap(struct fb_info *info, struct vm_area_struct *vma)
  850. {
  851. struct vml_info *vinfo = container_of(info, struct vml_info, info);
  852. unsigned long size = vma->vm_end - vma->vm_start;
  853. unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
  854. int ret;
  855. if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT))
  856. return -EINVAL;
  857. if (offset + size > vinfo->vram_contig_size)
  858. return -EINVAL;
  859. ret = vmlfb_vram_offset(vinfo, offset);
  860. if (ret)
  861. return -EINVAL;
  862. offset += vinfo->vram_start;
  863. pgprot_val(vma->vm_page_prot) |= _PAGE_PCD;
  864. pgprot_val(vma->vm_page_prot) &= ~_PAGE_PWT;
  865. vma->vm_flags |= VM_RESERVED | VM_IO;
  866. if (remap_pfn_range(vma, vma->vm_start, offset >> PAGE_SHIFT,
  867. size, vma->vm_page_prot))
  868. return -EAGAIN;
  869. return 0;
  870. }
  871. static int vmlfb_sync(struct fb_info *info)
  872. {
  873. return 0;
  874. }
  875. static int vmlfb_cursor(struct fb_info *info, struct fb_cursor *cursor)
  876. {
  877. return -EINVAL; /* just to force soft_cursor() call */
  878. }
  879. static struct fb_ops vmlfb_ops = {
  880. .owner = THIS_MODULE,
  881. .fb_open = vmlfb_open,
  882. .fb_release = vmlfb_release,
  883. .fb_check_var = vmlfb_check_var,
  884. .fb_set_par = vmlfb_set_par,
  885. .fb_blank = vmlfb_blank,
  886. .fb_pan_display = vmlfb_pan_display,
  887. .fb_fillrect = cfb_fillrect,
  888. .fb_copyarea = cfb_copyarea,
  889. .fb_imageblit = cfb_imageblit,
  890. .fb_cursor = vmlfb_cursor,
  891. .fb_sync = vmlfb_sync,
  892. .fb_mmap = vmlfb_mmap,
  893. .fb_setcolreg = vmlfb_setcolreg
  894. };
  895. static struct pci_device_id vml_ids[] = {
  896. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, VML_DEVICE_VDC)},
  897. {0}
  898. };
  899. static struct pci_driver vmlfb_pci_driver = {
  900. .name = "vmlfb",
  901. .id_table = vml_ids,
  902. .probe = vml_pci_probe,
  903. .remove = __devexit_p(vml_pci_remove)
  904. };
  905. static void __exit vmlfb_cleanup(void)
  906. {
  907. pci_unregister_driver(&vmlfb_pci_driver);
  908. }
  909. static int __init vmlfb_init(void)
  910. {
  911. #ifndef MODULE
  912. char *option = NULL;
  913. if (fb_get_options(MODULE_NAME, &option))
  914. return -ENODEV;
  915. #endif
  916. printk(KERN_DEBUG MODULE_NAME ": initializing\n");
  917. mutex_init(&vml_mutex);
  918. INIT_LIST_HEAD(&global_no_mode);
  919. INIT_LIST_HEAD(&global_has_mode);
  920. return pci_register_driver(&vmlfb_pci_driver);
  921. }
  922. int vmlfb_register_subsys(struct vml_sys *sys)
  923. {
  924. struct vml_info *entry;
  925. struct list_head *list;
  926. u32 save_activate;
  927. mutex_lock(&vml_mutex);
  928. if (subsys != NULL) {
  929. subsys->restore(subsys);
  930. }
  931. subsys = sys;
  932. subsys->save(subsys);
  933. /*
  934. * We need to restart list traversal for each item, since we
  935. * release the list mutex in the loop.
  936. */
  937. list = global_no_mode.next;
  938. while (list != &global_no_mode) {
  939. list_del_init(list);
  940. entry = list_entry(list, struct vml_info, head);
  941. /*
  942. * First, try the current mode which might not be
  943. * completely validated with respect to the pixel clock.
  944. */
  945. if (!vmlfb_check_var_locked(&entry->info.var, entry)) {
  946. vmlfb_set_par_locked(entry);
  947. list_add_tail(list, &global_has_mode);
  948. } else {
  949. /*
  950. * Didn't work. Try to find another mode,
  951. * that matches this subsys.
  952. */
  953. mutex_unlock(&vml_mutex);
  954. save_activate = entry->info.var.activate;
  955. entry->info.var.bits_per_pixel = 16;
  956. vmlfb_set_pref_pixel_format(&entry->info.var);
  957. if (fb_find_mode(&entry->info.var,
  958. &entry->info,
  959. vml_default_mode, NULL, 0, NULL, 16)) {
  960. entry->info.var.activate |=
  961. FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
  962. fb_set_var(&entry->info, &entry->info.var);
  963. } else {
  964. printk(KERN_ERR MODULE_NAME
  965. ": Sorry. no mode found for this subsys.\n");
  966. }
  967. entry->info.var.activate = save_activate;
  968. mutex_lock(&vml_mutex);
  969. }
  970. vmlfb_blank_locked(entry);
  971. list = global_no_mode.next;
  972. }
  973. mutex_unlock(&vml_mutex);
  974. printk(KERN_DEBUG MODULE_NAME ": Registered %s subsystem.\n",
  975. subsys->name ? subsys->name : "unknown");
  976. return 0;
  977. }
  978. EXPORT_SYMBOL_GPL(vmlfb_register_subsys);
  979. void vmlfb_unregister_subsys(struct vml_sys *sys)
  980. {
  981. struct vml_info *entry, *next;
  982. mutex_lock(&vml_mutex);
  983. if (subsys != sys) {
  984. mutex_unlock(&vml_mutex);
  985. return;
  986. }
  987. subsys->restore(subsys);
  988. subsys = NULL;
  989. list_for_each_entry_safe(entry, next, &global_has_mode, head) {
  990. printk(KERN_DEBUG MODULE_NAME ": subsys disable pipe\n");
  991. vmlfb_disable_pipe(entry);
  992. list_del(&entry->head);
  993. list_add_tail(&entry->head, &global_no_mode);
  994. }
  995. mutex_unlock(&vml_mutex);
  996. }
  997. EXPORT_SYMBOL_GPL(vmlfb_unregister_subsys);
  998. module_init(vmlfb_init);
  999. module_exit(vmlfb_cleanup);
  1000. MODULE_AUTHOR("Tungsten Graphics");
  1001. MODULE_DESCRIPTION("Initialization of the Vermilion display devices");
  1002. MODULE_VERSION("1.0.0");
  1003. MODULE_LICENSE("GPL");