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/drivers/xen/events.c

https://github.com/mstsirkin/linux
C | 1693 lines | 1171 code | 347 blank | 175 comment | 188 complexity | 02d16639744799de66e1bdde7db2e4be MD5 | raw file
  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is received, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <linux/irqnr.h>
  31. #include <linux/pci.h>
  32. #include <asm/desc.h>
  33. #include <asm/ptrace.h>
  34. #include <asm/irq.h>
  35. #include <asm/idle.h>
  36. #include <asm/io_apic.h>
  37. #include <asm/sync_bitops.h>
  38. #include <asm/xen/pci.h>
  39. #include <asm/xen/hypercall.h>
  40. #include <asm/xen/hypervisor.h>
  41. #include <xen/xen.h>
  42. #include <xen/hvm.h>
  43. #include <xen/xen-ops.h>
  44. #include <xen/events.h>
  45. #include <xen/interface/xen.h>
  46. #include <xen/interface/event_channel.h>
  47. #include <xen/interface/hvm/hvm_op.h>
  48. #include <xen/interface/hvm/params.h>
  49. /*
  50. * This lock protects updates to the following mapping and reference-count
  51. * arrays. The lock does not need to be acquired to read the mapping tables.
  52. */
  53. static DEFINE_MUTEX(irq_mapping_update_lock);
  54. static LIST_HEAD(xen_irq_list_head);
  55. /* IRQ <-> VIRQ mapping. */
  56. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  57. /* IRQ <-> IPI mapping */
  58. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  59. /* Interrupt types. */
  60. enum xen_irq_type {
  61. IRQT_UNBOUND = 0,
  62. IRQT_PIRQ,
  63. IRQT_VIRQ,
  64. IRQT_IPI,
  65. IRQT_EVTCHN
  66. };
  67. /*
  68. * Packed IRQ information:
  69. * type - enum xen_irq_type
  70. * event channel - irq->event channel mapping
  71. * cpu - cpu this event channel is bound to
  72. * index - type-specific information:
  73. * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
  74. * guest, or GSI (real passthrough IRQ) of the device.
  75. * VIRQ - virq number
  76. * IPI - IPI vector
  77. * EVTCHN -
  78. */
  79. struct irq_info
  80. {
  81. struct list_head list;
  82. enum xen_irq_type type; /* type */
  83. unsigned irq;
  84. unsigned short evtchn; /* event channel */
  85. unsigned short cpu; /* cpu bound */
  86. union {
  87. unsigned short virq;
  88. enum ipi_vector ipi;
  89. struct {
  90. unsigned short pirq;
  91. unsigned short gsi;
  92. unsigned char vector;
  93. unsigned char flags;
  94. uint16_t domid;
  95. } pirq;
  96. } u;
  97. };
  98. #define PIRQ_NEEDS_EOI (1 << 0)
  99. #define PIRQ_SHAREABLE (1 << 1)
  100. static int *evtchn_to_irq;
  101. static DEFINE_PER_CPU(unsigned long [NR_EVENT_CHANNELS/BITS_PER_LONG],
  102. cpu_evtchn_mask);
  103. /* Xen will never allocate port zero for any purpose. */
  104. #define VALID_EVTCHN(chn) ((chn) != 0)
  105. static struct irq_chip xen_dynamic_chip;
  106. static struct irq_chip xen_percpu_chip;
  107. static struct irq_chip xen_pirq_chip;
  108. static void enable_dynirq(struct irq_data *data);
  109. static void disable_dynirq(struct irq_data *data);
  110. /* Get info for IRQ */
  111. static struct irq_info *info_for_irq(unsigned irq)
  112. {
  113. return irq_get_handler_data(irq);
  114. }
  115. /* Constructors for packed IRQ information. */
  116. static void xen_irq_info_common_init(struct irq_info *info,
  117. unsigned irq,
  118. enum xen_irq_type type,
  119. unsigned short evtchn,
  120. unsigned short cpu)
  121. {
  122. BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
  123. info->type = type;
  124. info->irq = irq;
  125. info->evtchn = evtchn;
  126. info->cpu = cpu;
  127. evtchn_to_irq[evtchn] = irq;
  128. }
  129. static void xen_irq_info_evtchn_init(unsigned irq,
  130. unsigned short evtchn)
  131. {
  132. struct irq_info *info = info_for_irq(irq);
  133. xen_irq_info_common_init(info, irq, IRQT_EVTCHN, evtchn, 0);
  134. }
  135. static void xen_irq_info_ipi_init(unsigned cpu,
  136. unsigned irq,
  137. unsigned short evtchn,
  138. enum ipi_vector ipi)
  139. {
  140. struct irq_info *info = info_for_irq(irq);
  141. xen_irq_info_common_init(info, irq, IRQT_IPI, evtchn, 0);
  142. info->u.ipi = ipi;
  143. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  144. }
  145. static void xen_irq_info_virq_init(unsigned cpu,
  146. unsigned irq,
  147. unsigned short evtchn,
  148. unsigned short virq)
  149. {
  150. struct irq_info *info = info_for_irq(irq);
  151. xen_irq_info_common_init(info, irq, IRQT_VIRQ, evtchn, 0);
  152. info->u.virq = virq;
  153. per_cpu(virq_to_irq, cpu)[virq] = irq;
  154. }
  155. static void xen_irq_info_pirq_init(unsigned irq,
  156. unsigned short evtchn,
  157. unsigned short pirq,
  158. unsigned short gsi,
  159. unsigned short vector,
  160. uint16_t domid,
  161. unsigned char flags)
  162. {
  163. struct irq_info *info = info_for_irq(irq);
  164. xen_irq_info_common_init(info, irq, IRQT_PIRQ, evtchn, 0);
  165. info->u.pirq.pirq = pirq;
  166. info->u.pirq.gsi = gsi;
  167. info->u.pirq.vector = vector;
  168. info->u.pirq.domid = domid;
  169. info->u.pirq.flags = flags;
  170. }
  171. /*
  172. * Accessors for packed IRQ information.
  173. */
  174. static unsigned int evtchn_from_irq(unsigned irq)
  175. {
  176. if (unlikely(WARN(irq < 0 || irq >= nr_irqs, "Invalid irq %d!\n", irq)))
  177. return 0;
  178. return info_for_irq(irq)->evtchn;
  179. }
  180. unsigned irq_from_evtchn(unsigned int evtchn)
  181. {
  182. return evtchn_to_irq[evtchn];
  183. }
  184. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  185. static enum ipi_vector ipi_from_irq(unsigned irq)
  186. {
  187. struct irq_info *info = info_for_irq(irq);
  188. BUG_ON(info == NULL);
  189. BUG_ON(info->type != IRQT_IPI);
  190. return info->u.ipi;
  191. }
  192. static unsigned virq_from_irq(unsigned irq)
  193. {
  194. struct irq_info *info = info_for_irq(irq);
  195. BUG_ON(info == NULL);
  196. BUG_ON(info->type != IRQT_VIRQ);
  197. return info->u.virq;
  198. }
  199. static unsigned pirq_from_irq(unsigned irq)
  200. {
  201. struct irq_info *info = info_for_irq(irq);
  202. BUG_ON(info == NULL);
  203. BUG_ON(info->type != IRQT_PIRQ);
  204. return info->u.pirq.pirq;
  205. }
  206. static enum xen_irq_type type_from_irq(unsigned irq)
  207. {
  208. return info_for_irq(irq)->type;
  209. }
  210. static unsigned cpu_from_irq(unsigned irq)
  211. {
  212. return info_for_irq(irq)->cpu;
  213. }
  214. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  215. {
  216. int irq = evtchn_to_irq[evtchn];
  217. unsigned ret = 0;
  218. if (irq != -1)
  219. ret = cpu_from_irq(irq);
  220. return ret;
  221. }
  222. static bool pirq_needs_eoi(unsigned irq)
  223. {
  224. struct irq_info *info = info_for_irq(irq);
  225. BUG_ON(info->type != IRQT_PIRQ);
  226. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  227. }
  228. static inline unsigned long active_evtchns(unsigned int cpu,
  229. struct shared_info *sh,
  230. unsigned int idx)
  231. {
  232. return (sh->evtchn_pending[idx] &
  233. per_cpu(cpu_evtchn_mask, cpu)[idx] &
  234. ~sh->evtchn_mask[idx]);
  235. }
  236. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  237. {
  238. int irq = evtchn_to_irq[chn];
  239. BUG_ON(irq == -1);
  240. #ifdef CONFIG_SMP
  241. cpumask_copy(irq_to_desc(irq)->irq_data.affinity, cpumask_of(cpu));
  242. #endif
  243. clear_bit(chn, per_cpu(cpu_evtchn_mask, cpu_from_irq(irq)));
  244. set_bit(chn, per_cpu(cpu_evtchn_mask, cpu));
  245. info_for_irq(irq)->cpu = cpu;
  246. }
  247. static void init_evtchn_cpu_bindings(void)
  248. {
  249. int i;
  250. #ifdef CONFIG_SMP
  251. struct irq_info *info;
  252. /* By default all event channels notify CPU#0. */
  253. list_for_each_entry(info, &xen_irq_list_head, list) {
  254. struct irq_desc *desc = irq_to_desc(info->irq);
  255. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  256. }
  257. #endif
  258. for_each_possible_cpu(i)
  259. memset(per_cpu(cpu_evtchn_mask, i),
  260. (i == 0) ? ~0 : 0, sizeof(*per_cpu(cpu_evtchn_mask, i)));
  261. }
  262. static inline void clear_evtchn(int port)
  263. {
  264. struct shared_info *s = HYPERVISOR_shared_info;
  265. sync_clear_bit(port, &s->evtchn_pending[0]);
  266. }
  267. static inline void set_evtchn(int port)
  268. {
  269. struct shared_info *s = HYPERVISOR_shared_info;
  270. sync_set_bit(port, &s->evtchn_pending[0]);
  271. }
  272. static inline int test_evtchn(int port)
  273. {
  274. struct shared_info *s = HYPERVISOR_shared_info;
  275. return sync_test_bit(port, &s->evtchn_pending[0]);
  276. }
  277. /**
  278. * notify_remote_via_irq - send event to remote end of event channel via irq
  279. * @irq: irq of event channel to send event to
  280. *
  281. * Unlike notify_remote_via_evtchn(), this is safe to use across
  282. * save/restore. Notifications on a broken connection are silently
  283. * dropped.
  284. */
  285. void notify_remote_via_irq(int irq)
  286. {
  287. int evtchn = evtchn_from_irq(irq);
  288. if (VALID_EVTCHN(evtchn))
  289. notify_remote_via_evtchn(evtchn);
  290. }
  291. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  292. static void mask_evtchn(int port)
  293. {
  294. struct shared_info *s = HYPERVISOR_shared_info;
  295. sync_set_bit(port, &s->evtchn_mask[0]);
  296. }
  297. static void unmask_evtchn(int port)
  298. {
  299. struct shared_info *s = HYPERVISOR_shared_info;
  300. unsigned int cpu = get_cpu();
  301. BUG_ON(!irqs_disabled());
  302. /* Slow path (hypercall) if this is a non-local port. */
  303. if (unlikely(cpu != cpu_from_evtchn(port))) {
  304. struct evtchn_unmask unmask = { .port = port };
  305. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  306. } else {
  307. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  308. sync_clear_bit(port, &s->evtchn_mask[0]);
  309. /*
  310. * The following is basically the equivalent of
  311. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  312. * the interrupt edge' if the channel is masked.
  313. */
  314. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  315. !sync_test_and_set_bit(port / BITS_PER_LONG,
  316. &vcpu_info->evtchn_pending_sel))
  317. vcpu_info->evtchn_upcall_pending = 1;
  318. }
  319. put_cpu();
  320. }
  321. static void xen_irq_init(unsigned irq)
  322. {
  323. struct irq_info *info;
  324. #ifdef CONFIG_SMP
  325. struct irq_desc *desc = irq_to_desc(irq);
  326. /* By default all event channels notify CPU#0. */
  327. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  328. #endif
  329. info = kzalloc(sizeof(*info), GFP_KERNEL);
  330. if (info == NULL)
  331. panic("Unable to allocate metadata for IRQ%d\n", irq);
  332. info->type = IRQT_UNBOUND;
  333. irq_set_handler_data(irq, info);
  334. list_add_tail(&info->list, &xen_irq_list_head);
  335. }
  336. static int __must_check xen_allocate_irq_dynamic(void)
  337. {
  338. int first = 0;
  339. int irq;
  340. #ifdef CONFIG_X86_IO_APIC
  341. /*
  342. * For an HVM guest or domain 0 which see "real" (emulated or
  343. * actual respectively) GSIs we allocate dynamic IRQs
  344. * e.g. those corresponding to event channels or MSIs
  345. * etc. from the range above those "real" GSIs to avoid
  346. * collisions.
  347. */
  348. if (xen_initial_domain() || xen_hvm_domain())
  349. first = get_nr_irqs_gsi();
  350. #endif
  351. irq = irq_alloc_desc_from(first, -1);
  352. xen_irq_init(irq);
  353. return irq;
  354. }
  355. static int __must_check xen_allocate_irq_gsi(unsigned gsi)
  356. {
  357. int irq;
  358. /*
  359. * A PV guest has no concept of a GSI (since it has no ACPI
  360. * nor access to/knowledge of the physical APICs). Therefore
  361. * all IRQs are dynamically allocated from the entire IRQ
  362. * space.
  363. */
  364. if (xen_pv_domain() && !xen_initial_domain())
  365. return xen_allocate_irq_dynamic();
  366. /* Legacy IRQ descriptors are already allocated by the arch. */
  367. if (gsi < NR_IRQS_LEGACY)
  368. irq = gsi;
  369. else
  370. irq = irq_alloc_desc_at(gsi, -1);
  371. xen_irq_init(irq);
  372. return irq;
  373. }
  374. static void xen_free_irq(unsigned irq)
  375. {
  376. struct irq_info *info = irq_get_handler_data(irq);
  377. list_del(&info->list);
  378. irq_set_handler_data(irq, NULL);
  379. kfree(info);
  380. /* Legacy IRQ descriptors are managed by the arch. */
  381. if (irq < NR_IRQS_LEGACY)
  382. return;
  383. irq_free_desc(irq);
  384. }
  385. static void pirq_query_unmask(int irq)
  386. {
  387. struct physdev_irq_status_query irq_status;
  388. struct irq_info *info = info_for_irq(irq);
  389. BUG_ON(info->type != IRQT_PIRQ);
  390. irq_status.irq = pirq_from_irq(irq);
  391. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  392. irq_status.flags = 0;
  393. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  394. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  395. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  396. }
  397. static bool probing_irq(int irq)
  398. {
  399. struct irq_desc *desc = irq_to_desc(irq);
  400. return desc && desc->action == NULL;
  401. }
  402. static void eoi_pirq(struct irq_data *data)
  403. {
  404. int evtchn = evtchn_from_irq(data->irq);
  405. struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) };
  406. int rc = 0;
  407. irq_move_irq(data);
  408. if (VALID_EVTCHN(evtchn))
  409. clear_evtchn(evtchn);
  410. if (pirq_needs_eoi(data->irq)) {
  411. rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  412. WARN_ON(rc);
  413. }
  414. }
  415. static void mask_ack_pirq(struct irq_data *data)
  416. {
  417. disable_dynirq(data);
  418. eoi_pirq(data);
  419. }
  420. static unsigned int __startup_pirq(unsigned int irq)
  421. {
  422. struct evtchn_bind_pirq bind_pirq;
  423. struct irq_info *info = info_for_irq(irq);
  424. int evtchn = evtchn_from_irq(irq);
  425. int rc;
  426. BUG_ON(info->type != IRQT_PIRQ);
  427. if (VALID_EVTCHN(evtchn))
  428. goto out;
  429. bind_pirq.pirq = pirq_from_irq(irq);
  430. /* NB. We are happy to share unless we are probing. */
  431. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  432. BIND_PIRQ__WILL_SHARE : 0;
  433. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  434. if (rc != 0) {
  435. if (!probing_irq(irq))
  436. printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
  437. irq);
  438. return 0;
  439. }
  440. evtchn = bind_pirq.port;
  441. pirq_query_unmask(irq);
  442. evtchn_to_irq[evtchn] = irq;
  443. bind_evtchn_to_cpu(evtchn, 0);
  444. info->evtchn = evtchn;
  445. out:
  446. unmask_evtchn(evtchn);
  447. eoi_pirq(irq_get_irq_data(irq));
  448. return 0;
  449. }
  450. static unsigned int startup_pirq(struct irq_data *data)
  451. {
  452. return __startup_pirq(data->irq);
  453. }
  454. static void shutdown_pirq(struct irq_data *data)
  455. {
  456. struct evtchn_close close;
  457. unsigned int irq = data->irq;
  458. struct irq_info *info = info_for_irq(irq);
  459. int evtchn = evtchn_from_irq(irq);
  460. BUG_ON(info->type != IRQT_PIRQ);
  461. if (!VALID_EVTCHN(evtchn))
  462. return;
  463. mask_evtchn(evtchn);
  464. close.port = evtchn;
  465. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  466. BUG();
  467. bind_evtchn_to_cpu(evtchn, 0);
  468. evtchn_to_irq[evtchn] = -1;
  469. info->evtchn = 0;
  470. }
  471. static void enable_pirq(struct irq_data *data)
  472. {
  473. startup_pirq(data);
  474. }
  475. static void disable_pirq(struct irq_data *data)
  476. {
  477. disable_dynirq(data);
  478. }
  479. static int find_irq_by_gsi(unsigned gsi)
  480. {
  481. struct irq_info *info;
  482. list_for_each_entry(info, &xen_irq_list_head, list) {
  483. if (info->type != IRQT_PIRQ)
  484. continue;
  485. if (info->u.pirq.gsi == gsi)
  486. return info->irq;
  487. }
  488. return -1;
  489. }
  490. /*
  491. * Do not make any assumptions regarding the relationship between the
  492. * IRQ number returned here and the Xen pirq argument.
  493. *
  494. * Note: We don't assign an event channel until the irq actually started
  495. * up. Return an existing irq if we've already got one for the gsi.
  496. *
  497. * Shareable implies level triggered, not shareable implies edge
  498. * triggered here.
  499. */
  500. int xen_bind_pirq_gsi_to_irq(unsigned gsi,
  501. unsigned pirq, int shareable, char *name)
  502. {
  503. int irq = -1;
  504. struct physdev_irq irq_op;
  505. mutex_lock(&irq_mapping_update_lock);
  506. irq = find_irq_by_gsi(gsi);
  507. if (irq != -1) {
  508. printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n",
  509. irq, gsi);
  510. goto out; /* XXX need refcount? */
  511. }
  512. irq = xen_allocate_irq_gsi(gsi);
  513. if (irq < 0)
  514. goto out;
  515. irq_op.irq = irq;
  516. irq_op.vector = 0;
  517. /* Only the privileged domain can do this. For non-priv, the pcifront
  518. * driver provides a PCI bus that does the call to do exactly
  519. * this in the priv domain. */
  520. if (xen_initial_domain() &&
  521. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  522. xen_free_irq(irq);
  523. irq = -ENOSPC;
  524. goto out;
  525. }
  526. xen_irq_info_pirq_init(irq, 0, pirq, gsi, irq_op.vector, DOMID_SELF,
  527. shareable ? PIRQ_SHAREABLE : 0);
  528. pirq_query_unmask(irq);
  529. /* We try to use the handler with the appropriate semantic for the
  530. * type of interrupt: if the interrupt is an edge triggered
  531. * interrupt we use handle_edge_irq.
  532. *
  533. * On the other hand if the interrupt is level triggered we use
  534. * handle_fasteoi_irq like the native code does for this kind of
  535. * interrupts.
  536. *
  537. * Depending on the Xen version, pirq_needs_eoi might return true
  538. * not only for level triggered interrupts but for edge triggered
  539. * interrupts too. In any case Xen always honors the eoi mechanism,
  540. * not injecting any more pirqs of the same kind if the first one
  541. * hasn't received an eoi yet. Therefore using the fasteoi handler
  542. * is the right choice either way.
  543. */
  544. if (shareable)
  545. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  546. handle_fasteoi_irq, name);
  547. else
  548. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  549. handle_edge_irq, name);
  550. out:
  551. mutex_unlock(&irq_mapping_update_lock);
  552. return irq;
  553. }
  554. #ifdef CONFIG_PCI_MSI
  555. int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
  556. {
  557. int rc;
  558. struct physdev_get_free_pirq op_get_free_pirq;
  559. op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
  560. rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
  561. WARN_ONCE(rc == -ENOSYS,
  562. "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
  563. return rc ? -1 : op_get_free_pirq.pirq;
  564. }
  565. int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
  566. int pirq, int vector, const char *name,
  567. domid_t domid)
  568. {
  569. int irq, ret;
  570. mutex_lock(&irq_mapping_update_lock);
  571. irq = xen_allocate_irq_dynamic();
  572. if (irq == -1)
  573. goto out;
  574. irq_set_chip_and_handler_name(irq, &xen_pirq_chip, handle_edge_irq,
  575. name);
  576. xen_irq_info_pirq_init(irq, 0, pirq, 0, vector, domid, 0);
  577. ret = irq_set_msi_desc(irq, msidesc);
  578. if (ret < 0)
  579. goto error_irq;
  580. out:
  581. mutex_unlock(&irq_mapping_update_lock);
  582. return irq;
  583. error_irq:
  584. mutex_unlock(&irq_mapping_update_lock);
  585. xen_free_irq(irq);
  586. return -1;
  587. }
  588. #endif
  589. int xen_destroy_irq(int irq)
  590. {
  591. struct irq_desc *desc;
  592. struct physdev_unmap_pirq unmap_irq;
  593. struct irq_info *info = info_for_irq(irq);
  594. int rc = -ENOENT;
  595. mutex_lock(&irq_mapping_update_lock);
  596. desc = irq_to_desc(irq);
  597. if (!desc)
  598. goto out;
  599. if (xen_initial_domain()) {
  600. unmap_irq.pirq = info->u.pirq.pirq;
  601. unmap_irq.domid = info->u.pirq.domid;
  602. rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
  603. /* If another domain quits without making the pci_disable_msix
  604. * call, the Xen hypervisor takes care of freeing the PIRQs
  605. * (free_domain_pirqs).
  606. */
  607. if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF))
  608. printk(KERN_INFO "domain %d does not have %d anymore\n",
  609. info->u.pirq.domid, info->u.pirq.pirq);
  610. else if (rc) {
  611. printk(KERN_WARNING "unmap irq failed %d\n", rc);
  612. goto out;
  613. }
  614. }
  615. xen_free_irq(irq);
  616. out:
  617. mutex_unlock(&irq_mapping_update_lock);
  618. return rc;
  619. }
  620. int xen_irq_from_pirq(unsigned pirq)
  621. {
  622. int irq;
  623. struct irq_info *info;
  624. mutex_lock(&irq_mapping_update_lock);
  625. list_for_each_entry(info, &xen_irq_list_head, list) {
  626. if (info == NULL || info->type != IRQT_PIRQ)
  627. continue;
  628. irq = info->irq;
  629. if (info->u.pirq.pirq == pirq)
  630. goto out;
  631. }
  632. irq = -1;
  633. out:
  634. mutex_unlock(&irq_mapping_update_lock);
  635. return irq;
  636. }
  637. int xen_pirq_from_irq(unsigned irq)
  638. {
  639. return pirq_from_irq(irq);
  640. }
  641. EXPORT_SYMBOL_GPL(xen_pirq_from_irq);
  642. int bind_evtchn_to_irq(unsigned int evtchn)
  643. {
  644. int irq;
  645. mutex_lock(&irq_mapping_update_lock);
  646. irq = evtchn_to_irq[evtchn];
  647. if (irq == -1) {
  648. irq = xen_allocate_irq_dynamic();
  649. if (irq == -1)
  650. goto out;
  651. irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
  652. handle_edge_irq, "event");
  653. xen_irq_info_evtchn_init(irq, evtchn);
  654. }
  655. out:
  656. mutex_unlock(&irq_mapping_update_lock);
  657. return irq;
  658. }
  659. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  660. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  661. {
  662. struct evtchn_bind_ipi bind_ipi;
  663. int evtchn, irq;
  664. mutex_lock(&irq_mapping_update_lock);
  665. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  666. if (irq == -1) {
  667. irq = xen_allocate_irq_dynamic();
  668. if (irq < 0)
  669. goto out;
  670. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  671. handle_percpu_irq, "ipi");
  672. bind_ipi.vcpu = cpu;
  673. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  674. &bind_ipi) != 0)
  675. BUG();
  676. evtchn = bind_ipi.port;
  677. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  678. bind_evtchn_to_cpu(evtchn, cpu);
  679. }
  680. out:
  681. mutex_unlock(&irq_mapping_update_lock);
  682. return irq;
  683. }
  684. static int bind_interdomain_evtchn_to_irq(unsigned int remote_domain,
  685. unsigned int remote_port)
  686. {
  687. struct evtchn_bind_interdomain bind_interdomain;
  688. int err;
  689. bind_interdomain.remote_dom = remote_domain;
  690. bind_interdomain.remote_port = remote_port;
  691. err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain,
  692. &bind_interdomain);
  693. return err ? : bind_evtchn_to_irq(bind_interdomain.local_port);
  694. }
  695. int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  696. {
  697. struct evtchn_bind_virq bind_virq;
  698. int evtchn, irq;
  699. mutex_lock(&irq_mapping_update_lock);
  700. irq = per_cpu(virq_to_irq, cpu)[virq];
  701. if (irq == -1) {
  702. irq = xen_allocate_irq_dynamic();
  703. if (irq == -1)
  704. goto out;
  705. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  706. handle_percpu_irq, "virq");
  707. bind_virq.virq = virq;
  708. bind_virq.vcpu = cpu;
  709. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  710. &bind_virq) != 0)
  711. BUG();
  712. evtchn = bind_virq.port;
  713. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  714. bind_evtchn_to_cpu(evtchn, cpu);
  715. }
  716. out:
  717. mutex_unlock(&irq_mapping_update_lock);
  718. return irq;
  719. }
  720. static void unbind_from_irq(unsigned int irq)
  721. {
  722. struct evtchn_close close;
  723. int evtchn = evtchn_from_irq(irq);
  724. mutex_lock(&irq_mapping_update_lock);
  725. if (VALID_EVTCHN(evtchn)) {
  726. close.port = evtchn;
  727. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  728. BUG();
  729. switch (type_from_irq(irq)) {
  730. case IRQT_VIRQ:
  731. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  732. [virq_from_irq(irq)] = -1;
  733. break;
  734. case IRQT_IPI:
  735. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  736. [ipi_from_irq(irq)] = -1;
  737. break;
  738. default:
  739. break;
  740. }
  741. /* Closed ports are implicitly re-bound to VCPU0. */
  742. bind_evtchn_to_cpu(evtchn, 0);
  743. evtchn_to_irq[evtchn] = -1;
  744. }
  745. BUG_ON(info_for_irq(irq)->type == IRQT_UNBOUND);
  746. xen_free_irq(irq);
  747. mutex_unlock(&irq_mapping_update_lock);
  748. }
  749. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  750. irq_handler_t handler,
  751. unsigned long irqflags,
  752. const char *devname, void *dev_id)
  753. {
  754. int irq, retval;
  755. irq = bind_evtchn_to_irq(evtchn);
  756. if (irq < 0)
  757. return irq;
  758. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  759. if (retval != 0) {
  760. unbind_from_irq(irq);
  761. return retval;
  762. }
  763. return irq;
  764. }
  765. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  766. int bind_interdomain_evtchn_to_irqhandler(unsigned int remote_domain,
  767. unsigned int remote_port,
  768. irq_handler_t handler,
  769. unsigned long irqflags,
  770. const char *devname,
  771. void *dev_id)
  772. {
  773. int irq, retval;
  774. irq = bind_interdomain_evtchn_to_irq(remote_domain, remote_port);
  775. if (irq < 0)
  776. return irq;
  777. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  778. if (retval != 0) {
  779. unbind_from_irq(irq);
  780. return retval;
  781. }
  782. return irq;
  783. }
  784. EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler);
  785. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  786. irq_handler_t handler,
  787. unsigned long irqflags, const char *devname, void *dev_id)
  788. {
  789. int irq, retval;
  790. irq = bind_virq_to_irq(virq, cpu);
  791. if (irq < 0)
  792. return irq;
  793. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  794. if (retval != 0) {
  795. unbind_from_irq(irq);
  796. return retval;
  797. }
  798. return irq;
  799. }
  800. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  801. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  802. unsigned int cpu,
  803. irq_handler_t handler,
  804. unsigned long irqflags,
  805. const char *devname,
  806. void *dev_id)
  807. {
  808. int irq, retval;
  809. irq = bind_ipi_to_irq(ipi, cpu);
  810. if (irq < 0)
  811. return irq;
  812. irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME;
  813. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  814. if (retval != 0) {
  815. unbind_from_irq(irq);
  816. return retval;
  817. }
  818. return irq;
  819. }
  820. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  821. {
  822. free_irq(irq, dev_id);
  823. unbind_from_irq(irq);
  824. }
  825. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  826. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  827. {
  828. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  829. BUG_ON(irq < 0);
  830. notify_remote_via_irq(irq);
  831. }
  832. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  833. {
  834. struct shared_info *sh = HYPERVISOR_shared_info;
  835. int cpu = smp_processor_id();
  836. unsigned long *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
  837. int i;
  838. unsigned long flags;
  839. static DEFINE_SPINLOCK(debug_lock);
  840. struct vcpu_info *v;
  841. spin_lock_irqsave(&debug_lock, flags);
  842. printk("\nvcpu %d\n ", cpu);
  843. for_each_online_cpu(i) {
  844. int pending;
  845. v = per_cpu(xen_vcpu, i);
  846. pending = (get_irq_regs() && i == cpu)
  847. ? xen_irqs_disabled(get_irq_regs())
  848. : v->evtchn_upcall_mask;
  849. printk("%d: masked=%d pending=%d event_sel %0*lx\n ", i,
  850. pending, v->evtchn_upcall_pending,
  851. (int)(sizeof(v->evtchn_pending_sel)*2),
  852. v->evtchn_pending_sel);
  853. }
  854. v = per_cpu(xen_vcpu, cpu);
  855. printk("\npending:\n ");
  856. for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  857. printk("%0*lx%s", (int)sizeof(sh->evtchn_pending[0])*2,
  858. sh->evtchn_pending[i],
  859. i % 8 == 0 ? "\n " : " ");
  860. printk("\nglobal mask:\n ");
  861. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  862. printk("%0*lx%s",
  863. (int)(sizeof(sh->evtchn_mask[0])*2),
  864. sh->evtchn_mask[i],
  865. i % 8 == 0 ? "\n " : " ");
  866. printk("\nglobally unmasked:\n ");
  867. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  868. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  869. sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  870. i % 8 == 0 ? "\n " : " ");
  871. printk("\nlocal cpu%d mask:\n ", cpu);
  872. for (i = (NR_EVENT_CHANNELS/BITS_PER_LONG)-1; i >= 0; i--)
  873. printk("%0*lx%s", (int)(sizeof(cpu_evtchn[0])*2),
  874. cpu_evtchn[i],
  875. i % 8 == 0 ? "\n " : " ");
  876. printk("\nlocally unmasked:\n ");
  877. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
  878. unsigned long pending = sh->evtchn_pending[i]
  879. & ~sh->evtchn_mask[i]
  880. & cpu_evtchn[i];
  881. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  882. pending, i % 8 == 0 ? "\n " : " ");
  883. }
  884. printk("\npending list:\n");
  885. for (i = 0; i < NR_EVENT_CHANNELS; i++) {
  886. if (sync_test_bit(i, sh->evtchn_pending)) {
  887. int word_idx = i / BITS_PER_LONG;
  888. printk(" %d: event %d -> irq %d%s%s%s\n",
  889. cpu_from_evtchn(i), i,
  890. evtchn_to_irq[i],
  891. sync_test_bit(word_idx, &v->evtchn_pending_sel)
  892. ? "" : " l2-clear",
  893. !sync_test_bit(i, sh->evtchn_mask)
  894. ? "" : " globally-masked",
  895. sync_test_bit(i, cpu_evtchn)
  896. ? "" : " locally-masked");
  897. }
  898. }
  899. spin_unlock_irqrestore(&debug_lock, flags);
  900. return IRQ_HANDLED;
  901. }
  902. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  903. static DEFINE_PER_CPU(unsigned int, current_word_idx);
  904. static DEFINE_PER_CPU(unsigned int, current_bit_idx);
  905. /*
  906. * Mask out the i least significant bits of w
  907. */
  908. #define MASK_LSBS(w, i) (w & ((~0UL) << i))
  909. /*
  910. * Search the CPUs pending events bitmasks. For each one found, map
  911. * the event number to an irq, and feed it into do_IRQ() for
  912. * handling.
  913. *
  914. * Xen uses a two-level bitmap to speed searching. The first level is
  915. * a bitset of words which contain pending event bits. The second
  916. * level is a bitset of pending events themselves.
  917. */
  918. static void __xen_evtchn_do_upcall(void)
  919. {
  920. int start_word_idx, start_bit_idx;
  921. int word_idx, bit_idx;
  922. int i;
  923. int cpu = get_cpu();
  924. struct shared_info *s = HYPERVISOR_shared_info;
  925. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  926. unsigned count;
  927. do {
  928. unsigned long pending_words;
  929. vcpu_info->evtchn_upcall_pending = 0;
  930. if (__this_cpu_inc_return(xed_nesting_count) - 1)
  931. goto out;
  932. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  933. /* Clear master flag /before/ clearing selector flag. */
  934. wmb();
  935. #endif
  936. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  937. start_word_idx = __this_cpu_read(current_word_idx);
  938. start_bit_idx = __this_cpu_read(current_bit_idx);
  939. word_idx = start_word_idx;
  940. for (i = 0; pending_words != 0; i++) {
  941. unsigned long pending_bits;
  942. unsigned long words;
  943. words = MASK_LSBS(pending_words, word_idx);
  944. /*
  945. * If we masked out all events, wrap to beginning.
  946. */
  947. if (words == 0) {
  948. word_idx = 0;
  949. bit_idx = 0;
  950. continue;
  951. }
  952. word_idx = __ffs(words);
  953. pending_bits = active_evtchns(cpu, s, word_idx);
  954. bit_idx = 0; /* usually scan entire word from start */
  955. if (word_idx == start_word_idx) {
  956. /* We scan the starting word in two parts */
  957. if (i == 0)
  958. /* 1st time: start in the middle */
  959. bit_idx = start_bit_idx;
  960. else
  961. /* 2nd time: mask bits done already */
  962. bit_idx &= (1UL << start_bit_idx) - 1;
  963. }
  964. do {
  965. unsigned long bits;
  966. int port, irq;
  967. struct irq_desc *desc;
  968. bits = MASK_LSBS(pending_bits, bit_idx);
  969. /* If we masked out all events, move on. */
  970. if (bits == 0)
  971. break;
  972. bit_idx = __ffs(bits);
  973. /* Process port. */
  974. port = (word_idx * BITS_PER_LONG) + bit_idx;
  975. irq = evtchn_to_irq[port];
  976. if (irq != -1) {
  977. desc = irq_to_desc(irq);
  978. if (desc)
  979. generic_handle_irq_desc(irq, desc);
  980. }
  981. bit_idx = (bit_idx + 1) % BITS_PER_LONG;
  982. /* Next caller starts at last processed + 1 */
  983. __this_cpu_write(current_word_idx,
  984. bit_idx ? word_idx :
  985. (word_idx+1) % BITS_PER_LONG);
  986. __this_cpu_write(current_bit_idx, bit_idx);
  987. } while (bit_idx != 0);
  988. /* Scan start_l1i twice; all others once. */
  989. if ((word_idx != start_word_idx) || (i != 0))
  990. pending_words &= ~(1UL << word_idx);
  991. word_idx = (word_idx + 1) % BITS_PER_LONG;
  992. }
  993. BUG_ON(!irqs_disabled());
  994. count = __this_cpu_read(xed_nesting_count);
  995. __this_cpu_write(xed_nesting_count, 0);
  996. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  997. out:
  998. put_cpu();
  999. }
  1000. void xen_evtchn_do_upcall(struct pt_regs *regs)
  1001. {
  1002. struct pt_regs *old_regs = set_irq_regs(regs);
  1003. exit_idle();
  1004. irq_enter();
  1005. __xen_evtchn_do_upcall();
  1006. irq_exit();
  1007. set_irq_regs(old_regs);
  1008. }
  1009. void xen_hvm_evtchn_do_upcall(void)
  1010. {
  1011. __xen_evtchn_do_upcall();
  1012. }
  1013. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  1014. /* Rebind a new event channel to an existing irq. */
  1015. void rebind_evtchn_irq(int evtchn, int irq)
  1016. {
  1017. struct irq_info *info = info_for_irq(irq);
  1018. /* Make sure the irq is masked, since the new event channel
  1019. will also be masked. */
  1020. disable_irq(irq);
  1021. mutex_lock(&irq_mapping_update_lock);
  1022. /* After resume the irq<->evtchn mappings are all cleared out */
  1023. BUG_ON(evtchn_to_irq[evtchn] != -1);
  1024. /* Expect irq to have been bound before,
  1025. so there should be a proper type */
  1026. BUG_ON(info->type == IRQT_UNBOUND);
  1027. xen_irq_info_evtchn_init(irq, evtchn);
  1028. mutex_unlock(&irq_mapping_update_lock);
  1029. /* new event channels are always bound to cpu 0 */
  1030. irq_set_affinity(irq, cpumask_of(0));
  1031. /* Unmask the event channel. */
  1032. enable_irq(irq);
  1033. }
  1034. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  1035. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  1036. {
  1037. struct evtchn_bind_vcpu bind_vcpu;
  1038. int evtchn = evtchn_from_irq(irq);
  1039. if (!VALID_EVTCHN(evtchn))
  1040. return -1;
  1041. /*
  1042. * Events delivered via platform PCI interrupts are always
  1043. * routed to vcpu 0 and hence cannot be rebound.
  1044. */
  1045. if (xen_hvm_domain() && !xen_have_vector_callback)
  1046. return -1;
  1047. /* Send future instances of this interrupt to other vcpu. */
  1048. bind_vcpu.port = evtchn;
  1049. bind_vcpu.vcpu = tcpu;
  1050. /*
  1051. * If this fails, it usually just indicates that we're dealing with a
  1052. * virq or IPI channel, which don't actually need to be rebound. Ignore
  1053. * it, but don't do the xenlinux-level rebind in that case.
  1054. */
  1055. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  1056. bind_evtchn_to_cpu(evtchn, tcpu);
  1057. return 0;
  1058. }
  1059. static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
  1060. bool force)
  1061. {
  1062. unsigned tcpu = cpumask_first(dest);
  1063. return rebind_irq_to_cpu(data->irq, tcpu);
  1064. }
  1065. int resend_irq_on_evtchn(unsigned int irq)
  1066. {
  1067. int masked, evtchn = evtchn_from_irq(irq);
  1068. struct shared_info *s = HYPERVISOR_shared_info;
  1069. if (!VALID_EVTCHN(evtchn))
  1070. return 1;
  1071. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  1072. sync_set_bit(evtchn, s->evtchn_pending);
  1073. if (!masked)
  1074. unmask_evtchn(evtchn);
  1075. return 1;
  1076. }
  1077. static void enable_dynirq(struct irq_data *data)
  1078. {
  1079. int evtchn = evtchn_from_irq(data->irq);
  1080. if (VALID_EVTCHN(evtchn))
  1081. unmask_evtchn(evtchn);
  1082. }
  1083. static void disable_dynirq(struct irq_data *data)
  1084. {
  1085. int evtchn = evtchn_from_irq(data->irq);
  1086. if (VALID_EVTCHN(evtchn))
  1087. mask_evtchn(evtchn);
  1088. }
  1089. static void ack_dynirq(struct irq_data *data)
  1090. {
  1091. int evtchn = evtchn_from_irq(data->irq);
  1092. irq_move_irq(data);
  1093. if (VALID_EVTCHN(evtchn))
  1094. clear_evtchn(evtchn);
  1095. }
  1096. static void mask_ack_dynirq(struct irq_data *data)
  1097. {
  1098. disable_dynirq(data);
  1099. ack_dynirq(data);
  1100. }
  1101. static int retrigger_dynirq(struct irq_data *data)
  1102. {
  1103. int evtchn = evtchn_from_irq(data->irq);
  1104. struct shared_info *sh = HYPERVISOR_shared_info;
  1105. int ret = 0;
  1106. if (VALID_EVTCHN(evtchn)) {
  1107. int masked;
  1108. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  1109. sync_set_bit(evtchn, sh->evtchn_pending);
  1110. if (!masked)
  1111. unmask_evtchn(evtchn);
  1112. ret = 1;
  1113. }
  1114. return ret;
  1115. }
  1116. static void restore_pirqs(void)
  1117. {
  1118. int pirq, rc, irq, gsi;
  1119. struct physdev_map_pirq map_irq;
  1120. struct irq_info *info;
  1121. list_for_each_entry(info, &xen_irq_list_head, list) {
  1122. if (info->type != IRQT_PIRQ)
  1123. continue;
  1124. pirq = info->u.pirq.pirq;
  1125. gsi = info->u.pirq.gsi;
  1126. irq = info->irq;
  1127. /* save/restore of PT devices doesn't work, so at this point the
  1128. * only devices present are GSI based emulated devices */
  1129. if (!gsi)
  1130. continue;
  1131. map_irq.domid = DOMID_SELF;
  1132. map_irq.type = MAP_PIRQ_TYPE_GSI;
  1133. map_irq.index = gsi;
  1134. map_irq.pirq = pirq;
  1135. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  1136. if (rc) {
  1137. printk(KERN_WARNING "xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
  1138. gsi, irq, pirq, rc);
  1139. xen_free_irq(irq);
  1140. continue;
  1141. }
  1142. printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
  1143. __startup_pirq(irq);
  1144. }
  1145. }
  1146. static void restore_cpu_virqs(unsigned int cpu)
  1147. {
  1148. struct evtchn_bind_virq bind_virq;
  1149. int virq, irq, evtchn;
  1150. for (virq = 0; virq < NR_VIRQS; virq++) {
  1151. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  1152. continue;
  1153. BUG_ON(virq_from_irq(irq) != virq);
  1154. /* Get a new binding from Xen. */
  1155. bind_virq.virq = virq;
  1156. bind_virq.vcpu = cpu;
  1157. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  1158. &bind_virq) != 0)
  1159. BUG();
  1160. evtchn = bind_virq.port;
  1161. /* Record the new mapping. */
  1162. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  1163. bind_evtchn_to_cpu(evtchn, cpu);
  1164. }
  1165. }
  1166. static void restore_cpu_ipis(unsigned int cpu)
  1167. {
  1168. struct evtchn_bind_ipi bind_ipi;
  1169. int ipi, irq, evtchn;
  1170. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  1171. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  1172. continue;
  1173. BUG_ON(ipi_from_irq(irq) != ipi);
  1174. /* Get a new binding from Xen. */
  1175. bind_ipi.vcpu = cpu;
  1176. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  1177. &bind_ipi) != 0)
  1178. BUG();
  1179. evtchn = bind_ipi.port;
  1180. /* Record the new mapping. */
  1181. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  1182. bind_evtchn_to_cpu(evtchn, cpu);
  1183. }
  1184. }
  1185. /* Clear an irq's pending state, in preparation for polling on it */
  1186. void xen_clear_irq_pending(int irq)
  1187. {
  1188. int evtchn = evtchn_from_irq(irq);
  1189. if (VALID_EVTCHN(evtchn))
  1190. clear_evtchn(evtchn);
  1191. }
  1192. EXPORT_SYMBOL(xen_clear_irq_pending);
  1193. void xen_set_irq_pending(int irq)
  1194. {
  1195. int evtchn = evtchn_from_irq(irq);
  1196. if (VALID_EVTCHN(evtchn))
  1197. set_evtchn(evtchn);
  1198. }
  1199. bool xen_test_irq_pending(int irq)
  1200. {
  1201. int evtchn = evtchn_from_irq(irq);
  1202. bool ret = false;
  1203. if (VALID_EVTCHN(evtchn))
  1204. ret = test_evtchn(evtchn);
  1205. return ret;
  1206. }
  1207. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  1208. * the irq will be disabled so it won't deliver an interrupt. */
  1209. void xen_poll_irq_timeout(int irq, u64 timeout)
  1210. {
  1211. evtchn_port_t evtchn = evtchn_from_irq(irq);
  1212. if (VALID_EVTCHN(evtchn)) {
  1213. struct sched_poll poll;
  1214. poll.nr_ports = 1;
  1215. poll.timeout = timeout;
  1216. set_xen_guest_handle(poll.ports, &evtchn);
  1217. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  1218. BUG();
  1219. }
  1220. }
  1221. EXPORT_SYMBOL(xen_poll_irq_timeout);
  1222. /* Poll waiting for an irq to become pending. In the usual case, the
  1223. * irq will be disabled so it won't deliver an interrupt. */
  1224. void xen_poll_irq(int irq)
  1225. {
  1226. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  1227. }
  1228. /* Check whether the IRQ line is shared with other guests. */
  1229. int xen_test_irq_shared(int irq)
  1230. {
  1231. struct irq_info *info = info_for_irq(irq);
  1232. struct physdev_irq_status_query irq_status = { .irq = info->u.pirq.pirq };
  1233. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  1234. return 0;
  1235. return !(irq_status.flags & XENIRQSTAT_shared);
  1236. }
  1237. EXPORT_SYMBOL_GPL(xen_test_irq_shared);
  1238. void xen_irq_resume(void)
  1239. {
  1240. unsigned int cpu, evtchn;
  1241. struct irq_info *info;
  1242. init_evtchn_cpu_bindings();
  1243. /* New event-channel space is not 'live' yet. */
  1244. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1245. mask_evtchn(evtchn);
  1246. /* No IRQ <-> event-channel mappings. */
  1247. list_for_each_entry(info, &xen_irq_list_head, list)
  1248. info->evtchn = 0; /* zap event-channel binding */
  1249. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1250. evtchn_to_irq[evtchn] = -1;
  1251. for_each_possible_cpu(cpu) {
  1252. restore_cpu_virqs(cpu);
  1253. restore_cpu_ipis(cpu);
  1254. }
  1255. restore_pirqs();
  1256. }
  1257. static struct irq_chip xen_dynamic_chip __read_mostly = {
  1258. .name = "xen-dyn",
  1259. .irq_disable = disable_dynirq,
  1260. .irq_mask = disable_dynirq,
  1261. .irq_unmask = enable_dynirq,
  1262. .irq_ack = ack_dynirq,
  1263. .irq_mask_ack = mask_ack_dynirq,
  1264. .irq_set_affinity = set_affinity_irq,
  1265. .irq_retrigger = retrigger_dynirq,
  1266. };
  1267. static struct irq_chip xen_pirq_chip __read_mostly = {
  1268. .name = "xen-pirq",
  1269. .irq_startup = startup_pirq,
  1270. .irq_shutdown = shutdown_pirq,
  1271. .irq_enable = enable_pirq,
  1272. .irq_disable = disable_pirq,
  1273. .irq_mask = disable_dynirq,
  1274. .irq_unmask = enable_dynirq,
  1275. .irq_ack = eoi_pirq,
  1276. .irq_eoi = eoi_pirq,
  1277. .irq_mask_ack = mask_ack_pirq,
  1278. .irq_set_affinity = set_affinity_irq,
  1279. .irq_retrigger = retrigger_dynirq,
  1280. };
  1281. static struct irq_chip xen_percpu_chip __read_mostly = {
  1282. .name = "xen-percpu",
  1283. .irq_disable = disable_dynirq,
  1284. .irq_mask = disable_dynirq,
  1285. .irq_unmask = enable_dynirq,
  1286. .irq_ack = ack_dynirq,
  1287. };
  1288. int xen_set_callback_via(uint64_t via)
  1289. {
  1290. struct xen_hvm_param a;
  1291. a.domid = DOMID_SELF;
  1292. a.index = HVM_PARAM_CALLBACK_IRQ;
  1293. a.value = via;
  1294. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  1295. }
  1296. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  1297. #ifdef CONFIG_XEN_PVHVM
  1298. /* Vector callbacks are better than PCI interrupts to receive event
  1299. * channel notifications because we can receive vector callbacks on any
  1300. * vcpu and we don't need PCI support or APIC interactions. */
  1301. void xen_callback_vector(void)
  1302. {
  1303. int rc;
  1304. uint64_t callback_via;
  1305. if (xen_have_vector_callback) {
  1306. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  1307. rc = xen_set_callback_via(callback_via);
  1308. if (rc) {
  1309. printk(KERN_ERR "Request for Xen HVM callback vector"
  1310. " failed.\n");
  1311. xen_have_vector_callback = 0;
  1312. return;
  1313. }
  1314. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  1315. "enabled\n");
  1316. /* in the restore case the vector has already been allocated */
  1317. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  1318. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  1319. }
  1320. }
  1321. #else
  1322. void xen_callback_vector(void) {}
  1323. #endif
  1324. void __init xen_init_IRQ(void)
  1325. {
  1326. int i;
  1327. evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
  1328. GFP_KERNEL);
  1329. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1330. evtchn_to_irq[i] = -1;
  1331. init_evtchn_cpu_bindings();
  1332. /* No event channels are 'live' right now. */
  1333. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1334. mask_evtchn(i);
  1335. if (xen_hvm_domain()) {
  1336. xen_callback_vector();
  1337. native_init_IRQ();
  1338. /* pci_xen_hvm_init must be called after native_init_IRQ so that
  1339. * __acpi_register_gsi can point at the right function */
  1340. pci_xen_hvm_init();
  1341. } else {
  1342. irq_ctx_init(smp_processor_id());
  1343. if (xen_initial_domain())
  1344. pci_xen_initial_domain();
  1345. }
  1346. }