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/arch/x86/pci/pcbios.c

https://github.com/dmitriy103/bravo_kernel-2.6.35
C | 430 lines | 334 code | 49 blank | 47 comment | 38 complexity | eec63659f33f4999d86606ca4f7d47d7 MD5 | raw file
  1. /*
  2. * BIOS32 and PCI BIOS handling.
  3. */
  4. #include <linux/pci.h>
  5. #include <linux/init.h>
  6. #include <linux/slab.h>
  7. #include <linux/module.h>
  8. #include <linux/uaccess.h>
  9. #include <asm/pci_x86.h>
  10. #include <asm/pci-functions.h>
  11. /* BIOS32 signature: "_32_" */
  12. #define BIOS32_SIGNATURE (('_' << 0) + ('3' << 8) + ('2' << 16) + ('_' << 24))
  13. /* PCI signature: "PCI " */
  14. #define PCI_SIGNATURE (('P' << 0) + ('C' << 8) + ('I' << 16) + (' ' << 24))
  15. /* PCI service signature: "$PCI" */
  16. #define PCI_SERVICE (('$' << 0) + ('P' << 8) + ('C' << 16) + ('I' << 24))
  17. /* PCI BIOS hardware mechanism flags */
  18. #define PCIBIOS_HW_TYPE1 0x01
  19. #define PCIBIOS_HW_TYPE2 0x02
  20. #define PCIBIOS_HW_TYPE1_SPEC 0x10
  21. #define PCIBIOS_HW_TYPE2_SPEC 0x20
  22. /*
  23. * This is the standard structure used to identify the entry point
  24. * to the BIOS32 Service Directory, as documented in
  25. * Standard BIOS 32-bit Service Directory Proposal
  26. * Revision 0.4 May 24, 1993
  27. * Phoenix Technologies Ltd.
  28. * Norwood, MA
  29. * and the PCI BIOS specification.
  30. */
  31. union bios32 {
  32. struct {
  33. unsigned long signature; /* _32_ */
  34. unsigned long entry; /* 32 bit physical address */
  35. unsigned char revision; /* Revision level, 0 */
  36. unsigned char length; /* Length in paragraphs should be 01 */
  37. unsigned char checksum; /* All bytes must add up to zero */
  38. unsigned char reserved[5]; /* Must be zero */
  39. } fields;
  40. char chars[16];
  41. };
  42. /*
  43. * Physical address of the service directory. I don't know if we're
  44. * allowed to have more than one of these or not, so just in case
  45. * we'll make pcibios_present() take a memory start parameter and store
  46. * the array there.
  47. */
  48. static struct {
  49. unsigned long address;
  50. unsigned short segment;
  51. } bios32_indirect = { 0, __KERNEL_CS };
  52. /*
  53. * Returns the entry point for the given service, NULL on error
  54. */
  55. static unsigned long bios32_service(unsigned long service)
  56. {
  57. unsigned char return_code; /* %al */
  58. unsigned long address; /* %ebx */
  59. unsigned long length; /* %ecx */
  60. unsigned long entry; /* %edx */
  61. unsigned long flags;
  62. local_irq_save(flags);
  63. __asm__("lcall *(%%edi); cld"
  64. : "=a" (return_code),
  65. "=b" (address),
  66. "=c" (length),
  67. "=d" (entry)
  68. : "0" (service),
  69. "1" (0),
  70. "D" (&bios32_indirect));
  71. local_irq_restore(flags);
  72. switch (return_code) {
  73. case 0:
  74. return address + entry;
  75. case 0x80: /* Not present */
  76. printk(KERN_WARNING "bios32_service(0x%lx): not present\n", service);
  77. return 0;
  78. default: /* Shouldn't happen */
  79. printk(KERN_WARNING "bios32_service(0x%lx): returned 0x%x -- BIOS bug!\n",
  80. service, return_code);
  81. return 0;
  82. }
  83. }
  84. static struct {
  85. unsigned long address;
  86. unsigned short segment;
  87. } pci_indirect = { 0, __KERNEL_CS };
  88. static int pci_bios_present;
  89. static int __devinit check_pcibios(void)
  90. {
  91. u32 signature, eax, ebx, ecx;
  92. u8 status, major_ver, minor_ver, hw_mech;
  93. unsigned long flags, pcibios_entry;
  94. if ((pcibios_entry = bios32_service(PCI_SERVICE))) {
  95. pci_indirect.address = pcibios_entry + PAGE_OFFSET;
  96. local_irq_save(flags);
  97. __asm__(
  98. "lcall *(%%edi); cld\n\t"
  99. "jc 1f\n\t"
  100. "xor %%ah, %%ah\n"
  101. "1:"
  102. : "=d" (signature),
  103. "=a" (eax),
  104. "=b" (ebx),
  105. "=c" (ecx)
  106. : "1" (PCIBIOS_PCI_BIOS_PRESENT),
  107. "D" (&pci_indirect)
  108. : "memory");
  109. local_irq_restore(flags);
  110. status = (eax >> 8) & 0xff;
  111. hw_mech = eax & 0xff;
  112. major_ver = (ebx >> 8) & 0xff;
  113. minor_ver = ebx & 0xff;
  114. if (pcibios_last_bus < 0)
  115. pcibios_last_bus = ecx & 0xff;
  116. DBG("PCI: BIOS probe returned s=%02x hw=%02x ver=%02x.%02x l=%02x\n",
  117. status, hw_mech, major_ver, minor_ver, pcibios_last_bus);
  118. if (status || signature != PCI_SIGNATURE) {
  119. printk (KERN_ERR "PCI: BIOS BUG #%x[%08x] found\n",
  120. status, signature);
  121. return 0;
  122. }
  123. printk(KERN_INFO "PCI: PCI BIOS revision %x.%02x entry at 0x%lx, last bus=%d\n",
  124. major_ver, minor_ver, pcibios_entry, pcibios_last_bus);
  125. #ifdef CONFIG_PCI_DIRECT
  126. if (!(hw_mech & PCIBIOS_HW_TYPE1))
  127. pci_probe &= ~PCI_PROBE_CONF1;
  128. if (!(hw_mech & PCIBIOS_HW_TYPE2))
  129. pci_probe &= ~PCI_PROBE_CONF2;
  130. #endif
  131. return 1;
  132. }
  133. return 0;
  134. }
  135. static int pci_bios_read(unsigned int seg, unsigned int bus,
  136. unsigned int devfn, int reg, int len, u32 *value)
  137. {
  138. unsigned long result = 0;
  139. unsigned long flags;
  140. unsigned long bx = (bus << 8) | devfn;
  141. if (!value || (bus > 255) || (devfn > 255) || (reg > 255))
  142. return -EINVAL;
  143. raw_spin_lock_irqsave(&pci_config_lock, flags);
  144. switch (len) {
  145. case 1:
  146. __asm__("lcall *(%%esi); cld\n\t"
  147. "jc 1f\n\t"
  148. "xor %%ah, %%ah\n"
  149. "1:"
  150. : "=c" (*value),
  151. "=a" (result)
  152. : "1" (PCIBIOS_READ_CONFIG_BYTE),
  153. "b" (bx),
  154. "D" ((long)reg),
  155. "S" (&pci_indirect));
  156. /*
  157. * Zero-extend the result beyond 8 bits, do not trust the
  158. * BIOS having done it:
  159. */
  160. *value &= 0xff;
  161. break;
  162. case 2:
  163. __asm__("lcall *(%%esi); cld\n\t"
  164. "jc 1f\n\t"
  165. "xor %%ah, %%ah\n"
  166. "1:"
  167. : "=c" (*value),
  168. "=a" (result)
  169. : "1" (PCIBIOS_READ_CONFIG_WORD),
  170. "b" (bx),
  171. "D" ((long)reg),
  172. "S" (&pci_indirect));
  173. /*
  174. * Zero-extend the result beyond 16 bits, do not trust the
  175. * BIOS having done it:
  176. */
  177. *value &= 0xffff;
  178. break;
  179. case 4:
  180. __asm__("lcall *(%%esi); cld\n\t"
  181. "jc 1f\n\t"
  182. "xor %%ah, %%ah\n"
  183. "1:"
  184. : "=c" (*value),
  185. "=a" (result)
  186. : "1" (PCIBIOS_READ_CONFIG_DWORD),
  187. "b" (bx),
  188. "D" ((long)reg),
  189. "S" (&pci_indirect));
  190. break;
  191. }
  192. raw_spin_unlock_irqrestore(&pci_config_lock, flags);
  193. return (int)((result & 0xff00) >> 8);
  194. }
  195. static int pci_bios_write(unsigned int seg, unsigned int bus,
  196. unsigned int devfn, int reg, int len, u32 value)
  197. {
  198. unsigned long result = 0;
  199. unsigned long flags;
  200. unsigned long bx = (bus << 8) | devfn;
  201. if ((bus > 255) || (devfn > 255) || (reg > 255))
  202. return -EINVAL;
  203. raw_spin_lock_irqsave(&pci_config_lock, flags);
  204. switch (len) {
  205. case 1:
  206. __asm__("lcall *(%%esi); cld\n\t"
  207. "jc 1f\n\t"
  208. "xor %%ah, %%ah\n"
  209. "1:"
  210. : "=a" (result)
  211. : "0" (PCIBIOS_WRITE_CONFIG_BYTE),
  212. "c" (value),
  213. "b" (bx),
  214. "D" ((long)reg),
  215. "S" (&pci_indirect));
  216. break;
  217. case 2:
  218. __asm__("lcall *(%%esi); cld\n\t"
  219. "jc 1f\n\t"
  220. "xor %%ah, %%ah\n"
  221. "1:"
  222. : "=a" (result)
  223. : "0" (PCIBIOS_WRITE_CONFIG_WORD),
  224. "c" (value),
  225. "b" (bx),
  226. "D" ((long)reg),
  227. "S" (&pci_indirect));
  228. break;
  229. case 4:
  230. __asm__("lcall *(%%esi); cld\n\t"
  231. "jc 1f\n\t"
  232. "xor %%ah, %%ah\n"
  233. "1:"
  234. : "=a" (result)
  235. : "0" (PCIBIOS_WRITE_CONFIG_DWORD),
  236. "c" (value),
  237. "b" (bx),
  238. "D" ((long)reg),
  239. "S" (&pci_indirect));
  240. break;
  241. }
  242. raw_spin_unlock_irqrestore(&pci_config_lock, flags);
  243. return (int)((result & 0xff00) >> 8);
  244. }
  245. /*
  246. * Function table for BIOS32 access
  247. */
  248. static struct pci_raw_ops pci_bios_access = {
  249. .read = pci_bios_read,
  250. .write = pci_bios_write
  251. };
  252. /*
  253. * Try to find PCI BIOS.
  254. */
  255. static struct pci_raw_ops * __devinit pci_find_bios(void)
  256. {
  257. union bios32 *check;
  258. unsigned char sum;
  259. int i, length;
  260. /*
  261. * Follow the standard procedure for locating the BIOS32 Service
  262. * directory by scanning the permissible address range from
  263. * 0xe0000 through 0xfffff for a valid BIOS32 structure.
  264. */
  265. for (check = (union bios32 *) __va(0xe0000);
  266. check <= (union bios32 *) __va(0xffff0);
  267. ++check) {
  268. long sig;
  269. if (probe_kernel_address(&check->fields.signature, sig))
  270. continue;
  271. if (check->fields.signature != BIOS32_SIGNATURE)
  272. continue;
  273. length = check->fields.length * 16;
  274. if (!length)
  275. continue;
  276. sum = 0;
  277. for (i = 0; i < length ; ++i)
  278. sum += check->chars[i];
  279. if (sum != 0)
  280. continue;
  281. if (check->fields.revision != 0) {
  282. printk("PCI: unsupported BIOS32 revision %d at 0x%p\n",
  283. check->fields.revision, check);
  284. continue;
  285. }
  286. DBG("PCI: BIOS32 Service Directory structure at 0x%p\n", check);
  287. if (check->fields.entry >= 0x100000) {
  288. printk("PCI: BIOS32 entry (0x%p) in high memory, "
  289. "cannot use.\n", check);
  290. return NULL;
  291. } else {
  292. unsigned long bios32_entry = check->fields.entry;
  293. DBG("PCI: BIOS32 Service Directory entry at 0x%lx\n",
  294. bios32_entry);
  295. bios32_indirect.address = bios32_entry + PAGE_OFFSET;
  296. if (check_pcibios())
  297. return &pci_bios_access;
  298. }
  299. break; /* Hopefully more than one BIOS32 cannot happen... */
  300. }
  301. return NULL;
  302. }
  303. /*
  304. * BIOS Functions for IRQ Routing
  305. */
  306. struct irq_routing_options {
  307. u16 size;
  308. struct irq_info *table;
  309. u16 segment;
  310. } __attribute__((packed));
  311. struct irq_routing_table * pcibios_get_irq_routing_table(void)
  312. {
  313. struct irq_routing_options opt;
  314. struct irq_routing_table *rt = NULL;
  315. int ret, map;
  316. unsigned long page;
  317. if (!pci_bios_present)
  318. return NULL;
  319. page = __get_free_page(GFP_KERNEL);
  320. if (!page)
  321. return NULL;
  322. opt.table = (struct irq_info *) page;
  323. opt.size = PAGE_SIZE;
  324. opt.segment = __KERNEL_DS;
  325. DBG("PCI: Fetching IRQ routing table... ");
  326. __asm__("push %%es\n\t"
  327. "push %%ds\n\t"
  328. "pop %%es\n\t"
  329. "lcall *(%%esi); cld\n\t"
  330. "pop %%es\n\t"
  331. "jc 1f\n\t"
  332. "xor %%ah, %%ah\n"
  333. "1:"
  334. : "=a" (ret),
  335. "=b" (map),
  336. "=m" (opt)
  337. : "0" (PCIBIOS_GET_ROUTING_OPTIONS),
  338. "1" (0),
  339. "D" ((long) &opt),
  340. "S" (&pci_indirect),
  341. "m" (opt)
  342. : "memory");
  343. DBG("OK ret=%d, size=%d, map=%x\n", ret, opt.size, map);
  344. if (ret & 0xff00)
  345. printk(KERN_ERR "PCI: Error %02x when fetching IRQ routing table.\n", (ret >> 8) & 0xff);
  346. else if (opt.size) {
  347. rt = kmalloc(sizeof(struct irq_routing_table) + opt.size, GFP_KERNEL);
  348. if (rt) {
  349. memset(rt, 0, sizeof(struct irq_routing_table));
  350. rt->size = opt.size + sizeof(struct irq_routing_table);
  351. rt->exclusive_irqs = map;
  352. memcpy(rt->slots, (void *) page, opt.size);
  353. printk(KERN_INFO "PCI: Using BIOS Interrupt Routing Table\n");
  354. }
  355. }
  356. free_page(page);
  357. return rt;
  358. }
  359. EXPORT_SYMBOL(pcibios_get_irq_routing_table);
  360. int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq)
  361. {
  362. int ret;
  363. __asm__("lcall *(%%esi); cld\n\t"
  364. "jc 1f\n\t"
  365. "xor %%ah, %%ah\n"
  366. "1:"
  367. : "=a" (ret)
  368. : "0" (PCIBIOS_SET_PCI_HW_INT),
  369. "b" ((dev->bus->number << 8) | dev->devfn),
  370. "c" ((irq << 8) | (pin + 10)),
  371. "S" (&pci_indirect));
  372. return !(ret & 0xff00);
  373. }
  374. EXPORT_SYMBOL(pcibios_set_irq_routing);
  375. void __init pci_pcbios_init(void)
  376. {
  377. if ((pci_probe & PCI_PROBE_BIOS)
  378. && ((raw_pci_ops = pci_find_bios()))) {
  379. pci_bios_present = 1;
  380. }
  381. }