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/hw/acpi/cpu_hotplug.c

https://github.com/mstsirkin/qemu
C | 337 lines | 248 code | 40 blank | 49 comment | 12 complexity | d832d36021fc7c9c1e4fb3b87fa8a62e MD5 | raw file
  1. /*
  2. * QEMU ACPI hotplug utilities
  3. *
  4. * Copyright (C) 2013 Red Hat Inc
  5. *
  6. * Authors:
  7. * Igor Mammedov <imammedo@redhat.com>
  8. *
  9. * This work is licensed under the terms of the GNU GPL, version 2 or later.
  10. * See the COPYING file in the top-level directory.
  11. */
  12. #include "qemu/osdep.h"
  13. #include "hw/hw.h"
  14. #include "hw/acpi/cpu_hotplug.h"
  15. #include "qapi/error.h"
  16. #include "qom/cpu.h"
  17. #include "hw/i386/pc.h"
  18. #include "qemu/error-report.h"
  19. #define CPU_EJECT_METHOD "CPEJ"
  20. #define CPU_MAT_METHOD "CPMA"
  21. #define CPU_ON_BITMAP "CPON"
  22. #define CPU_STATUS_METHOD "CPST"
  23. #define CPU_STATUS_MAP "PRS"
  24. #define CPU_SCAN_METHOD "PRSC"
  25. static uint64_t cpu_status_read(void *opaque, hwaddr addr, unsigned int size)
  26. {
  27. AcpiCpuHotplug *cpus = opaque;
  28. uint64_t val = cpus->sts[addr];
  29. return val;
  30. }
  31. static void cpu_status_write(void *opaque, hwaddr addr, uint64_t data,
  32. unsigned int size)
  33. {
  34. /* firmware never used to write in CPU present bitmap so use
  35. this fact as means to switch QEMU into modern CPU hotplug
  36. mode by writing 0 at the beginning of legacy CPU bitmap
  37. */
  38. if (addr == 0 && data == 0) {
  39. AcpiCpuHotplug *cpus = opaque;
  40. object_property_set_bool(cpus->device, false, "cpu-hotplug-legacy",
  41. &error_abort);
  42. }
  43. }
  44. static const MemoryRegionOps AcpiCpuHotplug_ops = {
  45. .read = cpu_status_read,
  46. .write = cpu_status_write,
  47. .endianness = DEVICE_LITTLE_ENDIAN,
  48. .valid = {
  49. .min_access_size = 1,
  50. .max_access_size = 1,
  51. },
  52. };
  53. static void acpi_set_cpu_present_bit(AcpiCpuHotplug *g, CPUState *cpu,
  54. Error **errp)
  55. {
  56. CPUClass *k = CPU_GET_CLASS(cpu);
  57. int64_t cpu_id;
  58. cpu_id = k->get_arch_id(cpu);
  59. if ((cpu_id / 8) >= ACPI_GPE_PROC_LEN) {
  60. object_property_set_bool(g->device, false, "cpu-hotplug-legacy",
  61. &error_abort);
  62. return;
  63. }
  64. g->sts[cpu_id / 8] |= (1 << (cpu_id % 8));
  65. }
  66. void legacy_acpi_cpu_plug_cb(HotplugHandler *hotplug_dev,
  67. AcpiCpuHotplug *g, DeviceState *dev, Error **errp)
  68. {
  69. acpi_set_cpu_present_bit(g, CPU(dev), errp);
  70. if (*errp != NULL) {
  71. return;
  72. }
  73. acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
  74. }
  75. void legacy_acpi_cpu_hotplug_init(MemoryRegion *parent, Object *owner,
  76. AcpiCpuHotplug *gpe_cpu, uint16_t base)
  77. {
  78. CPUState *cpu;
  79. memory_region_init_io(&gpe_cpu->io, owner, &AcpiCpuHotplug_ops,
  80. gpe_cpu, "acpi-cpu-hotplug", ACPI_GPE_PROC_LEN);
  81. memory_region_add_subregion(parent, base, &gpe_cpu->io);
  82. gpe_cpu->device = owner;
  83. CPU_FOREACH(cpu) {
  84. acpi_set_cpu_present_bit(gpe_cpu, cpu, &error_abort);
  85. }
  86. }
  87. void acpi_switch_to_modern_cphp(AcpiCpuHotplug *gpe_cpu,
  88. CPUHotplugState *cpuhp_state,
  89. uint16_t io_port)
  90. {
  91. MemoryRegion *parent = pci_address_space_io(PCI_DEVICE(gpe_cpu->device));
  92. memory_region_del_subregion(parent, &gpe_cpu->io);
  93. cpu_hotplug_hw_init(parent, gpe_cpu->device, cpuhp_state, io_port);
  94. }
  95. void build_legacy_cpu_hotplug_aml(Aml *ctx, MachineState *machine,
  96. uint16_t io_base)
  97. {
  98. Aml *dev;
  99. Aml *crs;
  100. Aml *pkg;
  101. Aml *field;
  102. Aml *method;
  103. Aml *if_ctx;
  104. Aml *else_ctx;
  105. int i, apic_idx;
  106. Aml *sb_scope = aml_scope("_SB");
  107. uint8_t madt_tmpl[8] = {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0};
  108. Aml *cpu_id = aml_arg(1);
  109. Aml *apic_id = aml_arg(0);
  110. Aml *cpu_on = aml_local(0);
  111. Aml *madt = aml_local(1);
  112. Aml *cpus_map = aml_name(CPU_ON_BITMAP);
  113. Aml *zero = aml_int(0);
  114. Aml *one = aml_int(1);
  115. MachineClass *mc = MACHINE_GET_CLASS(machine);
  116. const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(machine);
  117. PCMachineState *pcms = PC_MACHINE(machine);
  118. /*
  119. * _MAT method - creates an madt apic buffer
  120. * apic_id = Arg0 = Local APIC ID
  121. * cpu_id = Arg1 = Processor ID
  122. * cpu_on = Local0 = CPON flag for this cpu
  123. * madt = Local1 = Buffer (in madt apic form) to return
  124. */
  125. method = aml_method(CPU_MAT_METHOD, 2, AML_NOTSERIALIZED);
  126. aml_append(method,
  127. aml_store(aml_derefof(aml_index(cpus_map, apic_id)), cpu_on));
  128. aml_append(method,
  129. aml_store(aml_buffer(sizeof(madt_tmpl), madt_tmpl), madt));
  130. /* Update the processor id, lapic id, and enable/disable status */
  131. aml_append(method, aml_store(cpu_id, aml_index(madt, aml_int(2))));
  132. aml_append(method, aml_store(apic_id, aml_index(madt, aml_int(3))));
  133. aml_append(method, aml_store(cpu_on, aml_index(madt, aml_int(4))));
  134. aml_append(method, aml_return(madt));
  135. aml_append(sb_scope, method);
  136. /*
  137. * _STA method - return ON status of cpu
  138. * apic_id = Arg0 = Local APIC ID
  139. * cpu_on = Local0 = CPON flag for this cpu
  140. */
  141. method = aml_method(CPU_STATUS_METHOD, 1, AML_NOTSERIALIZED);
  142. aml_append(method,
  143. aml_store(aml_derefof(aml_index(cpus_map, apic_id)), cpu_on));
  144. if_ctx = aml_if(cpu_on);
  145. {
  146. aml_append(if_ctx, aml_return(aml_int(0xF)));
  147. }
  148. aml_append(method, if_ctx);
  149. else_ctx = aml_else();
  150. {
  151. aml_append(else_ctx, aml_return(zero));
  152. }
  153. aml_append(method, else_ctx);
  154. aml_append(sb_scope, method);
  155. method = aml_method(CPU_EJECT_METHOD, 2, AML_NOTSERIALIZED);
  156. aml_append(method, aml_sleep(200));
  157. aml_append(sb_scope, method);
  158. method = aml_method(CPU_SCAN_METHOD, 0, AML_NOTSERIALIZED);
  159. {
  160. Aml *while_ctx, *if_ctx2, *else_ctx2;
  161. Aml *bus_check_evt = aml_int(1);
  162. Aml *remove_evt = aml_int(3);
  163. Aml *status_map = aml_local(5); /* Local5 = active cpu bitmap */
  164. Aml *byte = aml_local(2); /* Local2 = last read byte from bitmap */
  165. Aml *idx = aml_local(0); /* Processor ID / APIC ID iterator */
  166. Aml *is_cpu_on = aml_local(1); /* Local1 = CPON flag for cpu */
  167. Aml *status = aml_local(3); /* Local3 = active state for cpu */
  168. aml_append(method, aml_store(aml_name(CPU_STATUS_MAP), status_map));
  169. aml_append(method, aml_store(zero, byte));
  170. aml_append(method, aml_store(zero, idx));
  171. /* While (idx < SizeOf(CPON)) */
  172. while_ctx = aml_while(aml_lless(idx, aml_sizeof(cpus_map)));
  173. aml_append(while_ctx,
  174. aml_store(aml_derefof(aml_index(cpus_map, idx)), is_cpu_on));
  175. if_ctx = aml_if(aml_and(idx, aml_int(0x07), NULL));
  176. {
  177. /* Shift down previously read bitmap byte */
  178. aml_append(if_ctx, aml_shiftright(byte, one, byte));
  179. }
  180. aml_append(while_ctx, if_ctx);
  181. else_ctx = aml_else();
  182. {
  183. /* Read next byte from cpu bitmap */
  184. aml_append(else_ctx, aml_store(aml_derefof(aml_index(status_map,
  185. aml_shiftright(idx, aml_int(3), NULL))), byte));
  186. }
  187. aml_append(while_ctx, else_ctx);
  188. aml_append(while_ctx, aml_store(aml_and(byte, one, NULL), status));
  189. if_ctx = aml_if(aml_lnot(aml_equal(is_cpu_on, status)));
  190. {
  191. /* State change - update CPON with new state */
  192. aml_append(if_ctx, aml_store(status, aml_index(cpus_map, idx)));
  193. if_ctx2 = aml_if(aml_equal(status, one));
  194. {
  195. aml_append(if_ctx2,
  196. aml_call2(AML_NOTIFY_METHOD, idx, bus_check_evt));
  197. }
  198. aml_append(if_ctx, if_ctx2);
  199. else_ctx2 = aml_else();
  200. {
  201. aml_append(else_ctx2,
  202. aml_call2(AML_NOTIFY_METHOD, idx, remove_evt));
  203. }
  204. }
  205. aml_append(if_ctx, else_ctx2);
  206. aml_append(while_ctx, if_ctx);
  207. aml_append(while_ctx, aml_increment(idx)); /* go to next cpu */
  208. aml_append(method, while_ctx);
  209. }
  210. aml_append(sb_scope, method);
  211. /* The current AML generator can cover the APIC ID range [0..255],
  212. * inclusive, for VCPU hotplug. */
  213. QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 256);
  214. if (pcms->apic_id_limit > ACPI_CPU_HOTPLUG_ID_LIMIT) {
  215. error_report("max_cpus is too large. APIC ID of last CPU is %u",
  216. pcms->apic_id_limit - 1);
  217. exit(1);
  218. }
  219. /* create PCI0.PRES device and its _CRS to reserve CPU hotplug MMIO */
  220. dev = aml_device("PCI0." stringify(CPU_HOTPLUG_RESOURCE_DEVICE));
  221. aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A06")));
  222. aml_append(dev,
  223. aml_name_decl("_UID", aml_string("CPU Hotplug resources"))
  224. );
  225. /* device present, functioning, decoding, not shown in UI */
  226. aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
  227. crs = aml_resource_template();
  228. aml_append(crs,
  229. aml_io(AML_DECODE16, io_base, io_base, 1, ACPI_GPE_PROC_LEN)
  230. );
  231. aml_append(dev, aml_name_decl("_CRS", crs));
  232. aml_append(sb_scope, dev);
  233. /* declare CPU hotplug MMIO region and PRS field to access it */
  234. aml_append(sb_scope, aml_operation_region(
  235. "PRST", AML_SYSTEM_IO, aml_int(io_base), ACPI_GPE_PROC_LEN));
  236. field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
  237. aml_append(field, aml_named_field("PRS", 256));
  238. aml_append(sb_scope, field);
  239. /* build Processor object for each processor */
  240. for (i = 0; i < apic_ids->len; i++) {
  241. int apic_id = apic_ids->cpus[i].arch_id;
  242. assert(apic_id < ACPI_CPU_HOTPLUG_ID_LIMIT);
  243. dev = aml_processor(i, 0, 0, "CP%.02X", apic_id);
  244. method = aml_method("_MAT", 0, AML_NOTSERIALIZED);
  245. aml_append(method,
  246. aml_return(aml_call2(CPU_MAT_METHOD, aml_int(apic_id), aml_int(i))
  247. ));
  248. aml_append(dev, method);
  249. method = aml_method("_STA", 0, AML_NOTSERIALIZED);
  250. aml_append(method,
  251. aml_return(aml_call1(CPU_STATUS_METHOD, aml_int(apic_id))));
  252. aml_append(dev, method);
  253. method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
  254. aml_append(method,
  255. aml_return(aml_call2(CPU_EJECT_METHOD, aml_int(apic_id),
  256. aml_arg(0)))
  257. );
  258. aml_append(dev, method);
  259. aml_append(sb_scope, dev);
  260. }
  261. /* build this code:
  262. * Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...}
  263. */
  264. /* Arg0 = APIC ID */
  265. method = aml_method(AML_NOTIFY_METHOD, 2, AML_NOTSERIALIZED);
  266. for (i = 0; i < apic_ids->len; i++) {
  267. int apic_id = apic_ids->cpus[i].arch_id;
  268. if_ctx = aml_if(aml_equal(aml_arg(0), aml_int(apic_id)));
  269. aml_append(if_ctx,
  270. aml_notify(aml_name("CP%.02X", apic_id), aml_arg(1))
  271. );
  272. aml_append(method, if_ctx);
  273. }
  274. aml_append(sb_scope, method);
  275. /* build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })"
  276. *
  277. * Note: The ability to create variable-sized packages was first
  278. * introduced in ACPI 2.0. ACPI 1.0 only allowed fixed-size packages
  279. * ith up to 255 elements. Windows guests up to win2k8 fail when
  280. * VarPackageOp is used.
  281. */
  282. pkg = pcms->apic_id_limit <= 255 ? aml_package(pcms->apic_id_limit) :
  283. aml_varpackage(pcms->apic_id_limit);
  284. for (i = 0, apic_idx = 0; i < apic_ids->len; i++) {
  285. int apic_id = apic_ids->cpus[i].arch_id;
  286. for (; apic_idx < apic_id; apic_idx++) {
  287. aml_append(pkg, aml_int(0));
  288. }
  289. aml_append(pkg, aml_int(apic_ids->cpus[i].cpu ? 1 : 0));
  290. apic_idx = apic_id + 1;
  291. }
  292. aml_append(sb_scope, aml_name_decl(CPU_ON_BITMAP, pkg));
  293. aml_append(ctx, sb_scope);
  294. method = aml_method("\\_GPE._E02", 0, AML_NOTSERIALIZED);
  295. aml_append(method, aml_call0("\\_SB." CPU_SCAN_METHOD));
  296. aml_append(ctx, method);
  297. }