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/drivers/net/pcmcia/xirc2ps_cs.c

https://github.com/Mengqi/linux-2.6
C | 1691 lines | 1229 code | 197 blank | 265 comment | 225 complexity | 864c8dac780f9e34c1a9728aca8a650e MD5 | raw file
  1. /* [xirc2ps_cs.c wk 03.11.99] (1.40 1999/11/18 00:06:03)
  2. * Xircom CreditCard Ethernet Adapter IIps driver
  3. * Xircom Realport 10/100 (RE-100) driver
  4. *
  5. * This driver supports various Xircom CreditCard Ethernet adapters
  6. * including the CE2, CE IIps, RE-10, CEM28, CEM33, CE33, CEM56,
  7. * CE3-100, CE3B, RE-100, REM10BT, and REM56G-100.
  8. *
  9. * 2000-09-24 <psheer@icon.co.za> The Xircom CE3B-100 may not
  10. * autodetect the media properly. In this case use the
  11. * if_port=1 (for 10BaseT) or if_port=4 (for 100BaseT) options
  12. * to force the media type.
  13. *
  14. * Written originally by Werner Koch based on David Hinds' skeleton of the
  15. * PCMCIA driver.
  16. *
  17. * Copyright (c) 1997,1998 Werner Koch (dd9jn)
  18. *
  19. * This driver is free software; you can redistribute it and/or modify
  20. * it under the terms of the GNU General Public License as published by
  21. * the Free Software Foundation; either version 2 of the License, or
  22. * (at your option) any later version.
  23. *
  24. * It is distributed in the hope that it will be useful,
  25. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  26. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  27. * GNU General Public License for more details.
  28. *
  29. * You should have received a copy of the GNU General Public License
  30. * along with this program; if not, write to the Free Software
  31. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  32. *
  33. *
  34. * ALTERNATIVELY, this driver may be distributed under the terms of
  35. * the following license, in which case the provisions of this license
  36. * are required INSTEAD OF the GNU General Public License. (This clause
  37. * is necessary due to a potential bad interaction between the GPL and
  38. * the restrictions contained in a BSD-style copyright.)
  39. *
  40. * Redistribution and use in source and binary forms, with or without
  41. * modification, are permitted provided that the following conditions
  42. * are met:
  43. * 1. Redistributions of source code must retain the above copyright
  44. * notice, and the entire permission notice in its entirety,
  45. * including the disclaimer of warranties.
  46. * 2. Redistributions in binary form must reproduce the above copyright
  47. * notice, this list of conditions and the following disclaimer in the
  48. * documentation and/or other materials provided with the distribution.
  49. * 3. The name of the author may not be used to endorse or promote
  50. * products derived from this software without specific prior
  51. * written permission.
  52. *
  53. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  54. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  55. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  56. * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  57. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  58. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  59. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  60. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  61. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  62. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  63. * OF THE POSSIBILITY OF SUCH DAMAGE.
  64. */
  65. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  66. #include <linux/module.h>
  67. #include <linux/kernel.h>
  68. #include <linux/init.h>
  69. #include <linux/ptrace.h>
  70. #include <linux/slab.h>
  71. #include <linux/string.h>
  72. #include <linux/timer.h>
  73. #include <linux/interrupt.h>
  74. #include <linux/in.h>
  75. #include <linux/delay.h>
  76. #include <linux/ethtool.h>
  77. #include <linux/netdevice.h>
  78. #include <linux/etherdevice.h>
  79. #include <linux/skbuff.h>
  80. #include <linux/if_arp.h>
  81. #include <linux/ioport.h>
  82. #include <linux/bitops.h>
  83. #include <linux/mii.h>
  84. #include <pcmcia/cistpl.h>
  85. #include <pcmcia/cisreg.h>
  86. #include <pcmcia/ciscode.h>
  87. #include <asm/io.h>
  88. #include <asm/system.h>
  89. #include <asm/uaccess.h>
  90. #ifndef MANFID_COMPAQ
  91. #define MANFID_COMPAQ 0x0138
  92. #define MANFID_COMPAQ2 0x0183 /* is this correct? */
  93. #endif
  94. #include <pcmcia/ds.h>
  95. /* Time in jiffies before concluding Tx hung */
  96. #define TX_TIMEOUT ((400*HZ)/1000)
  97. /****************
  98. * Some constants used to access the hardware
  99. */
  100. /* Register offsets and value constans */
  101. #define XIRCREG_CR 0 /* Command register (wr) */
  102. enum xirc_cr {
  103. TransmitPacket = 0x01,
  104. SoftReset = 0x02,
  105. EnableIntr = 0x04,
  106. ForceIntr = 0x08,
  107. ClearTxFIFO = 0x10,
  108. ClearRxOvrun = 0x20,
  109. RestartTx = 0x40
  110. };
  111. #define XIRCREG_ESR 0 /* Ethernet status register (rd) */
  112. enum xirc_esr {
  113. FullPktRcvd = 0x01, /* full packet in receive buffer */
  114. PktRejected = 0x04, /* a packet has been rejected */
  115. TxPktPend = 0x08, /* TX Packet Pending */
  116. IncorPolarity = 0x10,
  117. MediaSelect = 0x20 /* set if TP, clear if AUI */
  118. };
  119. #define XIRCREG_PR 1 /* Page Register select */
  120. #define XIRCREG_EDP 4 /* Ethernet Data Port Register */
  121. #define XIRCREG_ISR 6 /* Ethernet Interrupt Status Register */
  122. enum xirc_isr {
  123. TxBufOvr = 0x01, /* TX Buffer Overflow */
  124. PktTxed = 0x02, /* Packet Transmitted */
  125. MACIntr = 0x04, /* MAC Interrupt occurred */
  126. TxResGrant = 0x08, /* Tx Reservation Granted */
  127. RxFullPkt = 0x20, /* Rx Full Packet */
  128. RxPktRej = 0x40, /* Rx Packet Rejected */
  129. ForcedIntr= 0x80 /* Forced Interrupt */
  130. };
  131. #define XIRCREG1_IMR0 12 /* Ethernet Interrupt Mask Register (on page 1)*/
  132. #define XIRCREG1_IMR1 13
  133. #define XIRCREG0_TSO 8 /* Transmit Space Open Register (on page 0)*/
  134. #define XIRCREG0_TRS 10 /* Transmit reservation Size Register (page 0)*/
  135. #define XIRCREG0_DO 12 /* Data Offset Register (page 0) (wr) */
  136. #define XIRCREG0_RSR 12 /* Receive Status Register (page 0) (rd) */
  137. enum xirc_rsr {
  138. PhyPkt = 0x01, /* set:physical packet, clear: multicast packet */
  139. BrdcstPkt = 0x02, /* set if it is a broadcast packet */
  140. PktTooLong = 0x04, /* set if packet length > 1518 */
  141. AlignErr = 0x10, /* incorrect CRC and last octet not complete */
  142. CRCErr = 0x20, /* incorrect CRC and last octet is complete */
  143. PktRxOk = 0x80 /* received ok */
  144. };
  145. #define XIRCREG0_PTR 13 /* packets transmitted register (rd) */
  146. #define XIRCREG0_RBC 14 /* receive byte count regsister (rd) */
  147. #define XIRCREG1_ECR 14 /* ethernet configurationn register */
  148. enum xirc_ecr {
  149. FullDuplex = 0x04, /* enable full duplex mode */
  150. LongTPMode = 0x08, /* adjust for longer lengths of TP cable */
  151. DisablePolCor = 0x10,/* disable auto polarity correction */
  152. DisableLinkPulse = 0x20, /* disable link pulse generation */
  153. DisableAutoTx = 0x40, /* disable auto-transmit */
  154. };
  155. #define XIRCREG2_RBS 8 /* receive buffer start register */
  156. #define XIRCREG2_LED 10 /* LED Configuration register */
  157. /* values for the leds: Bits 2-0 for led 1
  158. * 0 disabled Bits 5-3 for led 2
  159. * 1 collision
  160. * 2 noncollision
  161. * 3 link_detected
  162. * 4 incor_polarity
  163. * 5 jabber
  164. * 6 auto_assertion
  165. * 7 rx_tx_activity
  166. */
  167. #define XIRCREG2_MSR 12 /* Mohawk specific register */
  168. #define XIRCREG4_GPR0 8 /* General Purpose Register 0 */
  169. #define XIRCREG4_GPR1 9 /* General Purpose Register 1 */
  170. #define XIRCREG2_GPR2 13 /* General Purpose Register 2 (page2!)*/
  171. #define XIRCREG4_BOV 10 /* Bonding Version Register */
  172. #define XIRCREG4_LMA 12 /* Local Memory Address Register */
  173. #define XIRCREG4_LMD 14 /* Local Memory Data Port */
  174. /* MAC register can only by accessed with 8 bit operations */
  175. #define XIRCREG40_CMD0 8 /* Command Register (wr) */
  176. enum xirc_cmd { /* Commands */
  177. Transmit = 0x01,
  178. EnableRecv = 0x04,
  179. DisableRecv = 0x08,
  180. Abort = 0x10,
  181. Online = 0x20,
  182. IntrAck = 0x40,
  183. Offline = 0x80
  184. };
  185. #define XIRCREG5_RHSA0 10 /* Rx Host Start Address */
  186. #define XIRCREG40_RXST0 9 /* Receive Status Register */
  187. #define XIRCREG40_TXST0 11 /* Transmit Status Register 0 */
  188. #define XIRCREG40_TXST1 12 /* Transmit Status Register 10 */
  189. #define XIRCREG40_RMASK0 13 /* Receive Mask Register */
  190. #define XIRCREG40_TMASK0 14 /* Transmit Mask Register 0 */
  191. #define XIRCREG40_TMASK1 15 /* Transmit Mask Register 0 */
  192. #define XIRCREG42_SWC0 8 /* Software Configuration 0 */
  193. #define XIRCREG42_SWC1 9 /* Software Configuration 1 */
  194. #define XIRCREG42_BOC 10 /* Back-Off Configuration */
  195. #define XIRCREG44_TDR0 8 /* Time Domain Reflectometry 0 */
  196. #define XIRCREG44_TDR1 9 /* Time Domain Reflectometry 1 */
  197. #define XIRCREG44_RXBC_LO 10 /* Rx Byte Count 0 (rd) */
  198. #define XIRCREG44_RXBC_HI 11 /* Rx Byte Count 1 (rd) */
  199. #define XIRCREG45_REV 15 /* Revision Register (rd) */
  200. #define XIRCREG50_IA 8 /* Individual Address (8-13) */
  201. static const char *if_names[] = { "Auto", "10BaseT", "10Base2", "AUI", "100BaseT" };
  202. /* card types */
  203. #define XIR_UNKNOWN 0 /* unknown: not supported */
  204. #define XIR_CE 1 /* (prodid 1) different hardware: not supported */
  205. #define XIR_CE2 2 /* (prodid 2) */
  206. #define XIR_CE3 3 /* (prodid 3) */
  207. #define XIR_CEM 4 /* (prodid 1) different hardware: not supported */
  208. #define XIR_CEM2 5 /* (prodid 2) */
  209. #define XIR_CEM3 6 /* (prodid 3) */
  210. #define XIR_CEM33 7 /* (prodid 4) */
  211. #define XIR_CEM56M 8 /* (prodid 5) */
  212. #define XIR_CEM56 9 /* (prodid 6) */
  213. #define XIR_CM28 10 /* (prodid 3) modem only: not supported here */
  214. #define XIR_CM33 11 /* (prodid 4) modem only: not supported here */
  215. #define XIR_CM56 12 /* (prodid 5) modem only: not supported here */
  216. #define XIR_CG 13 /* (prodid 1) GSM modem only: not supported */
  217. #define XIR_CBE 14 /* (prodid 1) cardbus ethernet: not supported */
  218. /*====================================================================*/
  219. /* Module parameters */
  220. MODULE_DESCRIPTION("Xircom PCMCIA ethernet driver");
  221. MODULE_LICENSE("Dual MPL/GPL");
  222. #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
  223. INT_MODULE_PARM(if_port, 0);
  224. INT_MODULE_PARM(full_duplex, 0);
  225. INT_MODULE_PARM(do_sound, 1);
  226. INT_MODULE_PARM(lockup_hack, 0); /* anti lockup hack */
  227. /*====================================================================*/
  228. /* We do not process more than these number of bytes during one
  229. * interrupt. (Of course we receive complete packets, so this is not
  230. * an exact value).
  231. * Something between 2000..22000; first value gives best interrupt latency,
  232. * the second enables the usage of the complete on-chip buffer. We use the
  233. * high value as the initial value.
  234. */
  235. static unsigned maxrx_bytes = 22000;
  236. /* MII management prototypes */
  237. static void mii_idle(unsigned int ioaddr);
  238. static void mii_putbit(unsigned int ioaddr, unsigned data);
  239. static int mii_getbit(unsigned int ioaddr);
  240. static void mii_wbits(unsigned int ioaddr, unsigned data, int len);
  241. static unsigned mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg);
  242. static void mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg,
  243. unsigned data, int len);
  244. static int has_ce2_string(struct pcmcia_device * link);
  245. static int xirc2ps_config(struct pcmcia_device * link);
  246. static void xirc2ps_release(struct pcmcia_device * link);
  247. static void xirc2ps_detach(struct pcmcia_device *p_dev);
  248. static irqreturn_t xirc2ps_interrupt(int irq, void *dev_id);
  249. typedef struct local_info_t {
  250. struct net_device *dev;
  251. struct pcmcia_device *p_dev;
  252. int card_type;
  253. int probe_port;
  254. int silicon; /* silicon revision. 0=old CE2, 1=Scipper, 4=Mohawk */
  255. int mohawk; /* a CE3 type card */
  256. int dingo; /* a CEM56 type card */
  257. int new_mii; /* has full 10baseT/100baseT MII */
  258. int modem; /* is a multi function card (i.e with a modem) */
  259. void __iomem *dingo_ccr; /* only used for CEM56 cards */
  260. unsigned last_ptr_value; /* last packets transmitted value */
  261. const char *manf_str;
  262. struct work_struct tx_timeout_task;
  263. } local_info_t;
  264. /****************
  265. * Some more prototypes
  266. */
  267. static netdev_tx_t do_start_xmit(struct sk_buff *skb,
  268. struct net_device *dev);
  269. static void xirc_tx_timeout(struct net_device *dev);
  270. static void xirc2ps_tx_timeout_task(struct work_struct *work);
  271. static void set_addresses(struct net_device *dev);
  272. static void set_multicast_list(struct net_device *dev);
  273. static int set_card_type(struct pcmcia_device *link);
  274. static int do_config(struct net_device *dev, struct ifmap *map);
  275. static int do_open(struct net_device *dev);
  276. static int do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
  277. static const struct ethtool_ops netdev_ethtool_ops;
  278. static void hardreset(struct net_device *dev);
  279. static void do_reset(struct net_device *dev, int full);
  280. static int init_mii(struct net_device *dev);
  281. static void do_powerdown(struct net_device *dev);
  282. static int do_stop(struct net_device *dev);
  283. /*=============== Helper functions =========================*/
  284. #define SelectPage(pgnr) outb((pgnr), ioaddr + XIRCREG_PR)
  285. #define GetByte(reg) ((unsigned)inb(ioaddr + (reg)))
  286. #define GetWord(reg) ((unsigned)inw(ioaddr + (reg)))
  287. #define PutByte(reg,value) outb((value), ioaddr+(reg))
  288. #define PutWord(reg,value) outw((value), ioaddr+(reg))
  289. /*====== Functions used for debugging =================================*/
  290. #if 0 /* reading regs may change system status */
  291. static void
  292. PrintRegisters(struct net_device *dev)
  293. {
  294. unsigned int ioaddr = dev->base_addr;
  295. if (pc_debug > 1) {
  296. int i, page;
  297. printk(KERN_DEBUG pr_fmt("Register common: "));
  298. for (i = 0; i < 8; i++)
  299. pr_cont(" %2.2x", GetByte(i));
  300. pr_cont("\n");
  301. for (page = 0; page <= 8; page++) {
  302. printk(KERN_DEBUG pr_fmt("Register page %2x: "), page);
  303. SelectPage(page);
  304. for (i = 8; i < 16; i++)
  305. pr_cont(" %2.2x", GetByte(i));
  306. pr_cont("\n");
  307. }
  308. for (page=0x40 ; page <= 0x5f; page++) {
  309. if (page == 0x43 || (page >= 0x46 && page <= 0x4f) ||
  310. (page >= 0x51 && page <=0x5e))
  311. continue;
  312. printk(KERN_DEBUG pr_fmt("Register page %2x: "), page);
  313. SelectPage(page);
  314. for (i = 8; i < 16; i++)
  315. pr_cont(" %2.2x", GetByte(i));
  316. pr_cont("\n");
  317. }
  318. }
  319. }
  320. #endif /* 0 */
  321. /*============== MII Management functions ===============*/
  322. /****************
  323. * Turn around for read
  324. */
  325. static void
  326. mii_idle(unsigned int ioaddr)
  327. {
  328. PutByte(XIRCREG2_GPR2, 0x04|0); /* drive MDCK low */
  329. udelay(1);
  330. PutByte(XIRCREG2_GPR2, 0x04|1); /* and drive MDCK high */
  331. udelay(1);
  332. }
  333. /****************
  334. * Write a bit to MDI/O
  335. */
  336. static void
  337. mii_putbit(unsigned int ioaddr, unsigned data)
  338. {
  339. #if 1
  340. if (data) {
  341. PutByte(XIRCREG2_GPR2, 0x0c|2|0); /* set MDIO */
  342. udelay(1);
  343. PutByte(XIRCREG2_GPR2, 0x0c|2|1); /* and drive MDCK high */
  344. udelay(1);
  345. } else {
  346. PutByte(XIRCREG2_GPR2, 0x0c|0|0); /* clear MDIO */
  347. udelay(1);
  348. PutByte(XIRCREG2_GPR2, 0x0c|0|1); /* and drive MDCK high */
  349. udelay(1);
  350. }
  351. #else
  352. if (data) {
  353. PutWord(XIRCREG2_GPR2-1, 0x0e0e);
  354. udelay(1);
  355. PutWord(XIRCREG2_GPR2-1, 0x0f0f);
  356. udelay(1);
  357. } else {
  358. PutWord(XIRCREG2_GPR2-1, 0x0c0c);
  359. udelay(1);
  360. PutWord(XIRCREG2_GPR2-1, 0x0d0d);
  361. udelay(1);
  362. }
  363. #endif
  364. }
  365. /****************
  366. * Get a bit from MDI/O
  367. */
  368. static int
  369. mii_getbit(unsigned int ioaddr)
  370. {
  371. unsigned d;
  372. PutByte(XIRCREG2_GPR2, 4|0); /* drive MDCK low */
  373. udelay(1);
  374. d = GetByte(XIRCREG2_GPR2); /* read MDIO */
  375. PutByte(XIRCREG2_GPR2, 4|1); /* drive MDCK high again */
  376. udelay(1);
  377. return d & 0x20; /* read MDIO */
  378. }
  379. static void
  380. mii_wbits(unsigned int ioaddr, unsigned data, int len)
  381. {
  382. unsigned m = 1 << (len-1);
  383. for (; m; m >>= 1)
  384. mii_putbit(ioaddr, data & m);
  385. }
  386. static unsigned
  387. mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg)
  388. {
  389. int i;
  390. unsigned data=0, m;
  391. SelectPage(2);
  392. for (i=0; i < 32; i++) /* 32 bit preamble */
  393. mii_putbit(ioaddr, 1);
  394. mii_wbits(ioaddr, 0x06, 4); /* Start and opcode for read */
  395. mii_wbits(ioaddr, phyaddr, 5); /* PHY address to be accessed */
  396. mii_wbits(ioaddr, phyreg, 5); /* PHY register to read */
  397. mii_idle(ioaddr); /* turn around */
  398. mii_getbit(ioaddr);
  399. for (m = 1<<15; m; m >>= 1)
  400. if (mii_getbit(ioaddr))
  401. data |= m;
  402. mii_idle(ioaddr);
  403. return data;
  404. }
  405. static void
  406. mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg, unsigned data,
  407. int len)
  408. {
  409. int i;
  410. SelectPage(2);
  411. for (i=0; i < 32; i++) /* 32 bit preamble */
  412. mii_putbit(ioaddr, 1);
  413. mii_wbits(ioaddr, 0x05, 4); /* Start and opcode for write */
  414. mii_wbits(ioaddr, phyaddr, 5); /* PHY address to be accessed */
  415. mii_wbits(ioaddr, phyreg, 5); /* PHY Register to write */
  416. mii_putbit(ioaddr, 1); /* turn around */
  417. mii_putbit(ioaddr, 0);
  418. mii_wbits(ioaddr, data, len); /* And write the data */
  419. mii_idle(ioaddr);
  420. }
  421. /*============= Main bulk of functions =========================*/
  422. static const struct net_device_ops netdev_ops = {
  423. .ndo_open = do_open,
  424. .ndo_stop = do_stop,
  425. .ndo_start_xmit = do_start_xmit,
  426. .ndo_tx_timeout = xirc_tx_timeout,
  427. .ndo_set_config = do_config,
  428. .ndo_do_ioctl = do_ioctl,
  429. .ndo_set_multicast_list = set_multicast_list,
  430. .ndo_change_mtu = eth_change_mtu,
  431. .ndo_set_mac_address = eth_mac_addr,
  432. .ndo_validate_addr = eth_validate_addr,
  433. };
  434. static int
  435. xirc2ps_probe(struct pcmcia_device *link)
  436. {
  437. struct net_device *dev;
  438. local_info_t *local;
  439. dev_dbg(&link->dev, "attach()\n");
  440. /* Allocate the device structure */
  441. dev = alloc_etherdev(sizeof(local_info_t));
  442. if (!dev)
  443. return -ENOMEM;
  444. local = netdev_priv(dev);
  445. local->dev = dev;
  446. local->p_dev = link;
  447. link->priv = dev;
  448. /* General socket configuration */
  449. link->config_index = 1;
  450. /* Fill in card specific entries */
  451. dev->netdev_ops = &netdev_ops;
  452. dev->ethtool_ops = &netdev_ethtool_ops;
  453. dev->watchdog_timeo = TX_TIMEOUT;
  454. INIT_WORK(&local->tx_timeout_task, xirc2ps_tx_timeout_task);
  455. return xirc2ps_config(link);
  456. } /* xirc2ps_attach */
  457. static void
  458. xirc2ps_detach(struct pcmcia_device *link)
  459. {
  460. struct net_device *dev = link->priv;
  461. dev_dbg(&link->dev, "detach\n");
  462. unregister_netdev(dev);
  463. xirc2ps_release(link);
  464. free_netdev(dev);
  465. } /* xirc2ps_detach */
  466. /****************
  467. * Detect the type of the card. s is the buffer with the data of tuple 0x20
  468. * Returns: 0 := not supported
  469. * mediaid=11 and prodid=47
  470. * Media-Id bits:
  471. * Ethernet 0x01
  472. * Tokenring 0x02
  473. * Arcnet 0x04
  474. * Wireless 0x08
  475. * Modem 0x10
  476. * GSM only 0x20
  477. * Prod-Id bits:
  478. * Pocket 0x10
  479. * External 0x20
  480. * Creditcard 0x40
  481. * Cardbus 0x80
  482. *
  483. */
  484. static int
  485. set_card_type(struct pcmcia_device *link)
  486. {
  487. struct net_device *dev = link->priv;
  488. local_info_t *local = netdev_priv(dev);
  489. u8 *buf;
  490. unsigned int cisrev, mediaid, prodid;
  491. size_t len;
  492. len = pcmcia_get_tuple(link, CISTPL_MANFID, &buf);
  493. if (len < 5) {
  494. dev_err(&link->dev, "invalid CIS -- sorry\n");
  495. return 0;
  496. }
  497. cisrev = buf[2];
  498. mediaid = buf[3];
  499. prodid = buf[4];
  500. dev_dbg(&link->dev, "cisrev=%02x mediaid=%02x prodid=%02x\n",
  501. cisrev, mediaid, prodid);
  502. local->mohawk = 0;
  503. local->dingo = 0;
  504. local->modem = 0;
  505. local->card_type = XIR_UNKNOWN;
  506. if (!(prodid & 0x40)) {
  507. pr_notice("Oops: Not a creditcard\n");
  508. return 0;
  509. }
  510. if (!(mediaid & 0x01)) {
  511. pr_notice("Not an Ethernet card\n");
  512. return 0;
  513. }
  514. if (mediaid & 0x10) {
  515. local->modem = 1;
  516. switch(prodid & 15) {
  517. case 1: local->card_type = XIR_CEM ; break;
  518. case 2: local->card_type = XIR_CEM2 ; break;
  519. case 3: local->card_type = XIR_CEM3 ; break;
  520. case 4: local->card_type = XIR_CEM33 ; break;
  521. case 5: local->card_type = XIR_CEM56M;
  522. local->mohawk = 1;
  523. break;
  524. case 6:
  525. case 7: /* 7 is the RealPort 10/56 */
  526. local->card_type = XIR_CEM56 ;
  527. local->mohawk = 1;
  528. local->dingo = 1;
  529. break;
  530. }
  531. } else {
  532. switch(prodid & 15) {
  533. case 1: local->card_type = has_ce2_string(link)? XIR_CE2 : XIR_CE ;
  534. break;
  535. case 2: local->card_type = XIR_CE2; break;
  536. case 3: local->card_type = XIR_CE3;
  537. local->mohawk = 1;
  538. break;
  539. }
  540. }
  541. if (local->card_type == XIR_CE || local->card_type == XIR_CEM) {
  542. pr_notice("Sorry, this is an old CE card\n");
  543. return 0;
  544. }
  545. if (local->card_type == XIR_UNKNOWN)
  546. pr_notice("unknown card (mediaid=%02x prodid=%02x)\n", mediaid, prodid);
  547. return 1;
  548. }
  549. /****************
  550. * There are some CE2 cards out which claim to be a CE card.
  551. * This function looks for a "CE2" in the 3rd version field.
  552. * Returns: true if this is a CE2
  553. */
  554. static int
  555. has_ce2_string(struct pcmcia_device * p_dev)
  556. {
  557. if (p_dev->prod_id[2] && strstr(p_dev->prod_id[2], "CE2"))
  558. return 1;
  559. return 0;
  560. }
  561. static int
  562. xirc2ps_config_modem(struct pcmcia_device *p_dev, void *priv_data)
  563. {
  564. unsigned int ioaddr;
  565. if ((p_dev->resource[0]->start & 0xf) == 8)
  566. return -ENODEV;
  567. p_dev->resource[0]->end = 16;
  568. p_dev->resource[1]->end = 8;
  569. p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
  570. p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_16;
  571. p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH;
  572. p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
  573. p_dev->io_lines = 10;
  574. p_dev->resource[1]->start = p_dev->resource[0]->start;
  575. for (ioaddr = 0x300; ioaddr < 0x400; ioaddr += 0x10) {
  576. p_dev->resource[0]->start = ioaddr;
  577. if (!pcmcia_request_io(p_dev))
  578. return 0;
  579. }
  580. return -ENODEV;
  581. }
  582. static int
  583. xirc2ps_config_check(struct pcmcia_device *p_dev, void *priv_data)
  584. {
  585. int *pass = priv_data;
  586. resource_size_t tmp = p_dev->resource[1]->start;
  587. tmp += (*pass ? (p_dev->config_index & 0x20 ? -24 : 8)
  588. : (p_dev->config_index & 0x20 ? 8 : -24));
  589. if ((p_dev->resource[0]->start & 0xf) == 8)
  590. return -ENODEV;
  591. p_dev->resource[0]->end = 18;
  592. p_dev->resource[1]->end = 8;
  593. p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
  594. p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_16;
  595. p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH;
  596. p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
  597. p_dev->io_lines = 10;
  598. p_dev->resource[1]->start = p_dev->resource[0]->start;
  599. p_dev->resource[0]->start = tmp;
  600. return pcmcia_request_io(p_dev);
  601. }
  602. static int pcmcia_get_mac_ce(struct pcmcia_device *p_dev,
  603. tuple_t *tuple,
  604. void *priv)
  605. {
  606. struct net_device *dev = priv;
  607. int i;
  608. if (tuple->TupleDataLen != 13)
  609. return -EINVAL;
  610. if ((tuple->TupleData[0] != 2) || (tuple->TupleData[1] != 1) ||
  611. (tuple->TupleData[2] != 6))
  612. return -EINVAL;
  613. /* another try (James Lehmer's CE2 version 4.1)*/
  614. for (i = 2; i < 6; i++)
  615. dev->dev_addr[i] = tuple->TupleData[i+2];
  616. return 0;
  617. };
  618. static int
  619. xirc2ps_config(struct pcmcia_device * link)
  620. {
  621. struct net_device *dev = link->priv;
  622. local_info_t *local = netdev_priv(dev);
  623. unsigned int ioaddr;
  624. int err;
  625. u8 *buf;
  626. size_t len;
  627. local->dingo_ccr = NULL;
  628. dev_dbg(&link->dev, "config\n");
  629. /* Is this a valid card */
  630. if (link->has_manf_id == 0) {
  631. pr_notice("manfid not found in CIS\n");
  632. goto failure;
  633. }
  634. switch (link->manf_id) {
  635. case MANFID_XIRCOM:
  636. local->manf_str = "Xircom";
  637. break;
  638. case MANFID_ACCTON:
  639. local->manf_str = "Accton";
  640. break;
  641. case MANFID_COMPAQ:
  642. case MANFID_COMPAQ2:
  643. local->manf_str = "Compaq";
  644. break;
  645. case MANFID_INTEL:
  646. local->manf_str = "Intel";
  647. break;
  648. case MANFID_TOSHIBA:
  649. local->manf_str = "Toshiba";
  650. break;
  651. default:
  652. pr_notice("Unknown Card Manufacturer ID: 0x%04x\n",
  653. (unsigned)link->manf_id);
  654. goto failure;
  655. }
  656. dev_dbg(&link->dev, "found %s card\n", local->manf_str);
  657. if (!set_card_type(link)) {
  658. pr_notice("this card is not supported\n");
  659. goto failure;
  660. }
  661. /* get the ethernet address from the CIS */
  662. err = pcmcia_get_mac_from_cis(link, dev);
  663. /* not found: try to get the node-id from tuple 0x89 */
  664. if (err) {
  665. len = pcmcia_get_tuple(link, 0x89, &buf);
  666. /* data layout looks like tuple 0x22 */
  667. if (buf && len == 8) {
  668. if (*buf == CISTPL_FUNCE_LAN_NODE_ID) {
  669. int i;
  670. for (i = 2; i < 6; i++)
  671. dev->dev_addr[i] = buf[i+2];
  672. } else
  673. err = -1;
  674. }
  675. kfree(buf);
  676. }
  677. if (err)
  678. err = pcmcia_loop_tuple(link, CISTPL_FUNCE, pcmcia_get_mac_ce, dev);
  679. if (err) {
  680. pr_notice("node-id not found in CIS\n");
  681. goto failure;
  682. }
  683. if (local->modem) {
  684. int pass;
  685. link->config_flags |= CONF_AUTO_SET_IO;
  686. if (local->dingo) {
  687. /* Take the Modem IO port from the CIS and scan for a free
  688. * Ethernet port */
  689. if (!pcmcia_loop_config(link, xirc2ps_config_modem, NULL))
  690. goto port_found;
  691. } else {
  692. /* We do 2 passes here: The first one uses the regular mapping and
  693. * the second tries again, thereby considering that the 32 ports are
  694. * mirrored every 32 bytes. Actually we use a mirrored port for
  695. * the Mako if (on the first pass) the COR bit 5 is set.
  696. */
  697. for (pass=0; pass < 2; pass++)
  698. if (!pcmcia_loop_config(link, xirc2ps_config_check,
  699. &pass))
  700. goto port_found;
  701. /* if special option:
  702. * try to configure as Ethernet only.
  703. * .... */
  704. }
  705. pr_notice("no ports available\n");
  706. } else {
  707. link->io_lines = 10;
  708. link->resource[0]->end = 16;
  709. link->resource[0]->flags |= IO_DATA_PATH_WIDTH_16;
  710. for (ioaddr = 0x300; ioaddr < 0x400; ioaddr += 0x10) {
  711. link->resource[0]->start = ioaddr;
  712. if (!(err = pcmcia_request_io(link)))
  713. goto port_found;
  714. }
  715. link->resource[0]->start = 0; /* let CS decide */
  716. if ((err = pcmcia_request_io(link)))
  717. goto config_error;
  718. }
  719. port_found:
  720. if (err)
  721. goto config_error;
  722. /****************
  723. * Now allocate an interrupt line. Note that this does not
  724. * actually assign a handler to the interrupt.
  725. */
  726. if ((err=pcmcia_request_irq(link, xirc2ps_interrupt)))
  727. goto config_error;
  728. link->config_flags |= CONF_ENABLE_IRQ;
  729. if (do_sound)
  730. link->config_flags |= CONF_ENABLE_SPKR;
  731. if ((err = pcmcia_enable_device(link)))
  732. goto config_error;
  733. if (local->dingo) {
  734. /* Reset the modem's BAR to the correct value
  735. * This is necessary because in the RequestConfiguration call,
  736. * the base address of the ethernet port (BasePort1) is written
  737. * to the BAR registers of the modem.
  738. */
  739. err = pcmcia_write_config_byte(link, CISREG_IOBASE_0, (u8)
  740. link->resource[1]->start & 0xff);
  741. if (err)
  742. goto config_error;
  743. err = pcmcia_write_config_byte(link, CISREG_IOBASE_1,
  744. (link->resource[1]->start >> 8) & 0xff);
  745. if (err)
  746. goto config_error;
  747. /* There is no config entry for the Ethernet part which
  748. * is at 0x0800. So we allocate a window into the attribute
  749. * memory and write direct to the CIS registers
  750. */
  751. link->resource[2]->flags = WIN_DATA_WIDTH_8 | WIN_MEMORY_TYPE_AM |
  752. WIN_ENABLE;
  753. link->resource[2]->start = link->resource[2]->end = 0;
  754. if ((err = pcmcia_request_window(link, link->resource[2], 0)))
  755. goto config_error;
  756. local->dingo_ccr = ioremap(link->resource[2]->start, 0x1000) + 0x0800;
  757. if ((err = pcmcia_map_mem_page(link, link->resource[2], 0)))
  758. goto config_error;
  759. /* Setup the CCRs; there are no infos in the CIS about the Ethernet
  760. * part.
  761. */
  762. writeb(0x47, local->dingo_ccr + CISREG_COR);
  763. ioaddr = link->resource[0]->start;
  764. writeb(ioaddr & 0xff , local->dingo_ccr + CISREG_IOBASE_0);
  765. writeb((ioaddr >> 8)&0xff , local->dingo_ccr + CISREG_IOBASE_1);
  766. #if 0
  767. {
  768. u_char tmp;
  769. pr_info("ECOR:");
  770. for (i=0; i < 7; i++) {
  771. tmp = readb(local->dingo_ccr + i*2);
  772. pr_cont(" %02x", tmp);
  773. }
  774. pr_cont("\n");
  775. pr_info("DCOR:");
  776. for (i=0; i < 4; i++) {
  777. tmp = readb(local->dingo_ccr + 0x20 + i*2);
  778. pr_cont(" %02x", tmp);
  779. }
  780. pr_cont("\n");
  781. pr_info("SCOR:");
  782. for (i=0; i < 10; i++) {
  783. tmp = readb(local->dingo_ccr + 0x40 + i*2);
  784. pr_cont(" %02x", tmp);
  785. }
  786. pr_cont("\n");
  787. }
  788. #endif
  789. writeb(0x01, local->dingo_ccr + 0x20);
  790. writeb(0x0c, local->dingo_ccr + 0x22);
  791. writeb(0x00, local->dingo_ccr + 0x24);
  792. writeb(0x00, local->dingo_ccr + 0x26);
  793. writeb(0x00, local->dingo_ccr + 0x28);
  794. }
  795. /* The if_port symbol can be set when the module is loaded */
  796. local->probe_port=0;
  797. if (!if_port) {
  798. local->probe_port = dev->if_port = 1;
  799. } else if ((if_port >= 1 && if_port <= 2) ||
  800. (local->mohawk && if_port==4))
  801. dev->if_port = if_port;
  802. else
  803. pr_notice("invalid if_port requested\n");
  804. /* we can now register the device with the net subsystem */
  805. dev->irq = link->irq;
  806. dev->base_addr = link->resource[0]->start;
  807. if (local->dingo)
  808. do_reset(dev, 1); /* a kludge to make the cem56 work */
  809. SET_NETDEV_DEV(dev, &link->dev);
  810. if ((err=register_netdev(dev))) {
  811. pr_notice("register_netdev() failed\n");
  812. goto config_error;
  813. }
  814. /* give some infos about the hardware */
  815. netdev_info(dev, "%s: port %#3lx, irq %d, hwaddr %pM\n",
  816. local->manf_str, (u_long)dev->base_addr, (int)dev->irq,
  817. dev->dev_addr);
  818. return 0;
  819. config_error:
  820. xirc2ps_release(link);
  821. return -ENODEV;
  822. failure:
  823. return -ENODEV;
  824. } /* xirc2ps_config */
  825. static void
  826. xirc2ps_release(struct pcmcia_device *link)
  827. {
  828. dev_dbg(&link->dev, "release\n");
  829. if (link->resource[2]->end) {
  830. struct net_device *dev = link->priv;
  831. local_info_t *local = netdev_priv(dev);
  832. if (local->dingo)
  833. iounmap(local->dingo_ccr - 0x0800);
  834. }
  835. pcmcia_disable_device(link);
  836. } /* xirc2ps_release */
  837. /*====================================================================*/
  838. static int xirc2ps_suspend(struct pcmcia_device *link)
  839. {
  840. struct net_device *dev = link->priv;
  841. if (link->open) {
  842. netif_device_detach(dev);
  843. do_powerdown(dev);
  844. }
  845. return 0;
  846. }
  847. static int xirc2ps_resume(struct pcmcia_device *link)
  848. {
  849. struct net_device *dev = link->priv;
  850. if (link->open) {
  851. do_reset(dev,1);
  852. netif_device_attach(dev);
  853. }
  854. return 0;
  855. }
  856. /*====================================================================*/
  857. /****************
  858. * This is the Interrupt service route.
  859. */
  860. static irqreturn_t
  861. xirc2ps_interrupt(int irq, void *dev_id)
  862. {
  863. struct net_device *dev = (struct net_device *)dev_id;
  864. local_info_t *lp = netdev_priv(dev);
  865. unsigned int ioaddr;
  866. u_char saved_page;
  867. unsigned bytes_rcvd;
  868. unsigned int_status, eth_status, rx_status, tx_status;
  869. unsigned rsr, pktlen;
  870. ulong start_ticks = jiffies; /* fixme: jiffies rollover every 497 days
  871. * is this something to worry about?
  872. * -- on a laptop?
  873. */
  874. if (!netif_device_present(dev))
  875. return IRQ_HANDLED;
  876. ioaddr = dev->base_addr;
  877. if (lp->mohawk) { /* must disable the interrupt */
  878. PutByte(XIRCREG_CR, 0);
  879. }
  880. pr_debug("%s: interrupt %d at %#x.\n", dev->name, irq, ioaddr);
  881. saved_page = GetByte(XIRCREG_PR);
  882. /* Read the ISR to see whats the cause for the interrupt.
  883. * This also clears the interrupt flags on CE2 cards
  884. */
  885. int_status = GetByte(XIRCREG_ISR);
  886. bytes_rcvd = 0;
  887. loop_entry:
  888. if (int_status == 0xff) { /* card may be ejected */
  889. pr_debug("%s: interrupt %d for dead card\n", dev->name, irq);
  890. goto leave;
  891. }
  892. eth_status = GetByte(XIRCREG_ESR);
  893. SelectPage(0x40);
  894. rx_status = GetByte(XIRCREG40_RXST0);
  895. PutByte(XIRCREG40_RXST0, (~rx_status & 0xff));
  896. tx_status = GetByte(XIRCREG40_TXST0);
  897. tx_status |= GetByte(XIRCREG40_TXST1) << 8;
  898. PutByte(XIRCREG40_TXST0, 0);
  899. PutByte(XIRCREG40_TXST1, 0);
  900. pr_debug("%s: ISR=%#2.2x ESR=%#2.2x RSR=%#2.2x TSR=%#4.4x\n",
  901. dev->name, int_status, eth_status, rx_status, tx_status);
  902. /***** receive section ******/
  903. SelectPage(0);
  904. while (eth_status & FullPktRcvd) {
  905. rsr = GetByte(XIRCREG0_RSR);
  906. if (bytes_rcvd > maxrx_bytes && (rsr & PktRxOk)) {
  907. /* too many bytes received during this int, drop the rest of the
  908. * packets */
  909. dev->stats.rx_dropped++;
  910. pr_debug("%s: RX drop, too much done\n", dev->name);
  911. } else if (rsr & PktRxOk) {
  912. struct sk_buff *skb;
  913. pktlen = GetWord(XIRCREG0_RBC);
  914. bytes_rcvd += pktlen;
  915. pr_debug("rsr=%#02x packet_length=%u\n", rsr, pktlen);
  916. skb = dev_alloc_skb(pktlen+3); /* 1 extra so we can use insw */
  917. if (!skb) {
  918. pr_notice("low memory, packet dropped (size=%u)\n", pktlen);
  919. dev->stats.rx_dropped++;
  920. } else { /* okay get the packet */
  921. skb_reserve(skb, 2);
  922. if (lp->silicon == 0 ) { /* work around a hardware bug */
  923. unsigned rhsa; /* receive start address */
  924. SelectPage(5);
  925. rhsa = GetWord(XIRCREG5_RHSA0);
  926. SelectPage(0);
  927. rhsa += 3; /* skip control infos */
  928. if (rhsa >= 0x8000)
  929. rhsa = 0;
  930. if (rhsa + pktlen > 0x8000) {
  931. unsigned i;
  932. u_char *buf = skb_put(skb, pktlen);
  933. for (i=0; i < pktlen ; i++, rhsa++) {
  934. buf[i] = GetByte(XIRCREG_EDP);
  935. if (rhsa == 0x8000) {
  936. rhsa = 0;
  937. i--;
  938. }
  939. }
  940. } else {
  941. insw(ioaddr+XIRCREG_EDP,
  942. skb_put(skb, pktlen), (pktlen+1)>>1);
  943. }
  944. }
  945. #if 0
  946. else if (lp->mohawk) {
  947. /* To use this 32 bit access we should use
  948. * a manual optimized loop
  949. * Also the words are swapped, we can get more
  950. * performance by using 32 bit access and swapping
  951. * the words in a register. Will need this for cardbus
  952. *
  953. * Note: don't forget to change the ALLOC_SKB to .. +3
  954. */
  955. unsigned i;
  956. u_long *p = skb_put(skb, pktlen);
  957. register u_long a;
  958. unsigned int edpreg = ioaddr+XIRCREG_EDP-2;
  959. for (i=0; i < len ; i += 4, p++) {
  960. a = inl(edpreg);
  961. __asm__("rorl $16,%0\n\t"
  962. :"=q" (a)
  963. : "0" (a));
  964. *p = a;
  965. }
  966. }
  967. #endif
  968. else {
  969. insw(ioaddr+XIRCREG_EDP, skb_put(skb, pktlen),
  970. (pktlen+1)>>1);
  971. }
  972. skb->protocol = eth_type_trans(skb, dev);
  973. netif_rx(skb);
  974. dev->stats.rx_packets++;
  975. dev->stats.rx_bytes += pktlen;
  976. if (!(rsr & PhyPkt))
  977. dev->stats.multicast++;
  978. }
  979. } else { /* bad packet */
  980. pr_debug("rsr=%#02x\n", rsr);
  981. }
  982. if (rsr & PktTooLong) {
  983. dev->stats.rx_frame_errors++;
  984. pr_debug("%s: Packet too long\n", dev->name);
  985. }
  986. if (rsr & CRCErr) {
  987. dev->stats.rx_crc_errors++;
  988. pr_debug("%s: CRC error\n", dev->name);
  989. }
  990. if (rsr & AlignErr) {
  991. dev->stats.rx_fifo_errors++; /* okay ? */
  992. pr_debug("%s: Alignment error\n", dev->name);
  993. }
  994. /* clear the received/dropped/error packet */
  995. PutWord(XIRCREG0_DO, 0x8000); /* issue cmd: skip_rx_packet */
  996. /* get the new ethernet status */
  997. eth_status = GetByte(XIRCREG_ESR);
  998. }
  999. if (rx_status & 0x10) { /* Receive overrun */
  1000. dev->stats.rx_over_errors++;
  1001. PutByte(XIRCREG_CR, ClearRxOvrun);
  1002. pr_debug("receive overrun cleared\n");
  1003. }
  1004. /***** transmit section ******/
  1005. if (int_status & PktTxed) {
  1006. unsigned n, nn;
  1007. n = lp->last_ptr_value;
  1008. nn = GetByte(XIRCREG0_PTR);
  1009. lp->last_ptr_value = nn;
  1010. if (nn < n) /* rollover */
  1011. dev->stats.tx_packets += 256 - n;
  1012. else if (n == nn) { /* happens sometimes - don't know why */
  1013. pr_debug("PTR not changed?\n");
  1014. } else
  1015. dev->stats.tx_packets += lp->last_ptr_value - n;
  1016. netif_wake_queue(dev);
  1017. }
  1018. if (tx_status & 0x0002) { /* Execessive collissions */
  1019. pr_debug("tx restarted due to execssive collissions\n");
  1020. PutByte(XIRCREG_CR, RestartTx); /* restart transmitter process */
  1021. }
  1022. if (tx_status & 0x0040)
  1023. dev->stats.tx_aborted_errors++;
  1024. /* recalculate our work chunk so that we limit the duration of this
  1025. * ISR to about 1/10 of a second.
  1026. * Calculate only if we received a reasonable amount of bytes.
  1027. */
  1028. if (bytes_rcvd > 1000) {
  1029. u_long duration = jiffies - start_ticks;
  1030. if (duration >= HZ/10) { /* if more than about 1/10 second */
  1031. maxrx_bytes = (bytes_rcvd * (HZ/10)) / duration;
  1032. if (maxrx_bytes < 2000)
  1033. maxrx_bytes = 2000;
  1034. else if (maxrx_bytes > 22000)
  1035. maxrx_bytes = 22000;
  1036. pr_debug("set maxrx=%u (rcvd=%u ticks=%lu)\n",
  1037. maxrx_bytes, bytes_rcvd, duration);
  1038. } else if (!duration && maxrx_bytes < 22000) {
  1039. /* now much faster */
  1040. maxrx_bytes += 2000;
  1041. if (maxrx_bytes > 22000)
  1042. maxrx_bytes = 22000;
  1043. pr_debug("set maxrx=%u\n", maxrx_bytes);
  1044. }
  1045. }
  1046. leave:
  1047. if (lockup_hack) {
  1048. if (int_status != 0xff && (int_status = GetByte(XIRCREG_ISR)) != 0)
  1049. goto loop_entry;
  1050. }
  1051. SelectPage(saved_page);
  1052. PutByte(XIRCREG_CR, EnableIntr); /* re-enable interrupts */
  1053. /* Instead of dropping packets during a receive, we could
  1054. * force an interrupt with this command:
  1055. * PutByte(XIRCREG_CR, EnableIntr|ForceIntr);
  1056. */
  1057. return IRQ_HANDLED;
  1058. } /* xirc2ps_interrupt */
  1059. /*====================================================================*/
  1060. static void
  1061. xirc2ps_tx_timeout_task(struct work_struct *work)
  1062. {
  1063. local_info_t *local =
  1064. container_of(work, local_info_t, tx_timeout_task);
  1065. struct net_device *dev = local->dev;
  1066. /* reset the card */
  1067. do_reset(dev,1);
  1068. dev->trans_start = jiffies; /* prevent tx timeout */
  1069. netif_wake_queue(dev);
  1070. }
  1071. static void
  1072. xirc_tx_timeout(struct net_device *dev)
  1073. {
  1074. local_info_t *lp = netdev_priv(dev);
  1075. dev->stats.tx_errors++;
  1076. netdev_notice(dev, "transmit timed out\n");
  1077. schedule_work(&lp->tx_timeout_task);
  1078. }
  1079. static netdev_tx_t
  1080. do_start_xmit(struct sk_buff *skb, struct net_device *dev)
  1081. {
  1082. local_info_t *lp = netdev_priv(dev);
  1083. unsigned int ioaddr = dev->base_addr;
  1084. int okay;
  1085. unsigned freespace;
  1086. unsigned pktlen = skb->len;
  1087. pr_debug("do_start_xmit(skb=%p, dev=%p) len=%u\n",
  1088. skb, dev, pktlen);
  1089. /* adjust the packet length to min. required
  1090. * and hope that the buffer is large enough
  1091. * to provide some random data.
  1092. * fixme: For Mohawk we can change this by sending
  1093. * a larger packetlen than we actually have; the chip will
  1094. * pad this in his buffer with random bytes
  1095. */
  1096. if (pktlen < ETH_ZLEN)
  1097. {
  1098. if (skb_padto(skb, ETH_ZLEN))
  1099. return NETDEV_TX_OK;
  1100. pktlen = ETH_ZLEN;
  1101. }
  1102. netif_stop_queue(dev);
  1103. SelectPage(0);
  1104. PutWord(XIRCREG0_TRS, (u_short)pktlen+2);
  1105. freespace = GetWord(XIRCREG0_TSO);
  1106. okay = freespace & 0x8000;
  1107. freespace &= 0x7fff;
  1108. /* TRS doesn't work - (indeed it is eliminated with sil-rev 1) */
  1109. okay = pktlen +2 < freespace;
  1110. pr_debug("%s: avail. tx space=%u%s\n",
  1111. dev->name, freespace, okay ? " (okay)":" (not enough)");
  1112. if (!okay) { /* not enough space */
  1113. return NETDEV_TX_BUSY; /* upper layer may decide to requeue this packet */
  1114. }
  1115. /* send the packet */
  1116. PutWord(XIRCREG_EDP, (u_short)pktlen);
  1117. outsw(ioaddr+XIRCREG_EDP, skb->data, pktlen>>1);
  1118. if (pktlen & 1)
  1119. PutByte(XIRCREG_EDP, skb->data[pktlen-1]);
  1120. if (lp->mohawk)
  1121. PutByte(XIRCREG_CR, TransmitPacket|EnableIntr);
  1122. dev_kfree_skb (skb);
  1123. dev->stats.tx_bytes += pktlen;
  1124. netif_start_queue(dev);
  1125. return NETDEV_TX_OK;
  1126. }
  1127. struct set_address_info {
  1128. int reg_nr;
  1129. int page_nr;
  1130. int mohawk;
  1131. unsigned int ioaddr;
  1132. };
  1133. static void set_address(struct set_address_info *sa_info, char *addr)
  1134. {
  1135. unsigned int ioaddr = sa_info->ioaddr;
  1136. int i;
  1137. for (i = 0; i < 6; i++) {
  1138. if (sa_info->reg_nr > 15) {
  1139. sa_info->reg_nr = 8;
  1140. sa_info->page_nr++;
  1141. SelectPage(sa_info->page_nr);
  1142. }
  1143. if (sa_info->mohawk)
  1144. PutByte(sa_info->reg_nr++, addr[5 - i]);
  1145. else
  1146. PutByte(sa_info->reg_nr++, addr[i]);
  1147. }
  1148. }
  1149. /****************
  1150. * Set all addresses: This first one is the individual address,
  1151. * the next 9 addresses are taken from the multicast list and
  1152. * the rest is filled with the individual address.
  1153. */
  1154. static void set_addresses(struct net_device *dev)
  1155. {
  1156. unsigned int ioaddr = dev->base_addr;
  1157. local_info_t *lp = netdev_priv(dev);
  1158. struct netdev_hw_addr *ha;
  1159. struct set_address_info sa_info;
  1160. int i;
  1161. /*
  1162. * Setup the info structure so that by first set_address call it will do
  1163. * SelectPage with the right page number. Hence these ones here.
  1164. */
  1165. sa_info.reg_nr = 15 + 1;
  1166. sa_info.page_nr = 0x50 - 1;
  1167. sa_info.mohawk = lp->mohawk;
  1168. sa_info.ioaddr = ioaddr;
  1169. set_address(&sa_info, dev->dev_addr);
  1170. i = 0;
  1171. netdev_for_each_mc_addr(ha, dev) {
  1172. if (i++ == 9)
  1173. break;
  1174. set_address(&sa_info, ha->addr);
  1175. }
  1176. while (i++ < 9)
  1177. set_address(&sa_info, dev->dev_addr);
  1178. SelectPage(0);
  1179. }
  1180. /****************
  1181. * Set or clear the multicast filter for this adaptor.
  1182. * We can filter up to 9 addresses, if more are requested we set
  1183. * multicast promiscuous mode.
  1184. */
  1185. static void
  1186. set_multicast_list(struct net_device *dev)
  1187. {
  1188. unsigned int ioaddr = dev->base_addr;
  1189. unsigned value;
  1190. SelectPage(0x42);
  1191. value = GetByte(XIRCREG42_SWC1) & 0xC0;
  1192. if (dev->flags & IFF_PROMISC) { /* snoop */
  1193. PutByte(XIRCREG42_SWC1, value | 0x06); /* set MPE and PME */
  1194. } else if (netdev_mc_count(dev) > 9 || (dev->flags & IFF_ALLMULTI)) {
  1195. PutByte(XIRCREG42_SWC1, value | 0x02); /* set MPE */
  1196. } else if (!netdev_mc_empty(dev)) {
  1197. /* the chip can filter 9 addresses perfectly */
  1198. PutByte(XIRCREG42_SWC1, value | 0x01);
  1199. SelectPage(0x40);
  1200. PutByte(XIRCREG40_CMD0, Offline);
  1201. set_addresses(dev);
  1202. SelectPage(0x40);
  1203. PutByte(XIRCREG40_CMD0, EnableRecv | Online);
  1204. } else { /* standard usage */
  1205. PutByte(XIRCREG42_SWC1, value | 0x00);
  1206. }
  1207. SelectPage(0);
  1208. }
  1209. static int
  1210. do_config(struct net_device *dev, struct ifmap *map)
  1211. {
  1212. local_info_t *local = netdev_priv(dev);
  1213. pr_debug("do_config(%p)\n", dev);
  1214. if (map->port != 255 && map->port != dev->if_port) {
  1215. if (map->port > 4)
  1216. return -EINVAL;
  1217. if (!map->port) {
  1218. local->probe_port = 1;
  1219. dev->if_port = 1;
  1220. } else {
  1221. local->probe_port = 0;
  1222. dev->if_port = map->port;
  1223. }
  1224. netdev_info(dev, "switching to %s port\n", if_names[dev->if_port]);
  1225. do_reset(dev,1); /* not the fine way :-) */
  1226. }
  1227. return 0;
  1228. }
  1229. /****************
  1230. * Open the driver
  1231. */
  1232. static int
  1233. do_open(struct net_device *dev)
  1234. {
  1235. local_info_t *lp = netdev_priv(dev);
  1236. struct pcmcia_device *link = lp->p_dev;
  1237. dev_dbg(&link->dev, "do_open(%p)\n", dev);
  1238. /* Check that the PCMCIA card is still here. */
  1239. /* Physical device present signature. */
  1240. if (!pcmcia_dev_present(link))
  1241. return -ENODEV;
  1242. /* okay */
  1243. link->open++;
  1244. netif_start_queue(dev);
  1245. do_reset(dev,1);
  1246. return 0;
  1247. }
  1248. static void netdev_get_drvinfo(struct net_device *dev,
  1249. struct ethtool_drvinfo *info)
  1250. {
  1251. strcpy(info->driver, "xirc2ps_cs");
  1252. sprintf(info->bus_info, "PCMCIA 0x%lx", dev->base_addr);
  1253. }
  1254. static const struct ethtool_ops netdev_ethtool_ops = {
  1255. .get_drvinfo = netdev_get_drvinfo,
  1256. };
  1257. static int
  1258. do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  1259. {
  1260. local_info_t *local = netdev_priv(dev);
  1261. unsigned int ioaddr = dev->base_addr;
  1262. struct mii_ioctl_data *data = if_mii(rq);
  1263. pr_debug("%s: ioctl(%-.6s, %#04x) %04x %04x %04x %04x\n",
  1264. dev->name, rq->ifr_ifrn.ifrn_name, cmd,
  1265. data->phy_id, data->reg_num, data->val_in, data->val_out);
  1266. if (!local->mohawk)
  1267. return -EOPNOTSUPP;
  1268. switch(cmd) {
  1269. case SIOCGMIIPHY: /* Get the address of the PHY in use. */
  1270. data->phy_id = 0; /* we have only this address */
  1271. /* fall through */
  1272. case SIOCGMIIREG: /* Read the specified MII register. */
  1273. data->val_out = mii_rd(ioaddr, data->phy_id & 0x1f,
  1274. data->reg_num & 0x1f);
  1275. break;
  1276. case SIOCSMIIREG: /* Write the specified MII register */
  1277. mii_wr(ioaddr, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in,
  1278. 16);
  1279. break;
  1280. default:
  1281. return -EOPNOTSUPP;
  1282. }
  1283. return 0;
  1284. }
  1285. static void
  1286. hardreset(struct net_device *dev)
  1287. {
  1288. local_info_t *local = netdev_priv(dev);
  1289. unsigned int ioaddr = dev->base_addr;
  1290. SelectPage(4);
  1291. udelay(1);
  1292. PutByte(XIRCREG4_GPR1, 0); /* clear bit 0: power down */
  1293. msleep(40); /* wait 40 msec */
  1294. if (local->mohawk)
  1295. PutByte(XIRCREG4_GPR1, 1); /* set bit 0: power up */
  1296. else
  1297. PutByte(XIRCREG4_GPR1, 1 | 4); /* set bit 0: power up, bit 2: AIC */
  1298. msleep(20); /* wait 20 msec */
  1299. }
  1300. static void
  1301. do_reset(struct net_device *dev, int full)
  1302. {
  1303. local_info_t *local = netdev_priv(dev);
  1304. unsigned int ioaddr = dev->base_addr;
  1305. unsigned value;
  1306. pr_debug("%s: do_reset(%p,%d)\n", dev? dev->name:"eth?", dev, full);
  1307. hardreset(dev);
  1308. PutByte(XIRCREG_CR, SoftReset); /* set */
  1309. msleep(20); /* wait 20 msec */
  1310. PutByte(XIRCREG_CR, 0); /* clear */
  1311. msleep(40); /* wait 40 msec */
  1312. if (local->mohawk) {
  1313. SelectPage(4);
  1314. /* set pin GP1 and GP2 to output (0x0c)
  1315. * set GP1 to low to power up the ML6692 (0x00)
  1316. * set GP2 to high to power up the 10Mhz chip (0x02)
  1317. */
  1318. PutByte(XIRCREG4_GPR0, 0x0e);
  1319. }
  1320. /* give the circuits some time to power up */
  1321. msleep(500); /* about 500ms */
  1322. local->last_ptr_value = 0;
  1323. local->silicon = local->mohawk ? (GetByte(XIRCREG4_BOV) & 0x70) >> 4
  1324. : (GetByte(XIRCREG4_BOV) & 0x30) >> 4;
  1325. if (local->probe_port) {
  1326. if (!local->mohawk) {
  1327. SelectPage(4);
  1328. PutByte(XIRCREG4_GPR0, 4);
  1329. local->probe_port = 0;
  1330. }
  1331. } else if (dev->if_port == 2) { /* enable 10Base2 */
  1332. SelectPage(0x42);
  1333. PutByte(XIRCREG42_SWC1, 0xC0);
  1334. } else { /* enable 10BaseT */
  1335. SelectPage(0x42);
  1336. PutByte(XIRCREG42_SWC1, 0x80);
  1337. }
  1338. msleep(40); /* wait 40 msec to let it complete */
  1339. #if 0
  1340. {
  1341. SelectPage(0);
  1342. value = GetByte(XIRCREG_ESR); /* read the ESR */
  1343. pr_debug("%s: ESR is: %#02x\n", dev->name, value);
  1344. }
  1345. #endif
  1346. /* setup the ECR */
  1347. SelectPage(1);
  1348. PutByte(XIRCREG1_IMR0, 0xff); /* allow all ints */
  1349. PutByte(XIRCREG1_IMR1, 1 ); /* and Set TxUnderrunDetect */
  1350. value = GetByte(XIRCREG1_ECR);
  1351. #if 0
  1352. if (local->mohawk)
  1353. value |= DisableLinkPulse;
  1354. PutByte(XIRCREG1_ECR, value);
  1355. #endif
  1356. pr_debug("%s: ECR is: %#02x\n", dev->name, value);
  1357. SelectPage(0x42);
  1358. PutByte(XIRCREG42_SWC0, 0x20); /* disable source insertion */
  1359. if (local->silicon != 1) {
  1360. /* set the local memory dividing line.
  1361. * The comments in the sample code say that this is only
  1362. * settable with the scipper version 2 which is revision 0.
  1363. * Always for CE3 cards
  1364. */
  1365. SelectPage(2);
  1366. PutWord(XIRCREG2_RBS, 0x2000);
  1367. }
  1368. if (full)
  1369. set_addresses(dev);
  1370. /* Hardware workaround:
  1371. * The receive byte pointer after reset is off by 1 so we need
  1372. * to move the offset pointer back to 0.
  1373. */
  1374. SelectPage(0);
  1375. PutWord(XIRCREG0_DO, 0x2000); /* change offset command, off=0 */
  1376. /* setup MAC IMRs and clear status registers */
  1377. SelectPage(0x40); /* Bit 7 ... bit 0 */
  1378. PutByte(XIRCREG40_RMASK0, 0xff); /* ROK, RAB, rsv, RO, CRC, AE, PTL, MP */
  1379. PutByte(XIRCREG40_TMASK0, 0xff); /* TOK, TAB, SQE, LL, TU, JAB, EXC, CRS */
  1380. PutByte(XIRCREG40_TMASK1, 0xb0); /* rsv, rsv, PTD, EXT, rsv,rsv,rsv, rsv*/
  1381. PutByte(XIRCREG40_RXST0, 0x00); /* ROK, RAB, REN, RO, CRC, AE, PTL, MP */
  1382. PutByte(XIRCREG40_TXST0, 0x00); /* TOK, TAB, SQE, LL, TU, JAB, EXC, CRS */
  1383. PutByte(XIRCREG40_TXST1, 0x00); /* TEN, rsv, PTD, EXT, retry_counter:4 */
  1384. if (full && local->mohawk && init_mii(dev)) {
  1385. if (dev->if_port == 4 || local->dingo || local->new_mii) {
  1386. netdev_info(dev, "MII selected\n");
  1387. SelectPage(2);
  1388. PutByte(XIRCREG2_MSR, GetByte(XIRCREG2_MSR) | 0x08);
  1389. msleep(20);
  1390. } else {
  1391. netdev_info(dev, "MII detected; using 10mbs\n");
  1392. SelectPage(0x42);
  1393. if (dev->if_port == 2) /* enable 10Base2 */
  1394. PutByte(XIRCREG42_SWC1, 0xC0);
  1395. else /* enable 10BaseT */
  1396. PutByte(XIRCREG42_SWC1, 0x80);
  1397. msleep(40); /* wait 40 msec to let it complete */
  1398. }
  1399. if (full_duplex)
  1400. PutByte(XIRCREG1_ECR, GetByte(XIRCREG1_ECR | FullDuplex));
  1401. } else { /* No MII */
  1402. SelectPage(0);
  1403. value = GetByte(XIRCREG_ESR); /* read the ESR */
  1404. dev->if_port = (value & MediaSelect) ? 1 : 2;
  1405. }
  1406. /* configure the LEDs */
  1407. SelectPage(2);
  1408. if (dev->if_port == 1 || dev->if_port == 4) /* TP: Link and Activity */
  1409. PutByte(XIRCREG2_LED, 0x3b);
  1410. else /* Coax: Not-Collision and Activity */
  1411. PutByte(XIRCREG2_LED, 0x3a);
  1412. if (local->dingo)
  1413. PutByte(0x0b, 0x04); /* 100 Mbit LED */
  1414. /* enable receiver and put the mac online */
  1415. if (full) {
  1416. set_multicast_list(dev);
  1417. SelectPage(0x40);
  1418. PutByte(XIRCREG40_CMD0, EnableRecv | Online);
  1419. }
  1420. /* setup Ethernet IMR and enable interrupts */
  1421. SelectPage(1);
  1422. PutByte(XIRCREG1_IMR0, 0xff);
  1423. udelay(1);
  1424. SelectPage(0);
  1425. PutByte(XIRCREG_CR, EnableIntr);
  1426. if (local->modem && !local->dingo) { /* do some magic */
  1427. if (!(GetByte(0x10) & 0x01))
  1428. PutByte(0x10, 0x11); /* unmask master-int bit */
  1429. }
  1430. if (full)
  1431. netdev_info(dev, "media %s, silicon revision %d\n",
  1432. if_names[dev->if_port], local->silicon);
  1433. /* We should switch back to page 0 to avoid a bug in revision 0
  1434. * where regs with offset below 8 can't be read after an access
  1435. * to the MAC registers */
  1436. SelectPage(0);
  1437. }
  1438. /****************
  1439. * Initialize the Media-Independent-Interface
  1440. * Returns: True if we have a good MII
  1441. */
  1442. static int
  1443. init_mii(struct net_device *dev)
  1444. {
  1445. local_info_t *local = netdev_priv(dev);
  1446. unsigned int ioaddr = dev->base_addr;
  1447. unsigned control, status, linkpartner;
  1448. int i;
  1449. if (if_port == 4 || if_port == 1) { /* force 100BaseT or 10BaseT */
  1450. dev->if_port = if_port;
  1451. local->probe_port = 0;
  1452. return 1;
  1453. }
  1454. status = mii_rd(ioaddr, 0, 1);
  1455. if ((status & 0xff00) != 0x7800)
  1456. return 0; /* No MII */
  1457. local->new_mii = (mii_rd(ioaddr, 0, 2) != 0xffff);
  1458. if (local->probe_port)
  1459. control = 0x1000; /* auto neg */
  1460. else if (dev->if_port == 4)
  1461. control = 0x2000; /* no auto neg, 100mbs mode */
  1462. else
  1463. control = 0x0000; /* no auto neg, 10mbs mode */
  1464. mii_wr(ioaddr, 0, 0, control, 16);
  1465. udelay(100);
  1466. control = mii_rd(ioaddr, 0, 0);
  1467. if (control & 0x0400) {
  1468. netdev_notice(dev, "can't take PHY out of isolation mode\n");
  1469. local->probe_port = 0;
  1470. return 0;
  1471. }
  1472. if (local->probe_port) {
  1473. /* according to the DP83840A specs the auto negotiation process
  1474. * may take up to 3.5 sec, so we use this also for our ML6692
  1475. * Fixme: Better to use a timer here!
  1476. */
  1477. for (i=0; i < 35; i++) {
  1478. msleep(100); /* wait 100 msec */
  1479. status = mii_rd(ioaddr, 0, 1);
  1480. if ((status & 0x0020) && (status & 0x0004))
  1481. break;
  1482. }
  1483. if (!(status & 0x0020)) {
  1484. netdev_info(dev, "autonegotiation failed; using 10mbs\n");
  1485. if (!local->new_mii) {
  1486. control = 0x0000;
  1487. mii_wr(ioaddr, 0, 0, control, 16);
  1488. udelay(100);
  1489. SelectPage(0);
  1490. dev->if_port = (GetByte(XIRCREG_ESR) & MediaSelect) ? 1 : 2;
  1491. }
  1492. } else {
  1493. linkpartner = mii_rd(ioaddr, 0, 5);
  1494. netdev_info(dev, "MII link partner: %04x\n", link