PageRenderTime 53ms CodeModel.GetById 20ms RepoModel.GetById 0ms app.codeStats 0ms

/drivers/char/nwflash.c

https://bitbucket.org/EaglesBlood_Development/eb_grouper
C | 689 lines | 374 code | 117 blank | 198 comment | 61 complexity | 1bd047e90aa3bdb892ddb71dae852f4c MD5 | raw file
  1. /*
  2. * Flash memory interface rev.5 driver for the Intel
  3. * Flash chips used on the NetWinder.
  4. *
  5. * 20/08/2000 RMK use __ioremap to map flash into virtual memory
  6. * make a few more places use "volatile"
  7. * 22/05/2001 RMK - Lock read against write
  8. * - merge printk level changes (with mods) from Alan Cox.
  9. * - use *ppos as the file position, not file->f_pos.
  10. * - fix check for out of range pos and r/w size
  11. *
  12. * Please note that we are tampering with the only flash chip in the
  13. * machine, which contains the bootup code. We therefore have the
  14. * power to convert these machines into doorstops...
  15. */
  16. #include <linux/module.h>
  17. #include <linux/types.h>
  18. #include <linux/fs.h>
  19. #include <linux/errno.h>
  20. #include <linux/mm.h>
  21. #include <linux/delay.h>
  22. #include <linux/proc_fs.h>
  23. #include <linux/miscdevice.h>
  24. #include <linux/spinlock.h>
  25. #include <linux/rwsem.h>
  26. #include <linux/init.h>
  27. #include <linux/mutex.h>
  28. #include <linux/jiffies.h>
  29. #include <asm/hardware/dec21285.h>
  30. #include <asm/io.h>
  31. #include <asm/leds.h>
  32. #include <asm/mach-types.h>
  33. #include <asm/system.h>
  34. #include <asm/uaccess.h>
  35. /*****************************************************************************/
  36. #include <asm/nwflash.h>
  37. #define NWFLASH_VERSION "6.4"
  38. static DEFINE_MUTEX(flash_mutex);
  39. static void kick_open(void);
  40. static int get_flash_id(void);
  41. static int erase_block(int nBlock);
  42. static int write_block(unsigned long p, const char __user *buf, int count);
  43. #define KFLASH_SIZE 1024*1024 //1 Meg
  44. #define KFLASH_SIZE4 4*1024*1024 //4 Meg
  45. #define KFLASH_ID 0x89A6 //Intel flash
  46. #define KFLASH_ID4 0xB0D4 //Intel flash 4Meg
  47. static int flashdebug; //if set - we will display progress msgs
  48. static int gbWriteEnable;
  49. static int gbWriteBase64Enable;
  50. static volatile unsigned char *FLASH_BASE;
  51. static int gbFlashSize = KFLASH_SIZE;
  52. static DEFINE_MUTEX(nwflash_mutex);
  53. static int get_flash_id(void)
  54. {
  55. volatile unsigned int c1, c2;
  56. /*
  57. * try to get flash chip ID
  58. */
  59. kick_open();
  60. c2 = inb(0x80);
  61. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x90;
  62. udelay(15);
  63. c1 = *(volatile unsigned char *) FLASH_BASE;
  64. c2 = inb(0x80);
  65. /*
  66. * on 4 Meg flash the second byte is actually at offset 2...
  67. */
  68. if (c1 == 0xB0)
  69. c2 = *(volatile unsigned char *) (FLASH_BASE + 2);
  70. else
  71. c2 = *(volatile unsigned char *) (FLASH_BASE + 1);
  72. c2 += (c1 << 8);
  73. /*
  74. * set it back to read mode
  75. */
  76. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;
  77. if (c2 == KFLASH_ID4)
  78. gbFlashSize = KFLASH_SIZE4;
  79. return c2;
  80. }
  81. static long flash_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
  82. {
  83. mutex_lock(&flash_mutex);
  84. switch (cmd) {
  85. case CMD_WRITE_DISABLE:
  86. gbWriteBase64Enable = 0;
  87. gbWriteEnable = 0;
  88. break;
  89. case CMD_WRITE_ENABLE:
  90. gbWriteEnable = 1;
  91. break;
  92. case CMD_WRITE_BASE64K_ENABLE:
  93. gbWriteBase64Enable = 1;
  94. break;
  95. default:
  96. gbWriteBase64Enable = 0;
  97. gbWriteEnable = 0;
  98. mutex_unlock(&flash_mutex);
  99. return -EINVAL;
  100. }
  101. mutex_unlock(&flash_mutex);
  102. return 0;
  103. }
  104. static ssize_t flash_read(struct file *file, char __user *buf, size_t size,
  105. loff_t *ppos)
  106. {
  107. ssize_t ret;
  108. if (flashdebug)
  109. printk(KERN_DEBUG "flash_read: flash_read: offset=0x%llx, "
  110. "buffer=%p, count=0x%zx.\n", *ppos, buf, size);
  111. /*
  112. * We now lock against reads and writes. --rmk
  113. */
  114. if (mutex_lock_interruptible(&nwflash_mutex))
  115. return -ERESTARTSYS;
  116. ret = simple_read_from_buffer(buf, size, ppos, (void *)FLASH_BASE, gbFlashSize);
  117. mutex_unlock(&nwflash_mutex);
  118. return ret;
  119. }
  120. static ssize_t flash_write(struct file *file, const char __user *buf,
  121. size_t size, loff_t * ppos)
  122. {
  123. unsigned long p = *ppos;
  124. unsigned int count = size;
  125. int written;
  126. int nBlock, temp, rc;
  127. int i, j;
  128. if (flashdebug)
  129. printk("flash_write: offset=0x%lX, buffer=0x%p, count=0x%X.\n",
  130. p, buf, count);
  131. if (!gbWriteEnable)
  132. return -EINVAL;
  133. if (p < 64 * 1024 && (!gbWriteBase64Enable))
  134. return -EINVAL;
  135. /*
  136. * check for out of range pos or count
  137. */
  138. if (p >= gbFlashSize)
  139. return count ? -ENXIO : 0;
  140. if (count > gbFlashSize - p)
  141. count = gbFlashSize - p;
  142. if (!access_ok(VERIFY_READ, buf, count))
  143. return -EFAULT;
  144. /*
  145. * We now lock against reads and writes. --rmk
  146. */
  147. if (mutex_lock_interruptible(&nwflash_mutex))
  148. return -ERESTARTSYS;
  149. written = 0;
  150. leds_event(led_claim);
  151. leds_event(led_green_on);
  152. nBlock = (int) p >> 16; //block # of 64K bytes
  153. /*
  154. * # of 64K blocks to erase and write
  155. */
  156. temp = ((int) (p + count) >> 16) - nBlock + 1;
  157. /*
  158. * write ends at exactly 64k boundary?
  159. */
  160. if (((int) (p + count) & 0xFFFF) == 0)
  161. temp -= 1;
  162. if (flashdebug)
  163. printk(KERN_DEBUG "flash_write: writing %d block(s) "
  164. "starting at %d.\n", temp, nBlock);
  165. for (; temp; temp--, nBlock++) {
  166. if (flashdebug)
  167. printk(KERN_DEBUG "flash_write: erasing block %d.\n", nBlock);
  168. /*
  169. * first we have to erase the block(s), where we will write...
  170. */
  171. i = 0;
  172. j = 0;
  173. RetryBlock:
  174. do {
  175. rc = erase_block(nBlock);
  176. i++;
  177. } while (rc && i < 10);
  178. if (rc) {
  179. printk(KERN_ERR "flash_write: erase error %x\n", rc);
  180. break;
  181. }
  182. if (flashdebug)
  183. printk(KERN_DEBUG "flash_write: writing offset %lX, "
  184. "from buf %p, bytes left %X.\n", p, buf,
  185. count - written);
  186. /*
  187. * write_block will limit write to space left in this block
  188. */
  189. rc = write_block(p, buf, count - written);
  190. j++;
  191. /*
  192. * if somehow write verify failed? Can't happen??
  193. */
  194. if (!rc) {
  195. /*
  196. * retry up to 10 times
  197. */
  198. if (j < 10)
  199. goto RetryBlock;
  200. else
  201. /*
  202. * else quit with error...
  203. */
  204. rc = -1;
  205. }
  206. if (rc < 0) {
  207. printk(KERN_ERR "flash_write: write error %X\n", rc);
  208. break;
  209. }
  210. p += rc;
  211. buf += rc;
  212. written += rc;
  213. *ppos += rc;
  214. if (flashdebug)
  215. printk(KERN_DEBUG "flash_write: written 0x%X bytes OK.\n", written);
  216. }
  217. /*
  218. * restore reg on exit
  219. */
  220. leds_event(led_release);
  221. mutex_unlock(&nwflash_mutex);
  222. return written;
  223. }
  224. /*
  225. * The memory devices use the full 32/64 bits of the offset, and so we cannot
  226. * check against negative addresses: they are ok. The return value is weird,
  227. * though, in that case (0).
  228. *
  229. * also note that seeking relative to the "end of file" isn't supported:
  230. * it has no meaning, so it returns -EINVAL.
  231. */
  232. static loff_t flash_llseek(struct file *file, loff_t offset, int orig)
  233. {
  234. loff_t ret;
  235. mutex_lock(&flash_mutex);
  236. if (flashdebug)
  237. printk(KERN_DEBUG "flash_llseek: offset=0x%X, orig=0x%X.\n",
  238. (unsigned int) offset, orig);
  239. switch (orig) {
  240. case 0:
  241. if (offset < 0) {
  242. ret = -EINVAL;
  243. break;
  244. }
  245. if ((unsigned int) offset > gbFlashSize) {
  246. ret = -EINVAL;
  247. break;
  248. }
  249. file->f_pos = (unsigned int) offset;
  250. ret = file->f_pos;
  251. break;
  252. case 1:
  253. if ((file->f_pos + offset) > gbFlashSize) {
  254. ret = -EINVAL;
  255. break;
  256. }
  257. if ((file->f_pos + offset) < 0) {
  258. ret = -EINVAL;
  259. break;
  260. }
  261. file->f_pos += offset;
  262. ret = file->f_pos;
  263. break;
  264. default:
  265. ret = -EINVAL;
  266. }
  267. mutex_unlock(&flash_mutex);
  268. return ret;
  269. }
  270. /*
  271. * assume that main Write routine did the parameter checking...
  272. * so just go ahead and erase, what requested!
  273. */
  274. static int erase_block(int nBlock)
  275. {
  276. volatile unsigned int c1;
  277. volatile unsigned char *pWritePtr;
  278. unsigned long timeout;
  279. int temp, temp1;
  280. /*
  281. * orange LED == erase
  282. */
  283. leds_event(led_amber_on);
  284. /*
  285. * reset footbridge to the correct offset 0 (...0..3)
  286. */
  287. *CSR_ROMWRITEREG = 0;
  288. /*
  289. * dummy ROM read
  290. */
  291. c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
  292. kick_open();
  293. /*
  294. * reset status if old errors
  295. */
  296. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
  297. /*
  298. * erase a block...
  299. * aim at the middle of a current block...
  300. */
  301. pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + 0x8000 + (nBlock << 16)));
  302. /*
  303. * dummy read
  304. */
  305. c1 = *pWritePtr;
  306. kick_open();
  307. /*
  308. * erase
  309. */
  310. *(volatile unsigned char *) pWritePtr = 0x20;
  311. /*
  312. * confirm
  313. */
  314. *(volatile unsigned char *) pWritePtr = 0xD0;
  315. /*
  316. * wait 10 ms
  317. */
  318. msleep(10);
  319. /*
  320. * wait while erasing in process (up to 10 sec)
  321. */
  322. timeout = jiffies + 10 * HZ;
  323. c1 = 0;
  324. while (!(c1 & 0x80) && time_before(jiffies, timeout)) {
  325. msleep(10);
  326. /*
  327. * read any address
  328. */
  329. c1 = *(volatile unsigned char *) (pWritePtr);
  330. // printk("Flash_erase: status=%X.\n",c1);
  331. }
  332. /*
  333. * set flash for normal read access
  334. */
  335. kick_open();
  336. // *(volatile unsigned char*)(FLASH_BASE+0x8000) = 0xFF;
  337. *(volatile unsigned char *) pWritePtr = 0xFF; //back to normal operation
  338. /*
  339. * check if erase errors were reported
  340. */
  341. if (c1 & 0x20) {
  342. printk(KERN_ERR "flash_erase: err at %p\n", pWritePtr);
  343. /*
  344. * reset error
  345. */
  346. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
  347. return -2;
  348. }
  349. /*
  350. * just to make sure - verify if erased OK...
  351. */
  352. msleep(10);
  353. pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + (nBlock << 16)));
  354. for (temp = 0; temp < 16 * 1024; temp++, pWritePtr += 4) {
  355. if ((temp1 = *(volatile unsigned int *) pWritePtr) != 0xFFFFFFFF) {
  356. printk(KERN_ERR "flash_erase: verify err at %p = %X\n",
  357. pWritePtr, temp1);
  358. return -1;
  359. }
  360. }
  361. return 0;
  362. }
  363. /*
  364. * write_block will limit number of bytes written to the space in this block
  365. */
  366. static int write_block(unsigned long p, const char __user *buf, int count)
  367. {
  368. volatile unsigned int c1;
  369. volatile unsigned int c2;
  370. unsigned char *pWritePtr;
  371. unsigned int uAddress;
  372. unsigned int offset;
  373. unsigned long timeout;
  374. unsigned long timeout1;
  375. /*
  376. * red LED == write
  377. */
  378. leds_event(led_amber_off);
  379. leds_event(led_red_on);
  380. pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p));
  381. /*
  382. * check if write will end in this block....
  383. */
  384. offset = p & 0xFFFF;
  385. if (offset + count > 0x10000)
  386. count = 0x10000 - offset;
  387. /*
  388. * wait up to 30 sec for this block
  389. */
  390. timeout = jiffies + 30 * HZ;
  391. for (offset = 0; offset < count; offset++, pWritePtr++) {
  392. uAddress = (unsigned int) pWritePtr;
  393. uAddress &= 0xFFFFFFFC;
  394. if (__get_user(c2, buf + offset))
  395. return -EFAULT;
  396. WriteRetry:
  397. /*
  398. * dummy read
  399. */
  400. c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
  401. /*
  402. * kick open the write gate
  403. */
  404. kick_open();
  405. /*
  406. * program footbridge to the correct offset...0..3
  407. */
  408. *CSR_ROMWRITEREG = (unsigned int) pWritePtr & 3;
  409. /*
  410. * write cmd
  411. */
  412. *(volatile unsigned char *) (uAddress) = 0x40;
  413. /*
  414. * data to write
  415. */
  416. *(volatile unsigned char *) (uAddress) = c2;
  417. /*
  418. * get status
  419. */
  420. *(volatile unsigned char *) (FLASH_BASE + 0x10000) = 0x70;
  421. c1 = 0;
  422. /*
  423. * wait up to 1 sec for this byte
  424. */
  425. timeout1 = jiffies + 1 * HZ;
  426. /*
  427. * while not ready...
  428. */
  429. while (!(c1 & 0x80) && time_before(jiffies, timeout1))
  430. c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
  431. /*
  432. * if timeout getting status
  433. */
  434. if (time_after_eq(jiffies, timeout1)) {
  435. kick_open();
  436. /*
  437. * reset err
  438. */
  439. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
  440. goto WriteRetry;
  441. }
  442. /*
  443. * switch on read access, as a default flash operation mode
  444. */
  445. kick_open();
  446. /*
  447. * read access
  448. */
  449. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;
  450. /*
  451. * if hardware reports an error writing, and not timeout -
  452. * reset the chip and retry
  453. */
  454. if (c1 & 0x10) {
  455. kick_open();
  456. /*
  457. * reset err
  458. */
  459. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
  460. /*
  461. * before timeout?
  462. */
  463. if (time_before(jiffies, timeout)) {
  464. if (flashdebug)
  465. printk(KERN_DEBUG "write_block: Retrying write at 0x%X)n",
  466. pWritePtr - FLASH_BASE);
  467. /*
  468. * no LED == waiting
  469. */
  470. leds_event(led_amber_off);
  471. /*
  472. * wait couple ms
  473. */
  474. msleep(10);
  475. /*
  476. * red LED == write
  477. */
  478. leds_event(led_red_on);
  479. goto WriteRetry;
  480. } else {
  481. printk(KERN_ERR "write_block: timeout at 0x%X\n",
  482. pWritePtr - FLASH_BASE);
  483. /*
  484. * return error -2
  485. */
  486. return -2;
  487. }
  488. }
  489. }
  490. /*
  491. * green LED == read/verify
  492. */
  493. leds_event(led_amber_off);
  494. leds_event(led_green_on);
  495. msleep(10);
  496. pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p));
  497. for (offset = 0; offset < count; offset++) {
  498. char c, c1;
  499. if (__get_user(c, buf))
  500. return -EFAULT;
  501. buf++;
  502. if ((c1 = *pWritePtr++) != c) {
  503. printk(KERN_ERR "write_block: verify error at 0x%X (%02X!=%02X)\n",
  504. pWritePtr - FLASH_BASE, c1, c);
  505. return 0;
  506. }
  507. }
  508. return count;
  509. }
  510. static void kick_open(void)
  511. {
  512. unsigned long flags;
  513. /*
  514. * we want to write a bit pattern XXX1 to Xilinx to enable
  515. * the write gate, which will be open for about the next 2ms.
  516. */
  517. spin_lock_irqsave(&nw_gpio_lock, flags);
  518. nw_cpld_modify(CPLD_FLASH_WR_ENABLE, CPLD_FLASH_WR_ENABLE);
  519. spin_unlock_irqrestore(&nw_gpio_lock, flags);
  520. /*
  521. * let the ISA bus to catch on...
  522. */
  523. udelay(25);
  524. }
  525. static const struct file_operations flash_fops =
  526. {
  527. .owner = THIS_MODULE,
  528. .llseek = flash_llseek,
  529. .read = flash_read,
  530. .write = flash_write,
  531. .unlocked_ioctl = flash_ioctl,
  532. };
  533. static struct miscdevice flash_miscdev =
  534. {
  535. FLASH_MINOR,
  536. "nwflash",
  537. &flash_fops
  538. };
  539. static int __init nwflash_init(void)
  540. {
  541. int ret = -ENODEV;
  542. if (machine_is_netwinder()) {
  543. int id;
  544. FLASH_BASE = ioremap(DC21285_FLASH, KFLASH_SIZE4);
  545. if (!FLASH_BASE)
  546. goto out;
  547. id = get_flash_id();
  548. if ((id != KFLASH_ID) && (id != KFLASH_ID4)) {
  549. ret = -ENXIO;
  550. iounmap((void *)FLASH_BASE);
  551. printk("Flash: incorrect ID 0x%04X.\n", id);
  552. goto out;
  553. }
  554. printk("Flash ROM driver v.%s, flash device ID 0x%04X, size %d Mb.\n",
  555. NWFLASH_VERSION, id, gbFlashSize / (1024 * 1024));
  556. ret = misc_register(&flash_miscdev);
  557. if (ret < 0) {
  558. iounmap((void *)FLASH_BASE);
  559. }
  560. }
  561. out:
  562. return ret;
  563. }
  564. static void __exit nwflash_exit(void)
  565. {
  566. misc_deregister(&flash_miscdev);
  567. iounmap((void *)FLASH_BASE);
  568. }
  569. MODULE_LICENSE("GPL");
  570. module_param(flashdebug, bool, 0644);
  571. module_init(nwflash_init);
  572. module_exit(nwflash_exit);