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/arch/arm/mach-omap2/mmc-twl4030.c

https://github.com/JoeyJiao/android-huawei-kernel-common
C | 524 lines | 356 code | 83 blank | 85 comment | 73 complexity | 58536f5172bc558bc8e29e80d0dd1b5d MD5 | raw file
Possible License(s): GPL-2.0
  1. /*
  2. * linux/arch/arm/mach-omap2/mmc-twl4030.c
  3. *
  4. * Copyright (C) 2007-2008 Texas Instruments
  5. * Copyright (C) 2008 Nokia Corporation
  6. * Author: Texas Instruments
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/err.h>
  13. #include <linux/io.h>
  14. #include <linux/module.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/delay.h>
  18. #include <linux/gpio.h>
  19. #include <linux/mmc/host.h>
  20. #include <linux/regulator/consumer.h>
  21. #include <mach/hardware.h>
  22. #include <mach/control.h>
  23. #include <mach/mmc.h>
  24. #include <mach/board.h>
  25. #include "mmc-twl4030.h"
  26. #if defined(CONFIG_REGULATOR) && \
  27. (defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE))
  28. static u16 control_pbias_offset;
  29. static u16 control_devconf1_offset;
  30. #define HSMMC_NAME_LEN 9
  31. static struct twl_mmc_controller {
  32. struct omap_mmc_platform_data *mmc;
  33. /* Vcc == configured supply
  34. * Vcc_alt == optional
  35. * - MMC1, supply for DAT4..DAT7
  36. * - MMC2/MMC2, external level shifter voltage supply, for
  37. * chip (SDIO, eMMC, etc) or transceiver (MMC2 only)
  38. */
  39. struct regulator *vcc;
  40. struct regulator *vcc_aux;
  41. char name[HSMMC_NAME_LEN + 1];
  42. } hsmmc[OMAP34XX_NR_MMC];
  43. static int twl_mmc_card_detect(int irq)
  44. {
  45. unsigned i;
  46. for (i = 0; i < ARRAY_SIZE(hsmmc); i++) {
  47. struct omap_mmc_platform_data *mmc;
  48. mmc = hsmmc[i].mmc;
  49. if (!mmc)
  50. continue;
  51. if (irq != mmc->slots[0].card_detect_irq)
  52. continue;
  53. /* NOTE: assumes card detect signal is active-low */
  54. return !gpio_get_value_cansleep(mmc->slots[0].switch_pin);
  55. }
  56. return -ENOSYS;
  57. }
  58. static int twl_mmc_get_ro(struct device *dev, int slot)
  59. {
  60. struct omap_mmc_platform_data *mmc = dev->platform_data;
  61. /* NOTE: assumes write protect signal is active-high */
  62. return gpio_get_value_cansleep(mmc->slots[0].gpio_wp);
  63. }
  64. static int twl_mmc_get_cover_state(struct device *dev, int slot)
  65. {
  66. struct omap_mmc_platform_data *mmc = dev->platform_data;
  67. /* NOTE: assumes card detect signal is active-low */
  68. return !gpio_get_value_cansleep(mmc->slots[0].switch_pin);
  69. }
  70. /*
  71. * MMC Slot Initialization.
  72. */
  73. static int twl_mmc_late_init(struct device *dev)
  74. {
  75. struct omap_mmc_platform_data *mmc = dev->platform_data;
  76. int ret = 0;
  77. int i;
  78. /* MMC/SD/SDIO doesn't require a card detect switch */
  79. if (gpio_is_valid(mmc->slots[0].switch_pin)) {
  80. ret = gpio_request(mmc->slots[0].switch_pin, "mmc_cd");
  81. if (ret)
  82. goto done;
  83. ret = gpio_direction_input(mmc->slots[0].switch_pin);
  84. if (ret)
  85. goto err;
  86. }
  87. /* require at least main regulator */
  88. for (i = 0; i < ARRAY_SIZE(hsmmc); i++) {
  89. if (hsmmc[i].name == mmc->slots[0].name) {
  90. struct regulator *reg;
  91. hsmmc[i].mmc = mmc;
  92. reg = regulator_get(dev, "vmmc");
  93. if (IS_ERR(reg)) {
  94. dev_dbg(dev, "vmmc regulator missing\n");
  95. /* HACK: until fixed.c regulator is usable,
  96. * we don't require a main regulator
  97. * for MMC2 or MMC3
  98. */
  99. if (i != 0)
  100. break;
  101. ret = PTR_ERR(reg);
  102. hsmmc[i].vcc = NULL;
  103. goto err;
  104. }
  105. hsmmc[i].vcc = reg;
  106. mmc->slots[0].ocr_mask = mmc_regulator_get_ocrmask(reg);
  107. /* allow an aux regulator */
  108. reg = regulator_get(dev, "vmmc_aux");
  109. hsmmc[i].vcc_aux = IS_ERR(reg) ? NULL : reg;
  110. /* UGLY HACK: workaround regulator framework bugs.
  111. * When the bootloader leaves a supply active, it's
  112. * initialized with zero usecount ... and we can't
  113. * disable it without first enabling it. Until the
  114. * framework is fixed, we need a workaround like this
  115. * (which is safe for MMC, but not in general).
  116. */
  117. if (regulator_is_enabled(hsmmc[i].vcc) > 0) {
  118. regulator_enable(hsmmc[i].vcc);
  119. regulator_disable(hsmmc[i].vcc);
  120. }
  121. if (hsmmc[i].vcc_aux) {
  122. if (regulator_is_enabled(reg) > 0) {
  123. regulator_enable(reg);
  124. regulator_disable(reg);
  125. }
  126. }
  127. break;
  128. }
  129. }
  130. return 0;
  131. err:
  132. gpio_free(mmc->slots[0].switch_pin);
  133. done:
  134. mmc->slots[0].card_detect_irq = 0;
  135. mmc->slots[0].card_detect = NULL;
  136. dev_err(dev, "err %d configuring card detect\n", ret);
  137. return ret;
  138. }
  139. static void twl_mmc_cleanup(struct device *dev)
  140. {
  141. struct omap_mmc_platform_data *mmc = dev->platform_data;
  142. int i;
  143. gpio_free(mmc->slots[0].switch_pin);
  144. for(i = 0; i < ARRAY_SIZE(hsmmc); i++) {
  145. regulator_put(hsmmc[i].vcc);
  146. regulator_put(hsmmc[i].vcc_aux);
  147. }
  148. }
  149. #ifdef CONFIG_PM
  150. static int twl_mmc_suspend(struct device *dev, int slot)
  151. {
  152. struct omap_mmc_platform_data *mmc = dev->platform_data;
  153. disable_irq(mmc->slots[0].card_detect_irq);
  154. return 0;
  155. }
  156. static int twl_mmc_resume(struct device *dev, int slot)
  157. {
  158. struct omap_mmc_platform_data *mmc = dev->platform_data;
  159. enable_irq(mmc->slots[0].card_detect_irq);
  160. return 0;
  161. }
  162. #else
  163. #define twl_mmc_suspend NULL
  164. #define twl_mmc_resume NULL
  165. #endif
  166. #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
  167. static int twl4030_mmc_get_context_loss(struct device *dev)
  168. {
  169. /* FIXME: PM DPS not implemented yet */
  170. return 0;
  171. }
  172. #else
  173. #define twl4030_mmc_get_context_loss NULL
  174. #endif
  175. static int twl_mmc1_set_power(struct device *dev, int slot, int power_on,
  176. int vdd)
  177. {
  178. u32 reg;
  179. int ret = 0;
  180. struct twl_mmc_controller *c = &hsmmc[0];
  181. struct omap_mmc_platform_data *mmc = dev->platform_data;
  182. /*
  183. * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the
  184. * card with Vcc regulator (from twl4030 or whatever). OMAP has both
  185. * 1.8V and 3.0V modes, controlled by the PBIAS register.
  186. *
  187. * In 8-bit modes, OMAP VMMC1A (for DAT4..7) needs a supply, which
  188. * is most naturally TWL VSIM; those pins also use PBIAS.
  189. *
  190. * FIXME handle VMMC1A as needed ...
  191. */
  192. if (power_on) {
  193. if (cpu_is_omap2430()) {
  194. reg = omap_ctrl_readl(OMAP243X_CONTROL_DEVCONF1);
  195. if ((1 << vdd) >= MMC_VDD_30_31)
  196. reg |= OMAP243X_MMC1_ACTIVE_OVERWRITE;
  197. else
  198. reg &= ~OMAP243X_MMC1_ACTIVE_OVERWRITE;
  199. omap_ctrl_writel(reg, OMAP243X_CONTROL_DEVCONF1);
  200. }
  201. if (mmc->slots[0].internal_clock) {
  202. reg = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  203. reg |= OMAP2_MMCSDIO1ADPCLKISEL;
  204. omap_ctrl_writel(reg, OMAP2_CONTROL_DEVCONF0);
  205. }
  206. reg = omap_ctrl_readl(control_pbias_offset);
  207. reg |= OMAP2_PBIASSPEEDCTRL0;
  208. reg &= ~OMAP2_PBIASLITEPWRDNZ0;
  209. omap_ctrl_writel(reg, control_pbias_offset);
  210. ret = mmc_regulator_set_ocr(c->vcc, vdd);
  211. /* 100ms delay required for PBIAS configuration */
  212. msleep(100);
  213. reg = omap_ctrl_readl(control_pbias_offset);
  214. reg |= (OMAP2_PBIASLITEPWRDNZ0 | OMAP2_PBIASSPEEDCTRL0);
  215. if ((1 << vdd) <= MMC_VDD_165_195)
  216. reg &= ~OMAP2_PBIASLITEVMODE0;
  217. else
  218. reg |= OMAP2_PBIASLITEVMODE0;
  219. omap_ctrl_writel(reg, control_pbias_offset);
  220. } else {
  221. reg = omap_ctrl_readl(control_pbias_offset);
  222. reg &= ~OMAP2_PBIASLITEPWRDNZ0;
  223. omap_ctrl_writel(reg, control_pbias_offset);
  224. ret = mmc_regulator_set_ocr(c->vcc, 0);
  225. /* 100ms delay required for PBIAS configuration */
  226. msleep(100);
  227. reg = omap_ctrl_readl(control_pbias_offset);
  228. reg |= (OMAP2_PBIASSPEEDCTRL0 | OMAP2_PBIASLITEPWRDNZ0 |
  229. OMAP2_PBIASLITEVMODE0);
  230. omap_ctrl_writel(reg, control_pbias_offset);
  231. }
  232. return ret;
  233. }
  234. static int twl_mmc23_set_power(struct device *dev, int slot, int power_on, int vdd)
  235. {
  236. int ret = 0;
  237. struct twl_mmc_controller *c = NULL;
  238. struct omap_mmc_platform_data *mmc = dev->platform_data;
  239. int i;
  240. for (i = 1; i < ARRAY_SIZE(hsmmc); i++) {
  241. if (mmc == hsmmc[i].mmc) {
  242. c = &hsmmc[i];
  243. break;
  244. }
  245. }
  246. if (c == NULL)
  247. return -ENODEV;
  248. /* If we don't see a Vcc regulator, assume it's a fixed
  249. * voltage always-on regulator.
  250. */
  251. if (!c->vcc)
  252. return 0;
  253. /*
  254. * Assume Vcc regulator is used only to power the card ... OMAP
  255. * VDDS is used to power the pins, optionally with a transceiver to
  256. * support cards using voltages other than VDDS (1.8V nominal). When a
  257. * transceiver is used, DAT3..7 are muxed as transceiver control pins.
  258. *
  259. * In some cases this regulator won't support enable/disable;
  260. * e.g. it's a fixed rail for a WLAN chip.
  261. *
  262. * In other cases vcc_aux switches interface power. Example, for
  263. * eMMC cards it represents VccQ. Sometimes transceivers or SDIO
  264. * chips/cards need an interface voltage rail too.
  265. */
  266. if (power_on) {
  267. /* only MMC2 supports a CLKIN */
  268. if (mmc->slots[0].internal_clock) {
  269. u32 reg;
  270. reg = omap_ctrl_readl(control_devconf1_offset);
  271. reg |= OMAP2_MMCSDIO2ADPCLKISEL;
  272. omap_ctrl_writel(reg, control_devconf1_offset);
  273. }
  274. ret = mmc_regulator_set_ocr(c->vcc, vdd);
  275. /* enable interface voltage rail, if needed */
  276. if (ret == 0 && c->vcc_aux) {
  277. ret = regulator_enable(c->vcc_aux);
  278. if (ret < 0)
  279. ret = mmc_regulator_set_ocr(c->vcc, 0);
  280. }
  281. } else {
  282. if (c->vcc_aux && (ret = regulator_is_enabled(c->vcc_aux)) > 0)
  283. ret = regulator_disable(c->vcc_aux);
  284. if (ret == 0)
  285. ret = mmc_regulator_set_ocr(c->vcc, 0);
  286. }
  287. return ret;
  288. }
  289. static int twl_mmc1_set_sleep(struct device *dev, int slot, int sleep, int vdd,
  290. int cardsleep)
  291. {
  292. struct twl_mmc_controller *c = &hsmmc[0];
  293. int mode = sleep ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL;
  294. return regulator_set_mode(c->vcc, mode);
  295. }
  296. static int twl_mmc23_set_sleep(struct device *dev, int slot, int sleep, int vdd,
  297. int cardsleep)
  298. {
  299. struct twl_mmc_controller *c = NULL;
  300. struct omap_mmc_platform_data *mmc = dev->platform_data;
  301. int i, err, mode;
  302. for (i = 1; i < ARRAY_SIZE(hsmmc); i++) {
  303. if (mmc == hsmmc[i].mmc) {
  304. c = &hsmmc[i];
  305. break;
  306. }
  307. }
  308. if (c == NULL)
  309. return -ENODEV;
  310. /*
  311. * If we don't see a Vcc regulator, assume it's a fixed
  312. * voltage always-on regulator.
  313. */
  314. if (!c->vcc)
  315. return 0;
  316. mode = sleep ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL;
  317. if (!c->vcc_aux)
  318. return regulator_set_mode(c->vcc, mode);
  319. if (cardsleep) {
  320. /* VCC can be turned off if card is asleep */
  321. struct regulator *vcc_aux = c->vcc_aux;
  322. c->vcc_aux = NULL;
  323. if (sleep)
  324. err = twl_mmc23_set_power(dev, slot, 0, 0);
  325. else
  326. err = twl_mmc23_set_power(dev, slot, 1, vdd);
  327. c->vcc_aux = vcc_aux;
  328. } else
  329. err = regulator_set_mode(c->vcc, mode);
  330. if (err)
  331. return err;
  332. return regulator_set_mode(c->vcc_aux, mode);
  333. }
  334. static struct omap_mmc_platform_data *hsmmc_data[OMAP34XX_NR_MMC] __initdata;
  335. void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
  336. {
  337. struct twl4030_hsmmc_info *c;
  338. int nr_hsmmc = ARRAY_SIZE(hsmmc_data);
  339. if (cpu_is_omap2430()) {
  340. control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
  341. control_devconf1_offset = OMAP243X_CONTROL_DEVCONF1;
  342. nr_hsmmc = 2;
  343. } else {
  344. control_pbias_offset = OMAP343X_CONTROL_PBIAS_LITE;
  345. control_devconf1_offset = OMAP343X_CONTROL_DEVCONF1;
  346. }
  347. for (c = controllers; c->mmc; c++) {
  348. struct twl_mmc_controller *twl = hsmmc + c->mmc - 1;
  349. struct omap_mmc_platform_data *mmc = hsmmc_data[c->mmc - 1];
  350. if (!c->mmc || c->mmc > nr_hsmmc) {
  351. pr_debug("MMC%d: no such controller\n", c->mmc);
  352. continue;
  353. }
  354. if (mmc) {
  355. pr_debug("MMC%d: already configured\n", c->mmc);
  356. continue;
  357. }
  358. mmc = kzalloc(sizeof(struct omap_mmc_platform_data), GFP_KERNEL);
  359. if (!mmc) {
  360. pr_err("Cannot allocate memory for mmc device!\n");
  361. return;
  362. }
  363. if (c->name)
  364. strncpy(twl->name, c->name, HSMMC_NAME_LEN);
  365. else
  366. snprintf(twl->name, ARRAY_SIZE(twl->name),
  367. "mmc%islot%i", c->mmc, 1);
  368. mmc->slots[0].name = twl->name;
  369. mmc->nr_slots = 1;
  370. mmc->slots[0].wires = c->wires;
  371. mmc->slots[0].internal_clock = !c->ext_clock;
  372. mmc->dma_mask = 0xffffffff;
  373. mmc->init = twl_mmc_late_init;
  374. /* note: twl4030 card detect GPIOs can disable VMMCx ... */
  375. if (gpio_is_valid(c->gpio_cd)) {
  376. mmc->cleanup = twl_mmc_cleanup;
  377. mmc->suspend = twl_mmc_suspend;
  378. mmc->resume = twl_mmc_resume;
  379. mmc->slots[0].switch_pin = c->gpio_cd;
  380. mmc->slots[0].card_detect_irq = gpio_to_irq(c->gpio_cd);
  381. if (c->cover_only)
  382. mmc->slots[0].get_cover_state = twl_mmc_get_cover_state;
  383. else
  384. mmc->slots[0].card_detect = twl_mmc_card_detect;
  385. } else
  386. mmc->slots[0].switch_pin = -EINVAL;
  387. mmc->get_context_loss_count =
  388. twl4030_mmc_get_context_loss;
  389. /* write protect normally uses an OMAP gpio */
  390. if (gpio_is_valid(c->gpio_wp)) {
  391. gpio_request(c->gpio_wp, "mmc_wp");
  392. gpio_direction_input(c->gpio_wp);
  393. mmc->slots[0].gpio_wp = c->gpio_wp;
  394. mmc->slots[0].get_ro = twl_mmc_get_ro;
  395. } else
  396. mmc->slots[0].gpio_wp = -EINVAL;
  397. if (c->nonremovable)
  398. mmc->slots[0].nonremovable = 1;
  399. if (c->power_saving)
  400. mmc->slots[0].power_saving = 1;
  401. /* NOTE: MMC slots should have a Vcc regulator set up.
  402. * This may be from a TWL4030-family chip, another
  403. * controllable regulator, or a fixed supply.
  404. *
  405. * temporary HACK: ocr_mask instead of fixed supply
  406. */
  407. mmc->slots[0].ocr_mask = c->ocr_mask;
  408. switch (c->mmc) {
  409. case 1:
  410. /* on-chip level shifting via PBIAS0/PBIAS1 */
  411. mmc->slots[0].set_power = twl_mmc1_set_power;
  412. mmc->slots[0].set_sleep = twl_mmc1_set_sleep;
  413. break;
  414. case 2:
  415. if (c->ext_clock)
  416. c->transceiver = 1;
  417. if (c->transceiver && c->wires > 4)
  418. c->wires = 4;
  419. /* FALLTHROUGH */
  420. case 3:
  421. /* off-chip level shifting, or none */
  422. mmc->slots[0].set_power = twl_mmc23_set_power;
  423. mmc->slots[0].set_sleep = twl_mmc23_set_sleep;
  424. break;
  425. default:
  426. pr_err("MMC%d configuration not supported!\n", c->mmc);
  427. kfree(mmc);
  428. continue;
  429. }
  430. hsmmc_data[c->mmc - 1] = mmc;
  431. }
  432. omap2_init_mmc(hsmmc_data, OMAP34XX_NR_MMC);
  433. /* pass the device nodes back to board setup code */
  434. for (c = controllers; c->mmc; c++) {
  435. struct omap_mmc_platform_data *mmc = hsmmc_data[c->mmc - 1];
  436. if (!c->mmc || c->mmc > nr_hsmmc)
  437. continue;
  438. c->dev = mmc->dev;
  439. }
  440. }
  441. #endif