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/drivers/i2c/soft_i2c.c

https://github.com/zhanggf/u-boot-2010.03-tekkaman
C | 434 lines | 271 code | 43 blank | 120 comment | 21 complexity | 0e20b2dc0c9533416e3853052bb23c30 MD5 | raw file
  1. /*
  2. * (C) Copyright 2001, 2002
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
  24. * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
  25. * Neil Russell.
  26. */
  27. #include <common.h>
  28. #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
  29. #include <ioports.h>
  30. #include <asm/io.h>
  31. #endif
  32. #if defined(CONFIG_AT91RM9200) || \
  33. defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
  34. defined(CONFIG_AT91SAM9263)
  35. #include <asm/io.h>
  36. #include <asm/arch/hardware.h>
  37. #include <asm/arch/at91_pio.h>
  38. #ifdef CONFIG_AT91_LEGACY
  39. #include <asm/arch/gpio.h>
  40. #endif
  41. #endif
  42. #ifdef CONFIG_IXP425 /* only valid for IXP425 */
  43. #include <asm/arch/ixp425.h>
  44. #endif
  45. #ifdef CONFIG_LPC2292
  46. #include <asm/arch/hardware.h>
  47. #endif
  48. #if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866)
  49. #include <asm/io.h>
  50. #endif
  51. #include <i2c.h>
  52. /* #define DEBUG_I2C */
  53. #ifdef DEBUG_I2C
  54. DECLARE_GLOBAL_DATA_PTR;
  55. #endif
  56. /*-----------------------------------------------------------------------
  57. * Definitions
  58. */
  59. #define RETRIES 0
  60. #define I2C_ACK 0 /* PD_SDA level to ack a byte */
  61. #define I2C_NOACK 1 /* PD_SDA level to noack a byte */
  62. #ifdef DEBUG_I2C
  63. #define PRINTD(fmt,args...) do { \
  64. if (gd->have_console) \
  65. printf (fmt ,##args); \
  66. } while (0)
  67. #else
  68. #define PRINTD(fmt,args...)
  69. #endif
  70. #if defined(CONFIG_I2C_MULTI_BUS)
  71. static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0;
  72. #endif /* CONFIG_I2C_MULTI_BUS */
  73. /*-----------------------------------------------------------------------
  74. * Local functions
  75. */
  76. #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
  77. static void send_reset (void);
  78. #endif
  79. static void send_start (void);
  80. static void send_stop (void);
  81. static void send_ack (int);
  82. static int write_byte (uchar byte);
  83. static uchar read_byte (int);
  84. #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
  85. /*-----------------------------------------------------------------------
  86. * Send a reset sequence consisting of 9 clocks with the data signal high
  87. * to clock any confused device back into an idle state. Also send a
  88. * <stop> at the end of the sequence for belts & suspenders.
  89. */
  90. static void send_reset(void)
  91. {
  92. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  93. int j;
  94. I2C_SCL(1);
  95. I2C_SDA(1);
  96. #ifdef I2C_INIT
  97. I2C_INIT;
  98. #endif
  99. I2C_TRISTATE;
  100. for(j = 0; j < 9; j++) {
  101. I2C_SCL(0);
  102. I2C_DELAY;
  103. I2C_DELAY;
  104. I2C_SCL(1);
  105. I2C_DELAY;
  106. I2C_DELAY;
  107. }
  108. send_stop();
  109. I2C_TRISTATE;
  110. }
  111. #endif
  112. /*-----------------------------------------------------------------------
  113. * START: High -> Low on SDA while SCL is High
  114. */
  115. static void send_start(void)
  116. {
  117. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  118. I2C_DELAY;
  119. I2C_SDA(1);
  120. I2C_ACTIVE;
  121. I2C_DELAY;
  122. I2C_SCL(1);
  123. I2C_DELAY;
  124. I2C_SDA(0);
  125. I2C_DELAY;
  126. }
  127. /*-----------------------------------------------------------------------
  128. * STOP: Low -> High on SDA while SCL is High
  129. */
  130. static void send_stop(void)
  131. {
  132. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  133. I2C_SCL(0);
  134. I2C_DELAY;
  135. I2C_SDA(0);
  136. I2C_ACTIVE;
  137. I2C_DELAY;
  138. I2C_SCL(1);
  139. I2C_DELAY;
  140. I2C_SDA(1);
  141. I2C_DELAY;
  142. I2C_TRISTATE;
  143. }
  144. /*-----------------------------------------------------------------------
  145. * ack should be I2C_ACK or I2C_NOACK
  146. */
  147. static void send_ack(int ack)
  148. {
  149. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  150. I2C_SCL(0);
  151. I2C_DELAY;
  152. I2C_ACTIVE;
  153. I2C_SDA(ack);
  154. I2C_DELAY;
  155. I2C_SCL(1);
  156. I2C_DELAY;
  157. I2C_DELAY;
  158. I2C_SCL(0);
  159. I2C_DELAY;
  160. }
  161. /*-----------------------------------------------------------------------
  162. * Send 8 bits and look for an acknowledgement.
  163. */
  164. static int write_byte(uchar data)
  165. {
  166. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  167. int j;
  168. int nack;
  169. I2C_ACTIVE;
  170. for(j = 0; j < 8; j++) {
  171. I2C_SCL(0);
  172. I2C_DELAY;
  173. I2C_SDA(data & 0x80);
  174. I2C_DELAY;
  175. I2C_SCL(1);
  176. I2C_DELAY;
  177. I2C_DELAY;
  178. data <<= 1;
  179. }
  180. /*
  181. * Look for an <ACK>(negative logic) and return it.
  182. */
  183. I2C_SCL(0);
  184. I2C_DELAY;
  185. I2C_SDA(1);
  186. I2C_TRISTATE;
  187. I2C_DELAY;
  188. I2C_SCL(1);
  189. I2C_DELAY;
  190. I2C_DELAY;
  191. nack = I2C_READ;
  192. I2C_SCL(0);
  193. I2C_DELAY;
  194. I2C_ACTIVE;
  195. return(nack); /* not a nack is an ack */
  196. }
  197. #if defined(CONFIG_I2C_MULTI_BUS)
  198. /*
  199. * Functions for multiple I2C bus handling
  200. */
  201. unsigned int i2c_get_bus_num(void)
  202. {
  203. return i2c_bus_num;
  204. }
  205. int i2c_set_bus_num(unsigned int bus)
  206. {
  207. #if defined(CONFIG_I2C_MUX)
  208. if (bus < CONFIG_SYS_MAX_I2C_BUS) {
  209. i2c_bus_num = bus;
  210. } else {
  211. int ret;
  212. ret = i2x_mux_select_mux(bus);
  213. if (ret == 0)
  214. i2c_bus_num = bus;
  215. else
  216. return ret;
  217. }
  218. #else
  219. if (bus >= CONFIG_SYS_MAX_I2C_BUS)
  220. return -1;
  221. i2c_bus_num = bus;
  222. #endif
  223. return 0;
  224. }
  225. #endif
  226. /*-----------------------------------------------------------------------
  227. * if ack == I2C_ACK, ACK the byte so can continue reading, else
  228. * send I2C_NOACK to end the read.
  229. */
  230. static uchar read_byte(int ack)
  231. {
  232. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  233. int data;
  234. int j;
  235. /*
  236. * Read 8 bits, MSB first.
  237. */
  238. I2C_TRISTATE;
  239. I2C_SDA(1);
  240. data = 0;
  241. for(j = 0; j < 8; j++) {
  242. I2C_SCL(0);
  243. I2C_DELAY;
  244. I2C_SCL(1);
  245. I2C_DELAY;
  246. data <<= 1;
  247. data |= I2C_READ;
  248. I2C_DELAY;
  249. }
  250. send_ack(ack);
  251. return(data);
  252. }
  253. /*=====================================================================*/
  254. /* Public Functions */
  255. /*=====================================================================*/
  256. /*-----------------------------------------------------------------------
  257. * Initialization
  258. */
  259. void i2c_init (int speed, int slaveaddr)
  260. {
  261. #if defined(CONFIG_SYS_I2C_INIT_BOARD)
  262. /* call board specific i2c bus reset routine before accessing the */
  263. /* environment, which might be in a chip on that bus. For details */
  264. /* about this problem see doc/I2C_Edge_Conditions. */
  265. i2c_init_board();
  266. #else
  267. /*
  268. * WARNING: Do NOT save speed in a static variable: if the
  269. * I2C routines are called before RAM is initialized (to read
  270. * the DIMM SPD, for instance), RAM won't be usable and your
  271. * system will crash.
  272. */
  273. send_reset ();
  274. #endif
  275. }
  276. /*-----------------------------------------------------------------------
  277. * Probe to see if a chip is present. Also good for checking for the
  278. * completion of EEPROM writes since the chip stops responding until
  279. * the write completes (typically 10mSec).
  280. */
  281. int i2c_probe(uchar addr)
  282. {
  283. int rc;
  284. /*
  285. * perform 1 byte write transaction with just address byte
  286. * (fake write)
  287. */
  288. send_start();
  289. rc = write_byte ((addr << 1) | 0);
  290. send_stop();
  291. return (rc ? 1 : 0);
  292. }
  293. /*-----------------------------------------------------------------------
  294. * Read bytes
  295. */
  296. int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
  297. {
  298. int shift;
  299. PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
  300. chip, addr, alen, buffer, len);
  301. #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
  302. /*
  303. * EEPROM chips that implement "address overflow" are ones
  304. * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
  305. * address and the extra bits end up in the "chip address"
  306. * bit slots. This makes a 24WC08 (1Kbyte) chip look like
  307. * four 256 byte chips.
  308. *
  309. * Note that we consider the length of the address field to
  310. * still be one byte because the extra address bits are
  311. * hidden in the chip address.
  312. */
  313. chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
  314. PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
  315. chip, addr);
  316. #endif
  317. /*
  318. * Do the addressing portion of a write cycle to set the
  319. * chip's address pointer. If the address length is zero,
  320. * don't do the normal write cycle to set the address pointer,
  321. * there is no address pointer in this chip.
  322. */
  323. send_start();
  324. if(alen > 0) {
  325. if(write_byte(chip << 1)) { /* write cycle */
  326. send_stop();
  327. PRINTD("i2c_read, no chip responded %02X\n", chip);
  328. return(1);
  329. }
  330. shift = (alen-1) * 8;
  331. while(alen-- > 0) {
  332. if(write_byte(addr >> shift)) {
  333. PRINTD("i2c_read, address not <ACK>ed\n");
  334. return(1);
  335. }
  336. shift -= 8;
  337. }
  338. /* Some I2C chips need a stop/start sequence here,
  339. * other chips don't work with a full stop and need
  340. * only a start. Default behaviour is to send the
  341. * stop/start sequence.
  342. */
  343. #ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
  344. send_start();
  345. #else
  346. send_stop();
  347. send_start();
  348. #endif
  349. }
  350. /*
  351. * Send the chip address again, this time for a read cycle.
  352. * Then read the data. On the last byte, we do a NACK instead
  353. * of an ACK(len == 0) to terminate the read.
  354. */
  355. write_byte((chip << 1) | 1); /* read cycle */
  356. while(len-- > 0) {
  357. *buffer++ = read_byte(len == 0);
  358. }
  359. send_stop();
  360. return(0);
  361. }
  362. /*-----------------------------------------------------------------------
  363. * Write bytes
  364. */
  365. int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
  366. {
  367. int shift, failures = 0;
  368. PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
  369. chip, addr, alen, buffer, len);
  370. send_start();
  371. if(write_byte(chip << 1)) { /* write cycle */
  372. send_stop();
  373. PRINTD("i2c_write, no chip responded %02X\n", chip);
  374. return(1);
  375. }
  376. shift = (alen-1) * 8;
  377. while(alen-- > 0) {
  378. if(write_byte(addr >> shift)) {
  379. PRINTD("i2c_write, address not <ACK>ed\n");
  380. return(1);
  381. }
  382. shift -= 8;
  383. }
  384. while(len-- > 0) {
  385. if(write_byte(*buffer++)) {
  386. failures++;
  387. }
  388. }
  389. send_stop();
  390. return(failures);
  391. }