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/drivers/i2c/soft_i2c.c

https://github.com/lilstevie/uboot-tegra
C | 484 lines | 311 code | 53 blank | 120 comment | 25 complexity | 653f999b5781be204c84f888f24337fb MD5 | raw file
  1/*
  2 * (C) Copyright 2001, 2002
  3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4 *
  5 * See file CREDITS for list of people who contributed to this
  6 * project.
  7 *
  8 * This program is free software; you can redistribute it and/or
  9 * modify it under the terms of the GNU General Public License as
 10 * published by the Free Software Foundation; either version 2 of
 11 * the License, or (at your option) any later version.
 12 *
 13 * This program is distributed in the hope that it will be useful,
 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 16 * GNU General Public License for more details.
 17 *
 18 * You should have received a copy of the GNU General Public License
 19 * along with this program; if not, write to the Free Software
 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 21 * MA 02111-1307 USA
 22 *
 23 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
 24 * vanbaren@cideas.com.  It was heavily influenced by LiMon, written by
 25 * Neil Russell.
 26 */
 27
 28#include <common.h>
 29#ifdef	CONFIG_MPC8260			/* only valid for MPC8260 */
 30#include <ioports.h>
 31#include <asm/io.h>
 32#endif
 33#if defined(CONFIG_AT91FAMILY)
 34#include <asm/io.h>
 35#include <asm/arch/hardware.h>
 36#include <asm/arch/at91_pio.h>
 37#ifdef CONFIG_AT91_LEGACY
 38#include <asm/arch/gpio.h>
 39#endif
 40#endif
 41#ifdef	CONFIG_IXP425			/* only valid for IXP425 */
 42#include <asm/arch/ixp425.h>
 43#endif
 44#ifdef CONFIG_LPC2292
 45#include <asm/arch/hardware.h>
 46#endif
 47#if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866)
 48#include <asm/io.h>
 49#endif
 50#include <i2c.h>
 51
 52#if defined(CONFIG_SOFT_I2C_GPIO_SCL)
 53# include <asm/gpio.h>
 54
 55# ifndef I2C_GPIO_SYNC
 56#  define I2C_GPIO_SYNC
 57# endif
 58
 59# ifndef I2C_INIT
 60#  define I2C_INIT \
 61	do { \
 62		gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \
 63		gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \
 64	} while (0)
 65# endif
 66
 67# ifndef I2C_ACTIVE
 68#  define I2C_ACTIVE do { } while (0)
 69# endif
 70
 71# ifndef I2C_TRISTATE
 72#  define I2C_TRISTATE do { } while (0)
 73# endif
 74
 75# ifndef I2C_READ
 76#  define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA)
 77# endif
 78
 79# ifndef I2C_SDA
 80#  define I2C_SDA(bit) \
 81	do { \
 82		if (bit) \
 83			gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
 84		else \
 85			gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \
 86		I2C_GPIO_SYNC; \
 87	} while (0)
 88# endif
 89
 90# ifndef I2C_SCL
 91#  define I2C_SCL(bit) \
 92	do { \
 93		gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \
 94		I2C_GPIO_SYNC; \
 95	} while (0)
 96# endif
 97
 98# ifndef I2C_DELAY
 99#  define I2C_DELAY udelay(5)	/* 1/4 I2C clock duration */
100# endif
101
102#endif
103
104/* #define	DEBUG_I2C	*/
105
106#ifdef DEBUG_I2C
107DECLARE_GLOBAL_DATA_PTR;
108#endif
109
110/*-----------------------------------------------------------------------
111 * Definitions
112 */
113
114#define RETRIES		0
115
116#define I2C_ACK		0		/* PD_SDA level to ack a byte */
117#define I2C_NOACK	1		/* PD_SDA level to noack a byte */
118
119
120#ifdef DEBUG_I2C
121#define PRINTD(fmt,args...)	do {	\
122	if (gd->have_console)		\
123		printf (fmt ,##args);	\
124	} while (0)
125#else
126#define PRINTD(fmt,args...)
127#endif
128
129#if defined(CONFIG_I2C_MULTI_BUS)
130static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0;
131#endif /* CONFIG_I2C_MULTI_BUS */
132
133/*-----------------------------------------------------------------------
134 * Local functions
135 */
136#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
137static void  send_reset	(void);
138#endif
139static void  send_start	(void);
140static void  send_stop	(void);
141static void  send_ack	(int);
142static int   write_byte	(uchar byte);
143static uchar read_byte	(int);
144
145#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
146/*-----------------------------------------------------------------------
147 * Send a reset sequence consisting of 9 clocks with the data signal high
148 * to clock any confused device back into an idle state.  Also send a
149 * <stop> at the end of the sequence for belts & suspenders.
150 */
151static void send_reset(void)
152{
153	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
154	int j;
155
156	I2C_SCL(1);
157	I2C_SDA(1);
158#ifdef	I2C_INIT
159	I2C_INIT;
160#endif
161	I2C_TRISTATE;
162	for(j = 0; j < 9; j++) {
163		I2C_SCL(0);
164		I2C_DELAY;
165		I2C_DELAY;
166		I2C_SCL(1);
167		I2C_DELAY;
168		I2C_DELAY;
169	}
170	send_stop();
171	I2C_TRISTATE;
172}
173#endif
174
175/*-----------------------------------------------------------------------
176 * START: High -> Low on SDA while SCL is High
177 */
178static void send_start(void)
179{
180	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
181
182	I2C_DELAY;
183	I2C_SDA(1);
184	I2C_ACTIVE;
185	I2C_DELAY;
186	I2C_SCL(1);
187	I2C_DELAY;
188	I2C_SDA(0);
189	I2C_DELAY;
190}
191
192/*-----------------------------------------------------------------------
193 * STOP: Low -> High on SDA while SCL is High
194 */
195static void send_stop(void)
196{
197	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
198
199	I2C_SCL(0);
200	I2C_DELAY;
201	I2C_SDA(0);
202	I2C_ACTIVE;
203	I2C_DELAY;
204	I2C_SCL(1);
205	I2C_DELAY;
206	I2C_SDA(1);
207	I2C_DELAY;
208	I2C_TRISTATE;
209}
210
211/*-----------------------------------------------------------------------
212 * ack should be I2C_ACK or I2C_NOACK
213 */
214static void send_ack(int ack)
215{
216	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
217
218	I2C_SCL(0);
219	I2C_DELAY;
220	I2C_ACTIVE;
221	I2C_SDA(ack);
222	I2C_DELAY;
223	I2C_SCL(1);
224	I2C_DELAY;
225	I2C_DELAY;
226	I2C_SCL(0);
227	I2C_DELAY;
228}
229
230/*-----------------------------------------------------------------------
231 * Send 8 bits and look for an acknowledgement.
232 */
233static int write_byte(uchar data)
234{
235	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
236	int j;
237	int nack;
238
239	I2C_ACTIVE;
240	for(j = 0; j < 8; j++) {
241		I2C_SCL(0);
242		I2C_DELAY;
243		I2C_SDA(data & 0x80);
244		I2C_DELAY;
245		I2C_SCL(1);
246		I2C_DELAY;
247		I2C_DELAY;
248
249		data <<= 1;
250	}
251
252	/*
253	 * Look for an <ACK>(negative logic) and return it.
254	 */
255	I2C_SCL(0);
256	I2C_DELAY;
257	I2C_SDA(1);
258	I2C_TRISTATE;
259	I2C_DELAY;
260	I2C_SCL(1);
261	I2C_DELAY;
262	I2C_DELAY;
263	nack = I2C_READ;
264	I2C_SCL(0);
265	I2C_DELAY;
266	I2C_ACTIVE;
267
268	return(nack);	/* not a nack is an ack */
269}
270
271#if defined(CONFIG_I2C_MULTI_BUS)
272/*
273 * Functions for multiple I2C bus handling
274 */
275unsigned int i2c_get_bus_num(void)
276{
277	return i2c_bus_num;
278}
279
280int i2c_set_bus_num(unsigned int bus)
281{
282#if defined(CONFIG_I2C_MUX)
283	if (bus < CONFIG_SYS_MAX_I2C_BUS) {
284		i2c_bus_num = bus;
285	} else {
286		int	ret;
287
288		ret = i2x_mux_select_mux(bus);
289		if (ret == 0)
290			i2c_bus_num = bus;
291		else
292			return ret;
293	}
294#else
295	if (bus >= CONFIG_SYS_MAX_I2C_BUS)
296		return -1;
297	i2c_bus_num = bus;
298#endif
299	return 0;
300}
301#endif
302
303/*-----------------------------------------------------------------------
304 * if ack == I2C_ACK, ACK the byte so can continue reading, else
305 * send I2C_NOACK to end the read.
306 */
307static uchar read_byte(int ack)
308{
309	I2C_SOFT_DECLARATIONS	/* intentional without ';' */
310	int  data;
311	int  j;
312
313	/*
314	 * Read 8 bits, MSB first.
315	 */
316	I2C_TRISTATE;
317	I2C_SDA(1);
318	data = 0;
319	for(j = 0; j < 8; j++) {
320		I2C_SCL(0);
321		I2C_DELAY;
322		I2C_SCL(1);
323		I2C_DELAY;
324		data <<= 1;
325		data |= I2C_READ;
326		I2C_DELAY;
327	}
328	send_ack(ack);
329
330	return(data);
331}
332
333/*=====================================================================*/
334/*                         Public Functions                            */
335/*=====================================================================*/
336
337/*-----------------------------------------------------------------------
338 * Initialization
339 */
340void i2c_init (int speed, int slaveaddr)
341{
342#if defined(CONFIG_SYS_I2C_INIT_BOARD)
343	/* call board specific i2c bus reset routine before accessing the   */
344	/* environment, which might be in a chip on that bus. For details   */
345	/* about this problem see doc/I2C_Edge_Conditions.                  */
346	i2c_init_board();
347#else
348	/*
349	 * WARNING: Do NOT save speed in a static variable: if the
350	 * I2C routines are called before RAM is initialized (to read
351	 * the DIMM SPD, for instance), RAM won't be usable and your
352	 * system will crash.
353	 */
354	send_reset ();
355#endif
356}
357
358/*-----------------------------------------------------------------------
359 * Probe to see if a chip is present.  Also good for checking for the
360 * completion of EEPROM writes since the chip stops responding until
361 * the write completes (typically 10mSec).
362 */
363int i2c_probe(uchar addr)
364{
365	int rc;
366
367	/*
368	 * perform 1 byte write transaction with just address byte
369	 * (fake write)
370	 */
371	send_start();
372	rc = write_byte ((addr << 1) | 0);
373	send_stop();
374
375	return (rc ? 1 : 0);
376}
377
378/*-----------------------------------------------------------------------
379 * Read bytes
380 */
381int  i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
382{
383	int shift;
384	PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
385		chip, addr, alen, buffer, len);
386
387#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
388	/*
389	 * EEPROM chips that implement "address overflow" are ones
390	 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
391	 * address and the extra bits end up in the "chip address"
392	 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
393	 * four 256 byte chips.
394	 *
395	 * Note that we consider the length of the address field to
396	 * still be one byte because the extra address bits are
397	 * hidden in the chip address.
398	 */
399	chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
400
401	PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
402		chip, addr);
403#endif
404
405	/*
406	 * Do the addressing portion of a write cycle to set the
407	 * chip's address pointer.  If the address length is zero,
408	 * don't do the normal write cycle to set the address pointer,
409	 * there is no address pointer in this chip.
410	 */
411	send_start();
412	if(alen > 0) {
413		if(write_byte(chip << 1)) {	/* write cycle */
414			send_stop();
415			PRINTD("i2c_read, no chip responded %02X\n", chip);
416			return(1);
417		}
418		shift = (alen-1) * 8;
419		while(alen-- > 0) {
420			if(write_byte(addr >> shift)) {
421				PRINTD("i2c_read, address not <ACK>ed\n");
422				return(1);
423			}
424			shift -= 8;
425		}
426
427		/* Some I2C chips need a stop/start sequence here,
428		 * other chips don't work with a full stop and need
429		 * only a start.  Default behaviour is to send the
430		 * stop/start sequence.
431		 */
432#ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
433		send_start();
434#else
435		send_stop();
436		send_start();
437#endif
438	}
439	/*
440	 * Send the chip address again, this time for a read cycle.
441	 * Then read the data.  On the last byte, we do a NACK instead
442	 * of an ACK(len == 0) to terminate the read.
443	 */
444	write_byte((chip << 1) | 1);	/* read cycle */
445	while(len-- > 0) {
446		*buffer++ = read_byte(len == 0);
447	}
448	send_stop();
449	return(0);
450}
451
452/*-----------------------------------------------------------------------
453 * Write bytes
454 */
455int  i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
456{
457	int shift, failures = 0;
458
459	PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
460		chip, addr, alen, buffer, len);
461
462	send_start();
463	if(write_byte(chip << 1)) {	/* write cycle */
464		send_stop();
465		PRINTD("i2c_write, no chip responded %02X\n", chip);
466		return(1);
467	}
468	shift = (alen-1) * 8;
469	while(alen-- > 0) {
470		if(write_byte(addr >> shift)) {
471			PRINTD("i2c_write, address not <ACK>ed\n");
472			return(1);
473		}
474		shift -= 8;
475	}
476
477	while(len-- > 0) {
478		if(write_byte(*buffer++)) {
479			failures++;
480		}
481	}
482	send_stop();
483	return(failures);
484}