/media/libjpeg/simd/jsimdcpu.asm

http://github.com/zpao/v8monkey · Assembly · 105 lines · 56 code · 15 blank · 34 comment · 0 complexity · 81b82ffcfcc55fecba9c4d5dfa85b42a MD5 · raw file 

    

  1. ;
    2. 

  2. ; jsimdcpu.asm - SIMD instruction support check
    3. 

  3. ;
    4. 

  4. ; Copyright 2009 Pierre Ossman <ossman@cendio.se> for Cendio AB
    5. 

  5. ;
    6. 

  6. ; Based on
    7. 

  7. ; x86 SIMD extension for IJG JPEG library
    8. 

  8. ; Copyright (C) 1999-2006, MIYASAKA Masaru.
    9. 

  9. ; For conditions of distribution and use, see copyright notice in jsimdext.inc
    10. 

  10. ;
    11. 

  11. ; This file should be assembled with NASM (Netwide Assembler),
    12. 

  12. ; can *not* be assembled with Microsoft's MASM or any compatible
    13. 

  13. ; assembler (including Borland's Turbo Assembler).
    14. 

  14. ; NASM is available from http://nasm.sourceforge.net/ or
    15. 

  15. ; http://sourceforge.net/project/showfiles.php?group_id=6208
    16. 

  16. ;
    17. 

  17. ; [TAB8]
    18. 

  18. 

  19. %include "jsimdext.inc"
    20. 

  20. 

  21. ; --------------------------------------------------------------------------
    22. 

  22. 	SECTION	SEG_TEXT
    23. 

  23. 	BITS	32
    24. 

  24. ;
    25. 

  25. ; Check if the CPU supports SIMD instructions
    26. 

  26. ;
    27. 

  27. ; GLOBAL(unsigned int)
    28. 

  28. ; jpeg_simd_cpu_support (void)
    29. 

  29. ;
    30. 

  30. 

  31. 	align	16
    32. 

  32. 	global	EXTN(jpeg_simd_cpu_support)
    33. 

  33. 

  34. EXTN(jpeg_simd_cpu_support):
    35. 

  35. 	push	ebx
    36. 

  36. ;	push	ecx		; need not be preserved
    37. 

  37. ;	push	edx		; need not be preserved
    38. 

  38. ;	push	esi		; unused
    39. 

  39. 	push	edi
    40. 

  40. 

  41. 	xor	edi,edi			; simd support flag
    42. 

  42. 

  43. 	pushfd
    44. 

  44. 	pop	eax
    45. 

  45. 	mov	edx,eax
    46. 

  46. 	xor	eax, 1<<21		; flip ID bit in EFLAGS
    47. 

  47. 	push	eax
    48. 

  48. 	popfd
    49. 

  49. 	pushfd
    50. 

  50. 	pop	eax
    51. 

  51. 	xor	eax,edx
    52. 

  52. 	jz	short .return		; CPUID is not supported
    53. 

  53. 

  54. 	; Check for MMX instruction support
    55. 

  55. 	xor	eax,eax
    56. 

  56. 	cpuid
    57. 

  57. 	test	eax,eax
    58. 

  58. 	jz	short .return
    59. 

  59. 

  60. 	xor	eax,eax
    61. 

  61. 	inc	eax
    62. 

  62. 	cpuid
    63. 

  63. 	mov	eax,edx			; eax = Standard feature flags
    64. 

  64. 

  65. 	test	eax, 1<<23		; bit23:MMX
    66. 

  66. 	jz	short .no_mmx
    67. 

  67. 	or	edi, byte JSIMD_MMX
    68. 

  68. .no_mmx:
    69. 

  69. 	test	eax, 1<<25		; bit25:SSE
    70. 

  70. 	jz	short .no_sse
    71. 

  71. 	or	edi, byte JSIMD_SSE
    72. 

  72. .no_sse:
    73. 

  73. 	test	eax, 1<<26		; bit26:SSE2
    74. 

  74. 	jz	short .no_sse2
    75. 

  75. 	or	edi, byte JSIMD_SSE2
    76. 

  76. .no_sse2:
    77. 

  77. 

  78. 	; Check for 3DNow! instruction support
    79. 

  79. 	mov	eax, 0x80000000
    80. 

  80. 	cpuid
    81. 

  81. 	cmp	eax, 0x80000000
    82. 

  82. 	jbe	short .return
    83. 

  83. 

  84. 	mov	eax, 0x80000001
    85. 

  85. 	cpuid
    86. 

  86. 	mov	eax,edx			; eax = Extended feature flags
    87. 

  87. 

  88. 	test	eax, 1<<31		; bit31:3DNow!(vendor independent)
    89. 

  89. 	jz	short .no_3dnow
    90. 

  90. 	or	edi, byte JSIMD_3DNOW
    91. 

  91. .no_3dnow:
    92. 

  92. 

  93. .return:
    94. 

  94. 	mov	eax,edi
    95. 

  95. 

  96. 	pop	edi
    97. 

  97. ;	pop	esi		; unused
    98. 

  98. ;	pop	edx		; need not be preserved
    99. 

  99. ;	pop	ecx		; need not be preserved
    100. 

  100. 	pop	ebx
    101. 

  101. 	ret
    102. 

  102. 

  103. ; For some reason, the OS X linker does not honor the request to align the
    104. 

  104. ; segment unless we do this.
    105. 

  105. 	align	16
    106.