PageRenderTime 24ms CodeModel.GetById 3ms RepoModel.GetById 0ms app.codeStats 0ms

/src/UKNCBTL.Qt/emubase/Board.h

http://ukncbtl.googlecode.com/
C Header | 275 lines | 194 code | 42 blank | 39 comment | 5 complexity | f24b6b0256a6040b1883cffbf71d7a4c MD5 | raw file
Possible License(s): LGPL-3.0
  1. /* This file is part of UKNCBTL.
  2. UKNCBTL is free software: you can redistribute it and/or modify it under the terms
  3. of the GNU Lesser General Public License as published by the Free Software Foundation,
  4. either version 3 of the License, or (at your option) any later version.
  5. UKNCBTL is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
  6. without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  7. See the GNU Lesser General Public License for more details.
  8. You should have received a copy of the GNU Lesser General Public License along with
  9. UKNCBTL. If not, see <http://www.gnu.org/licenses/>. */
  10. // Board.h
  11. //
  12. #pragma once
  13. #include "Defines.h"
  14. class CProcessor;
  15. class CMemoryController;
  16. // Floppy debug constants
  17. #define FLOPPY_FSM_WAITFORLSB 0
  18. #define FLOPPY_FSM_WAITFORMSB 1
  19. #define FLOPPY_FSM_WAITFORTERM1 2
  20. #define FLOPPY_FSM_WAITFORTERM2 3
  21. // Emulator image constants
  22. #define UKNCIMAGE_HEADER_SIZE 512
  23. #define UKNCIMAGE_SIZE (UKNCIMAGE_HEADER_SIZE + (32 + 64 * 3) * 1024)
  24. #define UKNCIMAGE_HEADER1 0x434E4B55 // "UKNC"
  25. #define UKNCIMAGE_HEADER2 0x214C5442 // "BTL!"
  26. #define UKNCIMAGE_VERSION 0x00010001 // 1.1
  27. #define KEYB_RUS 0x01
  28. #define KEYB_LAT 0x02
  29. #define KEYB_LOWERREG 0x10
  30. typedef struct chan_tag
  31. {
  32. BYTE data;
  33. BYTE ready;
  34. BYTE irq;
  35. BYTE rdwr;
  36. } chan_stc;
  37. typedef struct kbd_row_tag
  38. {
  39. BYTE processed;
  40. BYTE row_Y;
  41. } kbd_row;
  42. // Tape emulator callback used to read a tape recorded data.
  43. // Input:
  44. // samples Number of samples to play.
  45. // Output:
  46. // result Bit to put in tape input port.
  47. typedef BOOL (CALLBACK* TAPEREADCALLBACK)(unsigned int samples);
  48. // Tape emulator callback used to write a data to tape.
  49. // Input:
  50. // value Sample value to write.
  51. typedef void (CALLBACK* TAPEWRITECALLBACK)(int value, unsigned int samples);
  52. // Sound generator callback function type
  53. typedef void (CALLBACK* SOUNDGENCALLBACK)(unsigned short L, unsigned short R);
  54. // Serial port callback for receiving
  55. // Output:
  56. // pbyte Byte received
  57. // result TRUE means we have a new byte, FALSE means not ready yet
  58. typedef BOOL (CALLBACK* SERIALINCALLBACK)(BYTE* pbyte);
  59. // Serial port callback for translating
  60. // Input:
  61. // byte A byte to translate
  62. // Output:
  63. // result TRUE means we translated the byte successfully, FALSE means we have an error
  64. typedef BOOL (CALLBACK* SERIALOUTCALLBACK)(BYTE byte);
  65. // Parallel port output callback
  66. // Input:
  67. // byte An output byte
  68. // Output:
  69. // result TRUE means OK, FALSE means we have an error
  70. typedef BOOL (CALLBACK* PARALLELOUTCALLBACK)(BYTE byte);
  71. class CFloppyController;
  72. class CHardDrive;
  73. //////////////////////////////////////////////////////////////////////
  74. class CMotherboard // UKNC computer
  75. {
  76. public: // Construct / destruct
  77. CMotherboard();
  78. ~CMotherboard();
  79. protected: // Devices
  80. CProcessor* m_pCPU; // CPU device
  81. CProcessor* m_pPPU; // PPU device
  82. CMemoryController* m_pFirstMemCtl; // CPU memory control
  83. CMemoryController* m_pSecondMemCtl; // PPU memory control
  84. CFloppyController* m_pFloppyCtl; // FDD control
  85. CHardDrive* m_pHardDrives[2]; // HDD control
  86. public: // Getting devices
  87. CProcessor* GetCPU() { return m_pCPU; }
  88. CProcessor* GetPPU() { return m_pPPU; }
  89. CMemoryController* GetCPUMemoryController() { return m_pFirstMemCtl; }
  90. CMemoryController* GetPPUMemoryController() { return m_pSecondMemCtl; }
  91. protected: // Memory
  92. BYTE* m_pRAM[3]; // RAM, three planes, 64 KB each
  93. BYTE* m_pROM; // System ROM, 32 KB
  94. BYTE* m_pROMCart[2]; // ROM cartridges #1 and #2, 24 KB each
  95. public: // Memory access
  96. WORD GetRAMWord(int plan, WORD offset);
  97. BYTE GetRAMByte(int plan, WORD offset);
  98. void SetRAMWord(int plan, WORD offset, WORD word);
  99. void SetRAMByte(int plan, WORD offset, BYTE byte);
  100. WORD GetROMWord(WORD offset);
  101. BYTE GetROMByte(WORD offset);
  102. WORD GetROMCartWord(int cartno, WORD offset);
  103. BYTE GetROMCartByte(int cartno, WORD offset);
  104. public: // Debug
  105. void DebugTicks(); // One Debug PPU tick -- use for debug step or debug breakpoint
  106. void SetCPUBreakpoint(WORD bp) { m_CPUbp = bp; } // Set CPU breakpoint
  107. void SetPPUBreakpoint(WORD bp) { m_PPUbp = bp; } // Set PPU breakpoint
  108. chan_stc GetChannelStruct(unsigned char cpu,unsigned char chan, unsigned char tx)
  109. {//cpu==1 ,ppu==0; tx==1, rx==0
  110. if(cpu)
  111. {
  112. if(tx)
  113. return m_chancputx[chan];
  114. else
  115. return m_chancpurx[chan];
  116. }
  117. else
  118. {
  119. if(tx)
  120. return m_chanpputx[chan];
  121. else
  122. return m_chanppurx[chan];
  123. }
  124. }
  125. public: // System control
  126. void Reset(); // Reset computer
  127. void LoadROM(const BYTE* pBuffer); // Load 32 KB ROM image from the biffer
  128. void LoadROMCartridge(int cartno, const BYTE* pBuffer); // Load 24 KB ROM cartridge image
  129. void LoadRAM(int plan, const BYTE* pBuffer); // Load 32 KB RAM image from the biffer
  130. void Tick8000(); // Tick 8.00 MHz
  131. void Tick6250(); // Tick 6.25 MHz
  132. void Tick50(); // Tick 50 Hz - goes to CPU/PPU EVNT line
  133. void TimerTick(); // Timer Tick, 2uS -- dividers are within timer routine
  134. void ResetFloppy(); // INIT signal for FDD
  135. WORD GetTimerValue(); // returns current timer value
  136. WORD GetTimerValueView() { return m_timer; } // Returns current timer value for debugger
  137. WORD GetTimerReload(); // returns timer reload value
  138. WORD GetTimerReloadView() { return m_timerreload; } // Returns timer reload value for debugger
  139. WORD GetTimerState(); // returns timer state
  140. WORD GetTimerStateView() { return m_timerflags; } // Returns timer state for debugger
  141. void ChanWriteByCPU(BYTE chan, BYTE data);
  142. void ChanWriteByPPU(BYTE chan, BYTE data);
  143. BYTE ChanReadByCPU(BYTE chan);
  144. BYTE ChanReadByPPU(BYTE chan);
  145. BYTE ChanRxStateGetCPU(BYTE chan);
  146. BYTE ChanTxStateGetCPU(BYTE chan);
  147. BYTE ChanRxStateGetPPU();
  148. BYTE ChanTxStateGetPPU();
  149. void ChanRxStateSetCPU(BYTE chan, BYTE state);
  150. void ChanTxStateSetCPU(BYTE chan, BYTE state);
  151. void ChanRxStateSetPPU(BYTE state);
  152. void ChanTxStateSetPPU(BYTE state);
  153. void ChanResetByCPU();
  154. void ChanResetByPPU();
  155. //void FloppyDebug(BYTE val);
  156. void SetTimerReload(WORD val); //sets timer reload value
  157. void SetTimerState(WORD val); //sets timer state
  158. void ExecuteCPU(); // Execute one CPU instruction
  159. void ExecutePPU(); // Execute one PPU instruction
  160. BOOL SystemFrame(); // Do one frame -- use for normal run
  161. void KeyboardEvent(BYTE scancode, BOOL okPressed); // Key pressed or released
  162. WORD GetKeyboardRegister(void);
  163. WORD GetScannedKey() {return m_scanned_key; }
  164. BOOL AttachFloppyImage(int slot, LPCTSTR sFileName);
  165. void DetachFloppyImage(int slot);
  166. BOOL IsFloppyImageAttached(int slot) const;
  167. BOOL IsFloppyReadOnly(int slot) const;
  168. BOOL IsFloppyEngineOn() const;
  169. WORD GetFloppyState();
  170. WORD GetFloppyData();
  171. void SetFloppyState(WORD val);
  172. void SetFloppyData(WORD val);
  173. BOOL IsROMCartridgeLoaded(int cartno) const;
  174. void UnloadROMCartridge(int cartno);
  175. BOOL AttachHardImage(int slot, LPCTSTR sFileName);
  176. void DetachHardImage(int slot);
  177. BOOL IsHardImageAttached(int slot) const;
  178. BOOL IsHardImageReadOnly(int slot) const;
  179. WORD GetHardPortWord(int slot, WORD port); // To use from CSecondMemoryController only
  180. void SetHardPortWord(int slot, WORD port, WORD data); // To use from CSecondMemoryController only
  181. void SetTapeReadCallback(TAPEREADCALLBACK callback, int sampleRate);
  182. void SetTapeWriteCallback(TAPEWRITECALLBACK callback, int sampleRate);
  183. void SetSoundGenCallback(SOUNDGENCALLBACK callback);
  184. void SetSerialCallbacks(SERIALINCALLBACK incallback, SERIALOUTCALLBACK outcallback);
  185. void SetParallelOutCallback(PARALLELOUTCALLBACK outcallback);
  186. public: // Saving/loading emulator status
  187. void SaveToImage(BYTE* pImage);
  188. void LoadFromImage(const BYTE* pImage);
  189. void SetSound(WORD val);
  190. private: // Timing
  191. WORD m_multiply;
  192. WORD freq_per[6];
  193. WORD freq_out[6];
  194. WORD freq_enable[6];
  195. int m_pputicks;
  196. int m_cputicks;
  197. unsigned int m_lineticks;
  198. private:
  199. WORD m_CPUbp;
  200. WORD m_PPUbp;
  201. WORD m_timer;
  202. WORD m_timerreload;
  203. WORD m_timerflags;
  204. WORD m_timerdivider;
  205. chan_stc m_chancputx[3];
  206. chan_stc m_chancpurx[2];
  207. chan_stc m_chanpputx[2];
  208. chan_stc m_chanppurx[3];
  209. BYTE m_chan0disabled;
  210. BYTE m_irq_cpureset;
  211. BYTE m_scanned_key;
  212. kbd_row m_kbd_matrix[16];
  213. private:
  214. TAPEREADCALLBACK m_TapeReadCallback;
  215. TAPEWRITECALLBACK m_TapeWriteCallback;
  216. int m_nTapeSampleRate;
  217. SOUNDGENCALLBACK m_SoundGenCallback;
  218. SERIALINCALLBACK m_SerialInCallback;
  219. SERIALOUTCALLBACK m_SerialOutCallback;
  220. PARALLELOUTCALLBACK m_ParallelOutCallback;
  221. void DoSound(void);
  222. };
  223. inline WORD CMotherboard::GetRAMWord(int plan, WORD offset)
  224. {
  225. ASSERT(plan >= 0 && plan <= 2);
  226. return *((WORD*)(m_pRAM[plan] + (offset & 0xFFFE)));
  227. }
  228. inline BYTE CMotherboard::GetRAMByte(int plan, WORD offset)
  229. {
  230. ASSERT(plan >= 0 && plan <= 2);
  231. return m_pRAM[plan][offset];
  232. }
  233. //////////////////////////////////////////////////////////////////////