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/libs/network/wiznet/W5500/w5500.h

https://github.com/shehperd/Espruino
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  1. //*****************************************************************************

    2. 

  2. //

    3. 

  3. //! \file w5500.h

    4. 

  4. //! \brief W5500 HAL Header File.

    5. 

  5. //! \version 1.0.0

    6. 

  6. //! \date 2013/10/21

    7. 

  7. //! \par  Revision history

    8. 

  8. //!       <2013/10/21> 1st Release

    9. 

  9. //! \author MidnightCow

    10. 

  10. //! \copyright

    11. 

  11. //!

    12. 

  12. //! Copyright (c)  2013, WIZnet Co., LTD.

    13. 

  13. //! All rights reserved.

    14. 

  14. //! 

    15. 

  15. //! Redistribution and use in source and binary forms, with or without 

    16. 

  16. //! modification, are permitted provided that the following conditions 

    17. 

  17. //! are met: 

    18. 

  18. //! 

    19. 

  19. //!     * Redistributions of source code must retain the above copyright 

    20. 

  20. //! notice, this list of conditions and the following disclaimer. 

    21. 

  21. //!     * Redistributions in binary form must reproduce the above copyright

    22. 

  22. //! notice, this list of conditions and the following disclaimer in the

    23. 

  23. //! documentation and/or other materials provided with the distribution. 

    24. 

  24. //!     * Neither the name of the <ORGANIZATION> nor the names of its 

    25. 

  25. //! contributors may be used to endorse or promote products derived 

    26. 

  26. //! from this software without specific prior written permission. 

    27. 

  27. //! 

    28. 

  28. //! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"

    29. 

  29. //! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 

    30. 

  30. //! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE

    31. 

  31. //! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 

    32. 

  32. //! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 

    33. 

  33. //! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 

    34. 

  34. //! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS

    35. 

  35. //! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 

    36. 

  36. //! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 

    37. 

  37. //! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 

    38. 

  38. //! THE POSSIBILITY OF SUCH DAMAGE.

    39. 

  39. //

    40. 

  40. //*****************************************************************************

    41. 

  41. 

    42. 

  42. #ifndef  _W5500_H_

    43. 

  43. #define  _W5500_H_

    44. 

  44. 

    45. 

  45. #include <stdint.h>

    46. 

  46. #include "Ethernet/wizchip_conf.h"

    47. 

  47. 

    48. 

  48. #define _W5500_IO_BASE_              0x00000000

    49. 

  49. 

    50. 

  50. #define _W5500_SPI_READ_			   (0x00 << 2) //< SPI interface Read operation in Control Phase

    51. 

  51. #define _W5500_SPI_WRITE_			   (0x01 << 2) //< SPI interface Write operation in Control Phase

    52. 

  52. 

    53. 

  53. #define WIZCHIP_CREG_BLOCK          0x00 	//< Common register block

    54. 

  54. #define WIZCHIP_SREG_BLOCK(N)       (1+4*N) //< Socket N register block

    55. 

  55. #define WIZCHIP_TXBUF_BLOCK(N)      (2+4*N) //< Socket N Tx buffer address block

    56. 

  56. #define WIZCHIP_RXBUF_BLOCK(N)      (3+4*N) //< Socket N Rx buffer address block

    57. 

  57. 

    58. 

  58. #define WIZCHIP_OFFSET_INC(ADDR, N)    (ADDR + (N<<8)) //< Increase offset address

    59. 

  59. 

    60. 

  60. 

    61. 

  61. ///////////////////////////////////////

    62. 

  62. // Definition For Legacy Chip Driver //

    63. 

  63. ///////////////////////////////////////

    64. 

  64. #define IINCHIP_READ(ADDR)                WIZCHIP_READ(ADDR)               ///< The defined for legacy chip driver

    65. 

  65. #define IINCHIP_WRITE(ADDR,VAL)           WIZCHIP_WRITE(ADDR,VAL)          ///< The defined for legacy chip driver

    66. 

  66. #define IINCHIP_READ_BUF(ADDR,BUF,LEN)    WIZCHIP_READ_BUF(ADDR,BUF,LEN)   ///< The defined for legacy chip driver

    67. 

  67. #define IINCHIP_WRITE_BUF(ADDR,BUF,LEN)   WIZCHIP_WRITE(ADDR,BUF,LEN)      ///< The defined for legacy chip driver

    68. 

  68. 

    69. 

  69. //////////////////////////////

    70. 

  70. //--------------------------  defgroup ---------------------------------

    71. 

  71. /**

    72. 

  72.  * @defgroup W5500 W5500

    73. 

  73.  *

    74. 

  74.  * @brief WHIZCHIP register defines and I/O functions of @b W5500.

    75. 

  75.  *

    76. 

  76.  * - @ref WIZCHIP_register : @ref Common_register_group and @ref Socket_register_group

    77. 

  77.  * - @ref WIZCHIP_IO_Functions : @ref Basic_IO_function, @ref Common_register_access_function and @ref Socket_register_access_function

    78. 

  78.  */

    79. 

  79.  

    80. 

  80.  

    81. 

  81. /**

    82. 

  82.  * @defgroup WIZCHIP_register WIZCHIP register

    83. 

  83.  * @ingroup W5500

    84. 

  84.  *

    85. 

  85.  * @brief WHIZCHIP register defines register group of @b W5500.

    86. 

  86.  *

    87. 

  87.  * - @ref Common_register_group : Common register group

    88. 

  88.  * - @ref Socket_register_group : \c SOCKET n register group

    89. 

  89.  */

    90. 

  90. 

    91. 

  91. 

    92. 

  92. /**

    93. 

  93.  * @defgroup WIZCHIP_IO_Functions WIZCHIP I/O functions

    94. 

  94.  * @ingroup W5500

    95. 

  95.  *

    96. 

  96.  * @brief This supports the basic I/O functions for @ref WIZCHIP_register.

    97. 

  97.  *

    98. 

  98.  * - <b> Basic I/O function </b> \n

    99. 

  99.  *   WIZCHIP_READ(), WIZCHIP_WRITE(), WIZCHIP_READ_BUF(), WIZCHIP_WRITE_BUF() \n\n

    100. 

  100.  *

    101. 

  101.  * - @ref Common_register_group <b>access functions</b> \n

    102. 

  102.  * 	-# @b Mode \n

    103. 

  103.  *    getMR(), setMR()

    104. 

  104.  * 	-# @b Interrupt \n

    105. 

  105.  *    getIR(), setIR(), getIMR(), setIMR(), getSIR(), setSIR(), getSIMR(), setSIMR(), getINTLEVEL(), setINTLEVEL()

    106. 

  106.  * 	-# <b> Network Information </b> \n

    107. 

  107.  *    getSHAR(), setSHAR(), getGAR(), setGAR(), getSUBR(), setSUBR(), getSIPR(), setSIPR()

    108. 

  108.  * 	-# @b Retransmission \n

    109. 

  109.  *    getRCR(), setRCR(), getRTR(), setRTR()

    110. 

  110.  * 	-# @b PPPoE \n

    111. 

  111.  *    getPTIMER(), setPTIMER(), getPMAGIC(), getPMAGIC(), getPSID(), setPSID(), getPHAR(), setPHAR(), getPMRU(), setPMRU()

    112. 

  112.  * 	-# <b> ICMP packet </b>\n

    113. 

  113.  *    getUIPR(), getUPORTR()

    114. 

  114.  * 	-# @b etc. \n

    115. 

  115.  *    getPHYCFGR(), setPHYCFGR(), getVERSIONR() \n\n

    116. 

  116.  *

    117. 

  117.  * - \ref Socket_register_group <b>access functions</b> \n

    118. 

  118.  *   -# <b> SOCKET control</b> \n

    119. 

  119.  *      getSn_MR(), setSn_MR(), getSn_CR(), setSn_CR(), getSn_IMR(), setSn_IMR(), getSn_IR(), setSn_IR()

    120. 

  120.  *   -# <b> SOCKET information</b> \n

    121. 

  121.  *      getSn_SR(), getSn_DHAR(), setSn_DHAR(), getSn_PORT(), setSn_PORT(), getSn_DIPR(), setSn_DIPR(), getSn_DPORT(), setSn_DPORT()

    122. 

  122.  *      getSn_MSSR(), setSn_MSSR()

    123. 

  123.  *   -# <b> SOCKET communication </b> \n

    124. 

  124.  *      getSn_RXBUF_SIZE(), setSn_RXBUF_SIZE(), getSn_TXBUF_SIZE(), setSn_TXBUF_SIZE() \n

    125. 

  125.  *      getSn_TX_RD(), getSn_TX_WR(), setSn_TX_WR() \n

    126. 

  126.  *      getSn_RX_RD(), setSn_RX_RD(), getSn_RX_WR() \n

    127. 

  127.  *      getSn_TX_FSR(), getSn_RX_RSR(), getSn_KPALVTR(), setSn_KPALVTR()

    128. 

  128.  *   -# <b> IP header field </b> \n

    129. 

  129.  *      getSn_FRAG(), setSn_FRAG(),  getSn_TOS(), setSn_TOS() \n

    130. 

  130.  *      getSn_TTL(), setSn_TTL()

    131. 

  131.  */

    132. 

  132. 

    133. 

  133. 

    134. 

  134. 

    135. 

  135. /**

    136. 

  136.  * @defgroup Common_register_group Common register

    137. 

  137.  * @ingroup WIZCHIP_register

    138. 

  138.  *

    139. 

  139.  * @brief Common register group\n

    140. 

  140.  * It set the basic for the networking\n

    141. 

  141.  * It set the configuration such as interrupt, network information, ICMP, etc.

    142. 

  142.  * @details

    143. 

  143.  * @sa MR : Mode register.

    144. 

  144.  * @sa GAR, SUBR, SHAR, SIPR

    145. 

  145.  * @sa INTLEVEL, IR, IMR, SIR, SIMR : Interrupt.

    146. 

  146.  * @sa RTR, RCR : Data retransmission.

    147. 

  147.  * @sa PTIMER, PMAGIC, PHAR, PSID, PMRU : PPPoE.

    148. 

  148.  * @sa UIPR, UPORTR : ICMP message.

    149. 

  149.  * @sa PHYCFGR, VERSIONR : etc.

    150. 

  150.  */

    151. 

  151.  

    152. 

  152.   

    153. 

  153.  

    154. 

  154. /**

    155. 

  155.  * @defgroup Socket_register_group Socket register

    156. 

  156.  * @ingroup WIZCHIP_register

    157. 

  157.  *

    158. 

  158.  * @brief Socket register group.\n

    159. 

  159.  * Socket register configures and control SOCKETn which is necessary to data communication.

    160. 

  160.  * @details

    161. 

  161.  * @sa Sn_MR, Sn_CR, Sn_IR, Sn_IMR : SOCKETn Control

    162. 

  162.  * @sa Sn_SR, Sn_PORT, Sn_DHAR, Sn_DIPR, Sn_DPORT : SOCKETn Information

    163. 

  163.  * @sa Sn_MSSR, Sn_TOS, Sn_TTL, Sn_KPALVTR, Sn_FRAG : Internet protocol.

    164. 

  164.  * @sa Sn_RXBUF_SIZE, Sn_TXBUF_SIZE, Sn_TX_FSR, Sn_TX_RD, Sn_TX_WR, Sn_RX_RSR, Sn_RX_RD, Sn_RX_WR : Data communication

    165. 

  165.  */

    166. 

  166.  

    167. 

  167.  

    168. 

  168.  

    169. 

  169.  /**

    170. 

  170.  * @defgroup Basic_IO_function Basic I/O function

    171. 

  171.  * @ingroup WIZCHIP_IO_Functions

    172. 

  172.  * @brief These are basic input/output functions to read values from register or write values to register.

    173. 

  173.  */

    174. 

  174. 

    175. 

  175. /**

    176. 

  176.  * @defgroup Common_register_access_function Common register access functions

    177. 

  177.  * @ingroup WIZCHIP_IO_Functions

    178. 

  178.  * @brief These are functions to access <b>common registers</b>.

    179. 

  179.  */

    180. 

  180. 

    181. 

  181. /**

    182. 

  182.  * @defgroup Socket_register_access_function Socket register access functions

    183. 

  183.  * @ingroup WIZCHIP_IO_Functions

    184. 

  184.  * @brief These are functions to access <b>socket registers</b>.

    185. 

  185.  */

    186. 

  186.  

    187. 

  187. //------------------------------- defgroup end --------------------------------------------

    188. 

  188. //----------------------------- W5500 Common Registers IOMAP -----------------------------

    189. 

  189. /**

    190. 

  190.  * @ingroup Common_register_group

    191. 

  191.  * @brief Mode Register address(R/W)\n

    192. 

  192.  * @ref MR is used for S/W reset, ping block mode, PPPoE mode and etc.

    193. 

  193.  * @details Each bit of @ref MR defined as follows.

    194. 

  194.  * <table>

    195. 

  195.  * 		<tr>  <td>7</td> <td>6</td> <td>5</td> <td>4</td> <td>3</td> <td>2</td> <td>1</td> <td>0</td>   </tr>

    196. 

  196.  * 		<tr>  <td>RST</td> <td>Reserved</td> <td>WOL</td> <td>PB</td> <td>PPPoE</td> <td>Reserved</td> <td>FARP</td> <td>Reserved</td> </tr>

    197. 

  197.  * </table>

    198. 

  198.  * - \ref MR_RST		 	: Reset

    199. 

  199.  * - \ref MR_WOL       		: Wake on LAN

    200. 

  200.  * - \ref MR_PB         	: Ping block

    201. 

  201.  * - \ref MR_PPPOE      	: PPPoE mode

    202. 

  202.  * - \ref MR_FARP			: Force ARP mode

    203. 

  203.  */

    204. 

  204. #define MR                 (_W5500_IO_BASE_ + (0x0000 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    205. 

  205. 

    206. 

  206. /**

    207. 

  207.  * @ingroup Common_register_group

    208. 

  208.  * @brief Gateway IP Register address(R/W)

    209. 

  209.  * @details @ref GAR configures the default gateway address.

    210. 

  210.  */

    211. 

  211. #define GAR                (_W5500_IO_BASE_ + (0x0001 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    212. 

  212. 

    213. 

  213. /**

    214. 

  214.  * @ingroup Common_register_group

    215. 

  215.  * @brief Subnet mask Register address(R/W)

    216. 

  216.  * @details @ref SUBR configures the subnet mask address.

    217. 

  217.  */

    218. 

  218. #define SUBR               (_W5500_IO_BASE_ + (0x0005 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    219. 

  219. 

    220. 

  220. /**

    221. 

  221.  * @ingroup Common_register_group

    222. 

  222.  * @brief Source MAC Register address(R/W)

    223. 

  223.  * @details @ref SHAR configures the source hardware address.

    224. 

  224.  */

    225. 

  225. #define SHAR               (_W5500_IO_BASE_ + (0x0009 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    226. 

  226. 

    227. 

  227. /**

    228. 

  228.  * @ingroup Common_register_group

    229. 

  229.  * @brief Source IP Register address(R/W)

    230. 

  230.  * @details @ref SIPR configures the source IP address.

    231. 

  231.  */

    232. 

  232. #define SIPR               (_W5500_IO_BASE_ + (0x000F << 8) + (WIZCHIP_CREG_BLOCK << 3))

    233. 

  233. 

    234. 

  234. /**

    235. 

  235.  * @ingroup Common_register_group

    236. 

  236.  * @brief Set Interrupt low level timer register address(R/W)

    237. 

  237.  * @details @ref INTLEVEL configures the Interrupt Assert Time.

    238. 

  238.  */

    239. 

  239. #define INTLEVEL           (_W5500_IO_BASE_ + (0x0013 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    240. 

  240. 

    241. 

  241. /**

    242. 

  242.  * @ingroup Common_register_group

    243. 

  243.  * @brief Interrupt Register(R/W)

    244. 

  244.  * @details @ref IR indicates the interrupt status. Each bit of @ref IR will be still until the bit will be written to by the host.

    245. 

  245.  * If @ref IR is not equal to x00 INTn PIN is asserted to low until it is x00\n\n

    246. 

  246.  * Each bit of @ref IR defined as follows.

    247. 

  247.  * <table>

    248. 

  248.  * 		<tr>  <td>7</td> <td>6</td> <td>5</td> <td>4</td> <td>3</td> <td>2</td> <td>1</td> <td>0</td>   </tr>

    249. 

  249.  * 		<tr>  <td>CONFLICT</td> <td>UNREACH</td> <td>PPPoE</td> <td>MP</td> <td>Reserved</td> <td>Reserved</td> <td>Reserved</td> <td>Reserved</td> </tr>

    250. 

  250.  * </table>

    251. 

  251.  * - \ref IR_CONFLICT : IP conflict

    252. 

  252.  * - \ref IR_UNREACH  : Destination unreachable

    253. 

  253.  * - \ref IR_PPPoE	  : PPPoE connection close

    254. 

  254.  * - \ref IR_MP		  : Magic packet

    255. 

  255.  */

    256. 

  256. #define IR                 (_W5500_IO_BASE_ + (0x0015 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    257. 

  257. 

    258. 

  258. /**

    259. 

  259.  * @ingroup Common_register_group

    260. 

  260.  * @brief Interrupt mask register(R/W)

    261. 

  261.  * @details @ref IMR is used to mask interrupts. Each bit of @ref IMR corresponds to each bit of @ref IR.

    262. 

  262.  * When a bit of @ref IMR is and the corresponding bit of @ref IR is  an interrupt will be issued. In other words,

    263. 

  263.  * if a bit of @ref IMR is  an interrupt will not be issued even if the corresponding bit of @ref IR is \n\n

    264. 

  264.  * Each bit of @ref IMR defined as the following.

    265. 

  265.  * <table>

    266. 

  266.  * 		<tr>  <td>7</td> <td>6</td> <td>5</td> <td>4</td> <td>3</td> <td>2</td> <td>1</td> <td>0</td>   </tr>

    267. 

  267.  * 		<tr>  <td>IM_IR7</td> <td>IM_IR6</td> <td>IM_IR5</td> <td>IM_IR4</td> <td>Reserved</td> <td>Reserved</td> <td>Reserved</td> <td>Reserved</td> </tr>

    268. 

  268.  * </table>

    269. 

  269.  * - \ref IM_IR7 : IP Conflict Interrupt Mask

    270. 

  270.  * - \ref IM_IR6 : Destination unreachable Interrupt Mask

    271. 

  271.  * - \ref IM_IR5 : PPPoE Close Interrupt Mask

    272. 

  272.  * - \ref IM_IR4 : Magic Packet Interrupt Mask

    273. 

  273.  */

    274. 

  274. #define IMR                (_W5500_IO_BASE_ + (0x0016 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    275. 

  275. 

    276. 

  276. /**

    277. 

  277.  * @ingroup Common_register_group

    278. 

  278.  * @brief Socket Interrupt Register(R/W)

    279. 

  279.  * @details @ref SIR indicates the interrupt status of Socket.\n

    280. 

  280.  * Each bit of @ref SIR be still until @ref Sn_IR is cleared by the host.\n

    281. 

  281.  * If @ref Sn_IR is not equal to x00 the n-th bit of @ref SIR is and INTn PIN is asserted until @ref SIR is x00 */

    282. 

  282. #define SIR                (_W5500_IO_BASE_ + (0x0017 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    283. 

  283. 

    284. 

  284. /**

    285. 

  285.  * @ingroup Common_register_group

    286. 

  286.  * @brief Socket Interrupt Mask Register(R/W)

    287. 

  287.  * @details Each bit of @ref SIMR corresponds to each bit of @ref SIR.

    288. 

  288.  * When a bit of @ref SIMR is and the corresponding bit of @ref SIR is  Interrupt will be issued.

    289. 

  289.  * In other words, if a bit of @ref SIMR is  an interrupt will be not issued even if the corresponding bit of @ref SIR is 

    290. 

  290.  */

    291. 

  291. #define SIMR               (_W5500_IO_BASE_ + (0x0018 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    292. 

  292. 

    293. 

  293. /**

    294. 

  294.  * @ingroup Common_register_group

    295. 

  295.  * @brief Timeout register address( 1 is 100us )(R/W)

    296. 

  296.  * @details @ref RTR configures the retransmission timeout period. The unit of timeout period is 100us and the default of @ref RTR is x07D0or 000

    297. 

  297.  * And so the default timeout period is 200ms(100us X 2000). During the time configured by @ref RTR, W5500 waits for the peer response

    298. 

  298.  * to the packet that is transmitted by \ref Sn_CR (CONNECT, DISCON, CLOSE, SEND, SEND_MAC, SEND_KEEP command).

    299. 

  299.  * If the peer does not respond within the @ref RTR time, W5500 retransmits the packet or issues timeout.

    300. 

  300.  */

    301. 

  301. #define RTR                (_W5500_IO_BASE_ + (0x0019 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    302. 

  302. 

    303. 

  303. /**

    304. 

  304.  * @ingroup Common_register_group

    305. 

  305.  * @brief Retry count register(R/W)

    306. 

  306.  * @details @ref RCR configures the number of time of retransmission.

    307. 

  307.  * When retransmission occurs as many as ref RCR+1 Timeout interrupt is issued (@ref Sn_IR[TIMEOUT] = .

    308. 

  308.  */

    309. 

  309. #define RCR                (_W5500_IO_BASE_ + (0x001B << 8) + (WIZCHIP_CREG_BLOCK << 3))

    310. 

  310. 

    311. 

  311. /**

    312. 

  312.  * @ingroup Common_register_group

    313. 

  313.  * @brief PPP LCP Request Timer register  in PPPoE mode(R/W)

    314. 

  314.  * @details @ref PTIMER configures the time for sending LCP echo request. The unit of time is 25ms.

    315. 

  315.  */

    316. 

  316. #define PTIMER             (_W5500_IO_BASE_ + (0x001C << 8) + (WIZCHIP_CREG_BLOCK << 3))

    317. 

  317. 

    318. 

  318. /**

    319. 

  319.  * @ingroup Common_register_group

    320. 

  320.  * @brief PPP LCP Magic number register  in PPPoE mode(R/W)

    321. 

  321.  * @details @ref PMAGIC configures the 4bytes magic number to be used in LCP negotiation.

    322. 

  322.  */

    323. 

  323. #define PMAGIC             (_W5500_IO_BASE_ + (0x001D << 8) + (WIZCHIP_CREG_BLOCK << 3))

    324. 

  324. 

    325. 

  325. /**

    326. 

  326.  * @ingroup Common_register_group

    327. 

  327.  * @brief PPP Destination MAC Register address(R/W)

    328. 

  328.  * @details @ref PHAR configures the PPPoE server hardware address that is acquired during PPPoE connection process.

    329. 

  329.  */

    330. 

  330. #define PHAR                (_W5500_IO_BASE_ + (0x001E << 8) + (WIZCHIP_CREG_BLOCK << 3))

    331. 

  331. 

    332. 

  332. /**

    333. 

  333.  * @ingroup Common_register_group

    334. 

  334.  * @brief PPP Session Identification Register(R/W)

    335. 

  335.  * @details @ref PSID configures the PPPoE sever session ID acquired during PPPoE connection process.

    336. 

  336.  */

    337. 

  337. #define PSID               (_W5500_IO_BASE_ + (0x0024 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    338. 

  338. 

    339. 

  339. /**

    340. 

  340.  * @ingroup Common_register_group

    341. 

  341.  * @brief PPP Maximum Segment Size(MSS) register(R/W)

    342. 

  342.  * @details @ref PMRU configures the maximum receive unit of PPPoE.

    343. 

  343.  */

    344. 

  344. #define PMRU               (_W5500_IO_BASE_ + (0x0026 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    345. 

  345. 

    346. 

  346. /**

    347. 

  347.  * @ingroup Common_register_group

    348. 

  348.  * @brief Unreachable IP register address in UDP mode(R)

    349. 

  349.  * @details W5500 receives an ICMP packet(Destination port unreachable) when data is sent to a port number

    350. 

  350.  * which socket is not open and @ref UNREACH bit of @ref IR becomes and @ref UIPR & @ref UPORTR indicates

    351. 

  351.  * the destination IP address & port number respectively.

    352. 

  352.  */

    353. 

  353. #define UIPR               (_W5500_IO_BASE_ + (0x0028 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    354. 

  354. 

    355. 

  355. /**

    356. 

  356.  * @ingroup Common_register_group

    357. 

  357.  * @brief Unreachable Port register address in UDP mode(R)

    358. 

  358.  * @details W5500 receives an ICMP packet(Destination port unreachable) when data is sent to a port number

    359. 

  359.  * which socket is not open and @ref UNREACH bit of @ref IR becomes and @ref UIPR & @ref UPORTR

    360. 

  360.  * indicates the destination IP address & port number respectively.

    361. 

  361.  */

    362. 

  362. #define UPORTR              (_W5500_IO_BASE_ + (0x002C << 8) + (WIZCHIP_CREG_BLOCK << 3))

    363. 

  363. 

    364. 

  364. /**

    365. 

  365.  * @ingroup Common_register_group

    366. 

  366.  * @brief PHY Status Register(R/W)

    367. 

  367.  * @details @ref PHYCFGR configures PHY operation mode and resets PHY. In addition, @ref PHYCFGR indicates the status of PHY such as duplex, Speed, Link.

    368. 

  368.  */

    369. 

  369. #define PHYCFGR            (_W5500_IO_BASE_ + (0x002E << 8) + (WIZCHIP_CREG_BLOCK << 3))

    370. 

  370. 

    371. 

  371. // Reserved			         (_W5500_IO_BASE_ + (0x002F << 8) + (WIZCHIP_CREG_BLOCK << 3))

    372. 

  372. // Reserved			         (_W5500_IO_BASE_ + (0x0030 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    373. 

  373. // Reserved			         (_W5500_IO_BASE_ + (0x0031 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    374. 

  374. // Reserved			         (_W5500_IO_BASE_ + (0x0032 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    375. 

  375. // Reserved			         (_W5500_IO_BASE_ + (0x0033 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    376. 

  376. // Reserved			         (_W5500_IO_BASE_ + (0x0034 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    377. 

  377. // Reserved			         (_W5500_IO_BASE_ + (0x0035 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    378. 

  378. // Reserved			         (_W5500_IO_BASE_ + (0x0036 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    379. 

  379. // Reserved			         (_W5500_IO_BASE_ + (0x0037 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    380. 

  380. // Reserved			         (_W5500_IO_BASE_ + (0x0038 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    381. 

  381. 

    382. 

  382. /**

    383. 

  383.  * @ingroup Common_register_group

    384. 

  384.  * @brief chip version register address(R)

    385. 

  385.  * @details @ref VERSIONR always indicates the W5500 version as @b 0x04.

    386. 

  386.  */

    387. 

  387. #define VERSIONR           (_W5500_IO_BASE_ + (0x0039 << 8) + (WIZCHIP_CREG_BLOCK << 3))

    388. 

  388. 

    389. 

  389. 

    390. 

  390. //----------------------------- W5500 Socket Registers IOMAP -----------------------------

    391. 

  391. /**

    392. 

  392.  * @ingroup Socket_register_group

    393. 

  393.  * @brief socket Mode register(R/W)

    394. 

  394.  * @details @ref Sn_MR configures the option or protocol type of Socket n.\n\n

    395. 

  395.  * Each bit of @ref Sn_MR defined as the following.

    396. 

  396.  * <table>

    397. 

  397.  * 		<tr>  <td>7</td> <td>6</td> <td>5</td> <td>4</td> <td>3</td> <td>2</td> <td>1</td> <td>0</td>   </tr>

    398. 

  398.  * 		<tr>  <td>MULTI/MFEN</td> <td>BCASTB</td> <td>ND/MC/MMB</td> <td>UCASTB/MIP6B</td> <td>Protocol[3]</td> <td>Protocol[2]</td> <td>Protocol[1]</td> <td>Protocol[0]</td> </tr>

    399. 

  399.  * </table>

    400. 

  400.  * - @ref Sn_MR_MULTI	: Support UDP Multicasting

    401. 

  401.  * - @ref Sn_MR_BCASTB	: Broadcast block <b>in UDP Multicasting</b>

    402. 

  402.  * - @ref Sn_MR_ND		: No Delayed Ack(TCP) flag

    403. 

  403.  * - @ref Sn_MR_MC   	: IGMP version used <b>in UDP mulitcasting</b>

    404. 

  404.  * - @ref Sn_MR_MMB    	: Multicast Blocking <b>in @ref Sn_MR_MACRAW mode</b>

    405. 

  405.  * - @ref Sn_MR_UCASTB	: Unicast Block <b>in UDP Multicating</b>

    406. 

  406.  * - @ref Sn_MR_MIP6B   : IPv6 packet Blocking <b>in @ref Sn_MR_MACRAW mode</b>

    407. 

  407.  * - <b>Protocol</b>

    408. 

  408.  * <table>

    409. 

  409.  * 		<tr>   <td><b>Protocol[3]</b></td> <td><b>Protocol[2]</b></td> <td><b>Protocol[1]</b></td> <td><b>Protocol[0]</b></td> <td>@b Meaning</td>   </tr>

    410. 

  410.  * 		<tr>   <td>0</td> <td>0</td> <td>0</td> <td>0</td> <td>Closed</td>   </tr>

    411. 

  411.  * 		<tr>   <td>0</td> <td>0</td> <td>0</td> <td>1</td> <td>TCP</td>   </tr>

    412. 

  412.  * 		<tr>   <td>0</td> <td>0</td> <td>1</td> <td>0</td> <td>UDP</td>   </tr>

    413. 

  413.  * 		<tr>   <td>0</td> <td>1</td> <td>0</td> <td>0</td> <td>MACRAW</td>   </tr>

    414. 

  414.  * </table>

    415. 

  415.  *	- @ref Sn_MR_MACRAW	: MAC LAYER RAW SOCK \n

    416. 

  416.  *  - @ref Sn_MR_UDP		: UDP

    417. 

  417.  *  - @ref Sn_MR_TCP		: TCP

    418. 

  418.  *  - @ref Sn_MR_CLOSE	: Unused socket

    419. 

  419.  *  @note MACRAW mode should be only used in Socket 0.

    420. 

  420.  */

    421. 

  421. #define Sn_MR(N)           (_W5500_IO_BASE_ + (0x0000 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    422. 

  422. 

    423. 

  423. /**

    424. 

  424.  * @ingroup Socket_register_group

    425. 

  425.  * @brief Socket command register(R/W)

    426. 

  426.  * @details This is used to set the command for Socket n such as OPEN, CLOSE, CONNECT, LISTEN, SEND, and RECEIVE.\n

    427. 

  427.  * After W5500 accepts the command, the @ref Sn_CR register is automatically cleared to 0x00.

    428. 

  428.  * Even though @ref Sn_CR is cleared to 0x00, the command is still being processed.\n

    429. 

  429.  * To check whether the command is completed or not, please check the @ref Sn_IR or @ref Sn_SR.

    430. 

  430.  * - @ref Sn_CR_OPEN 		: Initialize or open socket.

    431. 

  431.  * - @ref Sn_CR_LISTEN 		: Wait connection request in TCP mode(<b>Server mode</b>)

    432. 

  432.  * - @ref Sn_CR_CONNECT 	: Send connection request in TCP mode(<b>Client mode</b>)

    433. 

  433.  * - @ref Sn_CR_DISCON 		: Send closing request in TCP mode.

    434. 

  434.  * - @ref Sn_CR_CLOSE   	: Close socket.

    435. 

  435.  * - @ref Sn_CR_SEND    	: Update TX buffer pointer and send data.

    436. 

  436.  * - @ref Sn_CR_SEND_MAC	: Send data with MAC address, so without ARP process.

    437. 

  437.  * - @ref Sn_CR_SEND_KEEP 	: Send keep alive message.

    438. 

  438.  * - @ref Sn_CR_RECV		: Update RX buffer pointer and receive data.

    439. 

  439.  */

    440. 

  440. #define Sn_CR(N)           (_W5500_IO_BASE_ + (0x0001 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    441. 

  441. 

    442. 

  442. /**

    443. 

  443.  * @ingroup Socket_register_group

    444. 

  444.  * @brief Socket interrupt register(R)

    445. 

  445.  * @details @ref Sn_IR indicates the status of Socket Interrupt such as establishment, termination, receiving data, timeout).\n

    446. 

  446.  * When an interrupt occurs and the corresponding bit of @ref Sn_IMR is  the corresponding bit of @ref Sn_IR becomes \n

    447. 

  447.  * In order to clear the @ref Sn_IR bit, the host should write the bit to \n

    448. 

  448.  * <table>

    449. 

  449.  * 		<tr>  <td>7</td> <td>6</td> <td>5</td> <td>4</td> <td>3</td> <td>2</td> <td>1</td> <td>0</td>   </tr>

    450. 

  450.  * 		<tr>  <td>Reserved</td> <td>Reserved</td> <td>Reserved</td> <td>SEND_OK</td> <td>TIMEOUT</td> <td>RECV</td> <td>DISCON</td> <td>CON</td> </tr>

    451. 

  451.  * </table>

    452. 

  452.  * - \ref Sn_IR_SENDOK : <b>SEND_OK Interrupt</b>

    453. 

  453.  * - \ref Sn_IR_TIMEOUT : <b>TIMEOUT Interrupt</b>

    454. 

  454.  * - \ref Sn_IR_RECV : <b>RECV Interrupt</b>

    455. 

  455.  * - \ref Sn_IR_DISCON : <b>DISCON Interrupt</b>

    456. 

  456.  * - \ref Sn_IR_CON : <b>CON Interrupt</b>

    457. 

  457.  */

    458. 

  458. #define Sn_IR(N)           (_W5500_IO_BASE_ + (0x0002 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    459. 

  459. 

    460. 

  460. /**

    461. 

  461.  * @ingroup Socket_register_group

    462. 

  462.  * @brief Socket status register(R)

    463. 

  463.  * @details @ref Sn_SR indicates the status of Socket n.\n

    464. 

  464.  * The status of Socket n is changed by @ref Sn_CR or some special control packet as SYN, FIN packet in TCP.

    465. 

  465.  * @par Normal status

    466. 

  466.  * - @ref SOCK_CLOSED 		: Closed

    467. 

  467.  * - @ref SOCK_INIT   		: Initiate state

    468. 

  468.  * - @ref SOCK_LISTEN    	: Listen state

    469. 

  469.  * - @ref SOCK_ESTABLISHED 	: Success to connect

    470. 

  470.  * - @ref SOCK_CLOSE_WAIT   : Closing state

    471. 

  471.  * - @ref SOCK_UDP   		: UDP socket

    472. 

  472.  * - @ref SOCK_MACRAW  		: MAC raw mode socket

    473. 

  473.  *@par Temporary status during changing the status of Socket n.

    474. 

  474.  * - @ref SOCK_SYNSENT   	: This indicates Socket n sent the connect-request packet (SYN packet) to a peer.

    475. 

  475.  * - @ref SOCK_SYNRECV    	: It indicates Socket n successfully received the connect-request packet (SYN packet) from a peer.

    476. 

  476.  * - @ref SOCK_FIN_WAIT		: Connection state

    477. 

  477.  * - @ref SOCK_CLOSING		: Closing state

    478. 

  478.  * - @ref SOCK_TIME_WAIT	: Closing state

    479. 

  479.  * - @ref SOCK_LAST_ACK 	: Closing state

    480. 

  480.  */

    481. 

  481. #define Sn_SR(N)           (uint32_t)(_W5500_IO_BASE_ + (0x0003 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    482. 

  482. 

    483. 

  483. /**

    484. 

  484.  * @ingroup Socket_register_group

    485. 

  485.  * @brief source port register(R/W)

    486. 

  486.  * @details @ref Sn_PORT configures the source port number of Socket n.

    487. 

  487.  * It is valid when Socket n is used in TCP/UPD mode. It should be set before OPEN command is ordered.

    488. 

  488.  */

    489. 

  489. #define Sn_PORT(N)         (_W5500_IO_BASE_ + (0x0004 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    490. 

  490. 

    491. 

  491. /**

    492. 

  492.  * @ingroup Socket_register_group

    493. 

  493.  * @brief Peer MAC register address(R/W)

    494. 

  494.  * @details @ref Sn_DHAR configures the destination hardware address of Socket n when using SEND_MAC command in UDP mode or

    495. 

  495.  * it indicates that it is acquired in ARP-process by CONNECT/SEND command.

    496. 

  496.  */

    497. 

  497. #define Sn_DHAR(N)         (_W5500_IO_BASE_ + (0x0006 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    498. 

  498. 

    499. 

  499. /**

    500. 

  500.  * @ingroup Socket_register_group

    501. 

  501.  * @brief Peer IP register address(R/W)

    502. 

  502.  * @details @ref Sn_DIPR configures or indicates the destination IP address of Socket n. It is valid when Socket n is used in TCP/UDP mode.

    503. 

  503.  * In TCP client mode, it configures an IP address of �TCP serverbefore CONNECT command.

    504. 

  504.  * In TCP server mode, it indicates an IP address of �TCP clientafter successfully establishing connection.

    505. 

  505.  * In UDP mode, it configures an IP address of peer to be received the UDP packet by SEND or SEND_MAC command.

    506. 

  506.  */

    507. 

  507. #define Sn_DIPR(N)         (_W5500_IO_BASE_ + (0x000C << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    508. 

  508. 

    509. 

  509. /**

    510. 

  510.  * @ingroup Socket_register_group

    511. 

  511.  * @brief Peer port register address(R/W)

    512. 

  512.  * @details @ref Sn_DPORT configures or indicates the destination port number of Socket n. It is valid when Socket n is used in TCP/UDP mode.

    513. 

  513.  * In �TCP clientmode, it configures the listen port number of �TCP serverbefore CONNECT command.

    514. 

  514.  * In �TCP Servermode, it indicates the port number of TCP client after successfully establishing connection.

    515. 

  515.  * In UDP mode, it configures the port number of peer to be transmitted the UDP packet by SEND/SEND_MAC command.

    516. 

  516.  */

    517. 

  517. #define Sn_DPORT(N)        (_W5500_IO_BASE_ + (0x0010 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    518. 

  518. 

    519. 

  519. /**

    520. 

  520.  * @ingroup Socket_register_group

    521. 

  521.  * @brief Maximum Segment Size(Sn_MSSR0) register address(R/W)

    522. 

  522.  * @details @ref Sn_MSSR configures or indicates the MTU(Maximum Transfer Unit) of Socket n.

    523. 

  523.  */

    524. 

  524. #define Sn_MSSR(N)         (_W5500_IO_BASE_ + (0x0012 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    525. 

  525. 

    526. 

  526. // Reserved			         (_W5500_IO_BASE_ + (0x0014 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    527. 

  527. 

    528. 

  528. /**

    529. 

  529.  * @ingroup Socket_register_group

    530. 

  530.  * @brief IP Type of Service(TOS) Register(R/W)

    531. 

  531.  * @details @ref Sn_TOS configures the TOS(Type Of Service field in IP Header) of Socket n.

    532. 

  532.  * It is set before OPEN command.

    533. 

  533.  */

    534. 

  534. #define Sn_TOS(N)          (_W5500_IO_BASE_ + (0x0015 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    535. 

  535. /**

    536. 

  536.  * @ingroup Socket_register_group

    537. 

  537.  * @brief IP Time to live(TTL) Register(R/W)

    538. 

  538.  * @details @ref Sn_TTL configures the TTL(Time To Live field in IP header) of Socket n.

    539. 

  539.  * It is set before OPEN command.

    540. 

  540.  */

    541. 

  541. #define Sn_TTL(N)          (_W5500_IO_BASE_ + (0x0016 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    542. 

  542. // Reserved			         (_W5500_IO_BASE_ + (0x0017 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    543. 

  543. // Reserved			         (_W5500_IO_BASE_ + (0x0018 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3)) 

    544. 

  544. // Reserved			         (_W5500_IO_BASE_ + (0x0019 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    545. 

  545. // Reserved			         (_W5500_IO_BASE_ + (0x001A << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    546. 

  546. // Reserved			         (_W5500_IO_BASE_ + (0x001B << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    547. 

  547. // Reserved			         (_W5500_IO_BASE_ + (0x001C << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    548. 

  548. // Reserved			         (_W5500_IO_BASE_ + (0x001D << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    549. 

  549. 

    550. 

  550. /**

    551. 

  551.  * @ingroup Socket_register_group

    552. 

  552.  * @brief Receive memory size register(R/W)

    553. 

  553.  * @details @ref Sn_RXBUF_SIZE configures the RX buffer block size of Socket n.

    554. 

  554.  * Socket n RX Buffer Block size can be configured with 1,2,4,8, and 16 Kbytes.

    555. 

  555.  * If a different size is configured, the data cannot be normally received from a peer.

    556. 

  556.  * Although Socket n RX Buffer Block size is initially configured to 2Kbytes,

    557. 

  557.  * user can re-configure its size using @ref Sn_RXBUF_SIZE. The total sum of @ref Sn_RXBUF_SIZE can not be exceed 16Kbytes.

    558. 

  558.  * When exceeded, the data reception error is occurred.

    559. 

  559.  */

    560. 

  560. #define Sn_RXBUF_SIZE(N)   (_W5500_IO_BASE_ + (0x001E << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    561. 

  561. 

    562. 

  562. /**

    563. 

  563.  * @ingroup Socket_register_group

    564. 

  564.  * @brief Transmit memory size register(R/W)

    565. 

  565.  * @details @ref Sn_TXBUF_SIZE configures the TX buffer block size of Socket n. Socket n TX Buffer Block size can be configured with 1,2,4,8, and 16 Kbytes.

    566. 

  566.  * If a different size is configured, the data can�t be normally transmitted to a peer.

    567. 

  567.  * Although Socket n TX Buffer Block size is initially configured to 2Kbytes,

    568. 

  568.  * user can be re-configure its size using @ref Sn_TXBUF_SIZE. The total sum of @ref Sn_TXBUF_SIZE can not be exceed 16Kbytes.

    569. 

  569.  * When exceeded, the data transmission error is occurred.

    570. 

  570.  */

    571. 

  571. #define Sn_TXBUF_SIZE(N)   (_W5500_IO_BASE_ + (0x001F << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    572. 

  572. 

    573. 

  573. /**

    574. 

  574.  * @ingroup Socket_register_group

    575. 

  575.  * @brief Transmit free memory size register(R)

    576. 

  576.  * @details @ref Sn_TX_FSR indicates the free size of Socket n TX Buffer Block. It is initialized to the configured size by @ref Sn_TXBUF_SIZE.

    577. 

  577.  * Data bigger than @ref Sn_TX_FSR should not be saved in the Socket n TX Buffer because the bigger data overwrites the previous saved data not yet sent.

    578. 

  578.  * Therefore, check before saving the data to the Socket n TX Buffer, and if data is equal or smaller than its checked size,

    579. 

  579.  * transmit the data with SEND/SEND_MAC command after saving the data in Socket n TX buffer. But, if data is bigger than its checked size,

    580. 

  580.  * transmit the data after dividing into the checked size and saving in the Socket n TX buffer.

    581. 

  581.  */

    582. 

  582. #define Sn_TX_FSR(N)       (_W5500_IO_BASE_ + (0x0020 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    583. 

  583. 

    584. 

  584. /**

    585. 

  585.  * @ingroup Socket_register_group

    586. 

  586.  * @brief Transmit memory read pointer register address(R)

    587. 

  587.  * @details @ref Sn_TX_RD is initialized by OPEN command. However, if Sn_MR(P[3:0]) is TCP mode(001, it is re-initialized while connecting with TCP.

    588. 

  588.  * After its initialization, it is auto-increased by SEND command.

    589. 

  589.  * SEND command transmits the saved data from the current @ref Sn_TX_RD to the @ref Sn_TX_WR in the Socket n TX Buffer.

    590. 

  590.  * After transmitting the saved data, the SEND command increases the @ref Sn_TX_RD as same as the @ref Sn_TX_WR.

    591. 

  591.  * If its increment value exceeds the maximum value 0xFFFF, (greater than 0x10000 and the carry bit occurs),

    592. 

  592.  * then the carry bit is ignored and will automatically update with the lower 16bits value.

    593. 

  593.  */

    594. 

  594. #define Sn_TX_RD(N)        (_W5500_IO_BASE_ + (0x0022 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    595. 

  595. 

    596. 

  596. /**

    597. 

  597.  * @ingroup Socket_register_group

    598. 

  598.  * @brief Transmit memory write pointer register address(R/W)

    599. 

  599.  * @details @ref Sn_TX_WR is initialized by OPEN command. However, if Sn_MR(P[3:0]) is TCP mode(001, it is re-initialized while connecting with TCP.\n

    600. 

  600.  * It should be read or be updated like as follows.\n

    601. 

  601.  * 1. Read the starting address for saving the transmitting data.\n

    602. 

  602.  * 2. Save the transmitting data from the starting address of Socket n TX buffer.\n

    603. 

  603.  * 3. After saving the transmitting data, update @ref Sn_TX_WR to the increased value as many as transmitting data size.

    604. 

  604.  * If the increment value exceeds the maximum value 0xFFFF(greater than 0x10000 and the carry bit occurs),

    605. 

  605.  * then the carry bit is ignored and will automatically update with the lower 16bits value.\n

    606. 

  606.  * 4. Transmit the saved data in Socket n TX Buffer by using SEND/SEND command

    607. 

  607.  */

    608. 

  608. #define Sn_TX_WR(N)        (_W5500_IO_BASE_ + (0x0024 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    609. 

  609. 

    610. 

  610. /**

    611. 

  611.  * @ingroup Socket_register_group

    612. 

  612.  * @brief Received data size register(R)

    613. 

  613.  * @details @ref Sn_RX_RSR indicates the data size received and saved in Socket n RX Buffer.

    614. 

  614.  * @ref Sn_RX_RSR does not exceed the @ref Sn_RXBUF_SIZE and is calculated as the difference between

    615. 

  615.  * �Socket n RX Write Pointer (@ref Sn_RX_WR)and �Socket n RX Read Pointer (@ref Sn_RX_RD)

    616. 

  616.  */

    617. 

  617. #define Sn_RX_RSR(N)       (_W5500_IO_BASE_ + (0x0026 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    618. 

  618. 

    619. 

  619. /**

    620. 

  620.  * @ingroup Socket_register_group

    621. 

  621.  * @brief Read point of Receive memory(R/W)

    622. 

  622.  * @details @ref Sn_RX_RD is initialized by OPEN command. Make sure to be read or updated as follows.\n

    623. 

  623.  * 1. Read the starting save address of the received data.\n

    624. 

  624.  * 2. Read data from the starting address of Socket n RX Buffer.\n

    625. 

  625.  * 3. After reading the received data, Update @ref Sn_RX_RD to the increased value as many as the reading size.

    626. 

  626.  * If the increment value exceeds the maximum value 0xFFFF, that is, is greater than 0x10000 and the carry bit occurs,

    627. 

  627.  * update with the lower 16bits value ignored the carry bit.\n

    628. 

  628.  * 4. Order RECV command is for notifying the updated @ref Sn_RX_RD to W5500.

    629. 

  629.  */

    630. 

  630. #define Sn_RX_RD(N)        (_W5500_IO_BASE_ + (0x0028 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    631. 

  631. 

    632. 

  632. /**

    633. 

  633.  * @ingroup Socket_register_group

    634. 

  634.  * @brief Write point of Receive memory(R)

    635. 

  635.  * @details @ref Sn_RX_WR is initialized by OPEN command and it is auto-increased by the data reception.

    636. 

  636.  * If the increased value exceeds the maximum value 0xFFFF, (greater than 0x10000 and the carry bit occurs),

    637. 

  637.  * then the carry bit is ignored and will automatically update with the lower 16bits value.

    638. 

  638.  */

    639. 

  639. #define Sn_RX_WR(N)        (_W5500_IO_BASE_ + (0x002A << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    640. 

  640. 

    641. 

  641. /**

    642. 

  642.  * @ingroup Socket_register_group

    643. 

  643.  * @brief socket interrupt mask register(R)

    644. 

  644.  * @details @ref Sn_IMR masks the interrupt of Socket n.

    645. 

  645.  * Each bit corresponds to each bit of @ref Sn_IR. When a Socket n Interrupt is occurred and the corresponding bit of @ref Sn_IMR is 

    646. 

  646.  * the corresponding bit of @ref Sn_IR becomes  When both the corresponding bit of @ref Sn_IMR and @ref Sn_IR are and the n-th bit of @ref IR is 

    647. 

  647.  * Host is interrupted by asserted INTn PIN to low.

    648. 

  648.  */

    649. 

  649. #define Sn_IMR(N)          (_W5500_IO_BASE_ + (0x002C << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    650. 

  650. 

    651. 

  651. /**

    652. 

  652.  * @ingroup Socket_register_group

    653. 

  653.  * @brief Fragment field value in IP header register(R/W)

    654. 

  654.  * @details @ref Sn_FRAG configures the FRAG(Fragment field in IP header).

    655. 

  655.  */

    656. 

  656. #define Sn_FRAG(N)         (_W5500_IO_BASE_ + (0x002D << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    657. 

  657. 

    658. 

  658. /**

    659. 

  659.  * @ingroup Socket_register_group

    660. 

  660.  * @brief Keep Alive Timer register(R/W)

    661. 

  661.  * @details @ref Sn_KPALVTR configures the transmitting timer of �KEEP ALIVE(KA)packet of SOCKETn. It is valid only in TCP mode,

    662. 

  662.  * and ignored in other modes. The time unit is 5s.

    663. 

  663.  * KA packet is transmittable after @ref Sn_SR is changed to SOCK_ESTABLISHED and after the data is transmitted or received to/from a peer at least once.

    664. 

  664.  * In case of '@ref Sn_KPALVTR > 0', W5500 automatically transmits KA packet after time-period for checking the TCP connection (Auto-keepalive-process).

    665. 

  665.  * In case of '@ref Sn_KPALVTR = 0', Auto-keep-alive-process will not operate,

    666. 

  666.  * and KA packet can be transmitted by SEND_KEEP command by the host (Manual-keep-alive-process).

    667. 

  667.  * Manual-keep-alive-process is ignored in case of '@ref Sn_KPALVTR > 0'.

    668. 

  668.  */

    669. 

  669. #define Sn_KPALVTR(N)      (_W5500_IO_BASE_ + (0x002F << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    670. 

  670. 

    671. 

  671. //#define Sn_TSR(N)          (_W5500_IO_BASE_ + (0x0030 << 8) + (WIZCHIP_SREG_BLOCK(N) << 3))

    672. 

  672. 

    673. 

  673. 

    674. 

  674. //----------------------------- W5500 Register values  -----------------------------

    675. 

  675. 

    676. 

  676. /* MODE register values */

    677. 

  677. /**

    678. 

  678.  * @brief Reset

    679. 

  679.  * @details If this bit is  All internal registers will be initialized. It will be automatically cleared as after S/W reset.

    680. 

  680.  */

    681. 

  681. #define MR_RST                       0x80

    682. 

  682. 

    683. 

  683. /**

    684. 

  684.  * @brief Wake on LAN

    685. 

  685.  * @details 0 : Disable WOL mode\n

    686. 

  686.  * 1 : Enable WOL mode\n

    687. 

  687.  * If WOL mode is enabled and the received magic packet over UDP has been normally processed, the Interrupt PIN (INTn) asserts to low.

    688. 

  688.  * When using WOL mode, the UDP Socket should be opened with any source port number. (Refer to Socket n Mode Register (@ref Sn_MR) for opening Socket.)

    689. 

  689.  * @note The magic packet over UDP supported by W5500 consists of 6 bytes synchronization stream (xFFFFFFFFFFFF and

    690. 

  690.  * 16 times Target MAC address stream in UDP payload. The options such like password are ignored. You can use any UDP source port number for WOL mode.

    691. 

  691.  */

    692. 

  692. #define MR_WOL                       0x20

    693. 

  693. 

    694. 

  694. /**

    695. 

  695.  * @brief Ping block

    696. 

  696.  * @details 0 : Disable Ping block\n

    697. 

  697.  * 1 : Enable Ping block\n

    698. 

  698.  * If the bit is  it blocks the response to a ping request.

    699. 

  699.  */

    700. 

  700. #define MR_PB                        0x10

    701. 

  701. 

    702. 

  702. /**

    703. 

  703.  * @brief Enable PPPoE

    704. 

  704.  * @details 0 : DisablePPPoE mode\n

    705. 

  705.  * 1 : EnablePPPoE mode\n

    706. 

  706.  * If you use ADSL, this bit should be 

    707. 

  707.  */

    708. 

  708. #define MR_PPPOE                     0x08

    709. 

  709. 

    710. 

  710. /**

    711. 

  711.  * @brief Enable UDP_FORCE_ARP CHECHK

    712. 

  712.  * @details 0 : Disable Force ARP mode\n

    713. 

  713.  * 1 : Enable Force ARP mode\n

    714. 

  714.  * In Force ARP mode, It forces on sending ARP Request whenever data is sent.

    715. 

  715.  */

    716. 

  716. #define MR_FARP                      0x02

    717. 

  717. 

    718. 

  718. /* IR register values */

    719. 

  719. /**

    720. 

  720.  * @brief Check IP conflict.

    721. 

  721.  * @details Bit is set as when own source IP address is same with the sender IP address in the received ARP request.

    722. 

  722.  */

    723. 

  723. #define IR_CONFLICT                  0x80

    724. 

  724. 

    725. 

  725. /**

    726. 

  726.  * @brief Get the destination unreachable message in UDP sending.

    727. 

  727.  * @details When receiving the ICMP (Destination port unreachable) packet, this bit is set as 

    728. 

  728.  * When this bit is  Destination Information such as IP address and Port number may be checked with the corresponding @ref UIPR & @ref UPORTR.

    729. 

  729.  */

    730. 

  730. #define IR_UNREACH                   0x40

    731. 

  731. 

    732. 

  732. /**

    733. 

  733.  * @brief Get the PPPoE close message.

    734. 

  734.  * @details When PPPoE is disconnected during PPPoE mode, this bit is set.

    735. 

  735.  */

    736. 

  736. #define IR_PPPoE                     0x20

    737. 

  737. 

    738. 

  738. /**

    739. 

  739.  * @brief Get the magic packet interrupt.

    740. 

  740.  * @details When WOL mode is enabled and receives the magic packet over UDP, this bit is set.

    741. 

  741.  */

    742. 

  742. #define IR_MP                        0x10

    743. 

  743. 

    744. 

  744. 

    745. 

  745. /* PHYCFGR register value */

    746. 

  746. #define PHYCFGR_RST                  ~(1<<7)  //< For PHY reset, must operate AND mask.

    747. 

  747. #define PHYCFGR_OPMD                 (1<<6)   // Configre PHY with OPMDC value

    748. 

  748. #define PHYCFGR_OPMDC_ALLA           (7<<3)

    749. 

  749. #define PHYCFGR_OPMDC_PDOWN          (6<<3)

    750. 

  750. #define PHYCFGR_OPMDC_NA             (5<<3)

    751. 

  751. #define PHYCFGR_OPMDC_100FA          (4<<3)

    752. 

  752. #define PHYCFGR_OPMDC_100F           (3<<3)

    753. 

  753. #define PHYCFGR_OPMDC_100H           (2<<3)

    754. 

  754. #define PHYCFGR_OPMDC_10F            (1<<3)

    755. 

  755. #define PHYCFGR_OPMDC_10H            (0<<3)           

    756. 

  756. #define PHYCFGR_DPX_FULL             (1<<2)

    757. 

  757. #define PHYCFGR_DPX_HALF             (0<<2)

    758. 

  758. #define PHYCFGR_SPD_100              (1<<1)

    759. 

  759. #define PHYCFGR_SPD_10               (0<<1)

    760. 

  760. #define PHYCFGR_LNK_ON               (1<<0)

    761. 

  761. #define PHYCFGR_LNK_OFF              (0<<0)

    762. 

  762. 

    763. 

  763. /* IMR register values */

    764. 

  764. /**

    765. 

  765.  * @brief IP Conflict Interrupt Mask.

    766. 

  766.  * @details 0: Disable IP Conflict Interrupt\n

    767. 

  767.  * 1: Enable IP Conflict Interrupt

    768. 

  768.  */

    769. 

  769. #define IM_IR7                  	 0x80

    770. 

  770. 

    771. 

  771. /**

    772. 

  772.  * @brief Destination unreachable Interrupt Mask.

    773. 

  773.  * @details 0: Disable Destination unreachable Interrupt\n

    774. 

  774.  * 1: Enable Destination unreachable Interrupt

    775. 

  775.  */

    776. 

  776. #define IM_IR6                  	 0x40

    777. 

  777. 

    778. 

  778. /**

    779. 

  779.  * @brief PPPoE Close Interrupt Mask.

    780. 

  780.  * @details 0: Disable PPPoE Close Interrupt\n

    781. 

  781.  * 1: Enable PPPoE Close Interrupt

    782. 

  782.  */

    783. 

  783. #define IM_IR5                  	 0x20

    784. 

  784. 

    785. 

  785. /**

    786. 

  786.  * @brief Magic Packet Interrupt Mask.

    787. 

  787.  * @details 0: Disable Magic Packet Interrupt\n

    788. 

  788.  * 1: Enable Magic Packet Interrupt

    789. 

  789.  */

    790. 

  790. #define IM_IR4                  	 0x10

    791. 

  791. 

    792. 

  792. /* Sn_MR Default values */

    793. 

  793. /**

    794. 

  794.  * @brief Support UDP Multicasting

    795. 

  795.  * @details 0 : disable Multicasting\n

    796. 

  796.  * 1 : enable Multicasting\n

    797. 

  797.  * This bit is applied only during UDP mode(P[3:0] = 010.\n

    798. 

  798.  * To use multicasting, @ref Sn_DIPR & @ref Sn_DPORT should be respectively configured with the multicast group IP address & port number

    799. 

  799.  * before Socket n is opened by OPEN command of @ref Sn_CR.

    800. 

  800.  */

    801. 

  801. #define Sn_MR_MULTI                  0x80

    802. 

  802. 

    803. 

  803. /**

    804. 

  804.  * @brief Broadcast block in UDP Multicasting.

    805. 

  805.  * @details 0 : disable Broadcast Blocking\n

    806. 

  806.  * 1 : enable Broadcast Blocking\n

    807. 

  807.  * This bit blocks to receive broadcasting packet during UDP mode(P[3:0] = 010.\m

    808. 

  808.  * In addition, This bit does when MACRAW mode(P[3:0] = 100

    809. 

  809.  */

    810. 

  810. #define Sn_MR_BCASTB                 0x40

    811. 

  811. 

    812. 

  812. /**

    813. 

  813.  * @brief No Delayed Ack(TCP), Multicast flag

    814. 

  814.  * @details 0 : Disable No Delayed ACK option\n

    815. 

  815.  * 1 : Enable No Delayed ACK option\n

    816. 

  816.  * This bit is applied only during TCP mode (P[3:0] = 001.\n

    817. 

  817.  * When this bit is  It sends the ACK packet without delay as soon as a Data packet is received from a peer.\n

    818. 

  818.  * When this bit is  It sends the ACK packet after waiting for the timeout time configured by @ref RTR.

    819. 

  819.  */

    820. 

  820. #define Sn_MR_ND                     0x20

    821. 

  821. 

    822. 

  822. /**

    823. 

  823.  * @brief Unicast Block in UDP Multicasting

    824. 

  824.  * @details 0 : disable Unicast Blocking\n

    825. 

  825.  * 1 : enable Unicast Blocking\n

    826. 

  826.  * This bit blocks receiving the unicast packet during UDP mode(P[3:0] = 010 and MULTI = 

    827. 

  827.  */

    828. 

  828. #define Sn_MR_UCASTB                 0x10

    829. 

  829. 

    830. 

  830. /**

    831. 

  831.  * @brief MAC LAYER RAW SOCK

    832. 

  832.  * @details This configures the protocol mode of Socket n.

    833. 

  833.  * @note MACRAW mode should be only used in Socket 0.

    834. 

  834.  */

    835. 

  835. #define Sn_MR_MACRAW                 0x04

    836. 

  836. 

    837. 

  837. //#define Sn_MR_IPRAW                  0x03     /**< IP LAYER RAW SOCK */

    838. 

  838. 

    839. 

  839. /**

    840. 

  840.  * @brief UDP

    841. 

  841.  * @details This configures the protocol mode of Socket n.

    842. 

  842.  */

    843. 

  843. #define Sn_MR_UDP                    0x02

    844. 

  844. 

    845. 

  845. /**

    846. 

  846.  * @brief TCP

    847. 

  847.  * @details This configures the protocol mode of Socket n.

    848. 

  848.  */

    849. 

  849. #define Sn_MR_TCP                    0x01

    850. 

  850. 

    851. 

  851. /**

    852. 

  852.  * @brief Unused socket

    853. 

  853.  * @details This configures the protocol mode of Socket n.

    854. 

  854.  */

    855. 

  855. #define Sn_MR_CLOSE                  0x00

    856. 

  856. 

    857. 

  857. /* Sn_MR values used with Sn_MR_MACRAW */

    858. 

  858. /**

    859. 

  859.  * @brief MAC filter enable in @ref Sn_MR_MACRAW mode

    860. 

  860.  * @details 0 : disable MAC Filtering\n

    861. 

  861.  * 1 : enable MAC Filtering\n

    862. 

  862.  * This bit is applied only during MACRAW mode(P[3:0] = 100.\n

    863. 

  863.  * When set as  W5500 can only receive broadcasting packet or packet sent to itself.

    864. 

  864.  * When this bit is  W5500 can receive all packets on Ethernet.

    865. 

  865.  * If user wants to implement Hybrid TCP/IP stack,

    866. 

  866.  * it is recommended that this bit is set as for reducing host overhead to process the all received packets.

    867. 

  867.  */

    868. 

  868. #define Sn_MR_MFEN                   Sn_MR_MULTI

    869. 

  869. 

    870. 

  870. /**

    871. 

  871.  * @brief Multicast Blocking in @ref Sn_MR_MACRAW mode

    872. 

  872.  * @details 0 : using IGMP version 2\n

    873. 

  873.  * 1 : using IGMP version 1\n

    874. 

  874.  * This bit is applied only during UDP mode(P[3:0] = 010 and MULTI = 

    875. 

  875.  * It configures the version for IGMP messages (Join/Leave/Report).

    876. 

  876.  */

    877. 

  877. #define Sn_MR_MMB                    Sn_MR_ND

    878. 

  878. 

    879. 

  879. /**

    880. 

  880.  * @brief IPv6 packet Blocking in @ref Sn_MR_MACRAW mode

    881. 

  881.  * @details 0 : disable IPv6 Blocking\n

    882. 

  882.  * 1 : enable IPv6 Blocking\n

    883. 

  883.  * This bit is applied only during MACRAW mode (P[3:0] = 100. It blocks to receiving the IPv6 packet.

    884. 

  884.  */

    885. 

  885. #define Sn_MR_MIP6B                  Sn_MR_UCASTB

    886. 

  886. 

    887. 

  887. /* Sn_MR value used with Sn_MR_UDP & Sn_MR_MULTI */

    888. 

  888. /**

    889. 

  889.  * @brief IGMP version used in UDP mulitcasting

    890. 

  890.  * @details 0 : disable Multicast Blocking\n

    891. 

  891.  * 1 : enable Multicast Blocking\n

    892. 

  892.  * This bit is applied only when MACRAW mode(P[3:0] = 100. It blocks to receive the packet with multicast MAC address.

    893. 

  893.  */

    894. 

  894. #define Sn_MR_MC                     Sn_MR_ND

    895. 

  895. 

    896. 

  896. /* Sn_MR alternate values */

    897. 

  897. /**

    898. 

  898.  * @brief For Berkeley Socket API

    899. 

  899.  */

    900. 

  900. #define SOCK_STREAM                  Sn_MR_TCP

    901. 

  901. 

    902. 

  902. /**

    903. 

  903.  * @brief For Berkeley Socket API

    904. 

  904.  */

    905. 

  905. #define SOCK_DGRAM                   Sn_MR_UDP

    906. 

  906. 

    907. 

  907. 

    908. 

  908. /* Sn_CR values */

    909. 

  909. /**

    910. 

  910.  * @brief Initialize or open socket

    911. 

  911.  * @details Socket n is initialized and opened according to the protocol selected in Sn_MR(P3:P0).

    912. 

  912.  * The table below shows the value of @ref Sn_SR corresponding to @ref Sn_MR.\n

    913. 

  913.  * <table>

    914. 

  914.  *   <tr>  <td>\b Sn_MR (P[3:0])</td> <td>\b Sn_SR</td>            		 </tr>

    915. 

  915.  *   <tr>  <td>Sn_MR_CLOSE  (000</td> <td></td>         	   		 </tr>

    916. 

  916.  *   <tr>  <td>Sn_MR_TCP  (001</td> <td>SOCK_INIT (0x13)</td>  		 </tr>

    917. 

  917.  *   <tr>  <td>Sn_MR_UDP  (010</td>  <td>SOCK_UDP (0x22)</td>  		 </tr>

    918. 

  918.  *   <tr>  <td>S0_MR_MACRAW  (100</td>  <td>SOCK_MACRAW (0x02)</td>  </tr>

    919. 

  919.  * </table>

    920. 

  920.  */

    921. 

  921. #define Sn_CR_OPEN                   0x01

    922. 

  922. 

    923. 

  923. /**

    924. 

  924.  * @brief Wait connection request in TCP mode(Server mode)

    925. 

  925.  * @details This is valid only in TCP mode (Sn_MR(P3:P0) = Sn_MR_TCP).

    926. 

  926.  * In this mode, Socket n operates as a �TCP serverand waits for  connection-request (SYN packet) from any �TCP client

    927. 

  927.  * The @ref Sn_SR changes the state from SOCK_INIT to SOCKET_LISTEN.

    928. 

  928.  * When a �TCP clientconnection request is successfully established,

    929. 

  929.  * the @ref Sn_SR changes from SOCK_LISTEN to SOCK_ESTABLISHED and the Sn_IR(0) becomes 

    930. 

  930.  * But when a �TCP clientconnection request is failed, Sn_IR(3) becomes and the status of @ref Sn_SR changes to SOCK_CLOSED.

    931. 

  931.  */

    932. 

  932. #define Sn_CR_LISTEN                 0x02

    933. 

  933. 

    934. 

  934. /**

    935. 

  935.  * @brief Send connection request in TCP mode(Client mode)

    936. 

  936.  * @details  To connect, a connect-request (SYN packet) is sent to b>TCP server</b>configured by @ref Sn_DIPR & Sn_DPORT(destination address & port).

    937. 

  937.  * If the connect-request is successful, the @ref Sn_SR is changed to @ref SOCK_ESTABLISHED and the Sn_IR(0) becomes \n\n

    938. 

  938.  * The connect-request fails in the following three cases.\n

    939. 

  939.  * 1. When a @b ARPTO occurs (@ref Sn_IR[3] =  ) because destination hardware address is not acquired through the ARP-process.\n

    940. 

  940.  * 2. When a @b SYN/ACK packet is not received and @b TCPTO (Sn_IR(3) =  )\n

    941. 

  941.  * 3. When a @b RST packet is received instead of a @b SYN/ACK packet. In these cases, @ref Sn_SR is changed to @ref SOCK_CLOSED.

    942. 

  942.  * @note This is valid only in TCP mode and operates when Socket n acts as b>TCP client</b>

    943. 

  943.  */

    944. 

  944. #define Sn_CR_CONNECT                0x04

    945. 

  945. 

    946. 

  946. /**

    947. 

  947.  * @brief Send closing request in TCP mode

    948. 

  948.  * @details Regardless of b>TCP server</b>or b>TCP client</b> the DISCON command processes the disconnect-process (b>Active close</b>or b>Passive close</b>.\n

    949. 

  949.  * @par Active close

    950. 

  950.  * it transmits disconnect-request(FIN packet) to the connected peer\n

    951. 

  951.  * @par Passive close

    952. 

  952.  * When FIN packet is received from peer, a FIN packet is replied back to the peer.\n

    953. 

  953.  * @details When the disconnect-process is successful (that is, FIN/ACK packet is received successfully), @ref Sn_SR is changed to @ref SOCK_CLOSED.\n

    954. 

  954.  * Otherwise, TCPTO occurs (Sn_IR(3)=)= and then @ref Sn_SR is changed to @ref SOCK_CLOSED.

    955. 

  955.  * @note Valid only in TCP mode.

    956. 

  956.  */

    957. 

  957. #define Sn_CR_DISCON                 0x08

    958. 

  958. 

    959. 

  959. /**

    960. 

  960.  * @brief Close socket

    961. 

  961.  * @details Sn_SR is changed to @ref SOCK_CLOSED.

    962. 

  962.  */

    963. 

  963. #define Sn_CR_CLOSE                  0x10

    964. 

  964. 

    965. 

  965. /**

    966. 

  966.  * @brief Update TX buffer pointer and send data

    967. 

  967.  * @details SEND transmits all the data in the Socket n TX buffer.\n

    968. 

  968.  * For more details, please refer to Socket n TX Free Size Register (@ref Sn_TX_FSR), Socket n,

    969. 

  969.  * TX Write Pointer Register(@ref Sn_TX_WR), and Socket n TX Read Pointer Register(@ref Sn_TX_RD).

    970. 

  970.  */

    971. 

  971. #define Sn_CR_SEND                   0x20

    972. 

  972. 

    973. 

  973. /**

    974. 

  974.  * @brief Send data with MAC address, so without ARP process

    975. 

  975.  * @details The basic operation is same as SEND.\n

    976. 

  976.  * Normally SEND transmits data after destination hardware address is acquired by the automatic ARP-process(Address Resolution Protocol).\n

    977. 

  977.  * But SEND_MAC transmits data without the automatic ARP-process.\n

    978. 

  978.  * In this case, the destination hardware address is acquired from @ref Sn_DHAR configured by host, instead of APR-process.

    979. 

  979.  * @note Valid only in UDP mode.

    980. 

  980.  */

    981. 

  981. #define Sn_CR_SEND_MAC               0x21

    982. 

  982. 

    983. 

  983. /**

    984. 

  984.  * @brief Send keep alive message

    985. 

  985.  * @details It checks the connection status by sending 1byte keep-alive packet.\n

    986. 

  986.  * If the peer can not respond to the keep-alive packet during timeout time, the connection is terminated and the timeout interrupt will occur.

    987. 

  987.  * @note Valid only in TCP mode.

    988. 

  988.  */

    989. 

  989. #define Sn_CR_SEND_KEEP              0x22

    990. 

  990. 

    991. 

  991. /**

    992. 

  992.  * @brief Update RX buffer pointer and receive data

    993. 

  993.  * @details RECV completes the processing of the received data in Socket n RX Buffer by using a RX read pointer register (@ref Sn_RX_RD).\n

    994. 

  994.  * For more details, refer to Socket n RX Received Size Register (@ref Sn_RX_RSR), Socket n RX Write Pointer Register (@ref Sn_RX_WR),

    995. 

  995.  * and Socket n RX Read Pointer Register (@ref Sn_RX_RD).

    996. 

  996.  */

    997. 

  997. #define Sn_CR_RECV                   0x40

    998. 

  998. 

    999. 

  999. /* Sn_IR values */

    1000. 

  1000. /**

    1001. 

  1001.  * @brief SEND_OK Interrupt

    1002. 

  1002.  * @details This is issued when SEND command is completed.

    1003. 

  1003.  */

    1004. 

  1004. #define Sn_IR_SENDOK                 0x10

    1005. 

  1005. 

    1006. 

  1006. /**

    1007. 

  1007.  * @brief TIMEOUT Interrupt

    1008. 

  1008.  * @details This is issued when ARPTO or TCPTO occurs.

    1009. 

  1009.  */

    1010. 

  1010. #define Sn_IR_TIMEOUT                0x08

    1011. 

  1011. 

    1012. 

  1012. /**

    1013. 

  1013.  * @brief RECV Interrupt

    1014. 

  1014.  * @details This is issued whenever data is received from a peer.

    1015. 

  1015.  */

    1016. 

  1016. #define Sn_IR_RECV                   0x04

    1017. 

  1017. 

    1018. 

  1018. /**

    1019. 

  1019.  * @brief DISCON Interrupt

    1020. 

  1020.  * @details This is issued when FIN or FIN/ACK packet is received from a peer.

    1021. 

  1021.  */

    1022. 

  1022. #define Sn_IR_DISCON                 0x02

    1023. 

  1023. 

    1024. 

  1024. /**

    1025. 

  1025.  * @brief CON Interrupt

    1026. 

  1026.  * @details This is issued one time when the connection with peer is successful and then @ref Sn_SR is changed to @ref SOCK_ESTABLISHED.

    1027. 

  1027.  */

    1028. 

  1028. #define Sn_IR_CON                    0x01

    1029. 

  1029. 

    1030. 

  1030. /* Sn_SR values */

    1031. 

  1031. /**

    1032. 

  1032.  * @brief Closed

    1033. 

  1033.  * @details This indicates that Socket n is released.\N

    1034. 

  1034.  * When DICON, CLOSE command is ordered, or when a timeout occurs, it is changed to @ref SOCK_CLOSED regardless of previous status.

    1035. 

  1035.  */

    1036. 

  1036. #define SOCK_CLOSED                  0x00

    1037. 

  1037. 

    1038. 

  1038. /**

    1039. 

  1039.  * @brief Initiate state

    1040. 

  1040.  * @details This indicates Socket n is opened with TCP mode.\N

    1041. 

  1041.  * It is changed to @ref SOCK_INIT when Sn_MR(P[3:0]) = 001and OPEN command is ordered.\N

    1042. 

  1042.  * After @ref SOCK_INIT, user can use LISTEN /CONNECT command.

    1043. 

  1043.  */

    1044. 

  1044. #define SOCK_INIT                    0x13

    1045. 

  1045. 

    1046. 

  1046. /**

    1047. 

  1047.  * @brief Listen state

    1048. 

  1048.  * @details This indicates Socket n is operating as b>TCP server</b>mode and waiting for connection-request (SYN packet) from a peer (b>TCP client</b>.\n

    1049. 

  1049.  * It will change to @ref SOCK_ESTALBLISHED when the connection-request is successfully accepted.\n

    1050. 

  1050.  * Otherwise it will change to @ref SOCK_CLOSED after TCPTO occurred (Sn_IR(TIMEOUT) = .

    1051. 

  1051.  */

    1052. 

  1052. #define SOCK_LISTEN                  0x14

    1053. 

  1053. 

    1054. 

  1054. /**

    1055. 

  1055.  * @brief Connection state

    1056. 

  1056.  * @details This indicates Socket n sent the connect-request packet (SYN packet) to a peer.\n

    1057. 

  1057.  * It is temporarily shown when @ref Sn_SR is changed from @ref SOCK_INIT to @ref SOCK_ESTABLISHED by CONNECT command.\n

    1058. 

  1058.  * If connect-accept(SYN/ACK packet) is received from the peer at SOCK_SYNSENT, it changes to @ref SOCK_ESTABLISHED.\n

    1059. 

  1059.  * Otherwise, it changes to @ref SOCK_CLOSED after TCPTO (@ref Sn_IR[TIMEOUT] =  is occurred.

    1060. 

  1060.  */

    1061. 

  1061. #define SOCK_SYNSENT                 0x15

    1062. 

  1062. 

    1063. 

  1063. /**

    1064. 

  1064.  * @brief Connection state

    1065. 

  1065.  * @details It indicates Socket n successfully received the connect-request packet (SYN packet) from a peer.\n

    1066. 

  1066.  * If socket n sends the response (SYN/ACK  packet) to the peer successfully,  it changes to @ref SOCK_ESTABLISHED. \n

    1067. 

  1067.  * If not, it changes to @ref SOCK_CLOSED after timeout occurs (@ref Sn_IR[TIMEOUT] = .

    1068. 

  1068.  */

    1069. 

  1069. #define SOCK_SYNRECV          …
    1070.

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