1// Code generated from _gen/386.rules using 'go generate'; DO NOT EDIT.23package ssa45import "math"6import "cmd/compile/internal/types"78func rewriteValue386(v *Value) bool {9	switch v.Op {10	case Op386ADCL:11		return rewriteValue386_Op386ADCL(v)12	case Op386ADDL:13		return rewriteValue386_Op386ADDL(v)14	case Op386ADDLcarry:15		return rewriteValue386_Op386ADDLcarry(v)16	case Op386ADDLconst:17		return rewriteValue386_Op386ADDLconst(v)18	case Op386ADDLconstmodify:19		return rewriteValue386_Op386ADDLconstmodify(v)20	case Op386ADDLload:21		return rewriteValue386_Op386ADDLload(v)22	case Op386ADDLmodify:23		return rewriteValue386_Op386ADDLmodify(v)24	case Op386ADDSD:25		return rewriteValue386_Op386ADDSD(v)26	case Op386ADDSDload:27		return rewriteValue386_Op386ADDSDload(v)28	case Op386ADDSS:29		return rewriteValue386_Op386ADDSS(v)30	case Op386ADDSSload:31		return rewriteValue386_Op386ADDSSload(v)32	case Op386ANDL:33		return rewriteValue386_Op386ANDL(v)34	case Op386ANDLconst:35		return rewriteValue386_Op386ANDLconst(v)36	case Op386ANDLconstmodify:37		return rewriteValue386_Op386ANDLconstmodify(v)38	case Op386ANDLload:39		return rewriteValue386_Op386ANDLload(v)40	case Op386ANDLmodify:41		return rewriteValue386_Op386ANDLmodify(v)42	case Op386CMPB:43		return rewriteValue386_Op386CMPB(v)44	case Op386CMPBconst:45		return rewriteValue386_Op386CMPBconst(v)46	case Op386CMPBload:47		return rewriteValue386_Op386CMPBload(v)48	case Op386CMPL:49		return rewriteValue386_Op386CMPL(v)50	case Op386CMPLconst:51		return rewriteValue386_Op386CMPLconst(v)52	case Op386CMPLload:53		return rewriteValue386_Op386CMPLload(v)54	case Op386CMPW:55		return rewriteValue386_Op386CMPW(v)56	case Op386CMPWconst:57		return rewriteValue386_Op386CMPWconst(v)58	case Op386CMPWload:59		return rewriteValue386_Op386CMPWload(v)60	case Op386DIVSD:61		return rewriteValue386_Op386DIVSD(v)62	case Op386DIVSDload:63		return rewriteValue386_Op386DIVSDload(v)64	case Op386DIVSS:65		return rewriteValue386_Op386DIVSS(v)66	case Op386DIVSSload:67		return rewriteValue386_Op386DIVSSload(v)68	case Op386LEAL:69		return rewriteValue386_Op386LEAL(v)70	case Op386LEAL1:71		return rewriteValue386_Op386LEAL1(v)72	case Op386LEAL2:73		return rewriteValue386_Op386LEAL2(v)74	case Op386LEAL4:75		return rewriteValue386_Op386LEAL4(v)76	case Op386LEAL8:77		return rewriteValue386_Op386LEAL8(v)78	case Op386LoweredPanicBoundsRC:79		return rewriteValue386_Op386LoweredPanicBoundsRC(v)80	case Op386LoweredPanicBoundsRR:81		return rewriteValue386_Op386LoweredPanicBoundsRR(v)82	case Op386LoweredPanicExtendRC:83		return rewriteValue386_Op386LoweredPanicExtendRC(v)84	case Op386LoweredPanicExtendRR:85		return rewriteValue386_Op386LoweredPanicExtendRR(v)86	case Op386MOVBLSX:87		return rewriteValue386_Op386MOVBLSX(v)88	case Op386MOVBLSXload:89		return rewriteValue386_Op386MOVBLSXload(v)90	case Op386MOVBLZX:91		return rewriteValue386_Op386MOVBLZX(v)92	case Op386MOVBload:93		return rewriteValue386_Op386MOVBload(v)94	case Op386MOVBstore:95		return rewriteValue386_Op386MOVBstore(v)96	case Op386MOVBstoreconst:97		return rewriteValue386_Op386MOVBstoreconst(v)98	case Op386MOVLload:99		return rewriteValue386_Op386MOVLload(v)100	case Op386MOVLstore:101		return rewriteValue386_Op386MOVLstore(v)102	case Op386MOVLstoreconst:103		return rewriteValue386_Op386MOVLstoreconst(v)104	case Op386MOVSDconst:105		return rewriteValue386_Op386MOVSDconst(v)106	case Op386MOVSDload:107		return rewriteValue386_Op386MOVSDload(v)108	case Op386MOVSDstore:109		return rewriteValue386_Op386MOVSDstore(v)110	case Op386MOVSSconst:111		return rewriteValue386_Op386MOVSSconst(v)112	case Op386MOVSSload:113		return rewriteValue386_Op386MOVSSload(v)114	case Op386MOVSSstore:115		return rewriteValue386_Op386MOVSSstore(v)116	case Op386MOVWLSX:117		return rewriteValue386_Op386MOVWLSX(v)118	case Op386MOVWLSXload:119		return rewriteValue386_Op386MOVWLSXload(v)120	case Op386MOVWLZX:121		return rewriteValue386_Op386MOVWLZX(v)122	case Op386MOVWload:123		return rewriteValue386_Op386MOVWload(v)124	case Op386MOVWstore:125		return rewriteValue386_Op386MOVWstore(v)126	case Op386MOVWstoreconst:127		return rewriteValue386_Op386MOVWstoreconst(v)128	case Op386MULL:129		return rewriteValue386_Op386MULL(v)130	case Op386MULLconst:131		return rewriteValue386_Op386MULLconst(v)132	case Op386MULLload:133		return rewriteValue386_Op386MULLload(v)134	case Op386MULSD:135		return rewriteValue386_Op386MULSD(v)136	case Op386MULSDload:137		return rewriteValue386_Op386MULSDload(v)138	case Op386MULSS:139		return rewriteValue386_Op386MULSS(v)140	case Op386MULSSload:141		return rewriteValue386_Op386MULSSload(v)142	case Op386NEGL:143		return rewriteValue386_Op386NEGL(v)144	case Op386NOTL:145		return rewriteValue386_Op386NOTL(v)146	case Op386ORL:147		return rewriteValue386_Op386ORL(v)148	case Op386ORLconst:149		return rewriteValue386_Op386ORLconst(v)150	case Op386ORLconstmodify:151		return rewriteValue386_Op386ORLconstmodify(v)152	case Op386ORLload:153		return rewriteValue386_Op386ORLload(v)154	case Op386ORLmodify:155		return rewriteValue386_Op386ORLmodify(v)156	case Op386ROLB:157		return rewriteValue386_Op386ROLB(v)158	case Op386ROLBconst:159		return rewriteValue386_Op386ROLBconst(v)160	case Op386ROLL:161		return rewriteValue386_Op386ROLL(v)162	case Op386ROLLconst:163		return rewriteValue386_Op386ROLLconst(v)164	case Op386ROLW:165		return rewriteValue386_Op386ROLW(v)166	case Op386ROLWconst:167		return rewriteValue386_Op386ROLWconst(v)168	case Op386SARB:169		return rewriteValue386_Op386SARB(v)170	case Op386SARBconst:171		return rewriteValue386_Op386SARBconst(v)172	case Op386SARL:173		return rewriteValue386_Op386SARL(v)174	case Op386SARLconst:175		return rewriteValue386_Op386SARLconst(v)176	case Op386SARW:177		return rewriteValue386_Op386SARW(v)178	case Op386SARWconst:179		return rewriteValue386_Op386SARWconst(v)180	case Op386SBBL:181		return rewriteValue386_Op386SBBL(v)182	case Op386SBBLcarrymask:183		return rewriteValue386_Op386SBBLcarrymask(v)184	case Op386SETA:185		return rewriteValue386_Op386SETA(v)186	case Op386SETAE:187		return rewriteValue386_Op386SETAE(v)188	case Op386SETB:189		return rewriteValue386_Op386SETB(v)190	case Op386SETBE:191		return rewriteValue386_Op386SETBE(v)192	case Op386SETEQ:193		return rewriteValue386_Op386SETEQ(v)194	case Op386SETG:195		return rewriteValue386_Op386SETG(v)196	case Op386SETGE:197		return rewriteValue386_Op386SETGE(v)198	case Op386SETL:199		return rewriteValue386_Op386SETL(v)200	case Op386SETLE:201		return rewriteValue386_Op386SETLE(v)202	case Op386SETNE:203		return rewriteValue386_Op386SETNE(v)204	case Op386SHLL:205		return rewriteValue386_Op386SHLL(v)206	case Op386SHLLconst:207		return rewriteValue386_Op386SHLLconst(v)208	case Op386SHRB:209		return rewriteValue386_Op386SHRB(v)210	case Op386SHRBconst:211		return rewriteValue386_Op386SHRBconst(v)212	case Op386SHRL:213		return rewriteValue386_Op386SHRL(v)214	case Op386SHRLconst:215		return rewriteValue386_Op386SHRLconst(v)216	case Op386SHRW:217		return rewriteValue386_Op386SHRW(v)218	case Op386SHRWconst:219		return rewriteValue386_Op386SHRWconst(v)220	case Op386SUBL:221		return rewriteValue386_Op386SUBL(v)222	case Op386SUBLcarry:223		return rewriteValue386_Op386SUBLcarry(v)224	case Op386SUBLconst:225		return rewriteValue386_Op386SUBLconst(v)226	case Op386SUBLload:227		return rewriteValue386_Op386SUBLload(v)228	case Op386SUBLmodify:229		return rewriteValue386_Op386SUBLmodify(v)230	case Op386SUBSD:231		return rewriteValue386_Op386SUBSD(v)232	case Op386SUBSDload:233		return rewriteValue386_Op386SUBSDload(v)234	case Op386SUBSS:235		return rewriteValue386_Op386SUBSS(v)236	case Op386SUBSSload:237		return rewriteValue386_Op386SUBSSload(v)238	case Op386XORL:239		return rewriteValue386_Op386XORL(v)240	case Op386XORLconst:241		return rewriteValue386_Op386XORLconst(v)242	case Op386XORLconstmodify:243		return rewriteValue386_Op386XORLconstmodify(v)244	case Op386XORLload:245		return rewriteValue386_Op386XORLload(v)246	case Op386XORLmodify:247		return rewriteValue386_Op386XORLmodify(v)248	case OpAdd16:249		v.Op = Op386ADDL250		return true251	case OpAdd32:252		v.Op = Op386ADDL253		return true254	case OpAdd32F:255		v.Op = Op386ADDSS256		return true257	case OpAdd32carry:258		v.Op = Op386ADDLcarry259		return true260	case OpAdd32carrywithcarry:261		v.Op = Op386ADCLcarry262		return true263	case OpAdd32withcarry:264		v.Op = Op386ADCL265		return true266	case OpAdd64F:267		v.Op = Op386ADDSD268		return true269	case OpAdd8:270		v.Op = Op386ADDL271		return true272	case OpAddPtr:273		v.Op = Op386ADDL274		return true275	case OpAddr:276		return rewriteValue386_OpAddr(v)277	case OpAnd16:278		v.Op = Op386ANDL279		return true280	case OpAnd32:281		v.Op = Op386ANDL282		return true283	case OpAnd8:284		v.Op = Op386ANDL285		return true286	case OpAndB:287		v.Op = Op386ANDL288		return true289	case OpAvg32u:290		v.Op = Op386AVGLU291		return true292	case OpBswap16:293		return rewriteValue386_OpBswap16(v)294	case OpBswap32:295		v.Op = Op386BSWAPL296		return true297	case OpClosureCall:298		v.Op = Op386CALLclosure299		return true300	case OpCom16:301		v.Op = Op386NOTL302		return true303	case OpCom32:304		v.Op = Op386NOTL305		return true306	case OpCom8:307		v.Op = Op386NOTL308		return true309	case OpConst16:310		return rewriteValue386_OpConst16(v)311	case OpConst32:312		v.Op = Op386MOVLconst313		return true314	case OpConst32F:315		v.Op = Op386MOVSSconst316		return true317	case OpConst64F:318		v.Op = Op386MOVSDconst319		return true320	case OpConst8:321		return rewriteValue386_OpConst8(v)322	case OpConstBool:323		return rewriteValue386_OpConstBool(v)324	case OpConstNil:325		return rewriteValue386_OpConstNil(v)326	case OpCtz16:327		return rewriteValue386_OpCtz16(v)328	case OpCtz16NonZero:329		v.Op = Op386BSFL330		return true331	case OpCtz32:332		v.Op = Op386LoweredCtz32333		return true334	case OpCtz32NonZero:335		v.Op = Op386BSFL336		return true337	case OpCtz64On32:338		v.Op = Op386LoweredCtz64339		return true340	case OpCtz8:341		return rewriteValue386_OpCtz8(v)342	case OpCtz8NonZero:343		v.Op = Op386BSFL344		return true345	case OpCvt32Fto32:346		v.Op = Op386CVTTSS2SL347		return true348	case OpCvt32Fto64F:349		v.Op = Op386CVTSS2SD350		return true351	case OpCvt32to32F:352		v.Op = Op386CVTSL2SS353		return true354	case OpCvt32to64F:355		v.Op = Op386CVTSL2SD356		return true357	case OpCvt64Fto32:358		v.Op = Op386CVTTSD2SL359		return true360	case OpCvt64Fto32F:361		v.Op = Op386CVTSD2SS362		return true363	case OpCvtBoolToUint8:364		v.Op = OpCopy365		return true366	case OpDiv16:367		v.Op = Op386DIVW368		return true369	case OpDiv16u:370		v.Op = Op386DIVWU371		return true372	case OpDiv32:373		v.Op = Op386DIVL374		return true375	case OpDiv32F:376		v.Op = Op386DIVSS377		return true378	case OpDiv32u:379		v.Op = Op386DIVLU380		return true381	case OpDiv64F:382		v.Op = Op386DIVSD383		return true384	case OpDiv8:385		return rewriteValue386_OpDiv8(v)386	case OpDiv8u:387		return rewriteValue386_OpDiv8u(v)388	case OpEq16:389		return rewriteValue386_OpEq16(v)390	case OpEq32:391		return rewriteValue386_OpEq32(v)392	case OpEq32F:393		return rewriteValue386_OpEq32F(v)394	case OpEq64F:395		return rewriteValue386_OpEq64F(v)396	case OpEq8:397		return rewriteValue386_OpEq8(v)398	case OpEqB:399		return rewriteValue386_OpEqB(v)400	case OpEqPtr:401		return rewriteValue386_OpEqPtr(v)402	case OpGetCallerPC:403		v.Op = Op386LoweredGetCallerPC404		return true405	case OpGetCallerSP:406		v.Op = Op386LoweredGetCallerSP407		return true408	case OpGetClosurePtr:409		v.Op = Op386LoweredGetClosurePtr410		return true411	case OpGetG:412		v.Op = Op386LoweredGetG413		return true414	case OpHmul32:415		v.Op = Op386HMULL416		return true417	case OpHmul32u:418		v.Op = Op386HMULLU419		return true420	case OpInterCall:421		v.Op = Op386CALLinter422		return true423	case OpIsInBounds:424		return rewriteValue386_OpIsInBounds(v)425	case OpIsNonNil:426		return rewriteValue386_OpIsNonNil(v)427	case OpIsSliceInBounds:428		return rewriteValue386_OpIsSliceInBounds(v)429	case OpLeq16:430		return rewriteValue386_OpLeq16(v)431	case OpLeq16U:432		return rewriteValue386_OpLeq16U(v)433	case OpLeq32:434		return rewriteValue386_OpLeq32(v)435	case OpLeq32F:436		return rewriteValue386_OpLeq32F(v)437	case OpLeq32U:438		return rewriteValue386_OpLeq32U(v)439	case OpLeq64F:440		return rewriteValue386_OpLeq64F(v)441	case OpLeq8:442		return rewriteValue386_OpLeq8(v)443	case OpLeq8U:444		return rewriteValue386_OpLeq8U(v)445	case OpLess16:446		return rewriteValue386_OpLess16(v)447	case OpLess16U:448		return rewriteValue386_OpLess16U(v)449	case OpLess32:450		return rewriteValue386_OpLess32(v)451	case OpLess32F:452		return rewriteValue386_OpLess32F(v)453	case OpLess32U:454		return rewriteValue386_OpLess32U(v)455	case OpLess64F:456		return rewriteValue386_OpLess64F(v)457	case OpLess8:458		return rewriteValue386_OpLess8(v)459	case OpLess8U:460		return rewriteValue386_OpLess8U(v)461	case OpLoad:462		return rewriteValue386_OpLoad(v)463	case OpLocalAddr:464		return rewriteValue386_OpLocalAddr(v)465	case OpLsh16x16:466		return rewriteValue386_OpLsh16x16(v)467	case OpLsh16x32:468		return rewriteValue386_OpLsh16x32(v)469	case OpLsh16x64:470		return rewriteValue386_OpLsh16x64(v)471	case OpLsh16x8:472		return rewriteValue386_OpLsh16x8(v)473	case OpLsh32x16:474		return rewriteValue386_OpLsh32x16(v)475	case OpLsh32x32:476		return rewriteValue386_OpLsh32x32(v)477	case OpLsh32x64:478		return rewriteValue386_OpLsh32x64(v)479	case OpLsh32x8:480		return rewriteValue386_OpLsh32x8(v)481	case OpLsh8x16:482		return rewriteValue386_OpLsh8x16(v)483	case OpLsh8x32:484		return rewriteValue386_OpLsh8x32(v)485	case OpLsh8x64:486		return rewriteValue386_OpLsh8x64(v)487	case OpLsh8x8:488		return rewriteValue386_OpLsh8x8(v)489	case OpMod16:490		v.Op = Op386MODW491		return true492	case OpMod16u:493		v.Op = Op386MODWU494		return true495	case OpMod32:496		v.Op = Op386MODL497		return true498	case OpMod32u:499		v.Op = Op386MODLU500		return true501	case OpMod8:502		return rewriteValue386_OpMod8(v)503	case OpMod8u:504		return rewriteValue386_OpMod8u(v)505	case OpMove:506		return rewriteValue386_OpMove(v)507	case OpMul16:508		v.Op = Op386MULL509		return true510	case OpMul32:511		v.Op = Op386MULL512		return true513	case OpMul32F:514		v.Op = Op386MULSS515		return true516	case OpMul32uhilo:517		v.Op = Op386MULLQU518		return true519	case OpMul64F:520		v.Op = Op386MULSD521		return true522	case OpMul8:523		v.Op = Op386MULL524		return true525	case OpNeg16:526		v.Op = Op386NEGL527		return true528	case OpNeg32:529		v.Op = Op386NEGL530		return true531	case OpNeg32F:532		return rewriteValue386_OpNeg32F(v)533	case OpNeg64F:534		return rewriteValue386_OpNeg64F(v)535	case OpNeg8:536		v.Op = Op386NEGL537		return true538	case OpNeq16:539		return rewriteValue386_OpNeq16(v)540	case OpNeq32:541		return rewriteValue386_OpNeq32(v)542	case OpNeq32F:543		return rewriteValue386_OpNeq32F(v)544	case OpNeq64F:545		return rewriteValue386_OpNeq64F(v)546	case OpNeq8:547		return rewriteValue386_OpNeq8(v)548	case OpNeqB:549		return rewriteValue386_OpNeqB(v)550	case OpNeqPtr:551		return rewriteValue386_OpNeqPtr(v)552	case OpNilCheck:553		v.Op = Op386LoweredNilCheck554		return true555	case OpNot:556		return rewriteValue386_OpNot(v)557	case OpOffPtr:558		return rewriteValue386_OpOffPtr(v)559	case OpOr16:560		v.Op = Op386ORL561		return true562	case OpOr32:563		v.Op = Op386ORL564		return true565	case OpOr8:566		v.Op = Op386ORL567		return true568	case OpOrB:569		v.Op = Op386ORL570		return true571	case OpPanicBounds:572		v.Op = Op386LoweredPanicBoundsRR573		return true574	case OpPanicExtend:575		v.Op = Op386LoweredPanicExtendRR576		return true577	case OpRotateLeft16:578		v.Op = Op386ROLW579		return true580	case OpRotateLeft32:581		v.Op = Op386ROLL582		return true583	case OpRotateLeft8:584		v.Op = Op386ROLB585		return true586	case OpRound32F:587		v.Op = OpCopy588		return true589	case OpRound64F:590		v.Op = OpCopy591		return true592	case OpRsh16Ux16:593		return rewriteValue386_OpRsh16Ux16(v)594	case OpRsh16Ux32:595		return rewriteValue386_OpRsh16Ux32(v)596	case OpRsh16Ux64:597		return rewriteValue386_OpRsh16Ux64(v)598	case OpRsh16Ux8:599		return rewriteValue386_OpRsh16Ux8(v)600	case OpRsh16x16:601		return rewriteValue386_OpRsh16x16(v)602	case OpRsh16x32:603		return rewriteValue386_OpRsh16x32(v)604	case OpRsh16x64:605		return rewriteValue386_OpRsh16x64(v)606	case OpRsh16x8:607		return rewriteValue386_OpRsh16x8(v)608	case OpRsh32Ux16:609		return rewriteValue386_OpRsh32Ux16(v)610	case OpRsh32Ux32:611		return rewriteValue386_OpRsh32Ux32(v)612	case OpRsh32Ux64:613		return rewriteValue386_OpRsh32Ux64(v)614	case OpRsh32Ux8:615		return rewriteValue386_OpRsh32Ux8(v)616	case OpRsh32x16:617		return rewriteValue386_OpRsh32x16(v)618	case OpRsh32x32:619		return rewriteValue386_OpRsh32x32(v)620	case OpRsh32x64:621		return rewriteValue386_OpRsh32x64(v)622	case OpRsh32x8:623		return rewriteValue386_OpRsh32x8(v)624	case OpRsh8Ux16:625		return rewriteValue386_OpRsh8Ux16(v)626	case OpRsh8Ux32:627		return rewriteValue386_OpRsh8Ux32(v)628	case OpRsh8Ux64:629		return rewriteValue386_OpRsh8Ux64(v)630	case OpRsh8Ux8:631		return rewriteValue386_OpRsh8Ux8(v)632	case OpRsh8x16:633		return rewriteValue386_OpRsh8x16(v)634	case OpRsh8x32:635		return rewriteValue386_OpRsh8x32(v)636	case OpRsh8x64:637		return rewriteValue386_OpRsh8x64(v)638	case OpRsh8x8:639		return rewriteValue386_OpRsh8x8(v)640	case OpSelect0:641		return rewriteValue386_OpSelect0(v)642	case OpSelect1:643		return rewriteValue386_OpSelect1(v)644	case OpSignExt16to32:645		v.Op = Op386MOVWLSX646		return true647	case OpSignExt8to16:648		v.Op = Op386MOVBLSX649		return true650	case OpSignExt8to32:651		v.Op = Op386MOVBLSX652		return true653	case OpSignmask:654		return rewriteValue386_OpSignmask(v)655	case OpSlicemask:656		return rewriteValue386_OpSlicemask(v)657	case OpSqrt:658		v.Op = Op386SQRTSD659		return true660	case OpSqrt32:661		v.Op = Op386SQRTSS662		return true663	case OpStaticCall:664		v.Op = Op386CALLstatic665		return true666	case OpStore:667		return rewriteValue386_OpStore(v)668	case OpSub16:669		v.Op = Op386SUBL670		return true671	case OpSub32:672		v.Op = Op386SUBL673		return true674	case OpSub32F:675		v.Op = Op386SUBSS676		return true677	case OpSub32carry:678		v.Op = Op386SUBLcarry679		return true680	case OpSub32withcarry:681		v.Op = Op386SBBL682		return true683	case OpSub64F:684		v.Op = Op386SUBSD685		return true686	case OpSub8:687		v.Op = Op386SUBL688		return true689	case OpSubPtr:690		v.Op = Op386SUBL691		return true692	case OpTailCall:693		v.Op = Op386CALLtail694		return true695	case OpTailCallInter:696		v.Op = Op386CALLtailinter697		return true698	case OpTrunc16to8:699		v.Op = OpCopy700		return true701	case OpTrunc32to16:702		v.Op = OpCopy703		return true704	case OpTrunc32to8:705		v.Op = OpCopy706		return true707	case OpWB:708		v.Op = Op386LoweredWB709		return true710	case OpXor16:711		v.Op = Op386XORL712		return true713	case OpXor32:714		v.Op = Op386XORL715		return true716	case OpXor8:717		v.Op = Op386XORL718		return true719	case OpZero:720		return rewriteValue386_OpZero(v)721	case OpZeroExt16to32:722		v.Op = Op386MOVWLZX723		return true724	case OpZeroExt8to16:725		v.Op = Op386MOVBLZX726		return true727	case OpZeroExt8to32:728		v.Op = Op386MOVBLZX729		return true730	case OpZeromask:731		return rewriteValue386_OpZeromask(v)732	}733	return false734}735func rewriteValue386_Op386ADCL(v *Value) bool {736	v_2 := v.Args[2]737	v_1 := v.Args[1]738	v_0 := v.Args[0]739	// match: (ADCL x (MOVLconst [c]) f)740	// result: (ADCLconst [c] x f)741	for {742		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {743			x := v_0744			if v_1.Op != Op386MOVLconst {745				continue746			}747			c := auxIntToInt32(v_1.AuxInt)748			f := v_2749			v.reset(Op386ADCLconst)750			v.AuxInt = int32ToAuxInt(c)751			v.AddArg2(x, f)752			return true753		}754		break755	}756	return false757}758func rewriteValue386_Op386ADDL(v *Value) bool {759	v_1 := v.Args[1]760	v_0 := v.Args[0]761	// match: (ADDL x (MOVLconst <t> [c]))762	// cond: !t.IsPtr()763	// result: (ADDLconst [c] x)764	for {765		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {766			x := v_0767			if v_1.Op != Op386MOVLconst {768				continue769			}770			t := v_1.Type771			c := auxIntToInt32(v_1.AuxInt)772			if !(!t.IsPtr()) {773				continue774			}775			v.reset(Op386ADDLconst)776			v.AuxInt = int32ToAuxInt(c)777			v.AddArg(x)778			return true779		}780		break781	}782	// match: (ADDL x (SHLLconst [3] y))783	// result: (LEAL8 x y)784	for {785		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {786			x := v_0787			if v_1.Op != Op386SHLLconst || auxIntToInt32(v_1.AuxInt) != 3 {788				continue789			}790			y := v_1.Args[0]791			v.reset(Op386LEAL8)792			v.AddArg2(x, y)793			return true794		}795		break796	}797	// match: (ADDL x (SHLLconst [2] y))798	// result: (LEAL4 x y)799	for {800		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {801			x := v_0802			if v_1.Op != Op386SHLLconst || auxIntToInt32(v_1.AuxInt) != 2 {803				continue804			}805			y := v_1.Args[0]806			v.reset(Op386LEAL4)807			v.AddArg2(x, y)808			return true809		}810		break811	}812	// match: (ADDL x (SHLLconst [1] y))813	// result: (LEAL2 x y)814	for {815		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {816			x := v_0817			if v_1.Op != Op386SHLLconst || auxIntToInt32(v_1.AuxInt) != 1 {818				continue819			}820			y := v_1.Args[0]821			v.reset(Op386LEAL2)822			v.AddArg2(x, y)823			return true824		}825		break826	}827	// match: (ADDL x (ADDL y y))828	// result: (LEAL2 x y)829	for {830		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {831			x := v_0832			if v_1.Op != Op386ADDL {833				continue834			}835			y := v_1.Args[1]836			if y != v_1.Args[0] {837				continue838			}839			v.reset(Op386LEAL2)840			v.AddArg2(x, y)841			return true842		}843		break844	}845	// match: (ADDL x (ADDL x y))846	// result: (LEAL2 y x)847	for {848		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {849			x := v_0850			if v_1.Op != Op386ADDL {851				continue852			}853			_ = v_1.Args[1]854			v_1_0 := v_1.Args[0]855			v_1_1 := v_1.Args[1]856			for _i1 := 0; _i1 <= 1; _i1, v_1_0, v_1_1 = _i1+1, v_1_1, v_1_0 {857				if x != v_1_0 {858					continue859				}860				y := v_1_1861				v.reset(Op386LEAL2)862				v.AddArg2(y, x)863				return true864			}865		}866		break867	}868	// match: (ADDL (ADDLconst [c] x) y)869	// result: (LEAL1 [c] x y)870	for {871		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {872			if v_0.Op != Op386ADDLconst {873				continue874			}875			c := auxIntToInt32(v_0.AuxInt)876			x := v_0.Args[0]877			y := v_1878			v.reset(Op386LEAL1)879			v.AuxInt = int32ToAuxInt(c)880			v.AddArg2(x, y)881			return true882		}883		break884	}885	// match: (ADDL x (LEAL [c] {s} y))886	// cond: x.Op != OpSB && y.Op != OpSB887	// result: (LEAL1 [c] {s} x y)888	for {889		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {890			x := v_0891			if v_1.Op != Op386LEAL {892				continue893			}894			c := auxIntToInt32(v_1.AuxInt)895			s := auxToSym(v_1.Aux)896			y := v_1.Args[0]897			if !(x.Op != OpSB && y.Op != OpSB) {898				continue899			}900			v.reset(Op386LEAL1)901			v.AuxInt = int32ToAuxInt(c)902			v.Aux = symToAux(s)903			v.AddArg2(x, y)904			return true905		}906		break907	}908	// match: (ADDL x l:(MOVLload [off] {sym} ptr mem))909	// cond: canMergeLoadClobber(v, l, x) && clobber(l)910	// result: (ADDLload x [off] {sym} ptr mem)911	for {912		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {913			x := v_0914			l := v_1915			if l.Op != Op386MOVLload {916				continue917			}918			off := auxIntToInt32(l.AuxInt)919			sym := auxToSym(l.Aux)920			mem := l.Args[1]921			ptr := l.Args[0]922			if !(canMergeLoadClobber(v, l, x) && clobber(l)) {923				continue924			}925			v.reset(Op386ADDLload)926			v.AuxInt = int32ToAuxInt(off)927			v.Aux = symToAux(sym)928			v.AddArg3(x, ptr, mem)929			return true930		}931		break932	}933	// match: (ADDL x (NEGL y))934	// result: (SUBL x y)935	for {936		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {937			x := v_0938			if v_1.Op != Op386NEGL {939				continue940			}941			y := v_1.Args[0]942			v.reset(Op386SUBL)943			v.AddArg2(x, y)944			return true945		}946		break947	}948	return false949}950func rewriteValue386_Op386ADDLcarry(v *Value) bool {951	v_1 := v.Args[1]952	v_0 := v.Args[0]953	// match: (ADDLcarry x (MOVLconst [c]))954	// result: (ADDLconstcarry [c] x)955	for {956		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {957			x := v_0958			if v_1.Op != Op386MOVLconst {959				continue960			}961			c := auxIntToInt32(v_1.AuxInt)962			v.reset(Op386ADDLconstcarry)963			v.AuxInt = int32ToAuxInt(c)964			v.AddArg(x)965			return true966		}967		break968	}969	return false970}971func rewriteValue386_Op386ADDLconst(v *Value) bool {972	v_0 := v.Args[0]973	// match: (ADDLconst [c] (ADDL x y))974	// result: (LEAL1 [c] x y)975	for {976		c := auxIntToInt32(v.AuxInt)977		if v_0.Op != Op386ADDL {978			break979		}980		y := v_0.Args[1]981		x := v_0.Args[0]982		v.reset(Op386LEAL1)983		v.AuxInt = int32ToAuxInt(c)984		v.AddArg2(x, y)985		return true986	}987	// match: (ADDLconst [c] (LEAL [d] {s} x))988	// cond: is32Bit(int64(c)+int64(d))989	// result: (LEAL [c+d] {s} x)990	for {991		c := auxIntToInt32(v.AuxInt)992		if v_0.Op != Op386LEAL {993			break994		}995		d := auxIntToInt32(v_0.AuxInt)996		s := auxToSym(v_0.Aux)997		x := v_0.Args[0]998		if !(is32Bit(int64(c) + int64(d))) {999			break1000		}1001		v.reset(Op386LEAL)1002		v.AuxInt = int32ToAuxInt(c + d)1003		v.Aux = symToAux(s)1004		v.AddArg(x)1005		return true1006	}1007	// match: (ADDLconst [c] x:(SP))1008	// result: (LEAL [c] x)1009	for {1010		c := auxIntToInt32(v.AuxInt)1011		x := v_01012		if x.Op != OpSP {1013			break1014		}1015		v.reset(Op386LEAL)1016		v.AuxInt = int32ToAuxInt(c)1017		v.AddArg(x)1018		return true1019	}1020	// match: (ADDLconst [c] (LEAL1 [d] {s} x y))1021	// cond: is32Bit(int64(c)+int64(d))1022	// result: (LEAL1 [c+d] {s} x y)1023	for {1024		c := auxIntToInt32(v.AuxInt)1025		if v_0.Op != Op386LEAL1 {1026			break1027		}1028		d := auxIntToInt32(v_0.AuxInt)1029		s := auxToSym(v_0.Aux)1030		y := v_0.Args[1]1031		x := v_0.Args[0]1032		if !(is32Bit(int64(c) + int64(d))) {1033			break1034		}1035		v.reset(Op386LEAL1)1036		v.AuxInt = int32ToAuxInt(c + d)1037		v.Aux = symToAux(s)1038		v.AddArg2(x, y)1039		return true1040	}1041	// match: (ADDLconst [c] (LEAL2 [d] {s} x y))1042	// cond: is32Bit(int64(c)+int64(d))1043	// result: (LEAL2 [c+d] {s} x y)1044	for {1045		c := auxIntToInt32(v.AuxInt)1046		if v_0.Op != Op386LEAL2 {1047			break1048		}1049		d := auxIntToInt32(v_0.AuxInt)1050		s := auxToSym(v_0.Aux)1051		y := v_0.Args[1]1052		x := v_0.Args[0]1053		if !(is32Bit(int64(c) + int64(d))) {1054			break1055		}1056		v.reset(Op386LEAL2)1057		v.AuxInt = int32ToAuxInt(c + d)1058		v.Aux = symToAux(s)1059		v.AddArg2(x, y)1060		return true1061	}1062	// match: (ADDLconst [c] (LEAL4 [d] {s} x y))1063	// cond: is32Bit(int64(c)+int64(d))1064	// result: (LEAL4 [c+d] {s} x y)1065	for {1066		c := auxIntToInt32(v.AuxInt)1067		if v_0.Op != Op386LEAL4 {1068			break1069		}1070		d := auxIntToInt32(v_0.AuxInt)1071		s := auxToSym(v_0.Aux)1072		y := v_0.Args[1]1073		x := v_0.Args[0]1074		if !(is32Bit(int64(c) + int64(d))) {1075			break1076		}1077		v.reset(Op386LEAL4)1078		v.AuxInt = int32ToAuxInt(c + d)1079		v.Aux = symToAux(s)1080		v.AddArg2(x, y)1081		return true1082	}1083	// match: (ADDLconst [c] (LEAL8 [d] {s} x y))1084	// cond: is32Bit(int64(c)+int64(d))1085	// result: (LEAL8 [c+d] {s} x y)1086	for {1087		c := auxIntToInt32(v.AuxInt)1088		if v_0.Op != Op386LEAL8 {1089			break1090		}1091		d := auxIntToInt32(v_0.AuxInt)1092		s := auxToSym(v_0.Aux)1093		y := v_0.Args[1]1094		x := v_0.Args[0]1095		if !(is32Bit(int64(c) + int64(d))) {1096			break1097		}1098		v.reset(Op386LEAL8)1099		v.AuxInt = int32ToAuxInt(c + d)1100		v.Aux = symToAux(s)1101		v.AddArg2(x, y)1102		return true1103	}1104	// match: (ADDLconst [c] x)1105	// cond: c==01106	// result: x1107	for {1108		c := auxIntToInt32(v.AuxInt)1109		x := v_01110		if !(c == 0) {1111			break1112		}1113		v.copyOf(x)1114		return true1115	}1116	// match: (ADDLconst [c] (MOVLconst [d]))1117	// result: (MOVLconst [c+d])1118	for {1119		c := auxIntToInt32(v.AuxInt)1120		if v_0.Op != Op386MOVLconst {1121			break1122		}1123		d := auxIntToInt32(v_0.AuxInt)1124		v.reset(Op386MOVLconst)1125		v.AuxInt = int32ToAuxInt(c + d)1126		return true1127	}1128	// match: (ADDLconst [c] (ADDLconst [d] x))1129	// result: (ADDLconst [c+d] x)1130	for {1131		c := auxIntToInt32(v.AuxInt)1132		if v_0.Op != Op386ADDLconst {1133			break1134		}1135		d := auxIntToInt32(v_0.AuxInt)1136		x := v_0.Args[0]1137		v.reset(Op386ADDLconst)1138		v.AuxInt = int32ToAuxInt(c + d)1139		v.AddArg(x)1140		return true1141	}1142	return false1143}1144func rewriteValue386_Op386ADDLconstmodify(v *Value) bool {1145	v_1 := v.Args[1]1146	v_0 := v.Args[0]1147	b := v.Block1148	config := b.Func.Config1149	// match: (ADDLconstmodify [valoff1] {sym} (ADDLconst [off2] base) mem)1150	// cond: valoff1.canAdd32(off2)1151	// result: (ADDLconstmodify [valoff1.addOffset32(off2)] {sym} base mem)1152	for {1153		valoff1 := auxIntToValAndOff(v.AuxInt)1154		sym := auxToSym(v.Aux)1155		if v_0.Op != Op386ADDLconst {1156			break1157		}1158		off2 := auxIntToInt32(v_0.AuxInt)1159		base := v_0.Args[0]1160		mem := v_11161		if !(valoff1.canAdd32(off2)) {1162			break1163		}1164		v.reset(Op386ADDLconstmodify)1165		v.AuxInt = valAndOffToAuxInt(valoff1.addOffset32(off2))1166		v.Aux = symToAux(sym)1167		v.AddArg2(base, mem)1168		return true1169	}1170	// match: (ADDLconstmodify [valoff1] {sym1} (LEAL [off2] {sym2} base) mem)1171	// cond: valoff1.canAdd32(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)1172	// result: (ADDLconstmodify [valoff1.addOffset32(off2)] {mergeSym(sym1,sym2)} base mem)1173	for {1174		valoff1 := auxIntToValAndOff(v.AuxInt)1175		sym1 := auxToSym(v.Aux)1176		if v_0.Op != Op386LEAL {1177			break1178		}1179		off2 := auxIntToInt32(v_0.AuxInt)1180		sym2 := auxToSym(v_0.Aux)1181		base := v_0.Args[0]1182		mem := v_11183		if !(valoff1.canAdd32(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {1184			break1185		}1186		v.reset(Op386ADDLconstmodify)1187		v.AuxInt = valAndOffToAuxInt(valoff1.addOffset32(off2))1188		v.Aux = symToAux(mergeSym(sym1, sym2))1189		v.AddArg2(base, mem)1190		return true1191	}1192	return false1193}1194func rewriteValue386_Op386ADDLload(v *Value) bool {1195	v_2 := v.Args[2]1196	v_1 := v.Args[1]1197	v_0 := v.Args[0]1198	b := v.Block1199	config := b.Func.Config1200	// match: (ADDLload [off1] {sym} val (ADDLconst [off2] base) mem)1201	// cond: is32Bit(int64(off1)+int64(off2))1202	// result: (ADDLload [off1+off2] {sym} val base mem)1203	for {1204		off1 := auxIntToInt32(v.AuxInt)1205		sym := auxToSym(v.Aux)1206		val := v_01207		if v_1.Op != Op386ADDLconst {1208			break1209		}1210		off2 := auxIntToInt32(v_1.AuxInt)1211		base := v_1.Args[0]1212		mem := v_21213		if !(is32Bit(int64(off1) + int64(off2))) {1214			break1215		}1216		v.reset(Op386ADDLload)1217		v.AuxInt = int32ToAuxInt(off1 + off2)1218		v.Aux = symToAux(sym)1219		v.AddArg3(val, base, mem)1220		return true1221	}1222	// match: (ADDLload [off1] {sym1} val (LEAL [off2] {sym2} base) mem)1223	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)1224	// result: (ADDLload [off1+off2] {mergeSym(sym1,sym2)} val base mem)1225	for {1226		off1 := auxIntToInt32(v.AuxInt)1227		sym1 := auxToSym(v.Aux)1228		val := v_01229		if v_1.Op != Op386LEAL {1230			break1231		}1232		off2 := auxIntToInt32(v_1.AuxInt)1233		sym2 := auxToSym(v_1.Aux)1234		base := v_1.Args[0]1235		mem := v_21236		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {1237			break1238		}1239		v.reset(Op386ADDLload)1240		v.AuxInt = int32ToAuxInt(off1 + off2)1241		v.Aux = symToAux(mergeSym(sym1, sym2))1242		v.AddArg3(val, base, mem)1243		return true1244	}1245	return false1246}1247func rewriteValue386_Op386ADDLmodify(v *Value) bool {1248	v_2 := v.Args[2]1249	v_1 := v.Args[1]1250	v_0 := v.Args[0]1251	b := v.Block1252	config := b.Func.Config1253	// match: (ADDLmodify [off1] {sym} (ADDLconst [off2] base) val mem)1254	// cond: is32Bit(int64(off1)+int64(off2))1255	// result: (ADDLmodify [off1+off2] {sym} base val mem)1256	for {1257		off1 := auxIntToInt32(v.AuxInt)1258		sym := auxToSym(v.Aux)1259		if v_0.Op != Op386ADDLconst {1260			break1261		}1262		off2 := auxIntToInt32(v_0.AuxInt)1263		base := v_0.Args[0]1264		val := v_11265		mem := v_21266		if !(is32Bit(int64(off1) + int64(off2))) {1267			break1268		}1269		v.reset(Op386ADDLmodify)1270		v.AuxInt = int32ToAuxInt(off1 + off2)1271		v.Aux = symToAux(sym)1272		v.AddArg3(base, val, mem)1273		return true1274	}1275	// match: (ADDLmodify [off1] {sym1} (LEAL [off2] {sym2} base) val mem)1276	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)1277	// result: (ADDLmodify [off1+off2] {mergeSym(sym1,sym2)} base val mem)1278	for {1279		off1 := auxIntToInt32(v.AuxInt)1280		sym1 := auxToSym(v.Aux)1281		if v_0.Op != Op386LEAL {1282			break1283		}1284		off2 := auxIntToInt32(v_0.AuxInt)1285		sym2 := auxToSym(v_0.Aux)1286		base := v_0.Args[0]1287		val := v_11288		mem := v_21289		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {1290			break1291		}1292		v.reset(Op386ADDLmodify)1293		v.AuxInt = int32ToAuxInt(off1 + off2)1294		v.Aux = symToAux(mergeSym(sym1, sym2))1295		v.AddArg3(base, val, mem)1296		return true1297	}1298	return false1299}1300func rewriteValue386_Op386ADDSD(v *Value) bool {1301	v_1 := v.Args[1]1302	v_0 := v.Args[0]1303	// match: (ADDSD x l:(MOVSDload [off] {sym} ptr mem))1304	// cond: canMergeLoadClobber(v, l, x) && clobber(l)1305	// result: (ADDSDload x [off] {sym} ptr mem)1306	for {1307		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1308			x := v_01309			l := v_11310			if l.Op != Op386MOVSDload {1311				continue1312			}1313			off := auxIntToInt32(l.AuxInt)1314			sym := auxToSym(l.Aux)1315			mem := l.Args[1]1316			ptr := l.Args[0]1317			if !(canMergeLoadClobber(v, l, x) && clobber(l)) {1318				continue1319			}1320			v.reset(Op386ADDSDload)1321			v.AuxInt = int32ToAuxInt(off)1322			v.Aux = symToAux(sym)1323			v.AddArg3(x, ptr, mem)1324			return true1325		}1326		break1327	}1328	return false1329}1330func rewriteValue386_Op386ADDSDload(v *Value) bool {1331	v_2 := v.Args[2]1332	v_1 := v.Args[1]1333	v_0 := v.Args[0]1334	b := v.Block1335	config := b.Func.Config1336	// match: (ADDSDload [off1] {sym} val (ADDLconst [off2] base) mem)1337	// cond: is32Bit(int64(off1)+int64(off2))1338	// result: (ADDSDload [off1+off2] {sym} val base mem)1339	for {1340		off1 := auxIntToInt32(v.AuxInt)1341		sym := auxToSym(v.Aux)1342		val := v_01343		if v_1.Op != Op386ADDLconst {1344			break1345		}1346		off2 := auxIntToInt32(v_1.AuxInt)1347		base := v_1.Args[0]1348		mem := v_21349		if !(is32Bit(int64(off1) + int64(off2))) {1350			break1351		}1352		v.reset(Op386ADDSDload)1353		v.AuxInt = int32ToAuxInt(off1 + off2)1354		v.Aux = symToAux(sym)1355		v.AddArg3(val, base, mem)1356		return true1357	}1358	// match: (ADDSDload [off1] {sym1} val (LEAL [off2] {sym2} base) mem)1359	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)1360	// result: (ADDSDload [off1+off2] {mergeSym(sym1,sym2)} val base mem)1361	for {1362		off1 := auxIntToInt32(v.AuxInt)1363		sym1 := auxToSym(v.Aux)1364		val := v_01365		if v_1.Op != Op386LEAL {1366			break1367		}1368		off2 := auxIntToInt32(v_1.AuxInt)1369		sym2 := auxToSym(v_1.Aux)1370		base := v_1.Args[0]1371		mem := v_21372		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {1373			break1374		}1375		v.reset(Op386ADDSDload)1376		v.AuxInt = int32ToAuxInt(off1 + off2)1377		v.Aux = symToAux(mergeSym(sym1, sym2))1378		v.AddArg3(val, base, mem)1379		return true1380	}1381	return false1382}1383func rewriteValue386_Op386ADDSS(v *Value) bool {1384	v_1 := v.Args[1]1385	v_0 := v.Args[0]1386	// match: (ADDSS x l:(MOVSSload [off] {sym} ptr mem))1387	// cond: canMergeLoadClobber(v, l, x) && clobber(l)1388	// result: (ADDSSload x [off] {sym} ptr mem)1389	for {1390		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1391			x := v_01392			l := v_11393			if l.Op != Op386MOVSSload {1394				continue1395			}1396			off := auxIntToInt32(l.AuxInt)1397			sym := auxToSym(l.Aux)1398			mem := l.Args[1]1399			ptr := l.Args[0]1400			if !(canMergeLoadClobber(v, l, x) && clobber(l)) {1401				continue1402			}1403			v.reset(Op386ADDSSload)1404			v.AuxInt = int32ToAuxInt(off)1405			v.Aux = symToAux(sym)1406			v.AddArg3(x, ptr, mem)1407			return true1408		}1409		break1410	}1411	return false1412}1413func rewriteValue386_Op386ADDSSload(v *Value) bool {1414	v_2 := v.Args[2]1415	v_1 := v.Args[1]1416	v_0 := v.Args[0]1417	b := v.Block1418	config := b.Func.Config1419	// match: (ADDSSload [off1] {sym} val (ADDLconst [off2] base) mem)1420	// cond: is32Bit(int64(off1)+int64(off2))1421	// result: (ADDSSload [off1+off2] {sym} val base mem)1422	for {1423		off1 := auxIntToInt32(v.AuxInt)1424		sym := auxToSym(v.Aux)1425		val := v_01426		if v_1.Op != Op386ADDLconst {1427			break1428		}1429		off2 := auxIntToInt32(v_1.AuxInt)1430		base := v_1.Args[0]1431		mem := v_21432		if !(is32Bit(int64(off1) + int64(off2))) {1433			break1434		}1435		v.reset(Op386ADDSSload)1436		v.AuxInt = int32ToAuxInt(off1 + off2)1437		v.Aux = symToAux(sym)1438		v.AddArg3(val, base, mem)1439		return true1440	}1441	// match: (ADDSSload [off1] {sym1} val (LEAL [off2] {sym2} base) mem)1442	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)1443	// result: (ADDSSload [off1+off2] {mergeSym(sym1,sym2)} val base mem)1444	for {1445		off1 := auxIntToInt32(v.AuxInt)1446		sym1 := auxToSym(v.Aux)1447		val := v_01448		if v_1.Op != Op386LEAL {1449			break1450		}1451		off2 := auxIntToInt32(v_1.AuxInt)1452		sym2 := auxToSym(v_1.Aux)1453		base := v_1.Args[0]1454		mem := v_21455		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {1456			break1457		}1458		v.reset(Op386ADDSSload)1459		v.AuxInt = int32ToAuxInt(off1 + off2)1460		v.Aux = symToAux(mergeSym(sym1, sym2))1461		v.AddArg3(val, base, mem)1462		return true1463	}1464	return false1465}1466func rewriteValue386_Op386ANDL(v *Value) bool {1467	v_1 := v.Args[1]1468	v_0 := v.Args[0]1469	// match: (ANDL x (MOVLconst [c]))1470	// result: (ANDLconst [c] x)1471	for {1472		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1473			x := v_01474			if v_1.Op != Op386MOVLconst {1475				continue1476			}1477			c := auxIntToInt32(v_1.AuxInt)1478			v.reset(Op386ANDLconst)1479			v.AuxInt = int32ToAuxInt(c)1480			v.AddArg(x)1481			return true1482		}1483		break1484	}1485	// match: (ANDL x l:(MOVLload [off] {sym} ptr mem))1486	// cond: canMergeLoadClobber(v, l, x) && clobber(l)1487	// result: (ANDLload x [off] {sym} ptr mem)1488	for {1489		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1490			x := v_01491			l := v_11492			if l.Op != Op386MOVLload {1493				continue1494			}1495			off := auxIntToInt32(l.AuxInt)1496			sym := auxToSym(l.Aux)1497			mem := l.Args[1]1498			ptr := l.Args[0]1499			if !(canMergeLoadClobber(v, l, x) && clobber(l)) {1500				continue1501			}1502			v.reset(Op386ANDLload)1503			v.AuxInt = int32ToAuxInt(off)1504			v.Aux = symToAux(sym)1505			v.AddArg3(x, ptr, mem)1506			return true1507		}1508		break1509	}1510	// match: (ANDL x x)1511	// result: x1512	for {1513		x := v_01514		if x != v_1 {1515			break1516		}1517		v.copyOf(x)1518		return true1519	}1520	return false1521}1522func rewriteValue386_Op386ANDLconst(v *Value) bool {1523	v_0 := v.Args[0]1524	// match: (ANDLconst [c] (ANDLconst [d] x))1525	// result: (ANDLconst [c & d] x)1526	for {1527		c := auxIntToInt32(v.AuxInt)1528		if v_0.Op != Op386ANDLconst {1529			break1530		}1531		d := auxIntToInt32(v_0.AuxInt)1532		x := v_0.Args[0]1533		v.reset(Op386ANDLconst)1534		v.AuxInt = int32ToAuxInt(c & d)1535		v.AddArg(x)1536		return true1537	}1538	// match: (ANDLconst [c] _)1539	// cond: c==01540	// result: (MOVLconst [0])1541	for {1542		c := auxIntToInt32(v.AuxInt)1543		if !(c == 0) {1544			break1545		}1546		v.reset(Op386MOVLconst)1547		v.AuxInt = int32ToAuxInt(0)1548		return true1549	}1550	// match: (ANDLconst [c] x)1551	// cond: c==-11552	// result: x1553	for {1554		c := auxIntToInt32(v.AuxInt)1555		x := v_01556		if !(c == -1) {1557			break1558		}1559		v.copyOf(x)1560		return true1561	}1562	// match: (ANDLconst [c] (MOVLconst [d]))1563	// result: (MOVLconst [c&d])1564	for {1565		c := auxIntToInt32(v.AuxInt)1566		if v_0.Op != Op386MOVLconst {1567			break1568		}1569		d := auxIntToInt32(v_0.AuxInt)1570		v.reset(Op386MOVLconst)1571		v.AuxInt = int32ToAuxInt(c & d)1572		return true1573	}1574	return false1575}1576func rewriteValue386_Op386ANDLconstmodify(v *Value) bool {1577	v_1 := v.Args[1]1578	v_0 := v.Args[0]1579	b := v.Block1580	config := b.Func.Config1581	// match: (ANDLconstmodify [valoff1] {sym} (ADDLconst [off2] base) mem)1582	// cond: valoff1.canAdd32(off2)1583	// result: (ANDLconstmodify [valoff1.addOffset32(off2)] {sym} base mem)1584	for {1585		valoff1 := auxIntToValAndOff(v.AuxInt)1586		sym := auxToSym(v.Aux)1587		if v_0.Op != Op386ADDLconst {1588			break1589		}1590		off2 := auxIntToInt32(v_0.AuxInt)1591		base := v_0.Args[0]1592		mem := v_11593		if !(valoff1.canAdd32(off2)) {1594			break1595		}1596		v.reset(Op386ANDLconstmodify)1597		v.AuxInt = valAndOffToAuxInt(valoff1.addOffset32(off2))1598		v.Aux = symToAux(sym)1599		v.AddArg2(base, mem)1600		return true1601	}1602	// match: (ANDLconstmodify [valoff1] {sym1} (LEAL [off2] {sym2} base) mem)1603	// cond: valoff1.canAdd32(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)1604	// result: (ANDLconstmodify [valoff1.addOffset32(off2)] {mergeSym(sym1,sym2)} base mem)1605	for {1606		valoff1 := auxIntToValAndOff(v.AuxInt)1607		sym1 := auxToSym(v.Aux)1608		if v_0.Op != Op386LEAL {1609			break1610		}1611		off2 := auxIntToInt32(v_0.AuxInt)1612		sym2 := auxToSym(v_0.Aux)1613		base := v_0.Args[0]1614		mem := v_11615		if !(valoff1.canAdd32(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {1616			break1617		}1618		v.reset(Op386ANDLconstmodify)1619		v.AuxInt = valAndOffToAuxInt(valoff1.addOffset32(off2))1620		v.Aux = symToAux(mergeSym(sym1, sym2))1621		v.AddArg2(base, mem)1622		return true1623	}1624	return false1625}1626func rewriteValue386_Op386ANDLload(v *Value) bool {1627	v_2 := v.Args[2]1628	v_1 := v.Args[1]1629	v_0 := v.Args[0]1630	b := v.Block1631	config := b.Func.Config1632	// match: (ANDLload [off1] {sym} val (ADDLconst [off2] base) mem)1633	// cond: is32Bit(int64(off1)+int64(off2))1634	// result: (ANDLload [off1+off2] {sym} val base mem)1635	for {1636		off1 := auxIntToInt32(v.AuxInt)1637		sym := auxToSym(v.Aux)1638		val := v_01639		if v_1.Op != Op386ADDLconst {1640			break1641		}1642		off2 := auxIntToInt32(v_1.AuxInt)1643		base := v_1.Args[0]1644		mem := v_21645		if !(is32Bit(int64(off1) + int64(off2))) {1646			break1647		}1648		v.reset(Op386ANDLload)1649		v.AuxInt = int32ToAuxInt(off1 + off2)1650		v.Aux = symToAux(sym)1651		v.AddArg3(val, base, mem)1652		return true1653	}1654	// match: (ANDLload [off1] {sym1} val (LEAL [off2] {sym2} base) mem)1655	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)1656	// result: (ANDLload [off1+off2] {mergeSym(sym1,sym2)} val base mem)1657	for {1658		off1 := auxIntToInt32(v.AuxInt)1659		sym1 := auxToSym(v.Aux)1660		val := v_01661		if v_1.Op != Op386LEAL {1662			break1663		}1664		off2 := auxIntToInt32(v_1.AuxInt)1665		sym2 := auxToSym(v_1.Aux)1666		base := v_1.Args[0]1667		mem := v_21668		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {1669			break1670		}1671		v.reset(Op386ANDLload)1672		v.AuxInt = int32ToAuxInt(off1 + off2)1673		v.Aux = symToAux(mergeSym(sym1, sym2))1674		v.AddArg3(val, base, mem)1675		return true1676	}1677	return false1678}1679func rewriteValue386_Op386ANDLmodify(v *Value) bool {1680	v_2 := v.Args[2]1681	v_1 := v.Args[1]1682	v_0 := v.Args[0]1683	b := v.Block1684	config := b.Func.Config1685	// match: (ANDLmodify [off1] {sym} (ADDLconst [off2] base) val mem)1686	// cond: is32Bit(int64(off1)+int64(off2))1687	// result: (ANDLmodify [off1+off2] {sym} base val mem)1688	for {1689		off1 := auxIntToInt32(v.AuxInt)1690		sym := auxToSym(v.Aux)1691		if v_0.Op != Op386ADDLconst {1692			break1693		}1694		off2 := auxIntToInt32(v_0.AuxInt)1695		base := v_0.Args[0]1696		val := v_11697		mem := v_21698		if !(is32Bit(int64(off1) + int64(off2))) {1699			break1700		}1701		v.reset(Op386ANDLmodify)1702		v.AuxInt = int32ToAuxInt(off1 + off2)1703		v.Aux = symToAux(sym)1704		v.AddArg3(base, val, mem)1705		return true1706	}1707	// match: (ANDLmodify [off1] {sym1} (LEAL [off2] {sym2} base) val mem)1708	// cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)1709	// result: (ANDLmodify [off1+off2] {mergeSym(sym1,sym2)} base val mem)1710	for {1711		off1 := auxIntToInt32(v.AuxInt)1712		sym1 := auxToSym(v.Aux)1713		if v_0.Op != Op386LEAL {1714			break1715		}1716		off2 := auxIntToInt32(v_0.AuxInt)1717		sym2 := auxToSym(v_0.Aux)1718		base := v_0.Args[0]1719		val := v_11720		mem := v_21721		if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {1722			break1723		}1724		v.reset(Op386ANDLmodify)1725		v.AuxInt = int32ToAuxInt(off1 + off2)1726		v.Aux = symToAux(mergeSym(sym1, sym2))1727		v.AddArg3(base, val, mem)1728		return true1729	}1730	return false1731}1732func rewriteValue386_Op386CMPB(v *Value) bool {1733	v_1 := v.Args[1]1734	v_0 := v.Args[0]1735	b := v.Block1736	// match: (CMPB x (MOVLconst [c]))1737	// result: (CMPBconst x [int8(c)])1738	for {1739		x := v_01740		if v_1.Op != Op386MOVLconst {1741			break1742		}1743		c := auxIntToInt32(v_1.AuxInt)1744		v.reset(Op386CMPBconst)1745		v.AuxInt = int8ToAuxInt(int8(c))1746		v.AddArg(x)1747		return true1748	}1749	// match: (CMPB (MOVLconst [c]) x)1750	// result: (InvertFlags (CMPBconst x [int8(c)]))1751	for {1752		if v_0.Op != Op386MOVLconst {1753			break1754		}1755		c := auxIntToInt32(v_0.AuxInt)1756		x := v_11757		v.reset(Op386InvertFlags)1758		v0 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags)1759		v0.AuxInt = int8ToAuxInt(int8(c))1760		v0.AddArg(x)1761		v.AddArg(v0)1762		return true1763	}1764	// match: (CMPB x y)1765	// cond: canonLessThan(x,y)1766	// result: (InvertFlags (CMPB y x))1767	for {1768		x := v_01769		y := v_11770		if !(canonLessThan(x, y)) {1771			break1772		}1773		v.reset(Op386InvertFlags)1774		v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)1775		v0.AddArg2(y, x)1776		v.AddArg(v0)1777		return true1778	}1779	// match: (CMPB l:(MOVBload {sym} [off] ptr mem) x)1780	// cond: canMergeLoad(v, l) && clobber(l)1781	// result: (CMPBload {sym} [off] ptr x mem)1782	for {1783		l := v_01784		if l.Op != Op386MOVBload {1785			break1786		}1787		off := auxIntToInt32(l.AuxInt)1788		sym := auxToSym(l.Aux)1789		mem := l.Args[1]1790		ptr := l.Args[0]1791		x := v_11792		if !(canMergeLoad(v, l) && clobber(l)) {1793			break1794		}1795		v.reset(Op386CMPBload)1796		v.AuxInt = int32ToAuxInt(off)1797		v.Aux = symToAux(sym)1798		v.AddArg3(ptr, x, mem)1799		return true1800	}1801	// match: (CMPB x l:(MOVBload {sym} [off] ptr mem))1802	// cond: canMergeLoad(v, l) && clobber(l)1803	// result: (InvertFlags (CMPBload {sym} [off] ptr x mem))1804	for {1805		x := v_01806		l := v_11807		if l.Op != Op386MOVBload {1808			break1809		}1810		off := auxIntToInt32(l.AuxInt)1811		sym := auxToSym(l.Aux)1812		mem := l.Args[1]1813		ptr := l.Args[0]1814		if !(canMergeLoad(v, l) && clobber(l)) {1815			break1816		}1817		v.reset(Op386InvertFlags)1818		v0 := b.NewValue0(l.Pos, Op386CMPBload, types.TypeFlags)1819		v0.AuxInt = int32ToAuxInt(off)1820		v0.Aux = symToAux(sym)1821		v0.AddArg3(ptr, x, mem)1822		v.AddArg(v0)1823		return true1824	}1825	return false1826}1827func rewriteValue386_Op386CMPBconst(v *Value) bool {1828	v_0 := v.Args[0]1829	b := v.Block1830	// match: (CMPBconst (MOVLconst [x]) [y])1831	// cond: int8(x)==y1832	// result: (FlagEQ)1833	for {1834		y := auxIntToInt8(v.AuxInt)1835		if v_0.Op != Op386MOVLconst {1836			break1837		}1838		x := auxIntToInt32(v_0.AuxInt)1839		if !(int8(x) == y) {1840			break1841		}1842		v.reset(Op386FlagEQ)1843		return true1844	}1845	// match: (CMPBconst (MOVLconst [x]) [y])1846	// cond: int8(x)<y && uint8(x)<uint8(y)1847	// result: (FlagLT_ULT)1848	for {1849		y := auxIntToInt8(v.AuxInt)1850		if v_0.Op != Op386MOVLconst {1851			break1852		}1853		x := auxIntToInt32(v_0.AuxInt)1854		if !(int8(x) < y && uint8(x) < uint8(y)) {1855			break1856		}1857		v.reset(Op386FlagLT_ULT)1858		return true1859	}1860	// match: (CMPBconst (MOVLconst [x]) [y])1861	// cond: int8(x)<y && uint8(x)>uint8(y)1862	// result: (FlagLT_UGT)1863	for {1864		y := auxIntToInt8(v.AuxInt)1865		if v_0.Op != Op386MOVLconst {1866			break1867		}1868		x := auxIntToInt32(v_0.AuxInt)1869		if !(int8(x) < y && uint8(x) > uint8(y)) {1870			break1871		}1872		v.reset(Op386FlagLT_UGT)1873		return true1874	}1875	// match: (CMPBconst (MOVLconst [x]) [y])1876	// cond: int8(x)>y && uint8(x)<uint8(y)1877	// result: (FlagGT_ULT)1878	for {1879		y := auxIntToInt8(v.AuxInt)1880		if v_0.Op != Op386MOVLconst {1881			break1882		}1883		x := auxIntToInt32(v_0.AuxInt)1884		if !(int8(x) > y && uint8(x) < uint8(y)) {1885			break1886		}1887		v.reset(Op386FlagGT_ULT)1888		return true1889	}1890	// match: (CMPBconst (MOVLconst [x]) [y])1891	// cond: int8(x)>y && uint8(x)>uint8(y)1892	// result: (FlagGT_UGT)1893	for {1894		y := auxIntToInt8(v.AuxInt)1895		if v_0.Op != Op386MOVLconst {1896			break1897		}1898		x := auxIntToInt32(v_0.AuxInt)1899		if !(int8(x) > y && uint8(x) > uint8(y)) {1900			break1901		}1902		v.reset(Op386FlagGT_UGT)1903		return true1904	}1905	// match: (CMPBconst (ANDLconst _ [m]) [n])1906	// cond: 0 <= int8(m) && int8(m) < n1907	// result: (FlagLT_ULT)1908	for {1909		n := auxIntToInt8(v.AuxInt)1910		if v_0.Op != Op386ANDLconst {1911			break1912		}1913		m := auxIntToInt32(v_0.AuxInt)1914		if !(0 <= int8(m) && int8(m) < n) {1915			break1916		}1917		v.reset(Op386FlagLT_ULT)1918		return true1919	}1920	// match: (CMPBconst l:(ANDL x y) [0])1921	// cond: l.Uses==11922	// result: (TESTB x y)1923	for {1924		if auxIntToInt8(v.AuxInt) != 0 {1925			break1926		}1927		l := v_01928		if l.Op != Op386ANDL {1929			break1930		}1931		y := l.Args[1]1932		x := l.Args[0]1933		if !(l.Uses == 1) {1934			break1935		}1936		v.reset(Op386TESTB)1937		v.AddArg2(x, y)1938		return true1939	}1940	// match: (CMPBconst l:(ANDLconst [c] x) [0])1941	// cond: l.Uses==11942	// result: (TESTBconst [int8(c)] x)1943	for {1944		if auxIntToInt8(v.AuxInt) != 0 {1945			break1946		}1947		l := v_01948		if l.Op != Op386ANDLconst {1949			break1950		}1951		c := auxIntToInt32(l.AuxInt)1952		x := l.Args[0]1953		if !(l.Uses == 1) {1954			break1955		}1956		v.reset(Op386TESTBconst)1957		v.AuxInt = int8ToAuxInt(int8(c))1958		v.AddArg(x)1959		return true1960	}1961	// match: (CMPBconst x [0])1962	// result: (TESTB x x)1963	for {1964		if auxIntToInt8(v.AuxInt) != 0 {1965			break1966		}1967		x := v_01968		v.reset(Op386TESTB)1969		v.AddArg2(x, x)1970		return true1971	}1972	// match: (CMPBconst l:(MOVBload {sym} [off] ptr mem) [c])1973	// cond: l.Uses == 1 && clobber(l)1974	// result: @l.Block (CMPBconstload {sym} [makeValAndOff(int32(c),off)] ptr mem)1975	for {1976		c := auxIntToInt8(v.AuxInt)1977		l := v_01978		if l.Op != Op386MOVBload {1979			break1980		}1981		off := auxIntToInt32(l.AuxInt)1982		sym := auxToSym(l.Aux)1983		mem := l.Args[1]1984		ptr := l.Args[0]1985		if !(l.Uses == 1 && clobber(l)) {1986			break1987		}1988		b = l.Block1989		v0 := b.NewValue0(l.Pos, Op386CMPBconstload, types.TypeFlags)1990		v.copyOf(v0)1991		v0.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(c), off))1992		v0.Aux = symToAux(sym)1993		v0.AddArg2(ptr, mem)1994		return true1995	}1996	return false1997}1998func rewriteValue386_Op386CMPBload(v *Value) bool {1999	v_2 := v.Args[2]2000	v_1 := v.Args[1]