1// Code generated from _gen/ARM.rules using 'go generate'; DO NOT EDIT.23package ssa45import "internal/buildcfg"6import "cmd/compile/internal/types"78func rewriteValueARM(v *Value) bool {9	switch v.Op {10	case OpARMADC:11		return rewriteValueARM_OpARMADC(v)12	case OpARMADCconst:13		return rewriteValueARM_OpARMADCconst(v)14	case OpARMADCshiftLL:15		return rewriteValueARM_OpARMADCshiftLL(v)16	case OpARMADCshiftLLreg:17		return rewriteValueARM_OpARMADCshiftLLreg(v)18	case OpARMADCshiftRA:19		return rewriteValueARM_OpARMADCshiftRA(v)20	case OpARMADCshiftRAreg:21		return rewriteValueARM_OpARMADCshiftRAreg(v)22	case OpARMADCshiftRL:23		return rewriteValueARM_OpARMADCshiftRL(v)24	case OpARMADCshiftRLreg:25		return rewriteValueARM_OpARMADCshiftRLreg(v)26	case OpARMADD:27		return rewriteValueARM_OpARMADD(v)28	case OpARMADDD:29		return rewriteValueARM_OpARMADDD(v)30	case OpARMADDF:31		return rewriteValueARM_OpARMADDF(v)32	case OpARMADDS:33		return rewriteValueARM_OpARMADDS(v)34	case OpARMADDSshiftLL:35		return rewriteValueARM_OpARMADDSshiftLL(v)36	case OpARMADDSshiftLLreg:37		return rewriteValueARM_OpARMADDSshiftLLreg(v)38	case OpARMADDSshiftRA:39		return rewriteValueARM_OpARMADDSshiftRA(v)40	case OpARMADDSshiftRAreg:41		return rewriteValueARM_OpARMADDSshiftRAreg(v)42	case OpARMADDSshiftRL:43		return rewriteValueARM_OpARMADDSshiftRL(v)44	case OpARMADDSshiftRLreg:45		return rewriteValueARM_OpARMADDSshiftRLreg(v)46	case OpARMADDconst:47		return rewriteValueARM_OpARMADDconst(v)48	case OpARMADDshiftLL:49		return rewriteValueARM_OpARMADDshiftLL(v)50	case OpARMADDshiftLLreg:51		return rewriteValueARM_OpARMADDshiftLLreg(v)52	case OpARMADDshiftRA:53		return rewriteValueARM_OpARMADDshiftRA(v)54	case OpARMADDshiftRAreg:55		return rewriteValueARM_OpARMADDshiftRAreg(v)56	case OpARMADDshiftRL:57		return rewriteValueARM_OpARMADDshiftRL(v)58	case OpARMADDshiftRLreg:59		return rewriteValueARM_OpARMADDshiftRLreg(v)60	case OpARMAND:61		return rewriteValueARM_OpARMAND(v)62	case OpARMANDconst:63		return rewriteValueARM_OpARMANDconst(v)64	case OpARMANDshiftLL:65		return rewriteValueARM_OpARMANDshiftLL(v)66	case OpARMANDshiftLLreg:67		return rewriteValueARM_OpARMANDshiftLLreg(v)68	case OpARMANDshiftRA:69		return rewriteValueARM_OpARMANDshiftRA(v)70	case OpARMANDshiftRAreg:71		return rewriteValueARM_OpARMANDshiftRAreg(v)72	case OpARMANDshiftRL:73		return rewriteValueARM_OpARMANDshiftRL(v)74	case OpARMANDshiftRLreg:75		return rewriteValueARM_OpARMANDshiftRLreg(v)76	case OpARMBFX:77		return rewriteValueARM_OpARMBFX(v)78	case OpARMBFXU:79		return rewriteValueARM_OpARMBFXU(v)80	case OpARMBIC:81		return rewriteValueARM_OpARMBIC(v)82	case OpARMBICconst:83		return rewriteValueARM_OpARMBICconst(v)84	case OpARMBICshiftLL:85		return rewriteValueARM_OpARMBICshiftLL(v)86	case OpARMBICshiftLLreg:87		return rewriteValueARM_OpARMBICshiftLLreg(v)88	case OpARMBICshiftRA:89		return rewriteValueARM_OpARMBICshiftRA(v)90	case OpARMBICshiftRAreg:91		return rewriteValueARM_OpARMBICshiftRAreg(v)92	case OpARMBICshiftRL:93		return rewriteValueARM_OpARMBICshiftRL(v)94	case OpARMBICshiftRLreg:95		return rewriteValueARM_OpARMBICshiftRLreg(v)96	case OpARMCMN:97		return rewriteValueARM_OpARMCMN(v)98	case OpARMCMNconst:99		return rewriteValueARM_OpARMCMNconst(v)100	case OpARMCMNshiftLL:101		return rewriteValueARM_OpARMCMNshiftLL(v)102	case OpARMCMNshiftLLreg:103		return rewriteValueARM_OpARMCMNshiftLLreg(v)104	case OpARMCMNshiftRA:105		return rewriteValueARM_OpARMCMNshiftRA(v)106	case OpARMCMNshiftRAreg:107		return rewriteValueARM_OpARMCMNshiftRAreg(v)108	case OpARMCMNshiftRL:109		return rewriteValueARM_OpARMCMNshiftRL(v)110	case OpARMCMNshiftRLreg:111		return rewriteValueARM_OpARMCMNshiftRLreg(v)112	case OpARMCMOVWHSconst:113		return rewriteValueARM_OpARMCMOVWHSconst(v)114	case OpARMCMOVWLSconst:115		return rewriteValueARM_OpARMCMOVWLSconst(v)116	case OpARMCMP:117		return rewriteValueARM_OpARMCMP(v)118	case OpARMCMPD:119		return rewriteValueARM_OpARMCMPD(v)120	case OpARMCMPF:121		return rewriteValueARM_OpARMCMPF(v)122	case OpARMCMPconst:123		return rewriteValueARM_OpARMCMPconst(v)124	case OpARMCMPshiftLL:125		return rewriteValueARM_OpARMCMPshiftLL(v)126	case OpARMCMPshiftLLreg:127		return rewriteValueARM_OpARMCMPshiftLLreg(v)128	case OpARMCMPshiftRA:129		return rewriteValueARM_OpARMCMPshiftRA(v)130	case OpARMCMPshiftRAreg:131		return rewriteValueARM_OpARMCMPshiftRAreg(v)132	case OpARMCMPshiftRL:133		return rewriteValueARM_OpARMCMPshiftRL(v)134	case OpARMCMPshiftRLreg:135		return rewriteValueARM_OpARMCMPshiftRLreg(v)136	case OpARMEqual:137		return rewriteValueARM_OpARMEqual(v)138	case OpARMGreaterEqual:139		return rewriteValueARM_OpARMGreaterEqual(v)140	case OpARMGreaterEqualU:141		return rewriteValueARM_OpARMGreaterEqualU(v)142	case OpARMGreaterThan:143		return rewriteValueARM_OpARMGreaterThan(v)144	case OpARMGreaterThanU:145		return rewriteValueARM_OpARMGreaterThanU(v)146	case OpARMLessEqual:147		return rewriteValueARM_OpARMLessEqual(v)148	case OpARMLessEqualU:149		return rewriteValueARM_OpARMLessEqualU(v)150	case OpARMLessThan:151		return rewriteValueARM_OpARMLessThan(v)152	case OpARMLessThanU:153		return rewriteValueARM_OpARMLessThanU(v)154	case OpARMLoweredPanicBoundsRC:155		return rewriteValueARM_OpARMLoweredPanicBoundsRC(v)156	case OpARMLoweredPanicBoundsRR:157		return rewriteValueARM_OpARMLoweredPanicBoundsRR(v)158	case OpARMLoweredPanicExtendRC:159		return rewriteValueARM_OpARMLoweredPanicExtendRC(v)160	case OpARMLoweredPanicExtendRR:161		return rewriteValueARM_OpARMLoweredPanicExtendRR(v)162	case OpARMMOVBUload:163		return rewriteValueARM_OpARMMOVBUload(v)164	case OpARMMOVBUloadidx:165		return rewriteValueARM_OpARMMOVBUloadidx(v)166	case OpARMMOVBUreg:167		return rewriteValueARM_OpARMMOVBUreg(v)168	case OpARMMOVBload:169		return rewriteValueARM_OpARMMOVBload(v)170	case OpARMMOVBloadidx:171		return rewriteValueARM_OpARMMOVBloadidx(v)172	case OpARMMOVBreg:173		return rewriteValueARM_OpARMMOVBreg(v)174	case OpARMMOVBstore:175		return rewriteValueARM_OpARMMOVBstore(v)176	case OpARMMOVBstoreidx:177		return rewriteValueARM_OpARMMOVBstoreidx(v)178	case OpARMMOVDload:179		return rewriteValueARM_OpARMMOVDload(v)180	case OpARMMOVDstore:181		return rewriteValueARM_OpARMMOVDstore(v)182	case OpARMMOVFload:183		return rewriteValueARM_OpARMMOVFload(v)184	case OpARMMOVFstore:185		return rewriteValueARM_OpARMMOVFstore(v)186	case OpARMMOVHUload:187		return rewriteValueARM_OpARMMOVHUload(v)188	case OpARMMOVHUloadidx:189		return rewriteValueARM_OpARMMOVHUloadidx(v)190	case OpARMMOVHUreg:191		return rewriteValueARM_OpARMMOVHUreg(v)192	case OpARMMOVHload:193		return rewriteValueARM_OpARMMOVHload(v)194	case OpARMMOVHloadidx:195		return rewriteValueARM_OpARMMOVHloadidx(v)196	case OpARMMOVHreg:197		return rewriteValueARM_OpARMMOVHreg(v)198	case OpARMMOVHstore:199		return rewriteValueARM_OpARMMOVHstore(v)200	case OpARMMOVHstoreidx:201		return rewriteValueARM_OpARMMOVHstoreidx(v)202	case OpARMMOVWload:203		return rewriteValueARM_OpARMMOVWload(v)204	case OpARMMOVWloadidx:205		return rewriteValueARM_OpARMMOVWloadidx(v)206	case OpARMMOVWloadshiftLL:207		return rewriteValueARM_OpARMMOVWloadshiftLL(v)208	case OpARMMOVWloadshiftRA:209		return rewriteValueARM_OpARMMOVWloadshiftRA(v)210	case OpARMMOVWloadshiftRL:211		return rewriteValueARM_OpARMMOVWloadshiftRL(v)212	case OpARMMOVWnop:213		return rewriteValueARM_OpARMMOVWnop(v)214	case OpARMMOVWreg:215		return rewriteValueARM_OpARMMOVWreg(v)216	case OpARMMOVWstore:217		return rewriteValueARM_OpARMMOVWstore(v)218	case OpARMMOVWstoreidx:219		return rewriteValueARM_OpARMMOVWstoreidx(v)220	case OpARMMOVWstoreshiftLL:221		return rewriteValueARM_OpARMMOVWstoreshiftLL(v)222	case OpARMMOVWstoreshiftRA:223		return rewriteValueARM_OpARMMOVWstoreshiftRA(v)224	case OpARMMOVWstoreshiftRL:225		return rewriteValueARM_OpARMMOVWstoreshiftRL(v)226	case OpARMMUL:227		return rewriteValueARM_OpARMMUL(v)228	case OpARMMULA:229		return rewriteValueARM_OpARMMULA(v)230	case OpARMMULD:231		return rewriteValueARM_OpARMMULD(v)232	case OpARMMULF:233		return rewriteValueARM_OpARMMULF(v)234	case OpARMMULS:235		return rewriteValueARM_OpARMMULS(v)236	case OpARMMVN:237		return rewriteValueARM_OpARMMVN(v)238	case OpARMMVNshiftLL:239		return rewriteValueARM_OpARMMVNshiftLL(v)240	case OpARMMVNshiftLLreg:241		return rewriteValueARM_OpARMMVNshiftLLreg(v)242	case OpARMMVNshiftRA:243		return rewriteValueARM_OpARMMVNshiftRA(v)244	case OpARMMVNshiftRAreg:245		return rewriteValueARM_OpARMMVNshiftRAreg(v)246	case OpARMMVNshiftRL:247		return rewriteValueARM_OpARMMVNshiftRL(v)248	case OpARMMVNshiftRLreg:249		return rewriteValueARM_OpARMMVNshiftRLreg(v)250	case OpARMNEGD:251		return rewriteValueARM_OpARMNEGD(v)252	case OpARMNEGF:253		return rewriteValueARM_OpARMNEGF(v)254	case OpARMNMULD:255		return rewriteValueARM_OpARMNMULD(v)256	case OpARMNMULF:257		return rewriteValueARM_OpARMNMULF(v)258	case OpARMNotEqual:259		return rewriteValueARM_OpARMNotEqual(v)260	case OpARMOR:261		return rewriteValueARM_OpARMOR(v)262	case OpARMORconst:263		return rewriteValueARM_OpARMORconst(v)264	case OpARMORshiftLL:265		return rewriteValueARM_OpARMORshiftLL(v)266	case OpARMORshiftLLreg:267		return rewriteValueARM_OpARMORshiftLLreg(v)268	case OpARMORshiftRA:269		return rewriteValueARM_OpARMORshiftRA(v)270	case OpARMORshiftRAreg:271		return rewriteValueARM_OpARMORshiftRAreg(v)272	case OpARMORshiftRL:273		return rewriteValueARM_OpARMORshiftRL(v)274	case OpARMORshiftRLreg:275		return rewriteValueARM_OpARMORshiftRLreg(v)276	case OpARMRSB:277		return rewriteValueARM_OpARMRSB(v)278	case OpARMRSBSshiftLL:279		return rewriteValueARM_OpARMRSBSshiftLL(v)280	case OpARMRSBSshiftLLreg:281		return rewriteValueARM_OpARMRSBSshiftLLreg(v)282	case OpARMRSBSshiftRA:283		return rewriteValueARM_OpARMRSBSshiftRA(v)284	case OpARMRSBSshiftRAreg:285		return rewriteValueARM_OpARMRSBSshiftRAreg(v)286	case OpARMRSBSshiftRL:287		return rewriteValueARM_OpARMRSBSshiftRL(v)288	case OpARMRSBSshiftRLreg:289		return rewriteValueARM_OpARMRSBSshiftRLreg(v)290	case OpARMRSBconst:291		return rewriteValueARM_OpARMRSBconst(v)292	case OpARMRSBshiftLL:293		return rewriteValueARM_OpARMRSBshiftLL(v)294	case OpARMRSBshiftLLreg:295		return rewriteValueARM_OpARMRSBshiftLLreg(v)296	case OpARMRSBshiftRA:297		return rewriteValueARM_OpARMRSBshiftRA(v)298	case OpARMRSBshiftRAreg:299		return rewriteValueARM_OpARMRSBshiftRAreg(v)300	case OpARMRSBshiftRL:301		return rewriteValueARM_OpARMRSBshiftRL(v)302	case OpARMRSBshiftRLreg:303		return rewriteValueARM_OpARMRSBshiftRLreg(v)304	case OpARMRSCconst:305		return rewriteValueARM_OpARMRSCconst(v)306	case OpARMRSCshiftLL:307		return rewriteValueARM_OpARMRSCshiftLL(v)308	case OpARMRSCshiftLLreg:309		return rewriteValueARM_OpARMRSCshiftLLreg(v)310	case OpARMRSCshiftRA:311		return rewriteValueARM_OpARMRSCshiftRA(v)312	case OpARMRSCshiftRAreg:313		return rewriteValueARM_OpARMRSCshiftRAreg(v)314	case OpARMRSCshiftRL:315		return rewriteValueARM_OpARMRSCshiftRL(v)316	case OpARMRSCshiftRLreg:317		return rewriteValueARM_OpARMRSCshiftRLreg(v)318	case OpARMSBC:319		return rewriteValueARM_OpARMSBC(v)320	case OpARMSBCconst:321		return rewriteValueARM_OpARMSBCconst(v)322	case OpARMSBCshiftLL:323		return rewriteValueARM_OpARMSBCshiftLL(v)324	case OpARMSBCshiftLLreg:325		return rewriteValueARM_OpARMSBCshiftLLreg(v)326	case OpARMSBCshiftRA:327		return rewriteValueARM_OpARMSBCshiftRA(v)328	case OpARMSBCshiftRAreg:329		return rewriteValueARM_OpARMSBCshiftRAreg(v)330	case OpARMSBCshiftRL:331		return rewriteValueARM_OpARMSBCshiftRL(v)332	case OpARMSBCshiftRLreg:333		return rewriteValueARM_OpARMSBCshiftRLreg(v)334	case OpARMSLL:335		return rewriteValueARM_OpARMSLL(v)336	case OpARMSLLconst:337		return rewriteValueARM_OpARMSLLconst(v)338	case OpARMSRA:339		return rewriteValueARM_OpARMSRA(v)340	case OpARMSRAcond:341		return rewriteValueARM_OpARMSRAcond(v)342	case OpARMSRAconst:343		return rewriteValueARM_OpARMSRAconst(v)344	case OpARMSRL:345		return rewriteValueARM_OpARMSRL(v)346	case OpARMSRLconst:347		return rewriteValueARM_OpARMSRLconst(v)348	case OpARMSRR:349		return rewriteValueARM_OpARMSRR(v)350	case OpARMSUB:351		return rewriteValueARM_OpARMSUB(v)352	case OpARMSUBD:353		return rewriteValueARM_OpARMSUBD(v)354	case OpARMSUBF:355		return rewriteValueARM_OpARMSUBF(v)356	case OpARMSUBS:357		return rewriteValueARM_OpARMSUBS(v)358	case OpARMSUBSshiftLL:359		return rewriteValueARM_OpARMSUBSshiftLL(v)360	case OpARMSUBSshiftLLreg:361		return rewriteValueARM_OpARMSUBSshiftLLreg(v)362	case OpARMSUBSshiftRA:363		return rewriteValueARM_OpARMSUBSshiftRA(v)364	case OpARMSUBSshiftRAreg:365		return rewriteValueARM_OpARMSUBSshiftRAreg(v)366	case OpARMSUBSshiftRL:367		return rewriteValueARM_OpARMSUBSshiftRL(v)368	case OpARMSUBSshiftRLreg:369		return rewriteValueARM_OpARMSUBSshiftRLreg(v)370	case OpARMSUBconst:371		return rewriteValueARM_OpARMSUBconst(v)372	case OpARMSUBshiftLL:373		return rewriteValueARM_OpARMSUBshiftLL(v)374	case OpARMSUBshiftLLreg:375		return rewriteValueARM_OpARMSUBshiftLLreg(v)376	case OpARMSUBshiftRA:377		return rewriteValueARM_OpARMSUBshiftRA(v)378	case OpARMSUBshiftRAreg:379		return rewriteValueARM_OpARMSUBshiftRAreg(v)380	case OpARMSUBshiftRL:381		return rewriteValueARM_OpARMSUBshiftRL(v)382	case OpARMSUBshiftRLreg:383		return rewriteValueARM_OpARMSUBshiftRLreg(v)384	case OpARMTEQ:385		return rewriteValueARM_OpARMTEQ(v)386	case OpARMTEQconst:387		return rewriteValueARM_OpARMTEQconst(v)388	case OpARMTEQshiftLL:389		return rewriteValueARM_OpARMTEQshiftLL(v)390	case OpARMTEQshiftLLreg:391		return rewriteValueARM_OpARMTEQshiftLLreg(v)392	case OpARMTEQshiftRA:393		return rewriteValueARM_OpARMTEQshiftRA(v)394	case OpARMTEQshiftRAreg:395		return rewriteValueARM_OpARMTEQshiftRAreg(v)396	case OpARMTEQshiftRL:397		return rewriteValueARM_OpARMTEQshiftRL(v)398	case OpARMTEQshiftRLreg:399		return rewriteValueARM_OpARMTEQshiftRLreg(v)400	case OpARMTST:401		return rewriteValueARM_OpARMTST(v)402	case OpARMTSTconst:403		return rewriteValueARM_OpARMTSTconst(v)404	case OpARMTSTshiftLL:405		return rewriteValueARM_OpARMTSTshiftLL(v)406	case OpARMTSTshiftLLreg:407		return rewriteValueARM_OpARMTSTshiftLLreg(v)408	case OpARMTSTshiftRA:409		return rewriteValueARM_OpARMTSTshiftRA(v)410	case OpARMTSTshiftRAreg:411		return rewriteValueARM_OpARMTSTshiftRAreg(v)412	case OpARMTSTshiftRL:413		return rewriteValueARM_OpARMTSTshiftRL(v)414	case OpARMTSTshiftRLreg:415		return rewriteValueARM_OpARMTSTshiftRLreg(v)416	case OpARMXOR:417		return rewriteValueARM_OpARMXOR(v)418	case OpARMXORconst:419		return rewriteValueARM_OpARMXORconst(v)420	case OpARMXORshiftLL:421		return rewriteValueARM_OpARMXORshiftLL(v)422	case OpARMXORshiftLLreg:423		return rewriteValueARM_OpARMXORshiftLLreg(v)424	case OpARMXORshiftRA:425		return rewriteValueARM_OpARMXORshiftRA(v)426	case OpARMXORshiftRAreg:427		return rewriteValueARM_OpARMXORshiftRAreg(v)428	case OpARMXORshiftRL:429		return rewriteValueARM_OpARMXORshiftRL(v)430	case OpARMXORshiftRLreg:431		return rewriteValueARM_OpARMXORshiftRLreg(v)432	case OpARMXORshiftRR:433		return rewriteValueARM_OpARMXORshiftRR(v)434	case OpAbs:435		v.Op = OpARMABSD436		return true437	case OpAdd16:438		v.Op = OpARMADD439		return true440	case OpAdd32:441		v.Op = OpARMADD442		return true443	case OpAdd32F:444		v.Op = OpARMADDF445		return true446	case OpAdd32carry:447		v.Op = OpARMADDS448		return true449	case OpAdd32carrywithcarry:450		v.Op = OpARMADCS451		return true452	case OpAdd32withcarry:453		v.Op = OpARMADC454		return true455	case OpAdd64F:456		v.Op = OpARMADDD457		return true458	case OpAdd8:459		v.Op = OpARMADD460		return true461	case OpAddPtr:462		v.Op = OpARMADD463		return true464	case OpAddr:465		return rewriteValueARM_OpAddr(v)466	case OpAnd16:467		v.Op = OpARMAND468		return true469	case OpAnd32:470		v.Op = OpARMAND471		return true472	case OpAnd8:473		v.Op = OpARMAND474		return true475	case OpAndB:476		v.Op = OpARMAND477		return true478	case OpAvg32u:479		return rewriteValueARM_OpAvg32u(v)480	case OpBitLen16:481		return rewriteValueARM_OpBitLen16(v)482	case OpBitLen32:483		return rewriteValueARM_OpBitLen32(v)484	case OpBitLen8:485		return rewriteValueARM_OpBitLen8(v)486	case OpBswap32:487		return rewriteValueARM_OpBswap32(v)488	case OpClosureCall:489		v.Op = OpARMCALLclosure490		return true491	case OpCom16:492		v.Op = OpARMMVN493		return true494	case OpCom32:495		v.Op = OpARMMVN496		return true497	case OpCom8:498		v.Op = OpARMMVN499		return true500	case OpConst16:501		return rewriteValueARM_OpConst16(v)502	case OpConst32:503		return rewriteValueARM_OpConst32(v)504	case OpConst32F:505		return rewriteValueARM_OpConst32F(v)506	case OpConst64F:507		return rewriteValueARM_OpConst64F(v)508	case OpConst8:509		return rewriteValueARM_OpConst8(v)510	case OpConstBool:511		return rewriteValueARM_OpConstBool(v)512	case OpConstNil:513		return rewriteValueARM_OpConstNil(v)514	case OpCtz16:515		return rewriteValueARM_OpCtz16(v)516	case OpCtz16NonZero:517		v.Op = OpCtz32518		return true519	case OpCtz32:520		return rewriteValueARM_OpCtz32(v)521	case OpCtz32NonZero:522		v.Op = OpCtz32523		return true524	case OpCtz8:525		return rewriteValueARM_OpCtz8(v)526	case OpCtz8NonZero:527		v.Op = OpCtz32528		return true529	case OpCvt32Fto32:530		v.Op = OpARMMOVFW531		return true532	case OpCvt32Fto32U:533		v.Op = OpARMMOVFWU534		return true535	case OpCvt32Fto64F:536		v.Op = OpARMMOVFD537		return true538	case OpCvt32Uto32F:539		v.Op = OpARMMOVWUF540		return true541	case OpCvt32Uto64F:542		v.Op = OpARMMOVWUD543		return true544	case OpCvt32to32F:545		v.Op = OpARMMOVWF546		return true547	case OpCvt32to64F:548		v.Op = OpARMMOVWD549		return true550	case OpCvt64Fto32:551		v.Op = OpARMMOVDW552		return true553	case OpCvt64Fto32F:554		v.Op = OpARMMOVDF555		return true556	case OpCvt64Fto32U:557		v.Op = OpARMMOVDWU558		return true559	case OpCvtBoolToUint8:560		v.Op = OpCopy561		return true562	case OpDiv16:563		return rewriteValueARM_OpDiv16(v)564	case OpDiv16u:565		return rewriteValueARM_OpDiv16u(v)566	case OpDiv32:567		return rewriteValueARM_OpDiv32(v)568	case OpDiv32F:569		v.Op = OpARMDIVF570		return true571	case OpDiv32u:572		return rewriteValueARM_OpDiv32u(v)573	case OpDiv64F:574		v.Op = OpARMDIVD575		return true576	case OpDiv8:577		return rewriteValueARM_OpDiv8(v)578	case OpDiv8u:579		return rewriteValueARM_OpDiv8u(v)580	case OpEq16:581		return rewriteValueARM_OpEq16(v)582	case OpEq32:583		return rewriteValueARM_OpEq32(v)584	case OpEq32F:585		return rewriteValueARM_OpEq32F(v)586	case OpEq64F:587		return rewriteValueARM_OpEq64F(v)588	case OpEq8:589		return rewriteValueARM_OpEq8(v)590	case OpEqB:591		return rewriteValueARM_OpEqB(v)592	case OpEqPtr:593		return rewriteValueARM_OpEqPtr(v)594	case OpFMA:595		return rewriteValueARM_OpFMA(v)596	case OpGetCallerPC:597		v.Op = OpARMLoweredGetCallerPC598		return true599	case OpGetCallerSP:600		v.Op = OpARMLoweredGetCallerSP601		return true602	case OpGetClosurePtr:603		v.Op = OpARMLoweredGetClosurePtr604		return true605	case OpHmul32:606		v.Op = OpARMHMUL607		return true608	case OpHmul32u:609		v.Op = OpARMHMULU610		return true611	case OpInterCall:612		v.Op = OpARMCALLinter613		return true614	case OpIsInBounds:615		return rewriteValueARM_OpIsInBounds(v)616	case OpIsNonNil:617		return rewriteValueARM_OpIsNonNil(v)618	case OpIsSliceInBounds:619		return rewriteValueARM_OpIsSliceInBounds(v)620	case OpLeq16:621		return rewriteValueARM_OpLeq16(v)622	case OpLeq16U:623		return rewriteValueARM_OpLeq16U(v)624	case OpLeq32:625		return rewriteValueARM_OpLeq32(v)626	case OpLeq32F:627		return rewriteValueARM_OpLeq32F(v)628	case OpLeq32U:629		return rewriteValueARM_OpLeq32U(v)630	case OpLeq64F:631		return rewriteValueARM_OpLeq64F(v)632	case OpLeq8:633		return rewriteValueARM_OpLeq8(v)634	case OpLeq8U:635		return rewriteValueARM_OpLeq8U(v)636	case OpLess16:637		return rewriteValueARM_OpLess16(v)638	case OpLess16U:639		return rewriteValueARM_OpLess16U(v)640	case OpLess32:641		return rewriteValueARM_OpLess32(v)642	case OpLess32F:643		return rewriteValueARM_OpLess32F(v)644	case OpLess32U:645		return rewriteValueARM_OpLess32U(v)646	case OpLess64F:647		return rewriteValueARM_OpLess64F(v)648	case OpLess8:649		return rewriteValueARM_OpLess8(v)650	case OpLess8U:651		return rewriteValueARM_OpLess8U(v)652	case OpLoad:653		return rewriteValueARM_OpLoad(v)654	case OpLocalAddr:655		return rewriteValueARM_OpLocalAddr(v)656	case OpLsh16x16:657		return rewriteValueARM_OpLsh16x16(v)658	case OpLsh16x32:659		return rewriteValueARM_OpLsh16x32(v)660	case OpLsh16x64:661		return rewriteValueARM_OpLsh16x64(v)662	case OpLsh16x8:663		return rewriteValueARM_OpLsh16x8(v)664	case OpLsh32x16:665		return rewriteValueARM_OpLsh32x16(v)666	case OpLsh32x32:667		return rewriteValueARM_OpLsh32x32(v)668	case OpLsh32x64:669		return rewriteValueARM_OpLsh32x64(v)670	case OpLsh32x8:671		return rewriteValueARM_OpLsh32x8(v)672	case OpLsh8x16:673		return rewriteValueARM_OpLsh8x16(v)674	case OpLsh8x32:675		return rewriteValueARM_OpLsh8x32(v)676	case OpLsh8x64:677		return rewriteValueARM_OpLsh8x64(v)678	case OpLsh8x8:679		return rewriteValueARM_OpLsh8x8(v)680	case OpMod16:681		return rewriteValueARM_OpMod16(v)682	case OpMod16u:683		return rewriteValueARM_OpMod16u(v)684	case OpMod32:685		return rewriteValueARM_OpMod32(v)686	case OpMod32u:687		return rewriteValueARM_OpMod32u(v)688	case OpMod8:689		return rewriteValueARM_OpMod8(v)690	case OpMod8u:691		return rewriteValueARM_OpMod8u(v)692	case OpMove:693		return rewriteValueARM_OpMove(v)694	case OpMul16:695		v.Op = OpARMMUL696		return true697	case OpMul32:698		v.Op = OpARMMUL699		return true700	case OpMul32F:701		v.Op = OpARMMULF702		return true703	case OpMul32uhilo:704		v.Op = OpARMMULLU705		return true706	case OpMul64F:707		v.Op = OpARMMULD708		return true709	case OpMul8:710		v.Op = OpARMMUL711		return true712	case OpNeg16:713		return rewriteValueARM_OpNeg16(v)714	case OpNeg32:715		return rewriteValueARM_OpNeg32(v)716	case OpNeg32F:717		v.Op = OpARMNEGF718		return true719	case OpNeg64F:720		v.Op = OpARMNEGD721		return true722	case OpNeg8:723		return rewriteValueARM_OpNeg8(v)724	case OpNeq16:725		return rewriteValueARM_OpNeq16(v)726	case OpNeq32:727		return rewriteValueARM_OpNeq32(v)728	case OpNeq32F:729		return rewriteValueARM_OpNeq32F(v)730	case OpNeq64F:731		return rewriteValueARM_OpNeq64F(v)732	case OpNeq8:733		return rewriteValueARM_OpNeq8(v)734	case OpNeqB:735		v.Op = OpARMXOR736		return true737	case OpNeqPtr:738		return rewriteValueARM_OpNeqPtr(v)739	case OpNilCheck:740		v.Op = OpARMLoweredNilCheck741		return true742	case OpNot:743		return rewriteValueARM_OpNot(v)744	case OpOffPtr:745		return rewriteValueARM_OpOffPtr(v)746	case OpOr16:747		v.Op = OpARMOR748		return true749	case OpOr32:750		v.Op = OpARMOR751		return true752	case OpOr8:753		v.Op = OpARMOR754		return true755	case OpOrB:756		v.Op = OpARMOR757		return true758	case OpPanicBounds:759		v.Op = OpARMLoweredPanicBoundsRR760		return true761	case OpPanicExtend:762		v.Op = OpARMLoweredPanicExtendRR763		return true764	case OpRotateLeft16:765		return rewriteValueARM_OpRotateLeft16(v)766	case OpRotateLeft32:767		return rewriteValueARM_OpRotateLeft32(v)768	case OpRotateLeft8:769		return rewriteValueARM_OpRotateLeft8(v)770	case OpRound32F:771		v.Op = OpCopy772		return true773	case OpRound64F:774		v.Op = OpCopy775		return true776	case OpRsh16Ux16:777		return rewriteValueARM_OpRsh16Ux16(v)778	case OpRsh16Ux32:779		return rewriteValueARM_OpRsh16Ux32(v)780	case OpRsh16Ux64:781		return rewriteValueARM_OpRsh16Ux64(v)782	case OpRsh16Ux8:783		return rewriteValueARM_OpRsh16Ux8(v)784	case OpRsh16x16:785		return rewriteValueARM_OpRsh16x16(v)786	case OpRsh16x32:787		return rewriteValueARM_OpRsh16x32(v)788	case OpRsh16x64:789		return rewriteValueARM_OpRsh16x64(v)790	case OpRsh16x8:791		return rewriteValueARM_OpRsh16x8(v)792	case OpRsh32Ux16:793		return rewriteValueARM_OpRsh32Ux16(v)794	case OpRsh32Ux32:795		return rewriteValueARM_OpRsh32Ux32(v)796	case OpRsh32Ux64:797		return rewriteValueARM_OpRsh32Ux64(v)798	case OpRsh32Ux8:799		return rewriteValueARM_OpRsh32Ux8(v)800	case OpRsh32x16:801		return rewriteValueARM_OpRsh32x16(v)802	case OpRsh32x32:803		return rewriteValueARM_OpRsh32x32(v)804	case OpRsh32x64:805		return rewriteValueARM_OpRsh32x64(v)806	case OpRsh32x8:807		return rewriteValueARM_OpRsh32x8(v)808	case OpRsh8Ux16:809		return rewriteValueARM_OpRsh8Ux16(v)810	case OpRsh8Ux32:811		return rewriteValueARM_OpRsh8Ux32(v)812	case OpRsh8Ux64:813		return rewriteValueARM_OpRsh8Ux64(v)814	case OpRsh8Ux8:815		return rewriteValueARM_OpRsh8Ux8(v)816	case OpRsh8x16:817		return rewriteValueARM_OpRsh8x16(v)818	case OpRsh8x32:819		return rewriteValueARM_OpRsh8x32(v)820	case OpRsh8x64:821		return rewriteValueARM_OpRsh8x64(v)822	case OpRsh8x8:823		return rewriteValueARM_OpRsh8x8(v)824	case OpSelect0:825		return rewriteValueARM_OpSelect0(v)826	case OpSelect1:827		return rewriteValueARM_OpSelect1(v)828	case OpSignExt16to32:829		v.Op = OpARMMOVHreg830		return true831	case OpSignExt8to16:832		v.Op = OpARMMOVBreg833		return true834	case OpSignExt8to32:835		v.Op = OpARMMOVBreg836		return true837	case OpSignmask:838		return rewriteValueARM_OpSignmask(v)839	case OpSlicemask:840		return rewriteValueARM_OpSlicemask(v)841	case OpSqrt:842		v.Op = OpARMSQRTD843		return true844	case OpSqrt32:845		v.Op = OpARMSQRTF846		return true847	case OpStaticCall:848		v.Op = OpARMCALLstatic849		return true850	case OpStore:851		return rewriteValueARM_OpStore(v)852	case OpSub16:853		v.Op = OpARMSUB854		return true855	case OpSub32:856		v.Op = OpARMSUB857		return true858	case OpSub32F:859		v.Op = OpARMSUBF860		return true861	case OpSub32carry:862		v.Op = OpARMSUBS863		return true864	case OpSub32withcarry:865		v.Op = OpARMSBC866		return true867	case OpSub64F:868		v.Op = OpARMSUBD869		return true870	case OpSub8:871		v.Op = OpARMSUB872		return true873	case OpSubPtr:874		v.Op = OpARMSUB875		return true876	case OpTailCall:877		v.Op = OpARMCALLtail878		return true879	case OpTailCallInter:880		v.Op = OpARMCALLtailinter881		return true882	case OpTrunc16to8:883		v.Op = OpCopy884		return true885	case OpTrunc32to16:886		v.Op = OpCopy887		return true888	case OpTrunc32to8:889		v.Op = OpCopy890		return true891	case OpWB:892		v.Op = OpARMLoweredWB893		return true894	case OpXor16:895		v.Op = OpARMXOR896		return true897	case OpXor32:898		v.Op = OpARMXOR899		return true900	case OpXor8:901		v.Op = OpARMXOR902		return true903	case OpZero:904		return rewriteValueARM_OpZero(v)905	case OpZeroExt16to32:906		v.Op = OpARMMOVHUreg907		return true908	case OpZeroExt8to16:909		v.Op = OpARMMOVBUreg910		return true911	case OpZeroExt8to32:912		v.Op = OpARMMOVBUreg913		return true914	case OpZeromask:915		return rewriteValueARM_OpZeromask(v)916	}917	return false918}919func rewriteValueARM_OpARMADC(v *Value) bool {920	v_2 := v.Args[2]921	v_1 := v.Args[1]922	v_0 := v.Args[0]923	// match: (ADC (MOVWconst [c]) x flags)924	// result: (ADCconst [c] x flags)925	for {926		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {927			if v_0.Op != OpARMMOVWconst {928				continue929			}930			c := auxIntToInt32(v_0.AuxInt)931			x := v_1932			flags := v_2933			v.reset(OpARMADCconst)934			v.AuxInt = int32ToAuxInt(c)935			v.AddArg2(x, flags)936			return true937		}938		break939	}940	// match: (ADC x (SLLconst [c] y) flags)941	// result: (ADCshiftLL x y [c] flags)942	for {943		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {944			x := v_0945			if v_1.Op != OpARMSLLconst {946				continue947			}948			c := auxIntToInt32(v_1.AuxInt)949			y := v_1.Args[0]950			flags := v_2951			v.reset(OpARMADCshiftLL)952			v.AuxInt = int32ToAuxInt(c)953			v.AddArg3(x, y, flags)954			return true955		}956		break957	}958	// match: (ADC x (SRLconst [c] y) flags)959	// result: (ADCshiftRL x y [c] flags)960	for {961		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {962			x := v_0963			if v_1.Op != OpARMSRLconst {964				continue965			}966			c := auxIntToInt32(v_1.AuxInt)967			y := v_1.Args[0]968			flags := v_2969			v.reset(OpARMADCshiftRL)970			v.AuxInt = int32ToAuxInt(c)971			v.AddArg3(x, y, flags)972			return true973		}974		break975	}976	// match: (ADC x (SRAconst [c] y) flags)977	// result: (ADCshiftRA x y [c] flags)978	for {979		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {980			x := v_0981			if v_1.Op != OpARMSRAconst {982				continue983			}984			c := auxIntToInt32(v_1.AuxInt)985			y := v_1.Args[0]986			flags := v_2987			v.reset(OpARMADCshiftRA)988			v.AuxInt = int32ToAuxInt(c)989			v.AddArg3(x, y, flags)990			return true991		}992		break993	}994	// match: (ADC x (SLL y z) flags)995	// result: (ADCshiftLLreg x y z flags)996	for {997		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {998			x := v_0999			if v_1.Op != OpARMSLL {1000				continue1001			}1002			z := v_1.Args[1]1003			y := v_1.Args[0]1004			flags := v_21005			v.reset(OpARMADCshiftLLreg)1006			v.AddArg4(x, y, z, flags)1007			return true1008		}1009		break1010	}1011	// match: (ADC x (SRL y z) flags)1012	// result: (ADCshiftRLreg x y z flags)1013	for {1014		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1015			x := v_01016			if v_1.Op != OpARMSRL {1017				continue1018			}1019			z := v_1.Args[1]1020			y := v_1.Args[0]1021			flags := v_21022			v.reset(OpARMADCshiftRLreg)1023			v.AddArg4(x, y, z, flags)1024			return true1025		}1026		break1027	}1028	// match: (ADC x (SRA y z) flags)1029	// result: (ADCshiftRAreg x y z flags)1030	for {1031		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1032			x := v_01033			if v_1.Op != OpARMSRA {1034				continue1035			}1036			z := v_1.Args[1]1037			y := v_1.Args[0]1038			flags := v_21039			v.reset(OpARMADCshiftRAreg)1040			v.AddArg4(x, y, z, flags)1041			return true1042		}1043		break1044	}1045	return false1046}1047func rewriteValueARM_OpARMADCconst(v *Value) bool {1048	v_1 := v.Args[1]1049	v_0 := v.Args[0]1050	// match: (ADCconst [c] (ADDconst [d] x) flags)1051	// result: (ADCconst [c+d] x flags)1052	for {1053		c := auxIntToInt32(v.AuxInt)1054		if v_0.Op != OpARMADDconst {1055			break1056		}1057		d := auxIntToInt32(v_0.AuxInt)1058		x := v_0.Args[0]1059		flags := v_11060		v.reset(OpARMADCconst)1061		v.AuxInt = int32ToAuxInt(c + d)1062		v.AddArg2(x, flags)1063		return true1064	}1065	// match: (ADCconst [c] (SUBconst [d] x) flags)1066	// result: (ADCconst [c-d] x flags)1067	for {1068		c := auxIntToInt32(v.AuxInt)1069		if v_0.Op != OpARMSUBconst {1070			break1071		}1072		d := auxIntToInt32(v_0.AuxInt)1073		x := v_0.Args[0]1074		flags := v_11075		v.reset(OpARMADCconst)1076		v.AuxInt = int32ToAuxInt(c - d)1077		v.AddArg2(x, flags)1078		return true1079	}1080	return false1081}1082func rewriteValueARM_OpARMADCshiftLL(v *Value) bool {1083	v_2 := v.Args[2]1084	v_1 := v.Args[1]1085	v_0 := v.Args[0]1086	b := v.Block1087	// match: (ADCshiftLL (MOVWconst [c]) x [d] flags)1088	// result: (ADCconst [c] (SLLconst <x.Type> x [d]) flags)1089	for {1090		d := auxIntToInt32(v.AuxInt)1091		if v_0.Op != OpARMMOVWconst {1092			break1093		}1094		c := auxIntToInt32(v_0.AuxInt)1095		x := v_11096		flags := v_21097		v.reset(OpARMADCconst)1098		v.AuxInt = int32ToAuxInt(c)1099		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)1100		v0.AuxInt = int32ToAuxInt(d)1101		v0.AddArg(x)1102		v.AddArg2(v0, flags)1103		return true1104	}1105	// match: (ADCshiftLL x (MOVWconst [c]) [d] flags)1106	// result: (ADCconst x [c<<uint64(d)] flags)1107	for {1108		d := auxIntToInt32(v.AuxInt)1109		x := v_01110		if v_1.Op != OpARMMOVWconst {1111			break1112		}1113		c := auxIntToInt32(v_1.AuxInt)1114		flags := v_21115		v.reset(OpARMADCconst)1116		v.AuxInt = int32ToAuxInt(c << uint64(d))1117		v.AddArg2(x, flags)1118		return true1119	}1120	return false1121}1122func rewriteValueARM_OpARMADCshiftLLreg(v *Value) bool {1123	v_3 := v.Args[3]1124	v_2 := v.Args[2]1125	v_1 := v.Args[1]1126	v_0 := v.Args[0]1127	b := v.Block1128	// match: (ADCshiftLLreg (MOVWconst [c]) x y flags)1129	// result: (ADCconst [c] (SLL <x.Type> x y) flags)1130	for {1131		if v_0.Op != OpARMMOVWconst {1132			break1133		}1134		c := auxIntToInt32(v_0.AuxInt)1135		x := v_11136		y := v_21137		flags := v_31138		v.reset(OpARMADCconst)1139		v.AuxInt = int32ToAuxInt(c)1140		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)1141		v0.AddArg2(x, y)1142		v.AddArg2(v0, flags)1143		return true1144	}1145	// match: (ADCshiftLLreg x y (MOVWconst [c]) flags)1146	// cond: 0 <= c && c < 321147	// result: (ADCshiftLL x y [c] flags)1148	for {1149		x := v_01150		y := v_11151		if v_2.Op != OpARMMOVWconst {1152			break1153		}1154		c := auxIntToInt32(v_2.AuxInt)1155		flags := v_31156		if !(0 <= c && c < 32) {1157			break1158		}1159		v.reset(OpARMADCshiftLL)1160		v.AuxInt = int32ToAuxInt(c)1161		v.AddArg3(x, y, flags)1162		return true1163	}1164	return false1165}1166func rewriteValueARM_OpARMADCshiftRA(v *Value) bool {1167	v_2 := v.Args[2]1168	v_1 := v.Args[1]1169	v_0 := v.Args[0]1170	b := v.Block1171	// match: (ADCshiftRA (MOVWconst [c]) x [d] flags)1172	// result: (ADCconst [c] (SRAconst <x.Type> x [d]) flags)1173	for {1174		d := auxIntToInt32(v.AuxInt)1175		if v_0.Op != OpARMMOVWconst {1176			break1177		}1178		c := auxIntToInt32(v_0.AuxInt)1179		x := v_11180		flags := v_21181		v.reset(OpARMADCconst)1182		v.AuxInt = int32ToAuxInt(c)1183		v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)1184		v0.AuxInt = int32ToAuxInt(d)1185		v0.AddArg(x)1186		v.AddArg2(v0, flags)1187		return true1188	}1189	// match: (ADCshiftRA x (MOVWconst [c]) [d] flags)1190	// result: (ADCconst x [c>>uint64(d)] flags)1191	for {1192		d := auxIntToInt32(v.AuxInt)1193		x := v_01194		if v_1.Op != OpARMMOVWconst {1195			break1196		}1197		c := auxIntToInt32(v_1.AuxInt)1198		flags := v_21199		v.reset(OpARMADCconst)1200		v.AuxInt = int32ToAuxInt(c >> uint64(d))1201		v.AddArg2(x, flags)1202		return true1203	}1204	return false1205}1206func rewriteValueARM_OpARMADCshiftRAreg(v *Value) bool {1207	v_3 := v.Args[3]1208	v_2 := v.Args[2]1209	v_1 := v.Args[1]1210	v_0 := v.Args[0]1211	b := v.Block1212	// match: (ADCshiftRAreg (MOVWconst [c]) x y flags)1213	// result: (ADCconst [c] (SRA <x.Type> x y) flags)1214	for {1215		if v_0.Op != OpARMMOVWconst {1216			break1217		}1218		c := auxIntToInt32(v_0.AuxInt)1219		x := v_11220		y := v_21221		flags := v_31222		v.reset(OpARMADCconst)1223		v.AuxInt = int32ToAuxInt(c)1224		v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)1225		v0.AddArg2(x, y)1226		v.AddArg2(v0, flags)1227		return true1228	}1229	// match: (ADCshiftRAreg x y (MOVWconst [c]) flags)1230	// cond: 0 <= c && c < 321231	// result: (ADCshiftRA x y [c] flags)1232	for {1233		x := v_01234		y := v_11235		if v_2.Op != OpARMMOVWconst {1236			break1237		}1238		c := auxIntToInt32(v_2.AuxInt)1239		flags := v_31240		if !(0 <= c && c < 32) {1241			break1242		}1243		v.reset(OpARMADCshiftRA)1244		v.AuxInt = int32ToAuxInt(c)1245		v.AddArg3(x, y, flags)1246		return true1247	}1248	return false1249}1250func rewriteValueARM_OpARMADCshiftRL(v *Value) bool {1251	v_2 := v.Args[2]1252	v_1 := v.Args[1]1253	v_0 := v.Args[0]1254	b := v.Block1255	// match: (ADCshiftRL (MOVWconst [c]) x [d] flags)1256	// result: (ADCconst [c] (SRLconst <x.Type> x [d]) flags)1257	for {1258		d := auxIntToInt32(v.AuxInt)1259		if v_0.Op != OpARMMOVWconst {1260			break1261		}1262		c := auxIntToInt32(v_0.AuxInt)1263		x := v_11264		flags := v_21265		v.reset(OpARMADCconst)1266		v.AuxInt = int32ToAuxInt(c)1267		v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)1268		v0.AuxInt = int32ToAuxInt(d)1269		v0.AddArg(x)1270		v.AddArg2(v0, flags)1271		return true1272	}1273	// match: (ADCshiftRL x (MOVWconst [c]) [d] flags)1274	// result: (ADCconst x [int32(uint32(c)>>uint64(d))] flags)1275	for {1276		d := auxIntToInt32(v.AuxInt)1277		x := v_01278		if v_1.Op != OpARMMOVWconst {1279			break1280		}1281		c := auxIntToInt32(v_1.AuxInt)1282		flags := v_21283		v.reset(OpARMADCconst)1284		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))1285		v.AddArg2(x, flags)1286		return true1287	}1288	return false1289}1290func rewriteValueARM_OpARMADCshiftRLreg(v *Value) bool {1291	v_3 := v.Args[3]1292	v_2 := v.Args[2]1293	v_1 := v.Args[1]1294	v_0 := v.Args[0]1295	b := v.Block1296	// match: (ADCshiftRLreg (MOVWconst [c]) x y flags)1297	// result: (ADCconst [c] (SRL <x.Type> x y) flags)1298	for {1299		if v_0.Op != OpARMMOVWconst {1300			break1301		}1302		c := auxIntToInt32(v_0.AuxInt)1303		x := v_11304		y := v_21305		flags := v_31306		v.reset(OpARMADCconst)1307		v.AuxInt = int32ToAuxInt(c)1308		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)1309		v0.AddArg2(x, y)1310		v.AddArg2(v0, flags)1311		return true1312	}1313	// match: (ADCshiftRLreg x y (MOVWconst [c]) flags)1314	// cond: 0 <= c && c < 321315	// result: (ADCshiftRL x y [c] flags)1316	for {1317		x := v_01318		y := v_11319		if v_2.Op != OpARMMOVWconst {1320			break1321		}1322		c := auxIntToInt32(v_2.AuxInt)1323		flags := v_31324		if !(0 <= c && c < 32) {1325			break1326		}1327		v.reset(OpARMADCshiftRL)1328		v.AuxInt = int32ToAuxInt(c)1329		v.AddArg3(x, y, flags)1330		return true1331	}1332	return false1333}1334func rewriteValueARM_OpARMADD(v *Value) bool {1335	v_1 := v.Args[1]1336	v_0 := v.Args[0]1337	b := v.Block1338	// match: (ADD x (MOVWconst <t> [c]))1339	// cond: !t.IsPtr()1340	// result: (ADDconst [c] x)1341	for {1342		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1343			x := v_01344			if v_1.Op != OpARMMOVWconst {1345				continue1346			}1347			t := v_1.Type1348			c := auxIntToInt32(v_1.AuxInt)1349			if !(!t.IsPtr()) {1350				continue1351			}1352			v.reset(OpARMADDconst)1353			v.AuxInt = int32ToAuxInt(c)1354			v.AddArg(x)1355			return true1356		}1357		break1358	}1359	// match: (ADD x (SLLconst [c] y))1360	// result: (ADDshiftLL x y [c])1361	for {1362		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1363			x := v_01364			if v_1.Op != OpARMSLLconst {1365				continue1366			}1367			c := auxIntToInt32(v_1.AuxInt)1368			y := v_1.Args[0]1369			v.reset(OpARMADDshiftLL)1370			v.AuxInt = int32ToAuxInt(c)1371			v.AddArg2(x, y)1372			return true1373		}1374		break1375	}1376	// match: (ADD x (SRLconst [c] y))1377	// result: (ADDshiftRL x y [c])1378	for {1379		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1380			x := v_01381			if v_1.Op != OpARMSRLconst {1382				continue1383			}1384			c := auxIntToInt32(v_1.AuxInt)1385			y := v_1.Args[0]1386			v.reset(OpARMADDshiftRL)1387			v.AuxInt = int32ToAuxInt(c)1388			v.AddArg2(x, y)1389			return true1390		}1391		break1392	}1393	// match: (ADD x (SRAconst [c] y))1394	// result: (ADDshiftRA x y [c])1395	for {1396		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1397			x := v_01398			if v_1.Op != OpARMSRAconst {1399				continue1400			}1401			c := auxIntToInt32(v_1.AuxInt)1402			y := v_1.Args[0]1403			v.reset(OpARMADDshiftRA)1404			v.AuxInt = int32ToAuxInt(c)1405			v.AddArg2(x, y)1406			return true1407		}1408		break1409	}1410	// match: (ADD x (SLL y z))1411	// result: (ADDshiftLLreg x y z)1412	for {1413		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1414			x := v_01415			if v_1.Op != OpARMSLL {1416				continue1417			}1418			z := v_1.Args[1]1419			y := v_1.Args[0]1420			v.reset(OpARMADDshiftLLreg)1421			v.AddArg3(x, y, z)1422			return true1423		}1424		break1425	}1426	// match: (ADD x (SRL y z))1427	// result: (ADDshiftRLreg x y z)1428	for {1429		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1430			x := v_01431			if v_1.Op != OpARMSRL {1432				continue1433			}1434			z := v_1.Args[1]1435			y := v_1.Args[0]1436			v.reset(OpARMADDshiftRLreg)1437			v.AddArg3(x, y, z)1438			return true1439		}1440		break1441	}1442	// match: (ADD x (SRA y z))1443	// result: (ADDshiftRAreg x y z)1444	for {1445		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1446			x := v_01447			if v_1.Op != OpARMSRA {1448				continue1449			}1450			z := v_1.Args[1]1451			y := v_1.Args[0]1452			v.reset(OpARMADDshiftRAreg)1453			v.AddArg3(x, y, z)1454			return true1455		}1456		break1457	}1458	// match: (ADD x (RSBconst [0] y))1459	// result: (SUB x y)1460	for {1461		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1462			x := v_01463			if v_1.Op != OpARMRSBconst || auxIntToInt32(v_1.AuxInt) != 0 {1464				continue1465			}1466			y := v_1.Args[0]1467			v.reset(OpARMSUB)1468			v.AddArg2(x, y)1469			return true1470		}1471		break1472	}1473	// match: (ADD <t> (RSBconst [c] x) (RSBconst [d] y))1474	// result: (RSBconst [c+d] (ADD <t> x y))1475	for {1476		t := v.Type1477		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1478			if v_0.Op != OpARMRSBconst {1479				continue1480			}1481			c := auxIntToInt32(v_0.AuxInt)1482			x := v_0.Args[0]1483			if v_1.Op != OpARMRSBconst {1484				continue1485			}1486			d := auxIntToInt32(v_1.AuxInt)1487			y := v_1.Args[0]1488			v.reset(OpARMRSBconst)1489			v.AuxInt = int32ToAuxInt(c + d)1490			v0 := b.NewValue0(v.Pos, OpARMADD, t)1491			v0.AddArg2(x, y)1492			v.AddArg(v0)1493			return true1494		}1495		break1496	}1497	// match: (ADD (MUL x y) a)1498	// result: (MULA x y a)1499	for {1500		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1501			if v_0.Op != OpARMMUL {1502				continue1503			}1504			y := v_0.Args[1]1505			x := v_0.Args[0]1506			a := v_11507			v.reset(OpARMMULA)1508			v.AddArg3(x, y, a)1509			return true1510		}1511		break1512	}1513	return false1514}1515func rewriteValueARM_OpARMADDD(v *Value) bool {1516	v_1 := v.Args[1]1517	v_0 := v.Args[0]1518	// match: (ADDD a (MULD x y))1519	// cond: a.Uses == 1 && buildcfg.GOARM.Version >= 61520	// result: (MULAD a x y)1521	for {1522		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1523			a := v_01524			if v_1.Op != OpARMMULD {1525				continue1526			}1527			y := v_1.Args[1]1528			x := v_1.Args[0]1529			if !(a.Uses == 1 && buildcfg.GOARM.Version >= 6) {1530				continue1531			}1532			v.reset(OpARMMULAD)1533			v.AddArg3(a, x, y)1534			return true1535		}1536		break1537	}1538	// match: (ADDD a (NMULD x y))1539	// cond: a.Uses == 1 && buildcfg.GOARM.Version >= 61540	// result: (MULSD a x y)1541	for {1542		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1543			a := v_01544			if v_1.Op != OpARMNMULD {1545				continue1546			}1547			y := v_1.Args[1]1548			x := v_1.Args[0]1549			if !(a.Uses == 1 && buildcfg.GOARM.Version >= 6) {1550				continue1551			}1552			v.reset(OpARMMULSD)1553			v.AddArg3(a, x, y)1554			return true1555		}1556		break1557	}1558	return false1559}1560func rewriteValueARM_OpARMADDF(v *Value) bool {1561	v_1 := v.Args[1]1562	v_0 := v.Args[0]1563	// match: (ADDF a (MULF x y))1564	// cond: a.Uses == 1 && buildcfg.GOARM.Version >= 61565	// result: (MULAF a x y)1566	for {1567		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1568			a := v_01569			if v_1.Op != OpARMMULF {1570				continue1571			}1572			y := v_1.Args[1]1573			x := v_1.Args[0]1574			if !(a.Uses == 1 && buildcfg.GOARM.Version >= 6) {1575				continue1576			}1577			v.reset(OpARMMULAF)1578			v.AddArg3(a, x, y)1579			return true1580		}1581		break1582	}1583	// match: (ADDF a (NMULF x y))1584	// cond: a.Uses == 1 && buildcfg.GOARM.Version >= 61585	// result: (MULSF a x y)1586	for {1587		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1588			a := v_01589			if v_1.Op != OpARMNMULF {1590				continue1591			}1592			y := v_1.Args[1]1593			x := v_1.Args[0]1594			if !(a.Uses == 1 && buildcfg.GOARM.Version >= 6) {1595				continue1596			}1597			v.reset(OpARMMULSF)1598			v.AddArg3(a, x, y)1599			return true1600		}1601		break1602	}1603	return false1604}1605func rewriteValueARM_OpARMADDS(v *Value) bool {1606	v_1 := v.Args[1]1607	v_0 := v.Args[0]1608	// match: (ADDS x (MOVWconst [c]))1609	// result: (ADDSconst [c] x)1610	for {1611		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1612			x := v_01613			if v_1.Op != OpARMMOVWconst {1614				continue1615			}1616			c := auxIntToInt32(v_1.AuxInt)1617			v.reset(OpARMADDSconst)1618			v.AuxInt = int32ToAuxInt(c)1619			v.AddArg(x)1620			return true1621		}1622		break1623	}1624	// match: (ADDS x (SLLconst [c] y))1625	// result: (ADDSshiftLL x y [c])1626	for {1627		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1628			x := v_01629			if v_1.Op != OpARMSLLconst {1630				continue1631			}1632			c := auxIntToInt32(v_1.AuxInt)1633			y := v_1.Args[0]1634			v.reset(OpARMADDSshiftLL)1635			v.AuxInt = int32ToAuxInt(c)1636			v.AddArg2(x, y)1637			return true1638		}1639		break1640	}1641	// match: (ADDS x (SRLconst [c] y))1642	// result: (ADDSshiftRL x y [c])1643	for {1644		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1645			x := v_01646			if v_1.Op != OpARMSRLconst {1647				continue1648			}1649			c := auxIntToInt32(v_1.AuxInt)1650			y := v_1.Args[0]1651			v.reset(OpARMADDSshiftRL)1652			v.AuxInt = int32ToAuxInt(c)1653			v.AddArg2(x, y)1654			return true1655		}1656		break1657	}1658	// match: (ADDS x (SRAconst [c] y))1659	// result: (ADDSshiftRA x y [c])1660	for {1661		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1662			x := v_01663			if v_1.Op != OpARMSRAconst {1664				continue1665			}1666			c := auxIntToInt32(v_1.AuxInt)1667			y := v_1.Args[0]1668			v.reset(OpARMADDSshiftRA)1669			v.AuxInt = int32ToAuxInt(c)1670			v.AddArg2(x, y)1671			return true1672		}1673		break1674	}1675	// match: (ADDS x (SLL y z))1676	// result: (ADDSshiftLLreg x y z)1677	for {1678		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1679			x := v_01680			if v_1.Op != OpARMSLL {1681				continue1682			}1683			z := v_1.Args[1]1684			y := v_1.Args[0]1685			v.reset(OpARMADDSshiftLLreg)1686			v.AddArg3(x, y, z)1687			return true1688		}1689		break1690	}1691	// match: (ADDS x (SRL y z))1692	// result: (ADDSshiftRLreg x y z)1693	for {1694		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1695			x := v_01696			if v_1.Op != OpARMSRL {1697				continue1698			}1699			z := v_1.Args[1]1700			y := v_1.Args[0]1701			v.reset(OpARMADDSshiftRLreg)1702			v.AddArg3(x, y, z)1703			return true1704		}1705		break1706	}1707	// match: (ADDS x (SRA y z))1708	// result: (ADDSshiftRAreg x y z)1709	for {1710		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1711			x := v_01712			if v_1.Op != OpARMSRA {1713				continue1714			}1715			z := v_1.Args[1]1716			y := v_1.Args[0]1717			v.reset(OpARMADDSshiftRAreg)1718			v.AddArg3(x, y, z)1719			return true1720		}1721		break1722	}1723	return false1724}1725func rewriteValueARM_OpARMADDSshiftLL(v *Value) bool {1726	v_1 := v.Args[1]1727	v_0 := v.Args[0]1728	b := v.Block1729	// match: (ADDSshiftLL (MOVWconst [c]) x [d])1730	// result: (ADDSconst [c] (SLLconst <x.Type> x [d]))1731	for {1732		d := auxIntToInt32(v.AuxInt)1733		if v_0.Op != OpARMMOVWconst {1734			break1735		}1736		c := auxIntToInt32(v_0.AuxInt)1737		x := v_11738		v.reset(OpARMADDSconst)1739		v.AuxInt = int32ToAuxInt(c)1740		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)1741		v0.AuxInt = int32ToAuxInt(d)1742		v0.AddArg(x)1743		v.AddArg(v0)1744		return true1745	}1746	// match: (ADDSshiftLL x (MOVWconst [c]) [d])1747	// result: (ADDSconst x [c<<uint64(d)])1748	for {1749		d := auxIntToInt32(v.AuxInt)1750		x := v_01751		if v_1.Op != OpARMMOVWconst {1752			break1753		}1754		c := auxIntToInt32(v_1.AuxInt)1755		v.reset(OpARMADDSconst)1756		v.AuxInt = int32ToAuxInt(c << uint64(d))1757		v.AddArg(x)1758		return true1759	}1760	return false1761}1762func rewriteValueARM_OpARMADDSshiftLLreg(v *Value) bool {1763	v_2 := v.Args[2]1764	v_1 := v.Args[1]1765	v_0 := v.Args[0]1766	b := v.Block1767	// match: (ADDSshiftLLreg (MOVWconst [c]) x y)1768	// result: (ADDSconst [c] (SLL <x.Type> x y))1769	for {1770		if v_0.Op != OpARMMOVWconst {1771			break1772		}1773		c := auxIntToInt32(v_0.AuxInt)1774		x := v_11775		y := v_21776		v.reset(OpARMADDSconst)1777		v.AuxInt = int32ToAuxInt(c)1778		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)1779		v0.AddArg2(x, y)1780		v.AddArg(v0)1781		return true1782	}1783	// match: (ADDSshiftLLreg x y (MOVWconst [c]))1784	// cond: 0 <= c && c < 321785	// result: (ADDSshiftLL x y [c])1786	for {1787		x := v_01788		y := v_11789		if v_2.Op != OpARMMOVWconst {1790			break1791		}1792		c := auxIntToInt32(v_2.AuxInt)1793		if !(0 <= c && c < 32) {1794			break1795		}1796		v.reset(OpARMADDSshiftLL)1797		v.AuxInt = int32ToAuxInt(c)1798		v.AddArg2(x, y)1799		return true1800	}1801	return false1802}1803func rewriteValueARM_OpARMADDSshiftRA(v *Value) bool {1804	v_1 := v.Args[1]1805	v_0 := v.Args[0]1806	b := v.Block1807	// match: (ADDSshiftRA (MOVWconst [c]) x [d])1808	// result: (ADDSconst [c] (SRAconst <x.Type> x [d]))1809	for {1810		d := auxIntToInt32(v.AuxInt)1811		if v_0.Op != OpARMMOVWconst {1812			break1813		}1814		c := auxIntToInt32(v_0.AuxInt)1815		x := v_11816		v.reset(OpARMADDSconst)1817		v.AuxInt = int32ToAuxInt(c)1818		v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)1819		v0.AuxInt = int32ToAuxInt(d)1820		v0.AddArg(x)1821		v.AddArg(v0)1822		return true1823	}1824	// match: (ADDSshiftRA x (MOVWconst [c]) [d])1825	// result: (ADDSconst x [c>>uint64(d)])1826	for {1827		d := auxIntToInt32(v.AuxInt)1828		x := v_01829		if v_1.Op != OpARMMOVWconst {1830			break1831		}1832		c := auxIntToInt32(v_1.AuxInt)1833		v.reset(OpARMADDSconst)1834		v.AuxInt = int32ToAuxInt(c >> uint64(d))1835		v.AddArg(x)1836		return true1837	}1838	return false1839}1840func rewriteValueARM_OpARMADDSshiftRAreg(v *Value) bool {1841	v_2 := v.Args[2]1842	v_1 := v.Args[1]1843	v_0 := v.Args[0]1844	b := v.Block1845	// match: (ADDSshiftRAreg (MOVWconst [c]) x y)1846	// result: (ADDSconst [c] (SRA <x.Type> x y))1847	for {1848		if v_0.Op != OpARMMOVWconst {1849			break1850		}1851		c := auxIntToInt32(v_0.AuxInt)1852		x := v_11853		y := v_21854		v.reset(OpARMADDSconst)1855		v.AuxInt = int32ToAuxInt(c)1856		v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)1857		v0.AddArg2(x, y)1858		v.AddArg(v0)1859		return true1860	}1861	// match: (ADDSshiftRAreg x y (MOVWconst [c]))1862	// cond: 0 <= c && c < 321863	// result: (ADDSshiftRA x y [c])1864	for {1865		x := v_01866		y := v_11867		if v_2.Op != OpARMMOVWconst {1868			break1869		}1870		c := auxIntToInt32(v_2.AuxInt)1871		if !(0 <= c && c < 32) {1872			break1873		}1874		v.reset(OpARMADDSshiftRA)1875		v.AuxInt = int32ToAuxInt(c)1876		v.AddArg2(x, y)1877		return true1878	}1879	return false1880}1881func rewriteValueARM_OpARMADDSshiftRL(v *Value) bool {1882	v_1 := v.Args[1]1883	v_0 := v.Args[0]1884	b := v.Block1885	// match: (ADDSshiftRL (MOVWconst [c]) x [d])1886	// result: (ADDSconst [c] (SRLconst <x.Type> x [d]))1887	for {1888		d := auxIntToInt32(v.AuxInt)1889		if v_0.Op != OpARMMOVWconst {1890			break1891		}1892		c := auxIntToInt32(v_0.AuxInt)1893		x := v_11894		v.reset(OpARMADDSconst)1895		v.AuxInt = int32ToAuxInt(c)1896		v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)1897		v0.AuxInt = int32ToAuxInt(d)1898		v0.AddArg(x)1899		v.AddArg(v0)1900		return true1901	}1902	// match: (ADDSshiftRL x (MOVWconst [c]) [d])1903	// result: (ADDSconst x [int32(uint32(c)>>uint64(d))])1904	for {1905		d := auxIntToInt32(v.AuxInt)1906		x := v_01907		if v_1.Op != OpARMMOVWconst {1908			break1909		}1910		c := auxIntToInt32(v_1.AuxInt)1911		v.reset(OpARMADDSconst)1912		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))1913		v.AddArg(x)1914		return true1915	}1916	return false1917}1918func rewriteValueARM_OpARMADDSshiftRLreg(v *Value) bool {1919	v_2 := v.Args[2]1920	v_1 := v.Args[1]1921	v_0 := v.Args[0]1922	b := v.Block1923	// match: (ADDSshiftRLreg (MOVWconst [c]) x y)1924	// result: (ADDSconst [c] (SRL <x.Type> x y))1925	for {1926		if v_0.Op != OpARMMOVWconst {1927			break1928		}1929		c := auxIntToInt32(v_0.AuxInt)1930		x := v_11931		y := v_21932		v.reset(OpARMADDSconst)1933		v.AuxInt = int32ToAuxInt(c)1934		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)1935		v0.AddArg2(x, y)1936		v.AddArg(v0)1937		return true1938	}1939	// match: (ADDSshiftRLreg x y (MOVWconst [c]))1940	// cond: 0 <= c && c < 321941	// result: (ADDSshiftRL x y [c])1942	for {1943		x := v_01944		y := v_11945		if v_2.Op != OpARMMOVWconst {1946			break1947		}1948		c := auxIntToInt32(v_2.AuxInt)1949		if !(0 <= c && c < 32) {1950			break1951		}1952		v.reset(OpARMADDSshiftRL)1953		v.AuxInt = int32ToAuxInt(c)1954		v.AddArg2(x, y)1955		return true1956	}1957	return false1958}1959func rewriteValueARM_OpARMADDconst(v *Value) bool {1960	v_0 := v.Args[0]1961	// match: (ADDconst [off1] (MOVWaddr [off2] {sym} ptr))1962	// result: (MOVWaddr [off1+off2] {sym} ptr)1963	for {1964		off1 := auxIntToInt32(v.AuxInt)1965		if v_0.Op != OpARMMOVWaddr {1966			break1967		}1968		off2 := auxIntToInt32(v_0.AuxInt)1969		sym := auxToSym(v_0.Aux)1970		ptr := v_0.Args[0]1971		v.reset(OpARMMOVWaddr)1972		v.AuxInt = int32ToAuxInt(off1 + off2)1973		v.Aux = symToAux(sym)1974		v.AddArg(ptr)1975		return true1976	}1977	// match: (ADDconst [0] x)1978	// result: x1979	for {1980		if auxIntToInt32(v.AuxInt) != 0 {1981			break1982		}1983		x := v_01984		v.copyOf(x)1985		return true1986	}1987	// match: (ADDconst [c] x)1988	// cond: !isARMImmRot(uint32(c)) && isARMImmRot(uint32(-c))1989	// result: (SUBconst [-c] x)1990	for {1991		c := auxIntToInt32(v.AuxInt)1992		x := v_01993		if !(!isARMImmRot(uint32(c)) && isARMImmRot(uint32(-c))) {1994			break1995		}1996		v.reset(OpARMSUBconst)1997		v.AuxInt = int32ToAuxInt(-c)1998		v.AddArg(x)1999		return true2000	}