1// Code generated from _gen/ARM.rules using 'go generate'; DO NOT EDIT.23package ssa45import "internal/buildcfg"6import "cmd/compile/internal/types"7import "cmd/compile/internal/ssa/block"89func rewriteValueARM(v *Value) bool {10	switch v.Op {11	case OpARMADC:12		return rewriteValueARM_OpARMADC(v)13	case OpARMADCconst:14		return rewriteValueARM_OpARMADCconst(v)15	case OpARMADCshiftLL:16		return rewriteValueARM_OpARMADCshiftLL(v)17	case OpARMADCshiftLLreg:18		return rewriteValueARM_OpARMADCshiftLLreg(v)19	case OpARMADCshiftRA:20		return rewriteValueARM_OpARMADCshiftRA(v)21	case OpARMADCshiftRAreg:22		return rewriteValueARM_OpARMADCshiftRAreg(v)23	case OpARMADCshiftRL:24		return rewriteValueARM_OpARMADCshiftRL(v)25	case OpARMADCshiftRLreg:26		return rewriteValueARM_OpARMADCshiftRLreg(v)27	case OpARMADD:28		return rewriteValueARM_OpARMADD(v)29	case OpARMADDD:30		return rewriteValueARM_OpARMADDD(v)31	case OpARMADDF:32		return rewriteValueARM_OpARMADDF(v)33	case OpARMADDS:34		return rewriteValueARM_OpARMADDS(v)35	case OpARMADDSshiftLL:36		return rewriteValueARM_OpARMADDSshiftLL(v)37	case OpARMADDSshiftLLreg:38		return rewriteValueARM_OpARMADDSshiftLLreg(v)39	case OpARMADDSshiftRA:40		return rewriteValueARM_OpARMADDSshiftRA(v)41	case OpARMADDSshiftRAreg:42		return rewriteValueARM_OpARMADDSshiftRAreg(v)43	case OpARMADDSshiftRL:44		return rewriteValueARM_OpARMADDSshiftRL(v)45	case OpARMADDSshiftRLreg:46		return rewriteValueARM_OpARMADDSshiftRLreg(v)47	case OpARMADDconst:48		return rewriteValueARM_OpARMADDconst(v)49	case OpARMADDshiftLL:50		return rewriteValueARM_OpARMADDshiftLL(v)51	case OpARMADDshiftLLreg:52		return rewriteValueARM_OpARMADDshiftLLreg(v)53	case OpARMADDshiftRA:54		return rewriteValueARM_OpARMADDshiftRA(v)55	case OpARMADDshiftRAreg:56		return rewriteValueARM_OpARMADDshiftRAreg(v)57	case OpARMADDshiftRL:58		return rewriteValueARM_OpARMADDshiftRL(v)59	case OpARMADDshiftRLreg:60		return rewriteValueARM_OpARMADDshiftRLreg(v)61	case OpARMAND:62		return rewriteValueARM_OpARMAND(v)63	case OpARMANDconst:64		return rewriteValueARM_OpARMANDconst(v)65	case OpARMANDshiftLL:66		return rewriteValueARM_OpARMANDshiftLL(v)67	case OpARMANDshiftLLreg:68		return rewriteValueARM_OpARMANDshiftLLreg(v)69	case OpARMANDshiftRA:70		return rewriteValueARM_OpARMANDshiftRA(v)71	case OpARMANDshiftRAreg:72		return rewriteValueARM_OpARMANDshiftRAreg(v)73	case OpARMANDshiftRL:74		return rewriteValueARM_OpARMANDshiftRL(v)75	case OpARMANDshiftRLreg:76		return rewriteValueARM_OpARMANDshiftRLreg(v)77	case OpARMBFX:78		return rewriteValueARM_OpARMBFX(v)79	case OpARMBFXU:80		return rewriteValueARM_OpARMBFXU(v)81	case OpARMBIC:82		return rewriteValueARM_OpARMBIC(v)83	case OpARMBICconst:84		return rewriteValueARM_OpARMBICconst(v)85	case OpARMBICshiftLL:86		return rewriteValueARM_OpARMBICshiftLL(v)87	case OpARMBICshiftLLreg:88		return rewriteValueARM_OpARMBICshiftLLreg(v)89	case OpARMBICshiftRA:90		return rewriteValueARM_OpARMBICshiftRA(v)91	case OpARMBICshiftRAreg:92		return rewriteValueARM_OpARMBICshiftRAreg(v)93	case OpARMBICshiftRL:94		return rewriteValueARM_OpARMBICshiftRL(v)95	case OpARMBICshiftRLreg:96		return rewriteValueARM_OpARMBICshiftRLreg(v)97	case OpARMCMN:98		return rewriteValueARM_OpARMCMN(v)99	case OpARMCMNconst:100		return rewriteValueARM_OpARMCMNconst(v)101	case OpARMCMNshiftLL:102		return rewriteValueARM_OpARMCMNshiftLL(v)103	case OpARMCMNshiftLLreg:104		return rewriteValueARM_OpARMCMNshiftLLreg(v)105	case OpARMCMNshiftRA:106		return rewriteValueARM_OpARMCMNshiftRA(v)107	case OpARMCMNshiftRAreg:108		return rewriteValueARM_OpARMCMNshiftRAreg(v)109	case OpARMCMNshiftRL:110		return rewriteValueARM_OpARMCMNshiftRL(v)111	case OpARMCMNshiftRLreg:112		return rewriteValueARM_OpARMCMNshiftRLreg(v)113	case OpARMCMOVWHSconst:114		return rewriteValueARM_OpARMCMOVWHSconst(v)115	case OpARMCMOVWLSconst:116		return rewriteValueARM_OpARMCMOVWLSconst(v)117	case OpARMCMP:118		return rewriteValueARM_OpARMCMP(v)119	case OpARMCMPD:120		return rewriteValueARM_OpARMCMPD(v)121	case OpARMCMPF:122		return rewriteValueARM_OpARMCMPF(v)123	case OpARMCMPconst:124		return rewriteValueARM_OpARMCMPconst(v)125	case OpARMCMPshiftLL:126		return rewriteValueARM_OpARMCMPshiftLL(v)127	case OpARMCMPshiftLLreg:128		return rewriteValueARM_OpARMCMPshiftLLreg(v)129	case OpARMCMPshiftRA:130		return rewriteValueARM_OpARMCMPshiftRA(v)131	case OpARMCMPshiftRAreg:132		return rewriteValueARM_OpARMCMPshiftRAreg(v)133	case OpARMCMPshiftRL:134		return rewriteValueARM_OpARMCMPshiftRL(v)135	case OpARMCMPshiftRLreg:136		return rewriteValueARM_OpARMCMPshiftRLreg(v)137	case OpARMEqual:138		return rewriteValueARM_OpARMEqual(v)139	case OpARMGreaterEqual:140		return rewriteValueARM_OpARMGreaterEqual(v)141	case OpARMGreaterEqualU:142		return rewriteValueARM_OpARMGreaterEqualU(v)143	case OpARMGreaterThan:144		return rewriteValueARM_OpARMGreaterThan(v)145	case OpARMGreaterThanU:146		return rewriteValueARM_OpARMGreaterThanU(v)147	case OpARMLessEqual:148		return rewriteValueARM_OpARMLessEqual(v)149	case OpARMLessEqualU:150		return rewriteValueARM_OpARMLessEqualU(v)151	case OpARMLessThan:152		return rewriteValueARM_OpARMLessThan(v)153	case OpARMLessThanU:154		return rewriteValueARM_OpARMLessThanU(v)155	case OpARMLoweredPanicBoundsRC:156		return rewriteValueARM_OpARMLoweredPanicBoundsRC(v)157	case OpARMLoweredPanicBoundsRR:158		return rewriteValueARM_OpARMLoweredPanicBoundsRR(v)159	case OpARMLoweredPanicExtendRC:160		return rewriteValueARM_OpARMLoweredPanicExtendRC(v)161	case OpARMLoweredPanicExtendRR:162		return rewriteValueARM_OpARMLoweredPanicExtendRR(v)163	case OpARMMOVBUload:164		return rewriteValueARM_OpARMMOVBUload(v)165	case OpARMMOVBUloadidx:166		return rewriteValueARM_OpARMMOVBUloadidx(v)167	case OpARMMOVBUreg:168		return rewriteValueARM_OpARMMOVBUreg(v)169	case OpARMMOVBload:170		return rewriteValueARM_OpARMMOVBload(v)171	case OpARMMOVBloadidx:172		return rewriteValueARM_OpARMMOVBloadidx(v)173	case OpARMMOVBreg:174		return rewriteValueARM_OpARMMOVBreg(v)175	case OpARMMOVBstore:176		return rewriteValueARM_OpARMMOVBstore(v)177	case OpARMMOVBstoreidx:178		return rewriteValueARM_OpARMMOVBstoreidx(v)179	case OpARMMOVDload:180		return rewriteValueARM_OpARMMOVDload(v)181	case OpARMMOVDstore:182		return rewriteValueARM_OpARMMOVDstore(v)183	case OpARMMOVFload:184		return rewriteValueARM_OpARMMOVFload(v)185	case OpARMMOVFstore:186		return rewriteValueARM_OpARMMOVFstore(v)187	case OpARMMOVHUload:188		return rewriteValueARM_OpARMMOVHUload(v)189	case OpARMMOVHUloadidx:190		return rewriteValueARM_OpARMMOVHUloadidx(v)191	case OpARMMOVHUreg:192		return rewriteValueARM_OpARMMOVHUreg(v)193	case OpARMMOVHload:194		return rewriteValueARM_OpARMMOVHload(v)195	case OpARMMOVHloadidx:196		return rewriteValueARM_OpARMMOVHloadidx(v)197	case OpARMMOVHreg:198		return rewriteValueARM_OpARMMOVHreg(v)199	case OpARMMOVHstore:200		return rewriteValueARM_OpARMMOVHstore(v)201	case OpARMMOVHstoreidx:202		return rewriteValueARM_OpARMMOVHstoreidx(v)203	case OpARMMOVWload:204		return rewriteValueARM_OpARMMOVWload(v)205	case OpARMMOVWloadidx:206		return rewriteValueARM_OpARMMOVWloadidx(v)207	case OpARMMOVWloadshiftLL:208		return rewriteValueARM_OpARMMOVWloadshiftLL(v)209	case OpARMMOVWloadshiftRA:210		return rewriteValueARM_OpARMMOVWloadshiftRA(v)211	case OpARMMOVWloadshiftRL:212		return rewriteValueARM_OpARMMOVWloadshiftRL(v)213	case OpARMMOVWnop:214		return rewriteValueARM_OpARMMOVWnop(v)215	case OpARMMOVWreg:216		return rewriteValueARM_OpARMMOVWreg(v)217	case OpARMMOVWstore:218		return rewriteValueARM_OpARMMOVWstore(v)219	case OpARMMOVWstoreidx:220		return rewriteValueARM_OpARMMOVWstoreidx(v)221	case OpARMMOVWstoreshiftLL:222		return rewriteValueARM_OpARMMOVWstoreshiftLL(v)223	case OpARMMOVWstoreshiftRA:224		return rewriteValueARM_OpARMMOVWstoreshiftRA(v)225	case OpARMMOVWstoreshiftRL:226		return rewriteValueARM_OpARMMOVWstoreshiftRL(v)227	case OpARMMUL:228		return rewriteValueARM_OpARMMUL(v)229	case OpARMMULA:230		return rewriteValueARM_OpARMMULA(v)231	case OpARMMULD:232		return rewriteValueARM_OpARMMULD(v)233	case OpARMMULF:234		return rewriteValueARM_OpARMMULF(v)235	case OpARMMULS:236		return rewriteValueARM_OpARMMULS(v)237	case OpARMMVN:238		return rewriteValueARM_OpARMMVN(v)239	case OpARMMVNshiftLL:240		return rewriteValueARM_OpARMMVNshiftLL(v)241	case OpARMMVNshiftLLreg:242		return rewriteValueARM_OpARMMVNshiftLLreg(v)243	case OpARMMVNshiftRA:244		return rewriteValueARM_OpARMMVNshiftRA(v)245	case OpARMMVNshiftRAreg:246		return rewriteValueARM_OpARMMVNshiftRAreg(v)247	case OpARMMVNshiftRL:248		return rewriteValueARM_OpARMMVNshiftRL(v)249	case OpARMMVNshiftRLreg:250		return rewriteValueARM_OpARMMVNshiftRLreg(v)251	case OpARMNEGD:252		return rewriteValueARM_OpARMNEGD(v)253	case OpARMNEGF:254		return rewriteValueARM_OpARMNEGF(v)255	case OpARMNMULD:256		return rewriteValueARM_OpARMNMULD(v)257	case OpARMNMULF:258		return rewriteValueARM_OpARMNMULF(v)259	case OpARMNotEqual:260		return rewriteValueARM_OpARMNotEqual(v)261	case OpARMOR:262		return rewriteValueARM_OpARMOR(v)263	case OpARMORconst:264		return rewriteValueARM_OpARMORconst(v)265	case OpARMORshiftLL:266		return rewriteValueARM_OpARMORshiftLL(v)267	case OpARMORshiftLLreg:268		return rewriteValueARM_OpARMORshiftLLreg(v)269	case OpARMORshiftRA:270		return rewriteValueARM_OpARMORshiftRA(v)271	case OpARMORshiftRAreg:272		return rewriteValueARM_OpARMORshiftRAreg(v)273	case OpARMORshiftRL:274		return rewriteValueARM_OpARMORshiftRL(v)275	case OpARMORshiftRLreg:276		return rewriteValueARM_OpARMORshiftRLreg(v)277	case OpARMRSB:278		return rewriteValueARM_OpARMRSB(v)279	case OpARMRSBSshiftLL:280		return rewriteValueARM_OpARMRSBSshiftLL(v)281	case OpARMRSBSshiftLLreg:282		return rewriteValueARM_OpARMRSBSshiftLLreg(v)283	case OpARMRSBSshiftRA:284		return rewriteValueARM_OpARMRSBSshiftRA(v)285	case OpARMRSBSshiftRAreg:286		return rewriteValueARM_OpARMRSBSshiftRAreg(v)287	case OpARMRSBSshiftRL:288		return rewriteValueARM_OpARMRSBSshiftRL(v)289	case OpARMRSBSshiftRLreg:290		return rewriteValueARM_OpARMRSBSshiftRLreg(v)291	case OpARMRSBconst:292		return rewriteValueARM_OpARMRSBconst(v)293	case OpARMRSBshiftLL:294		return rewriteValueARM_OpARMRSBshiftLL(v)295	case OpARMRSBshiftLLreg:296		return rewriteValueARM_OpARMRSBshiftLLreg(v)297	case OpARMRSBshiftRA:298		return rewriteValueARM_OpARMRSBshiftRA(v)299	case OpARMRSBshiftRAreg:300		return rewriteValueARM_OpARMRSBshiftRAreg(v)301	case OpARMRSBshiftRL:302		return rewriteValueARM_OpARMRSBshiftRL(v)303	case OpARMRSBshiftRLreg:304		return rewriteValueARM_OpARMRSBshiftRLreg(v)305	case OpARMRSCconst:306		return rewriteValueARM_OpARMRSCconst(v)307	case OpARMRSCshiftLL:308		return rewriteValueARM_OpARMRSCshiftLL(v)309	case OpARMRSCshiftLLreg:310		return rewriteValueARM_OpARMRSCshiftLLreg(v)311	case OpARMRSCshiftRA:312		return rewriteValueARM_OpARMRSCshiftRA(v)313	case OpARMRSCshiftRAreg:314		return rewriteValueARM_OpARMRSCshiftRAreg(v)315	case OpARMRSCshiftRL:316		return rewriteValueARM_OpARMRSCshiftRL(v)317	case OpARMRSCshiftRLreg:318		return rewriteValueARM_OpARMRSCshiftRLreg(v)319	case OpARMSBC:320		return rewriteValueARM_OpARMSBC(v)321	case OpARMSBCconst:322		return rewriteValueARM_OpARMSBCconst(v)323	case OpARMSBCshiftLL:324		return rewriteValueARM_OpARMSBCshiftLL(v)325	case OpARMSBCshiftLLreg:326		return rewriteValueARM_OpARMSBCshiftLLreg(v)327	case OpARMSBCshiftRA:328		return rewriteValueARM_OpARMSBCshiftRA(v)329	case OpARMSBCshiftRAreg:330		return rewriteValueARM_OpARMSBCshiftRAreg(v)331	case OpARMSBCshiftRL:332		return rewriteValueARM_OpARMSBCshiftRL(v)333	case OpARMSBCshiftRLreg:334		return rewriteValueARM_OpARMSBCshiftRLreg(v)335	case OpARMSLL:336		return rewriteValueARM_OpARMSLL(v)337	case OpARMSLLconst:338		return rewriteValueARM_OpARMSLLconst(v)339	case OpARMSRA:340		return rewriteValueARM_OpARMSRA(v)341	case OpARMSRAcond:342		return rewriteValueARM_OpARMSRAcond(v)343	case OpARMSRAconst:344		return rewriteValueARM_OpARMSRAconst(v)345	case OpARMSRL:346		return rewriteValueARM_OpARMSRL(v)347	case OpARMSRLconst:348		return rewriteValueARM_OpARMSRLconst(v)349	case OpARMSRR:350		return rewriteValueARM_OpARMSRR(v)351	case OpARMSUB:352		return rewriteValueARM_OpARMSUB(v)353	case OpARMSUBD:354		return rewriteValueARM_OpARMSUBD(v)355	case OpARMSUBF:356		return rewriteValueARM_OpARMSUBF(v)357	case OpARMSUBS:358		return rewriteValueARM_OpARMSUBS(v)359	case OpARMSUBSshiftLL:360		return rewriteValueARM_OpARMSUBSshiftLL(v)361	case OpARMSUBSshiftLLreg:362		return rewriteValueARM_OpARMSUBSshiftLLreg(v)363	case OpARMSUBSshiftRA:364		return rewriteValueARM_OpARMSUBSshiftRA(v)365	case OpARMSUBSshiftRAreg:366		return rewriteValueARM_OpARMSUBSshiftRAreg(v)367	case OpARMSUBSshiftRL:368		return rewriteValueARM_OpARMSUBSshiftRL(v)369	case OpARMSUBSshiftRLreg:370		return rewriteValueARM_OpARMSUBSshiftRLreg(v)371	case OpARMSUBconst:372		return rewriteValueARM_OpARMSUBconst(v)373	case OpARMSUBshiftLL:374		return rewriteValueARM_OpARMSUBshiftLL(v)375	case OpARMSUBshiftLLreg:376		return rewriteValueARM_OpARMSUBshiftLLreg(v)377	case OpARMSUBshiftRA:378		return rewriteValueARM_OpARMSUBshiftRA(v)379	case OpARMSUBshiftRAreg:380		return rewriteValueARM_OpARMSUBshiftRAreg(v)381	case OpARMSUBshiftRL:382		return rewriteValueARM_OpARMSUBshiftRL(v)383	case OpARMSUBshiftRLreg:384		return rewriteValueARM_OpARMSUBshiftRLreg(v)385	case OpARMTEQ:386		return rewriteValueARM_OpARMTEQ(v)387	case OpARMTEQconst:388		return rewriteValueARM_OpARMTEQconst(v)389	case OpARMTEQshiftLL:390		return rewriteValueARM_OpARMTEQshiftLL(v)391	case OpARMTEQshiftLLreg:392		return rewriteValueARM_OpARMTEQshiftLLreg(v)393	case OpARMTEQshiftRA:394		return rewriteValueARM_OpARMTEQshiftRA(v)395	case OpARMTEQshiftRAreg:396		return rewriteValueARM_OpARMTEQshiftRAreg(v)397	case OpARMTEQshiftRL:398		return rewriteValueARM_OpARMTEQshiftRL(v)399	case OpARMTEQshiftRLreg:400		return rewriteValueARM_OpARMTEQshiftRLreg(v)401	case OpARMTST:402		return rewriteValueARM_OpARMTST(v)403	case OpARMTSTconst:404		return rewriteValueARM_OpARMTSTconst(v)405	case OpARMTSTshiftLL:406		return rewriteValueARM_OpARMTSTshiftLL(v)407	case OpARMTSTshiftLLreg:408		return rewriteValueARM_OpARMTSTshiftLLreg(v)409	case OpARMTSTshiftRA:410		return rewriteValueARM_OpARMTSTshiftRA(v)411	case OpARMTSTshiftRAreg:412		return rewriteValueARM_OpARMTSTshiftRAreg(v)413	case OpARMTSTshiftRL:414		return rewriteValueARM_OpARMTSTshiftRL(v)415	case OpARMTSTshiftRLreg:416		return rewriteValueARM_OpARMTSTshiftRLreg(v)417	case OpARMXOR:418		return rewriteValueARM_OpARMXOR(v)419	case OpARMXORconst:420		return rewriteValueARM_OpARMXORconst(v)421	case OpARMXORshiftLL:422		return rewriteValueARM_OpARMXORshiftLL(v)423	case OpARMXORshiftLLreg:424		return rewriteValueARM_OpARMXORshiftLLreg(v)425	case OpARMXORshiftRA:426		return rewriteValueARM_OpARMXORshiftRA(v)427	case OpARMXORshiftRAreg:428		return rewriteValueARM_OpARMXORshiftRAreg(v)429	case OpARMXORshiftRL:430		return rewriteValueARM_OpARMXORshiftRL(v)431	case OpARMXORshiftRLreg:432		return rewriteValueARM_OpARMXORshiftRLreg(v)433	case OpARMXORshiftRR:434		return rewriteValueARM_OpARMXORshiftRR(v)435	case OpAbs:436		v.Op = OpARMABSD437		return true438	case OpAdd16:439		v.Op = OpARMADD440		return true441	case OpAdd32:442		v.Op = OpARMADD443		return true444	case OpAdd32F:445		v.Op = OpARMADDF446		return true447	case OpAdd32carry:448		v.Op = OpARMADDS449		return true450	case OpAdd32carrywithcarry:451		v.Op = OpARMADCS452		return true453	case OpAdd32withcarry:454		v.Op = OpARMADC455		return true456	case OpAdd64F:457		v.Op = OpARMADDD458		return true459	case OpAdd8:460		v.Op = OpARMADD461		return true462	case OpAddPtr:463		v.Op = OpARMADD464		return true465	case OpAddr:466		return rewriteValueARM_OpAddr(v)467	case OpAnd16:468		v.Op = OpARMAND469		return true470	case OpAnd32:471		v.Op = OpARMAND472		return true473	case OpAnd8:474		v.Op = OpARMAND475		return true476	case OpAndB:477		v.Op = OpARMAND478		return true479	case OpAvg32u:480		return rewriteValueARM_OpAvg32u(v)481	case OpBitLen16:482		return rewriteValueARM_OpBitLen16(v)483	case OpBitLen32:484		return rewriteValueARM_OpBitLen32(v)485	case OpBitLen8:486		return rewriteValueARM_OpBitLen8(v)487	case OpBswap32:488		return rewriteValueARM_OpBswap32(v)489	case OpClosureCall:490		v.Op = OpARMCALLclosure491		return true492	case OpCom16:493		v.Op = OpARMMVN494		return true495	case OpCom32:496		v.Op = OpARMMVN497		return true498	case OpCom8:499		v.Op = OpARMMVN500		return true501	case OpConst16:502		return rewriteValueARM_OpConst16(v)503	case OpConst32:504		return rewriteValueARM_OpConst32(v)505	case OpConst32F:506		return rewriteValueARM_OpConst32F(v)507	case OpConst64F:508		return rewriteValueARM_OpConst64F(v)509	case OpConst8:510		return rewriteValueARM_OpConst8(v)511	case OpConstBool:512		return rewriteValueARM_OpConstBool(v)513	case OpConstNil:514		return rewriteValueARM_OpConstNil(v)515	case OpCtz16:516		return rewriteValueARM_OpCtz16(v)517	case OpCtz16NonZero:518		v.Op = OpCtz32519		return true520	case OpCtz32:521		return rewriteValueARM_OpCtz32(v)522	case OpCtz32NonZero:523		v.Op = OpCtz32524		return true525	case OpCtz8:526		return rewriteValueARM_OpCtz8(v)527	case OpCtz8NonZero:528		v.Op = OpCtz32529		return true530	case OpCvt32Fto32:531		v.Op = OpARMMOVFW532		return true533	case OpCvt32Fto32U:534		v.Op = OpARMMOVFWU535		return true536	case OpCvt32Fto64F:537		v.Op = OpARMMOVFD538		return true539	case OpCvt32Uto32F:540		v.Op = OpARMMOVWUF541		return true542	case OpCvt32Uto64F:543		v.Op = OpARMMOVWUD544		return true545	case OpCvt32to32F:546		v.Op = OpARMMOVWF547		return true548	case OpCvt32to64F:549		v.Op = OpARMMOVWD550		return true551	case OpCvt64Fto32:552		v.Op = OpARMMOVDW553		return true554	case OpCvt64Fto32F:555		v.Op = OpARMMOVDF556		return true557	case OpCvt64Fto32U:558		v.Op = OpARMMOVDWU559		return true560	case OpCvtBoolToUint8:561		v.Op = OpCopy562		return true563	case OpDiv16:564		return rewriteValueARM_OpDiv16(v)565	case OpDiv16u:566		return rewriteValueARM_OpDiv16u(v)567	case OpDiv32:568		return rewriteValueARM_OpDiv32(v)569	case OpDiv32F:570		v.Op = OpARMDIVF571		return true572	case OpDiv32u:573		return rewriteValueARM_OpDiv32u(v)574	case OpDiv64F:575		v.Op = OpARMDIVD576		return true577	case OpDiv8:578		return rewriteValueARM_OpDiv8(v)579	case OpDiv8u:580		return rewriteValueARM_OpDiv8u(v)581	case OpEq16:582		return rewriteValueARM_OpEq16(v)583	case OpEq32:584		return rewriteValueARM_OpEq32(v)585	case OpEq32F:586		return rewriteValueARM_OpEq32F(v)587	case OpEq64F:588		return rewriteValueARM_OpEq64F(v)589	case OpEq8:590		return rewriteValueARM_OpEq8(v)591	case OpEqB:592		return rewriteValueARM_OpEqB(v)593	case OpEqPtr:594		return rewriteValueARM_OpEqPtr(v)595	case OpFMA:596		return rewriteValueARM_OpFMA(v)597	case OpGetCallerPC:598		v.Op = OpARMLoweredGetCallerPC599		return true600	case OpGetCallerSP:601		v.Op = OpARMLoweredGetCallerSP602		return true603	case OpGetClosurePtr:604		v.Op = OpARMLoweredGetClosurePtr605		return true606	case OpHmul32:607		v.Op = OpARMHMUL608		return true609	case OpHmul32u:610		v.Op = OpARMHMULU611		return true612	case OpInterCall:613		v.Op = OpARMCALLinter614		return true615	case OpIsInBounds:616		return rewriteValueARM_OpIsInBounds(v)617	case OpIsNonNil:618		return rewriteValueARM_OpIsNonNil(v)619	case OpIsSliceInBounds:620		return rewriteValueARM_OpIsSliceInBounds(v)621	case OpLeq16:622		return rewriteValueARM_OpLeq16(v)623	case OpLeq16U:624		return rewriteValueARM_OpLeq16U(v)625	case OpLeq32:626		return rewriteValueARM_OpLeq32(v)627	case OpLeq32F:628		return rewriteValueARM_OpLeq32F(v)629	case OpLeq32U:630		return rewriteValueARM_OpLeq32U(v)631	case OpLeq64F:632		return rewriteValueARM_OpLeq64F(v)633	case OpLeq8:634		return rewriteValueARM_OpLeq8(v)635	case OpLeq8U:636		return rewriteValueARM_OpLeq8U(v)637	case OpLess16:638		return rewriteValueARM_OpLess16(v)639	case OpLess16U:640		return rewriteValueARM_OpLess16U(v)641	case OpLess32:642		return rewriteValueARM_OpLess32(v)643	case OpLess32F:644		return rewriteValueARM_OpLess32F(v)645	case OpLess32U:646		return rewriteValueARM_OpLess32U(v)647	case OpLess64F:648		return rewriteValueARM_OpLess64F(v)649	case OpLess8:650		return rewriteValueARM_OpLess8(v)651	case OpLess8U:652		return rewriteValueARM_OpLess8U(v)653	case OpLoad:654		return rewriteValueARM_OpLoad(v)655	case OpLocalAddr:656		return rewriteValueARM_OpLocalAddr(v)657	case OpLsh16x16:658		return rewriteValueARM_OpLsh16x16(v)659	case OpLsh16x32:660		return rewriteValueARM_OpLsh16x32(v)661	case OpLsh16x64:662		return rewriteValueARM_OpLsh16x64(v)663	case OpLsh16x8:664		return rewriteValueARM_OpLsh16x8(v)665	case OpLsh32x16:666		return rewriteValueARM_OpLsh32x16(v)667	case OpLsh32x32:668		return rewriteValueARM_OpLsh32x32(v)669	case OpLsh32x64:670		return rewriteValueARM_OpLsh32x64(v)671	case OpLsh32x8:672		return rewriteValueARM_OpLsh32x8(v)673	case OpLsh8x16:674		return rewriteValueARM_OpLsh8x16(v)675	case OpLsh8x32:676		return rewriteValueARM_OpLsh8x32(v)677	case OpLsh8x64:678		return rewriteValueARM_OpLsh8x64(v)679	case OpLsh8x8:680		return rewriteValueARM_OpLsh8x8(v)681	case OpMod16:682		return rewriteValueARM_OpMod16(v)683	case OpMod16u:684		return rewriteValueARM_OpMod16u(v)685	case OpMod32:686		return rewriteValueARM_OpMod32(v)687	case OpMod32u:688		return rewriteValueARM_OpMod32u(v)689	case OpMod8:690		return rewriteValueARM_OpMod8(v)691	case OpMod8u:692		return rewriteValueARM_OpMod8u(v)693	case OpMove:694		return rewriteValueARM_OpMove(v)695	case OpMul16:696		v.Op = OpARMMUL697		return true698	case OpMul32:699		v.Op = OpARMMUL700		return true701	case OpMul32F:702		v.Op = OpARMMULF703		return true704	case OpMul32uhilo:705		v.Op = OpARMMULLU706		return true707	case OpMul64F:708		v.Op = OpARMMULD709		return true710	case OpMul8:711		v.Op = OpARMMUL712		return true713	case OpNeg16:714		return rewriteValueARM_OpNeg16(v)715	case OpNeg32:716		return rewriteValueARM_OpNeg32(v)717	case OpNeg32F:718		v.Op = OpARMNEGF719		return true720	case OpNeg64F:721		v.Op = OpARMNEGD722		return true723	case OpNeg8:724		return rewriteValueARM_OpNeg8(v)725	case OpNeq16:726		return rewriteValueARM_OpNeq16(v)727	case OpNeq32:728		return rewriteValueARM_OpNeq32(v)729	case OpNeq32F:730		return rewriteValueARM_OpNeq32F(v)731	case OpNeq64F:732		return rewriteValueARM_OpNeq64F(v)733	case OpNeq8:734		return rewriteValueARM_OpNeq8(v)735	case OpNeqB:736		v.Op = OpARMXOR737		return true738	case OpNeqPtr:739		return rewriteValueARM_OpNeqPtr(v)740	case OpNilCheck:741		v.Op = OpARMLoweredNilCheck742		return true743	case OpNot:744		return rewriteValueARM_OpNot(v)745	case OpOffPtr:746		return rewriteValueARM_OpOffPtr(v)747	case OpOr16:748		v.Op = OpARMOR749		return true750	case OpOr32:751		v.Op = OpARMOR752		return true753	case OpOr8:754		v.Op = OpARMOR755		return true756	case OpOrB:757		v.Op = OpARMOR758		return true759	case OpPanicBounds:760		v.Op = OpARMLoweredPanicBoundsRR761		return true762	case OpPanicExtend:763		v.Op = OpARMLoweredPanicExtendRR764		return true765	case OpRotateLeft16:766		return rewriteValueARM_OpRotateLeft16(v)767	case OpRotateLeft32:768		return rewriteValueARM_OpRotateLeft32(v)769	case OpRotateLeft8:770		return rewriteValueARM_OpRotateLeft8(v)771	case OpRound32F:772		v.Op = OpCopy773		return true774	case OpRound64F:775		v.Op = OpCopy776		return true777	case OpRsh16Ux16:778		return rewriteValueARM_OpRsh16Ux16(v)779	case OpRsh16Ux32:780		return rewriteValueARM_OpRsh16Ux32(v)781	case OpRsh16Ux64:782		return rewriteValueARM_OpRsh16Ux64(v)783	case OpRsh16Ux8:784		return rewriteValueARM_OpRsh16Ux8(v)785	case OpRsh16x16:786		return rewriteValueARM_OpRsh16x16(v)787	case OpRsh16x32:788		return rewriteValueARM_OpRsh16x32(v)789	case OpRsh16x64:790		return rewriteValueARM_OpRsh16x64(v)791	case OpRsh16x8:792		return rewriteValueARM_OpRsh16x8(v)793	case OpRsh32Ux16:794		return rewriteValueARM_OpRsh32Ux16(v)795	case OpRsh32Ux32:796		return rewriteValueARM_OpRsh32Ux32(v)797	case OpRsh32Ux64:798		return rewriteValueARM_OpRsh32Ux64(v)799	case OpRsh32Ux8:800		return rewriteValueARM_OpRsh32Ux8(v)801	case OpRsh32x16:802		return rewriteValueARM_OpRsh32x16(v)803	case OpRsh32x32:804		return rewriteValueARM_OpRsh32x32(v)805	case OpRsh32x64:806		return rewriteValueARM_OpRsh32x64(v)807	case OpRsh32x8:808		return rewriteValueARM_OpRsh32x8(v)809	case OpRsh8Ux16:810		return rewriteValueARM_OpRsh8Ux16(v)811	case OpRsh8Ux32:812		return rewriteValueARM_OpRsh8Ux32(v)813	case OpRsh8Ux64:814		return rewriteValueARM_OpRsh8Ux64(v)815	case OpRsh8Ux8:816		return rewriteValueARM_OpRsh8Ux8(v)817	case OpRsh8x16:818		return rewriteValueARM_OpRsh8x16(v)819	case OpRsh8x32:820		return rewriteValueARM_OpRsh8x32(v)821	case OpRsh8x64:822		return rewriteValueARM_OpRsh8x64(v)823	case OpRsh8x8:824		return rewriteValueARM_OpRsh8x8(v)825	case OpSelect0:826		return rewriteValueARM_OpSelect0(v)827	case OpSelect1:828		return rewriteValueARM_OpSelect1(v)829	case OpSignExt16to32:830		v.Op = OpARMMOVHreg831		return true832	case OpSignExt8to16:833		v.Op = OpARMMOVBreg834		return true835	case OpSignExt8to32:836		v.Op = OpARMMOVBreg837		return true838	case OpSignmask:839		return rewriteValueARM_OpSignmask(v)840	case OpSlicemask:841		return rewriteValueARM_OpSlicemask(v)842	case OpSqrt:843		v.Op = OpARMSQRTD844		return true845	case OpSqrt32:846		v.Op = OpARMSQRTF847		return true848	case OpStaticCall:849		v.Op = OpARMCALLstatic850		return true851	case OpStore:852		return rewriteValueARM_OpStore(v)853	case OpSub16:854		v.Op = OpARMSUB855		return true856	case OpSub32:857		v.Op = OpARMSUB858		return true859	case OpSub32F:860		v.Op = OpARMSUBF861		return true862	case OpSub32carry:863		v.Op = OpARMSUBS864		return true865	case OpSub32withcarry:866		v.Op = OpARMSBC867		return true868	case OpSub64F:869		v.Op = OpARMSUBD870		return true871	case OpSub8:872		v.Op = OpARMSUB873		return true874	case OpSubPtr:875		v.Op = OpARMSUB876		return true877	case OpTailCall:878		v.Op = OpARMCALLtail879		return true880	case OpTailCallInter:881		v.Op = OpARMCALLtailinter882		return true883	case OpTrunc16to8:884		v.Op = OpCopy885		return true886	case OpTrunc32to16:887		v.Op = OpCopy888		return true889	case OpTrunc32to8:890		v.Op = OpCopy891		return true892	case OpWB:893		v.Op = OpARMLoweredWB894		return true895	case OpXor16:896		v.Op = OpARMXOR897		return true898	case OpXor32:899		v.Op = OpARMXOR900		return true901	case OpXor8:902		v.Op = OpARMXOR903		return true904	case OpZero:905		return rewriteValueARM_OpZero(v)906	case OpZeroExt16to32:907		v.Op = OpARMMOVHUreg908		return true909	case OpZeroExt8to16:910		v.Op = OpARMMOVBUreg911		return true912	case OpZeroExt8to32:913		v.Op = OpARMMOVBUreg914		return true915	case OpZeromask:916		return rewriteValueARM_OpZeromask(v)917	}918	return false919}920func rewriteValueARM_OpARMADC(v *Value) bool {921	v_2 := v.Args[2]922	v_1 := v.Args[1]923	v_0 := v.Args[0]924	// match: (ADC (MOVWconst [c]) x flags)925	// result: (ADCconst [c] x flags)926	for {927		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {928			if v_0.Op != OpARMMOVWconst {929				continue930			}931			c := auxIntToInt32(v_0.AuxInt)932			x := v_1933			flags := v_2934			v.reset(OpARMADCconst)935			v.AuxInt = int32ToAuxInt(c)936			v.AddArg2(x, flags)937			return true938		}939		break940	}941	// match: (ADC x (SLLconst [c] y) flags)942	// result: (ADCshiftLL x y [c] flags)943	for {944		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {945			x := v_0946			if v_1.Op != OpARMSLLconst {947				continue948			}949			c := auxIntToInt32(v_1.AuxInt)950			y := v_1.Args[0]951			flags := v_2952			v.reset(OpARMADCshiftLL)953			v.AuxInt = int32ToAuxInt(c)954			v.AddArg3(x, y, flags)955			return true956		}957		break958	}959	// match: (ADC x (SRLconst [c] y) flags)960	// result: (ADCshiftRL x y [c] flags)961	for {962		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {963			x := v_0964			if v_1.Op != OpARMSRLconst {965				continue966			}967			c := auxIntToInt32(v_1.AuxInt)968			y := v_1.Args[0]969			flags := v_2970			v.reset(OpARMADCshiftRL)971			v.AuxInt = int32ToAuxInt(c)972			v.AddArg3(x, y, flags)973			return true974		}975		break976	}977	// match: (ADC x (SRAconst [c] y) flags)978	// result: (ADCshiftRA x y [c] flags)979	for {980		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {981			x := v_0982			if v_1.Op != OpARMSRAconst {983				continue984			}985			c := auxIntToInt32(v_1.AuxInt)986			y := v_1.Args[0]987			flags := v_2988			v.reset(OpARMADCshiftRA)989			v.AuxInt = int32ToAuxInt(c)990			v.AddArg3(x, y, flags)991			return true992		}993		break994	}995	// match: (ADC x (SLL y z) flags)996	// result: (ADCshiftLLreg x y z flags)997	for {998		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {999			x := v_01000			if v_1.Op != OpARMSLL {1001				continue1002			}1003			z := v_1.Args[1]1004			y := v_1.Args[0]1005			flags := v_21006			v.reset(OpARMADCshiftLLreg)1007			v.AddArg4(x, y, z, flags)1008			return true1009		}1010		break1011	}1012	// match: (ADC x (SRL y z) flags)1013	// result: (ADCshiftRLreg x y z flags)1014	for {1015		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1016			x := v_01017			if v_1.Op != OpARMSRL {1018				continue1019			}1020			z := v_1.Args[1]1021			y := v_1.Args[0]1022			flags := v_21023			v.reset(OpARMADCshiftRLreg)1024			v.AddArg4(x, y, z, flags)1025			return true1026		}1027		break1028	}1029	// match: (ADC x (SRA y z) flags)1030	// result: (ADCshiftRAreg x y z flags)1031	for {1032		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1033			x := v_01034			if v_1.Op != OpARMSRA {1035				continue1036			}1037			z := v_1.Args[1]1038			y := v_1.Args[0]1039			flags := v_21040			v.reset(OpARMADCshiftRAreg)1041			v.AddArg4(x, y, z, flags)1042			return true1043		}1044		break1045	}1046	return false1047}1048func rewriteValueARM_OpARMADCconst(v *Value) bool {1049	v_1 := v.Args[1]1050	v_0 := v.Args[0]1051	// match: (ADCconst [c] (ADDconst [d] x) flags)1052	// result: (ADCconst [c+d] x flags)1053	for {1054		c := auxIntToInt32(v.AuxInt)1055		if v_0.Op != OpARMADDconst {1056			break1057		}1058		d := auxIntToInt32(v_0.AuxInt)1059		x := v_0.Args[0]1060		flags := v_11061		v.reset(OpARMADCconst)1062		v.AuxInt = int32ToAuxInt(c + d)1063		v.AddArg2(x, flags)1064		return true1065	}1066	// match: (ADCconst [c] (SUBconst [d] x) flags)1067	// result: (ADCconst [c-d] x flags)1068	for {1069		c := auxIntToInt32(v.AuxInt)1070		if v_0.Op != OpARMSUBconst {1071			break1072		}1073		d := auxIntToInt32(v_0.AuxInt)1074		x := v_0.Args[0]1075		flags := v_11076		v.reset(OpARMADCconst)1077		v.AuxInt = int32ToAuxInt(c - d)1078		v.AddArg2(x, flags)1079		return true1080	}1081	return false1082}1083func rewriteValueARM_OpARMADCshiftLL(v *Value) bool {1084	v_2 := v.Args[2]1085	v_1 := v.Args[1]1086	v_0 := v.Args[0]1087	b := v.Block1088	// match: (ADCshiftLL (MOVWconst [c]) x [d] flags)1089	// result: (ADCconst [c] (SLLconst <x.Type> x [d]) flags)1090	for {1091		d := auxIntToInt32(v.AuxInt)1092		if v_0.Op != OpARMMOVWconst {1093			break1094		}1095		c := auxIntToInt32(v_0.AuxInt)1096		x := v_11097		flags := v_21098		v.reset(OpARMADCconst)1099		v.AuxInt = int32ToAuxInt(c)1100		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)1101		v0.AuxInt = int32ToAuxInt(d)1102		v0.AddArg(x)1103		v.AddArg2(v0, flags)1104		return true1105	}1106	// match: (ADCshiftLL x (MOVWconst [c]) [d] flags)1107	// result: (ADCconst x [c<<uint64(d)] flags)1108	for {1109		d := auxIntToInt32(v.AuxInt)1110		x := v_01111		if v_1.Op != OpARMMOVWconst {1112			break1113		}1114		c := auxIntToInt32(v_1.AuxInt)1115		flags := v_21116		v.reset(OpARMADCconst)1117		v.AuxInt = int32ToAuxInt(c << uint64(d))1118		v.AddArg2(x, flags)1119		return true1120	}1121	return false1122}1123func rewriteValueARM_OpARMADCshiftLLreg(v *Value) bool {1124	v_3 := v.Args[3]1125	v_2 := v.Args[2]1126	v_1 := v.Args[1]1127	v_0 := v.Args[0]1128	b := v.Block1129	// match: (ADCshiftLLreg (MOVWconst [c]) x y flags)1130	// result: (ADCconst [c] (SLL <x.Type> x y) flags)1131	for {1132		if v_0.Op != OpARMMOVWconst {1133			break1134		}1135		c := auxIntToInt32(v_0.AuxInt)1136		x := v_11137		y := v_21138		flags := v_31139		v.reset(OpARMADCconst)1140		v.AuxInt = int32ToAuxInt(c)1141		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)1142		v0.AddArg2(x, y)1143		v.AddArg2(v0, flags)1144		return true1145	}1146	// match: (ADCshiftLLreg x y (MOVWconst [c]) flags)1147	// cond: 0 <= c && c < 321148	// result: (ADCshiftLL x y [c] flags)1149	for {1150		x := v_01151		y := v_11152		if v_2.Op != OpARMMOVWconst {1153			break1154		}1155		c := auxIntToInt32(v_2.AuxInt)1156		flags := v_31157		if !(0 <= c && c < 32) {1158			break1159		}1160		v.reset(OpARMADCshiftLL)1161		v.AuxInt = int32ToAuxInt(c)1162		v.AddArg3(x, y, flags)1163		return true1164	}1165	return false1166}1167func rewriteValueARM_OpARMADCshiftRA(v *Value) bool {1168	v_2 := v.Args[2]1169	v_1 := v.Args[1]1170	v_0 := v.Args[0]1171	b := v.Block1172	// match: (ADCshiftRA (MOVWconst [c]) x [d] flags)1173	// result: (ADCconst [c] (SRAconst <x.Type> x [d]) flags)1174	for {1175		d := auxIntToInt32(v.AuxInt)1176		if v_0.Op != OpARMMOVWconst {1177			break1178		}1179		c := auxIntToInt32(v_0.AuxInt)1180		x := v_11181		flags := v_21182		v.reset(OpARMADCconst)1183		v.AuxInt = int32ToAuxInt(c)1184		v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)1185		v0.AuxInt = int32ToAuxInt(d)1186		v0.AddArg(x)1187		v.AddArg2(v0, flags)1188		return true1189	}1190	// match: (ADCshiftRA x (MOVWconst [c]) [d] flags)1191	// result: (ADCconst x [c>>uint64(d)] flags)1192	for {1193		d := auxIntToInt32(v.AuxInt)1194		x := v_01195		if v_1.Op != OpARMMOVWconst {1196			break1197		}1198		c := auxIntToInt32(v_1.AuxInt)1199		flags := v_21200		v.reset(OpARMADCconst)1201		v.AuxInt = int32ToAuxInt(c >> uint64(d))1202		v.AddArg2(x, flags)1203		return true1204	}1205	return false1206}1207func rewriteValueARM_OpARMADCshiftRAreg(v *Value) bool {1208	v_3 := v.Args[3]1209	v_2 := v.Args[2]1210	v_1 := v.Args[1]1211	v_0 := v.Args[0]1212	b := v.Block1213	// match: (ADCshiftRAreg (MOVWconst [c]) x y flags)1214	// result: (ADCconst [c] (SRA <x.Type> x y) flags)1215	for {1216		if v_0.Op != OpARMMOVWconst {1217			break1218		}1219		c := auxIntToInt32(v_0.AuxInt)1220		x := v_11221		y := v_21222		flags := v_31223		v.reset(OpARMADCconst)1224		v.AuxInt = int32ToAuxInt(c)1225		v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)1226		v0.AddArg2(x, y)1227		v.AddArg2(v0, flags)1228		return true1229	}1230	// match: (ADCshiftRAreg x y (MOVWconst [c]) flags)1231	// cond: 0 <= c && c < 321232	// result: (ADCshiftRA x y [c] flags)1233	for {1234		x := v_01235		y := v_11236		if v_2.Op != OpARMMOVWconst {1237			break1238		}1239		c := auxIntToInt32(v_2.AuxInt)1240		flags := v_31241		if !(0 <= c && c < 32) {1242			break1243		}1244		v.reset(OpARMADCshiftRA)1245		v.AuxInt = int32ToAuxInt(c)1246		v.AddArg3(x, y, flags)1247		return true1248	}1249	return false1250}1251func rewriteValueARM_OpARMADCshiftRL(v *Value) bool {1252	v_2 := v.Args[2]1253	v_1 := v.Args[1]1254	v_0 := v.Args[0]1255	b := v.Block1256	// match: (ADCshiftRL (MOVWconst [c]) x [d] flags)1257	// result: (ADCconst [c] (SRLconst <x.Type> x [d]) flags)1258	for {1259		d := auxIntToInt32(v.AuxInt)1260		if v_0.Op != OpARMMOVWconst {1261			break1262		}1263		c := auxIntToInt32(v_0.AuxInt)1264		x := v_11265		flags := v_21266		v.reset(OpARMADCconst)1267		v.AuxInt = int32ToAuxInt(c)1268		v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)1269		v0.AuxInt = int32ToAuxInt(d)1270		v0.AddArg(x)1271		v.AddArg2(v0, flags)1272		return true1273	}1274	// match: (ADCshiftRL x (MOVWconst [c]) [d] flags)1275	// result: (ADCconst x [int32(uint32(c)>>uint64(d))] flags)1276	for {1277		d := auxIntToInt32(v.AuxInt)1278		x := v_01279		if v_1.Op != OpARMMOVWconst {1280			break1281		}1282		c := auxIntToInt32(v_1.AuxInt)1283		flags := v_21284		v.reset(OpARMADCconst)1285		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))1286		v.AddArg2(x, flags)1287		return true1288	}1289	return false1290}1291func rewriteValueARM_OpARMADCshiftRLreg(v *Value) bool {1292	v_3 := v.Args[3]1293	v_2 := v.Args[2]1294	v_1 := v.Args[1]1295	v_0 := v.Args[0]1296	b := v.Block1297	// match: (ADCshiftRLreg (MOVWconst [c]) x y flags)1298	// result: (ADCconst [c] (SRL <x.Type> x y) flags)1299	for {1300		if v_0.Op != OpARMMOVWconst {1301			break1302		}1303		c := auxIntToInt32(v_0.AuxInt)1304		x := v_11305		y := v_21306		flags := v_31307		v.reset(OpARMADCconst)1308		v.AuxInt = int32ToAuxInt(c)1309		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)1310		v0.AddArg2(x, y)1311		v.AddArg2(v0, flags)1312		return true1313	}1314	// match: (ADCshiftRLreg x y (MOVWconst [c]) flags)1315	// cond: 0 <= c && c < 321316	// result: (ADCshiftRL x y [c] flags)1317	for {1318		x := v_01319		y := v_11320		if v_2.Op != OpARMMOVWconst {1321			break1322		}1323		c := auxIntToInt32(v_2.AuxInt)1324		flags := v_31325		if !(0 <= c && c < 32) {1326			break1327		}1328		v.reset(OpARMADCshiftRL)1329		v.AuxInt = int32ToAuxInt(c)1330		v.AddArg3(x, y, flags)1331		return true1332	}1333	return false1334}1335func rewriteValueARM_OpARMADD(v *Value) bool {1336	v_1 := v.Args[1]1337	v_0 := v.Args[0]1338	b := v.Block1339	// match: (ADD x (MOVWconst <t> [c]))1340	// cond: !t.IsPtr()1341	// result: (ADDconst [c] x)1342	for {1343		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1344			x := v_01345			if v_1.Op != OpARMMOVWconst {1346				continue1347			}1348			t := v_1.Type1349			c := auxIntToInt32(v_1.AuxInt)1350			if !(!t.IsPtr()) {1351				continue1352			}1353			v.reset(OpARMADDconst)1354			v.AuxInt = int32ToAuxInt(c)1355			v.AddArg(x)1356			return true1357		}1358		break1359	}1360	// match: (ADD x (SLLconst [c] y))1361	// result: (ADDshiftLL x y [c])1362	for {1363		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1364			x := v_01365			if v_1.Op != OpARMSLLconst {1366				continue1367			}1368			c := auxIntToInt32(v_1.AuxInt)1369			y := v_1.Args[0]1370			v.reset(OpARMADDshiftLL)1371			v.AuxInt = int32ToAuxInt(c)1372			v.AddArg2(x, y)1373			return true1374		}1375		break1376	}1377	// match: (ADD x (SRLconst [c] y))1378	// result: (ADDshiftRL x y [c])1379	for {1380		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1381			x := v_01382			if v_1.Op != OpARMSRLconst {1383				continue1384			}1385			c := auxIntToInt32(v_1.AuxInt)1386			y := v_1.Args[0]1387			v.reset(OpARMADDshiftRL)1388			v.AuxInt = int32ToAuxInt(c)1389			v.AddArg2(x, y)1390			return true1391		}1392		break1393	}1394	// match: (ADD x (SRAconst [c] y))1395	// result: (ADDshiftRA x y [c])1396	for {1397		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1398			x := v_01399			if v_1.Op != OpARMSRAconst {1400				continue1401			}1402			c := auxIntToInt32(v_1.AuxInt)1403			y := v_1.Args[0]1404			v.reset(OpARMADDshiftRA)1405			v.AuxInt = int32ToAuxInt(c)1406			v.AddArg2(x, y)1407			return true1408		}1409		break1410	}1411	// match: (ADD x (SLL y z))1412	// result: (ADDshiftLLreg x y z)1413	for {1414		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1415			x := v_01416			if v_1.Op != OpARMSLL {1417				continue1418			}1419			z := v_1.Args[1]1420			y := v_1.Args[0]1421			v.reset(OpARMADDshiftLLreg)1422			v.AddArg3(x, y, z)1423			return true1424		}1425		break1426	}1427	// match: (ADD x (SRL y z))1428	// result: (ADDshiftRLreg x y z)1429	for {1430		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1431			x := v_01432			if v_1.Op != OpARMSRL {1433				continue1434			}1435			z := v_1.Args[1]1436			y := v_1.Args[0]1437			v.reset(OpARMADDshiftRLreg)1438			v.AddArg3(x, y, z)1439			return true1440		}1441		break1442	}1443	// match: (ADD x (SRA y z))1444	// result: (ADDshiftRAreg x y z)1445	for {1446		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1447			x := v_01448			if v_1.Op != OpARMSRA {1449				continue1450			}1451			z := v_1.Args[1]1452			y := v_1.Args[0]1453			v.reset(OpARMADDshiftRAreg)1454			v.AddArg3(x, y, z)1455			return true1456		}1457		break1458	}1459	// match: (ADD x (RSBconst [0] y))1460	// result: (SUB x y)1461	for {1462		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1463			x := v_01464			if v_1.Op != OpARMRSBconst || auxIntToInt32(v_1.AuxInt) != 0 {1465				continue1466			}1467			y := v_1.Args[0]1468			v.reset(OpARMSUB)1469			v.AddArg2(x, y)1470			return true1471		}1472		break1473	}1474	// match: (ADD <t> (RSBconst [c] x) (RSBconst [d] y))1475	// result: (RSBconst [c+d] (ADD <t> x y))1476	for {1477		t := v.Type1478		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1479			if v_0.Op != OpARMRSBconst {1480				continue1481			}1482			c := auxIntToInt32(v_0.AuxInt)1483			x := v_0.Args[0]1484			if v_1.Op != OpARMRSBconst {1485				continue1486			}1487			d := auxIntToInt32(v_1.AuxInt)1488			y := v_1.Args[0]1489			v.reset(OpARMRSBconst)1490			v.AuxInt = int32ToAuxInt(c + d)1491			v0 := b.NewValue0(v.Pos, OpARMADD, t)1492			v0.AddArg2(x, y)1493			v.AddArg(v0)1494			return true1495		}1496		break1497	}1498	// match: (ADD (MUL x y) a)1499	// result: (MULA x y a)1500	for {1501		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1502			if v_0.Op != OpARMMUL {1503				continue1504			}1505			y := v_0.Args[1]1506			x := v_0.Args[0]1507			a := v_11508			v.reset(OpARMMULA)1509			v.AddArg3(x, y, a)1510			return true1511		}1512		break1513	}1514	return false1515}1516func rewriteValueARM_OpARMADDD(v *Value) bool {1517	v_1 := v.Args[1]1518	v_0 := v.Args[0]1519	// match: (ADDD a (MULD x y))1520	// cond: a.Uses == 1 && buildcfg.GOARM.Version >= 61521	// result: (MULAD a x y)1522	for {1523		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1524			a := v_01525			if v_1.Op != OpARMMULD {1526				continue1527			}1528			y := v_1.Args[1]1529			x := v_1.Args[0]1530			if !(a.Uses == 1 && buildcfg.GOARM.Version >= 6) {1531				continue1532			}1533			v.reset(OpARMMULAD)1534			v.AddArg3(a, x, y)1535			return true1536		}1537		break1538	}1539	// match: (ADDD a (NMULD x y))1540	// cond: a.Uses == 1 && buildcfg.GOARM.Version >= 61541	// result: (MULSD a x y)1542	for {1543		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1544			a := v_01545			if v_1.Op != OpARMNMULD {1546				continue1547			}1548			y := v_1.Args[1]1549			x := v_1.Args[0]1550			if !(a.Uses == 1 && buildcfg.GOARM.Version >= 6) {1551				continue1552			}1553			v.reset(OpARMMULSD)1554			v.AddArg3(a, x, y)1555			return true1556		}1557		break1558	}1559	return false1560}1561func rewriteValueARM_OpARMADDF(v *Value) bool {1562	v_1 := v.Args[1]1563	v_0 := v.Args[0]1564	// match: (ADDF a (MULF x y))1565	// cond: a.Uses == 1 && buildcfg.GOARM.Version >= 61566	// result: (MULAF a x y)1567	for {1568		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1569			a := v_01570			if v_1.Op != OpARMMULF {1571				continue1572			}1573			y := v_1.Args[1]1574			x := v_1.Args[0]1575			if !(a.Uses == 1 && buildcfg.GOARM.Version >= 6) {1576				continue1577			}1578			v.reset(OpARMMULAF)1579			v.AddArg3(a, x, y)1580			return true1581		}1582		break1583	}1584	// match: (ADDF a (NMULF x y))1585	// cond: a.Uses == 1 && buildcfg.GOARM.Version >= 61586	// result: (MULSF a x y)1587	for {1588		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1589			a := v_01590			if v_1.Op != OpARMNMULF {1591				continue1592			}1593			y := v_1.Args[1]1594			x := v_1.Args[0]1595			if !(a.Uses == 1 && buildcfg.GOARM.Version >= 6) {1596				continue1597			}1598			v.reset(OpARMMULSF)1599			v.AddArg3(a, x, y)1600			return true1601		}1602		break1603	}1604	return false1605}1606func rewriteValueARM_OpARMADDS(v *Value) bool {1607	v_1 := v.Args[1]1608	v_0 := v.Args[0]1609	// match: (ADDS x (MOVWconst [c]))1610	// result: (ADDSconst [c] x)1611	for {1612		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1613			x := v_01614			if v_1.Op != OpARMMOVWconst {1615				continue1616			}1617			c := auxIntToInt32(v_1.AuxInt)1618			v.reset(OpARMADDSconst)1619			v.AuxInt = int32ToAuxInt(c)1620			v.AddArg(x)1621			return true1622		}1623		break1624	}1625	// match: (ADDS x (SLLconst [c] y))1626	// result: (ADDSshiftLL x y [c])1627	for {1628		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1629			x := v_01630			if v_1.Op != OpARMSLLconst {1631				continue1632			}1633			c := auxIntToInt32(v_1.AuxInt)1634			y := v_1.Args[0]1635			v.reset(OpARMADDSshiftLL)1636			v.AuxInt = int32ToAuxInt(c)1637			v.AddArg2(x, y)1638			return true1639		}1640		break1641	}1642	// match: (ADDS x (SRLconst [c] y))1643	// result: (ADDSshiftRL x y [c])1644	for {1645		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1646			x := v_01647			if v_1.Op != OpARMSRLconst {1648				continue1649			}1650			c := auxIntToInt32(v_1.AuxInt)1651			y := v_1.Args[0]1652			v.reset(OpARMADDSshiftRL)1653			v.AuxInt = int32ToAuxInt(c)1654			v.AddArg2(x, y)1655			return true1656		}1657		break1658	}1659	// match: (ADDS x (SRAconst [c] y))1660	// result: (ADDSshiftRA x y [c])1661	for {1662		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1663			x := v_01664			if v_1.Op != OpARMSRAconst {1665				continue1666			}1667			c := auxIntToInt32(v_1.AuxInt)1668			y := v_1.Args[0]1669			v.reset(OpARMADDSshiftRA)1670			v.AuxInt = int32ToAuxInt(c)1671			v.AddArg2(x, y)1672			return true1673		}1674		break1675	}1676	// match: (ADDS x (SLL y z))1677	// result: (ADDSshiftLLreg x y z)1678	for {1679		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1680			x := v_01681			if v_1.Op != OpARMSLL {1682				continue1683			}1684			z := v_1.Args[1]1685			y := v_1.Args[0]1686			v.reset(OpARMADDSshiftLLreg)1687			v.AddArg3(x, y, z)1688			return true1689		}1690		break1691	}1692	// match: (ADDS x (SRL y z))1693	// result: (ADDSshiftRLreg x y z)1694	for {1695		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1696			x := v_01697			if v_1.Op != OpARMSRL {1698				continue1699			}1700			z := v_1.Args[1]1701			y := v_1.Args[0]1702			v.reset(OpARMADDSshiftRLreg)1703			v.AddArg3(x, y, z)1704			return true1705		}1706		break1707	}1708	// match: (ADDS x (SRA y z))1709	// result: (ADDSshiftRAreg x y z)1710	for {1711		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {1712			x := v_01713			if v_1.Op != OpARMSRA {1714				continue1715			}1716			z := v_1.Args[1]1717			y := v_1.Args[0]1718			v.reset(OpARMADDSshiftRAreg)1719			v.AddArg3(x, y, z)1720			return true1721		}1722		break1723	}1724	return false1725}1726func rewriteValueARM_OpARMADDSshiftLL(v *Value) bool {1727	v_1 := v.Args[1]1728	v_0 := v.Args[0]1729	b := v.Block1730	// match: (ADDSshiftLL (MOVWconst [c]) x [d])1731	// result: (ADDSconst [c] (SLLconst <x.Type> x [d]))1732	for {1733		d := auxIntToInt32(v.AuxInt)1734		if v_0.Op != OpARMMOVWconst {1735			break1736		}1737		c := auxIntToInt32(v_0.AuxInt)1738		x := v_11739		v.reset(OpARMADDSconst)1740		v.AuxInt = int32ToAuxInt(c)1741		v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)1742		v0.AuxInt = int32ToAuxInt(d)1743		v0.AddArg(x)1744		v.AddArg(v0)1745		return true1746	}1747	// match: (ADDSshiftLL x (MOVWconst [c]) [d])1748	// result: (ADDSconst x [c<<uint64(d)])1749	for {1750		d := auxIntToInt32(v.AuxInt)1751		x := v_01752		if v_1.Op != OpARMMOVWconst {1753			break1754		}1755		c := auxIntToInt32(v_1.AuxInt)1756		v.reset(OpARMADDSconst)1757		v.AuxInt = int32ToAuxInt(c << uint64(d))1758		v.AddArg(x)1759		return true1760	}1761	return false1762}1763func rewriteValueARM_OpARMADDSshiftLLreg(v *Value) bool {1764	v_2 := v.Args[2]1765	v_1 := v.Args[1]1766	v_0 := v.Args[0]1767	b := v.Block1768	// match: (ADDSshiftLLreg (MOVWconst [c]) x y)1769	// result: (ADDSconst [c] (SLL <x.Type> x y))1770	for {1771		if v_0.Op != OpARMMOVWconst {1772			break1773		}1774		c := auxIntToInt32(v_0.AuxInt)1775		x := v_11776		y := v_21777		v.reset(OpARMADDSconst)1778		v.AuxInt = int32ToAuxInt(c)1779		v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)1780		v0.AddArg2(x, y)1781		v.AddArg(v0)1782		return true1783	}1784	// match: (ADDSshiftLLreg x y (MOVWconst [c]))1785	// cond: 0 <= c && c < 321786	// result: (ADDSshiftLL x y [c])1787	for {1788		x := v_01789		y := v_11790		if v_2.Op != OpARMMOVWconst {1791			break1792		}1793		c := auxIntToInt32(v_2.AuxInt)1794		if !(0 <= c && c < 32) {1795			break1796		}1797		v.reset(OpARMADDSshiftLL)1798		v.AuxInt = int32ToAuxInt(c)1799		v.AddArg2(x, y)1800		return true1801	}1802	return false1803}1804func rewriteValueARM_OpARMADDSshiftRA(v *Value) bool {1805	v_1 := v.Args[1]1806	v_0 := v.Args[0]1807	b := v.Block1808	// match: (ADDSshiftRA (MOVWconst [c]) x [d])1809	// result: (ADDSconst [c] (SRAconst <x.Type> x [d]))1810	for {1811		d := auxIntToInt32(v.AuxInt)1812		if v_0.Op != OpARMMOVWconst {1813			break1814		}1815		c := auxIntToInt32(v_0.AuxInt)1816		x := v_11817		v.reset(OpARMADDSconst)1818		v.AuxInt = int32ToAuxInt(c)1819		v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)1820		v0.AuxInt = int32ToAuxInt(d)1821		v0.AddArg(x)1822		v.AddArg(v0)1823		return true1824	}1825	// match: (ADDSshiftRA x (MOVWconst [c]) [d])1826	// result: (ADDSconst x [c>>uint64(d)])1827	for {1828		d := auxIntToInt32(v.AuxInt)1829		x := v_01830		if v_1.Op != OpARMMOVWconst {1831			break1832		}1833		c := auxIntToInt32(v_1.AuxInt)1834		v.reset(OpARMADDSconst)1835		v.AuxInt = int32ToAuxInt(c >> uint64(d))1836		v.AddArg(x)1837		return true1838	}1839	return false1840}1841func rewriteValueARM_OpARMADDSshiftRAreg(v *Value) bool {1842	v_2 := v.Args[2]1843	v_1 := v.Args[1]1844	v_0 := v.Args[0]1845	b := v.Block1846	// match: (ADDSshiftRAreg (MOVWconst [c]) x y)1847	// result: (ADDSconst [c] (SRA <x.Type> x y))1848	for {1849		if v_0.Op != OpARMMOVWconst {1850			break1851		}1852		c := auxIntToInt32(v_0.AuxInt)1853		x := v_11854		y := v_21855		v.reset(OpARMADDSconst)1856		v.AuxInt = int32ToAuxInt(c)1857		v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)1858		v0.AddArg2(x, y)1859		v.AddArg(v0)1860		return true1861	}1862	// match: (ADDSshiftRAreg x y (MOVWconst [c]))1863	// cond: 0 <= c && c < 321864	// result: (ADDSshiftRA x y [c])1865	for {1866		x := v_01867		y := v_11868		if v_2.Op != OpARMMOVWconst {1869			break1870		}1871		c := auxIntToInt32(v_2.AuxInt)1872		if !(0 <= c && c < 32) {1873			break1874		}1875		v.reset(OpARMADDSshiftRA)1876		v.AuxInt = int32ToAuxInt(c)1877		v.AddArg2(x, y)1878		return true1879	}1880	return false1881}1882func rewriteValueARM_OpARMADDSshiftRL(v *Value) bool {1883	v_1 := v.Args[1]1884	v_0 := v.Args[0]1885	b := v.Block1886	// match: (ADDSshiftRL (MOVWconst [c]) x [d])1887	// result: (ADDSconst [c] (SRLconst <x.Type> x [d]))1888	for {1889		d := auxIntToInt32(v.AuxInt)1890		if v_0.Op != OpARMMOVWconst {1891			break1892		}1893		c := auxIntToInt32(v_0.AuxInt)1894		x := v_11895		v.reset(OpARMADDSconst)1896		v.AuxInt = int32ToAuxInt(c)1897		v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)1898		v0.AuxInt = int32ToAuxInt(d)1899		v0.AddArg(x)1900		v.AddArg(v0)1901		return true1902	}1903	// match: (ADDSshiftRL x (MOVWconst [c]) [d])1904	// result: (ADDSconst x [int32(uint32(c)>>uint64(d))])1905	for {1906		d := auxIntToInt32(v.AuxInt)1907		x := v_01908		if v_1.Op != OpARMMOVWconst {1909			break1910		}1911		c := auxIntToInt32(v_1.AuxInt)1912		v.reset(OpARMADDSconst)1913		v.AuxInt = int32ToAuxInt(int32(uint32(c) >> uint64(d)))1914		v.AddArg(x)1915		return true1916	}1917	return false1918}1919func rewriteValueARM_OpARMADDSshiftRLreg(v *Value) bool {1920	v_2 := v.Args[2]1921	v_1 := v.Args[1]1922	v_0 := v.Args[0]1923	b := v.Block1924	// match: (ADDSshiftRLreg (MOVWconst [c]) x y)1925	// result: (ADDSconst [c] (SRL <x.Type> x y))1926	for {1927		if v_0.Op != OpARMMOVWconst {1928			break1929		}1930		c := auxIntToInt32(v_0.AuxInt)1931		x := v_11932		y := v_21933		v.reset(OpARMADDSconst)1934		v.AuxInt = int32ToAuxInt(c)1935		v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)1936		v0.AddArg2(x, y)1937		v.AddArg(v0)1938		return true1939	}1940	// match: (ADDSshiftRLreg x y (MOVWconst [c]))1941	// cond: 0 <= c && c < 321942	// result: (ADDSshiftRL x y [c])1943	for {1944		x := v_01945		y := v_11946		if v_2.Op != OpARMMOVWconst {1947			break1948		}1949		c := auxIntToInt32(v_2.AuxInt)1950		if !(0 <= c && c < 32) {1951			break1952		}1953		v.reset(OpARMADDSshiftRL)1954		v.AuxInt = int32ToAuxInt(c)1955		v.AddArg2(x, y)1956		return true1957	}1958	return false1959}1960func rewriteValueARM_OpARMADDconst(v *Value) bool {1961	v_0 := v.Args[0]1962	// match: (ADDconst [off1] (MOVWaddr [off2] {sym} ptr))1963	// result: (MOVWaddr [off1+off2] {sym} ptr)1964	for {1965		off1 := auxIntToInt32(v.AuxInt)1966		if v_0.Op != OpARMMOVWaddr {1967			break1968		}1969		off2 := auxIntToInt32(v_0.AuxInt)1970		sym := auxToSym(v_0.Aux)1971		ptr := v_0.Args[0]1972		v.reset(OpARMMOVWaddr)1973		v.AuxInt = int32ToAuxInt(off1 + off2)1974		v.Aux = symToAux(sym)1975		v.AddArg(ptr)1976		return true1977	}1978	// match: (ADDconst [0] x)1979	// result: x1980	for {1981		if auxIntToInt32(v.AuxInt) != 0 {1982			break1983		}1984		x := v_01985		v.copyOf(x)1986		return true1987	}1988	// match: (ADDconst [c] x)1989	// cond: !isARMImmRot(uint32(c)) && isARMImmRot(uint32(-c))1990	// result: (SUBconst [-c] x)1991	for {1992		c := auxIntToInt32(v.AuxInt)1993		x := v_01994		if !(!isARMImmRot(uint32(c)) && isARMImmRot(uint32(-c))) {1995			break1996		}1997		v.reset(OpARMSUBconst)1998		v.AuxInt = int32ToAuxInt(-c)1999		v.AddArg(x)2000		return true