1// Copyright 2025 The Go Authors. All rights reserved.2// Use of this source code is governed by a BSD-style3// license that can be found in the LICENSE file.45#include "asm_riscv64.h"6#include "go_asm.h"7#include "textflag.h"89// TODO(mzh): use Zvkb if possible1011#define QR(A, B, C, D) \12	VADDVV	A, B, A \13	VXORVV	D, A, D \14	VSLLVI	$16, D, V28 \15	VSRLVI	$16, D, D \16	VXORVV	V28, D, D \17	VADDVV	D, C, C  \18	VXORVV	C, B, B \19	VSLLVI	$12, B, V29 \20	VSRLVI	$20, B, B \21	VXORVV	V29, B, B \22	VADDVV	B, A, A  \23	VXORVV	A, D, D \24	VSLLVI	$8, D, V30 \25	VSRLVI	$24, D, D \26	VXORVV	V30, D, D \27	VADDVV	D, C, C  \28	VXORVV	C, B, B \29	VSLLVI	$7, B, V31 \30	VSRLVI	$25, B, B \31	VXORVV	V31, B, B3233// block runs four ChaCha8 block transformations using four elements in each V register.34// func block(seed *[8]uint32, blocks *[16][4]uint32, counter uint32)35TEXT ·block<ABIInternal>(SB), NOSPLIT, $036	// seed in X1037	// blocks in X1138	// counter in X123940#ifndef hasV41	MOVB	internal∕cpu·RISCV64+const_offsetRISCV64HasV(SB), X1342	BNEZ	X13, vector_chacha843	JMP	·block_generic<ABIInternal>(SB)44#endif4546vector_chacha8:47	// At least VLEN >= 12848	VSETIVLI	$4, E32, M1, TA, MA, X049	// Load initial constants into top row.50	MOV $·chachaConst(SB), X1451	VLSSEG4E32V	(X14), X0, V0 // V0, V1, V2, V3 = const row52	VLSSEG8E32V	(X10), X0, V4 // V4 ... V11, seed53	VIDV	V1254	VADDVX	X12, V12, V12		// counter5556	// Clear all nonces.57	VXORVV	V13, V13, V1358	VXORVV	V14, V14, V1459	VXORVV	V15, V15, V156061	// Copy initial state.62	VMV4RV V4, V2063	VMV4RV V8, V246465	MOV	$4, X1566	PCALIGN	$1667loop:68	QR(V0, V4, V8, V12)69	QR(V1, V5, V9, V13)70	QR(V2, V6, V10, V14)71	QR(V3, V7, V11, V15)7273	QR(V0, V5, V10, V15)74	QR(V1, V6, V11, V12)75	QR(V2, V7, V8, V13)76	QR(V3, V4, V9, V14)7778	SUB	$1, X1579	BNEZ	X15, loop8081	VADDVV	V20, V4, V482	VADDVV	V21, V5, V583	VADDVV	V22, V6, V684	VADDVV	V23, V7, V785	VADDVV	V24, V8, V886	VADDVV	V25, V9, V987	VADDVV	V26, V10, V1088	VADDVV	V27, V11, V118990	VSE32V	V0, (X11); ADD $16, X11;91	VSE32V	V1, (X11); ADD $16, X11;92	VSE32V	V2, (X11); ADD $16, X11;93	VSE32V	V3, (X11); ADD $16, X11;94	VSE32V	V4, (X11); ADD $16, X11;95	VSE32V	V5, (X11); ADD $16, X11;96	VSE32V	V6, (X11); ADD $16, X11;97	VSE32V	V7, (X11); ADD $16, X11;98	VSE32V	V8, (X11); ADD $16, X11;99	VSE32V	V9, (X11); ADD $16, X11;100	VSE32V	V10, (X11); ADD $16, X11;101	VSE32V	V11, (X11); ADD $16, X11;102	VSE32V	V12, (X11); ADD $16, X11;103	VSE32V	V13, (X11); ADD $16, X11;104	VSE32V	V14, (X11); ADD $16, X11;105	VSE32V	V15, (X11); ADD $16, X11;106107	RET108109GLOBL	·chachaConst(SB), NOPTR|RODATA, $32110DATA	·chachaConst+0x00(SB)/4, $0x61707865111DATA	·chachaConst+0x04(SB)/4, $0x3320646e112DATA	·chachaConst+0x08(SB)/4, $0x79622d32113DATA	·chachaConst+0x0c(SB)/4, $0x6b206574