1arch_cfgs:2  - arch_name: aarch643    target_feature: [neon]4    llvm_prefix: llvm.aarch64.neon5# Generate big endian shuffles6auto_big_endian: true78# Repeatedly used anchors 9# #[stable(feature = "neon_intrinsics", since = "1.59.0")]10neon-stable: &neon-stable11  FnCall: [stable, ['feature = "neon_intrinsics"', 'since = "1.59.0"']]1213# #[stable(feature = "stdarch_neon_fp16", since = "1.94.0")]14neon-stable-fp16: &neon-stable-fp1615  FnCall: [stable, ['feature = "stdarch_neon_fp16"', 'since = "1.94.0"']]1617# #[cfg_attr(target_arch = "arm", unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800"))]18neon-cfg-arm-unstable: &neon-cfg-arm-unstable19  FnCall: ['cfg_attr', ['target_arch = "arm"', {FnCall: ['unstable', ['feature = "stdarch_arm_neon_intrinsics"', 'issue = "111800"']]}]]2021# #[unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")]22neon-arm-unstable: &neon-arm-unstable23  FnCall: ['unstable', ['feature = "stdarch_arm_neon_intrinsics"', 'issue = "111800"']]2425# #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]26neon-v7: &neon-v727  FnCall: [cfg_attr, ['target_arch = "arm"', { FnCall: [target_feature, [ 'enable = "v7"']]} ]]2829# #[target_feature(enable = "neon,v7")]30enable-v7: &enable-v731  FnCall: [target_feature, ['enable = "neon,v7"']]3233# #[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]34neon-v8: &neon-v835  FnCall: [cfg_attr, ['target_arch = "arm"', { FnCall: [target_feature, [ 'enable = "v8"']]} ]]3637target-is-arm: &target-is-arm38  FnCall: [cfg, ['target_arch = "arm"']]3940# #[cfg(not(target_arch = "arm"))]41target-not-arm: &target-not-arm42  FnCall: [cfg, [{ FnCall: [not, ['target_arch = "arm"']]}]]4344# #[cfg(not(target_arch = "arm64ec"))]45target-not-arm64ec: &target-not-arm64ec46  FnCall: [cfg, [{ FnCall: [not, ['target_arch = "arm64ec"']]}]]4748not-arm: &not-arm49  FnCall: [not, ['target_arch = "arm"']]5051neon-target-aarch64-arm64ec: &neon-target-aarch64-arm64ec52  FnCall: [all, [test, {FnCall: [any, ['target_arch = "aarch64"', 'target_arch = "arm64ec"']]}]]5354# #[cfg_attr(not(target_arch = "arm"), stable(feature = "neon_intrinsics", since = "1.59.0"))]55neon-not-arm-stable: &neon-not-arm-stable56  FnCall: [cfg_attr, [{ FnCall: [not, ['target_arch = "arm"']]}, {FnCall: [stable, ['feature = "neon_intrinsics"', 'since = "1.59.0"']]}]]5758# #[cfg_attr(not(target_arch = "arm"), stable(feature = "stdarch_neon_fp16", since = "1.94.0"))]59neon-not-arm-stable-fp16: &neon-not-arm-stable-fp1660  FnCall: [cfg_attr, [{ FnCall: [not, ['target_arch = "arm"']]}, {FnCall: [stable, ['feature = "stdarch_neon_fp16"', 'since = "1.94.0"']]}]]6162# #[cfg_attr(all(test, not(target_env = "msvc"))]63msvc-disabled: &msvc-disabled64  FnCall: [all, [test, {FnCall: [not, ['target_env = "msvc"']]}]]6566# all(test, target_arch = "arm")67test-is-arm: &test-is-arm68  FnCall: [all, [test, 'target_arch = "arm"']]6970# #[target_feature(enable = "neon,aes")]71neon-aes: &neon-aes72  FnCall: [target_feature, ['enable = "neon,aes"']]7374# #[target_feature(enable = "neon,i8mm")]75neon-i8mm: &neon-i8mm76  FnCall: [target_feature, ['enable = "neon,i8mm"']]7778# #[target_feature(enable = "neon,fp16")]79neon-fp16: &neon-fp1680  FnCall: [target_feature, ['enable = "neon,fp16"']]8182# #[cfg_attr[target_arch = "arm", target_feature(enable = "neon,fp16")]83arm-fp16: &arm-fp1684  FnCall: [cfg_attr, ['target_arch = "arm"', {FnCall: [target_feature, ['enable = "fp16"']]}]]8586enable-fcma: &enable-fcma87  FnCall: [cfg_attr, [{ FnCall: [not, ['target_arch = "arm"']]}, { FnCall: [target_feature, ['enable = "fcma"']] }]]8889#[cfg_attr(not(target_arch = "arm"), unstable(feature = "stdarch_neon_i8mm", issue = "117223"))]90neon-unstable-i8mm: &neon-unstable-i8mm91  FnCall: [cfg_attr, [{ FnCall: [not, ['target_arch = "arm"']] }, { FnCall: [unstable, ['feature = "stdarch_neon_i8mm"', 'issue = "117223"']] } ]]9293# #[unstable(feature = "stdarch_neon_fcma", issue = "117222")]94neon-unstable-fcma: &neon-unstable-fcma95  FnCall: [unstable, ['feature = "stdarch_neon_fcma"', 'issue = "117222"']]9697arm-crc-unstable: &arm-crc-unstable98  FnCall: [cfg_attr, ['target_arch = "arm"', {FnCall: [unstable, ['feature = "stdarch_aarch32_crc32"', 'issue = "125085"']]}]]99100aarch64-crc-stable: &aarch64-crc-stable101  FnCall: [cfg_attr, [{FnCall: [not, ['target_arch = "arm"']]}, {FnCall: [stable, ['feature = "stdarch_aarch64_crc32"', 'since = "1.80.0"']]}]]102103# #[unstable(feature = "stdarch_neon_f16", issue = "136306")]104neon-unstable-f16: &neon-unstable-f16105  FnCall: [unstable, ['feature = "stdarch_neon_f16"', 'issue = "136306"']]106107intrinsics:108  - name: "vand{neon_type.no}"109    doc: Vector bitwise and110    arguments: ["a: {neon_type}", "b: {neon_type}"]111    return_type: "{neon_type}"112    attr:113      - *neon-v7114      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vand]]}]]115      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [and]]}]]116      - *neon-not-arm-stable117      - *neon-cfg-arm-unstable118    safety: safe119    types:120      - int8x8_t121      - int8x16_t122      - int16x4_t123      - int16x8_t124      - int32x2_t125      - int32x4_t126      - uint8x8_t127      - uint8x16_t128      - uint16x4_t129      - uint16x8_t130      - uint32x2_t131      - uint32x4_t132      - int64x1_t133      - int64x2_t134      - uint64x1_t135      - uint64x2_t136    compose:137      - FnCall:138          - simd_and139          - - a140            - b141142  - name: "vorr{neon_type.no}"143    doc: "Vector bitwise or (immediate, inclusive)"144    arguments: ["a: {neon_type}", "b: {neon_type}"]145    return_type: "{neon_type}"146    attr:147      - *neon-v7148      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vorr]]}]]149      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [orr]]}]]150      - *neon-not-arm-stable151      - *neon-cfg-arm-unstable152    safety: safe153    types:154      - int8x8_t155      - int8x16_t156      - int16x4_t157      - int16x8_t158      - int32x2_t159      - int32x4_t160      - uint8x8_t161      - uint8x16_t162      - uint16x4_t163      - uint16x8_t164      - uint32x2_t165      - uint32x4_t166      - int64x1_t167      - int64x2_t168      - uint64x1_t169      - uint64x2_t170    compose:171      - FnCall:172          - simd_or173          - - a174            - b175176  - name: "veor{neon_type.no}"177    doc: Vector bitwise exclusive or (vector)178    arguments: ["a: {neon_type}", "b: {neon_type}"]179    return_type: "{neon_type}"180    attr:181      - *neon-v7182      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [veor]]}]]183      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [eor]]}]]184      - *neon-not-arm-stable185      - *neon-cfg-arm-unstable186    safety: safe187    types:188      - int8x8_t189      - int8x16_t190      - int16x4_t191      - int16x8_t192      - int32x2_t193      - int32x4_t194      - uint8x8_t195      - uint8x16_t196      - uint16x4_t197      - uint16x8_t198      - uint32x2_t199      - uint32x4_t200      - int64x1_t201      - int64x2_t202      - uint64x1_t203      - uint64x2_t204    compose:205      - FnCall:206          - simd_xor207          - - a208            - b209210  - name: "vabd{neon_type.no}"211    doc: Absolute difference between the arguments212    arguments: ["a: {neon_type}", "b: {neon_type}"]213    return_type: "{neon_type}"214    attr:215      - *neon-v7216      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vabd.{neon_type}"']]}]]217      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [sabd]]}]]218      - *neon-not-arm-stable219      - *neon-cfg-arm-unstable220    safety: safe221    types:222      - int8x8_t223      - int8x16_t224      - int16x4_t225      - int16x8_t226      - int32x2_t227      - int32x4_t228    compose:229      - LLVMLink:230          name: "sabd.{neon_type}"231          links:232            - link: "llvm.aarch64.neon.sabd.{neon_type}"233              arch: aarch64,arm64ec234            - link: "llvm.arm.neon.vabds.{neon_type}"235              arch: arm236237  - name: "vabd{neon_type.no}"238    doc: Absolute difference between the arguments239    arguments: ["a: {neon_type}", "b: {neon_type}"]240    return_type: "{neon_type}"241    attr:242      - *neon-v7243      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vabd.{neon_type}"']]}]]244      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [uabd]]}]]245      - *neon-not-arm-stable246      - *neon-cfg-arm-unstable247    safety: safe248    types:249      - uint8x8_t250      - uint8x16_t251      - uint16x4_t252      - uint16x8_t253      - uint32x2_t254      - uint32x4_t255    compose:256      - LLVMLink:257          name: "uabd.{neon_type}"258          links:259            - link: "llvm.aarch64.neon.uabd.{neon_type}"260              arch: aarch64,arm64ec261            - link: "llvm.arm.neon.vabdu.{neon_type}"262              arch: arm263264  - name: "vabd{neon_type.no}"265    doc: Absolute difference between the arguments of Floating266    arguments: ["a: {neon_type}", "b: {neon_type}"]267    return_type: "{neon_type}"268    attr:269      - *neon-v7270      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vabd.f32"']]}]]271      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fabd]]}]]272      - *neon-not-arm-stable273      - *neon-cfg-arm-unstable274    safety: safe275    types:276      - float32x2_t277      - float32x4_t278    compose:279      - LLVMLink:280          name: "fabd.{neon_type}"281          links:282            - link: "llvm.arm.neon.vabds.{neon_type}"283              arch: arm284            - link: "llvm.aarch64.neon.fabd.{neon_type}"285              arch: aarch64,arm64ec286287  - name: "vabd{neon_type.no}"288    doc: Absolute difference between the arguments of Floating289    arguments: ["a: {neon_type}", "b: {neon_type}"]290    return_type: "{neon_type}"291    attr:292      - *neon-v8293      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vabd.f16"']]}]]294      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fabd]]}]]295      - *neon-fp16296      - *neon-not-arm-stable-fp16297      - *neon-cfg-arm-unstable298      - *target-not-arm64ec299    safety: safe300    types:301      - float16x4_t302      - float16x8_t303    compose:304      - LLVMLink:305          name: "fabd.{neon_type}"306          links:307            - link: "llvm.arm.neon.vabds.{neon_type}"308              arch: arm309            - link: "llvm.aarch64.neon.fabd.{neon_type}"310              arch: aarch64,arm64ec311312  - name: "vabdl{neon_type[0].noq}"313    doc: Signed Absolute difference Long314    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]315    return_type: "{neon_type[1]}"316    attr:317      - *neon-v7318      - FnCall:319          - cfg_attr320          - - FnCall:321                - all322                - - test323                  - 'target_arch = "arm"'324            - FnCall:325                - assert_instr326                - - '"vabdl.{neon_type[0]}"'327      - FnCall:328          - cfg_attr329          - - FnCall:330                - all331                - - test332                  - FnCall:333                      - any334                      - - 'target_arch = "aarch64"'335                        - 'target_arch = "arm64ec"'336            - FnCall:337                - assert_instr338                - - sabdl339      - *neon-not-arm-stable340      - *neon-cfg-arm-unstable341    safety: safe342    types:343      - [int8x8_t, int16x8_t, uint8x8_t]344      - [int16x4_t, int32x4_t, uint16x4_t]345      - [int32x2_t, int64x2_t, uint32x2_t]346    compose:347      - Let:348          - c349          - "{neon_type[2]}"350          - FnCall:351              - simd_cast352              - - FnCall:353                    - "vabd_{neon_type[0]}"354                    - - a355                      - b356      - FnCall:357          - simd_cast358          - - c359360  - name: "vceq{neon_type[0].no}"361    doc: "Compare bitwise Equal (vector)"362    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]363    return_type: "{neon_type[1]}"364    attr:365      - *neon-v7366      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vceq{type[2]}"']]}]]367      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [cmeq]]}]]368      - *neon-not-arm-stable369      - *neon-cfg-arm-unstable370    safety: safe371    types:372      - [uint8x8_t, uint8x8_t, ".i8"]373      - [uint8x16_t, uint8x16_t, ".i8"]374      - [int8x8_t, uint8x8_t, ".i8"]375      - [int8x16_t, uint8x16_t, ".i8"]376      - [poly8x8_t, uint8x8_t, ".i8"]377      - [poly8x16_t, uint8x16_t, ".i8"]378      - [uint16x4_t, uint16x4_t, ".i16"]379      - [uint16x8_t, uint16x8_t, ".i16"]380      - [int16x4_t, uint16x4_t, ".i16"]381      - [int16x8_t, uint16x8_t, ".i16"]382      - [uint32x2_t, uint32x2_t, ".i32"]383      - [uint32x4_t, uint32x4_t, ".i32"]384      - [int32x2_t, uint32x2_t, ".i32"]385      - [int32x4_t, uint32x4_t, ".i32"]386    compose:387      - FnCall: [simd_eq, [a, b]]388389  - name: "vceq{neon_type[0].no}"390    doc: "Floating-point compare equal"391    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]392    return_type: "{neon_type[1]}"393    attr:394      - *neon-v7395      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vceq.f32"']]}]]396      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcmeq]]}]]397      - *neon-not-arm-stable398      - *neon-cfg-arm-unstable399    safety: safe400    types:401      - [float32x2_t, uint32x2_t]402      - [float32x4_t, uint32x4_t]403    compose:404      - FnCall: [simd_eq, [a, b]]405406407  - name: "vceq{neon_type[0].no}"408    doc: "Floating-point compare equal"409    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]410    return_type: "{neon_type[1]}"411    attr:412      - *neon-v8413      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vceq.f16"']]}]]414      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcmeq]]}]]415      - *neon-fp16416      - *neon-not-arm-stable-fp16417      - *neon-cfg-arm-unstable418      - *target-not-arm64ec419    safety: safe420    types:421      - [float16x4_t, uint16x4_t]422      - [float16x8_t, uint16x8_t]423    compose:424      - FnCall: [simd_eq, [a, b]]425426  - name: "vtst{neon_type[0].no}"427    doc: "Signed compare bitwise Test bits nonzero"428    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]429    return_type: "{neon_type[1]}"430    attr:431      - *neon-v7432      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vtst]]}]]433      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [cmtst]]}]]434      - *neon-not-arm-stable435      - *neon-cfg-arm-unstable436    safety: safe437    types:438      - [int8x8_t, uint8x8_t, i8x8, 'i8x8::new(0, 0, 0, 0, 0, 0, 0, 0)']439      - [int8x16_t, uint8x16_t, i8x16, 'i8x16::new(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)']440      - [int16x4_t, uint16x4_t, i16x4, 'i16x4::new(0, 0, 0, 0)']441      - [int16x8_t, uint16x8_t, i16x8, 'i16x8::new(0, 0, 0, 0, 0, 0, 0, 0)']442      - [int32x2_t, uint32x2_t, i32x2, 'i32x2::new(0, 0)']443      - [int32x4_t, uint32x4_t, i32x4, 'i32x4::new(0, 0, 0, 0)']444      - [poly8x8_t, uint8x8_t, i8x8, 'i8x8::new(0, 0, 0, 0, 0, 0, 0, 0)']445      - [poly8x16_t, uint8x16_t, i8x16, 'i8x16::new(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)']446      - [poly16x4_t, uint16x4_t, i16x4, 'i16x4::new(0, 0, 0, 0)']447      - [poly16x8_t, uint16x8_t, i16x8, 'i16x8::new(0, 0, 0, 0, 0, 0, 0, 0)']448    compose:449      - Let: [c, "{neon_type[0]}", {FnCall: [simd_and, [a, b]]}]450      - Let: [d, "{type[2]}", "{type[3]}"]451      - FnCall: [simd_ne, [c, {FnCall: [transmute, [d]]}]]452453  - name: "vabs{neon_type.no}"454    doc: "Floating-point absolute value"455    arguments: ["a: {neon_type}"]456    return_type: "{neon_type}"457    attr:458      - *neon-v7459      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vabs]]}]]460      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fabs]]}]]461      - *neon-not-arm-stable462      - *neon-cfg-arm-unstable463    safety: safe464    types:465      - float32x2_t466      - float32x4_t467    compose:468      - FnCall: [simd_fabs, [a]]469470  - name: "vabs{neon_type.no}"471    doc: "Floating-point absolute value"472    arguments: ["a: {neon_type}"]473    return_type: "{neon_type}"474    attr:475      - *neon-v8476      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vabs]]}]]477      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fabs]]}]]478      - *neon-fp16479      - *neon-not-arm-stable-fp16480      - *neon-cfg-arm-unstable481      - *target-not-arm64ec482    safety: safe483    types:484      - float16x4_t485      - float16x8_t486    compose:487      - FnCall: [simd_fabs, [a]]488489  - name: "vabs{type[0]}"490    doc: "Floating-point absolute value"491    arguments: ["a: {type[1]}"]492    return_type: "{type[1]}"493    attr:494      - *neon-v8495      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vabs]]}]]496      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fabs]]}]]497      - *neon-fp16498      - *neon-unstable-f16499      - *target-not-arm64ec500    safety: safe501    types:502      - ['h_f16', 'f16']503    compose:504      - FnCall:505          - simd_extract!506          - - FnCall:507                - "vabs_{type[1]}"508                - - FnCall: ["vdup_n_{type[1]}", [a]]509            - 0510511  - name: "vcgt{neon_type[0].no}"512    doc: "Compare signed greater than"513    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]514    return_type: "{neon_type[1]}"515    attr:516      - *neon-v7517      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcgt.{type[2]}"']]}]]518      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [cmgt]]}]]519      - *neon-not-arm-stable520      - *neon-cfg-arm-unstable521    safety: safe522    types:523      - [int8x8_t, uint8x8_t, "s8"]524      - [int8x16_t, uint8x16_t, "s8"]525      - [int16x4_t, uint16x4_t, s16]526      - [int16x8_t, uint16x8_t, s16]527      - [int32x2_t, uint32x2_t, "s32"]528      - [int32x4_t, uint32x4_t, "s32"]529    compose:530      - FnCall: [simd_gt, [a, b]]531532  - name: "vcgt{neon_type.no}"533    doc: "Compare unsigned greater than"534    arguments: ["a: {neon_type}", "b: {neon_type}"]535    return_type: "{neon_type}"536    attr:537      - *neon-v7538      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcgt.{neon_type}"']]}]]539      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [cmhi]]}]]540      - *neon-not-arm-stable541      - *neon-cfg-arm-unstable542    safety: safe543    types:544      - uint8x8_t545      - uint8x16_t546      - uint16x4_t547      - uint16x8_t548      - uint32x2_t549      - uint32x4_t550    compose:551      - FnCall: [simd_gt, [a, b]]552553  - name: "vcgt{neon_type[0].no}"554    doc: "Floating-point compare greater than"555    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]556    return_type: "{neon_type[1]}"557    attr:558      - *neon-v7559      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcgt.f32"']]}]]560      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcmgt]]}]]561      - *neon-not-arm-stable562      - *neon-cfg-arm-unstable563    safety: safe564    types:565      - [float32x2_t, uint32x2_t]566      - [float32x4_t, uint32x4_t]567    compose:568      - FnCall: [simd_gt, [a, b]]569570571  - name: "vcgt{neon_type[0].no}"572    doc: "Floating-point compare greater than"573    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]574    return_type: "{neon_type[1]}"575    attr:576      - *neon-v8577      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcgt.f16"']]}]]578      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcmgt]]}]]579      - *neon-fp16580      - *neon-not-arm-stable-fp16581      - *neon-cfg-arm-unstable582      - *target-not-arm64ec583    safety: safe584    types:585      - [float16x4_t, uint16x4_t]586      - [float16x8_t, uint16x8_t]587    compose:588      - FnCall: [simd_gt, [a, b]]589590591  - name: "vcgtz{neon_type[0].no}"592    doc: "Floating-point compare greater than zero"593    arguments: ["a: {neon_type[0]}"]594    return_type: "{neon_type[1]}"595    attr:596      - *neon-v8597      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcgt.f16"']]}]]598      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcmgt]]}]]599      - *neon-fp16600      - *neon-not-arm-stable-fp16601      - *neon-cfg-arm-unstable602      - *target-not-arm64ec603    safety: safe604    types:605      - [float16x4_t, uint16x4_t, f16x4, 'f16x4::new(0.0, 0.0, 0.0, 0.0)']606      - [float16x8_t, uint16x8_t, f16x8, 'f16x8::new(0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0)']607    compose:608      - Let: [b, "{type[2]}", "{type[3]}"]609      - FnCall: [simd_gt, [a, {FnCall: [transmute, [b]]}]]610611  - name: "vclt{neon_type[0].no}"612    doc: "Compare signed less than"613    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]614    return_type: "{neon_type[1]}"615    attr:616      - *neon-v7617      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcgt.{neon_type[0]}"']]}]]618      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [cmgt]]}]]619      - *neon-not-arm-stable620      - *neon-cfg-arm-unstable621    safety: safe622    types:623      - [int8x8_t, uint8x8_t]624      - [int8x16_t, uint8x16_t]625      - [int16x4_t, uint16x4_t]626      - [int16x8_t, uint16x8_t]627      - [int32x2_t, uint32x2_t]628      - [int32x4_t, uint32x4_t]629    compose:630      - FnCall: [simd_lt, [a, b]]631632  - name: "vcle{neon_type[0].no}"633    doc: "Compare signed less than or equal"634    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]635    return_type: "{neon_type[1]}"636    attr:637      - *neon-v7638      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcge.{neon_type[0]}"']]}]]639      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [cmge]]}]]640      - *neon-not-arm-stable641      - *neon-cfg-arm-unstable642    safety: safe643    types:644      - [int8x8_t, uint8x8_t]645      - [int8x16_t, uint8x16_t]646      - [int16x4_t, uint16x4_t]647      - [int16x8_t, uint16x8_t]648      - [int32x2_t, uint32x2_t]649      - [int32x4_t, uint32x4_t]650    compose:651      - FnCall: [simd_le, [a, b]]652653  - name: "vcle{neon_type[0].no}"654    doc: "Floating-point compare less than or equal"655    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]656    return_type: "{neon_type[1]}"657    attr:658      - *neon-v7659      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcge.f32"']]}]]660      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcmge]]}]]661      - *neon-not-arm-stable662      - *neon-cfg-arm-unstable663    safety: safe664    types:665      - [float32x2_t, uint32x2_t]666      - [float32x4_t, uint32x4_t]667    compose:668      - FnCall: [simd_le, [a, b]]669670671  - name: "vcle{neon_type[0].no}"672    doc: "Floating-point compare less than or equal"673    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]674    return_type: "{neon_type[1]}"675    attr:676      - *neon-v8677      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcge.f16"']]}]]678      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcmge]]}]]679      - *neon-fp16680      - *neon-not-arm-stable-fp16681      - *neon-cfg-arm-unstable682      - *target-not-arm64ec683    safety: safe684    types:685      - [float16x4_t, uint16x4_t]686      - [float16x8_t, uint16x8_t]687    compose:688      - FnCall: [simd_le, [a, b]]689690  - name: "vclez{neon_type[0].no}"691    doc: "Floating-point compare less than or equal to zero"692    arguments: ["a: {neon_type[0]}"]693    return_type: "{neon_type[1]}"694    attr:695      - *neon-v8696      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcle.f16"']]}]]697      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcmle]]}]]698      - *neon-fp16699      - *neon-not-arm-stable-fp16700      - *neon-cfg-arm-unstable701      - *target-not-arm64ec702    safety: safe703    types:704      - [float16x4_t, uint16x4_t, f16x4, 'f16x4::new(0.0, 0.0, 0.0, 0.0)']705      - [float16x8_t, uint16x8_t, f16x8, 'f16x8::new(0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0)']706    compose:707      - Let: [b, "{type[2]}", "{type[3]}"]708      - FnCall:709          - simd_le710          - - a711            - FnCall: [transmute, [b]]712713  - name: "vcge{neon_type[0].no}"714    doc: "Compare signed greater than or equal"715    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]716    return_type: "{neon_type[1]}"717    attr:718      - *neon-v7719      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcge.{neon_type[0]}"']]}]]720      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [cmge]]}]]721      - *neon-not-arm-stable722      - *neon-cfg-arm-unstable723    safety: safe724    types:725      - [int8x8_t, uint8x8_t]726      - [int8x16_t, uint8x16_t]727      - [int16x4_t, uint16x4_t]728      - [int16x8_t, uint16x8_t]729      - [int32x2_t, uint32x2_t]730      - [int32x4_t, uint32x4_t]731    compose:732      - FnCall: [simd_ge, [a, b]]733734  - name: "vcls{neon_type.no}"735    doc: "Count leading sign bits"736    arguments: ["a: {neon_type}"]737    return_type: "{neon_type}"738    attr:739      - *neon-v7740      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcls.{neon_type}"']]}]]741      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [cls]]}]]742      - *neon-not-arm-stable743      - *neon-cfg-arm-unstable744    safety: safe745    types:746      - int8x8_t747      - int8x16_t748      - int16x4_t749      - int16x8_t750      - int32x2_t751      - int32x4_t752    compose:753      - LLVMLink:754          name: "vcls{neon_type.no}"755          links:756            - link: "llvm.arm.neon.vcls.{neon_type}"757              arch: arm758            - link: "llvm.aarch64.neon.cls.{neon_type}"759              arch: aarch64,arm64ec760761  - name: "vcls{neon_type[0].no}"762    doc: "Count leading sign bits"763    arguments: ["a: {neon_type[0]}"]764    return_type: "{neon_type[1]}"765    attr:766      - *neon-v7767      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vcls]]}]]768      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [cls]]}]]769      - *neon-not-arm-stable770      - *neon-cfg-arm-unstable771    safety: safe772    types:773      - [uint8x8_t, int8x8_t]774      - [uint8x16_t, int8x16_t]775      - [uint16x4_t, int16x4_t]776      - [uint16x8_t, int16x8_t]777      - [uint32x2_t, int32x2_t]778      - [uint32x4_t, int32x4_t]779    compose:780      - FnCall:781          - "vcls{neon_type[1].no}"782          - - FnCall: [transmute, [a]]783784  - name: "vclz{neon_type[0].no}"785    doc: "Count leading zero bits"786    arguments: ["a: {neon_type[0]}"]787    return_type: "{neon_type[0]}"788    attr:789      - *neon-v7790      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vclz.i8"']]}]]791      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [clz]]}]]792      - *neon-not-arm-stable793      - *neon-cfg-arm-unstable794    safety: safe795    types:796      - [uint8x8_t, int8x8_t]797      - [uint8x16_t, int8x16_t]798    compose:799      - FnCall:800          - transmute801          - - FnCall:802                - "vclz{neon_type[1].no}"803                - - FnCall: [transmute, [a]]804805  - name: "vclz{neon_type[0].no}"806    doc: "Count leading zero bits"807    arguments: ["a: {neon_type[0]}"]808    return_type: "{neon_type[0]}"809    attr:810      - *neon-v7811      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vclz{type[1]}"']]}]]812      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [clz]]}]]813      - *neon-not-arm-stable814      - *neon-cfg-arm-unstable815    safety: safe816    types:817      - [int8x8_t, '.i8']818      - [int8x16_t, '.i8']819      - [int16x4_t, '.i16']820      - [int16x8_t, '.i16']821      - [int32x2_t, '.i32']822      - [int32x4_t, '.i32']823    compose:824      - FnCall: [simd_ctlz, [a]]825826  - name: "vclz{neon_type[0].no}"827    doc: "Count leading zero bits"828    arguments: ["a: {neon_type[0]}"]829    return_type: "{neon_type[0]}"830    attr:831      - *neon-v7832      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vclz{type[1]}"']]}]]833      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [clz]]}]]834      - *neon-not-arm-stable835      - *neon-cfg-arm-unstable836    safety: safe837    types:838      - [uint32x2_t, '.i32', int32x2_t]839      - [uint32x4_t, '.i32', int32x4_t]840      - [uint16x4_t, '.i16', int16x4_t]841      - [uint16x8_t, '.i16', int16x8_t]842    compose:843      - FnCall:844          - transmute845          - - FnCall:846                - "vclz{neon_type[2].no}"847                - - FnCall: [transmute, [a]]848849  - name: "vcagt{neon_type[0].no}"850    doc: "Floating-point absolute compare greater than"851    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]852    return_type: "{neon_type[1]}"853    attr:854      - *neon-v7855      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vacgt.f32"']]}]]856      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [facgt]]}]]857      - *neon-not-arm-stable858      - *neon-cfg-arm-unstable859    safety: safe860    types:861      - [float32x2_t, uint32x2_t]862      - [float32x4_t, uint32x4_t]863    compose:864      - LLVMLink:865          name: "vcagt{neon_type[0].no}"866          links:867            - link: "llvm.arm.neon.vacgt.{neon_type[1]}.{neon_type[0]}"868              arch: arm869            - link: "llvm.aarch64.neon.facgt.{neon_type[1]}.{neon_type[0]}"870              arch: aarch64,arm64ec871872873  - name: "vcagt{neon_type[0].no}"874    doc: "Floating-point absolute compare greater than"875    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]876    return_type: "{neon_type[1]}"877    attr:878      - *neon-v8879      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vacgt.f16"']]}]]880      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [facgt]]}]]881      - *neon-fp16882      - *neon-not-arm-stable-fp16883      - *neon-cfg-arm-unstable884      - *target-not-arm64ec885    safety: safe886    types:887      - [float16x4_t, uint16x4_t]888      - [float16x8_t, uint16x8_t]889    compose:890      - LLVMLink:891          name: "vcagt{neon_type[0].no}"892          links:893            - link: "llvm.arm.neon.vacgt.{neon_type[1]}.{neon_type[0]}"894              arch: arm895            - link: "llvm.aarch64.neon.facgt.{neon_type[1]}.{neon_type[0]}"896              arch: aarch64,arm64ec897898  - name: "vcage{neon_type[0].no}"899    doc: "Floating-point absolute compare greater than or equal"900    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]901    return_type: "{neon_type[1]}"902    attr:903      - *neon-v7904      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vacge.f32"']]}]]905      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [facge]]}]]906      - *neon-not-arm-stable907      - *neon-cfg-arm-unstable908    safety: safe909    types:910      - [float32x2_t, uint32x2_t]911      - [float32x4_t, uint32x4_t]912    compose:913      - LLVMLink:914          name: "vcage{neon_type[0].no}"915          links:916            - link: "llvm.arm.neon.vacge.{neon_type[1]}.{neon_type[0]}"917              arch: arm918            - link: "llvm.aarch64.neon.facge.{neon_type[1]}.{neon_type[0]}"919              arch: aarch64,arm64ec920921  - name: "vcage{neon_type[0].no}"922    doc: "Floating-point absolute compare greater than or equal"923    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]924    return_type: "{neon_type[1]}"925    attr:926      - *neon-v8927      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vacge.f16"']]}]]928      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [facge]]}]]929      - *neon-fp16930      - *neon-not-arm-stable-fp16931      - *neon-cfg-arm-unstable932      - *target-not-arm64ec933    safety: safe934    types:935      - [float16x4_t, uint16x4_t]936      - [float16x8_t, uint16x8_t]937    compose:938      - LLVMLink:939          name: "vcage{neon_type[0].no}"940          links:941            - link: "llvm.arm.neon.vacge.{neon_type[1]}.{neon_type[0]}"942              arch: arm943            - link: "llvm.aarch64.neon.facge.{neon_type[1]}.{neon_type[0]}"944              arch: aarch64,arm64ec945946  - name: "vcalt{neon_type[0].no}"947    doc: "Floating-point absolute compare less than"948    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]949    return_type: "{neon_type[1]}"950    attr:951      - *neon-v7952      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vacgt.f32"']]}]]953      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [facgt]]}]]954      - *neon-not-arm-stable955      - *neon-cfg-arm-unstable956    safety: safe957    types:958      - [float32x2_t, uint32x2_t]959      - [float32x4_t, uint32x4_t]960    compose:961      - FnCall: ["vcagt{neon_type[0].no}", [b, a]]962963  - name: "vcalt{neon_type[0].no}"964    doc: "Floating-point absolute compare less than"965    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]966    return_type: "{neon_type[1]}"967    attr:968      - *neon-v8969      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vacgt.f16"']]}]]970      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [facgt]]}]]971      - *neon-fp16972      - *neon-not-arm-stable-fp16973      - *neon-cfg-arm-unstable974      - *target-not-arm64ec975    safety: safe976    types:977      - [float16x4_t, uint16x4_t]978      - [float16x8_t, uint16x8_t]979    compose:980      - FnCall: ["vcagt{neon_type[0].no}", [b, a]]981982  - name: "vcale{neon_type[0].no}"983    doc: "Floating-point absolute compare less than or equal"984    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]985    return_type: "{neon_type[1]}"986    attr:987      - *neon-v7988      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vacge.f32"']]}]]989      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [facge]]}]]990      - *neon-not-arm-stable991      - *neon-cfg-arm-unstable992    safety: safe993    types:994      - [float32x2_t, uint32x2_t]995      - [float32x4_t, uint32x4_t]996    compose:997      - FnCall: ["vcage{neon_type[0].no}", [b, a]]9989991000  - name: "vcale{neon_type[0].no}"1001    doc: "Floating-point absolute compare less than or equal"1002    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]1003    return_type: "{neon_type[1]}"1004    attr:1005      - *neon-v81006      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vacge.f16"']]}]]1007      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [facge]]}]]1008      - *neon-fp161009      - *neon-not-arm-stable-fp161010      - *neon-cfg-arm-unstable1011      - *target-not-arm64ec1012    safety: safe1013    types:1014      - [float16x4_t, uint16x4_t]1015      - [float16x8_t, uint16x8_t]1016    compose:1017      - FnCall: ["vcage{neon_type[0].no}", [b, a]]10181019  - name: "vcvt{neon_type[1].no}_{neon_type[0]}"1020    doc: "Fixed-point convert to floating-point"1021    arguments: ["a: {neon_type[0]}"]1022    return_type: "{neon_type[1]}"1023    attr:1024      - *neon-v71025      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vcvt]]}]]1026      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [scvtf]]}]]1027      - *neon-not-arm-stable1028      - *neon-cfg-arm-unstable1029    safety: safe1030    types:1031      - [int32x2_t, float32x2_t]1032      - [int32x4_t, float32x4_t]1033    compose:1034      - FnCall: [simd_cast, [a]]10351036  - name: "vcvt{neon_type[1].no}_{neon_type[0]}"1037    doc: "Fixed-point convert to floating-point"1038    arguments: ["a: {neon_type[0]}"]1039    return_type: "{neon_type[1]}"1040    attr:1041      - *neon-v71042      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vcvt]]}]]1043      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [scvtf]]}]]1044      - *neon-fp161045      - *neon-not-arm-stable-fp161046      - *neon-cfg-arm-unstable1047      - *target-not-arm64ec1048    safety: safe1049    types:1050      - [int16x4_t, float16x4_t]1051      - [int16x8_t, float16x8_t]1052    compose:1053      - FnCall: [simd_cast, [a]]10541055  - name: "vcvt{neon_type[1].no}_{neon_type[0]}"1056    doc: "Fixed-point convert to floating-point"1057    arguments: ["a: {neon_type[0]}"]1058    return_type: "{neon_type[1]}"1059    attr:1060      - *neon-v71061      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vcvt]]}]]1062      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ucvtf]]}]]1063      - *neon-not-arm-stable1064      - *neon-cfg-arm-unstable1065    safety: safe1066    types:1067      - [uint32x2_t, float32x2_t]1068      - [uint32x4_t, float32x4_t]1069    compose:1070      - FnCall: [simd_cast, [a]]10711072  - name: "vcvt{neon_type[1].no}_{neon_type[0]}"1073    doc: "Fixed-point convert to floating-point"1074    arguments: ["a: {neon_type[0]}"]1075    return_type: "{neon_type[1]}"1076    attr:1077      - *neon-v71078      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vcvt]]}]]1079      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ucvtf]]}]]1080      - *neon-fp161081      - *neon-not-arm-stable-fp161082      - *neon-cfg-arm-unstable1083      - *target-not-arm64ec1084    safety: safe1085    types:1086      - [uint16x4_t, float16x4_t]1087      - [uint16x8_t, float16x8_t]1088    compose:1089      - FnCall: [simd_cast, [a]]10901091  - name: "vcvt{neon_type[1].N}_{neon_type[0]}"1092    doc: "Fixed-point convert to floating-point"1093    arguments: ["a: {neon_type[0]}"]1094    return_type: "{neon_type[1]}"1095    attr:1096      - *target-is-arm1097      - *enable-v71098      - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [vcvt, 'N = 2']]}]]1099      - FnCall: [rustc_legacy_const_generics, ['1']]1100      - *neon-arm-unstable1101    static_defs: ['const N: i32']1102    safety: safe1103    types:1104      - [uint32x2_t, float32x2_t]1105      - [uint32x4_t, float32x4_t]1106    compose:1107      - FnCall: [static_assert!, ['N >= 1 && N <= 32']]1108      - LLVMLink:1109          name: "vcvt{neon_type[1].N}_{neon_type[0]}"1110          arguments:1111            - "a: {neon_type[0]}"1112            - "n: i32"1113          links:1114            - link: "llvm.arm.neon.vcvtfxu2fp.{neon_type[1]}.{neon_type[0]}"1115              arch: arm1116      - FnCall: ["_vcvt{neon_type[1].N}_{neon_type[0]}", ["a", N], [], true]11171118  - name: "vcvt{neon_type[1].N}_{neon_type[0]}"1119    doc: "Fixed-point convert to floating-point"1120    arguments: ["a: {neon_type[0]}"]1121    return_type: "{neon_type[1]}"1122    attr:1123      - FnCall: [cfg, [{FnCall: [not, ['target_arch = "arm"']]}]]1124      - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [ucvtf, 'N = 2']]}]]1125      - FnCall: [rustc_legacy_const_generics, ['1']]1126      - *neon-stable1127    static_defs: ['const N: i32']1128    safety: safe1129    types:1130      - [uint32x2_t, float32x2_t]1131      - [uint32x4_t, float32x4_t]1132    compose:1133      - FnCall: [static_assert!, ['N >= 1 && N <= 32']]1134      - LLVMLink:1135          name: "vcvt{neon_type[1].N}_{neon_type[0]}"1136          arguments:1137            - "a: {neon_type[0]}"1138            - "n: i32"1139          links:1140            - link: "llvm.aarch64.neon.vcvtfxu2fp.{neon_type[1]}.{neon_type[0]}"1141              arch: aarch64,arm64ec1142      - FnCall: ["_vcvt{neon_type[1].N}_{neon_type[0]}", ["a", N], [], true]11431144  - name: "vcvt{neon_type[1].N}_{neon_type[0]}"1145    doc: "Fixed-point convert to floating-point"1146    arguments: ["a: {neon_type[0]}"]1147    return_type: "{neon_type[1]}"1148    attr:1149      - *neon-v81150      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcvt"', 'N = 1']]}]]1151      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ucvtf, 'N = 1']]}]]1152      - FnCall: [rustc_legacy_const_generics, ['1']]1153      - *neon-fp161154      - *neon-not-arm-stable-fp161155      - *neon-cfg-arm-unstable1156      - *target-not-arm64ec1157    static_defs: ['const N: i32']1158    safety: safe1159    types:1160      - [uint16x4_t, float16x4_t]1161      - [uint16x8_t, float16x8_t]1162    compose:1163      - FnCall: [static_assert!, ['N >= 1 && N <= 16']]1164      - LLVMLink:1165          name: "vcvt{neon_type[1].N}_{neon_type[0]}"1166          arguments:1167            - "a: {neon_type[0]}"1168            - "n: i32"1169          links:1170            - link: "llvm.arm.neon.vcvtfxu2fp.{neon_type[1]}.{neon_type[0]}"1171              arch: arm1172            - link: "llvm.aarch64.neon.vcvtfxu2fp.{neon_type[1]}.{neon_type[0]}"1173              arch: aarch64,arm64ec1174      - FnCall: ["_vcvt{neon_type[1].N}_{neon_type[0]}", ["a", N], [], true]117511761177  - name: "vcvt{neon_type[1].N}_{neon_type[0]}"1178    doc: "Floating-point convert to signed fixed-point"1179    arguments: ["a: {neon_type[0]}"]1180    return_type: "{neon_type[1]}"1181    attr:1182      - *neon-v81183      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcvt"', 'N = 1']]}]]1184      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcvtzs, 'N = 1']]}]]1185      - FnCall: [rustc_legacy_const_generics, ['1']]1186      - *neon-fp161187      - *neon-not-arm-stable-fp161188      - *neon-cfg-arm-unstable1189      - *target-not-arm64ec1190    static_defs: ['const N: i32']1191    safety: safe1192    types:1193      - [float16x4_t, int16x4_t]1194      - [float16x8_t, int16x8_t]1195    compose:1196      - FnCall: [static_assert!, ['N >= 1 && N <= 16']]1197      - LLVMLink:1198          name: "vcvt{neon_type[1].N}_{neon_type[0]}"1199          arguments:1200            - "a: {neon_type[0]}"1201            - "n: i32"1202          links:1203            - link: "llvm.arm.neon.vcvtfp2fxs.{neon_type[1]}.{neon_type[0]}"1204              arch: arm1205            - link: "llvm.aarch64.neon.vcvtfp2fxs.{neon_type[1]}.{neon_type[0]}"1206              arch: aarch64,arm64ec1207      - FnCall: ["_vcvt{neon_type[1].N}_{neon_type[0]}", [a, N], [], true]120812091210  - name: "vcvt{neon_type[1].N}_{neon_type[0]}"1211    doc: "Fixed-point convert to unsigned fixed-point, rounding toward zero"1212    arguments: ["a: {neon_type[0]}"]1213    return_type: "{neon_type[1]}"1214    attr:1215      - *neon-v81216      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcvt"', 'N = 1']]}]]1217      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fcvtzu, 'N = 1']]}]]1218      - FnCall: [rustc_legacy_const_generics, ['1']]1219      - *neon-fp161220      - *neon-not-arm-stable-fp161221      - *neon-cfg-arm-unstable1222      - *target-not-arm64ec1223    static_defs: ['const N: i32']1224    safety: safe1225    types:1226      - [float16x4_t, uint16x4_t]1227      - [float16x8_t, uint16x8_t]1228    compose:1229      - FnCall: [static_assert!, ['N >= 1 && N <= 16']]1230      - LLVMLink:1231          name: "vcvt{neon_type[1].N}_{neon_type[0]}"1232          arguments:1233            - "a: {neon_type[0]}"1234            - "n: i32"1235          links:1236            - link: "llvm.arm.neon.vcvtfp2fxu.{neon_type[1]}.{neon_type[0]}"1237              arch: arm1238            - link: "llvm.aarch64.neon.vcvtfp2fxu.{neon_type[1]}.{neon_type[0]}"1239              arch: aarch64,arm64ec1240      - FnCall: ["_vcvt{neon_type[1].N}_{neon_type[0]}", ["a", N], [], true]12411242  - name: "vcvt{neon_type[1].N}_{neon_type[0]}"1243    doc: "Fixed-point convert to floating-point"1244    arguments: ["a: {neon_type[0]}"]1245    return_type: "{neon_type[1]}"1246    attr:1247      - *target-is-arm1248      - *enable-v71249      - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [vcvt, 'N = 2']]}]]1250      - FnCall: [rustc_legacy_const_generics, ['1']]1251      - *neon-arm-unstable1252    static_defs: ['const N: i32']1253    safety: safe1254    types:1255      - [int32x2_t, float32x2_t]1256      - [int32x4_t, float32x4_t]1257    compose:1258      - FnCall: [static_assert!, ['N >= 1 && N <= 32']]1259      - LLVMLink:1260          name: "vcvt{neon_type[1].N}_{neon_type[0]}"1261          arguments:1262            - "a: {neon_type[0]}"1263            - "n: i32"1264          links:1265            - link: "llvm.arm.neon.vcvtfxs2fp.{neon_type[1]}.{neon_type[0]}"1266              arch: arm1267      - FnCall: ["_vcvt{neon_type[1].N}_{neon_type[0]}", [a, N], [], true]126812691270  - name: "vcvt{neon_type[1].N}_{neon_type[0]}"1271    doc: "Fixed-point convert to floating-point"1272    arguments: ["a: {neon_type[0]}"]1273    return_type: "{neon_type[1]}"1274    attr:1275      - *neon-v81276      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vcvt"', 'N = 1']]}]]1277      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [scvtf, 'N = 1']]}]]1278      - FnCall: [rustc_legacy_const_generics, ['1']]1279      - *neon-fp161280      - *neon-not-arm-stable-fp161281      - *neon-cfg-arm-unstable1282      - *target-not-arm64ec1283    static_defs: ['const N: i32']1284    safety: safe1285    types:1286      - [int16x4_t, float16x4_t]1287      - [int16x8_t, float16x8_t]1288    compose:1289      - FnCall: [static_assert!, ['N >= 1 && N <= 16']]1290      - LLVMLink:1291          name: "vcvt{neon_type[1].N}_{neon_type[0]}"1292          arguments:1293            - "a: {neon_type[0]}"1294            - "n: i32"1295          links:1296            - link: "llvm.arm.neon.vcvtfxs2fp.{neon_type[1]}.{neon_type[0]}"1297              arch: arm1298            - link: "llvm.aarch64.neon.vcvtfxs2fp.{neon_type[1]}.{neon_type[0]}"1299              arch: aarch64,arm64ec1300      - FnCall: ["_vcvt{neon_type[1].N}_{neon_type[0]}", [a, N], [], true]13011302  - name: "vcvt{neon_type[1].N}_{neon_type[0]}"1303    doc: "Fixed-point convert to floating-point"1304    arguments: ["a: {neon_type[0]}"]1305    return_type: "{neon_type[1]}"1306    attr:1307      - FnCall: [cfg, [{FnCall: [not, ['target_arch = "arm"']]}]]1308      - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [scvtf, 'N = 2']]}]]1309      - FnCall: [rustc_legacy_const_generics, ['1']]1310      - *neon-stable1311    static_defs: ['const N: i32']1312    safety: safe1313    types:1314      - [int32x2_t, float32x2_t]1315      - [int32x4_t, float32x4_t]1316    compose:1317      - FnCall: [static_assert!, ['N >= 1 && N <= 32']]1318      - LLVMLink:1319          name: "vcvt{neon_type[1].N}_{neon_type[0]}"1320          arguments:1321            - "a: {neon_type[0]}"1322            - "n: i32"1323          links:1324            - link: "llvm.aarch64.neon.vcvtfxs2fp.{neon_type[1]}.{neon_type[0]}"1325              arch: aarch64,arm64ec1326      - FnCall: ["_vcvt{neon_type[1].N}_{neon_type[0]}", [a, N], [], true]13271328  - name: "vcvt{type[2]}"1329    doc: "Floating-point convert to fixed-point, rounding toward zero"1330    arguments: ["a: {neon_type[0]}"]1331    return_type: "{neon_type[1]}"1332    attr:1333      - *target-is-arm1334      - *enable-v71335      - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [vcvt, 'N = 2']]}]]1336      - FnCall: [rustc_legacy_const_generics, ['1']]1337      - *neon-arm-unstable1338    static_defs: ['const N: i32']1339    safety: safe1340    types:1341      - [float32x2_t, int32x2_t, _n_s32_f32]1342      - [float32x4_t, int32x4_t, q_n_s32_f32]1343    compose:1344      - FnCall: [static_assert!, ['N >= 1 && N <= 32']]1345      - LLVMLink:1346          name: "vcvt{type[2]}"1347          arguments: ["a: {type[0]}", "n: i32"]1348          links:1349            - link: "llvm.arm.neon.vcvtfp2fxs.{neon_type[1]}.{neon_type[0]}"1350              arch: arm1351      - FnCall: ["_vcvt{type[2]}", [a, N], [], true]13521353  - name: "vcvt{type[2]}"1354    doc: "Floating-point convert to fixed-point, rounding toward zero"1355    arguments: ["a: {neon_type[0]}"]1356    return_type: "{neon_type[1]}"1357    attr:1358      - *target-is-arm1359      - *enable-v71360      - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [vcvt, 'N = 2']]}]]1361      - FnCall: [rustc_legacy_const_generics, ['1']]1362      - *neon-arm-unstable1363    static_defs: ['const N: i32']1364    safety: safe1365    types:1366      - [float32x2_t, uint32x2_t, _n_u32_f32]1367      - [float32x4_t, uint32x4_t, q_n_u32_f32]1368    compose:1369      - FnCall: [static_assert!, ['N >= 1 && N <= 32']]1370      - LLVMLink:1371          name: "vcvt{type[2]}"1372          arguments: ["a: {type[0]}", "n: i32"]1373          links:1374            - link: "llvm.arm.neon.vcvtfp2fxu.{neon_type[1]}.{neon_type[0]}"1375              arch: arm1376      - FnCall: ["_vcvt{type[2]}", [a, N], [], true]13771378  - name: "vcvt{type[2]}"1379    doc: "Floating-point convert to fixed-point, rounding toward zero"1380    arguments: ["a: {neon_type[0]}"]1381    return_type: "{neon_type[1]}"1382    attr:1383      - FnCall: [cfg, [{FnCall: [not, ['target_arch = "arm"']]}]]1384      - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtzs, 'N = 2']]}]]1385      - FnCall: [rustc_legacy_const_generics, ['1']]1386      - *neon-stable1387    static_defs: ['const N: i32']1388    safety: safe1389    types:1390      - [float32x2_t, int32x2_t, _n_s32_f32]1391      - [float32x4_t, int32x4_t, q_n_s32_f32]1392    compose:1393      - FnCall: [static_assert!, ['N >= 1 && N <= 32']]1394      - LLVMLink:1395          name: "vcvt{type[2]}"1396          arguments: ["a: {type[0]}", "n: i32"]1397          links:1398            - link: "llvm.aarch64.neon.vcvtfp2fxs.{neon_type[1]}.{neon_type[0]}"1399              arch: aarch64,arm64ec1400      - FnCall: ["_vcvt{type[2]}", [a, N], [], true]14011402  - name: "vcvt{type[2]}"1403    doc: "Floating-point convert to fixed-point, rounding toward zero"1404    arguments: ["a: {neon_type[0]}"]1405    return_type: "{neon_type[1]}"1406    attr:1407      - FnCall: [cfg, [{FnCall: [not, ['target_arch = "arm"']]}]]1408      - FnCall: [cfg_attr, [test, {FnCall: [assert_instr, [fcvtzu, 'N = 2']]}]]1409      - FnCall: [rustc_legacy_const_generics, ['1']]1410      - *neon-stable1411    static_defs: ['const N: i32']1412    safety: safe1413    types:1414      - [float32x2_t, uint32x2_t, _n_u32_f32]1415      - [float32x4_t, uint32x4_t, q_n_u32_f32]1416    compose:1417      - FnCall: [static_assert!, ['N >= 1 && N <= 32']]1418      - LLVMLink:1419          name: "vcvt{type[2]}"1420          arguments:1421            - "a: {neon_type[0]}"1422            - "n: i32"1423          links:1424            - link: "llvm.aarch64.neon.vcvtfp2fxu.{neon_type[1]}.{neon_type[0]}"1425              arch: aarch64,arm64ec1426      - FnCall: ["_vcvt{type[2]}", [a, N], [], true]14271428  - name: "vdup{type[0]}"1429    doc: "Set all vector lanes to the same value"1430    arguments: ["a: {neon_type[1]}"]1431    return_type: "{neon_type[2]}"1432    attr:1433      - *neon-v71434      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vdup.8"', 'N = 4']]}]]1435      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [dup, 'N = 4']]}]]1436      - FnCall: [rustc_legacy_const_generics, ['1']]1437      - *neon-not-arm-stable1438      - *neon-cfg-arm-unstable1439    static_defs: ['const N: i32']1440    safety: safe1441    types:1442      - [_lane_s8, int8x8_t, int8x8_t, '3', '[N as u32; 8]']1443      - [q_lane_s8, int8x8_t, int8x16_t, '3', '[N as u32; 16]']1444      - [_lane_u8, uint8x8_t, uint8x8_t, '3', '[N as u32; 8]']1445      - [q_lane_u8, uint8x8_t, uint8x16_t, '3', '[N as u32; 16]']1446      - [_lane_p8, poly8x8_t, poly8x8_t, '3', '[N as u32; 8]']1447      - [q_lane_p8, poly8x8_t, poly8x16_t, '3', '[N as u32; 16]']1448    compose:1449      - FnCall: [static_assert_uimm_bits!, [N, "{type[3]}"]]1450      - FnCall: [simd_shuffle!, [a, a, "{type[4]}"]]14511452  - name: "vdup{type[0]}"1453    doc: "Set all vector lanes to the same value"1454    arguments: ["a: {neon_type[1]}"]1455    return_type: "{neon_type[2]}"1456    attr:1457      - *neon-v71458      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vdup.8"', 'N = 8']]}]]1459      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [dup, 'N = 8']]}]]1460      - FnCall: [rustc_legacy_const_generics, ['1']]1461      - *neon-not-arm-stable1462      - *neon-cfg-arm-unstable1463    static_defs: ['const N: i32']1464    safety: safe1465    types:1466      - [q_laneq_s8, int8x16_t, int8x16_t, '4', '[N as u32; 16]']1467      - [_laneq_s8, int8x16_t, int8x8_t, '4', '[N as u32; 8]']1468      - [q_laneq_u8, uint8x16_t, uint8x16_t, '4', '[N as u32; 16]']1469      - [_laneq_u8, uint8x16_t, uint8x8_t, '4', '[N as u32; 8]']1470      - [q_laneq_p8, poly8x16_t, poly8x16_t, '4', '[N as u32; 16]']1471      - [_laneq_p8, poly8x16_t, poly8x8_t, '4', '[N as u32; 8]']1472    compose:1473      - FnCall: [static_assert_uimm_bits!, [N, "{type[3]}"]]1474      - FnCall: [simd_shuffle!, [a, a, "{type[4]}"]]14751476  - name: "vdup{type[0]}"1477    doc: "Set all vector lanes to the same value"1478    arguments: ["a: {neon_type[1]}"]1479    return_type: "{neon_type[2]}"1480    attr:1481      - *neon-v71482      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vdup.16"', 'N = 2']]}]]1483      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [dup, 'N = 2']]}]]1484      - FnCall: [rustc_legacy_const_generics, ['1']]1485      - *neon-not-arm-stable1486      - *neon-cfg-arm-unstable1487    static_defs: ['const N: i32']1488    safety: safe1489    types:1490      - [_lane_s16, int16x4_t, int16x4_t, '2', '[N as u32; 4]']1491      - [q_lane_s16, int16x4_t, int16x8_t, '2', '[N as u32; 8]']1492      - [_lane_u16, uint16x4_t, uint16x4_t, '2', '[N as u32; 4]']1493      - [q_lane_u16, uint16x4_t, uint16x8_t, '2', '[N as u32; 8]']1494      - [_lane_p16, poly16x4_t, poly16x4_t, '2', '[N as u32; 4]']1495      - [q_lane_p16, poly16x4_t, poly16x8_t, '2', '[N as u32; 8]']1496    compose:1497      - FnCall: [static_assert_uimm_bits!, [N, "{type[3]}"]]1498      - FnCall: [simd_shuffle!, [a, a, "{type[4]}"]]14991500  - name: "vdup{type[0]}"1501    doc: "Set all vector lanes to the same value"1502    arguments: ["a: {neon_type[1]}"]1503    return_type: "{neon_type[2]}"1504    attr:1505      - *neon-v71506      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vdup.16"', 'N = 4']]}]]1507      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [dup, 'N = 4']]}]]1508      - FnCall: [rustc_legacy_const_generics, ['1']]1509      - *neon-not-arm-stable1510      - *neon-cfg-arm-unstable1511    static_defs: ['const N: i32']1512    safety: safe1513    types:1514      - [q_laneq_s16, int16x8_t, int16x8_t, '3', '[N as u32; 8]']1515      - [_laneq_s16, int16x8_t, int16x4_t, '3', '[N as u32; 4]']1516      - [q_laneq_u16, uint16x8_t, uint16x8_t, '3', '[N as u32; 8]']1517      - [_laneq_u16, uint16x8_t, uint16x4_t, '3', '[N as u32; 4]']1518      - [q_laneq_p16, poly16x8_t, poly16x8_t, '3', '[N as u32; 8]']1519      - [_laneq_p16, poly16x8_t, poly16x4_t, '3', '[N as u32; 4]']1520    compose:1521      - FnCall: [static_assert_uimm_bits!, [N, "{type[3]}"]]1522      - FnCall: [simd_shuffle!, [a, a, "{type[4]}"]]152315241525  - name: "vdup{type[0]}"1526    doc: "Set all vector lanes to the same value"1527    arguments: ["a: {neon_type[1]}"]1528    return_type: "{neon_type[2]}"1529    attr:1530      - *neon-v71531      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vdup.16"', 'N = 4']]}]]1532      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [dup, 'N = 4']]}]]1533      - FnCall: [rustc_legacy_const_generics, ['1']]1534      - *arm-fp161535      - *neon-not-arm-stable-fp161536      - *neon-cfg-arm-unstable1537      - *target-not-arm64ec1538    static_defs: ['const N: i32']1539    safety: safe1540    types:1541      - [q_laneq_f16, float16x8_t, float16x8_t, '3', '[N as u32; 8]']1542      - [_laneq_f16, float16x8_t, float16x4_t, '3', '[N as u32; 4]']1543    compose:1544      - FnCall: [static_assert_uimm_bits!, [N, "{type[3]}"]]1545      - FnCall: [simd_shuffle!, [a, a, "{type[4]}"]]15461547  - name: "vdup{type[3]}{neon_type[0]}"1548    doc: "Create a new vector with all lanes set to a value"1549    arguments: ["a: {type[1]}"]1550    return_type: "{neon_type[0]}"1551    attr:1552      - *neon-v71553      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vdup.16"']]}]]1554      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [dup]]}]]1555      - *arm-fp161556      - *neon-unstable-f161557      - *target-not-arm64ec1558    safety: safe1559    types:1560      - [float16x4_t, f16, 'float16x4', '_n_']1561      - [float16x8_t, f16, 'float16x8', 'q_n_']1562    compose:1563      - "{type[2]}_t::splat(a)"15641565  - name: "vdup{type[0]}"1566    doc: "Set all vector lanes to the same value"1567    arguments: ["a: {neon_type[1]}"]1568    return_type: "{neon_type[2]}"1569    attr:1570      - *neon-v71571      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vdup.16"', 'N = 2']]}]]1572      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [dup, 'N = 2']]}]]1573      - FnCall: [rustc_legacy_const_generics, ['1']]1574      - *arm-fp161575      - *neon-not-arm-stable-fp161576      - *neon-cfg-arm-unstable1577      - *target-not-arm64ec1578    static_defs: ['const N: i32']1579    safety: safe1580    types:1581      - [_lane_f16, float16x4_t, float16x4_t, '2', '[N as u32; 4]']1582      - [q_lane_f16, float16x4_t, float16x8_t, '2', '[N as u32; 8]']1583    compose:1584      - FnCall: [static_assert_uimm_bits!, [N, "{type[3]}"]]1585      - FnCall: [simd_shuffle!, [a, a, "{type[4]}"]]158615871588  - name: "vdup{type[0]}"1589    doc: "Set all vector lanes to the same value"1590    arguments: ["a: {neon_type[1]}"]1591    return_type: "{neon_type[2]}"1592    attr:1593      - *neon-v71594      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vdup.32"', 'N = 1']]}]]1595      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [dup, 'N = 1']]}]]1596      - FnCall: [rustc_legacy_const_generics, ['1']]1597      - *neon-not-arm-stable1598      - *neon-cfg-arm-unstable1599    static_defs: ['const N: i32']1600    safety: safe1601    types:1602      - [_lane_s32, int32x2_t, int32x2_t, '1', '[N as u32, N as u32]']1603      - [q_lane_s32, int32x2_t, int32x4_t, '1', '[N as u32, N as u32, N as u32, N as u32]']1604      - [_lane_u32, uint32x2_t, uint32x2_t, '1', '[N as u32, N as u32]']1605      - [q_lane_u32, uint32x2_t, uint32x4_t, '1', '[N as u32, N as u32, N as u32, N as u32]']1606      - [_lane_f32, float32x2_t, float32x2_t, '1', '[N as u32, N as u32]']1607      - [q_lane_f32, float32x2_t, float32x4_t, '1', '[N as u32, N as u32, N as u32, N as u32]']1608    compose:1609      - FnCall: [static_assert_uimm_bits!, [N, "{type[3]}"]]1610      - FnCall: [simd_shuffle!, [a, a, "{type[4]}"]]16111612  - name: "vdup{type[0]}"1613    doc: "Set all vector lanes to the same value"1614    arguments: ["a: {neon_type[1]}"]1615    return_type: "{neon_type[2]}"1616    attr:1617      - *neon-v71618      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vdup.32"', 'N = 2']]}]]1619      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [dup, 'N = 2']]}]]1620      - FnCall: [rustc_legacy_const_generics, ['1']]1621      - *neon-not-arm-stable1622      - *neon-cfg-arm-unstable1623    static_defs: ['const N: i32']1624    safety: safe1625    types:1626      - [q_laneq_s32, int32x4_t, int32x4_t, '2', '[N as u32, N as u32, N as u32, N as u32]']1627      - [_laneq_s32, int32x4_t, int32x2_t, '2', '[N as u32, N as u32]']1628      - [q_laneq_u32, uint32x4_t, uint32x4_t, '2', '[N as u32, N as u32, N as u32, N as u32]']1629      - [_laneq_u32, uint32x4_t, uint32x2_t, '2', '[N as u32, N as u32]']1630      - [q_laneq_f32, float32x4_t, float32x4_t, '2', '[N as u32, N as u32, N as u32, N as u32]']1631      - [_laneq_f32, float32x4_t, float32x2_t, '2', '[N as u32, N as u32]']1632    compose:1633      - FnCall: [static_assert_uimm_bits!, [N, "{type[3]}"]]1634      - FnCall: [simd_shuffle!, [a, a, "{type[4]}"]]16351636  - name: "vdup{type[0]}"1637    doc: "Set all vector lanes to the same value"1638    arguments: ["a: {neon_type[1]}"]1639    return_type: "{neon_type[1]}"1640    attr:1641      - *neon-v71642      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vmov, 'N = 1']]}]]1643      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [dup, 'N = 1']]}]]1644      - FnCall: [rustc_legacy_const_generics, ['1']]1645      - *neon-not-arm-stable1646      - *neon-cfg-arm-unstable1647    static_defs: ['const N: i32']1648    safety: safe1649    types:1650      - [q_laneq_s64, int64x2_t, '1', '[N as u32, N as u32]']1651      - [q_laneq_u64, uint64x2_t, '1', '[N as u32, N as u32]']1652    compose:1653      - FnCall: [static_assert_uimm_bits!, [N, "{type[2]}"]]1654      - FnCall: [simd_shuffle!, [a, a, "{type[3]}"]]16551656  - name: "vdup{type[0]}"1657    doc: "Set all vector lanes to the same value"1658    arguments: ["a: {neon_type[1]}"]1659    return_type: "{neon_type[2]}"1660    attr:1661      - *neon-v71662      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vmov, 'N = 0']]}]]1663      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [dup, 'N = 0']]}]]1664      - FnCall: [rustc_legacy_const_generics, ['1']]1665      - *neon-not-arm-stable1666      - *neon-cfg-arm-unstable1667    static_defs: ['const N: i32']1668    safety: safe1669    types:1670      - [q_lane_s64, int64x1_t, int64x2_t]1671      - [q_lane_u64, uint64x1_t, uint64x2_t]1672    compose:1673      - FnCall: [static_assert!, ['N == 0']]1674      - FnCall: [simd_shuffle!, [a, a, '[N as u32, N as u32]']]16751676  - name: "vdup{type[0]}"1677    doc: "Set all vector lanes to the same value"1678    arguments: ["a: {neon_type[1]}"]1679    return_type: "{neon_type[1]}"1680    attr:1681      - *neon-v71682      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [nop, 'N = 0']]}]]1683      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop, 'N = 0']]}]]1684      - FnCall: [rustc_legacy_const_generics, ['1']]1685      - *neon-not-arm-stable1686      - *neon-cfg-arm-unstable1687    static_defs: ['const N: i32']1688    safety: safe1689    types:1690      - [_lane_s64, int64x1_t]1691      - [_lane_u64, uint64x1_t]1692    compose:1693      - FnCall: [static_assert!, ['N == 0']]1694      - Identifier: [a, Symbol]16951696  - name: "vdup{type[0]}"1697    doc: "Set all vector lanes to the same value"1698    arguments: ["a: {neon_type[1]}"]1699    return_type: "{neon_type[2]}"1700    attr:1701      - *neon-v71702      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vmov, 'N = 1']]}]]1703      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [nop, 'N = 1']]}]]1704      - FnCall: [rustc_legacy_const_generics, ['1']]1705      - *neon-not-arm-stable1706      - *neon-cfg-arm-unstable1707    static_defs: ['const N: i32']1708    safety: safe1709    types:1710      - [_laneq_s64, int64x2_t, int64x1_t, '::<i64, _>']1711      - [_laneq_u64, uint64x2_t, uint64x1_t, '::<u64, _>']1712    compose:1713      - FnCall: [static_assert_uimm_bits!, [N, 1]]1714      - FnCall:1715          - "transmute{type[3]}"1716          - - FnCall: [simd_extract!, [a, 'N as u32']]17171718  - name: "vext{neon_type[0].no}"1719    doc: "Extract vector from pair of vectors"1720    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]1721    return_type: "{neon_type[0]}"1722    attr:1723      - *neon-v71724      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vext.8"', 'N = 7']]}]]1725      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ext, 'N = 7']]}]]1726      - FnCall: [rustc_legacy_const_generics, ['2']]1727      - *neon-not-arm-stable1728      - *neon-cfg-arm-unstable1729    static_defs: ['const N: i32']1730    safety: safe1731    types:1732      - [int8x8_t, ' static_assert_uimm_bits!(N, 3);', 'unsafe { match N & 0b111 { 0 => simd_shuffle!(a, b, [0, 1, 2, 3, 4, 5, 6, 7]), 1 => simd_shuffle!(a, b, [1, 2, 3, 4, 5, 6, 7, 8]), 2 => simd_shuffle!(a, b, [2, 3, 4, 5, 6, 7, 8, 9]), 3 => simd_shuffle!(a, b, [3, 4, 5, 6, 7, 8, 9, 10]), 4 => simd_shuffle!(a, b, [4, 5, 6, 7, 8, 9, 10, 11]), 5 => simd_shuffle!(a, b, [5, 6, 7, 8, 9, 10, 11, 12]), 6 => simd_shuffle!(a, b, [6, 7, 8, 9, 10, 11, 12, 13]), 7 => simd_shuffle!(a, b, [7, 8, 9, 10, 11, 12, 13, 14]), _ => unreachable_unchecked(), } }']1733      - [int16x8_t, ' static_assert_uimm_bits!(N, 3);', 'unsafe { match N & 0b111 { 0 => simd_shuffle!(a, b, [0, 1, 2, 3, 4, 5, 6, 7]), 1 => simd_shuffle!(a, b, [1, 2, 3, 4, 5, 6, 7, 8]), 2 => simd_shuffle!(a, b, [2, 3, 4, 5, 6, 7, 8, 9]), 3 => simd_shuffle!(a, b, [3, 4, 5, 6, 7, 8, 9, 10]), 4 => simd_shuffle!(a, b, [4, 5, 6, 7, 8, 9, 10, 11]), 5 => simd_shuffle!(a, b, [5, 6, 7, 8, 9, 10, 11, 12]), 6 => simd_shuffle!(a, b, [6, 7, 8, 9, 10, 11, 12, 13]), 7 => simd_shuffle!(a, b, [7, 8, 9, 10, 11, 12, 13, 14]), _ => unreachable_unchecked(), } }']1734      - [uint8x8_t, ' static_assert_uimm_bits!(N, 3);', 'unsafe { match N & 0b111 { 0 => simd_shuffle!(a, b, [0, 1, 2, 3, 4, 5, 6, 7]), 1 => simd_shuffle!(a, b, [1, 2, 3, 4, 5, 6, 7, 8]), 2 => simd_shuffle!(a, b, [2, 3, 4, 5, 6, 7, 8, 9]), 3 => simd_shuffle!(a, b, [3, 4, 5, 6, 7, 8, 9, 10]), 4 => simd_shuffle!(a, b, [4, 5, 6, 7, 8, 9, 10, 11]), 5 => simd_shuffle!(a, b, [5, 6, 7, 8, 9, 10, 11, 12]), 6 => simd_shuffle!(a, b, [6, 7, 8, 9, 10, 11, 12, 13]), 7 => simd_shuffle!(a, b, [7, 8, 9, 10, 11, 12, 13, 14]), _ => unreachable_unchecked(), } }']1735      - [uint16x8_t, ' static_assert_uimm_bits!(N, 3);', 'unsafe { match N & 0b111 { 0 => simd_shuffle!(a, b, [0, 1, 2, 3, 4, 5, 6, 7]), 1 => simd_shuffle!(a, b, [1, 2, 3, 4, 5, 6, 7, 8]), 2 => simd_shuffle!(a, b, [2, 3, 4, 5, 6, 7, 8, 9]), 3 => simd_shuffle!(a, b, [3, 4, 5, 6, 7, 8, 9, 10]), 4 => simd_shuffle!(a, b, [4, 5, 6, 7, 8, 9, 10, 11]), 5 => simd_shuffle!(a, b, [5, 6, 7, 8, 9, 10, 11, 12]), 6 => simd_shuffle!(a, b, [6, 7, 8, 9, 10, 11, 12, 13]), 7 => simd_shuffle!(a, b, [7, 8, 9, 10, 11, 12, 13, 14]), _ => unreachable_unchecked(), } }']1736      - [poly8x8_t, ' static_assert_uimm_bits!(N, 3);', 'unsafe { match N & 0b111 { 0 => simd_shuffle!(a, b, [0, 1, 2, 3, 4, 5, 6, 7]), 1 => simd_shuffle!(a, b, [1, 2, 3, 4, 5, 6, 7, 8]), 2 => simd_shuffle!(a, b, [2, 3, 4, 5, 6, 7, 8, 9]), 3 => simd_shuffle!(a, b, [3, 4, 5, 6, 7, 8, 9, 10]), 4 => simd_shuffle!(a, b, [4, 5, 6, 7, 8, 9, 10, 11]), 5 => simd_shuffle!(a, b, [5, 6, 7, 8, 9, 10, 11, 12]), 6 => simd_shuffle!(a, b, [6, 7, 8, 9, 10, 11, 12, 13]), 7 => simd_shuffle!(a, b, [7, 8, 9, 10, 11, 12, 13, 14]), _ => unreachable_unchecked(), } }']1737      - [poly16x8_t, ' static_assert_uimm_bits!(N, 3);', 'unsafe { match N & 0b111 { 0 => simd_shuffle!(a, b, [0, 1, 2, 3, 4, 5, 6, 7]), 1 => simd_shuffle!(a, b, [1, 2, 3, 4, 5, 6, 7, 8]), 2 => simd_shuffle!(a, b, [2, 3, 4, 5, 6, 7, 8, 9]), 3 => simd_shuffle!(a, b, [3, 4, 5, 6, 7, 8, 9, 10]), 4 => simd_shuffle!(a, b, [4, 5, 6, 7, 8, 9, 10, 11]), 5 => simd_shuffle!(a, b, [5, 6, 7, 8, 9, 10, 11, 12]), 6 => simd_shuffle!(a, b, [6, 7, 8, 9, 10, 11, 12, 13]), 7 => simd_shuffle!(a, b, [7, 8, 9, 10, 11, 12, 13, 14]), _ => unreachable_unchecked(), } }']1738    compose:1739      - Identifier: ["{type[1]}", Symbol]1740      - Identifier: ["{type[2]}", Symbol]17411742  - name: "vext{neon_type[0].no}"1743    doc: "Extract vector from pair of vectors"1744    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]1745    return_type: "{neon_type[0]}"1746    attr:1747      - *neon-v71748      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vext.8"', 'N = 15']]}]]1749      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ext, 'N = 15']]}]]1750      - FnCall: [rustc_legacy_const_generics, ['2']]1751      - *neon-not-arm-stable1752      - *neon-cfg-arm-unstable1753    static_defs: ['const N: i32']1754    safety: safe1755    types:1756      - [int8x16_t, ' static_assert_uimm_bits!(N, 4);', 'unsafe { match N & 0b1111 { 0 => simd_shuffle!(a, b, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]), 1 => simd_shuffle!(a, b, [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]), 2 => simd_shuffle!(a, b, [2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17]), 3 => simd_shuffle!(a, b, [3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18]), 4 => simd_shuffle!(a, b, [4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19]), 5 => simd_shuffle!(a, b, [5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20]), 6 => simd_shuffle!(a, b, [6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21]), 7 => simd_shuffle!(a, b, [7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22]), 8 => simd_shuffle!(a, b, [8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23]), 9 => simd_shuffle!(a, b, [9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24]), 10 => simd_shuffle!(a, b, [10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25]), 11 => simd_shuffle!(a, b, [11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26]), 12 => simd_shuffle!(a, b, [12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27]), 13 => simd_shuffle!(a, b, [13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28]), 14 => simd_shuffle!(a, b, [14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29]), 15 => simd_shuffle!(a, b, [15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30]), _ => unreachable_unchecked(), } }']1757      - [uint8x16_t, ' static_assert_uimm_bits!(N, 4);', 'unsafe { match N & 0b1111 { 0 => simd_shuffle!(a, b, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]), 1 => simd_shuffle!(a, b, [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]), 2 => simd_shuffle!(a, b, [2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17]), 3 => simd_shuffle!(a, b, [3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18]), 4 => simd_shuffle!(a, b, [4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19]), 5 => simd_shuffle!(a, b, [5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20]), 6 => simd_shuffle!(a, b, [6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21]), 7 => simd_shuffle!(a, b, [7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22]), 8 => simd_shuffle!(a, b, [8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23]), 9 => simd_shuffle!(a, b, [9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24]), 10 => simd_shuffle!(a, b, [10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25]), 11 => simd_shuffle!(a, b, [11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26]), 12 => simd_shuffle!(a, b, [12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27]), 13 => simd_shuffle!(a, b, [13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28]), 14 => simd_shuffle!(a, b, [14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29]), 15 => simd_shuffle!(a, b, [15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30]), _ => unreachable_unchecked(), } }']1758      - [poly8x16_t, ' static_assert_uimm_bits!(N, 4);', 'unsafe { match N & 0b1111 { 0 => simd_shuffle!(a, b, [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]), 1 => simd_shuffle!(a, b, [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]), 2 => simd_shuffle!(a, b, [2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17]), 3 => simd_shuffle!(a, b, [3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18]), 4 => simd_shuffle!(a, b, [4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19]), 5 => simd_shuffle!(a, b, [5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20]), 6 => simd_shuffle!(a, b, [6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21]), 7 => simd_shuffle!(a, b, [7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22]), 8 => simd_shuffle!(a, b, [8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23]), 9 => simd_shuffle!(a, b, [9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24]), 10 => simd_shuffle!(a, b, [10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25]), 11 => simd_shuffle!(a, b, [11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26]), 12 => simd_shuffle!(a, b, [12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27]), 13 => simd_shuffle!(a, b, [13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28]), 14 => simd_shuffle!(a, b, [14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29]), 15 => simd_shuffle!(a, b, [15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30]), _ => unreachable_unchecked(), } }']1759    compose:1760      - Identifier: ["{type[1]}", Symbol]1761      - Identifier: ["{type[2]}", Symbol]17621763  - name: "vext{neon_type[0].no}"1764    doc: "Extract vector from pair of vectors"1765    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]1766    return_type: "{neon_type[0]}"1767    attr:1768      - *neon-v71769      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vext.8"', 'N = 3']]}]]1770      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ext, 'N = 3']]}]]1771      - FnCall: [rustc_legacy_const_generics, ['2']]1772      - *neon-not-arm-stable1773      - *neon-cfg-arm-unstable1774    static_defs: ['const N: i32']1775    safety: safe1776    types:1777      - [int16x4_t, 'static_assert_uimm_bits!(N, 2);', 'unsafe { match N & 0b11 { 0 => simd_shuffle!(a, b, [0, 1, 2, 3]), 1 => simd_shuffle!(a, b, [1, 2, 3, 4]), 2 => simd_shuffle!(a, b, [2, 3, 4, 5]), 3 => simd_shuffle!(a, b, [3, 4, 5, 6]), _ => unreachable_unchecked(), } }']1778      - [int32x4_t, ' static_assert_uimm_bits!(N, 2);', 'unsafe { match N & 0b11 { 0 => simd_shuffle!(a, b, [0, 1, 2, 3]), 1 => simd_shuffle!(a, b, [1, 2, 3, 4]), 2 => simd_shuffle!(a, b, [2, 3, 4, 5]), 3 => simd_shuffle!(a, b, [3, 4, 5, 6]), _ => unreachable_unchecked(), } }']1779      - [uint16x4_t, ' static_assert_uimm_bits!(N, 2);', 'unsafe { match N & 0b11 { 0 => simd_shuffle!(a, b, [0, 1, 2, 3]), 1 => simd_shuffle!(a, b, [1, 2, 3, 4]), 2 => simd_shuffle!(a, b, [2, 3, 4, 5]), 3 => simd_shuffle!(a, b, [3, 4, 5, 6]), _ => unreachable_unchecked(), } }']1780      - [uint32x4_t, ' static_assert_uimm_bits!(N, 2);', 'unsafe { match N & 0b11 { 0 => simd_shuffle!(a, b, [0, 1, 2, 3]), 1 => simd_shuffle!(a, b, [1, 2, 3, 4]), 2 => simd_shuffle!(a, b, [2, 3, 4, 5]), 3 => simd_shuffle!(a, b, [3, 4, 5, 6]), _ => unreachable_unchecked(), } }']1781      - [poly16x4_t, ' static_assert_uimm_bits!(N, 2);', 'unsafe { match N & 0b11 { 0 => simd_shuffle!(a, b, [0, 1, 2, 3]), 1 => simd_shuffle!(a, b, [1, 2, 3, 4]), 2 => simd_shuffle!(a, b, [2, 3, 4, 5]), 3 => simd_shuffle!(a, b, [3, 4, 5, 6]), _ => unreachable_unchecked(), } }']1782      - [float32x4_t, ' static_assert_uimm_bits!(N, 2);', 'unsafe { match N & 0b11 { 0 => simd_shuffle!(a, b, [0, 1, 2, 3]), 1 => simd_shuffle!(a, b, [1, 2, 3, 4]), 2 => simd_shuffle!(a, b, [2, 3, 4, 5]), 3 => simd_shuffle!(a, b, [3, 4, 5, 6]), _ => unreachable_unchecked(), } }']1783    compose:1784      - Identifier: ["{type[1]}", Symbol]1785      - Identifier: ["{type[2]}", Symbol]178617871788  - name: "vext{neon_type[0].no}"1789    doc: "Extract vector from pair of vectors"1790    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]1791    return_type: "{neon_type[0]}"1792    attr:1793      - *neon-v71794      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vext.8"', 'N = 3']]}]]1795      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ext, 'N = 3']]}]]1796      - FnCall: [rustc_legacy_const_generics, ['2']]1797      - *neon-fp161798      - *neon-not-arm-stable-fp161799      - *neon-cfg-arm-unstable1800      - *target-not-arm64ec1801    static_defs: ['const N: i32']1802    safety: safe1803    types:1804      - [float16x4_t, ' static_assert_uimm_bits!(N, 2); unsafe { match N & 0b11 { 0 => simd_shuffle!(a, b, [0, 1, 2, 3]), 1 => simd_shuffle!(a, b, [1, 2, 3, 4]), 2 => simd_shuffle!(a, b, [2, 3, 4, 5]), 3 => simd_shuffle!(a, b, [3, 4, 5, 6]), _ => unreachable_unchecked(), } }']1805    compose:1806      - Identifier: ["{type[1]}", Symbol]18071808  - name: "vext{neon_type[0].no}"1809    doc: "Extract vector from pair of vectors"1810    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]1811    return_type: "{neon_type[0]}"1812    attr:1813      - *neon-v71814      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vext.8"', 'N = 7']]}]]1815      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ext, 'N = 7']]}]]1816      - FnCall: [rustc_legacy_const_generics, ['2']]1817      - *neon-fp161818      - *neon-not-arm-stable-fp161819      - *neon-cfg-arm-unstable1820      - *target-not-arm64ec1821    static_defs: ['const N: i32']1822    safety: safe1823    types:1824      - [float16x8_t, ' static_assert_uimm_bits!(N, 3); unsafe { match N & 0b111 { 0 => simd_shuffle!(a, b, [0, 1, 2, 3, 4, 5, 6, 7]), 1 => simd_shuffle!(a, b, [1, 2, 3, 4, 5, 6, 7, 8]), 2 => simd_shuffle!(a, b, [2, 3, 4, 5, 6, 7, 8, 9]), 3 => simd_shuffle!(a, b, [3, 4, 5, 6, 7, 8, 9, 10]), 4 => simd_shuffle!(a, b, [4, 5, 6, 7, 8, 9, 10, 11]), 5 => simd_shuffle!(a, b, [5, 6, 7, 8, 9, 10, 11, 12]), 6 => simd_shuffle!(a, b, [6, 7, 8, 9, 10, 11, 12, 13]), 7 => simd_shuffle!(a, b, [7, 8, 9, 10, 11, 12, 13, 14]), _ => unreachable_unchecked(), } }']1825    compose:1826      - Identifier: ["{type[1]}", Symbol]1827182818291830  - name: "vext{neon_type[0].no}"1831    doc: "Extract vector from pair of vectors"1832    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]1833    return_type: "{neon_type[0]}"1834    attr:1835      - *neon-v71836      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vext.8"', 'N = 1']]}]]1837      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ext, 'N = 1']]}]]1838      - FnCall: [rustc_legacy_const_generics, ['2']]1839      - *neon-not-arm-stable1840      - *neon-cfg-arm-unstable1841    static_defs: ['const N: i32']1842    safety: safe1843    types:1844      - [int32x2_t, ' static_assert_uimm_bits!(N, 1);', 'unsafe { match N & 0b1 { 0 => simd_shuffle!(a, b, [0, 1]), 1 => simd_shuffle!(a, b, [1, 2]), _ => unreachable_unchecked(), } }']1845      - [uint32x2_t, ' static_assert_uimm_bits!(N, 1);', 'unsafe { match N & 0b1 { 0 => simd_shuffle!(a, b, [0, 1]), 1 => simd_shuffle!(a, b, [1, 2]), _ => unreachable_unchecked(), } }']1846      - [float32x2_t, ' static_assert_uimm_bits!(N, 1);', 'unsafe { match N & 0b1 { 0 => simd_shuffle!(a, b, [0, 1]), 1 => simd_shuffle!(a, b, [1, 2]), _ => unreachable_unchecked(), } }']1847    compose:1848      - Identifier: ["{type[1]}", Symbol]1849      - Identifier: ["{type[2]}", Symbol]18501851  - name: "vext{neon_type[0].no}"1852    doc: "Extract vector from pair of vectors"1853    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}"]1854    return_type: "{neon_type[0]}"1855    attr:1856      - *neon-v71857      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vmov, 'N = 1']]}]]1858      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [ext, 'N = 1']]}]]1859      - FnCall: [rustc_legacy_const_generics, ['2']]1860      - *neon-not-arm-stable1861      - *neon-cfg-arm-unstable1862    static_defs: ['const N: i32']1863    safety: safe1864    types:1865      - [int64x2_t, 'static_assert_uimm_bits!(N, 1);', 'unsafe { match N & 0b1 { 0 => simd_shuffle!(a, b, [0, 1]), 1 => simd_shuffle!(a, b, [1, 2]), _ => unreachable_unchecked(), } }']1866      - [uint64x2_t, 'static_assert_uimm_bits!(N, 1);', 'unsafe { match N & 0b1 { 0 => simd_shuffle!(a, b, [0, 1]), 1 => simd_shuffle!(a, b, [1, 2]), _ => unreachable_unchecked(), } }']1867    compose:1868      - Identifier: ["{type[1]}", Symbol]1869      - Identifier: ["{type[2]}", Symbol]18701871  - name: "vmla{neon_type[0].no}"1872    doc: "Multiply-add to accumulator"1873    arguments: ["a: {neon_type[0]}", "b: {neon_type[0]}", "c: {neon_type[0]}"]1874    return_type: "{neon_type[0]}"1875    attr:1876      - *neon-v71877      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vmla{type[1]}"']]}]]1878      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [mla]]}]]1879      - *neon-not-arm-stable1880      - *neon-cfg-arm-unstable1881    safety: safe1882    types:1883      - [int8x8_t, ".i8"]1884      - [int8x16_t, ".i8"]1885      - [uint8x8_t, ".i8"]1886      - [uint8x16_t, ".i8"]1887      - [int16x4_t, ".i16"]1888      - [int16x8_t, ".i16"]1889      - [uint16x4_t, ".i16"]1890      - [uint16x8_t, ".i16"]1891      - [int32x2_t, ".i32"]1892      - [int32x4_t, ".i32"]1893      - [uint32x2_t, ".i32"]1894      - [uint32x4_t, ".i32"]1895    compose:1896      - FnCall: [simd_add, [a, {FnCall: [simd_mul, [b, c]]}]]18971898  - name: "vmla{neon_type.no}"1899    doc: "Floating-point multiply-add to accumulator"1900    arguments: ["a: {neon_type}", "b: {neon_type}", "c: {neon_type}"]1901    return_type: "{neon_type}"1902    attr:1903      - *neon-v71904      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vmla.f32"']]}]]1905      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [fmul]]}]]1906      - *neon-not-arm-stable1907      - *neon-cfg-arm-unstable1908    safety: safe1909    types:1910      - float32x2_t1911      - float32x4_t1912    compose:1913      - FnCall: [simd_add, [a, {FnCall: [simd_mul, [b, c]]}]]19141915  - name: "vmlal{neon_type[1].no}"1916    doc: "Signed multiply-add long"1917    arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}", "c: {neon_type[1]}"]1918    return_type: "{neon_type[0]}"1919    attr:1920      - *neon-v71921      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vmlal.{type[2]}"']]}]]1922      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [smlal]]}]]1923      - *neon-not-arm-stable1924      - *neon-cfg-arm-unstable1925    safety: safe1926    types:1927      - [int16x8_t, int8x8_t, "s8"]1928      - [int32x4_t, int16x4_t, "s16"]1929      - [int64x2_t, int32x2_t, "s32"]1930    compose:1931      - FnCall: [simd_add, [a, {FnCall: ["vmull_{type[2]}", [b, c]]}]]19321933  - name: "vmlal_n_{type[4]}"1934    doc: "Vector widening multiply accumulate with scalar"1935    arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}", "c: {type[2]}"]1936    return_type: "{neon_type[0]}"1937    attr:1938      - *neon-v71939      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vmlal.{type[4]}"']]}]]1940      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [smlal]]}]]1941      - *neon-not-arm-stable1942      - *neon-cfg-arm-unstable1943    safety: safe1944    types:1945      - [int32x4_t, int16x4_t, "i16", int32x4_t, 's16']1946      - [int64x2_t, int32x2_t, "i32", int64x2_t, 's32']1947    compose:1948      - FnCall:1949          - "vmlal{neon_type[1].noq}"1950          - - a1951            - b1952            - FnCall: ["vdup_n_{neon_type[1]}", [c]]19531954  - name: "vmlal_n_{type[2]}"1955    doc: "Vector widening multiply accumulate with scalar"1956    arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}", "c: {type[2]}"]1957    return_type: "{neon_type[0]}"1958    attr:1959      - *neon-v71960      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vmlal.{type[2]}"']]}]]1961      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [umlal]]}]]1962      - *neon-not-arm-stable1963      - *neon-cfg-arm-unstable1964    safety: safe1965    types:1966      - [uint32x4_t, uint16x4_t, "u16", uint32x4_t]1967      - [uint64x2_t, uint32x2_t, "u32", uint64x2_t]1968    compose:1969      - FnCall:1970          - "vmlal{neon_type[1].noq}"1971          - - a1972            - b1973            - FnCall: ["vdup_n_{neon_type[1]}", [c]]19741975  - name: "vmlal_lane{neon_type[2].no}"1976    doc: "Vector widening multiply accumulate with scalar"1977    arguments: ["a: {neon_type[0]}", "b: {neon_type[1]}", "c: {neon_type[2]}"]1978    return_type: "{neon_type[0]}"1979    attr:1980      - *neon-v71981      - FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, ['"vmlal.{neon_type[1]}"', 'LANE = 1']]}]]1982      - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [smlal, 'LANE = 1']]}]]1983      - FnCall: [rustc_legacy_const_generics, ['3']]1984      - *neon-not-arm-stable1985      - *neon-cfg-arm-unstable1986    static_defs: ['const LANE: i32']1987    safety: safe1988    types:1989      - [int32x4_t, int16x4_t, int16x4_t, '2', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]']1990      - [int32x4_t, int16x4_t, int16x8_t, '3', '[LANE as u32, LANE as u32, LANE as u32, LANE as u32]']1991      - [int64x2_t, int32x2_t, int32x2_t, '1', '[LANE as u32, LANE as u32]']1992      - [int64x2_t, int32x2_t, int32x4_t, '2', '[LANE as u32, LANE as u32]']1993    compose:1994      - FnCall: [static_assert_uimm_bits!, [LANE, "{type[3]}"]]1995      - FnCall:1996          - "vmlal_{neon_type[1]}"1997          - - a1998            - b1999            - FnCall: [simd_shuffle!, [c, c, '{type[4]}']]