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/target/linux/generic-2.4/patches/000-linux_mips.patch

https://github.com/hentel/openwrt
Patch | 18282 lines | 17606 code | 676 blank | 0 comment | 0 complexity | 4c5ad5e342013da98ffdacadb207c8c7 MD5 | raw file
Possible License(s): GPL-2.0 
    

  1. --- a/arch/mips/au1000/common/au1xxx_irqmap.c
    2. 

  2. +++ b/arch/mips/au1000/common/au1xxx_irqmap.c
    3. 

  3. @@ -172,14 +172,14 @@ au1xxx_irq_map_t au1xxx_ic0_map[] = {
    4. 

  4.  	{ AU1550_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
    5. 

  5.  	{ AU1550_PSC2_INT, INTC_INT_HIGH_LEVEL, 0},
    6. 

  6.  	{ AU1550_PSC3_INT, INTC_INT_HIGH_LEVEL, 0},
    7. 

  7. -	{ AU1550_TOY_INT, INTC_INT_RISE_EDGE, 0 },
    8. 

  8. -	{ AU1550_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
    9. 

  9. -	{ AU1550_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
    10. 

  10. -	{ AU1550_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
    11. 

  11. -	{ AU1550_RTC_INT, INTC_INT_RISE_EDGE, 0 },
    12. 

  12. -	{ AU1550_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
    13. 

  13. -	{ AU1550_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
    14. 

  14. -	{ AU1550_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
    15. 

  15. +	{ AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
    16. 

  16. +	{ AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
    17. 

  17. +	{ AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
    18. 

  18. +	{ AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
    19. 

  19. +	{ AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
    20. 

  20. +	{ AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
    21. 

  21. +	{ AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
    22. 

  22. +	{ AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
    23. 

  23.  	{ AU1550_NAND_INT, INTC_INT_RISE_EDGE, 0},
    24. 

  24.  	{ AU1550_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 },
    25. 

  25.  	{ AU1550_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
    26. 

  26. @@ -200,14 +200,14 @@ au1xxx_irq_map_t au1xxx_ic0_map[] = {
    27. 

  27.  	{ AU1200_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
    28. 

  28.  	{ AU1200_AES_INT, INTC_INT_HIGH_LEVEL, 0},
    29. 

  29.  	{ AU1200_CAMERA_INT, INTC_INT_HIGH_LEVEL, 0},
    30. 

  30. -	{ AU1200_TOY_INT, INTC_INT_RISE_EDGE, 0 },
    31. 

  31. -	{ AU1200_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
    32. 

  32. -	{ AU1200_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
    33. 

  33. -	{ AU1200_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
    34. 

  34. -	{ AU1200_RTC_INT, INTC_INT_RISE_EDGE, 0 },
    35. 

  35. -	{ AU1200_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
    36. 

  36. -	{ AU1200_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
    37. 

  37. -	{ AU1200_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
    38. 

  38. +	{ AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
    39. 

  39. +	{ AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
    40. 

  40. +	{ AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
    41. 

  41. +	{ AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
    42. 

  42. +	{ AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
    43. 

  43. +	{ AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
    44. 

  44. +	{ AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
    45. 

  45. +	{ AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
    46. 

  46.  	{ AU1200_NAND_INT, INTC_INT_RISE_EDGE, 0},
    47. 

  47.  	{ AU1200_USB_INT, INTC_INT_HIGH_LEVEL, 0 },
    48. 

  48.  	{ AU1200_LCD_INT, INTC_INT_HIGH_LEVEL, 0},
    49. 

  49. --- a/arch/mips/au1000/common/cputable.c
    50. 

  50. +++ b/arch/mips/au1000/common/cputable.c
    51. 

  51. @@ -39,7 +39,8 @@ struct cpu_spec	cpu_specs[] = {
    52. 

  52.      { 0xffffffff, 0x02030203, "Au1100 BD", 0, 1 },
    53. 

  53.      { 0xffffffff, 0x02030204, "Au1100 BE", 0, 1 },
    54. 

  54.      { 0xffffffff, 0x03030200, "Au1550 AA", 0, 1 },
    55. 

  55. -    { 0xffffffff, 0x04030200, "Au1200 AA", 0, 1 },
    56. 

  56. +    { 0xffffffff, 0x04030200, "Au1200 AB", 0, 0 },
    57. 

  57. +    { 0xffffffff, 0x04030201, "Au1200 AC", 0, 0 },
    58. 

  58.      { 0x00000000, 0x00000000, "Unknown Au1xxx", 1, 0 },
    59. 

  59.  };
    60. 

  60.  
    61. 

  61. --- a/arch/mips/au1000/common/dbdma.c
    62. 

  62. +++ b/arch/mips/au1000/common/dbdma.c
    63. 

  63. @@ -41,6 +41,8 @@
    64. 

  64.  #include <asm/au1xxx_dbdma.h>
    65. 

  65.  #include <asm/system.h>
    66. 

  66.  
    67. 

  67. +#include <linux/module.h>
    68. 

  68. +
    69. 

  69.  #if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
    70. 

  70.  
    71. 

  71.  /*
    72. 

  72. @@ -60,37 +62,10 @@ static spinlock_t au1xxx_dbdma_spin_lock
    73. 

  73.  */
    74. 

  74.  #define ALIGN_ADDR(x, a)	((((u32)(x)) + (a-1)) & ~(a-1))
    75. 

  75.  
    76. 

  76. -static volatile dbdma_global_t *dbdma_gptr = (dbdma_global_t *)DDMA_GLOBAL_BASE;
    77. 

  77. -static int dbdma_initialized;
    78. 

  78. +static dbdma_global_t *dbdma_gptr = (dbdma_global_t *)DDMA_GLOBAL_BASE;
    79. 

  79. +static int dbdma_initialized=0;
    80. 

  80.  static void au1xxx_dbdma_init(void);
    81. 

  81.  
    82. 

  82. -typedef struct dbdma_device_table {
    83. 

  83. -	u32		dev_id;
    84. 

  84. -	u32		dev_flags;
    85. 

  85. -	u32		dev_tsize;
    86. 

  86. -	u32		dev_devwidth;
    87. 

  87. -	u32		dev_physaddr;		/* If FIFO */
    88. 

  88. -	u32		dev_intlevel;
    89. 

  89. -	u32		dev_intpolarity;
    90. 

  90. -} dbdev_tab_t;
    91. 

  91. -
    92. 

  92. -typedef struct dbdma_chan_config {
    93. 

  93. -	u32			chan_flags;
    94. 

  94. -	u32			chan_index;
    95. 

  95. -	dbdev_tab_t		*chan_src;
    96. 

  96. -	dbdev_tab_t		*chan_dest;
    97. 

  97. -	au1x_dma_chan_t		*chan_ptr;
    98. 

  98. -	au1x_ddma_desc_t	*chan_desc_base;
    99. 

  99. -	au1x_ddma_desc_t	*get_ptr, *put_ptr, *cur_ptr;
    100. 

  100. -	void			*chan_callparam;
    101. 

  101. -	void (*chan_callback)(int, void *, struct pt_regs *);
    102. 

  102. -} chan_tab_t;
    103. 

  103. -
    104. 

  104. -#define	DEV_FLAGS_INUSE		(1 << 0)
    105. 

  105. -#define	DEV_FLAGS_ANYUSE	(1 << 1)
    106. 

  106. -#define DEV_FLAGS_OUT		(1 << 2)
    107. 

  107. -#define DEV_FLAGS_IN		(1 << 3)
    108. 

  108. -
    109. 

  109.  static dbdev_tab_t dbdev_tab[] = {
    110. 

  110.  #ifdef CONFIG_SOC_AU1550
    111. 

  111.  	/* UARTS */
    112. 

  112. @@ -156,13 +131,13 @@ static dbdev_tab_t dbdev_tab[] = {
    113. 

  113.  	{ DSCR_CMD0_MAE_BOTH, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
    114. 

  114.  	{ DSCR_CMD0_LCD, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
    115. 

  115.  
    116. 

  116. -	{ DSCR_CMD0_SDMS_TX0, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
    117. 

  117. -	{ DSCR_CMD0_SDMS_RX0, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
    118. 

  118. -	{ DSCR_CMD0_SDMS_TX1, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
    119. 

  119. -	{ DSCR_CMD0_SDMS_RX1, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
    120. 

  120. +	{ DSCR_CMD0_SDMS_TX0, DEV_FLAGS_OUT, 4, 8, 0x10600000, 0, 0 },
    121. 

  121. +	{ DSCR_CMD0_SDMS_RX0, DEV_FLAGS_IN, 4, 8, 0x10600004, 0, 0 },
    122. 

  122. +	{ DSCR_CMD0_SDMS_TX1, DEV_FLAGS_OUT, 4, 8, 0x10680000, 0, 0 },
    123. 

  123. +	{ DSCR_CMD0_SDMS_RX1, DEV_FLAGS_IN, 4, 8, 0x10680004, 0, 0 },
    124. 

  124.  
    125. 

  125. -	{ DSCR_CMD0_AES_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
    126. 

  126. -	{ DSCR_CMD0_AES_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
    127. 

  127. +	{ DSCR_CMD0_AES_RX, DEV_FLAGS_IN , 4, 32, 0x10300008, 0, 0 },
    128. 

  128. +	{ DSCR_CMD0_AES_TX, DEV_FLAGS_OUT, 4, 32, 0x10300004, 0, 0 },
    129. 

  129.  
    130. 

  130.  	{ DSCR_CMD0_PSC0_TX, DEV_FLAGS_OUT, 0, 0, 0x11a0001c, 0, 0 },
    131. 

  131.  	{ DSCR_CMD0_PSC0_RX, DEV_FLAGS_IN, 0, 0, 0x11a0001c, 0, 0 },
    132. 

  132. @@ -172,9 +147,9 @@ static dbdev_tab_t dbdev_tab[] = {
    133. 

  133.  	{ DSCR_CMD0_PSC1_RX, DEV_FLAGS_IN, 0, 0, 0x11b0001c, 0, 0 },
    134. 

  134.  	{ DSCR_CMD0_PSC1_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
    135. 

  135.  
    136. 

  136. -	{ DSCR_CMD0_CIM_RXA, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
    137. 

  137. -	{ DSCR_CMD0_CIM_RXB, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
    138. 

  138. -	{ DSCR_CMD0_CIM_RXC, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
    139. 

  139. +	{ DSCR_CMD0_CIM_RXA, DEV_FLAGS_IN, 0, 32, 0x14004020, 0, 0 },
    140. 

  140. +	{ DSCR_CMD0_CIM_RXB, DEV_FLAGS_IN, 0, 32, 0x14004040, 0, 0 },
    141. 

  141. +	{ DSCR_CMD0_CIM_RXC, DEV_FLAGS_IN, 0, 32, 0x14004060, 0, 0 },
    142. 

  142.  	{ DSCR_CMD0_CIM_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
    143. 

  143.  
    144. 

  144.  	{ DSCR_CMD0_NAND_FLASH, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
    145. 

  145. @@ -183,6 +158,24 @@ static dbdev_tab_t dbdev_tab[] = {
    146. 

  146.  
    147. 

  147.  	{ DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
    148. 

  148.  	{ DSCR_CMD0_ALWAYS, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
    149. 

  149. +
    150. 

  150. +	/* Provide 16 user definable device types */
    151. 

  151. +	{ 0, 0, 0, 0, 0, 0, 0 },
    152. 

  152. +	{ 0, 0, 0, 0, 0, 0, 0 },
    153. 

  153. +	{ 0, 0, 0, 0, 0, 0, 0 },
    154. 

  154. +	{ 0, 0, 0, 0, 0, 0, 0 },
    155. 

  155. +	{ 0, 0, 0, 0, 0, 0, 0 },
    156. 

  156. +	{ 0, 0, 0, 0, 0, 0, 0 },
    157. 

  157. +	{ 0, 0, 0, 0, 0, 0, 0 },
    158. 

  158. +	{ 0, 0, 0, 0, 0, 0, 0 },
    159. 

  159. +	{ 0, 0, 0, 0, 0, 0, 0 },
    160. 

  160. +	{ 0, 0, 0, 0, 0, 0, 0 },
    161. 

  161. +	{ 0, 0, 0, 0, 0, 0, 0 },
    162. 

  162. +	{ 0, 0, 0, 0, 0, 0, 0 },
    163. 

  163. +	{ 0, 0, 0, 0, 0, 0, 0 },
    164. 

  164. +	{ 0, 0, 0, 0, 0, 0, 0 },
    165. 

  165. +	{ 0, 0, 0, 0, 0, 0, 0 },
    166. 

  166. +	{ 0, 0, 0, 0, 0, 0, 0 },
    167. 

  167.  };
    168. 

  168.  
    169. 

  169.  #define DBDEV_TAB_SIZE (sizeof(dbdev_tab) / sizeof(dbdev_tab_t))
    170. 

  170. @@ -202,6 +195,30 @@ find_dbdev_id (u32 id)
    171. 

  171.  	return NULL;
    172. 

  172.  }
    173. 

  173.  
    174. 

  174. +u32
    175. 

  175. +au1xxx_ddma_add_device(dbdev_tab_t *dev)
    176. 

  176. +{
    177. 

  177. +	u32 ret = 0;
    178. 

  178. +	dbdev_tab_t *p=NULL;
    179. 

  179. +	static u16 new_id=0x1000;
    180. 

  180. +
    181. 

  181. +	p = find_dbdev_id(0);
    182. 

  182. +	if ( NULL != p )
    183. 

  183. +	{
    184. 

  184. +		memcpy(p, dev, sizeof(dbdev_tab_t));
    185. 

  185. + 		p->dev_id = DSCR_DEV2CUSTOM_ID(new_id,dev->dev_id);
    186. 

  186. +		ret = p->dev_id;
    187. 

  187. +		new_id++;
    188. 

  188. +#if 0
    189. 

  189. +		printk("add_device: id:%x flags:%x padd:%x\n", 
    190. 

  190. +				p->dev_id, p->dev_flags, p->dev_physaddr );
    191. 

  191. +#endif
    192. 

  192. +	}
    193. 

  193. +
    194. 

  194. +	return ret;
    195. 

  195. +}
    196. 

  196. +EXPORT_SYMBOL(au1xxx_ddma_add_device);
    197. 

  197. +
    198. 

  198.  /* Allocate a channel and return a non-zero descriptor if successful.
    199. 

  199.  */
    200. 

  200.  u32
    201. 

  201. @@ -214,7 +231,7 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 d
    202. 

  202.  	int		i;
    203. 

  203.  	dbdev_tab_t	*stp, *dtp;
    204. 

  204.  	chan_tab_t	*ctp;
    205. 

  205. -	volatile au1x_dma_chan_t *cp;
    206. 

  206. +	au1x_dma_chan_t *cp;
    207. 

  207.  
    208. 

  208.  	/* We do the intialization on the first channel allocation.
    209. 

  209.  	 * We have to wait because of the interrupt handler initialization
    210. 

  210. @@ -224,9 +241,6 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 d
    211. 

  211.  		au1xxx_dbdma_init();
    212. 

  212.  	dbdma_initialized = 1;
    213. 

  213.  
    214. 

  214. -	if ((srcid > DSCR_NDEV_IDS) || (destid > DSCR_NDEV_IDS))
    215. 

  215. -		return 0;
    216. 

  216. -	
    217. 

  217.  	if ((stp = find_dbdev_id(srcid)) == NULL) return 0;
    218. 

  218.  	if ((dtp = find_dbdev_id(destid)) == NULL) return 0;
    219. 

  219.  
    220. 

  220. @@ -268,9 +282,9 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 d
    221. 

  221.  				/* If kmalloc fails, it is caught below same
    222. 

  222.  				 * as a channel not available.
    223. 

  223.  				 */
    224. 

  224. -				ctp = (chan_tab_t *)kmalloc(sizeof(chan_tab_t), GFP_KERNEL);
    225. 

  225. +				ctp = (chan_tab_t *)
    226. 

  226. +					kmalloc(sizeof(chan_tab_t), GFP_KERNEL);
    227. 

  227.  				chan_tab_ptr[i] = ctp;
    228. 

  228. -				ctp->chan_index = chan = i;
    229. 

  229.  				break;
    230. 

  230.  			}
    231. 

  231.  		}
    232. 

  232. @@ -278,10 +292,11 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 d
    233. 

  233.  
    234. 

  234.  		if (ctp != NULL) {
    235. 

  235.  			memset(ctp, 0, sizeof(chan_tab_t));
    236. 

  236. +			ctp->chan_index = chan = i;
    237. 

  237.  			dcp = DDMA_CHANNEL_BASE;
    238. 

  238.  			dcp += (0x0100 * chan);
    239. 

  239.  			ctp->chan_ptr = (au1x_dma_chan_t *)dcp;
    240. 

  240. -			cp = (volatile au1x_dma_chan_t *)dcp;
    241. 

  241. +			cp = (au1x_dma_chan_t *)dcp;
    242. 

  242.  			ctp->chan_src = stp;
    243. 

  243.  			ctp->chan_dest = dtp;
    244. 

  244.  			ctp->chan_callback = callback;
    245. 

  245. @@ -298,6 +313,9 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 d
    246. 

  246.  				i |= DDMA_CFG_DED;
    247. 

  247.  			if (dtp->dev_intpolarity)
    248. 

  248.  				i |= DDMA_CFG_DP;
    249. 

  249. +			if ((stp->dev_flags & DEV_FLAGS_SYNC) ||
    250. 

  250. +				(dtp->dev_flags & DEV_FLAGS_SYNC))
    251. 

  251. +					i |= DDMA_CFG_SYNC;
    252. 

  252.  			cp->ddma_cfg = i;
    253. 

  253.  			au_sync();
    254. 

  254.  
    255. 

  255. @@ -308,14 +326,14 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 d
    256. 

  256.  			rv = (u32)(&chan_tab_ptr[chan]);
    257. 

  257.  		}
    258. 

  258.  		else {
    259. 

  259. -			/* Release devices.
    260. 

  260. -			*/
    261. 

  261. +			/* Release devices */
    262. 

  262.  			stp->dev_flags &= ~DEV_FLAGS_INUSE;
    263. 

  263.  			dtp->dev_flags &= ~DEV_FLAGS_INUSE;
    264. 

  264.  		}
    265. 

  265.  	}
    266. 

  266.  	return rv;
    267. 

  267.  }
    268. 

  268. +EXPORT_SYMBOL(au1xxx_dbdma_chan_alloc);
    269. 

  269.  
    270. 

  270.  /* Set the device width if source or destination is a FIFO.
    271. 

  271.   * Should be 8, 16, or 32 bits.
    272. 

  272. @@ -343,6 +361,7 @@ au1xxx_dbdma_set_devwidth(u32 chanid, in
    273. 

  273.  
    274. 

  274.  	return rv;
    275. 

  275.  }
    276. 

  276. +EXPORT_SYMBOL(au1xxx_dbdma_set_devwidth);
    277. 

  277.  
    278. 

  278.  /* Allocate a descriptor ring, initializing as much as possible.
    279. 

  279.  */
    280. 

  280. @@ -369,7 +388,8 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int 
    281. 

  281.  	 * and if we try that first we are likely to not waste larger
    282. 

  282.  	 * slabs of memory.
    283. 

  283.  	 */
    284. 

  284. -	desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t), GFP_KERNEL);
    285. 

  285. +	desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t), 
    286. 

  286. +			GFP_KERNEL|GFP_DMA);
    287. 

  287.  	if (desc_base == 0)
    288. 

  288.  		return 0;
    289. 

  289.  	
    290. 

  290. @@ -380,7 +400,7 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int 
    291. 

  291.  		kfree((const void *)desc_base);
    292. 

  292.  		i = entries * sizeof(au1x_ddma_desc_t);
    293. 

  293.  		i += (sizeof(au1x_ddma_desc_t) - 1);
    294. 

  294. -		if ((desc_base = (u32)kmalloc(i, GFP_KERNEL)) == 0)
    295. 

  295. +		if ((desc_base = (u32)kmalloc(i, GFP_KERNEL|GFP_DMA)) == 0)
    296. 

  296.  			return 0;
    297. 

  297.  
    298. 

  298.  		desc_base = ALIGN_ADDR(desc_base, sizeof(au1x_ddma_desc_t));
    299. 

  299. @@ -460,9 +480,14 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int 
    300. 

  300.  	/* If source input is fifo, set static address.
    301. 

  301.  	*/
    302. 

  302.  	if (stp->dev_flags & DEV_FLAGS_IN) {
    303. 

  303. -		src0 = stp->dev_physaddr;
    304. 

  304. -		src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC);
    305. 

  305. +		if ( stp->dev_flags & DEV_FLAGS_BURSTABLE ) 
    306. 

  306. +			src1 |= DSCR_SRC1_SAM(DSCR_xAM_BURST);
    307. 

  307. +		else 
    308. 

  308. +			src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC);
    309. 

  309. +
    310. 

  310.  	}
    311. 

  311. +	if (stp->dev_physaddr) 
    312. 

  312. +		src0 = stp->dev_physaddr;
    313. 

  313.  
    314. 

  314.  	/* Set up dest1.  For now, assume no stride and increment.
    315. 

  315.  	 * A channel attribute update can change this later.
    316. 

  316. @@ -486,10 +511,18 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int 
    317. 

  317.  	/* If destination output is fifo, set static address.
    318. 

  318.  	*/
    319. 

  319.  	if (dtp->dev_flags & DEV_FLAGS_OUT) {
    320. 

  320. -		dest0 = dtp->dev_physaddr;
    321. 

  321. +		if ( dtp->dev_flags & DEV_FLAGS_BURSTABLE )
    322. 

  322. +	                dest1 |= DSCR_DEST1_DAM(DSCR_xAM_BURST);
    323. 

  323. +				else
    324. 

  324.  		dest1 |= DSCR_DEST1_DAM(DSCR_xAM_STATIC);
    325. 

  325.  	}
    326. 

  326. +	if (dtp->dev_physaddr) 
    327. 

  327. +		dest0 = dtp->dev_physaddr;
    328. 

  328.  	
    329. 

  329. +#if 0
    330. 

  330. +		printk("did:%x sid:%x cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n",
    331. 

  331. +			dtp->dev_id, stp->dev_id, cmd0, cmd1, src0, src1, dest0, dest1 );
    332. 

  332. +#endif
    333. 

  333.  	for (i=0; i<entries; i++) {
    334. 

  334.  		dp->dscr_cmd0 = cmd0;
    335. 

  335.  		dp->dscr_cmd1 = cmd1;
    336. 

  336. @@ -498,6 +531,7 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int 
    337. 

  337.  		dp->dscr_dest0 = dest0;
    338. 

  338.  		dp->dscr_dest1 = dest1;
    339. 

  339.  		dp->dscr_stat = 0;
    340. 

  340. +				dp->sw_context = dp->sw_status = 0;
    341. 

  341.  		dp->dscr_nxtptr = DSCR_NXTPTR(virt_to_phys(dp + 1));
    342. 

  342.  		dp++;
    343. 

  343.  	}
    344. 

  344. @@ -510,13 +544,14 @@ au1xxx_dbdma_ring_alloc(u32 chanid, int 
    345. 

  345.  
    346. 

  346.  	return (u32)(ctp->chan_desc_base);
    347. 

  347.  }
    348. 

  348. +EXPORT_SYMBOL(au1xxx_dbdma_ring_alloc);
    349. 

  349.  
    350. 

  350.  /* Put a source buffer into the DMA ring.
    351. 

  351.   * This updates the source pointer and byte count.  Normally used
    352. 

  352.   * for memory to fifo transfers.
    353. 

  353.   */
    354. 

  354.  u32
    355. 

  355. -au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes)
    356. 

  356. +_au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags)
    357. 

  357.  {
    358. 

  358.  	chan_tab_t		*ctp;
    359. 

  359.  	au1x_ddma_desc_t	*dp;
    360. 

  360. @@ -543,24 +578,40 @@ au1xxx_dbdma_put_source(u32 chanid, void
    361. 

  361.  	*/
    362. 

  362.  	dp->dscr_source0 = virt_to_phys(buf);
    363. 

  363.  	dp->dscr_cmd1 = nbytes;
    364. 

  364. -	dp->dscr_cmd0 |= DSCR_CMD0_V;	/* Let it rip */
    365. 

  365. -	ctp->chan_ptr->ddma_dbell = 0xffffffff;	/* Make it go */
    366. 

  366. -	
    367. 

  367. +	/* Check flags  */
    368. 

  368. +	if (flags & DDMA_FLAGS_IE) 
    369. 

  369. +		dp->dscr_cmd0 |= DSCR_CMD0_IE;
    370. 

  370. +	if (flags & DDMA_FLAGS_NOIE)
    371. 

  371. +		dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
    372. 

  372.  	/* Get next descriptor pointer.
    373. 

  373.  	*/
    374. 

  374.  	ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
    375. 

  375.  
    376. 

  376. +	/*
    377. 

  377. +	 * There is an errata on the Au1200/Au1550 parts that could result 
    378. 

  378. +	 * in "stale" data being DMA'd. It has to do with the snoop logic on 
    379. 

  379. +	 * the dache eviction buffer.  NONCOHERENT_IO is on by default for 
    380. 

  380. +	 * these parts. If it is fixedin the future, these dma_cache_inv will 
    381. 

  381. +	 * just be nothing more than empty macros. See io.h.
    382. 

  382. +	 * */
    383. 

  383. +	dma_cache_wback_inv(buf,nbytes);
    384. 

  384. +        dp->dscr_cmd0 |= DSCR_CMD0_V;        /* Let it rip */
    385. 

  385. +	au_sync();
    386. 

  386. +	dma_cache_wback_inv(dp, sizeof(dp));
    387. 

  387. +        ctp->chan_ptr->ddma_dbell = 0;
    388. 

  388. +
    389. 

  389.  	/* return something not zero.
    390. 

  390.  	*/
    391. 

  391.  	return nbytes;
    392. 

  392.  }
    393. 

  393. +EXPORT_SYMBOL(_au1xxx_dbdma_put_source);
    394. 

  394.  
    395. 

  395.  /* Put a destination buffer into the DMA ring.
    396. 

  396.   * This updates the destination pointer and byte count.  Normally used
    397. 

  397.   * to place an empty buffer into the ring for fifo to memory transfers.
    398. 

  398.   */
    399. 

  399.  u32
    400. 

  400. -au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes)
    401. 

  401. +_au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags)
    402. 

  402.  {
    403. 

  403.  	chan_tab_t		*ctp;
    404. 

  404.  	au1x_ddma_desc_t	*dp;
    405. 

  405. @@ -582,11 +633,33 @@ au1xxx_dbdma_put_dest(u32 chanid, void *
    406. 

  406.  	if (dp->dscr_cmd0 & DSCR_CMD0_V)
    407. 

  407.  		return 0;
    408. 

  408.  	
    409. 

  409. -	/* Load up buffer address and byte count.
    410. 

  410. -	*/
    411. 

  411. +	/* Load up buffer address and byte count */
    412. 

  412. +
    413. 

  413. +	/* Check flags  */
    414. 

  414. +	if (flags & DDMA_FLAGS_IE) 
    415. 

  415. +		dp->dscr_cmd0 |= DSCR_CMD0_IE;
    416. 

  416. +	if (flags & DDMA_FLAGS_NOIE)
    417. 

  417. +		dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
    418. 

  418. +
    419. 

  419.  	dp->dscr_dest0 = virt_to_phys(buf);
    420. 

  420.  	dp->dscr_cmd1 = nbytes;
    421. 

  421. +#if 0
    422. 

  422. +	printk("cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n", 
    423. 

  423. +			dp->dscr_cmd0, dp->dscr_cmd1, dp->dscr_source0, 
    424. 

  424. +			dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1 );
    425. 

  425. +#endif
    426. 

  426. +	/*
    427. 

  427. +	 * There is an errata on the Au1200/Au1550 parts that could result in 
    428. 

  428. +	 * "stale" data being DMA'd. It has to do with the snoop logic on the 
    429. 

  429. +	 * dache eviction buffer. NONCOHERENT_IO is on by default for these 
    430. 

  430. +	 * parts. If it is fixedin the future, these dma_cache_inv will just 
    431. 

  431. +	 * be nothing more than empty macros. See io.h. 
    432. 

  432. +	 * */
    433. 

  433. +	dma_cache_inv(buf,nbytes);
    434. 

  434.  	dp->dscr_cmd0 |= DSCR_CMD0_V;	/* Let it rip */
    435. 

  435. +	au_sync();
    436. 

  436. +	dma_cache_wback_inv(dp, sizeof(dp));
    437. 

  437. +        ctp->chan_ptr->ddma_dbell = 0;
    438. 

  438.  	
    439. 

  439.  	/* Get next descriptor pointer.
    440. 

  440.  	*/
    441. 

  441. @@ -596,6 +669,7 @@ au1xxx_dbdma_put_dest(u32 chanid, void *
    442. 

  442.  	*/
    443. 

  443.  	return nbytes;
    444. 

  444.  }
    445. 

  445. +EXPORT_SYMBOL(_au1xxx_dbdma_put_dest);
    446. 

  446.  
    447. 

  447.  /* Get a destination buffer into the DMA ring.
    448. 

  448.   * Normally used to get a full buffer from the ring during fifo
    449. 

  449. @@ -645,7 +719,7 @@ void
    450. 

  450.  au1xxx_dbdma_stop(u32 chanid)
    451. 

  451.  {
    452. 

  452.  	chan_tab_t	*ctp;
    453. 

  453. -	volatile au1x_dma_chan_t *cp;
    454. 

  454. +	au1x_dma_chan_t *cp;
    455. 

  455.  	int halt_timeout = 0;
    456. 

  456.  
    457. 

  457.  	ctp = *((chan_tab_t **)chanid);
    458. 

  458. @@ -665,6 +739,7 @@ au1xxx_dbdma_stop(u32 chanid)
    459. 

  459.  	cp->ddma_stat |= (DDMA_STAT_DB | DDMA_STAT_V);
    460. 

  460.  	au_sync();
    461. 

  461.  }
    462. 

  462. +EXPORT_SYMBOL(au1xxx_dbdma_stop);
    463. 

  463.  
    464. 

  464.  /* Start using the current descriptor pointer.  If the dbdma encounters
    465. 

  465.   * a not valid descriptor, it will stop.  In this case, we can just
    466. 

  466. @@ -674,17 +749,17 @@ void
    467. 

  467.  au1xxx_dbdma_start(u32 chanid)
    468. 

  468.  {
    469. 

  469.  	chan_tab_t	*ctp;
    470. 

  470. -	volatile au1x_dma_chan_t *cp;
    471. 

  471. +	au1x_dma_chan_t *cp;
    472. 

  472.  
    473. 

  473.  	ctp = *((chan_tab_t **)chanid);
    474. 

  474. -
    475. 

  475.  	cp = ctp->chan_ptr;
    476. 

  476.  	cp->ddma_desptr = virt_to_phys(ctp->cur_ptr);
    477. 

  477.  	cp->ddma_cfg |= DDMA_CFG_EN;	/* Enable channel */
    478. 

  478.  	au_sync();
    479. 

  479. -	cp->ddma_dbell = 0xffffffff;	/* Make it go */
    480. 

  480. +	cp->ddma_dbell = 0;
    481. 

  481.  	au_sync();
    482. 

  482.  }
    483. 

  483. +EXPORT_SYMBOL(au1xxx_dbdma_start);
    484. 

  484.  
    485. 

  485.  void
    486. 

  486.  au1xxx_dbdma_reset(u32 chanid)
    487. 

  487. @@ -703,15 +778,21 @@ au1xxx_dbdma_reset(u32 chanid)
    488. 

  488.  
    489. 

  489.  	do {
    490. 

  490.  		dp->dscr_cmd0 &= ~DSCR_CMD0_V;
    491. 

  491. +		/* reset our SW status -- this is used to determine 
    492. 

  492. +		 * if a descriptor is in use by upper level SW. Since 
    493. 

  493. +		 * posting can reset 'V' bit. 
    494. 

  494. +		 */
    495. 

  495. +		dp->sw_status = 0;
    496. 

  496.  		dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
    497. 

  497.  	} while (dp != ctp->chan_desc_base);
    498. 

  498.  }
    499. 

  499. +EXPORT_SYMBOL(au1xxx_dbdma_reset);
    500. 

  500.  
    501. 

  501.  u32
    502. 

  502.  au1xxx_get_dma_residue(u32 chanid)
    503. 

  503.  {
    504. 

  504.  	chan_tab_t	*ctp;
    505. 

  505. -	volatile au1x_dma_chan_t *cp;
    506. 

  506. +	au1x_dma_chan_t *cp;
    507. 

  507.  	u32		rv;
    508. 

  508.  
    509. 

  509.  	ctp = *((chan_tab_t **)chanid);
    510. 

  510. @@ -746,15 +827,16 @@ au1xxx_dbdma_chan_free(u32 chanid)
    511. 

  511.  
    512. 

  512.  	kfree(ctp);
    513. 

  513.  }
    514. 

  514. +EXPORT_SYMBOL(au1xxx_dbdma_chan_free);
    515. 

  515.  
    516. 

  516.  static void
    517. 

  517.  dbdma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
    518. 

  518.  {
    519. 

  519. -	u32	intstat;
    520. 

  520. +	u32        				intstat, flags;
    521. 

  521.  	u32	chan_index;
    522. 

  522.  	chan_tab_t		*ctp;
    523. 

  523.  	au1x_ddma_desc_t	*dp;
    524. 

  524. -	volatile au1x_dma_chan_t *cp;
    525. 

  525. +	au1x_dma_chan_t *cp;
    526. 

  526.  
    527. 

  527.  	intstat = dbdma_gptr->ddma_intstat;
    528. 

  528.  	au_sync();
    529. 

  529. @@ -773,18 +855,26 @@ dbdma_interrupt(int irq, void *dev_id, s
    530. 

  530.  		(ctp->chan_callback)(irq, ctp->chan_callparam, regs);
    531. 

  531.  
    532. 

  532.  	ctp->cur_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
    533. 

  533. -	
    534. 

  534.  }
    535. 

  535.  
    536. 

  536. -static void
    537. 

  537. -au1xxx_dbdma_init(void)
    538. 

  538. +static void au1xxx_dbdma_init(void)
    539. 

  539.  {
    540. 

  540. +	int irq_nr;
    541. 

  541. +
    542. 

  542.  	dbdma_gptr->ddma_config = 0;
    543. 

  543.  	dbdma_gptr->ddma_throttle = 0;
    544. 

  544.  	dbdma_gptr->ddma_inten = 0xffff;
    545. 

  545.  	au_sync();
    546. 

  546.  
    547. 

  547. -	if (request_irq(AU1550_DDMA_INT, dbdma_interrupt, SA_INTERRUPT,
    548. 

  548. +#if defined(CONFIG_SOC_AU1550)
    549. 

  549. +	irq_nr = AU1550_DDMA_INT;
    550. 

  550. +#elif defined(CONFIG_SOC_AU1200)
    551. 

  551. +	irq_nr = AU1200_DDMA_INT;
    552. 

  552. +#else
    553. 

  553. +	#error Unknown Au1x00 SOC
    554. 

  554. +#endif
    555. 

  555. +
    556. 

  556. +	if (request_irq(irq_nr, dbdma_interrupt, SA_INTERRUPT,
    557. 

  557.  			"Au1xxx dbdma", (void *)dbdma_gptr))
    558. 

  558.  		printk("Can't get 1550 dbdma irq");
    559. 

  559.  }
    560. 

  560. @@ -795,7 +885,8 @@ au1xxx_dbdma_dump(u32 chanid)
    561. 

  561.  	chan_tab_t		*ctp;
    562. 

  562.  	au1x_ddma_desc_t	*dp;
    563. 

  563.  	dbdev_tab_t		*stp, *dtp;
    564. 

  564. -	volatile au1x_dma_chan_t *cp;
    565. 

  565. +	au1x_dma_chan_t *cp;
    566. 

  566. +		u32			i = 0;
    567. 

  567.  
    568. 

  568.  	ctp = *((chan_tab_t **)chanid);
    569. 

  569.  	stp = ctp->chan_src;
    570. 

  570. @@ -820,15 +911,64 @@ au1xxx_dbdma_dump(u32 chanid)
    571. 

  571.  	dp = ctp->chan_desc_base;
    572. 

  572.  
    573. 

  573.  	do {
    574. 

  574. -		printk("dp %08x, cmd0 %08x, cmd1 %08x\n",
    575. 

  575. -			(u32)dp, dp->dscr_cmd0, dp->dscr_cmd1);
    576. 

  576. -		printk("src0 %08x, src1 %08x, dest0 %08x\n",
    577. 

  577. -			dp->dscr_source0, dp->dscr_source1, dp->dscr_dest0);
    578. 

  578. -		printk("dest1 %08x, stat %08x, nxtptr %08x\n",
    579. 

  579. -			dp->dscr_dest1, dp->dscr_stat, dp->dscr_nxtptr);
    580. 

  580. +                printk("Dp[%d]= %08x, cmd0 %08x, cmd1 %08x\n",
    581. 

  581. +                        i++, (u32)dp, dp->dscr_cmd0, dp->dscr_cmd1);
    582. 

  582. +                printk("src0 %08x, src1 %08x, dest0 %08x, dest1 %08x\n",
    583. 

  583. +                        dp->dscr_source0, dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1);
    584. 

  584. +                printk("stat %08x, nxtptr %08x\n",
    585. 

  585. +                        dp->dscr_stat, dp->dscr_nxtptr);
    586. 

  586.  		dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
    587. 

  587.  	} while (dp != ctp->chan_desc_base);
    588. 

  588.  }
    589. 

  589.  
    590. 

  590. +/* Put a descriptor into the DMA ring.
    591. 

  591. + * This updates the source/destination pointers and byte count.
    592. 

  592. + */
    593. 

  593. +u32
    594. 

  594. +au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr )
    595. 

  595. +{
    596. 

  596. +	chan_tab_t *ctp;
    597. 

  597. +	au1x_ddma_desc_t *dp;
    598. 

  598. +	u32 nbytes=0;
    599. 

  599. +
    600. 

  600. +	/* I guess we could check this to be within the
    601. 

  601. +	* range of the table......
    602. 

  602. +	*/
    603. 

  603. +	ctp = *((chan_tab_t **)chanid);
    604. 

  604. +
    605. 

  605. +	/* We should have multiple callers for a particular channel,
    606. 

  606. +	* an interrupt doesn't affect this pointer nor the descriptor,
    607. 

  607. +	* so no locking should be needed.
    608. 

  608. +	*/
    609. 

  609. +	dp = ctp->put_ptr;
    610. 

  610. +
    611. 

  611. +	/* If the descriptor is valid, we are way ahead of the DMA
    612. 

  612. +	* engine, so just return an error condition.
    613. 

  613. +	*/
    614. 

  614. +	if (dp->dscr_cmd0 & DSCR_CMD0_V)
    615. 

  615. +		return 0;
    616. 

  616. +
    617. 

  617. +	/* Load up buffer addresses and byte count.
    618. 

  618. +	*/
    619. 

  619. +	dp->dscr_dest0 = dscr->dscr_dest0;
    620. 

  620. +	dp->dscr_source0 = dscr->dscr_source0;
    621. 

  621. +	dp->dscr_dest1 = dscr->dscr_dest1;
    622. 

  622. +	dp->dscr_source1 = dscr->dscr_source1;
    623. 

  623. +	dp->dscr_cmd1 = dscr->dscr_cmd1;
    624. 

  624. +	nbytes = dscr->dscr_cmd1;
    625. 

  625. +	/* Allow the caller to specifiy if an interrupt is generated */
    626. 

  626. +	dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
    627. 

  627. +	dp->dscr_cmd0 |= dscr->dscr_cmd0 | DSCR_CMD0_V;
    628. 

  628. +	ctp->chan_ptr->ddma_dbell = 0;
    629. 

  629. +
    630. 

  630. +	/* Get next descriptor pointer.
    631. 

  631. +	*/
    632. 

  632. +	ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
    633. 

  633. +
    634. 

  634. +	/* return something not zero.
    635. 

  635. +	*/
    636. 

  636. +	return nbytes;
    637. 

  637. +}
    638. 

  638. +
    639. 

  639.  #endif /* defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) */
    640. 

  640.  
    641. 

  641. --- /dev/null
    642. 

  642. +++ b/arch/mips/au1000/common/gpio.c
    643. 

  643. @@ -0,0 +1,118 @@
    644. 

  644. +/*
    645. 

  645. + *  This program is free software; you can redistribute	 it and/or modify it
    646. 

  646. + *  under  the terms of	 the GNU General  Public License as published by the
    647. 

  647. + *  Free Software Foundation;  either version 2 of the	License, or (at your
    648. 

  648. + *  option) any later version.
    649. 

  649. + *
    650. 

  650. + *  THIS  SOFTWARE  IS PROVIDED	  ``AS	IS'' AND   ANY	EXPRESS OR IMPLIED
    651. 

  651. + *  WARRANTIES,	  INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
    652. 

  652. + *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
    653. 

  653. + *  NO	EVENT  SHALL   THE AUTHOR  BE	 LIABLE FOR ANY	  DIRECT, INDIRECT,
    654. 

  654. + *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
    655. 

  655. + *  NOT LIMITED	  TO, PROCUREMENT OF  SUBSTITUTE GOODS	OR SERVICES; LOSS OF
    656. 

  656. + *  USE, DATA,	OR PROFITS; OR	BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
    657. 

  657. + *  ANY THEORY OF LIABILITY, WHETHER IN	 CONTRACT, STRICT LIABILITY, OR TORT
    658. 

  658. + *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
    659. 

  659. + *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    660. 

  660. + *
    661. 

  661. + *  You should have received a copy of the  GNU General Public License along
    662. 

  662. + *  with this program; if not, write  to the Free Software Foundation, Inc.,
    663. 

  663. + *  675 Mass Ave, Cambridge, MA 02139, USA.
    664. 

  664. + */
    665. 

  665. +
    666. 

  666. +#include <asm/au1000.h>
    667. 

  667. +#include <asm/au1xxx_gpio.h>
    668. 

  668. +
    669. 

  669. +#define gpio1 sys
    670. 

  670. +#if !defined(CONFIG_SOC_AU1000)
    671. 

  671. +static AU1X00_GPIO2 * const gpio2 = (AU1X00_GPIO2 *)GPIO2_BASE;
    672. 

  672. +
    673. 

  673. +#define GPIO2_OUTPUT_ENABLE_MASK 0x00010000
    674. 

  674. +
    675. 

  675. +int au1xxx_gpio2_read(int signal)
    676. 

  676. +{
    677. 

  677. +	signal -= 200;
    678. 

  678. +/*	gpio2->dir &= ~(0x01 << signal);						//Set GPIO to input */
    679. 

  679. +	return ((gpio2->pinstate >> signal) & 0x01);
    680. 

  680. +}
    681. 

  681. +
    682. 

  682. +void au1xxx_gpio2_write(int signal, int value)
    683. 

  683. +{
    684. 

  684. +	signal -= 200;
    685. 

  685. +
    686. 

  686. +	gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << signal) | 
    687. 

  687. +		(value << signal);
    688. 

  688. +}
    689. 

  689. +
    690. 

  690. +void au1xxx_gpio2_tristate(int signal)
    691. 

  691. +{
    692. 

  692. +	signal -= 200;
    693. 

  693. +	gpio2->dir &= ~(0x01 << signal); 	/* Set GPIO to input */
    694. 

  694. +}
    695. 

  695. +#endif
    696. 

  696. +
    697. 

  697. +int au1xxx_gpio1_read(int signal)
    698. 

  698. +{
    699. 

  699. +/*	gpio1->trioutclr |= (0x01 << signal); */
    700. 

  700. +	return ((gpio1->pinstaterd >> signal) & 0x01);
    701. 

  701. +}
    702. 

  702. +
    703. 

  703. +void au1xxx_gpio1_write(int signal, int value)
    704. 

  704. +{
    705. 

  705. +	if(value)
    706. 

  706. +		gpio1->outputset = (0x01 << signal);
    707. 

  707. +	else
    708. 

  708. +		gpio1->outputclr = (0x01 << signal);	/* Output a Zero */
    709. 

  709. +}
    710. 

  710. +
    711. 

  711. +void au1xxx_gpio1_tristate(int signal)
    712. 

  712. +{
    713. 

  713. +	gpio1->trioutclr = (0x01 << signal);		/* Tristate signal */
    714. 

  714. +}
    715. 

  715. +
    716. 

  716. +
    717. 

  717. +int au1xxx_gpio_read(int signal)
    718. 

  718. +{
    719. 

  719. +	if(signal >= 200)
    720. 

  720. +#if defined(CONFIG_SOC_AU1000)
    721. 

  721. +		return 0;
    722. 

  722. +#else
    723. 

  723. +		return au1xxx_gpio2_read(signal);
    724. 

  724. +#endif
    725. 

  725. +	else
    726. 

  726. +		return au1xxx_gpio1_read(signal);
    727. 

  727. +}
    728. 

  728. +
    729. 

  729. +void au1xxx_gpio_write(int signal, int value)
    730. 

  730. +{
    731. 

  731. +	if(signal >= 200)
    732. 

  732. +#if defined(CONFIG_SOC_AU1000)
    733. 

  733. +		;
    734. 

  734. +#else
    735. 

  735. +		au1xxx_gpio2_write(signal, value);
    736. 

  736. +#endif
    737. 

  737. +	else
    738. 

  738. +		au1xxx_gpio1_write(signal, value);
    739. 

  739. +}
    740. 

  740. +
    741. 

  741. +void au1xxx_gpio_tristate(int signal)
    742. 

  742. +{
    743. 

  743. +	if(signal >= 200)
    744. 

  744. +#if defined(CONFIG_SOC_AU1000)
    745. 

  745. +		;
    746. 

  746. +#else
    747. 

  747. +		au1xxx_gpio2_tristate(signal);
    748. 

  748. +#endif
    749. 

  749. +	else
    750. 

  750. +		au1xxx_gpio1_tristate(signal);
    751. 

  751. +}
    752. 

  752. +
    753. 

  753. +void au1xxx_gpio1_set_inputs(void)
    754. 

  754. +{
    755. 

  755. +	gpio1->pininputen = 0;
    756. 

  756. +}
    757. 

  757. +
    758. 

  758. +EXPORT_SYMBOL(au1xxx_gpio1_set_inputs);
    759. 

  759. +EXPORT_SYMBOL(au1xxx_gpio_tristate);
    760. 

  760. +EXPORT_SYMBOL(au1xxx_gpio_write);
    761. 

  761. +EXPORT_SYMBOL(au1xxx_gpio_read);
    762. 

  762. --- a/arch/mips/au1000/common/irq.c
    763. 

  763. +++ b/arch/mips/au1000/common/irq.c
    764. 

  764. @@ -303,8 +303,30 @@ static struct hw_interrupt_type level_ir
    765. 

  765.  };
    766. 

  766.  
    767. 

  767.  #ifdef CONFIG_PM
    768. 

  768. -void startup_match20_interrupt(void)
    769. 

  769. +void startup_match20_interrupt(void (*handler)(int, void *, struct pt_regs *))
    770. 

  770.  {
    771. 

  771. +	static struct irqaction action;
    772. 

  772. +	/* This is a big problem.... since we didn't use request_irq
    773. 

  773. +	   when kernel/irq.c calls probe_irq_xxx this interrupt will
    774. 

  774. +	   be probed for usage. This will end up disabling the device :(
    775. 

  775. +
    776. 

  776. +       Give it a bogus "action" pointer -- this will keep it from
    777. 

  777. +	   getting auto-probed!
    778. 

  778. +
    779. 

  779. +       By setting the status to match that of request_irq() we
    780. 

  780. +       can avoid it.  --cgray
    781. 

  781. +	*/
    782. 

  782. +	action.dev_id = handler;
    783. 

  783. +	action.flags = 0;
    784. 

  784. +	action.mask = 0;
    785. 

  785. +	action.name = "Au1xxx TOY";
    786. 

  786. +	action.handler = handler;
    787. 

  787. +	action.next = NULL;
    788. 

  788. +
    789. 

  789. +	irq_desc[AU1000_TOY_MATCH2_INT].action = &action; 
    790. 

  790. +	irq_desc[AU1000_TOY_MATCH2_INT].status 
    791. 

  791. +		 &= ~(IRQ_DISABLED | IRQ_AUTODETECT | IRQ_WAITING | IRQ_INPROGRESS);
    792. 

  792. +
    793. 

  793.  	local_enable_irq(AU1000_TOY_MATCH2_INT);
    794. 

  794.  }
    795. 

  795.  #endif
    796. 

  796. @@ -508,6 +530,7 @@ void intc0_req0_irqdispatch(struct pt_re
    797. 

  797.  
    798. 

  798.  	if (!intc0_req0) return;
    799. 

  799.  
    800. 

  800. +#ifdef AU1000_USB_DEV_REQ_INT
    801. 

  801.  	/*
    802. 

  802.  	 * Because of the tight timing of SETUP token to reply
    803. 

  803.  	 * transactions, the USB devices-side packet complete
    804. 

  804. @@ -518,6 +541,7 @@ void intc0_req0_irqdispatch(struct pt_re
    805. 

  805.  		do_IRQ(AU1000_USB_DEV_REQ_INT, regs);
    806. 

  806.  		return;
    807. 

  807.  	}
    808. 

  808. +#endif
    809. 

  809.  
    810. 

  810.  	irq = au_ffs(intc0_req0) - 1;
    811. 

  811.  	intc0_req0 &= ~(1<<irq);
    812. 

  812. @@ -536,17 +560,7 @@ void intc0_req1_irqdispatch(struct pt_re
    813. 

  813.  
    814. 

  814.  	irq = au_ffs(intc0_req1) - 1;
    815. 

  815.  	intc0_req1 &= ~(1<<irq);
    816. 

  816. -#ifdef CONFIG_PM
    817. 

  817. -	if (irq == AU1000_TOY_MATCH2_INT) {
    818. 

  818. -		mask_and_ack_rise_edge_irq(irq);
    819. 

  819. -		counter0_irq(irq, NULL, regs);
    820. 

  820. -		local_enable_irq(irq);
    821. 

  821. -	}
    822. 

  822. -	else
    823. 

  823. -#endif
    824. 

  824. -	{
    825. 

  825. -		do_IRQ(irq, regs);
    826. 

  826. -	}
    827. 

  827. +	do_IRQ(irq, regs);
    828. 

  828.  }
    829. 

  829.  
    830. 

  830.  
    831. 

  831. --- a/arch/mips/au1000/common/Makefile
    832. 

  832. +++ b/arch/mips/au1000/common/Makefile
    833. 

  833. @@ -19,9 +19,9 @@ O_TARGET := au1000.o
    834. 

  834.  export-objs		= prom.o clocks.o power.o usbdev.o
    835. 

  835.  
    836. 

  836.  obj-y := prom.o int-handler.o irq.o puts.o time.o reset.o cputable.o \
    837. 

  837. -	au1xxx_irqmap.o clocks.o power.o setup.o sleeper.o dma.o dbdma.o
    838. 

  838. +	au1xxx_irqmap.o clocks.o power.o setup.o sleeper.o dma.o dbdma.o gpio.o
    839. 

  839.    
    840. 

  840. -export-objs += dma.o dbdma.o
    841. 

  841. +export-objs += dma.o dbdma.o gpio.o
    842. 

  842.  
    843. 

  843.  obj-$(CONFIG_AU1X00_USB_DEVICE) += usbdev.o
    844. 

  844.  obj-$(CONFIG_KGDB) += dbg_io.o
    845. 

  845. --- a/arch/mips/au1000/common/pci_fixup.c
    846. 

  846. +++ b/arch/mips/au1000/common/pci_fixup.c
    847. 

  847. @@ -75,9 +75,13 @@ void __init pcibios_fixup(void)
    848. 

  848.  
    849. 

  849.  #ifdef CONFIG_NONCOHERENT_IO
    850. 

  850.  	/* 
    851. 

  851. -	 *  Set the NC bit in controller for pre-AC silicon
    852. 

  852. +         *  Set the NC bit in controller for Au1500 pre-AC silicon
    853. 

  853.  	 */
    854. 

  854. -	au_writel( 1<<16 | au_readl(Au1500_PCI_CFG), Au1500_PCI_CFG);
    855. 

  855. +	u32 prid = read_c0_prid();
    856. 

  856. +	if ( (prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) {
    857. 

  857. +	       au_writel( 1<<16 | au_readl(Au1500_PCI_CFG), Au1500_PCI_CFG);
    858. 

  858. +	       printk("Non-coherent PCI accesses enabled\n");
    859. 

  859. +	}
    860. 

  860.  	printk("Non-coherent PCI accesses enabled\n");
    861. 

  861.  #endif
    862. 

  862.  
    863. 

  863. --- a/arch/mips/au1000/common/pci_ops.c
    864. 

  864. +++ b/arch/mips/au1000/common/pci_ops.c
    865. 

  865. @@ -162,6 +162,7 @@ unsigned long last_entryLo0, last_entryL
    866. 

  866.  static int config_access(unsigned char access_type, struct pci_dev *dev, 
    867. 

  867.  			 unsigned char where, u32 * data)
    868. 

  868.  {
    869. 

  869. +	int error = PCIBIOS_SUCCESSFUL;
    870. 

  870.  #if defined( CONFIG_SOC_AU1500 ) || defined( CONFIG_SOC_AU1550 )
    871. 

  871.  	unsigned char bus = dev->bus->number;
    872. 

  872.  	unsigned int dev_fn = dev->devfn;
    873. 

  873. @@ -170,7 +171,6 @@ static int config_access(unsigned char a
    874. 

  874.  	unsigned long offset, status;
    875. 

  875.  	unsigned long cfg_base;
    876. 

  876.  	unsigned long flags;
    877. 

  877. -	int error = PCIBIOS_SUCCESSFUL;
    878. 

  878.  	unsigned long entryLo0, entryLo1;
    879. 

  879.  
    880. 

  880.  	if (device > 19) {
    881. 

  881. @@ -205,9 +205,8 @@ static int config_access(unsigned char a
    882. 

  882.  		last_entryLo0  = last_entryLo1 = 0xffffffff;
    883. 

  883.  	}
    884. 

  884.  
    885. 

  885. -	/* Since the Au1xxx doesn't do the idsel timing exactly to spec,
    886. 

  886. -	 * many board vendors implement their own off-chip idsel, so call
    887. 

  887. -	 * it now.  If it doesn't succeed, may as well bail out at this point.
    888. 

  888. +	/* Allow board vendors to implement their own off-chip idsel.  
    889. 

  889. +	 * If it doesn't succeed, may as well bail out at this point.
    890. 

  890.  	 */
    891. 

  891.  	if (board_pci_idsel) {
    892. 

  892.  		if (board_pci_idsel(device, 1) == 0) {
    893. 

  893. @@ -271,8 +270,11 @@ static int config_access(unsigned char a
    894. 

  894.  	}
    895. 

  895.  
    896. 

  896.  	local_irq_restore(flags);
    897. 

  897. -	return error;
    898. 

  898. +#else
    899. 

  899. +	/* Fake out Config space access with no responder */
    900. 

  900. +	*data = 0xFFFFFFFF;
    901. 

  901.  #endif
    902. 

  902. +	return error;
    903. 

  903.  }
    904. 

  904.  #endif
    905. 

  905.  
    906. 

  906. --- a/arch/mips/au1000/common/power.c
    907. 

  907. +++ b/arch/mips/au1000/common/power.c
    908. 

  908. @@ -50,7 +50,6 @@
    909. 

  909.  
    910. 

  910.  static void calibrate_delay(void);
    911. 

  911.  
    912. 

  912. -extern void set_au1x00_speed(unsigned int new_freq);
    913. 

  913.  extern unsigned int get_au1x00_speed(void);
    914. 

  914.  extern unsigned long get_au1x00_uart_baud_base(void);
    915. 

  915.  extern void set_au1x00_uart_baud_base(unsigned long new_baud_base);
    916. 

  916. @@ -116,6 +115,7 @@ save_core_regs(void)
    917. 

  917.  	sleep_uart0_clkdiv = au_readl(UART0_ADDR + UART_CLK);
    918. 

  918.  	sleep_uart0_enable = au_readl(UART0_ADDR + UART_MOD_CNTRL);
    919. 

  919.  
    920. 

  920. +#ifndef CONFIG_SOC_AU1200
    921. 

  921.  	/* Shutdown USB host/device.
    922. 

  922.  	*/
    923. 

  923.  	sleep_usbhost_enable = au_readl(USB_HOST_CONFIG);
    924. 

  924. @@ -127,6 +127,7 @@ save_core_regs(void)
    925. 

  925.  
    926. 

  926.  	sleep_usbdev_enable = au_readl(USBD_ENABLE);
    927. 

  927.  	au_writel(0, USBD_ENABLE); au_sync();
    928. 

  928. +#endif
    929. 

  929.  
    930. 

  930.  	/* Save interrupt controller state.
    931. 

  931.  	*/
    932. 

  932. @@ -212,14 +213,12 @@ void wakeup_from_suspend(void)
    933. 

  933.  int au_sleep(void)
    934. 

  934.  {
    935. 

  935.  	unsigned long wakeup, flags;
    936. 

  936. -	extern	void	save_and_sleep(void);
    937. 

  937. +	extern unsigned int save_and_sleep(void);
    938. 

  938.  
    939. 

  939.  	spin_lock_irqsave(&pm_lock,flags);
    940. 

  940.  
    941. 

  941.  	save_core_regs();
    942. 

  942.  
    943. 

  943. -	flush_cache_all();
    944. 

  944. -
    945. 

  945.  	/** The code below is all system dependent and we should probably
    946. 

  946.  	 ** have a function call out of here to set this up.  You need
    947. 

  947.  	 ** to configure the GPIO or timer interrupts that will bring
    948. 

  948. @@ -227,27 +226,26 @@ int au_sleep(void)
    949. 

  949.  	 ** For testing, the TOY counter wakeup is useful.
    950. 

  950.  	 **/
    951. 

  951.  
    952. 

  952. -#if 0
    953. 

  953. +#if 1
    954. 

  954.  	au_writel(au_readl(SYS_PINSTATERD) & ~(1 << 11), SYS_PINSTATERD);
    955. 

  955.  
    956. 

  956.  	/* gpio 6 can cause a wake up event */
    957. 

  957.  	wakeup = au_readl(SYS_WAKEMSK);
    958. 

  958.  	wakeup &= ~(1 << 8);	/* turn off match20 wakeup */
    959. 

  959. -	wakeup |= 1 << 6;	/* turn on gpio 6 wakeup   */
    960. 

  960. +	wakeup = 1 << 5;	/* turn on gpio 6 wakeup   */
    961. 

  961.  #else
    962. 

  962. -	/* For testing, allow match20 to wake us up.
    963. 

  963. -	*/
    964. 

  964. +	/* For testing, allow match20 to wake us up.  */
    965. 

  965.  #ifdef SLEEP_TEST_TIMEOUT
    966. 

  966.  	wakeup_counter0_set(sleep_ticks);
    967. 

  967.  #endif
    968. 

  968.  	wakeup = 1 << 8;	/* turn on match20 wakeup   */
    969. 

  969.  	wakeup = 0;
    970. 

  970.  #endif
    971. 

  971. -	au_writel(1, SYS_WAKESRC);	/* clear cause */
    972. 

  972. +	au_writel(0, SYS_WAKESRC);	/* clear cause */
    973. 

  973.  	au_sync();
    974. 

  974.  	au_writel(wakeup, SYS_WAKEMSK);
    975. 

  975.  	au_sync();
    976. 

  976. -
    977. 

  977. +	DPRINTK("Entering sleep!\n");
    978. 

  978.  	save_and_sleep();
    979. 

  979.  
    980. 

  980.  	/* after a wakeup, the cpu vectors back to 0x1fc00000 so
    981. 

  981. @@ -255,6 +253,7 @@ int au_sleep(void)
    982. 

  982.  	 */
    983. 

  983.  	restore_core_regs();
    984. 

  984.  	spin_unlock_irqrestore(&pm_lock, flags);
    985. 

  985. +	DPRINTK("Leaving sleep!\n");
    986. 

  986.  	return 0;
    987. 

  987.  }
    988. 

  988.  
    989. 

  989. @@ -285,7 +284,6 @@ static int pm_do_sleep(ctl_table * ctl, 
    990. 

  990.  
    991. 

  991.  		if (retval)
    992. 

  992.  			return retval;
    993. 

  993. -
    994. 

  994.  		au_sleep();
    995. 

  995.  		retval = pm_send_all(PM_RESUME, (void *) 0);
    996. 

  996.  	}
    997. 

  997. @@ -296,7 +294,6 @@ static int pm_do_suspend(ctl_table * ctl
    998. 

  998.  			 void *buffer, size_t * len)
    999. 

  999.  {
    1000. 

  1000.  	int retval = 0;
    1001. 

  1001. -	void	au1k_wait(void);
    1002. 

  1002.  
    1003. 

  1003.  	if (!write) {
    1004. 

  1004.  		*len = 0;
    1005. 

  1005. @@ -305,119 +302,9 @@ static int pm_do_suspend(ctl_table * ctl
    1006. 

  1006.  		if (retval)
    1007. 

  1007.  			return retval;
    1008. 

  1008.  		suspend_mode = 1;
    1009. 

  1009. -		au1k_wait();
    1010. 

  1010. -		retval = pm_send_all(PM_RESUME, (void *) 0);
    1011. 

  1011. -	}
    1012. 

  1012. -	return retval;
    1013. 

  1013. -}
    1014. 

  1014.  
    1015. 

  1015. -
    1016. 

  1016. -static int pm_do_freq(ctl_table * ctl, int write, struct file *file,
    1017. 

  1017. -		      void *buffer, size_t * len)
    1018. 

  1018. -{
    1019. 

  1019. -	int retval = 0, i;
    1020. 

  1020. -	unsigned long val, pll;
    1021. 

  1021. -#define TMPBUFLEN 64
    1022. 

  1022. -#define MAX_CPU_FREQ 396
    1023. 

  1023. -	char buf[TMPBUFLEN], *p;
    1024. 

  1024. -	unsigned long flags, intc0_mask, intc1_mask;
    1025. 

  1025. -	unsigned long old_baud_base, old_cpu_freq, baud_rate, old_clk,
    1026. 

  1026. -	    old_refresh;
    1027. 

  1027. -	unsigned long new_baud_base, new_cpu_freq, new_clk, new_refresh;
    1028. 

  1028. -
    1029. 

  1029. -	spin_lock_irqsave(&pm_lock, flags);
    1030. 

  1030. -	if (!write) {
    1031. 

  1031. -		*len = 0;
    1032. 

  1032. -	} else {
    1033. 

  1033. -		/* Parse the new frequency */
    1034. 

  1034. -		if (*len > TMPBUFLEN - 1) {
    1035. 

  1035. -			spin_unlock_irqrestore(&pm_lock, flags);
    1036. 

  1036. -			return -EFAULT;
    1037. 

  1037. -		}
    1038. 

  1038. -		if (copy_from_user(buf, buffer, *len)) {
    1039. 

  1039. -			spin_unlock_irqrestore(&pm_lock, flags);
    1040. 

  1040. -			return -EFAULT;
    1041. 

  1041. -		}
    1042. 

  1042. -		buf[*len] = 0;
    1043. 

  1043. -		p = buf;
    1044. 

  1044. -		val = simple_strtoul(p, &p, 0);
    1045. 

  1045. -		if (val > MAX_CPU_FREQ) {
    1046. 

  1046. -			spin_unlock_irqrestore(&pm_lock, flags);
    1047. 

  1047. -			return -EFAULT;
    1048. 

  1048. -		}
    1049. 

  1049. -
    1050. 

  1050. -		pll = val / 12;
    1051. 

  1051. -		if ((pll > 33) || (pll < 7)) {	/* 396 MHz max, 84 MHz min */
    1052. 

  1052. -			/* revisit this for higher speed cpus */
    1053. 

  1053. -			spin_unlock_irqrestore(&pm_lock, flags);
    1054. 

  1054. -			return -EFAULT;
    1055. 

  1055. -		}
    1056. 

  1056. -
    1057. 

  1057. -		old_baud_base = get_au1x00_uart_baud_base();
    1058. 

  1058. -		old_cpu_freq = get_au1x00_speed();
    1059. 

  1059. -
    1060. 

  1060. -		new_cpu_freq = pll * 12 * 1000000;
    1061. 

  1061. -	        new_baud_base =  (new_cpu_freq / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16));
    1062. 

  1062. -		set_au1x00_speed(new_cpu_freq);
    1063. 

  1063. -		set_au1x00_uart_baud_base(new_baud_base);
    1064. 

  1064. -
    1065. 

  1065. -		old_refresh = au_readl(MEM_SDREFCFG) & 0x1ffffff;
    1066. 

  1066. -		new_refresh =
    1067. 

  1067. -		    ((old_refresh * new_cpu_freq) /
    1068. 

  1068. -		     old_cpu_freq) | (au_readl(MEM_SDREFCFG) & ~0x1ffffff);
    1069. 

  1069. -
    1070. 

  1070. -		au_writel(pll, SYS_CPUPLL);
    1071. 

  1071. -		au_sync_delay(1);
    1072. 

  1072. -		au_writel(new_refresh, MEM_SDREFCFG);
    1073. 

  1073. -		au_sync_delay(1);
    1074. 

  1074. -
    1075. 

  1075. -		for (i = 0; i < 4; i++) {
    1076. 

  1076. -			if (au_readl
    1077. 

  1077. -			    (UART_BASE + UART_MOD_CNTRL +
    1078. 

  1078. -			     i * 0x00100000) == 3) {
    1079. 

  1079. -				old_clk =
    1080. 

  1080. -				    au_readl(UART_BASE + UART_CLK +
    1081. 

  1081. -					  i * 0x00100000);
    1082. 

  1082. -				// baud_rate = baud_base/clk
    1083. 

  1083. -				baud_rate = old_baud_base / old_clk;
    1084. 

  1084. -				/* we won't get an exact baud rate and the error
    1085. 

  1085. -				 * could be significant enough that our new
    1086. 

  1086. -				 * calculation will result in a clock that will
    1087. 

  1087. -				 * give us a baud rate that's too far off from
    1088. 

  1088. -				 * what we really want.
    1089. 

  1089. -				 */
    1090. 

  1090. -				if (baud_rate > 100000)
    1091. 

  1091. -					baud_rate = 115200;
    1092. 

  1092. -				else if (baud_rate > 50000)
    1093. 

  1093. -					baud_rate = 57600;
    1094. 

  1094. -				else if (baud_rate > 30000)
    1095. 

  1095. -					baud_rate = 38400;
    1096. 

  1096. -				else if (baud_rate > 17000)
    1097. 

  1097. -					baud_rate = 19200;
    1098. 

  1098. -				else
    1099. 

  1099. -					(baud_rate = 9600);
    1100. 

  1100. -				// new_clk = new_baud_base/baud_rate
    1101. 

  1101. -				new_clk = new_baud_base / baud_rate;
    1102. 

  1102. -				au_writel(new_clk,
    1103. 

  1103. -				       UART_BASE + UART_CLK +
    1104. 

  1104. -				       i * 0x00100000);
    1105. 

  1105. -				au_sync_delay(10);
    1106. 

  1106. -			}
    1107. 

  1107. -		}
    1108. 

  1108. +		retval = pm_send_all(PM_RESUME, (void *) 0);
    1109. 

  1109.  	}
    1110. 

  1110. -
    1111. 

  1111. -
    1112. 

  1112. -	/* We don't want _any_ interrupts other than
    1113. 

  1113. -	 * match20. Otherwise our calibrate_delay()
    1114. 

  1114. -	 * calculation will be off, potentially a lot.
    1115. 

  1115. -	 */
    1116. 

  1116. -	intc0_mask = save_local_and_disable(0);
    1117. 

  1117. -	intc1_mask = save_local_and_disable(1);
    1118. 

  1118. -	local_enable_irq(AU1000_TOY_MATCH2_INT);
    1119. 

  1119. -	spin_unlock_irqrestore(&pm_lock, flags);
    1120. 

  1120. -	calibrate_delay();
    1121. 

  1121. -	restore_local_and_enable(0, intc0_mask);
    1122. 

  1122. -	restore_local_and_enable(1, intc1_mask);
    1123. 

  1123.  	return retval;
    1124. 

  1124.  }
    1125. 

  1125.  
    1126. 

  1126. @@ -425,7 +312,6 @@ static int pm_do_freq(ctl_table * ctl, i
    1127. 

  1127.  static struct ctl_table pm_table[] = {
    1128. 

  1128.  	{ACPI_S1_SLP_TYP, "suspend", NULL, 0, 0600, NULL, &pm_do_suspend},
    1129. 

  1129.  	{ACPI_SLEEP, "sleep", NULL, 0, 0600, NULL, &pm_do_sleep},
    1130. 

  1130. -	{CTL_ACPI, "freq", NULL, 0, 0600, NULL, &pm_do_freq},
    1131. 

  1131.  	{0}
    1132. 

  1132.  };
    1133. 

  1133.  
    1134. 

  1134. --- a/arch/mips/au1000/common/reset.c
    1135. 

  1135. +++ b/arch/mips/au1000/common/reset.c
    1136. 

  1136. @@ -37,8 +37,6 @@
    1137. 

  1137.  #include <asm/system.h>
    1138. 

  1138.  #include <asm/au1000.h>
    1139. 

  1139.  
    1140. 

  1140. -extern int au_sleep(void);
    1141. 

  1141. -
    1142. 

  1142.  void au1000_restart(char *command)
    1143. 

  1143.  {
    1144. 

  1144.  	/* Set all integrated peripherals to disabled states */
    1145. 

  1145. @@ -144,6 +142,26 @@ void au1000_restart(char *command)
    1146. 

  1146.  		au_writel(0x00, 0xb1900064); /* sys_auxpll */
    1147. 

  1147.  		au_writel(0x00, 0xb1900100); /* sys_pininputen */
    1148. 

  1148.  		break;
    1149. 

  1149. +	case 0x04000000: /* Au1200 */
    1150. 

  1150. +		au_writel(0x00, 0xb400300c); /* ddma */
    1151. 

  1151. +		au_writel(0x00, 0xb1a00004); /* psc 0 */
    1152. 

  1152. +		au_writel(0x00, 0xb1b00004); /* psc 1 */
    1153. 

  1153. +		au_writel(0x00d02000, 0xb4020004); /* ehci, ohci, udc, otg */
    1154. 

  1154. +		au_writel(0x00, 0xb5000004); /* lcd */
    1155. 

  1155. +		au_writel(0x00, 0xb060000c); /* sd0 */
    1156. 

  1156. +		au_writel(0x00, 0xb068000c); /* sd1 */
    1157. 

  1157. +		au_writel(0x00, 0xb1100100); /* swcnt */
    1158. 

  1158. +		au_writel(0x00, 0xb0300000); /* aes */
    1159. 

  1159. +		au_writel(0x00, 0xb4004000); /* cim */
    1160. 

  1160. +		au_writel(0x00, 0xb1100100); /* uart0_enable */
    1161. 

  1161. +		au_writel(0x00, 0xb1200100); /* uart1_enable */
    1162. 

  1162. +		au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
    1163. 

  1163. +		au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
    1164. 

  1164. +		au_writel(0x00, 0xb1900028); /* sys_clksrc */
    1165. 

  1165. +		au_writel(0x10, 0xb1900060); /* sys_cpupll */
    1166. 

  1166. +		au_writel(0x00, 0xb1900064); /* sys_auxpll */
    1167. 

  1167. +		au_writel(0x00, 0xb1900100); /* sys_pininputen */
    1168. 

  1168. +		break;
    1169. 

  1169.  
    1170. 

  1170.  	default:
    1171. 

  1171.  		break;
    1172. 

  1172. @@ -163,32 +181,23 @@ void au1000_restart(char *command)
    1173. 

  1173.  
    1174. 

  1174.  void au1000_halt(void)
    1175. 

  1175.  {
    1176. 

  1176. -#if defined(CONFIG_MIPS_PB1550)
    1177. 

  1177. -	/* power off system */
    1178. 

  1178. -	printk("\n** Powering off Pb1550\n");
    1179. 

  1179. -	au_writew(au_readw(0xAF00001C) | (3<<14), 0xAF00001C); 
    1180. 

  1180. -	au_sync();
    1181. 

  1181. -	while(1); /* should not get here */
    1182. 

  1182. -#endif
    1183. 

  1183. -	printk(KERN_NOTICE "\n** You can safely turn off the power\n");
    1184. 

  1184. -#ifdef CONFIG_MIPS_MIRAGE
    1185. 

  1185. -	au_writel((1 << 26) | (1 << 10), GPIO2_OUTPUT);
    1186. 

  1186. -#endif
    1187. 

  1187. -#ifdef CONFIG_PM
    1188. 

  1188. -	au_sleep();
    1189. 

  1189. -
    1190. 

  1190. -	/* should not get here */
    1191. 

  1191. -	printk(KERN_ERR "Unable to put cpu in sleep mode\n");
    1192. 

  1192. -	while(1);
    1193. 

  1193. -#else
    1194. 

  1194. -	while (1)
    1195. 

  1195. +	/* Use WAIT in a low-power infinite spin loop */
    1196. 

  1196. +	while (1) {
    1197. 

  1197.  		__asm__(".set\tmips3\n\t"
    1198. 

  1198.  	                "wait\n\t"
    1199. 

  1199.  			".set\tmips0");
    1200. 

  1200. -#endif
    1201. 

  1201. +	}
    1202. 

  1202.  }
    1203. 

  1203.  
    1204. 

  1204.  void au1000_power_off(void)
    1205. 

  1205.  {
    1206. 

  1206. +	extern void board_power_off (void);
    1207. 

  1207. +
    1208. 

  1208. +	printk(KERN_NOTICE "\n** You can safely turn off the power\n");
    1209. 

  1209. +
    1210. 

  1210. +	/* Give board a chance to power-off */
    1211. 

  1211. +	board_power_off();
    1212. 

  1212. +
    1213. 

  1213. +	/* If board can't power-off, spin forever */
    1214. 

  1214.  	au1000_halt();
    1215. 

  1215.  }
    1216. 

  1216. --- a/arch/mips/au1000/common/setup.c
    1217. 

  1217. +++ b/arch/mips/au1000/common/setup.c
    1218. 

  1218. @@ -174,6 +174,40 @@ void __init au1x00_setup(void)
    1219. 

  1219.  	initrd_end = (unsigned long)&__rd_end;
    1220. 

  1220.  #endif
    1221. 

  1221.  
    1222. 

  1222. +#if defined(CONFIG_SOC_AU1200)
    1223. 

  1223. +#ifdef CONFIG_USB_EHCI_HCD
    1224. 

  1224. +	if ((argptr = strstr(argptr, "usb_ehci=")) == NULL) {
    1225. 

  1225. +	        char usb_args[80];
    1226. 

  1226. +		argptr = prom_getcmdline();
    1227. 

  1227. +		memset(usb_args, 0, sizeof(usb_args));
    1228. 

  1228. +		sprintf(usb_args, " usb_ehci=base:0x%x,len:0x%x,irq:%d",
    1229. 

  1229. +			USB_EHCI_BASE, USB_EHCI_LEN, AU1000_USB_HOST_INT);
    1230. 

  1230. +		strcat(argptr, usb_args);
    1231. 

  1231. +	}
    1232. 

  1232. +#ifdef CONFIG_USB_AMD5536UDC
    1233. 

  1233. +	/* enable EHC + OHC + UDC clocks, memory and bus mastering */
    1234. 

  1234. +/*	au_writel( 0x00DF207F, USB_MSR_BASE + 4); */
    1235. 

  1235. +	au_writel( 0xC0DF207F, USB_MSR_BASE + 4);  // incl. prefetch
    1236. 

  1236. +#else
    1237. 

  1237. +	/* enable EHC + OHC clocks, memory and bus mastering */
    1238. 

  1238. +/*	au_writel( 0x00DB200F, USB_MSR_BASE + 4); */
    1239. 

  1239. +	au_writel( 0xC0DB200F, USB_MSR_BASE + 4);  /* incl. prefetch */
    1240. 

  1240. +#endif
    1241. 

  1241. +	udelay(1000);
    1242. 

  1242. +
    1243. 

  1243. +#else /* CONFIG_USB_EHCI_HCD */
    1244. 

  1244. +
    1245. 

  1245. +#ifdef CONFIG_USB_AMD5536UDC
    1246. 

  1246. +#ifndef CONFIG_USB_OHCI
    1247. 

  1247. +	/* enable UDC clocks, memory and bus mastering */
    1248. 

  1248. +/*	au_writel( 0x00DC2070, USB_MSR_BASE + 4); */
    1249. 

  1249. +	au_writel( 0xC0DC2070, USB_MSR_BASE + 4);  // incl. prefetch
    1250. 

  1250. +	udelay(1000);
    1251. 

  1251. +#endif
    1252. 

  1252. +#endif
    1253. 

  1253. +#endif /* CONFIG_USB_EHCI_HCD */
    1254. 

  1254. +#endif /* CONFIG_SOC_AU1200 */
    1255. 

  1255. +
    1256. 

  1256.  #if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
    1257. 

  1257.  #ifdef CONFIG_USB_OHCI
    1258. 

  1258.  	if ((argptr = strstr(argptr, "usb_ohci=")) == NULL) {
    1259. 

  1259. @@ -187,19 +221,38 @@ void __init au1x00_setup(void)
    1260. 

  1260.  #endif
    1261. 

  1261.  
    1262. 

  1262.  #ifdef CONFIG_USB_OHCI
    1263. 

  1263. -	// enable host controller and wait for reset done
    1264. 

  1264. +#if defined(CONFIG_SOC_AU1200)
    1265. 

  1265. +#ifndef CONFIG_USB_EHCI_HCD
    1266. 

  1266. +#ifdef CONFIG_USB_AMD5536UDC
    1267. 

  1267. +	/* enable OHC + UDC clocks, memory and bus mastering */
    1268. 

  1268. +/*	au_writel( 0x00DD2073, USB_MSR_BASE + 4); */
    1269. 

  1269. +	au_writel( 0xC0DD2073, USB_MSR_BASE + 4);  // incl. prefetch
    1270. 

  1270. +#else
    1271. 

  1271. +	/* enable OHC clocks, memory and bus mastering */
    1272. 

  1272. +	au_writel( 0x00D12003, USB_MSR_BASE + 4);
    1273. 

  1273. +#endif
    1274. 

  1274. +	udelay(1000);
    1275. 

  1275. +printk("DEBUG: Reading Au1200 USB2 reg 0x%x\n", au_readl(USB_MSR_BASE + 4));
    1276. 

  1276. +#endif
    1277. 

  1277. +#else
    1278. 

  1278. +	/* Au1000, Au1500, Au1100, Au1550 */
    1279. 

  1279. +	/* enable host controller and wait for reset done */
    1280. 

  1280.  	au_writel(0x08, USB_HOST_CONFIG);
    1281. 

  1281.  	udelay(1000);
    1282. 

  1282.  	au_writel(0x0E, USB_HOST_CONFIG);
    1283. 

  1283.  	udelay(1000);
    1284. 

  1284. -	au_readl(USB_HOST_CONFIG); // throw away first read
    1285. 

  1285. +	au_readl(USB_HOST_CONFIG); /* throw away first read */
    1286. 

  1286.  	while (!(au_readl(USB_HOST_CONFIG) & 0x10))
    1287. 

  1287.  		au_readl(USB_HOST_CONFIG);
    1288. 

  1288. +#endif /* CONFIG_SOC_AU1200 */
    1289. 

  1289.  #endif
    1290. 

  1290. -#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
    1291. 

  1291. +#else
    1292. 

  1292. +
    1293. 

  1293. +#endif /* defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE) */
    1294. 

  1294. +
    1295. 

  1295.  
    1296. 

  1296.  #ifdef CONFIG_FB
    1297. 

  1297. -	// Needed if PCI video card in use
    1298. 

  1298. +	/* Needed if PCI video card in use */
    1299. 

  1299.  	conswitchp = &dummy_con;
    1300. 

  1300.  #endif
    1301. 

  1301.  
    1302. 

  1302. @@ -209,8 +262,7 @@ void __init au1x00_setup(void)
    1303. 

  1303.  #endif
    1304. 

  1304.  
    1305. 

  1305.  #ifdef CONFIG_BLK_DEV_IDE
    1306. 

  1306. -	/* Board setup takes precedence for unique devices.
    1307. 

  1307. -	*/
    1308. 

  1308. +	/* Board setup takes precedence for unique devices.  */
    1309. 

  1309.  	if ((ide_ops == NULL) || (ide_ops == &no_ide_ops))
    1310. 

  1310.  		ide_ops = &std_ide_ops;
    1311. 

  1311.  #endif
    1312. 

  1312. --- a/arch/mips/au1000/common/sleeper.S
    1313. 

  1313. +++ b/arch/mips/au1000/common/sleeper.S
    1314. 

  1314. @@ -15,17 +15,48 @@
    1315. 

  1315.  #include <asm/addrspace.h>
    1316. 

  1316.  #include <asm/regdef.h>
    1317. 

  1317.  #include <asm/stackframe.h>
    1318. 

  1318. +#include <asm/au1000.h>
    1319. 

  1319. +
    1320. 

  1320. +/*
    1321. 

  1321. + * Note: This file is *not* conditional on CONFIG_PM since Alchemy sleep 
    1322. 

  1322. + * need not be tied to any particular power management scheme.
    1323. 

  1323. + */
    1324. 

  1324. +
    1325. 

  1325. +	.extern ___flush_cache_all
    1326. 

  1326.  
    1327. 

  1327.  	.text
    1328. 

  1328. -	.set	macro
    1329. 

  1329. -	.set	noat
    1330. 

  1330.  	.align	5
    1331. 

  1331.  
    1332. 

  1332. -/* Save all of the processor general registers and go to sleep.
    1333. 

  1333. - * A wakeup condition will get us back here to restore the registers.
    1334. 

  1334. +/*
    1335. 

  1335. + * Save the processor general registers and go to sleep. A wakeup
    1336. 

  1336. + * condition will get us back here to restore the registers.
    1337. 

  1337.   */
    1338. 

  1338. -LEAF(save_and_sleep)
    1339. 

  1339.  
    1340. 

  1340. +/* still need to fix alignment issues here */
    1341. 

  1341. +save_and_sleep_frmsz = 48
    1342. 

  1342. +NESTED(save_and_sleep, save_and_sleep_frmsz, ra)
    1343. 

  1343. +	.set noreorder
    1344. 

  1344. +	.set nomacro
    1345. 

  1345. +	.set noat
    1346. 

  1346. +	subu sp, save_and_sleep_frmsz
    1347. 

  1347. +	sw ra, save_and_sleep_frmsz-4(sp)
    1348. 

  1348. +	sw s0, save_and_sleep_frmsz-8(sp)
    1349. 

  1349. +	sw s1, save_and_sleep_frmsz-12(sp)
    1350. 

  1350. +	sw s2, save_and_sleep_frmsz-16(sp)
    1351. 

  1351. +	sw s3, save_and_sleep_frmsz-20(sp)
    1352. 

  1352. +	sw s4, save_and_sleep_frmsz-24(sp)
    1353. 

  1353. +	sw s5, save_and_sleep_frmsz-28(sp)
    1354. 

  1354. +	sw s6, save_and_sleep_frmsz-32(sp)
    1355. 

  1355. +	sw s7, save_and_sleep_frmsz-36(sp)
    1356. 

  1356. +	sw s8, save_and_sleep_frmsz-40(sp)
    1357. 

  1357. +	sw gp, save_and_sleep_frmsz-44(sp)
    1358. 

  1358. +
    1359. 

  1359. +	/* We only need to save the registers that the calling function 
    1360. 

  1360. +	 * hasn't saved for us.  0 is always zero.  8 - 15, 24 and 25 are 
    1361. 

  1361. +	 * temporaries and can be used without saving. 26 and 27 are reserved 
    1362. 

  1362. +	 * for interrupt/trap handling and expected to change.  29 is the 
    1363. 

  1363. +	 * stack pointer which is handled as a special case here.
    1364. 

  1364. +	 */
    1365. 

  1365.  	subu	sp, PT_SIZE
    1366. 

  1366.  	sw	$1, PT_R1(sp)
    1367. 

  1367.  	sw	$2, PT_R2(sp)
    1368. 

  1368. @@ -34,14 +65,6 @@ LEAF(save_and_sleep)
    1369. 

  1369.  	sw	$5, PT_R5(sp)
    1370. 

  1370.  	sw	$6, PT_R6(sp)
    1371. 

  1371.  	sw	$7, PT_R7(sp)
    1372. 

  1372. -	sw	$8, PT_R8(sp)
    1373. 

  1373. -	sw	$9, PT_R9(sp)
    1374. 

  1374. -	sw	$10, PT_R10(sp)
    1375. 

  1375. -	sw	$11, PT_R11(sp)
    1376. 

  1376. -	sw	$12, PT_R12(sp)
    1377. 

  1377. -	sw	$13, PT_R13(sp)
    1378. 

  1378. -	sw	$14, PT_R14(sp)
    1379. 

  1379. -	sw	$15, PT_R15(sp)
    1380. 

  1380.  	sw	$16, PT_R16(sp)
    1381. 

  1381.  	sw	$17, PT_R17(sp)
    1382. 

  1382.  	sw	$18, PT_R18(sp)
    1383. 

  1383. @@ -50,32 +73,47 @@ LEAF(save_and_sleep)
    1384. 

  1384.  	sw	$21, PT_R21(sp)
    1385. 

  1385.  	sw	$22, PT_R22(sp)
    1386. 

  1386.  	sw	$23, PT_R23(sp)
    1387. 

  1387. -	sw	$24, PT_R24(sp)
    1388. 

  1388. -	sw	$25, PT_R25(sp)
    1389. 

  1389. -	sw	$26, PT_R26(sp)
    1390. 

  1390. -	sw	$27, PT_R27(sp)
    1391. 

  1391.  	sw	$28, PT_R28(sp)
    1392. 

  1392. -	sw	$29, PT_R29(sp)
    1393. 

  1393.  	sw	$30, PT_R30(sp)
    1394. 

  1394.  	sw	$31, PT_R31(sp)
    1395. 

  1395. +#define PT_C0STATUS PT_LO
    1396. 

  1396. +#define PT_CONTEXT PT_HI
    1397. 

  1397. +#define PT_PAGEMASK PT_EPC
    1398. 

  1398. +#define PT_CONFIG PT_BVADDR
    1399. 

  1399.  	mfc0	k0, CP0_STATUS
    1400. 

  1400. -	sw	k0, 0x20(sp)
    1401. 

  1401. +	sw	k0, PT_C0STATUS(sp) // 0x20
    1402. 

  1402.  	mfc0	k0, CP0_CONTEXT
    1403. 

  1403. -	sw	k0, 0x1c(sp)
    1404. 

  1404. +	sw	k0, PT_CONTEXT(sp) // 0x1c
    1405. 

  1405.  	mfc0	k0, CP0_PAGEMASK
    1406. 

  1406. -	sw	k0, 0x18(sp)
    1407. 

  1407. +	sw	k0, PT_PAGEMASK(sp) // 0x18
    1408. 

  1408.  	mfc0	k0, CP0_CONFIG
    1409. 

  1409. -	sw	k0, 0x14(sp)
    1410. 

  1410. +	sw	k0, PT_CONFIG(sp) // 0x14
    1411. 

  1411. +
    1412. 

  1412. +	.set macro
    1413. 

  1413. +	.set at
    1414. 

  1414. +
    1415. 

  1415. +	li t0, SYS_SLPPWR
    1416. 

  1416. +	sw	zero, 0(t0)	/* Get the processor ready to sleep */
    1417. 

  1417. +	sync
    1418. 

  1418.  
    1419. 

  1419.  	/* Now set up the scratch registers so the boot rom will
    1420. 

  1420.  	 * return to this point upon wakeup.
    1421. 

  1421. +	 * sys_scratch0 : SP
    1422. 

  1422. +	 * sys_scratch1 : RA
    1423. 

  1423. +	 */
    1424. 

  1424. +	li	t0, SYS_SCRATCH0
    1425. 

  1425. +	li	t1, SYS_SCRATCH1
    1426. 

  1426. +	sw	sp, 0(t0)
    1427. 

  1427. +	la	k0, resume_from_sleep
    1428. 

  1428. +	sw	k0, 0(t1)
    1429. 

  1429. +
    1430. 

  1430. +/*
    1431. 

  1431. + * Flush DCACHE to make sure context is in memory
    1432. 

  1432.  	 */
    1433. 

  1433. -	la	k0, 1f
    1434. 

  1434. -	lui	k1, 0xb190
    1435. 

  1435. -	ori	k1, 0x18
    1436. 

  1436. -	sw	sp, 0(k1)
    1437. 

  1437. -	ori 	k1, 0x1c
    1438. 

  1438. -	sw	k0, 0(k1)
    1439. 

  1439. +	la 	t1,___flush_cache_all   /* _flush_cache_all is a function pointer */
    1440. 

  1440. +	lw 	t0,0(t1)
    1441. 

  1441. +	jal t0
    1442. 

  1442. +	nop
    1443. 

  1443.  
    1444. 

  1444.  /* Put SDRAM into self refresh.  Preload instructions into cache,
    1445. 

  1445.   * issue a precharge, then auto refresh, then sleep commands to it.
    1446. 

  1446. @@ -88,30 +126,65 @@ LEAF(save_and_sleep)
    1447. 

  1447.   	cache	0x14, 96(t0)
    1448. 

  1448.  	.set	mips0
    1449. 

  1449.  
    1450. 

  1450. +	/* Put SDRAM to sleep */
    1451. 

  1451.  sdsleep:
    1452. 

  1452. -	lui 	k0, 0xb400
    1453. 

  1453. -	sw	zero, 0x001c(k0)	/* Precharge */
    1454. 

  1454. -	sw	zero, 0x0020(k0)	/* Auto refresh */
    1455. 

  1455. -	sw	zero, 0x0030(k0)	/* SDRAM sleep */
    1456. 

  1456. +	li 	a0, MEM_PHYS_ADDR
    1457. 

  1457. +	or 	a0, a0, 0xA0000000
    1458. 

  1458. +#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100) || defined(CONFIG_SOC_AU1500)
    1459. 

  1459. +	lw 	k0, MEM_SDMODE0(a0)
    1460. 

  1460. +	sw	zero, MEM_SDPRECMD(a0) 	/* Precharge */
    1461. 

  1461. +	sw	zero, MEM_SDAUTOREF(a0)	/* Auto Refresh */
    1462. 

  1462. +	sw	zero, MEM_SDSLEEP(a0)  	/* Sleep */
    1463. 

  1463.  	sync
    1464. 

  1464. -
    1465. 

  1465. -	lui 	k1, 0xb190
    1466. 

  1466. -	sw	zero, 0x0078(k1)	/* get ready  to sleep */
    1467. 

  1467. +#endif
    1468. 

  1468. +#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
    1469. 

  1469. +	sw	zero, MEM_SDPRECMD(a0) 	/* Precharge */
    1470. 

  1470. +	sw 	zero, MEM_SDSREF(a0)
    1471. 

  1471. +	
    1472. 

  1472. +	#lw 	t0, MEM_SDSTAT(a0)
    1473. 

  1473. +	#and t0, t0, 0x01000000
    1474. 

  1474. +	li 	t0, 0x01000000
    1475. 

  1475. +refresh_not_set:
    1476. 

  1476. +	lw 	t1, MEM_SDSTAT(a0)
    1477. 

  1477. +	and	t2, t1, t0
    1478. 

  1478. +	beq	zero, t2, refresh_not_set
    1479. 

  1479. +	nop
    1480. 

  1480. +
    1481. 

  1481. +	li	t0, ~0x30000000
    1482. 

  1482. +	lw 	t1, MEM_SDCONFIGA(a0)
    1483. 

  1483. +	and t1, t0, t1
    1484. 

  1484. +	sw 	t1, MEM_SDCONFIGA(a0)
    1485. 

  1485.  	sync
    1486. 

  1486. -	sw	zero, 0x007c(k1)	/* Put processor to sleep */
    1487. 

  1487. +#endif
    1488. 

  1488. +
    1489. 

  1489. +	li	t0, SYS_SLEEP
    1490. 

  1490. +	sw	zero, 0(t0)	/* Put processor to sleep */
    1491. 

  1491.  	sync
    1492. 

  1492. +	nop
    1493. 

  1493. +	nop
    1494. 

  1494. +	nop
    1495. 

  1495. +	nop
    1496. 

  1496. +	nop
    1497. 

  1497. +	nop
    1498. 

  1498. +	nop
    1499. 

  1499. +	nop
    1500. 

  1500. +
    1501. 

  1501.  
    1502. 

  1502.  	/* This is where we return upon wakeup.
    1503. 

  1503.  	 * Reload all of the registers and return.
    1504. 

  1504.  	 */
    1505. 

  1505. -1:	nop
    1506. 

  1506. -	lw	k0, 0x20(sp)
    1507. 

  1507. +resume_from_sleep:
    1508. 

  1508. +	nop
    1509. 

  1509. +	.set nomacro
    1510. 

  1510. +	.set noat
    1511. 

  1511. +
    1512. 

  1512. +	lw	k0, PT_C0STATUS(sp) // 0x20
    1513. 

  1513.  	mtc0	k0, CP0_STATUS
    1514. 

  1514. -	lw	k0, 0x1c(sp)
    1515. 

  1515. +	lw	k0, PT_CONTEXT(sp) // 0x1c
    1516. 

  1516.  	mtc0	k0, CP0_CONTEXT
    1517. 

  1517. -	lw	k0, 0x18(sp)
    1518. 

  1518. +	lw	k0, PT_PAGEMASK(sp) // 0x18
    1519. 

  1519.  	mtc0	k0, CP0_PAGEMASK
    1520. 

  1520. -	lw	k0, 0x14(sp)
    1521. 

  1521. +	lw	k0, PT_CONFIG(sp) // 0x14
    1522. 

  1522.  	mtc0	k0, CP0_CONFIG
    1523. 

  1523.  	lw	$1, PT_R1(sp)
    1524. 

  1524.  	lw	$2, PT_R2(sp)
    1525. 

  1525. @@ -120,14 +193,6 @@ sdsleep:
    1526. 

  1526.  	lw	$5, PT_R5(sp)
    1527. 

  1527.  	lw	$6, PT_R6(sp)
    1528. 

  1528.  	lw	$7, PT_R7(sp)
    1529. 

  1529. -	lw	$8, PT_R8(sp)
    1530. 

  1530. -	lw	$9, PT_R9(sp)
    1531. 

  1531. -	lw	$10, PT_R10(sp)
    1532. 

  1532. -	lw	$11, PT_R11(sp)
    1533. 

  1533. -	lw	$12, PT_R12(sp)
    1534. 

  1534. -	lw	$13, PT_R13(sp)
    1535. 

  1535. -	lw	$14, PT_R14(sp)
    1536. 

  1536. -	lw	$15, PT_R15(sp)
    1537. 

  1537.  	lw	$16, PT_R16(sp)
    1538. 

  1538.  	lw	$17, PT_R17(sp)
    1539. 

  1539.  	lw	$18, PT_R18(sp)
    1540. 

  1540. @@ -136,15 +201,36 @@ sdsleep:
    1541. 

  1541.  	lw	$21, PT_R21(sp)
    1542. 

  1542.  	lw	$22, PT_R22(sp)
    1543. 

  1543.  	lw	$23, PT_R23(sp)
    1544. 

  1544. -	lw	$24, PT_R24(sp)
    1545. 

  1545. -	lw	$25, PT_R25(sp)
    1546. 

  1546. -	lw	$26, PT_R26(sp)
    1547. 

  1547. -	lw	$27, PT_R27(sp)
    1548. 

  1548.  	lw	$28, PT_R28(sp)
    1549. 

  1549. -	lw	$29, PT_R29(sp)
    1550. 

  1550.  	lw	$30, PT_R30(sp)
    1551. 

  1551.  	lw	$31, PT_R31(sp)
    1552. 

  1552. +
    1553. 

  1553. +	.set macro
    1554. 

  1554. +	.set at
    1555. 

  1555. +
    1556. 

  1556. +	/* clear the wake source, but save it as the return value of the function */
    1557. 

  1557. +	li	t0, SYS_WAKESRC
    1558. 

  1558. +	lw v0, 0(t0)
    1559. 

  1559. +	sw v0, PT_R2(sp)
    1560. 

  1560. +	sw zero, 0(t0)
    1561. 

  1561. +
    1562. 

  1562.  	addiu	sp, PT_SIZE
    1563. 

  1563.  
    1564. 

  1564. +	lw gp, save_and_sleep_frmsz-44(sp)
    1565. 

  1565. +	lw s8, save_and_sleep_frmsz-40(sp)
    1566. 

  1566. +	lw s7, save_and_sleep_frmsz-36(sp)
    1567. 

  1567. +	lw s6, save_and_sleep_frmsz-32(sp)
    1568. 

  1568. +	lw s5, save_and_sleep_frmsz-28(sp)
    1569. 

  1569. +	lw s4, save_and_sleep_frmsz-24(sp)
    1570. 

  1570. +	lw s3, save_and_sleep_frmsz-20(sp)
    1571. 

  1571. +	lw s2, save_and_sleep_frmsz-16(sp)
    1572. 

  1572. +	lw s1, save_and_sleep_frmsz-12(sp)
    1573. 

  1573. +	lw s0, save_and_sleep_frmsz-8(sp)
    1574. 

  1574. +	lw ra, save_and_sleep_frmsz-4(sp)
    1575. 

  1575. +
    1576. 

  1576. +	addu sp, save_and_sleep_frmsz
    1577. 

  1577.  	jr	ra
    1578. 

  1578. +	nop
    1579. 

  1579. +	.set reorder
    1580. 

  1580.  END(save_and_sleep)
    1581. 

  1581. +
    1582. 

  1582. --- a/arch/mips/au1000/common/time.c
    1583. 

  1583. +++ b/arch/mips/au1000/common/time.c
    1584. 

  1584. @@ -50,7 +50,6 @@
    1585. 

  1585.  #include <linux/mc146818rtc.h>
    1586. 

  1586.  #include <linux/timex.h>
    1587. 

  1587.  
    1588. 

  1588. -extern void startup_match20_interrupt(void);
    1589. 

  1589.  extern void do_softirq(void);
    1590. 

  1590.  extern volatile unsigned long wall_jiffies;
    1591. 

  1591.  unsigned long missed_heart_beats = 0;
    1592. 

  1592. @@ -59,14 +58,14 @@ static unsigned long r4k_offset; /* Amou
    1593. 

  1593.  static unsigned long r4k_cur;    /* What counter should be at next timer irq */
    1594. 

  1594.  extern rwlock_t xtime_lock;
    1595. 

  1595.  int	no_au1xxx_32khz;
    1596. 

  1596. -void	(*au1k_wait_ptr)(void);
    1597. 

  1597. +extern int allow_au1k_wait; 	/* default off for CP0 Counter */
    1598. 

  1598.  
    1599. 

  1599.  /* Cycle counter value at the previous timer interrupt.. */
    1600. 

  1600.  static unsigned int timerhi = 0, timerlo = 0;
    1601. 

  1601.  
    1602. 

  1602.  #ifdef CONFIG_PM
    1603. 

  1603.  #define MATCH20_INC 328
    1604. 

  1604. -extern void startup_match20_interrupt(void);
    1605. 

  1605. +extern void startup_match20_interrupt(void (*handler)(int, void *, struct pt_regs *));
    1606. 

  1606.  static unsigned long last_pc0, last_match20;
    1607. 

  1607.  #endif
    1608. 

  1608.  
    1609. 

  1609. @@ -385,7 +384,6 @@ void __init au1xxx_timer_setup(void)
    1610. 

  1610.  {
    1611. 

  1611.          unsigned int est_freq;
    1612. 

  1612.  	extern unsigned long (*do_gettimeoffset)(void);
    1613. 

  1613. -	extern void au1k_wait(void);
    1614. 

  1614.  
    1615. 

  1615.  	printk("calculating r4koff... ");
    1616. 

  1616.  	r4k_offset = cal_r4koff();
    1617. 

  1617. @@ -437,9 +435,6 @@ void __init au1xxx_timer_setup(void)
    1618. 

  1618.  		au_writel(0, SYS_TOYWRITE);
    1619. 

  1619.  		while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S);
    1620. 

  1620.  
    1621. 

  1621. -		au_writel(au_readl(SYS_WAKEMSK) | (1<<8), SYS_WAKEMSK);
    1622. 

  1622. -		au_writel(~0, SYS_WAKESRC);
    1623. 

  1623. -		au_sync();
    1624. 

  1624.  		while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
    1625. 

  1625.  
    1626. 

  1626.  		/* setup match20 to interrupt once every 10ms */
    1627. 

  1627. @@ -447,13 +442,13 @@ void __init au1xxx_timer_setup(void)
    1628. 

  1628.  		au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2);
    1629. 

  1629.  		au_sync();
    1630. 

  1630.  		while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
    1631. 

  1631. -		startup_match20_interrupt();
    1632. 

  1632. +		startup_match20_interrupt(counter0_irq);
    1633. 

  1633.  
    1634. 

  1634.  		do_gettimeoffset = do_fast_pm_gettimeoffset;
    1635. 

  1635.  
    1636. 

  1636.  		/* We can use the real 'wait' instruction.
    1637. 

  1637.  		*/
    1638. 

  1638. -		au1k_wait_ptr = au1k_wait;
    1639. 

  1639. +		allow_au1k_wait = 1;
    1640. 

  1640.  	}
    1641. 

  1641.  
    1642. 

  1642.  #else
    1643. 

  1643. --- a/arch/mips/au1000/db1x00/board_setup.c
    1644. 

  1644. +++ b/arch/mips/au1000/db1x00/board_setup.c
    1645. 

  1645. @@ -46,10 +46,22 @@
    1646. 

  1646.  #include <asm/au1000.h>
    1647. 

  1647.  #include <asm/db1x00.h>
    1648. 

  1648.  
    1649. 

  1649. -extern struct rtc_ops no_rtc_ops;
    1650. 

  1650. +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX) && defined(CONFIG_MIPS_DB1550)
    1651. 

  1651. +#include <asm/au1xxx_dbdma.h>
    1652. 

  1652. +extern struct ide_ops *ide_ops;
    1653. 

  1653. +extern struct ide_ops au1xxx_ide_ops;
    1654. 

  1654. +extern u32 au1xxx_ide_virtbase;
    1655. 

  1655. +extern u64 au1xxx_ide_physbase;
    1656. 

  1656. +extern int au1xxx_ide_irq;
    1657. 

  1657. +
    1658. 

  1658. +/* Ddma */
    1659. 

  1659. +chan_tab_t *ide_read_ch, *ide_write_ch;
    1660. 

  1660. +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
    1661. 

  1661. +
    1662. 

  1662. +dbdev_tab_t new_dbdev_tab_element = { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 };
    1663. 

  1663. +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
    1664. 

  1664.  
    1665. 

  1665. -/* not correct for db1550 */
    1666. 

  1666. -static BCSR * const bcsr = (BCSR *)0xAE000000;
    1667. 

  1667. +extern struct rtc_ops no_rtc_ops;
    1668. 

  1668.  
    1669. 

  1669.  void board_reset (void)
    1670. 

  1670.  {
    1671. 

  1671. @@ -57,6 +69,13 @@ void board_reset (void)
    1672. 

  1672.  	au_writel(0x00000000, 0xAE00001C);
    1673. 

  1673.  }
    1674. 

  1674.  
    1675. 

  1675. +void board_power_off (void)
    1676. 

  1676. +{
    1677. 

  1677. +#ifdef CONFIG_MIPS_MIRAGE
    1678. 

  1678. +	au_writel((1 << 26) | (1 << 10), GPIO2_OUTPUT);
    1679. 

  1679. +#endif
    1680. 

  1680. +}
    1681. 

  1681. +
    1682. 

  1682.  void __init board_setup(void)
    1683. 

  1683.  {
    1684. 

  1684.  	u32 pin_func;
    1685. 

  1685. @@ -108,8 +127,42 @@ void __init board_setup(void)
    1686. 

  1686.  	au_writel(0x02000200, GPIO2_OUTPUT);
    1687. 

  1687.  #endif
    1688. 

  1688.  
    1689. 

  1689. +#if defined(CONFIG_AU1XXX_SMC91111)
    1690. 

  1690. +#define CPLD_CONTROL (0xAF00000C)
    1691. 

  1691. +	{
    1692. 

  1692. +	extern uint32_t au1xxx_smc91111_base;
    1693. 

  1693. +	extern unsigned int au1xxx_smc91111_irq;
    1694. 

  1694. +	extern int au1xxx_smc91111_nowait;
    1695. 

  1695. +
    1696. 

  1696. +	au1xxx_smc91111_base = 0xAC000300;
    1697. 

  1697. +	au1xxx_smc91111_irq = AU1000_GPIO_8;
    1698. 

  1698. +	au1xxx_smc91111_nowait = 1;
    1699. 

  1699. +
    1700. 

  1700. +	/* set up the Static Bus timing - only 396Mhz */
    1701. 

  1701. +	bcsr->resets |= 0x7;
    1702. 

  1702. +	au_writel(0x00010003, MEM_STCFG0);
    1703. 

  1703. +	au_writel(0x000c00c0, MEM_STCFG2);
    1704. 

  1704. +	au_writel(0x85E1900D, MEM_STTIME2);
    1705. 

  1705. +	}
    1706. 

  1706. +#endif /* end CONFIG_SMC91111 */
    1707. 

  1707.  	au_sync();
    1708. 

  1708.  
    1709. 

  1709. +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX) && defined(CONFIG_MIPS_DB1550)
    1710. 

  1710. +	/*
    1711. 

  1711. +	 * Iniz IDE parameters
    1712. 

  1712. +	 */
    1713. 

  1713. +	ide_ops = &au1xxx_ide_ops;
    1714. 

  1714. +	au1xxx_ide_irq = DAUGHTER_CARD_IRQ;
    1715. 

  1715. +	au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
    1716. 

  1716. +	au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
    1717. 

  1717. +
    1718. 

  1718. +	/*
    1719. 

  1719. +	 * change PIO or PIO+Ddma
    1720. 

  1720. +	 * check the GPIO-6 pin condition. db1550:s6_dot
    1721. 

  1721. +	 */
    1722. 

  1722. +	switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 6)) ? 1 : 0;
    1723. 

  1723. +#endif
    1724. 

  1724. +
    1725. 

  1725.  #ifdef CONFIG_MIPS_DB1000
    1726. 

  1726.      printk("AMD Alchemy Au1000/Db1000 Board\n");
    1727. 

  1727.  #endif
    1728. 

  1728. --- a/arch/mips/au1000/db1x00/irqmap.c
    1729. 

  1729. +++ b/arch/mips/au1000/db1x00/irqmap.c
    1730. 

  1730. @@ -53,6 +53,7 @@ au1xxx_irq_map_t au1xxx_irq_map[] = {
    1731. 

  1731.  #ifdef CONFIG_MIPS_DB1550
    1732. 

  1732.  	{ AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 IRQ#
    1733. 

  1733.  	{ AU1000_GPIO_5, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 1 IRQ#
    1734. 

  1734. +	{ AU1000_GPIO_8, INTC_INT_LOW_LEVEL, 0 }, // Daughtercard IRQ#
    1735. 

  1735.  #else
    1736. 

  1736.  	{ AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 Fully_Interted#
    1737. 

  1737.  	{ AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 STSCHG#
    1738. 

  1738. --- a/arch/mips/au1000/db1x00/Makefile
    1739. 

  1739. +++ b/arch/mips/au1000/db1x00/Makefile
    1740. 

  1740. @@ -17,4 +17,11 @@ O_TARGET := db1x00.o
    1741. 

  1741.  obj-y := init.o board_setup.o irqmap.o
    1742. 

  1742.  obj-$(CONFIG_WM97XX_COMODULE) += mirage_ts.o
    1743. 

  1743.  
    1744. 

  1744. +ifdef CONFIG_MIPS_DB1100
    1745. 

  1745. +ifdef CONFIG_MMC
    1746. 

  1746. +obj-y += mmc_support.o
    1747. 

  1747. +export-objs += mmc_support.o
    1748. 

  1748. +endif
    1749. 

  1749. +endif
    1750. 

  1750. +
    1751. 

  1751.  include $(TOPDIR)/Rules.make
    1752. 

  1752. --- /dev/null
    1753. 

  1753. +++ b/arch/mips/au1000/db1x00/mmc_support.c
    1754. 

  1754. @@ -0,0 +1,126 @@
    1755. 

  1755. +/*
    1756. 

  1756. + * BRIEF MODULE DESCRIPTION
    1757. 

  1757. + *
    1758. 

  1758. + *	MMC support routines for DB1100.
    1759. 

  1759. + *
    1760. 

  1760. + *
    1761. 

  1761. + * Copyright (c) 2003-2004 Embedded Edge, LLC.
    1762. 

  1762. + * Author: Embedded Edge, LLC.
    1763. 

  1763. + * Contact: dan@embeddededge.com
    1764. 

  1764. + *
    1765. 

  1765. + *  This program is free software; you can redistribute  it and/or modify it
    1766. 

  1766. + *  under  the terms of  the GNU General  Public License as published by the
    1767. 

  1767. + *  Free Software Foundation;  either version 2 of the  License, or (at your
    1768. 

  1768. + *  option) any later version.
    1769. 

  1769. + *
    1770. 

  1770. + *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
    1771. 

  1771. + *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
    1772. 

  1772. + *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
    1773. 

  1773. + *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
    1774. 

  1774. + *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
    1775. 

  1775. + *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
    1776. 

  1776. + *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
    1777. 

  1777. + *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
    1778. 

  1778. + *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
    1779. 

  1779. + *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    1780. 

  1780. + *
    1781. 

  1781. + *  You should have received a copy of the  GNU General Public License along
    1782. 

  1782. + *  with this program; if not, write  to the Free Software Foundation, Inc.,
    1783. 

  1783. + *  675 Mass Ave, Cambridge, MA 02139, USA.
    1784. 

  1784. + *
    1785. 

  1785. + */
    1786. 

  1786. +
    1787. 

  1787. +
    1788. 

  1788. +#include <linux/config.h>
    1789. 

  1789. +#include <linux/kernel.h>
    1790. 

  1790. +#include <linux/module.h>
    1791. 

  1791. +#include <linux/init.h>
    1792. 

  1792. +
    1793. 

  1793. +#include <asm/irq.h>
    1794. 

  1794. +#include <asm/au1000.h>
    1795. 

  1795. +#include <asm/au1100_mmc.h>
    1796. 

  1796. +#include <asm/db1x00.h>
    1797. 

  1797. +
    1798. 

  1798. +
    1799. 

  1799. +/* SD/MMC controller support functions */
    1800. 

  1800. +
    1801. 

  1801. +/*
    1802. 

  1802. + * Detect card.
    1803. 

  1803. + */
    1804. 

  1804. +void mmc_card_inserted(int _n_, int *_res_)
    1805. 

  1805. +{
    1806. 

  1806. +	u32 gpios = au_readl(SYS_PINSTATERD);
    1807. 

  1807. +	u32 emptybit = (_n_) ? (1<<20) : (1<<19);
    1808. 

  1808. +	*_res_ = ((gpios & emptybit) == 0);
    1809. 

  1809. +}
    1810. 

  1810. +
    1811. 

  1811. +/*
    1812. 

  1812. + * Check card write protection.
    1813. 

  1813. + */
    1814. 

  1814. +void mmc_card_writable(int _n_, int *_res_)
    1815. 

  1815. +{
    1816. 

  1816. +	BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
    1817. 

  1817. +	unsigned long mmc_wp, board_specific;
    1818. 

  1818. +
    1819. 

  1819. +	if (_n_) {
    1820. 

  1820. +		mmc_wp = BCSR_BOARD_SD1_WP;
    1821. 

  1821. +	} else {
    1822. 

  1822. +		mmc_wp = BCSR_BOARD_SD0_WP;
    1823. 

  1823. +	}
    1824. 

  1824. +
    1825. 

  1825. +	board_specific = au_readl((unsigned long)(&bcsr->specific));
    1826. 

  1826. +
    1827. 

  1827. +	if (!(board_specific & mmc_wp)) {/* low means card writable */
    1828. 

  1828. +		*_res_ = 1;
    1829. 

  1829. +	} else {
    1830. 

  1830. +		*_res_ = 0;
    1831. 

  1831. +	}
    1832. 

  1832. +}
    1833. 

  1833. +
    1834. 

  1834. +/*
    1835. 

  1835. + * Apply power to card slot.
    1836. 

  1836. + */
    1837. 

  1837. +void mmc_power_on(int _n_)
    1838. 

  1838. +{
    1839. 

  1839. +	BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
    1840. 

  1840. +	unsigned long mmc_pwr, board_specific;
    1841. 

  1841. +
    1842. 

  1842. +	if (_n_) {
    1843. 

  1843. +		mmc_pwr = BCSR_BOARD_SD1_PWR;
    1844. 

  1844. +	} else {
    1845. 

  1845. +		mmc_pwr = BCSR_BOARD_SD0_PWR;
    1846. 

  1846. +	}
    1847. 

  1847. +
    1848. 

  1848. +	board_specific = au_readl((unsigned long)(&bcsr->specific));
    1849. 

  1849. +	board_specific |= mmc_pwr;
    1850. 

  1850. +
    1851. 

  1851. +	au_writel(board_specific, (int)(&bcsr->specific));
    1852. 

  1852. +	au_sync_delay(1);
    1853. 

  1853. +}
    1854. 

  1854. +
    1855. 

  1855. +/*
    1856. 

  1856. + * Remove power from card slot.
    1857. 

  1857. + */
    1858. 

  1858. +void mmc_power_off(int _n_)
    1859. 

  1859. +{
    1860. 

  1860. +	BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
    1861. 

  1861. +	unsigned long mmc_pwr, board_specific;
    1862. 

  1862. +
    1863. 

  1863. +	if (_n_) {
    1864. 

  1864. +		mmc_pwr = BCSR_BOARD_SD1_PWR;
    1865. 

  1865. +	} else {
    1866. 

  1866. +		mmc_pwr = BCSR_BOARD_SD0_PWR;
    1867. 

  1867. +	}
    1868. 

  1868. +
    1869. 

  1869. +	board_specific = au_readl((unsigned long)(&bcsr->specific));
    1870. 

  1870. +	board_specific &= ~mmc_pwr;
    1871. 

  1871. +
    1872. 

  1872. +	au_writel(board_specific, (int)(&bcsr->specific));
    1873. 

  1873. +	au_sync_delay(1);
    1874. 

  1874. +}
    1875. 

  1875. +
    1876. 

  1876. +EXPORT_SYMBOL(mmc_card_inserted);
    1877. 

  1877. +EXPORT_SYMBOL(mmc_card_writable);
    1878. 

  1878. +EXPORT_SYMBOL(mmc_power_on);
    1879. 

  1879. +EXPORT_SYMBOL(mmc_power_off);
    1880. 

  1880. +
    1881. 

  1881. --- /dev/null
    1882. 

  1882. +++ b/arch/mips/au1000/ficmmp/au1200_ibutton.c
    1883. 

  1883. @@ -0,0 +1,270 @@
    1884. 

  1884. +/* ---------------------------------------------------------------------- 
    1885. 

  1885. + *  mtwilson_keys.c
    1886. 

  1886. + *
    1887. 

  1887. + *  Copyright (C) 2003 Intrinsyc Software Inc.
    1888. 

  1888. + *
    1889. 

  1889. + *  Intel Personal Media Player buttons
    1890. 

  1890. + *
    1891. 

  1891. + *  This program is free software; you can redistribute it and/or modify
    1892. 

  1892. + *  it under the terms of the GNU General Public License version 2 as
    1893. 

  1893. + *  published by the Free Software Foundation.
    1894. 

  1894. + *
    1895. 

  1895. + *  May 02, 2003 : Initial version [FB]
    1896. 

  1896. + *
    1897. 

  1897. + ------------------------------------------------------------------------*/
    1898. 

  1898. +
    1899. 

  1899. +#include <linux/config.h>
    1900. 

  1900. +#include <linux/module.h>
    1901. 

  1901. +#include <linux/kernel.h>
    1902. 

  1902. +#include <linux/init.h>
    1903. 

  1903. +#include <linux/fs.h>
    1904. 

  1904. +#include <linux/sched.h>
    1905. 

  1905. +#include <linux/miscdevice.h>
    1906. 

  1906. +#include <linux/errno.h>
    1907. 

  1907. +#include <linux/poll.h>
    1908. 

  1908. +#include <linux/delay.h>
    1909. 

  1909. +#include <linux/input.h>
    1910. 

  1910. +
    1911. 

  1911. +#include <asm/au1000.h>
    1912. 

  1912. +#include <asm/uaccess.h>
    1913. 

  1913. +#include <asm/au1xxx_gpio.h>
    1914. 

  1914. +#include <asm/irq.h>
    1915. 

  1915. +#include <asm/keyboard.h>
    1916. 

  1916. +#include <linux/time.h>
    1917. 

  1917. +
    1918. 

  1918. +#define DRIVER_VERSION	"V1.0"
    1919. 

  1919. +#define DRIVER_AUTHOR	"FIC"
    1920. 

  1920. +#define DRIVER_DESC		"FIC Travis Media Player Button Driver"
    1921. 

  1921. +#define DRIVER_NAME		"Au1200Button"
    1922. 

  1922. +
    1923. 

  1923. +#define BUTTON_MAIN		(1<<1)
    1924. 

  1924. +#define BUTTON_SELECT	(1<<6)
    1925. 

  1925. +#define BUTTON_GUIDE	(1<<12)
    1926. 

  1926. +#define BUTTON_DOWN		(1<<17)
    1927. 

  1927. +#define BUTTON_LEFT		(1<<19)
    1928. 

  1928. +#define BUTTON_RIGHT	(1<<26)
    1929. 

  1929. +#define BUTTON_UP		(1<<28)
    1930. 

  1930. +
    1931. 

  1931. +#define BUTTON_MASK (\
    1932. 

  1932. +    BUTTON_MAIN   \
    1933. 

  1933. +    | BUTTON_SELECT	\
    1934. 

  1934. +    | BUTTON_GUIDE	\
    1935. 

  1935. +    | BUTTON_DOWN	\
    1936. 

  1936. +    | BUTTON_LEFT	\
    1937. 

  1937. +    | BUTTON_RIGHT	\
    1938. 

  1938. +    | BUTTON_UP		\
    1939. 

  1939. +    )
    1940. 

  1940. +
    1941. 

  1941. +#define BUTTON_INVERT (\
    1942. 

  1942. +    BUTTON_MAIN   \
    1943. 

  1943. +    | 0				\
    1944. 

  1944. +    | BUTTON_GUIDE	\
    1945. 

  1945. +    | 0				\
    1946. 

  1946. +    | 0				\
    1947. 

  1947. +    | 0				\
    1948. 

  1948. +    | 0				\
    1949. 

  1949. +    )
    1950. 

  1950. +
    1951. 

  1951. +char button_map[32]={0,KEY_S,0,0,0,0,KEY_ENTER,0,0,0,0,0,KEY_G,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
    1952. 

  1952. +//char button_map[32]={0,0,0,0,0,0,KEY_ENTER,0,0,0,0,0,KEY_G,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
    1953. 

  1953. +
    1954. 

  1954. +//char button_map[32]={0,KEY_TAB,0,0,0,0,KEY_M,0,0,0,0,0,KEY_S,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
    1955. 

  1955. +//char button_map[32]={0,0,0,0,0,0,KEY_M,0,0,0,0,0,KEY_S,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
    1956. 

  1956. +
    1957. 

  1957. +#define BUTTON_COUNT (sizeof (button_map) / sizeof (button_map[0]))
    1958. 

  1958. +
    1959. 

  1959. +struct input_dev dev;
    1960. 

  1960. +struct timeval cur_tv;
    1961. 

  1961. +
    1962. 

  1962. +static unsigned int old_tv_usec = 0;
    1963. 

  1963. +
    1964. 

  1964. +static unsigned int read_button_state(void)
    1965. 

  1965. +{
    1966. 

  1966. +	unsigned int state;
    1967. 

  1967. +
    1968. 

  1968. +	state = au_readl(SYS_PINSTATERD) & BUTTON_MASK; /* get gpio status */
    1969. 

  1969. +
    1970. 

  1970. +	state ^= BUTTON_INVERT;		/* invert main & guide button */
    1971. 

  1971. +
    1972. 

  1972. +	/* printk("au1200_ibutton.c: button state [0x%X]\r\n",state); */
    1973. 

  1973. +	return state;
    1974. 

  1974. +}
    1975. 

  1975. +
    1976. 

  1976. +//This function returns 0 if the allowed microseconds have elapsed since the last call to ths function, otherwise it returns 1 to indicate a bounce condition
    1977. 

  1977. +static unsigned int bounce() 
    1978. 

  1978. +{
    1979. 

  1979. +
    1980. 

  1980. +	unsigned int elapsed_time;
    1981. 

  1981. +
    1982. 

  1982. +	do_gettimeofday (&cur_tv);    
    1983. 

  1983. +
    1984. 

  1984. +	if (!old_tv_usec) {
    1985. 

  1985. +		old_tv_usec = cur_tv.tv_usec;
    1986. 

  1986. +		return 0;
    1987. 

  1987. +	}
    1988. 

  1988. +
    1989. 

  1989. +	if(cur_tv.tv_usec > old_tv_usec) {
    1990. 

  1990. +		/* If there hasn't been rollover */
    1991. 

  1991. +		elapsed_time =  ((cur_tv.tv_usec - old_tv_usec));
    1992. 

  1992. +	}
    1993. 

  1993. +	else {
    1994. 

  1994. +		/* Accounting for rollover */
    1995. 

  1995. +		elapsed_time =  ((1000000 - old_tv_usec + cur_tv.tv_usec));
    1996. 

  1996. +	}
    1997. 

  1997. +
    1998. 

  1998. +	if (elapsed_time > 250000) {
    1999. 

  1999. +		old_tv_usec = 0;	/* reset the bounce time */
    2000. 

  2000. +		return 0;
    2001. 

  2001. +	}
    2002. 

  2002. +
    2003. 

  2003. +	return 1;
    2004. 

  2004. +}
    2005. 

  2005. +
    2006. 

  2006. +/* button interrupt handler */
    2007. 

  2007. +static void button_interrupt(int irq, void *dev, struct pt_regs *regs)
    2008. 

  2008. +{
    2009. 

  2009. +
    2010. 

  2010. +	unsigned int i,bit_mask, key_choice;
    2011. 

  2011. +	u32 button_state;
    2012. 

  2012. +	
    2013. 

  2013. +	/* Report state to upper level */
    2014. 

  2014. +	
    2015. 

  2015. +	button_state = read_button_state() & BUTTON_MASK; /* get new gpio status */
    2016. 

  2016. +
    2017. 

  2017. +	/* Return if this is a repeated (bouncing) event */
    2018. 

  2018. +	if(bounce())
    2019. 

  2019. +		return;
    2020. 

  2020. +
    2021. 

  2021. +	/* we want to make keystrokes */
    2022. 

  2022. +	for( i=0; i< BUTTON_COUNT; i++) {
    2023. 

  2023. +		bit_mask = 1<<i;
    2024. 

  2024. +		if (button_state & bit_mask) {
    2025. 

  2025. +			key_choice = button_map[i];
    2026. 

  2026. +			/* toggle key down */
    2027. 

  2027. +			input_report_key(dev, key_choice, 1);
    2028. 

  2028. +			/* toggle key up */
    2029. 

  2029. +			input_report_key(dev, key_choice, 0);
    2030. 

  2030. +			printk("ibutton gpio %d stat %x scan code %d\r\n", 
    2031. 

  2031. +					i, button_state, key_choice);
    2032. 

  2032. +			/* Only report the first key event; it doesn't make 
    2033. 

  2033. +			 * sense for two keys to be pressed at the same time, 
    2034. 

  2034. +			 * and causes problems with the directional keys 
    2035. 

  2035. +			 * return;	
    2036. 

  2036. +			 */
    2037. 

  2037. +		}
    2038. 

  2038. +	}
    2039. 

  2039. +}
    2040. 

  2040. +
    2041. 

  2041. +static int 
    2042. 

  2042. +button_translate(unsigned char scancode, unsigned char *keycode, char raw_mode) 
    2043. 

  2043. +{
    2044. 

  2044. +	static int prev_scancode;
    2045. 

  2045. +	
    2046. 

  2046. +	printk( "ibutton.c: translate: scancode=%x raw_mode=%x\n", 
    2047. 

  2047. +			scancode, raw_mode);
    2048. 

  2048. +
    2049. 

  2049. +	if (scancode == 0xe0 || scancode == 0xe1) {
    2050. 

  2050. +		prev_scancode = scancode;
    2051. 

  2051. +		return 0;
    2052. 

  2052. +	}
    2053. 

  2053. +
    2054. 

  2054. +	if (scancode == 0x00 || scancode == 0xff) {
    2055. 

  2055. +		prev_scancode = 0;
    2056. 

  2056. +		return 0;
    2057. 

  2057. +	}
    2058. 

  2058. +
    2059. 

  2059. +	*keycode = scancode;
    2060. 

  2060. +
    2061. 

  2061. +	return 1;
    2062. 

  2062. +}
    2063. 

  2063. +
    2064. 

  2064. +/* init button hardware */
    2065. 

  2065. +static int button_hw_init(void)
    2066. 

  2066. +{
    2067. 

  2067. +	unsigned int	ipinfunc=0;	
    2068. 

  2068. +
    2069. 

  2069. +	printk("au1200_ibutton.c: Initializing buttons hardware\n");
    2070. 

  2070. +
    2071. 

  2071. +	// initialize GPIO pin function assignments	
    2072. 

  2072. +
    2073. 

  2073. +	ipinfunc = au_readl(SYS_PINFUNC);
    2074. 

  2074. +
    2075. 

  2075. +	ipinfunc &= ~(SYS_PINFUNC_DMA | SYS_PINFUNC_S0A | SYS_PINFUNC_S0B);	
    2076. 

  2076. +	au_writel( ipinfunc ,SYS_PINFUNC);
    2077. 

  2077. +	
    2078. 

  2078. +	ipinfunc |=  (SYS_PINFUNC_S0C);
    2079. 

  2079. +	au_writel( ipinfunc ,SYS_PINFUNC);
    2080. 

  2080. +	
    2081. 

  2081. +	return 0;
    2082. 

  2082. +}
    2083. 

  2083. +
    2084. 

  2084. +/* button driver init */
    2085. 

  2085. +static int __init button_init(void)
    2086. 

  2086. +{
    2087. 

  2087. +	int ret, i;
    2088. 

  2088. +	unsigned int flag=0;
    2089. 

  2089. +
    2090. 

  2090. +	printk("au1200_ibutton.c: button_init()\r\n");
    2091. 

  2091. +	
    2092. 

  2092. +	button_hw_init();
    2093. 

  2093. +	
    2094. 

  2094. +	/* register all button irq handler */
    2095. 

  2095. +	
    2096. 

  2096. +	for(i=0; i< sizeof(button_map)/sizeof(button_map[0]); i++)
    2097. 

  2097. +	{
    2098. 

  2098. +		/* register irq <-- gpio 1 ,6 ,12 , 17 ,19 , 26 ,28 */
    2099. 

  2099. +		if(button_map[i] != 0)	
    2100. 

  2100. +		{
    2101. 

  2101. +			ret = request_irq(AU1000_GPIO_0 + i , 
    2102. 

  2102. +					&button_interrupt , SA_INTERRUPT , 
    2103. 

  2103. +					DRIVER_NAME , &dev);
    2104. 

  2104. +			if(ret) flag |= 1<<i;
    2105. 

  2105. +		}
    2106. 

  2106. +	}
    2107. 

  2107. +
    2108. 

  2108. +	printk("au1200_ibutton.c: request_irq,ret:0x%x\r\n",ret);
    2109. 

  2109. +	
    2110. 

  2110. +	if (ret) {
    2111. 

  2111. +		printk("au1200_ibutton.c: request_irq:%X failed\r\n",flag);
    2112. 

  2112. +		return ret;
    2113. 

  2113. +	}
    2114. 

  2114. +		
    2115. 

  2115. +	dev.name = DRIVER_NAME;
    2116. 

  2116. +	dev.evbit[0] = BIT(EV_KEY) | BIT(EV_REP);
    2117. 

  2117. +
    2118. 

  2118. +	for (i=0;i<sizeof(button_map)/sizeof(button_map[0]);i++)
    2119. 

  2119. +	{
    2120. 

  2120. +		dev.keybit[LONG(button_map[i])] |= BIT(button_map[i]);
    2121. 

  2121. +	}
    2122. 

  2122. +	
    2123. 

  2123. +	input_register_device(&dev);
    2124. 

  2124. +
    2125. 

  2125. +	/* ready to receive interrupts */
    2126. 

  2126. +
    2127. 

  2127. +	return 0;
    2128. 

  2128. +}
    2129. 

  2129. +
    2130. 

  2130. +/* button driver exit */
    2131. 

  2131. +static void __exit button_exit(void)
    2132. 

  2132. +{
    2133. 

  2133. +	int i;
    2134. 

  2134. +	
    2135. 

  2135. +	for(i=0;i<sizeof(button_map)/sizeof(button_map[0]);i++)
    2136. 

  2136. +	{
    2137. 

  2137. +		if(button_map[i] != 0)
    2138. 

  2138. +		{
    2139. 

  2139. +			free_irq( AU1000_GPIO_0 + i, &dev);
    2140. 

  2140. +		}
    2141. 

  2141. +	}
    2142. 

  2142. +	
    2143. 

  2143. +	input_unregister_device(&dev);
    2144. 

  2144. +	
    2145. 

  2145. +	printk("au1200_ibutton.c: button_exit()\r\n");
    2146. 

  2146. +}
    2147. 

  2147. +
    2148. 

  2148. +module_init(button_init);
    2149. 

  2149. +module_exit(button_exit);
    2150. 

  2150. +
    2151. 

  2151. +MODULE_AUTHOR( DRIVER_AUTHOR );
    2152. 

  2152. +MODULE_DESCRIPTION( DRIVER_DESC );
    2153. 

  2153. +MODULE_LICENSE("GPL");
    2154. 

  2154. --- /dev/null
    2155. 

  2155. +++ b/arch/mips/au1000/ficmmp/au1xxx_dock.c
    2156. 

  2156. @@ -0,0 +1,261 @@
    2157. 

  2157. +/*
    2158. 

  2158. + *  Copyright (C) 2003 Metrowerks, All Rights Reserved.
    2159. 

  2159. + *
    2160. 

  2160. + * This program is free software; you can redistribute it and/or modify
    2161. 

  2161. + * it under the terms of the GNU General Public License version 2 as
    2162. 

  2162. + * published by the Free Software Foundation.
    2163. 

  2163. + */
    2164. 

  2164. +
    2165. 

  2165. +#include <linux/config.h>
    2166. 

  2166. +#include <linux/module.h>
    2167. 

  2167. +#include <linux/init.h>
    2168. 

  2168. +#include <linux/fs.h>
    2169. 

  2169. +#include <linux/sched.h>
    2170. 

  2170. +#include <linux/miscdevice.h>
    2171. 

  2171. +#include <linux/errno.h>
    2172. 

  2172. +#include <linux/poll.h>
    2173. 

  2173. +#include <asm/au1000.h>
    2174. 

  2174. +#include <asm/uaccess.h>
    2175. 

  2175. +#include <asm/au1xxx_gpio.h>
    2176. 

  2176. +
    2177. 

  2177. +
    2178. 

  2178. +#if defined(CONFIG_MIPS_FICMMP)
    2179. 

  2179. +	#define DOCK_GPIO	215
    2180. 

  2180. +#else
    2181. 

  2181. +	#error Unsupported Au1xxx Platform
    2182. 

  2182. +#endif
    2183. 

  2183. +
    2184. 

  2184. +#define MAKE_FLAG 0x20
    2185. 

  2185. +
    2186. 

  2186. +#undef DEBUG
    2187. 

  2187. +
    2188. 

  2188. +#define DEBUG 0
    2189. 

  2189. +//#define DEBUG 1
    2190. 

  2190. +
    2191. 

  2191. +#if DEBUG
    2192. 

  2192. +#define DPRINTK(format, args...) printk(__FUNCTION__ ": "  format, ## args)
    2193. 

  2193. +#else
    2194. 

  2194. +#define DPRINTK(format, args...) do { } while (0)
    2195. 

  2195. +#endif
    2196. 

  2196. +
    2197. 

  2197. +/* Please note that this driver is based on a timer and is not interrupt
    2198. 

  2198. + * driven.  If you are going to make use of this driver, you will need to have
    2199. 

  2199. + * your application open the dock listing from the /dev directory first.
    2200. 

  2200. + */
    2201. 

  2201. +
    2202. 

  2202. +struct au1xxx_dock {
    2203. 

  2203. +	struct fasync_struct *fasync;
    2204. 

  2204. +	wait_queue_head_t     read_wait;
    2205. 

  2205. +	int open_count;
    2206. 

  2206. +	unsigned int debounce;
    2207. 

  2207. +	unsigned int current;
    2208. 

  2208. +	unsigned int last;
    2209. 

  2209. +};
    2210. 

  2210. +
    2211. 

  2211. +static struct au1xxx_dock dock_info;
    2212. 

  2212. +
    2213. 

  2213. +
    2214. 

  2214. +static void dock_timer_periodic(void *data);
    2215. 

  2215. +
    2216. 

  2216. +static struct tq_struct dock_task = {
    2217. 

  2217. +	routine:	dock_timer_periodic,
    2218. 

  2218. +	data:		NULL
    2219. 

  2219. +};
    2220. 

  2220. +
    2221. 

  2221. +static int cleanup_flag = 0;
    2222. 

  2222. +static DECLARE_WAIT_QUEUE_HEAD(cleanup_wait_queue);
    2223. 

  2223. +
    2224. 

  2224. +
    2225. 

  2225. +static unsigned int read_dock_state(void)
    2226. 

  2226. +{
    2227. 

  2227. +	u32 state;
    2228. 

  2228. +
    2229. 

  2229. +	state = au1xxx_gpio_read(DOCK_GPIO);
    2230. 

  2230. +	
    2231. 

  2231. +	/* printk( "Current Dock State: %d\n", state ); */
    2232. 

  2232. +
    2233. 

  2233. +	return state;
    2234. 

  2234. +}
    2235. 

  2235. +
    2236. 

  2236. +
    2237. 

  2237. +static void dock_timer_periodic(void *data)
    2238. 

  2238. +{
    2239. 

  2239. +	struct au1xxx_dock *dock = (struct au1xxx_dock *)data;
    2240. 

  2240. +	unsigned long dock_state;
    2241. 

  2241. +	
    2242. 

  2242. +	/* If cleanup wants us to die */
    2243. 

  2243. +	if (cleanup_flag) {
    2244. 

  2244. +		/* now cleanup_module can return */
    2245. 

  2245. +		wake_up(&cleanup_wait_queue); 
    2246. 

  2246. +	} else {
    2247. 

  2247. +		/* put ourselves back in the task queue */
    2248. 

  2248. +		queue_task(&dock_task, &tq_timer);	
    2249. 

  2249. +	}
    2250. 

  2250. +
    2251. 

  2251. +	/* read current dock */
    2252. 

  2252. +	dock_state = read_dock_state();
    2253. 

  2253. +
    2254. 

  2254. +	/* if dock states hasn't changed */
    2255. 

  2255. +	/* save time and be done. */
    2256. 

  2256. +	if (dock_state == dock->current) {
    2257. 

  2257. +		return;
    2258. 

  2258. +	}
    2259. 

  2259. +	
    2260. 

  2260. +	if (dock_state == dock->debounce) {
    2261. 

  2261. +		dock->current = dock_state;
    2262. 

  2262. +	} else {
    2263. 

  2263. +		dock->debounce = dock_state;
    2264. 

  2264. +	}
    2265. 

  2265. +	if (dock->current != dock->last) {
    2266. 

  2266. +		if (waitqueue_active(&dock->read_wait)) {
    2267. 

  2267. +		    wake_up_interruptible(&dock->read_wait);
    2268. 

  2268. +		}
    2269. 

  2269. +	}
    2270. 

  2270. +}
    2271. 

  2271. +
    2272. 

  2272. +
    2273. 

  2273. +static ssize_t au1xxx_dock_read(struct file *filp, char *buffer, size_t count, loff_t *ppos)
    2274. 

  2274. +{
    2275. 

  2275. +	struct au1xxx_dock *dock = filp->private_data;
    2276. 

  2276. +	char event[3];
    2277. 

  2277. +	int last;
    2278. 

  2278. +	int cur;
    2279. 

  2279. +	int err;
    2280. 

  2280. +	
    2281. 

  2281. +try_again:
    2282. 

  2282. +
    2283. 

  2283. +	while (dock->current == dock->last) {
    2284. 

  2284. +		if (filp->f_flags & O_NONBLOCK) {
    2285. 

  2285. +			return -EAGAIN;
    2286. 

  2286. +		}
    2287. 

  2287. +		interruptible_sleep_on(&dock->read_wait);
    2288. 

  2288. +		if (signal_pending(current)) {
    2289. 

  2289. +			return -ERESTARTSYS;
    2290. 

  2290. +		}
    2291. 

  2291. +	}
    2292. 

  2292. +	
    2293. 

  2293. +	cur  = dock->current;
    2294. 

  2294. +	last = dock->last;
    2295. 

  2295. +
    2296. 

  2296. +	if(cur != last)
    2297. 

  2297. +	{
    2298. 

  2298. +		event[0] = cur ? 'D' : 'U';
    2299. 

  2299. +		event[1] = '\r';
    2300. 

  2300. +		event[2] = '\n';
    2301. 

  2301. +	}
    2302. 

  2302. +	else
    2303. 

  2303. +		goto try_again;
    2304. 

  2304. +	
    2305. 

  2305. +	dock->last = cur;
    2306. 

  2306. +	err = copy_to_user(buffer, &event, 3);
    2307. 

  2307. +	if (err) {
    2308. 

  2308. +		return err;
    2309. 

  2309. +	}
    2310. 

  2310. +	
    2311. 

  2311. +	return 3;
    2312. 

  2312. +}
    2313. 

  2313. +
    2314. 

  2314. +
    2315. 

  2315. +static int au1xxx_dock_open(struct inode *inode, struct file *filp)
    2316. 

  2316. +{
    2317. 

  2317. +	struct au1xxx_dock *dock = &dock_info;
    2318. 

  2318. +
    2319. 

  2319. +	MOD_INC_USE_COUNT;
    2320. 

  2320. +
    2321. 

  2321. +	filp->private_data = dock;
    2322. 

  2322. +
    2323. 

  2323. +	if (dock->open_count++ == 0) {
    2324. 

  2324. +		dock_task.data = dock;
    2325. 

  2325. +		cleanup_flag = 0;
    2326. 

  2326. +		queue_task(&dock_task, &tq_timer);
    2327. 

  2327. +	}
    2328. 

  2328. +
    2329. 

  2329. +	return 0;
    2330. 

  2330. +}
    2331. 

  2331. +
    2332. 

  2332. +
    2333. 

  2333. +static unsigned int au1xxx_dock_poll(struct file *filp, poll_table *wait)
    2334. 

  2334. +{
    2335. 

  2335. +	struct au1xxx_dock *dock = filp->private_data;
    2336. 

  2336. +	int ret = 0;
    2337. 

  2337. +
    2338. 

  2338. +	DPRINTK("start\n");
    2339. 

  2339. +	poll_wait(filp, &dock->read_wait, wait);
    2340. 

  2340. +	if (dock->current != dock->last) {
    2341. 

  2341. +		ret = POLLIN | POLLRDNORM;
    2342. 

  2342. +	}
    2343. 

  2343. +	return ret;
    2344. 

  2344. +}
    2345. 

  2345. +
    2346. 

  2346. +
    2347. 

  2347. +static int au1xxx_dock_release(struct inode *inode, struct file *filp)
    2348. 

  2348. +{
    2349. 

  2349. +	struct au1xxx_dock *dock = filp->private_data;
    2350. 

  2350. +
    2351. 

  2351. +	DPRINTK("start\n");
    2352. 

  2352. +
    2353. 

  2353. +	if (--dock->open_count == 0) {
    2354. 

  2354. +		cleanup_flag = 1;
    2355. 

  2355. +		sleep_on(&cleanup_wait_queue);
    2356. 

  2356. +	}
    2357. 

  2357. +	MOD_DEC_USE_COUNT;
    2358. 

  2358. +	
    2359. 

  2359. +	return 0;
    2360. 

  2360. +}
    2361. 

  2361. +
    2362. 

  2362. +
    2363. 

  2363. +
    2364. 

  2364. +static struct file_operations au1xxx_dock_fops = {
    2365. 

  2365. +	owner:		THIS_MODULE,
    2366. 

  2366. +	read:		au1xxx_dock_read,
    2367. 

  2367. +	poll:		au1xxx_dock_poll,
    2368. 

  2368. +	open:		au1xxx_dock_open,
    2369. 

  2369. +	release:	au1xxx_dock_release,
    2370. 

  2370. +};
    2371. 

  2371. +
    2372. 

  2372. +/*
    2373. 

  2373. + * The au1xxx dock is a misc device:
    2374. 

  2374. + * Major 10 char
    2375. 

  2375. + * Minor 22        /dev/dock
    2376. 

  2376. + * 
    2377. 

  2377. + * This is /dev/misc/dock if devfs is used.
    2378. 

  2378. + */
    2379. 

  2379. +
    2380. 

  2380. +static struct miscdevice au1xxx_dock_dev = {
    2381. 

  2381. +	minor:	23,
    2382. 

  2382. +	name:	"dock",
    2383. 

  2383. +	fops:	&au1xxx_dock_fops,
    2384. 

  2384. +};
    2385. 

  2385. +
    2386. 

  2386. +static int __init au1xxx_dock_init(void)
    2387. 

  2387. +{
    2388. 

  2388. +	struct au1xxx_dock *dock = &dock_info;
    2389. 

  2389. +	int ret;
    2390. 

  2390. +
    2391. 

  2391. +	DPRINTK("Initializing dock driver\n");
    2392. 

  2392. +	dock->open_count = 0;
    2393. 

  2393. +	cleanup_flag        = 0;
    2394. 

  2394. +	init_waitqueue_head(&dock->read_wait);
    2395. 

  2395. +
    2396. 

  2396. +
    2397. 

  2397. +	/* yamon configures GPIO pins for the dock
    2398. 

  2398. +	 * no initialization needed
    2399. 

  2399. +	 */
    2400. 

  2400. +
    2401. 

  2401. +	ret = misc_register(&au1xxx_dock_dev);
    2402. 

  2402. +
    2403. 

  2403. +	DPRINTK("dock driver fully initialized.\n");
    2404. 

  2404. +
    2405. 

  2405. +	return ret;
    2406. 

  2406. +}
    2407. 

  2407. +
    2408. 

  2408. +
    2409. 

  2409. +static void __exit au1xxx_dock_exit(void)
    2410. 

  2410. +{
    2411. 

  2411. +	DPRINTK("unloading dock driver\n");
    2412. 

  2412. +	misc_deregister(&au1xxx_dock_dev);
    2413. 

  2413. +}
    2414. 

  2414. +
    2415. 

  2415. +
    2416. 

  2416. +module_init(au1xxx_dock_init);
    2417. 

  2417. +module_exit(au1xxx_dock_exit);
    2418. 

  2418. --- /dev/null
    2419. 

  2419. +++ b/arch/mips/au1000/ficmmp/board_setup.c
    2420. 

  2420. @@ -0,0 +1,226 @@
    2421. 

  2421. +/*
    2422. 

  2422. + *
    2423. 

  2423. + * BRIEF MODULE DESCRIPTION
    2424. 

  2424. + *	Alchemy Pb1200 board setup.
    2425. 

  2425. + *
    2426. 

  2426. + *  This program is free software; you can redistribute  it and/or modify it
    2427. 

  2427. + *  under  the terms of  the GNU General  Public License as published by the
    2428. 

  2428. + *  Free Software Foundation;  either version 2 of the  License, or (at your
    2429. 

  2429. + *  option) any later version.
    2430. 

  2430. + *
    2431. 

  2431. + *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
    2432. 

  2432. + *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
    2433. 

  2433. + *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
    2434. 

  2434. + *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
    2435. 

  2435. + *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
    2436. 

  2436. + *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
    2437. 

  2437. + *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
    2438. 

  2438. + *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
    2439. 

  2439. + *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
    2440. 

  2440. + *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    2441. 

  2441. + *
    2442. 

  2442. + *  You should have received a copy of the  GNU General Public License along
    2443. 

  2443. + *  with this program; if not, write  to the Free Software Foundation, Inc.,
    2444. 

  2444. + *  675 Mass Ave, Cambridge, MA 02139, USA.
    2445. 

  2445. + */
    2446. 

  2446. +#include <linux/config.h>
    2447. 

  2447. +#include <linux/init.h>
    2448. 

  2448. +#include <linux/sched.h>
    2449. 

  2449. +#include <linux/ioport.h>
    2450. 

  2450. +#include <linux/mm.h>
    2451. 

  2451. +#include <linux/console.h>
    2452. 

  2452. +#include <linux/mc146818rtc.h>
    2453. 

  2453. +#include <linux/delay.h>
    2454. 

  2454. +#include <linux/ide.h>
    2455. 

  2455. +
    2456. 

  2456. +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
    2457. 

  2457. +#include <linux/ide.h>
    2458. 

  2458. +#endif
    2459. 

  2459. +
    2460. 

  2460. +#include <asm/cpu.h>
    2461. 

  2461. +#include <asm/bootinfo.h>
    2462. 

  2462. +#include <asm/irq.h>
    2463. 

  2463. +#include <asm/keyboard.h>
    2464. 

  2464. +#include <asm/mipsregs.h>
    2465. 

  2465. +#include <asm/reboot.h>
    2466. 

  2466. +#include <asm/pgtable.h>
    2467. 

  2467. +#include <asm/au1000.h>
    2468. 

  2468. +#include <asm/ficmmp.h>
    2469. 

  2469. +#include <asm/au1xxx_dbdma.h>
    2470. 

  2470. +#include <asm/au1xxx_gpio.h>
    2471. 

  2471. +
    2472. 

  2472. +extern struct rtc_ops no_rtc_ops;
    2473. 

  2473. +
    2474. 

  2474. +/* value currently in the board configuration register */
    2475. 

  2475. +u16 ficmmp_config = 0;
    2476. 

  2476. +
    2477. 

  2477. +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
    2478. 

  2478. +extern struct ide_ops *ide_ops;
    2479. 

  2479. +extern struct ide_ops au1xxx_ide_ops;
    2480. 

  2480. +extern u32 au1xxx_ide_virtbase;
    2481. 

  2481. +extern u64 au1xxx_ide_physbase;
    2482. 

  2482. +extern int au1xxx_ide_irq;
    2483. 

  2483. +
    2484. 

  2484. +u32 led_base_addr;
    2485. 

  2485. +/* Ddma */
    2486. 

  2486. +chan_tab_t *ide_read_ch, *ide_write_ch;
    2487. 

  2487. +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
    2488. 

  2488. +
    2489. 

  2489. +dbdev_tab_t new_dbdev_tab_element = { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 };
    2490. 

  2490. +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
    2491. 

  2491. +
    2492. 

  2492. +void board_reset (void)
    2493. 

  2493. +{
    2494. 

  2494. +	au_writel(0, 0xAD80001C);
    2495. 

  2495. +}
    2496. 

  2496. +
    2497. 

  2497. +void board_power_off (void)
    2498. 

  2498. +{
    2499. 

  2499. +}
    2500. 

  2500. +
    2501. 

  2501. +void __init board_setup(void)
    2502. 

  2502. +{
    2503. 

  2503. +	char *argptr = NULL;
    2504. 

  2504. +	u32 pin_func;
    2505. 

  2505. +	rtc_ops = &no_rtc_ops;
    2506. 

  2506. +
    2507. 

  2507. +	ficmmp_config_init();	//Initialize FIC control register
    2508. 

  2508. +	
    2509. 

  2509. +#if 0
    2510. 

  2510. +	/* Enable PSC1 SYNC for AC97.  Normaly done in audio driver,
    2511. 

  2511. +	 * but it is board specific code, so put it here.
    2512. 

  2512. +	 */
    2513. 

  2513. +	pin_func = au_readl(SYS_PINFUNC);
    2514. 

  2514. +	au_sync();
    2515. 

  2515. +	pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
    2516. 

  2516. +	au_writel(pin_func, SYS_PINFUNC);
    2517. 

  2517. +
    2518. 

  2518. +	au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
    2519. 

  2519. +	au_sync();
    2520. 

  2520. +#endif
    2521. 

  2521. +
    2522. 

  2522. +#if defined( CONFIG_I2C_ALGO_AU1550 )
    2523. 

  2523. +	{
    2524. 

  2524. +	u32 freq0, clksrc;
    2525. 

  2525. +
    2526. 

  2526. +	/* Select SMBUS in CPLD */
    2527. 

  2527. +	/* bcsr->resets &= ~(BCSR_RESETS_PCS0MUX); */
    2528. 

  2528. +
    2529. 

  2529. +	pin_func = au_readl(SYS_PINFUNC);
    2530. 

  2530. +	au_sync();
    2531. 

  2531. +	pin_func &= ~(3<<17 | 1<<4);
    2532. 

  2532. +	/* Set GPIOs correctly */
    2533. 

  2533. +	pin_func |= 2<<17;
    2534. 

  2534. +	au_writel(pin_func, SYS_PINFUNC);
    2535. 

  2535. +	au_sync();
    2536. 

  2536. +
    2537. 

  2537. +	/* The i2c driver depends on 50Mhz clock */
    2538. 

  2538. +	freq0 = au_readl(SYS_FREQCTRL0);
    2539. 

  2539. +	au_sync();
    2540. 

  2540. +	freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
    2541. 

  2541. +	freq0 |= (3<<SYS_FC_FRDIV1_BIT);
    2542. 

  2542. +	/* 396Mhz / (3+1)*2 == 49.5Mhz */
    2543. 

  2543. +	au_writel(freq0, SYS_FREQCTRL0);
    2544. 

  2544. +	au_sync();
    2545. 

  2545. +	freq0 |= SYS_FC_FE1;
    2546. 

  2546. +	au_writel(freq0, SYS_FREQCTRL0);
    2547. 

  2547. +	au_sync();
    2548. 

  2548. +
    2549. 

  2549. +	clksrc = au_readl(SYS_CLKSRC);
    2550. 

  2550. +	au_sync();
    2551. 

  2551. +	clksrc &= ~0x01f00000;
    2552. 

  2552. +	/* bit 22 is EXTCLK0 for PSC0 */
    2553. 

  2553. +	clksrc |= (0x3 << 22);
    2554. 

  2554. +	au_writel(clksrc, SYS_CLKSRC);
    2555. 

  2555. +	au_sync();
    2556. 

  2556. +	}
    2557. 

  2557. +#endif
    2558. 

  2558. +
    2559. 

  2559. +#ifdef CONFIG_FB_AU1200
    2560. 

  2560. +	argptr = prom_getcmdline();
    2561. 

  2561. +	strcat(argptr, " video=au1200fb:");
    2562. 

  2562. +#endif
    2563. 

  2563. +
    2564. 

  2564. +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
    2565. 

  2565. +	/*
    2566. 

  2566. +	 * Iniz IDE parameters
    2567. 

  2567. +	 */
    2568. 

  2568. +	ide_ops = &au1xxx_ide_ops;
    2569. 

  2569. +	au1xxx_ide_irq = FICMMP_IDE_INT;
    2570. 

  2570. +	au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
    2571. 

  2571. +	au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
    2572. 

  2572. +	switch4ddma = 0;
    2573. 

  2573. +	/*
    2574. 

  2574. +	ide_ops = &au1xxx_ide_ops;
    2575. 

  2575. +	au1xxx_ide_irq = FICMMP_IDE_INT;
    2576. 

  2576. +	au1xxx_ide_base = KSEG1ADDR(AU1XXX_ATA_BASE);
    2577. 

  2577. +	*/
    2578. 

  2578. +	au1xxx_gpio_write(9, 1);
    2579. 

  2579. +	printk("B4001010: %X\n", *((u32*)0xB4001010));
    2580. 

  2580. +	printk("B4001014: %X\n", *((u32*)0xB4001014));
    2581. 

  2581. +	printk("B4001018: %X\n", *((u32*)0xB4001018));
    2582. 

  2582. +	printk("B1900100: %X\n", *((u32*)0xB1900100));
    2583. 

  2583. +	
    2584. 

  2584. +#if 0
    2585. 

  2585. +	ficmmp_config_clear(FICMMP_CONFIG_IDERST);
    2586. 

  2586. +	mdelay(100);
    2587. 

  2587. +	ficmmp_config_set(FICMMP_CONFIG_IDERST);
    2588. 

  2588. +	mdelay(100);
    2589. 

  2589. +#endif
    2590. 

  2590. +	/*
    2591. 

  2591. +	 * change PIO or PIO+Ddma
    2592. 

  2592. +	 * check the GPIO-5 pin condition. pb1200:s18_dot
    2593. 

  2593. +	 */
    2594. 

  2594. +/*	switch4ddma = 0; //(au_readl(SYS_PINSTATERD) & (1 << 5)) ? 1 : 0; */
    2595. 

  2595. +#endif
    2596. 

  2596. +
    2597. 

  2597. +	/* The Pb1200 development board uses external MUX for PSC0 to
    2598. 

  2598. +	support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
    2599. 

  2599. +	*/
    2600. 

  2600. +#if defined(CONFIG_AU1550_PSC_SPI) && defined(CONFIG_I2C_ALGO_AU1550)
    2601. 

  2601. +	#error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\
    2602. 

  2602. +			Refer to Pb1200 documentation.
    2603. 

  2603. +#elif defined( CONFIG_AU1550_PSC_SPI )
    2604. 

  2604. +	//bcsr->resets |= BCSR_RESETS_PCS0MUX;
    2605. 

  2605. +#elif defined( CONFIG_I2C_ALGO_AU1550 )
    2606. 

  2606. +	//bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
    2607. 

  2607. +#endif
    2608. 

  2608. +	au_sync();
    2609. 

  2609. +
    2610. 

  2610. +	printk("FIC Multimedia Player Board\n");
    2611. 

  2611. +	au1xxx_gpio_tristate(5);
    2612. 

  2612. +	printk("B1900100: %X\n", *((volatile u32*)0xB1900100));
    2613. 

  2613. +	printk("B190002C: %X\n", *((volatile u32*)0xB190002C));
    2614. 

  2614. +}
    2615. 

  2615. +
    2616. 

  2616. +int
    2617. 

  2617. +board_au1200fb_panel (void)
    2618. 

  2618. +{
    2619. 

  2619. +	au1xxx_gpio_tristate(6);
    2620. 

  2620. +
    2621. 

  2621. +	if (au1xxx_gpio_read(12) == 0)
    2622. 

  2622. +		return 9; /* FS453_640x480 (Composite/S-Video) */
    2623. 

  2623. +	else
    2624. 

  2624. +		return 7; /* Sharp 320x240 TFT */
    2625. 

  2625. +}
    2626. 

  2626. +
    2627. 

  2627. +int
    2628. 

  2628. +board_au1200fb_panel_init (void)
    2629. 

  2629. +{
    2630. 

  2630. +	/*Enable data buffers*/
    2631. 

  2631. +	ficmmp_config_clear(FICMMP_CONFIG_LCMDATAOUT);
    2632. 

  2632. +	/*Take LCD out of reset*/
    2633. 

  2633. +	ficmmp_config_set(FICMMP_CONFIG_LCMPWREN | FICMMP_CONFIG_LCMEN);
    2634. 

  2634. +	return 0;
    2635. 

  2635. +}
    2636. 

  2636. +
    2637. 

  2637. +int 
    2638. 

  2638. +board_au1200fb_panel_shutdown (void)
    2639. 

  2639. +{
    2640. 

  2640. +	/*Disable data buffers*/
    2641. 

  2641. +	ficmmp_config_set(FICMMP_CONFIG_LCMDATAOUT);
    2642. 

  2642. +	/*Put LCD in reset, remove power*/
    2643. 

  2643. +	ficmmp_config_clear(FICMMP_CONFIG_LCMEN | FICMMP_CONFIG_LCMPWREN);
    2644. 

  2644. +	return 0;
    2645. 

  2645. +}
    2646. 

  2646. +
    2647. 

  2647. --- /dev/null
    2648. 

  2648. +++ b/arch/mips/au1000/ficmmp/init.c
    2649. 

  2649. @@ -0,0 +1,76 @@
    2650. 

  2650. +/*
    2651. 

  2651. + *
    2652. 

  2652. + * BRIEF MODULE DESCRIPTION
    2653. 

  2653. + *	PB1200 board setup
    2654. 

  2654. + *
    2655. 

  2655. + *  This program is free software; you can redistribute  it and/or modify it
    2656. 

  2656. + *  under  the terms of  the GNU General  Public License as published by the
    2657. 

  2657. + *  Free Software Foundation;  either version 2 of the  License, or (at your
    2658. 

  2658. + *  option) any later version.
    2659. 

  2659. + *
    2660. 

  2660. + *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
    2661. 

  2661. + *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
    2662. 

  2662. + *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
    2663. 

  2663. + *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
    2664. 

  2664. + *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
    2665. 

  2665. + *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
    2666. 

  2666. + *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
    2667. 

  2667. + *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
    2668. 

  2668. + *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
    2669. 

  2669. + *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    2670. 

  2670. + *
    2671. 

  2671. + *  You should have received a copy of the  GNU General Public License along
    2672. 

  2672. + *  with this program; if not, write  to the Free Software Foundation, Inc.,
    2673. 

  2673. + *  675 Mass Ave, Cambridge, MA 02139, USA.
    2674. 

  2674. + */
    2675. 

  2675. +
    2676. 

  2676. +#include <linux/init.h>
    2677. 

  2677. +#include <linux/mm.h>
    2678. 

  2678. +#include <linux/sched.h>
    2679. 

  2679. +#include <linux/bootmem.h>
    2680. 

  2680. +#include <asm/addrspace.h>
    2681. 

  2681. +#include <asm/bootinfo.h>
    2682. 

  2682. +#include <linux/config.h>
    2683. 

  2683. +#include <linux/string.h>
    2684. 

  2684. +#include <linux/kernel.h>
    2685. 

  2685. +#include <linux/sched.h>
    2686. 

  2686. +
    2687. 

  2687. +int prom_argc;
    2688. 

  2688. +char **prom_argv, **prom_envp;
    2689. 

  2689. +extern void  __init prom_init_cmdline(void);
    2690. 

  2690. +extern char *prom_getenv(char *envname);
    2691. 

  2691. +
    2692. 

  2692. +const char *get_system_type(void)
    2693. 

  2693. +{
    2694. 

  2694. +	return "FIC Multimedia Player (Au1200)";
    2695. 

  2695. +}
    2696. 

  2696. +
    2697. 

  2697. +u32 mae_memsize = 0;
    2698. 

  2698. +
    2699. 

  2699. +int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
    2700. 

  2700. +{
    2701. 

  2701. +	unsigned char *memsize_str;
    2702. 

  2702. +	unsigned long memsize;
    2703. 

  2703. +
    2704. 

  2704. +	prom_argc = argc;
    2705. 

  2705. +	prom_argv = argv;
    2706. 

  2706. +	prom_envp = envp;
    2707. 

  2707. +
    2708. 

  2708. +	mips_machgroup = MACH_GROUP_ALCHEMY;
    2709. 

  2709. +	mips_machtype = MACH_PB1000;	/* set the platform # */   
    2710. 

  2710. +	prom_init_cmdline();
    2711. 

  2711. +
    2712. 

  2712. +	memsize_str = prom_getenv("memsize");
    2713. 

  2713. +	if (!memsize_str) {
    2714. 

  2714. +		memsize = 0x08000000;
    2715. 

  2715. +	} else {
    2716. 

  2716. +		memsize = simple_strtol(memsize_str, NULL, 0);
    2717. 

  2717. +	}
    2718. 

  2718. +
    2719. 

  2719. +	/* reserved 32MB for MAE driver */
    2720. 

  2720. +	memsize -= (32 * 1024 * 1024);
    2721. 

  2721. +	add_memory_region(0, memsize, BOOT_MEM_RAM);
    2722. 

  2722. +	mae_memsize = memsize; /* for drivers/char/au1xxx_mae.c */
    2723. 

  2723. +	return 0;
    2724. 

  2724. +}
    2725. 

  2725. +
    2726. 

  2726. --- /dev/null
    2727. 

  2727. +++ b/arch/mips/au1000/ficmmp/irqmap.c
    2728. 

  2728. @@ -0,0 +1,61 @@
    2729. 

  2729. +/*
    2730. 

  2730. + * BRIEF MODULE DESCRIPTION
    2731. 

  2731. + *	Au1xxx irq map table
    2732. 

  2732. + *
    2733. 

  2733. + *  This program is free software; you can redistribute	 it and/or modify it
    2734. 

  2734. + *  under  the terms of	 the GNU General  Public License as published by the
    2735. 

  2735. + *  Free Software Foundation;  either version 2 of the	License, or (at your
    2736. 

  2736. + *  option) any later version.
    2737. 

  2737. + *
    2738. 

  2738. + *  THIS  SOFTWARE  IS PROVIDED	  ``AS	IS'' AND   ANY	EXPRESS OR IMPLIED
    2739. 

  2739. + *  WARRANTIES,	  INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
    2740. 

  2740. + *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
    2741. 

  2741. + *  NO	EVENT  SHALL   THE AUTHOR  BE	 LIABLE FOR ANY	  DIRECT, INDIRECT,
    2742. 

  2742. + *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
    2743. 

  2743. + *  NOT LIMITED	  TO, PROCUREMENT OF  SUBSTITUTE GOODS	OR SERVICES; LOSS OF
    2744. 

  2744. + *  USE, DATA,	OR PROFITS; OR	BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
    2745. 

  2745. + *  ANY THEORY OF LIABILITY, WHETHER IN	 CONTRACT, STRICT LIABILITY, OR TORT
    2746. 

  2746. + *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
    2747. 

  2747. + *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    2748. 

  2748. + *
    2749. 

  2749. + *  You should have received a copy of the  GNU General Public License along
    2750. 

  2750. + *  with this program; if not, write  to the Free Software Foundation, Inc.,
    2751. 

  2751. + *  675 Mass Ave, Cambridge, MA 02139, USA.
    2752. 

  2752. + */
    2753. 

  2753. +#include <linux/errno.h>
    2754. 

  2754. +#include <linux/init.h>
    2755. 

  2755. +#include <linux/irq.h>
    2756. 

  2756. +#include <linux/kernel_stat.h>
    2757. 

  2757. +#include <linux/module.h>
    2758. 

  2758. +#include <linux/signal.h>
    2759. 

  2759. +#include <linux/sched.h>
    2760. 

  2760. +#include <linux/types.h>
    2761. 

  2761. +#include <linux/interrupt.h>
    2762. 

  2762. +#include <linux/ioport.h>
    2763. 

  2763. +#include <linux/timex.h>
    2764. 

  2764. +#include <linux/slab.h>
    2765. 

  2765. +#include <linux/random.h>
    2766. 

  2766. +#include <linux/delay.h>
    2767. 

  2767. +
    2768. 

  2768. +#include <asm/bitops.h>
    2769. 

  2769. +#include <asm/bootinfo.h>
    2770. 

  2770. +#include <asm/io.h>
    2771. 

  2771. +#include <asm/mipsregs.h>
    2772. 

  2772. +#include <asm/system.h>
    2773. 

  2773. +#include <asm/au1000.h>
    2774. 

  2774. +#include <asm/ficmmp.h>
    2775. 

  2775. +
    2776. 

  2776. +au1xxx_irq_map_t au1xxx_irq_map[] = {
    2777. 

  2777. +	{ FICMMP_IDE_INT, INTC_INT_HIGH_LEVEL, 0 },
    2778. 

  2778. +	{ AU1XXX_SMC91111_IRQ, INTC_INT_HIGH_LEVEL, 0 },
    2779. 

  2779. +	{ AU1000_GPIO_1 , INTC_INT_FALL_EDGE, 0 },		// main button
    2780. 

  2780. +	{ AU1000_GPIO_6 , INTC_INT_RISE_EDGE, 0 },		// select button
    2781. 

  2781. +	{ AU1000_GPIO_12, INTC_INT_FALL_EDGE, 0 },		// guide button
    2782. 

  2782. +	{ AU1000_GPIO_17, INTC_INT_RISE_EDGE, 0 },		// down button
    2783. 

  2783. +	{ AU1000_GPIO_19, INTC_INT_RISE_EDGE, 0 },		// left button
    2784. 

  2784. +	{ AU1000_GPIO_26, INTC_INT_RISE_EDGE, 0 },		// right button
    2785. 

  2785. +	{ AU1000_GPIO_28, INTC_INT_RISE_EDGE, 0 },		// up button
    2786. 

  2786. +};
    2787. 

  2787. +
    2788. 

  2788. +int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
    2789. 

  2789. +
    2790. 

  2790. --- /dev/null
    2791. 

  2791. +++ b/arch/mips/au1000/ficmmp/Makefile
    2792. 

  2792. @@ -0,0 +1,25 @@
    2793. 

  2793. +#
    2794. 

  2794. +#  Copyright 2000 MontaVista Software Inc.
    2795. 

  2795. +#  Author: MontaVista Software, Inc.
    2796. 

  2796. +#     	ppopov@mvista.com or source@mvista.com
    2797. 

  2797. +#
    2798. 

  2798. +# Makefile for the Alchemy Semiconductor FIC board.
    2799. 

  2799. +#
    2800. 

  2800. +# Note! Dependencies are done automagically by 'make dep', which also
    2801. 

  2801. +# removes any old dependencies. DON'T put your own dependencies here
    2802. 

  2802. +# unless it's something special (ie not a .c file).
    2803. 

  2803. +#
    2804. 

  2804. +
    2805. 

  2805. +USE_STANDARD_AS_RULE := true
    2806. 

  2806. +
    2807. 

  2807. +O_TARGET := ficmmp.o
    2808. 

  2808. +
    2809. 

  2809. +obj-y := init.o board_setup.o irqmap.o au1200_ibutton.o au1xxx_dock.o
    2810. 

  2810. +
    2811. 

  2811. +ifdef CONFIG_MMC
    2812. 

  2812. +obj-y += mmc_support.o
    2813. 

  2813. +export-objs +=mmc_support.o
    2814. 

  2814. +endif
    2815. 

  2815. +
    2816. 

  2816. +
    2817. 

  2817. +include $(TOPDIR)/Rules.make
    2818. 

  2818. --- a/arch/mips/au1000/hydrogen3/board_setup.c
    2819. 

  2819. +++ b/arch/mips/au1000/hydrogen3/board_setup.c
    2820. 

  2820. @@ -51,12 +51,19 @@ void board_reset (void)
    2821. 

  2821.  {
    2822. 

  2822.  }
    2823. 

  2823.  
    2824. 

  2824. +void board_power_off (void)
    2825. 

  2825. +{
    2826. 

  2826. +}
    2827. 

  2827. +
    2828. 

  2828.  void __init board_setup(void)
    2829. 

  2829.  {
    2830. 

  2830.  	u32 pin_func;
    2831. 

  2831.  
    2832. 

  2832.  	rtc_ops = &no_rtc_ops;
    2833. 

  2833.  
    2834. 

  2834. +	/* Set GPIO14 high to make CD/DAT1 high for MMC to work */
    2835. 

  2835. +	au_writel(1<<14, SYS_OUTPUTSET);
    2836. 

  2836. +
    2837. 

  2837.  #ifdef CONFIG_AU1X00_USB_DEVICE
    2838. 

  2838.  	// 2nd USB port is USB device
    2839. 

  2839.  	pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
    2840. 

  2840. --- /dev/null
    2841. 

  2841. +++ b/arch/mips/au1000/hydrogen3/buttons.c
    2842. 

  2842. @@ -0,0 +1,308 @@
    2843. 

  2843. +/*
    2844. 

  2844. + *  Copyright (C) 2003 Metrowerks, All Rights Reserved.
    2845. 

  2845. + *
    2846. 

  2846. + * This program is free software; you can redistribute it and/or modify
    2847. 

  2847. + * it under the terms of the GNU General Public License version 2 as
    2848. 

  2848. + * published by the Free Software Foundation.
    2849. 

  2849. + */
    2850. 

  2850. +
    2851. 

  2851. +#include <linux/config.h>
    2852. 

  2852. +#include <linux/module.h>
    2853. 

  2853. +#include <linux/init.h>
    2854. 

  2854. +#include <linux/fs.h>
    2855. 

  2855. +#include <linux/sched.h>
    2856. 

  2856. +#include <linux/miscdevice.h>
    2857. 

  2857. +#include <linux/errno.h>
    2858. 

  2858. +#include <linux/poll.h>
    2859. 

  2859. +#include <asm/au1000.h>
    2860. 

  2860. +#include <asm/uaccess.h>
    2861. 

  2861. +
    2862. 

  2862. +#define BUTTON_SELECT	(1<<1)
    2863. 

  2863. +#define BUTTON_1	(1<<2)
    2864. 

  2864. +#define BUTTON_2	(1<<3)
    2865. 

  2865. +#define BUTTON_ONOFF	(1<<6)
    2866. 

  2866. +#define BUTTON_3	(1<<7)
    2867. 

  2867. +#define BUTTON_4	(1<<8)
    2868. 

  2868. +#define BUTTON_LEFT	(1<<9)
    2869. 

  2869. +#define BUTTON_DOWN	(1<<10)
    2870. 

  2870. +#define BUTTON_RIGHT	(1<<11)
    2871. 

  2871. +#define BUTTON_UP	(1<<12)
    2872. 

  2872. +
    2873. 

  2873. +#define BUTTON_MASK (\
    2874. 

  2874. +    BUTTON_SELECT	\
    2875. 

  2875. +    | BUTTON_1   	\
    2876. 

  2876. +    | BUTTON_2		\
    2877. 

  2877. +    | BUTTON_ONOFF	\
    2878. 

  2878. +    | BUTTON_3		\
    2879. 

  2879. +    | BUTTON_4		\
    2880. 

  2880. +    | BUTTON_LEFT	\
    2881. 

  2881. +    | BUTTON_DOWN	\
    2882. 

  2882. +    | BUTTON_RIGHT	\
    2883. 

  2883. +    | BUTTON_UP		\
    2884. 

  2884. +    )
    2885. 

  2885. +
    2886. 

  2886. +#define BUTTON_INVERT (\
    2887. 

  2887. +    BUTTON_SELECT	\
    2888. 

  2888. +    | BUTTON_1   	\
    2889. 

  2889. +    | BUTTON_2		\
    2890. 

  2890. +    | BUTTON_3		\
    2891. 

  2891. +    | BUTTON_4		\
    2892. 

  2892. +    | BUTTON_LEFT	\
    2893. 

  2893. +    | BUTTON_DOWN	\
    2894. 

  2894. +    | BUTTON_RIGHT	\
    2895. 

  2895. +    | BUTTON_UP		\
    2896. 

  2896. +    )
    2897. 

  2897. +
    2898. 

  2898. +
    2899. 

  2899. +
    2900. 

  2900. +#define MAKE_FLAG 0x20
    2901. 

  2901. +
    2902. 

  2902. +#undef DEBUG
    2903. 

  2903. +
    2904. 

  2904. +#define DEBUG 0
    2905. 

  2905. +//#define DEBUG 1
    2906. 

  2906. +
    2907. 

  2907. +#if DEBUG
    2908. 

  2908. +#define DPRINTK(format, args...) printk(__FUNCTION__ ": "  format, ## args)
    2909. 

  2909. +#else
    2910. 

  2910. +#define DPRINTK(format, args...) do { } while (0)
    2911. 

  2911. +#endif
    2912. 

  2912. +
    2913. 

  2913. +/* Please note that this driver is based on a timer and is not interrupt
    2914. 

  2914. + * driven.  If you are going to make use of this driver, you will need to have
    2915. 

  2915. + * your application open the buttons listing from the /dev directory first.
    2916. 

  2916. + */
    2917. 

  2917. +
    2918. 

  2918. +struct hydrogen3_buttons {
    2919. 

  2919. +	struct fasync_struct *fasync;
    2920. 

  2920. +	wait_queue_head_t     read_wait;
    2921. 

  2921. +	int open_count;
    2922. 

  2922. +	unsigned int debounce;
    2923. 

  2923. +	unsigned int current;
    2924. 

  2924. +	unsigned int last;
    2925. 

  2925. +};
    2926. 

  2926. +
    2927. 

  2927. +static struct hydrogen3_buttons buttons_info;
    2928. 

  2928. +
    2929. 

  2929. +
    2930. 

  2930. +static void button_timer_periodic(void *data);
    2931. 

  2931. +
    2932. 

  2932. +static struct tq_struct button_task = {
    2933. 

  2933. +	routine:	button_timer_periodic,
    2934. 

  2934. +	data:		NULL
    2935. 

  2935. +};
    2936. 

  2936. +
    2937. 

  2937. +static int cleanup_flag = 0;
    2938. 

  2938. +static DECLARE_WAIT_QUEUE_HEAD(cleanup_wait_queue);
    2939. 

  2939. +
    2940. 

  2940. +
    2941. 

  2941. +static unsigned int read_button_state(void)
    2942. 

  2942. +{
    2943. 

  2943. +	unsigned long state;
    2944. 

  2944. +
    2945. 

  2945. +	state = inl(SYS_PINSTATERD) & BUTTON_MASK;
    2946. 

  2946. +	state ^= BUTTON_INVERT;
    2947. 

  2947. +	
    2948. 

  2948. +	DPRINTK( "Current Button State: %d\n", state );
    2949. 

  2949. +
    2950. 

  2950. +	return state;
    2951. 

  2951. +}
    2952. 

  2952. +
    2953. 

  2953. +
    2954. 

  2954. +static void button_timer_periodic(void *data)
    2955. 

  2955. +{
    2956. 

  2956. +	struct hydrogen3_buttons *buttons = (struct hydrogen3_buttons *)data;
    2957. 

  2957. +	unsigned long button_state;
    2958. 

  2958. +	
    2959. 

  2959. +	// If cleanup wants us to die
    2960. 

  2960. +	if (cleanup_flag) {
    2961. 

  2961. +		wake_up(&cleanup_wait_queue);		// now cleanup_module can return
    2962. 

  2962. +	} else {
    2963. 

  2963. +		queue_task(&button_task, &tq_timer);	// put ourselves back in the task queue
    2964. 

  2964. +	}
    2965. 

  2965. +
    2966. 

  2966. +	// read current buttons
    2967. 

  2967. +	button_state = read_button_state();
    2968. 

  2968. +
    2969. 

  2969. +	// if no buttons are down and nothing to do then
    2970. 

  2970. +	// save time and be done.
    2971. 

  2971. +	if ((button_state == 0) && (buttons->current == 0)) {
    2972. 

  2972. +		return;
    2973. 

  2973. +	}
    2974. 

  2974. +	
    2975. 

  2975. +	if (button_state == buttons->debounce) {
    2976. 

  2976. +		buttons->current = button_state;
    2977. 

  2977. +	} else {
    2978. 

  2978. +		buttons->debounce = button_state;
    2979. 

  2979. +	}
    2980. 

  2980. +//	printk("0x%04x\n", button_state);
    2981. 

  2981. +	if (buttons->current != buttons->last) {
    2982. 

  2982. +		if (waitqueue_active(&buttons->read_wait)) {
    2983. 

  2983. +		    wake_up_interruptible(&buttons->read_wait);
    2984. 

  2984. +		}
    2985. 

  2985. +	}
    2986. 

  2986. +}
    2987. 

  2987. +
    2988. 

  2988. +
    2989. 

  2989. +static ssize_t hydrogen3_buttons_read(struct file *filp, char *buffer, size_t count, loff_t *ppos)
    2990. 

  2990. +{
    2991. 

  2991. +	struct hydrogen3_buttons *buttons = filp->private_data;
    2992. 

  2992. +	char events[16];
    2993. 

  2993. +	int index;
    2994. 

  2994. +	int last;
    2995. 

  2995. +	int cur;
    2996. 

  2996. +	int bit;
    2997. 

  2997. +	int bit_mask;
    2998. 

  2998. +	int err;
    2999. 

  2999. +	
    3000. 

  3000. +	DPRINTK("start\n");
    3001. 

  3001. +
    3002. 

  3002. +try_again:
    3003. 

  3003. +
    3004. 

  3004. +	while (buttons->current == buttons->last) {
    3005. 

  3005. +		if (filp->f_flags & O_NONBLOCK) {
    3006. 

  3006. +			return -EAGAIN;
    3007. 

  3007. +		}
    3008. 

  3008. +		interruptible_sleep_on(&buttons->read_wait);
    3009. 

  3009. +		if (signal_pending(current)) {
    3010. 

  3010. +			return -ERESTARTSYS;
    3011. 

  3011. +		}
    3012. 

  3012. +	}
    3013. 

  3013. +	
    3014. 

  3014. +	cur  = buttons->current;
    3015. 

  3015. +	last = buttons->last;
    3016. 

  3016. +	
    3017. 

  3017. +	index    = 0;
    3018. 

  3018. +	bit_mask = 1;
    3019. 

  3019. +	for (bit = 0; (bit < 16) && count; bit++) {
    3020. 

  3020. +		if ((cur ^ last) & bit_mask) {
    3021. 

  3021. +			if (cur & bit_mask) {
    3022. 

  3022. +				events[index] = (bit | MAKE_FLAG) + 'A';
    3023. 

  3023. +				last |= bit_mask;
    3024. 

  3024. +			} else {
    3025. 

  3025. +				events[index] = bit + 'A';
    3026. 

  3026. +				last &= ~bit_mask;
    3027. 

  3027. +			}
    3028. 

  3028. +			index++;
    3029. 

  3029. +			count--;
    3030. 

  3030. +		}
    3031. 

  3031. +		bit_mask <<= 1;
    3032. 

  3032. +	}
    3033. 

  3033. +	buttons->last = last;
    3034. 

  3034. +	
    3035. 

  3035. +	if (index == 0) {
    3036. 

  3036. +		goto try_again;
    3037. 

  3037. +	}
    3038. 

  3038. +	
    3039. 

  3039. +	err = copy_to_user(buffer, events, index);
    3040. 

  3040. +	if (err) {
    3041. 

  3041. +		return err;
    3042. 

  3042. +	}
    3043. 

  3043. +	
    3044. 

  3044. +	return index;
    3045. 

  3045. +}
    3046. 

  3046. +
    3047. 

  3047. +
    3048. 

  3048. +static int hydrogen3_buttons_open(struct inode *inode, struct file *filp)
    3049. 

  3049. +{
    3050. 

  3050. +	struct hydrogen3_buttons *buttons = &buttons_info;
    3051. 

  3051. +
    3052. 

  3052. +	DPRINTK("start\n");
    3053. 

  3053. +	MOD_INC_USE_COUNT;
    3054. 

  3054. +
    3055. 

  3055. +	filp->private_data = buttons;
    3056. 

  3056. +
    3057. 

  3057. +	if (buttons->open_count++ == 0) {
    3058. 

  3058. +		button_task.data = buttons;
    3059. 

  3059. +		cleanup_flag = 0;
    3060. 

  3060. +		queue_task(&button_task, &tq_timer);
    3061. 

  3061. +	}
    3062. 

  3062. +
    3063. 

  3063. +	return 0;
    3064. 

  3064. +}
    3065. 

  3065. +
    3066. 

  3066. +
    3067. 

  3067. +static unsigned int hydrogen3_buttons_poll(struct file *filp, poll_table *wait)
    3068. 

  3068. +{
    3069. 

  3069. +	struct hydrogen3_buttons *buttons = filp->private_data;
    3070. 

  3070. +	int ret = 0;
    3071. 

  3071. +
    3072. 

  3072. +	DPRINTK("start\n");
    3073. 

  3073. +	poll_wait(filp, &buttons->read_wait, wait);
    3074. 

  3074. +	if (buttons->current != buttons->last) {
    3075. 

  3075. +		ret = POLLIN | POLLRDNORM;
    3076. 

  3076. +	}
    3077. 

  3077. +	return ret;
    3078. 

  3078. +}
    3079. 

  3079. +
    3080. 

  3080. +
    3081. 

  3081. +static int hydrogen3_buttons_release(struct inode *inode, struct file *filp)
    3082. 

  3082. +{
    3083. 

  3083. +	struct hydrogen3_buttons *buttons = filp->private_data;
    3084. 

  3084. +
    3085. 

  3085. +	DPRINTK("start\n");
    3086. 

  3086. +
    3087. 

  3087. +	if (--buttons->open_count == 0) {
    3088. 

  3088. +		cleanup_flag = 1;
    3089. 

  3089. +		sleep_on(&cleanup_wait_queue);
    3090. 

  3090. +	}
    3091. 

  3091. +	MOD_DEC_USE_COUNT;
    3092. 

  3092. +	
    3093. 

  3093. +	return 0;
    3094. 

  3094. +}
    3095. 

  3095. +
    3096. 

  3096. +
    3097. 

  3097. +
    3098. 

  3098. +static struct file_operations hydrogen3_buttons_fops = {
    3099. 

  3099. +	owner:		THIS_MODULE,
    3100. 

  3100. +	read:		hydrogen3_buttons_read,
    3101. 

  3101. +	poll:		hydrogen3_buttons_poll,
    3102. 

  3102. +	open:		hydrogen3_buttons_open,
    3103. 

  3103. +	release:	hydrogen3_buttons_release,
    3104. 

  3104. +};
    3105. 

  3105. +
    3106. 

  3106. +/*
    3107. 

  3107. + * The hydrogen3 buttons is a misc device:
    3108. 

  3108. + * Major 10 char
    3109. 

  3109. + * Minor 22        /dev/buttons
    3110. 

  3110. + * 
    3111. 

  3111. + * This is /dev/misc/buttons if devfs is used.
    3112. 

  3112. + */
    3113. 

  3113. +
    3114. 

  3114. +static struct miscdevice hydrogen3_buttons_dev = {
    3115. 

  3115. +	minor:	22,
    3116. 

  3116. +	name:	"buttons",
    3117. 

  3117. +	fops:	&hydrogen3_buttons_fops,
    3118. 

  3118. +};
    3119. 

  3119. +
    3120. 

  3120. +static int __init hydrogen3_buttons_init(void)
    3121. 

  3121. +{
    3122. 

  3122. +	struct hydrogen3_buttons *buttons = &buttons_info;
    3123. 

  3123. +	int ret;
    3124. 

  3124. +
    3125. 

  3125. +	DPRINTK("Initializing buttons driver\n");
    3126. 

  3126. +	buttons->open_count = 0;
    3127. 

  3127. +	cleanup_flag        = 0;
    3128. 

  3128. +	init_waitqueue_head(&buttons->read_wait);
    3129. 

  3129. +
    3130. 

  3130. +
    3131. 

  3131. +	// yamon configures GPIO pins for the buttons
    3132. 

  3132. +	// no initialization needed
    3133. 

  3133. +
    3134. 

  3134. +	ret = misc_register(&hydrogen3_buttons_dev);
    3135. 

  3135. +
    3136. 

  3136. +	DPRINTK("Buttons driver fully initialized.\n");
    3137. 

  3137. +
    3138. 

  3138. +	return ret;
    3139. 

  3139. +}
    3140. 

  3140. +
    3141. 

  3141. +
    3142. 

  3142. +static void __exit hydrogen3_buttons_exit(void)
    3143. 

  3143. +{
    3144. 

  3144. +	DPRINTK("unloading buttons driver\n");
    3145. 

  3145. +	misc_deregister(&hydrogen3_buttons_dev);
    3146. 

  3146. +}
    3147. 

  3147. +
    3148. 

  3148. +
    3149. 

  3149. +module_init(hydrogen3_buttons_init);
    3150. 

  3150. +module_exit(hydrogen3_buttons_exit);
    3151. 

  3151. --- a/arch/mips/au1000/hydrogen3/Makefile
    3152. 

  3152. +++ b/arch/mips/au1000/hydrogen3/Makefile
    3153. 

  3153. @@ -14,6 +14,11 @@ USE_STANDARD_AS_RULE := true
    3154. 

  3154.  
    3155. 

  3155.  O_TARGET := hydrogen3.o
    3156. 

  3156.  
    3157. 

  3157. -obj-y := init.o board_setup.o irqmap.o
    3158. 

  3158. +obj-y := init.o board_setup.o irqmap.o buttons.o
    3159. 

  3159. +
    3160. 

  3160. +ifdef CONFIG_MMC
    3161. 

  3161. +obj-y += mmc_support.o
    3162. 

  3162. +export-objs +=mmc_support.o
    3163. 

  3163. +endif
    3164. 

  3164.  
    3165. 

  3165.  include $(TOPDIR)/Rules.make
    3166. 

  3166. --- /dev/null
    3167. 

  3167. +++ b/arch/mips/au1000/hydrogen3/mmc_support.c
    3168. 

  3168. @@ -0,0 +1,89 @@
    3169. 

  3169. +/*
    3170. 

  3170. + * BRIEF MODULE DESCRIPTION
    3171. 

  3171. + *
    3172. 

  3172. + *	MMC support routines for Hydrogen3.
    3173. 

  3173. + *
    3174. 

  3174. + *
    3175. 

  3175. + * Copyright (c) 2003-2004 Embedded Edge, LLC.
    3176. 

  3176. + * Author: Embedded Edge, LLC.
    3177. 

  3177. + * Contact: dan@embeddededge.com
    3178. 

  3178. + *
    3179. 

  3179. + *  This program is free software; you can redistribute  it and/or modify it
    3180. 

  3180. + *  under  the terms of  the GNU General  Public License as published by the
    3181. 

  3181. + *  Free Software Foundation;  either version 2 of the  License, or (at your
    3182. 

  3182. + *  option) any later version.
    3183. 

  3183. + *
    3184. 

  3184. + *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
    3185. 

  3185. + *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
    3186. 

  3186. + *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
    3187. 

  3187. + *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
    3188. 

  3188. + *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
    3189. 

  3189. + *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
    3190. 

  3190. + *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
    3191. 

  3191. + *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
    3192. 

  3192. + *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
    3193. 

  3193. + *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    3194. 

  3194. + *
    3195. 

  3195. + *  You should have received a copy of the  GNU General Public License along
    3196. 

  3196. + *  with this program; if not, write  to the Free Software Foundation, Inc.,
    3197. 

  3197. + *  675 Mass Ave, Cambridge, MA 02139, USA.
    3198. 

  3198. + *
    3199. 

  3199. + */
    3200. 

  3200. +
    3201. 

  3201. +
    3202. 

  3202. +#include <linux/config.h>
    3203. 

  3203. +#include <linux/kernel.h>
    3204. 

  3204. +#include <linux/module.h>
    3205. 

  3205. +#include <linux/init.h>
    3206. 

  3206. +
    3207. 

  3207. +#include <asm/irq.h>
    3208. 

  3208. +#include <asm/au1000.h>
    3209. 

  3209. +#include <asm/au1100_mmc.h>
    3210. 

  3210. +
    3211. 

  3211. +#define GPIO_17_WP 0x20000
    3212. 

  3212. +
    3213. 

  3213. +/* SD/MMC controller support functions */
    3214. 

  3214. +
    3215. 

  3215. +/*
    3216. 

  3216. + * Detect card.
    3217. 

  3217. + */
    3218. 

  3218. +void mmc_card_inserted(int _n_, int *_res_)
    3219. 

  3219. +{
    3220. 

  3220. +	u32 gpios = au_readl(SYS_PINSTATERD);
    3221. 

  3221. +	u32 emptybit = (1<<16);
    3222. 

  3222. +	*_res_ = ((gpios & emptybit) == 0);
    3223. 

  3223. +}
    3224. 

  3224. +
    3225. 

  3225. +/*
    3226. 

  3226. + * Check card write protection.
    3227. 

  3227. + */
    3228. 

  3228. +void mmc_card_writable(int _n_, int *_res_)
    3229. 

  3229. +{
    3230. 

  3230. +	unsigned long mmc_wp, board_specific; 
    3231. 

  3231. +		board_specific = au_readl(SYS_OUTPUTSET);
    3232. 

  3232. +		mmc_wp=GPIO_17_WP;
    3233. 

  3233. +		if (!(board_specific & mmc_wp)) {/* low means card writable */ 
    3234. 

  3234. +			*_res_ = 1; 
    3235. 

  3235. +		} else {
    3236. 

  3236. +			*_res_ = 0; 
    3237. 

  3237. +		} 
    3238. 

  3238. +}
    3239. 

  3239. +/*
    3240. 

  3240. + * Apply power to card slot.
    3241. 

  3241. + */
    3242. 

  3242. +void mmc_power_on(int _n_)
    3243. 

  3243. +{
    3244. 

  3244. +}
    3245. 

  3245. +
    3246. 

  3246. +/*
    3247. 

  3247. + * Remove power from card slot.
    3248. 

  3248. + */
    3249. 

  3249. +void mmc_power_off(int _n_)
    3250. 

  3250. +{
    3251. 

  3251. +}
    3252. 

  3252. +
    3253. 

  3253. +EXPORT_SYMBOL(mmc_card_inserted);
    3254. 

  3254. +EXPORT_SYMBOL(mmc_card_writable);
    3255. 

  3255. +EXPORT_SYMBOL(mmc_power_on);
    3256. 

  3256. +EXPORT_SYMBOL(mmc_power_off);
    3257. 

  3257. +
    3258. 

  3258. --- a/arch/mips/au1000/mtx-1/board_setup.c
    3259. 

  3259. +++ b/arch/mips/au1000/mtx-1/board_setup.c
    3260. 

  3260. @@ -48,6 +48,12 @@
    3261. 

  3261.  
    3262. 

  3262.  extern struct rtc_ops no_rtc_ops;
    3263. 

  3263.  
    3264. 

  3264. +void board_reset (void)
    3265. 

  3265. +{
    3266. 

  3266. +	/* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
    3267. 

  3267. +	au_writel(0x00000000, 0xAE00001C);
    3268. 

  3268. +}
    3269. 

  3269. +
    3270. 

  3270.  void __init board_setup(void)
    3271. 

  3271.  {
    3272. 

  3272.  	rtc_ops = &no_rtc_ops;
    3273. 

  3273. --- a/arch/mips/au1000/mtx-1/irqmap.c
    3274. 

  3274. +++ b/arch/mips/au1000/mtx-1/irqmap.c
    3275. 

  3275. @@ -72,10 +72,10 @@ au1xxx_pci_irqmap(struct pci_dev *dev, u
    3276. 

  3276.  	 *	A       B       C       D
    3277. 

  3277.  	 */
    3278. 

  3278.  	{
    3279. 

  3279. -		{INTA, INTB, INTC, INTD},   /* IDSEL 0 */
    3280. 

  3280. -		{INTA, INTB, INTC, INTD},   /* IDSEL 1 */
    3281. 

  3281. -		{INTA, INTB, INTC, INTD},   /* IDSEL 2 */
    3282. 

  3282. -		{INTA, INTB, INTC, INTD},   /* IDSEL 3 */
    3283. 

  3283. +		{INTA, INTB, INTX, INTX},   /* IDSEL 0 */
    3284. 

  3284. +		{INTB, INTA, INTX, INTX},   /* IDSEL 1 */
    3285. 

  3285. +		{INTC, INTD, INTX, INTX},   /* IDSEL 2 */
    3286. 

  3286. +		{INTD, INTC, INTX, INTX},   /* IDSEL 3 */
    3287. 

  3287.  	};
    3288. 

  3288.  	const long min_idsel = 0, max_idsel = 3, irqs_per_slot = 4;
    3289. 

  3289.  	return PCI_IRQ_TABLE_LOOKUP;
    3290. 

  3290. --- a/arch/mips/au1000/pb1000/board_setup.c
    3291. 

  3291. +++ b/arch/mips/au1000/pb1000/board_setup.c
    3292. 

  3292. @@ -58,6 +58,10 @@ void board_reset (void)
    3293. 

  3293.  {
    3294. 

  3294.  }
    3295. 

  3295.  
    3296. 

  3296. +void board_power_off (void)
    3297. 

  3297. +{
    3298. 

  3298. +}
    3299. 

  3299. +
    3300. 

  3300.  void __init board_setup(void)
    3301. 

  3301.  {
    3302. 

  3302.  	u32 pin_func, static_cfg0;
    3303. 

  3303. --- a/arch/mips/au1000/pb1100/board_setup.c
    3304. 

  3304. +++ b/arch/mips/au1000/pb1100/board_setup.c
    3305. 

  3305. @@ -62,6 +62,10 @@ void board_reset (void)
    3306. 

  3306.      au_writel(0x00000000, 0xAE00001C);
    3307. 

  3307.  }
    3308. 

  3308.  
    3309. 

  3309. +void board_power_off (void)
    3310. 

  3310. +{
    3311. 

  3311. +}
    3312. 

  3312. +
    3313. 

  3313.  void __init board_setup(void)
    3314. 

  3314.  {
    3315. 

  3315.  	u32 pin_func;
    3316. 

  3316. --- a/arch/mips/au1000/pb1100/Makefile
    3317. 

  3317. +++ b/arch/mips/au1000/pb1100/Makefile
    3318. 

  3318. @@ -16,4 +16,10 @@ O_TARGET := pb1100.o
    3319. 

  3319.  
    3320. 

  3320.  obj-y := init.o board_setup.o irqmap.o
    3321. 

  3321.  
    3322. 

  3322. +
    3323. 

  3323. +ifdef CONFIG_MMC
    3324. 

  3324. +obj-y += mmc_support.o
    3325. 

  3325. +export-objs += mmc_support.o
    3326. 

  3326. +endif
    3327. 

  3327. +
    3328. 

  3328.  include $(TOPDIR)/Rules.make
    3329. 

  3329. --- /dev/null
    3330. 

  3330. +++ b/arch/mips/au1000/pb1100/mmc_support.c
    3331. 

  3331. @@ -0,0 +1,126 @@
    3332. 

  3332. +/*
    3333. 

  3333. + * BRIEF MODULE DESCRIPTION
    3334. 

  3334. + *
    3335. 

  3335. + *	MMC support routines for PB1100.
    3336. 

  3336. + *
    3337. 

  3337. + *
    3338. 

  3338. + * Copyright (c) 2003-2004 Embedded Edge, LLC.
    3339. 

  3339. + * Author: Embedded Edge, LLC.
    3340. 

  3340. + * Contact: dan@embeddededge.com
    3341. 

  3341. + *
    3342. 

  3342. + *  This program is free software; you can redistribute  it and/or modify it
    3343. 

  3343. + *  under  the terms of  the GNU General  Public License as published by the
    3344. 

  3344. + *  Free Software Foundation;  either version 2 of the  License, or (at your
    3345. 

  3345. + *  option) any later version.
    3346. 

  3346. + *
    3347. 

  3347. + *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
    3348. 

  3348. + *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
    3349. 

  3349. + *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
    3350. 

  3350. + *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
    3351. 

  3351. + *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
    3352. 

  3352. + *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
    3353. 

  3353. + *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
    3354. 

  3354. + *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
    3355. 

  3355. + *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
    3356. 

  3356. + *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    3357. 

  3357. + *
    3358. 

  3358. + *  You should have received a copy of the  GNU General Public License along
    3359. 

  3359. + *  with this program; if not, write  to the Free Software Foundation, Inc.,
    3360. 

  3360. + *  675 Mass Ave, Cambridge, MA 02139, USA.
    3361. 

  3361. + *
    3362. 

  3362. + */
    3363. 

  3363. +
    3364. 

  3364. +
    3365. 

  3365. +#include <linux/config.h>
    3366. 

  3366. +#include <linux/kernel.h>
    3367. 

  3367. +#include <linux/module.h>
    3368. 

  3368. +#include <linux/init.h>
    3369. 

  3369. +
    3370. 

  3370. +#include <asm/irq.h>
    3371. 

  3371. +#include <asm/au1000.h>
    3372. 

  3372. +#include <asm/au1100_mmc.h>
    3373. 

  3373. +#include <asm/pb1100.h>
    3374. 

  3374. +
    3375. 

  3375. +
    3376. 

  3376. +/* SD/MMC controller support functions */
    3377. 

  3377. +
    3378. 

  3378. +/*
    3379. 

  3379. + * Detect card.
    3380. 

  3380. + */
    3381. 

  3381. +void mmc_card_inserted(int _n_, int *_res_)
    3382. 

  3382. +{
    3383. 

  3383. +	u32 gpios = au_readl(SYS_PINSTATERD);
    3384. 

  3384. +	u32 emptybit = (_n_) ? (1<<15) : (1<<14);
    3385. 

  3385. +	*_res_ = ((gpios & emptybit) == 0);
    3386. 

  3386. +}
    3387. 

  3387. +
    3388. 

  3388. +/*
    3389. 

  3389. + * Check card write protection.
    3390. 

  3390. + */
    3391. 

  3391. +void mmc_card_writable(int _n_, int *_res_)
    3392. 

  3392. +{
    3393. 

  3393. +	BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
    3394. 

  3394. +	unsigned long mmc_wp, board_specific;
    3395. 

  3395. +
    3396. 

  3396. +	if (_n_) {
    3397. 

  3397. +		mmc_wp = BCSR_PCMCIA_SD1_WP;
    3398. 

  3398. +	} else {
    3399. 

  3399. +		mmc_wp = BCSR_PCMCIA_SD0_WP;
    3400. 

  3400. +	}
    3401. 

  3401. +
    3402. 

  3402. +	board_specific = au_readl((unsigned long)(&bcsr->pcmcia));
    3403. 

  3403. +
    3404. 

  3404. +	if (!(board_specific & mmc_wp)) {/* low means card writable */
    3405. 

  3405. +		*_res_ = 1;
    3406. 

  3406. +	} else {
    3407. 

  3407. +		*_res_ = 0;
    3408. 

  3408. +	}
    3409. 

  3409. +}
    3410. 

  3410. +
    3411. 

  3411. +/*
    3412. 

  3412. + * Apply power to card slot.
    3413. 

  3413. + */
    3414. 

  3414. +void mmc_power_on(int _n_)
    3415. 

  3415. +{
    3416. 

  3416. +	BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
    3417. 

  3417. +	unsigned long mmc_pwr, board_specific;
    3418. 

  3418. +
    3419. 

  3419. +	if (_n_) {
    3420. 

  3420. +		mmc_pwr = BCSR_PCMCIA_SD1_PWR;
    3421. 

  3421. +	} else {
    3422. 

  3422. +		mmc_pwr = BCSR_PCMCIA_SD0_PWR;
    3423. 

  3423. +	}
    3424. 

  3424. +
    3425. 

  3425. +	board_specific = au_readl((unsigned long)(&bcsr->pcmcia));
    3426. 

  3426. +	board_specific |= mmc_pwr;
    3427. 

  3427. +
    3428. 

  3428. +	au_writel(board_specific, (int)(&bcsr->pcmcia));
    3429. 

  3429. +	au_sync_delay(1);
    3430. 

  3430. +}
    3431. 

  3431. +
    3432. 

  3432. +/*
    3433. 

  3433. + * Remove power from card slot.
    3434. 

  3434. + */
    3435. 

  3435. +void mmc_power_off(int _n_)
    3436. 

  3436. +{
    3437. 

  3437. +	BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
    3438. 

  3438. +	unsigned long mmc_pwr, board_specific;
    3439. 

  3439. +
    3440. 

  3440. +	if (_n_) {
    3441. 

  3441. +		mmc_pwr = BCSR_PCMCIA_SD1_PWR;
    3442. 

  3442. +	} else {
    3443. 

  3443. +		mmc_pwr = BCSR_PCMCIA_SD0_PWR;
    3444. 

  3444. +	}
    3445. 

  3445. +
    3446. 

  3446. +	board_specific = au_readl((unsigned long)(&bcsr->pcmcia));
    3447. 

  3447. +	board_specific &= ~mmc_pwr;
    3448. 

  3448. +
    3449. 

  3449. +	au_writel(board_specific, (int)(&bcsr->pcmcia));
    3450. 

  3450. +	au_sync_delay(1);
    3451. 

  3451. +}
    3452. 

  3452. +
    3453. 

  3453. +EXPORT_SYMBOL(mmc_card_inserted);
    3454. 

  3454. +EXPORT_SYMBOL(mmc_card_writable);
    3455. 

  3455. +EXPORT_SYMBOL(mmc_power_on);
    3456. 

  3456. +EXPORT_SYMBOL(mmc_power_off);
    3457. 

  3457. +
    3458. 

  3458. --- /dev/null
    3459. 

  3459. +++ b/arch/mips/au1000/pb1200/board_setup.c
    3460. 

  3460. @@ -0,0 +1,221 @@
    3461. 

  3461. +/*
    3462. 

  3462. + *
    3463. 

  3463. + * BRIEF MODULE DESCRIPTION
    3464. 

  3464. + *	Alchemy Pb1200 board setup.
    3465. 

  3465. + *
    3466. 

  3466. + *  This program is free software; you can redistribute  it and/or modify it
    3467. 

  3467. + *  under  the terms of  the GNU General  Public License as published by the
    3468. 

  3468. + *  Free Software Foundation;  either version 2 of the  License, or (at your
    3469. 

  3469. + *  option) any later version.
    3470. 

  3470. + *
    3471. 

  3471. + *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
    3472. 

  3472. + *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
    3473. 

  3473. + *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
    3474. 

  3474. + *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
    3475. 

  3475. + *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
    3476. 

  3476. + *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
    3477. 

  3477. + *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
    3478. 

  3478. + *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
    3479. 

  3479. + *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
    3480. 

  3480. + *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    3481. 

  3481. + *
    3482. 

  3482. + *  You should have received a copy of the  GNU General Public License along
    3483. 

  3483. + *  with this program; if not, write  to the Free Software Foundation, Inc.,
    3484. 

  3484. + *  675 Mass Ave, Cambridge, MA 02139, USA.
    3485. 

  3485. + */
    3486. 

  3486. +#include <linux/config.h>
    3487. 

  3487. +#include <linux/init.h>
    3488. 

  3488. +#include <linux/sched.h>
    3489. 

  3489. +#include <linux/ioport.h>
    3490. 

  3490. +#include <linux/mm.h>
    3491. 

  3491. +#include <linux/console.h>
    3492. 

  3492. +#include <linux/mc146818rtc.h>
    3493. 

  3493. +#include <linux/delay.h>
    3494. 

  3494. +
    3495. 

  3495. +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
    3496. 

  3496. +#include <linux/ide.h>
    3497. 

  3497. +#endif
    3498. 

  3498. +
    3499. 

  3499. +#include <asm/cpu.h>
    3500. 

  3500. +#include <asm/bootinfo.h>
    3501. 

  3501. +#include <asm/irq.h>
    3502. 

  3502. +#include <asm/keyboard.h>
    3503. 

  3503. +#include <asm/mipsregs.h>
    3504. 

  3504. +#include <asm/reboot.h>
    3505. 

  3505. +#include <asm/pgtable.h>
    3506. 

  3506. +#include <asm/au1000.h>
    3507. 

  3507. +#include <asm/au1xxx_dbdma.h>
    3508. 

  3508. +
    3509. 

  3509. +#ifdef CONFIG_MIPS_PB1200
    3510. 

  3510. +#include <asm/pb1200.h>
    3511. 

  3511. +#endif
    3512. 

  3512. +
    3513. 

  3513. +#ifdef CONFIG_MIPS_DB1200
    3514. 

  3514. +#include <asm/db1200.h>
    3515. 

  3515. +#define PB1200_ETH_INT DB1200_ETH_INT
    3516. 

  3516. +#define PB1200_IDE_INT DB1200_IDE_INT
    3517. 

  3517. +#endif
    3518. 

  3518. +
    3519. 

  3519. +extern struct rtc_ops no_rtc_ops;
    3520. 

  3520. +
    3521. 

  3521. +extern void _board_init_irq(void);
    3522. 

  3522. +extern void	(*board_init_irq)(void);
    3523. 

  3523. +
    3524. 

  3524. +#ifdef CONFIG_BLK_DEV_IDE_AU1XXX
    3525. 

  3525. +extern struct ide_ops *ide_ops;
    3526. 

  3526. +extern struct ide_ops au1xxx_ide_ops;
    3527. 

  3527. +extern u32 au1xxx_ide_virtbase;
    3528. 

  3528. +extern u64 au1xxx_ide_physbase;
    3529. 

  3529. +extern int au1xxx_ide_irq;
    3530. 

  3530. +
    3531. 

  3531. +u32 led_base_addr;
    3532. 

  3532. +/* Ddma */
    3533. 

  3533. +chan_tab_t *ide_read_ch, *ide_write_ch;
    3534. 

  3534. +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
    3535. 

  3535. +
    3536. 

  3536. +dbdev_tab_t new_dbdev_tab_element = { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 };
    3537. 

  3537. +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
    3538. 

  3538. +
    3539. 

  3539. +void board_reset (void)
    3540. 

  3540. +{
    3541. 

  3541. +	bcsr->resets = 0;
    3542. 

  3542. +}
    3543. 

  3543. +
    3544. 

  3544. +void board_power_off (void)
    3545. 

  3545. +{
    3546. 

  3546. +	bcsr->resets = 0xC000;
    3547. 

  3547. +}
    3548. 

  3548. +
    3549. 

  3549. +void __init board_setup(void)
    3550. 

  3550. +{
    3551. 

  3551. +	char *argptr = NULL;
    3552. 

  3552. +	u32 pin_func;
    3553. 

  3553. +	rtc_ops = &no_rtc_ops;
    3554. 

  3554. +
    3555. 

  3555. +#if 0
    3556. 

  3556. +	/* Enable PSC1 SYNC for AC97.  Normaly done in audio driver,
    3557. 

  3557. +	 * but it is board specific code, so put it here.
    3558. 

  3558. +	 */
    3559. 

  3559. +	pin_func = au_readl(SYS_PINFUNC);
    3560. 

  3560. +	au_sync();
    3561. 

  3561. +	pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
    3562. 

  3562. +	au_writel(pin_func, SYS_PINFUNC);
    3563. 

  3563. +
    3564. 

  3564. +	au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
    3565. 

  3565. +	au_sync();
    3566. 

  3566. +#endif
    3567. 

  3567. +
    3568. 

  3568. +#if defined( CONFIG_I2C_ALGO_AU1550 )
    3569. 

  3569. +	{
    3570. 

  3570. +	u32 freq0, clksrc;
    3571. 

  3571. +
    3572. 

  3572. +	/* Select SMBUS in CPLD */
    3573. 

  3573. +	bcsr->resets &= ~(BCSR_RESETS_PCS0MUX);
    3574. 

  3574. +
    3575. 

  3575. +	pin_func = au_readl(SYS_PINFUNC);
    3576. 

  3576. +	au_sync();
    3577. 

  3577. +	pin_func &= ~(3<<17 | 1<<4);
    3578. 

  3578. +	/* Set GPIOs correctly */
    3579. 

  3579. +	pin_func |= 2<<17;
    3580. 

  3580. +	au_writel(pin_func, SYS_PINFUNC);
    3581. 

  3581. +	au_sync();
    3582. 

  3582. +
    3583. 

  3583. +	/* The i2c driver depends on 50Mhz clock */
    3584. 

  3584. +	freq0 = au_readl(SYS_FREQCTRL0);
    3585. 

  3585. +	au_sync();
    3586. 

  3586. +	freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
    3587. 

  3587. +	freq0 |= (3<<SYS_FC_FRDIV1_BIT);
    3588. 

  3588. +	/* 396Mhz / (3+1)*2 == 49.5Mhz */
    3589. 

  3589. +	au_writel(freq0, SYS_FREQCTRL0);
    3590. 

  3590. +	au_sync();
    3591. 

  3591. +	freq0 |= SYS_FC_FE1;
    3592. 

  3592. +	au_writel(freq0, SYS_FREQCTRL0);
    3593. 

  3593. +	au_sync();
    3594. 

  3594. +
    3595. 

  3595. +	clksrc = au_readl(SYS_CLKSRC);
    3596. 

  3596. +	au_sync();
    3597. 

  3597. +	clksrc &= ~0x01f00000;
    3598. 

  3598. +	/* bit 22 is EXTCLK0 for PSC0 */
    3599. 

  3599. +	clksrc |= (0x3 << 22);
    3600. 

  3600. +	au_writel(clksrc, SYS_CLKSRC);
    3601. 

  3601. +	au_sync();
    3602. 

  3602. +	}
    3603. 

  3603. +#endif
    3604. 

  3604. +
    3605. 

  3605. +#ifdef CONFIG_FB_AU1200
    3606. 

  3606. +	argptr = prom_getcmdline();
    3607. 

  3607. +	strcat(argptr, " video=au1200fb:");
    3608. 

  3608. +#endif
    3609. 

  3609. +
    3610. 

  3610. +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
    3611. 

  3611. +	/*
    3612. 

  3612. +	 * Iniz IDE parameters
    3613. 

  3613. +	 */
    3614. 

  3614. +	ide_ops = &au1xxx_ide_ops;
    3615. 

  3615. +	au1xxx_ide_irq = PB1200_IDE_INT;
    3616. 

  3616. +	au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
    3617. 

  3617. +	au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
    3618. 

  3618. +	/*
    3619. 

  3619. +	 * change PIO or PIO+Ddma
    3620. 

  3620. +	 * check the GPIO-5 pin condition. pb1200:s18_dot */
    3621. 

  3621. +	switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 5)) ? 1 : 0; 
    3622. 

  3622. +#endif
    3623. 

  3623. +
    3624. 

  3624. +	/* The Pb1200 development board uses external MUX for PSC0 to
    3625. 

  3625. +	support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
    3626. 

  3626. +	*/
    3627. 

  3627. +#if defined(CONFIG_AU1550_PSC_SPI) && defined(CONFIG_I2C_ALGO_AU1550)
    3628. 

  3628. +	#error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\
    3629. 

  3629. +			Refer to Pb1200/Db1200 documentation.
    3630. 

  3630. +#elif defined( CONFIG_AU1550_PSC_SPI )
    3631. 

  3631. +	bcsr->resets |= BCSR_RESETS_PCS0MUX;
    3632. 

  3632. +#elif defined( CONFIG_I2C_ALGO_AU1550 )
    3633. 

  3633. +	bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
    3634. 

  3634. +#endif
    3635. 

  3635. +	au_sync();
    3636. 

  3636. +
    3637. 

  3637. +#ifdef CONFIG_MIPS_PB1200
    3638. 

  3638. +	printk("AMD Alchemy Pb1200 Board\n");
    3639. 

  3639. +#endif
    3640. 

  3640. +#ifdef CONFIG_MIPS_DB1200
    3641. 

  3641. +	printk("AMD Alchemy Db1200 Board\n");
    3642. 

  3642. +#endif
    3643. 

  3643. +
    3644. 

  3644. +	/* Setup Pb1200 External Interrupt Controller */
    3645. 

  3645. +	{
    3646. 

  3646. +		extern void (*board_init_irq)(void);
    3647. 

  3647. +		extern void _board_init_irq(void);
    3648. 

  3648. +		board_init_irq = _board_init_irq;
    3649. 

  3649. +	}
    3650. 

  3650. +}
    3651. 

  3651. +
    3652. 

  3652. +int
    3653. 

  3653. +board_au1200fb_panel (void)
    3654. 

  3654. +{
    3655. 

  3655. +	BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
    3656. 

  3656. +	int p;
    3657. 

  3657. +
    3658. 

  3658. +	p = bcsr->switches;
    3659. 

  3659. +	p >>= 8;
    3660. 

  3660. +	p &= 0x0F;
    3661. 

  3661. +	return p;
    3662. 

  3662. +}
    3663. 

  3663. +
    3664. 

  3664. +int
    3665. 

  3665. +board_au1200fb_panel_init (void)
    3666. 

  3666. +{
    3667. 

  3667. +	/* Apply power */
    3668. 

  3668. +    BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
    3669. 

  3669. +	bcsr->board |= (BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
    3670. 

  3670. +	return 0;
    3671. 

  3671. +}
    3672. 

  3672. +
    3673. 

  3673. +int
    3674. 

  3674. +board_au1200fb_panel_shutdown (void)
    3675. 

  3675. +{
    3676. 

  3676. +	/* Remove power */
    3677. 

  3677. +    BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
    3678. 

  3678. +	bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
    3679. 

  3679. +	return 0;
    3680. 

  3680. +}
    3681. 

  3681. +
    3682. 

  3682. --- /dev/null
    3683. 

  3683. +++ b/arch/mips/au1000/pb1200/init.c
    3684. 

  3684. @@ -0,0 +1,72 @@
    3685. 

  3685. +/*
    3686. 

  3686. + *
    3687. 

  3687. + * BRIEF MODULE DESCRIPTION
    3688. 

  3688. + *	PB1200 board setup
    3689. 

  3689. + *
    3690. 

  3690. + *  This program is free software; you can redistribute  it and/or modify it
    3691. 

  3691. + *  under  the terms of  the GNU General  Public License as published by the
    3692. 

  3692. + *  Free Software Foundation;  either version 2 of the  License, or (at your
    3693. 

  3693. + *  option) any later version.
    3694. 

  3694. + *
    3695. 

  3695. + *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
    3696. 

  3696. + *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
    3697. 

  3697. + *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
    3698. 

  3698. + *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
    3699. 

  3699. + *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
    3700. 

  3700. + *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
    3701. 

  3701. + *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
    3702. 

  3702. + *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
    3703. 

  3703. + *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
    3704. 

  3704. + *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    3705. 

  3705. + *
    3706. 

  3706. + *  You should have received a copy of the  GNU General Public License along
    3707. 

  3707. + *  with this program; if not, write  to the Free Software Foundation, Inc.,
    3708. 

  3708. + *  675 Mass Ave, Cambridge, MA 02139, USA.
    3709. 

  3709. + */
    3710. 

  3710. +
    3711. 

  3711. +#include <linux/init.h>
    3712. 

  3712. +#include <linux/mm.h>
    3713. 

  3713. +#include <linux/sched.h>
    3714. 

  3714. +#include <linux/bootmem.h>
    3715. 

  3715. +#include <asm/addrspace.h>
    3716. 

  3716. +#include <asm/bootinfo.h>
    3717. 

  3717. +#include <linux/config.h>
    3718. 

  3718. +#include <linux/string.h>
    3719. 

  3719. +#include <linux/kernel.h>
    3720. 

  3720. +#include <linux/sched.h>
    3721. 

  3721. +
    3722. 

  3722. +int prom_argc;
    3723. 

  3723. +char **prom_argv, **prom_envp;
    3724. 

  3724. +extern void  __init prom_init_cmdline(void);
    3725. 

  3725. +extern char *prom_getenv(char *envname);
    3726. 

  3726. +
    3727. 

  3727. +const char *get_system_type(void)
    3728. 

  3728. +{
    3729. 

  3729. +	return "AMD Alchemy Au1200/Pb1200";
    3730. 

  3730. +}
    3731. 

  3731. +
    3732. 

  3732. +u32 mae_memsize = 0;
    3733. 

  3733. +
    3734. 

  3734. +int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
    3735. 

  3735. +{
    3736. 

  3736. +	unsigned char *memsize_str;
    3737. 

  3737. +	unsigned long memsize;
    3738. 

  3738. +
    3739. 

  3739. +	prom_argc = argc;
    3740. 

  3740. +	prom_argv = argv;
    3741. 

  3741. +	prom_envp = envp;
    3742. 

  3742. +
    3743. 

  3743. +	mips_machgroup = MACH_GROUP_ALCHEMY;
    3744. 

  3744. +	mips_machtype = MACH_PB1000;	/* set the platform # */   
    3745. 

  3745. +	prom_init_cmdline();
    3746. 

  3746. +
    3747. 

  3747. +	memsize_str = prom_getenv("memsize");
    3748. 

  3748. +	if (!memsize_str) {
    3749. 

  3749. +		memsize = 0x08000000;
    3750. 

  3750. +	} else {
    3751. 

  3751. +		memsize = simple_strtol(memsize_str, NULL, 0);
    3752. 

  3752. +	}
    3753. 

  3753. +	add_memory_region(0, memsize, BOOT_MEM_RAM);
    3754. 

  3754. +	return 0;
    3755. 

  3755. +}
    3756. 

  3756. +
    3757. 

  3757. --- /dev/null
    3758. 

  3758. +++ b/arch/mips/au1000/pb1200/irqmap.c
    3759. 

  3759. @@ -0,0 +1,180 @@
    3760. 

  3760. +/*
    3761. 

  3761. + * BRIEF MODULE DESCRIPTION
    3762. 

  3762. + *	Au1xxx irq map table
    3763. 

  3763. + *
    3764. 

  3764. + *  This program is free software; you can redistribute	 it and/or modify it
    3765. 

  3765. + *  under  the terms of	 the GNU General  Public License as published by the
    3766. 

  3766. + *  Free Software Foundation;  either version 2 of the	License, or (at your
    3767. 

  3767. + *  option) any later version.
    3768. 

  3768. + *
    3769. 

  3769. + *  THIS  SOFTWARE  IS PROVIDED	  ``AS	IS'' AND   ANY	EXPRESS OR IMPLIED
    3770. 

  3770. + *  WARRANTIES,	  INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
    3771. 

  3771. + *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
    3772. 

  3772. + *  NO	EVENT  SHALL   THE AUTHOR  BE	 LIABLE FOR ANY	  DIRECT, INDIRECT,
    3773. 

  3773. + *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
    3774. 

  3774. + *  NOT LIMITED	  TO, PROCUREMENT OF  SUBSTITUTE GOODS	OR SERVICES; LOSS OF
    3775. 

  3775. + *  USE, DATA,	OR PROFITS; OR	BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
    3776. 

  3776. + *  ANY THEORY OF LIABILITY, WHETHER IN	 CONTRACT, STRICT LIABILITY, OR TORT
    3777. 

  3777. + *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
    3778. 

  3778. + *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    3779. 

  3779. + *
    3780. 

  3780. + *  You should have received a copy of the  GNU General Public License along
    3781. 

  3781. + *  with this program; if not, write  to the Free Software Foundation, Inc.,
    3782. 

  3782. + *  675 Mass Ave, Cambridge, MA 02139, USA.
    3783. 

  3783. + */
    3784. 

  3784. +#include <linux/errno.h>
    3785. 

  3785. +#include <linux/init.h>
    3786. 

  3786. +#include <linux/irq.h>
    3787. 

  3787. +#include <linux/kernel_stat.h>
    3788. 

  3788. +#include <linux/module.h>
    3789. 

  3789. +#include <linux/signal.h>
    3790. 

  3790. +#include <linux/sched.h>
    3791. 

  3791. +#include <linux/types.h>
    3792. 

  3792. +#include <linux/interrupt.h>
    3793. 

  3793. +#include <linux/ioport.h>
    3794. 

  3794. +#include <linux/timex.h>
    3795. 

  3795. +#include <linux/slab.h>
    3796. 

  3796. +#include <linux/random.h>
    3797. 

  3797. +#include <linux/delay.h>
    3798. 

  3798. +
    3799. 

  3799. +#include <asm/bitops.h>
    3800. 

  3800. +#include <asm/bootinfo.h>
    3801. 

  3801. +#include <asm/io.h>
    3802. 

  3802. +#include <asm/mipsregs.h>
    3803. 

  3803. +#include <asm/system.h>
    3804. 

  3804. +#include <asm/au1000.h>
    3805. 

  3805. +
    3806. 

  3806. +#ifdef CONFIG_MIPS_PB1200
    3807. 

  3807. +#include <asm/pb1200.h>
    3808. 

  3808. +#endif
    3809. 

  3809. +
    3810. 

  3810. +#ifdef CONFIG_MIPS_DB1200
    3811. 

  3811. +#include <asm/db1200.h>
    3812. 

  3812. +#define PB1200_INT_BEGIN DB1200_INT_BEGIN
    3813. 

  3813. +#define PB1200_INT_END DB1200_INT_END
    3814. 

  3814. +#endif
    3815. 

  3815. +
    3816. 

  3816. +au1xxx_irq_map_t au1xxx_irq_map[] = {
    3817. 

  3817. +	{ AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 }, // This is exteranl interrupt cascade
    3818. 

  3818. +};
    3819. 

  3819. +
    3820. 

  3820. +int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
    3821. 

  3821. +
    3822. 

  3822. +/*
    3823. 

  3823. + *	Support for External interrupts on the PbAu1200 Development platform.
    3824. 

  3824. + */
    3825. 

  3825. +static volatile int pb1200_cascade_en=0;
    3826. 

  3826. +
    3827. 

  3827. +void pb1200_cascade_handler( int irq, void *dev_id, struct pt_regs *regs)
    3828. 

  3828. +{
    3829. 

  3829. +	unsigned short bisr = bcsr->int_status;
    3830. 

  3830. +	int extirq_nr = 0;
    3831. 

  3831. +
    3832. 

  3832. +	/* Clear all the edge interrupts. This has no effect on level */
    3833. 

  3833. +	bcsr->int_status = bisr;
    3834. 

  3834. +	for( ; bisr; bisr &= (bisr-1) )
    3835. 

  3835. +	{
    3836. 

  3836. +		extirq_nr = (PB1200_INT_BEGIN-1) + au_ffs(bisr);
    3837. 

  3837. +		/* Ack and dispatch IRQ */
    3838. 

  3838. +		do_IRQ(extirq_nr,regs);
    3839. 

  3839. +	}
    3840. 

  3840. +}
    3841. 

  3841. +
    3842. 

  3842. +inline void pb1200_enable_irq(unsigned int irq_nr)
    3843. 

  3843. +{
    3844. 

  3844. +	bcsr->intset_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
    3845. 

  3845. +	bcsr->intset = 1<<(irq_nr - PB1200_INT_BEGIN);
    3846. 

  3846. +}
    3847. 

  3847. +
    3848. 

  3848. +inline void pb1200_disable_irq(unsigned int irq_nr)
    3849. 

  3849. +{
    3850. 

  3850. +	bcsr->intclr_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
    3851. 

  3851. +	bcsr->intclr = 1<<(irq_nr - PB1200_INT_BEGIN);
    3852. 

  3852. +}
    3853. 

  3853. +
    3854. 

  3854. +static unsigned int pb1200_startup_irq( unsigned int irq_nr )
    3855. 

  3855. +{
    3856. 

  3856. +	if (++pb1200_cascade_en == 1)
    3857. 

  3857. +	{
    3858. 

  3858. +		request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
    3859. 

  3859. +			0, "Pb1200 Cascade", &pb1200_cascade_handler );
    3860. 

  3860. +#ifdef CONFIG_MIPS_PB1200
    3861. 

  3861. +    /* We have a problem with CPLD rev3. Enable a workaround */
    3862. 

  3862. +	if( ((bcsr->whoami & BCSR_WHOAMI_CPLD)>>4) <= 3)
    3863. 

  3863. +	{
    3864. 

  3864. +		printk("\nWARNING!!!\n");
    3865. 

  3865. +		printk("\nWARNING!!!\n");
    3866. 

  3866. +		printk("\nWARNING!!!\n");
    3867. 

  3867. +		printk("\nWARNING!!!\n");
    3868. 

  3868. +		printk("\nWARNING!!!\n");
    3869. 

  3869. +		printk("\nWARNING!!!\n");
    3870. 

  3870. +		printk("Pb1200 must be at CPLD rev4. Please have Pb1200\n");
    3871. 

  3871. +		printk("updated to latest revision. This software will not\n");
    3872. 

  3872. +		printk("work on anything less than CPLD rev4\n");
    3873. 

  3873. +		printk("\nWARNING!!!\n");
    3874. 

  3874. +		printk("\nWARNING!!!\n");
    3875. 

  3875. +		printk("\nWARNING!!!\n");
    3876. 

  3876. +		printk("\nWARNING!!!\n");
    3877. 

  3877. +		printk("\nWARNING!!!\n");
    3878. 

  3878. +		printk("\nWARNING!!!\n");
    3879. 

  3879. +		while(1);
    3880. 

  3880. +	}
    3881. 

  3881. +#endif
    3882. 

  3882. +	}
    3883. 

  3883. +	pb1200_enable_irq(irq_nr);
    3884. 

  3884. +	return 0;
    3885. 

  3885. +}
    3886. 

  3886. +
    3887. 

  3887. +static void pb1200_shutdown_irq( unsigned int irq_nr )
    3888. 

  3888. +{
    3889. 

  3889. +	pb1200_disable_irq(irq_nr);
    3890. 

  3890. +	if (--pb1200_cascade_en == 0)
    3891. 

  3891. +	{
    3892. 

  3892. +		free_irq(AU1000_GPIO_7,&pb1200_cascade_handler );
    3893. 

  3893. +	}
    3894. 

  3894. +	return;
    3895. 

  3895. +}
    3896. 

  3896. +
    3897. 

  3897. +static inline void pb1200_mask_and_ack_irq(unsigned int irq_nr)
    3898. 

  3898. +{
    3899. 

  3899. +	pb1200_disable_irq( irq_nr );
    3900. 

  3900. +}
    3901. 

  3901. +
    3902. 

  3902. +static void pb1200_end_irq(unsigned int irq_nr)
    3903. 

  3903. +{
    3904. 

  3904. +	if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
    3905. 

  3905. +		pb1200_enable_irq(irq_nr);
    3906. 

  3906. +	}
    3907. 

  3907. +}
    3908. 

  3908. +
    3909. 

  3909. +static struct hw_interrupt_type external_irq_type =
    3910. 

  3910. +{
    3911. 

  3911. +#ifdef CONFIG_MIPS_PB1200
    3912. 

  3912. +	"Pb1200 Ext",
    3913. 

  3913. +#endif
    3914. 

  3914. +#ifdef CONFIG_MIPS_DB1200
    3915. 

  3915. +	"Db1200 Ext",
    3916. 

  3916. +#endif
    3917. 

  3917. +	pb1200_startup_irq,
    3918. 

  3918. +	pb1200_shutdown_irq,
    3919. 

  3919. +	pb1200_enable_irq,
    3920. 

  3920. +	pb1200_disable_irq,
    3921. 

  3921. +	pb1200_mask_and_ack_irq,
    3922. 

  3922. +	pb1200_end_irq,
    3923. 

  3923. +	NULL
    3924. 

  3924. +};
    3925. 

  3925. +
    3926. 

  3926. +void _board_init_irq(void)
    3927. 

  3927. +{
    3928. 

  3928. +	int irq_nr;
    3929. 

  3929. +
    3930. 

  3930. +	for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++)
    3931. 

  3931. +	{
    3932. 

  3932. +		irq_desc[irq_nr].handler = &external_irq_type;
    3933. 

  3933. +		pb1200_disable_irq(irq_nr);
    3934. 

  3934. +	}
    3935. 

  3935. +
    3936. 

  3936. +	/* GPIO_7 can not be hooked here, so it is hooked upon first
    3937. 

  3937. +	request of any source attached to the cascade */
    3938. 

  3938. +}
    3939. 

  3939. +
    3940. 

  3940. --- /dev/null
    3941. 

  3941. +++ b/arch/mips/au1000/pb1200/Makefile
    3942. 

  3942. @@ -0,0 +1,25 @@
    3943. 

  3943. +#
    3944. 

  3944. +#  Copyright 2000 MontaVista Software Inc.
    3945. 

  3945. +#  Author: MontaVista Software, Inc.
    3946. 

  3946. +#     	ppopov@mvista.com or source@mvista.com
    3947. 

  3947. +#
    3948. 

  3948. +# Makefile for the Alchemy Semiconductor PB1000 board.
    3949. 

  3949. +#
    3950. 

  3950. +# Note! Dependencies are done automagically by 'make dep', which also
    3951. 

  3951. +# removes any old dependencies. DON'T put your own dependencies here
    3952. 

  3952. +# unless it's something special (ie not a .c file).
    3953. 

  3953. +#
    3954. 

  3954. +
    3955. 

  3955. +USE_STANDARD_AS_RULE := true
    3956. 

  3956. +
    3957. 

  3957. +O_TARGET := pb1200.o
    3958. 

  3958. +
    3959. 

  3959. +obj-y := init.o board_setup.o irqmap.o
    3960. 

  3960. +
    3961. 

  3961. +ifdef CONFIG_MMC
    3962. 

  3962. +obj-y += mmc_support.o
    3963. 

  3963. +export-objs +=mmc_support.o
    3964. 

  3964. +endif
    3965. 

  3965. +
    3966. 

  3966. +
    3967. 

  3967. +include $(TOPDIR)/Rules.make
    3968. 

  3968. --- /dev/null
    3969. 

  3969. +++ b/arch/mips/au1000/pb1200/mmc_support.c
    3970. 

  3970. @@ -0,0 +1,141 @@
    3971. 

  3971. +/*
    3972. 

  3972. + * BRIEF MODULE DESCRIPTION
    3973. 

  3973. + *
    3974. 

  3974. + *	MMC support routines for PB1200.
    3975. 

  3975. + *
    3976. 

  3976. + *
    3977. 

  3977. + * Copyright (c) 2003-2004 Embedded Edge, LLC.
    3978. 

  3978. + * Author: Embedded Edge, LLC.
    3979. 

  3979. + * Contact: dan@embeddededge.com
    3980. 

  3980. + *
    3981. 

  3981. + *  This program is free software; you can redistribute  it and/or modify it
    3982. 

  3982. + *  under  the terms of  the GNU General  Public License as published by the
    3983. 

  3983. + *  Free Software Foundation;  either version 2 of the  License, or (at your
    3984. 

  3984. + *  option) any later version.
    3985. 

  3985. + *
    3986. 

  3986. + *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
    3987. 

  3987. + *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
    3988. 

  3988. + *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
    3989. 

  3989. + *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
    3990. 

  3990. + *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
    3991. 

  3991. + *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
    3992. 

  3992. + *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
    3993. 

  3993. + *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
    3994. 

  3994. + *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
    3995. 

  3995. + *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    3996. 

  3996. + *
    3997. 

  3997. + *  You should have received a copy of the  GNU General Public License along
    3998. 

  3998. + *  with this program; if not, write  to the Free Software Foundation, Inc.,
    3999. 

  3999. + *  675 Mass Ave, Cambridge, MA 02139, USA.
    4000. 

  4000. + *
    4001. 

  4001. + */
    4002. 

  4002. +
    4003. 

  4003. +
    4004. 

  4004. +#include <linux/config.h>
    4005. 

  4005. +#include <linux/kernel.h>
    4006. 

  4006. +#include <linux/module.h>
    4007. 

  4007. +#include <linux/init.h>
    4008. 

  4008. +
    4009. 

  4009. +#include <asm/irq.h>
    4010. 

  4010. +#include <asm/au1000.h>
    4011. 

  4011. +#include <asm/au1100_mmc.h>
    4012. 

  4012. +
    4013. 

  4013. +#ifdef CONFIG_MIPS_PB1200
    4014. 

  4014. +#include <asm/pb1200.h>
    4015. 

  4015. +#endif
    4016. 

  4016. +
    4017. 

  4017. +#ifdef CONFIG_MIPS_DB1200
    4018. 

  4018. +/* NOTE: DB1200 only has SD0 pinned out and usable */
    4019. 

  4019. +#include <asm/db1200.h>
    4020. 

  4020. +#endif
    4021. 

  4021. +
    4022. 

  4022. +/* SD/MMC controller support functions */
    4023. 

  4023. +
    4024. 

  4024. +/*
    4025. 

  4025. + * Detect card.
    4026. 

  4026. + */
    4027. 

  4027. +void mmc_card_inserted(int socket, int *result)
    4028. 

  4028. +{
    4029. 

  4029. +	u16 mask;
    4030. 

  4030. +
    4031. 

  4031. +	if (socket)
    4032. 

  4032. +#ifdef CONFIG_MIPS_DB1200
    4033. 

  4033. +		mask = 0;
    4034. 

  4034. +#else
    4035. 

  4035. +		mask = BCSR_INT_SD1INSERT; 
    4036. 

  4036. +#endif
    4037. 

  4037. +	else
    4038. 

  4038. +		mask = BCSR_INT_SD0INSERT;
    4039. 

  4039. +
    4040. 

  4040. +	*result = ((bcsr->sig_status & mask) != 0);
    4041. 

  4041. +}
    4042. 

  4042. +
    4043. 

  4043. +/*
    4044. 

  4044. + * Check card write protection.
    4045. 

  4045. + */
    4046. 

  4046. +void mmc_card_writable(int socket, int *result)
    4047. 

  4047. +{
    4048. 

  4048. +	u16 mask;
    4049. 

  4049. +
    4050. 

  4050. +	if (socket)
    4051. 

  4051. +#ifdef CONFIG_MIPS_DB1200
    4052. 

  4052. +		mask = 0;
    4053. 

  4053. +#else
    4054. 

  4054. +		mask = BCSR_STATUS_SD1WP; 
    4055. 

  4055. +#endif
    4056. 

  4056. +	else
    4057. 

  4057. +		mask = BCSR_STATUS_SD0WP;
    4058. 

  4058. +
    4059. 

  4059. +	/* low means card writable */
    4060. 

  4060. +	if (!(bcsr->status & mask)) {
    4061. 

  4061. +		*result = 1;
    4062. 

  4062. +	} else {
    4063. 

  4063. +		*result = 0;
    4064. 

  4064. +	}
    4065. 

  4065. +}
    4066. 

  4066. +
    4067. 

  4067. +/*
    4068. 

  4068. + * Apply power to card slot.
    4069. 

  4069. + */
    4070. 

  4070. +void mmc_power_on(int socket)
    4071. 

  4071. +{
    4072. 

  4072. +	u16 mask;
    4073. 

  4073. +
    4074. 

  4074. +	if (socket)
    4075. 

  4075. +#ifdef CONFIG_MIPS_DB1200
    4076. 

  4076. +		mask = 0;
    4077. 

  4077. +#else
    4078. 

  4078. +		mask = BCSR_BOARD_SD1PWR;
    4079. 

  4079. +#endif
    4080. 

  4080. +	else
    4081. 

  4081. +		mask = BCSR_BOARD_SD0PWR;
    4082. 

  4082. +
    4083. 

  4083. +	bcsr->board |= mask;
    4084. 

  4084. +	au_sync_delay(1);
    4085. 

  4085. +}
    4086. 

  4086. +
    4087. 

  4087. +/*
    4088. 

  4088. + * Remove power from card slot.
    4089. 

  4089. + */
    4090. 

  4090. +void mmc_power_off(int socket)
    4091. 

  4091. +{
    4092. 

  4092. +	u16 mask;
    4093. 

  4093. +
    4094. 

  4094. +	if (socket)
    4095. 

  4095. +#ifdef CONFIG_MIPS_DB1200
    4096. 

  4096. +		mask = 0;
    4097. 

  4097. +#else
    4098. 

  4098. +		mask = BCSR_BOARD_SD1PWR;
    4099. 

  4099. +#endif
    4100. 

  4100. +	else
    4101. 

  4101. +		mask = BCSR_BOARD_SD0PWR;
    4102. 

  4102. +
    4103. 

  4103. +	bcsr->board &= ~mask;
    4104. 

  4104. +	au_sync_delay(1);
    4105. 

  4105. +}
    4106. 

  4106. +
    4107. 

  4107. +EXPORT_SYMBOL(mmc_card_inserted);
    4108. 

  4108. +EXPORT_SYMBOL(mmc_card_writable);
    4109. 

  4109. +EXPORT_SYMBOL(mmc_power_on);
    4110. 

  4110. +EXPORT_SYMBOL(mmc_power_off);
    4111. 

  4111. +
    4112. 

  4112. --- a/arch/mips/au1000/pb1500/board_setup.c
    4113. 

  4113. +++ b/arch/mips/au1000/pb1500/board_setup.c
    4114. 

  4114. @@ -62,6 +62,10 @@ void board_reset (void)
    4115. 

  4115.      au_writel(0x00000000, 0xAE00001C);
    4116. 

  4116.  }
    4117. 

  4117.  
    4118. 

  4118. +void board_power_off (void)
    4119. 

  4119. +{
    4120. 

  4120. +}
    4121. 

  4121. +
    4122. 

  4122.  void __init board_setup(void)
    4123. 

  4123.  {
    4124. 

  4124.  	u32 pin_func;
    4125. 

  4125. --- a/arch/mips/au1000/pb1550/board_setup.c
    4126. 

  4126. +++ b/arch/mips/au1000/pb1550/board_setup.c
    4127. 

  4127. @@ -48,12 +48,31 @@
    4128. 

  4128.  
    4129. 

  4129.  extern struct rtc_ops no_rtc_ops;
    4130. 

  4130.  
    4131. 

  4131. +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
    4132. 

  4132. +extern struct ide_ops *ide_ops;
    4133. 

  4133. +extern struct ide_ops au1xxx_ide_ops;
    4134. 

  4134. +extern u32 au1xxx_ide_virtbase;
    4135. 

  4135. +extern u64 au1xxx_ide_physbase;
    4136. 

  4136. +extern unsigned int au1xxx_ide_irq;
    4137. 

  4137. +
    4138. 

  4138. +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
    4139. 

  4139. +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
    4140. 

  4140. +
    4141. 

  4141.  void board_reset (void)
    4142. 

  4142.  {
    4143. 

  4143.      /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
    4144. 

  4144.  	au_writew(au_readw(0xAF00001C) & ~(1<<15), 0xAF00001C);
    4145. 

  4145.  }
    4146. 

  4146.  
    4147. 

  4147. +void board_power_off (void)
    4148. 

  4148. +{
    4149. 

  4149. +	/* power off system */
    4150. 

  4150. +	printk("\n** Powering off Pb1550\n");
    4151. 

  4151. +	au_writew(au_readw(0xAF00001C) | (3<<14), 0xAF00001C); 
    4152. 

  4152. +	au_sync();
    4153. 

  4153. +	while(1); /* should not get here */
    4154. 

  4154. +}
    4155. 

  4155. +
    4156. 

  4156.  void __init board_setup(void)
    4157. 

  4157.  {
    4158. 

  4158.  	u32 pin_func;
    4159. 

  4159. @@ -78,5 +97,36 @@ void __init board_setup(void)
    4160. 

  4160.  	au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
    4161. 

  4161.  	au_sync();
    4162. 

  4162.  
    4163. 

  4163. +#if defined(CONFIG_AU1XXX_SMC91111)
    4164. 

  4164. +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
    4165. 

  4165. +#error "Resource conflict occured. Disable either Ethernet or IDE daughter card."
    4166. 

  4166. +#else
    4167. 

  4167. +#define CPLD_CONTROL (0xAF00000C)
    4168. 

  4168. +	{
    4169. 

  4169. +	/* set up the Static Bus timing */
    4170. 

  4170. +	/* only 396Mhz */
    4171. 

  4171. +	/* reset the DC */
    4172. 

  4172. +	au_writew(au_readw(CPLD_CONTROL) | 0x0f, CPLD_CONTROL);
    4173. 

  4173. +	au_writel(0x00010003, MEM_STCFG0);
    4174. 

  4174. +	au_writel(0x000c00c0, MEM_STCFG2);
    4175. 

  4175. +	au_writel(0x85E1900D, MEM_STTIME2);
    4176. 

  4176. +	}
    4177. 

  4177. +#endif
    4178. 

  4178. +#endif /* end CONFIG_SMC91111 */
    4179. 

  4179. +
    4180. 

  4180. +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
    4181. 

  4181. +	/*
    4182. 

  4182. +	 * Iniz IDE parameters
    4183. 

  4183. +	 */
    4184. 

  4184. +	ide_ops = &au1xxx_ide_ops;
    4185. 

  4185. +	au1xxx_ide_irq = DAUGHTER_CARD_IRQ;;
    4186. 

  4186. +	au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
    4187. 

  4187. +	au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
    4188. 

  4188. +	/*
    4189. 

  4189. +	 * change PIO or PIO+Ddma
    4190. 

  4190. +	 * check the GPIO-6 pin condition. pb1550:s15_dot
    4191. 

  4191. +	 */
    4192. 

  4192. +	switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 6)) ? 1 : 0;
    4193. 

  4193. +#endif
    4194. 

  4194.  	printk("AMD Alchemy Pb1550 Board\n");
    4195. 

  4195.  }
    4196. 

  4196. --- a/arch/mips/au1000/pb1550/irqmap.c
    4197. 

  4197. +++ b/arch/mips/au1000/pb1550/irqmap.c
    4198. 

  4198. @@ -50,6 +50,9 @@
    4199. 

  4199.  au1xxx_irq_map_t au1xxx_irq_map[] = {
    4200. 

  4200.  	{ AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 },
    4201. 

  4201.  	{ AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 },
    4202. 

  4202. +#ifdef CONFIG_AU1XXX_SMC91111
    4203. 

  4203. +	{ AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 },
    4204. 

  4204. +#endif
    4205. 

  4205.  };
    4206. 

  4206.  
    4207. 

  4207.  int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
    4208. 

  4208. --- a/arch/mips/config-shared.in
    4209. 

  4209. +++ b/arch/mips/config-shared.in
    4210. 

  4210. @@ -21,16 +21,19 @@ mainmenu_option next_comment
    4211. 

  4211.  comment 'Machine selection'
    4212. 

  4212.  dep_bool 'Support for Acer PICA 1 chipset (EXPERIMENTAL)' CONFIG_ACER_PICA_61 $CONFIG_EXPERIMENTAL
    4213. 

  4213.  dep_bool 'Support for Alchemy Bosporus board' CONFIG_MIPS_BOSPORUS $CONFIG_MIPS32
    4214. 

  4214. +dep_bool 'Support for FIC Multimedia Player board' CONFIG_MIPS_FICMMP $CONFIG_MIPS32
    4215. 

  4215.  dep_bool 'Support for Alchemy Mirage board' CONFIG_MIPS_MIRAGE $CONFIG_MIPS32
    4216. 

  4216.  dep_bool 'Support for Alchemy Db1000 board' CONFIG_MIPS_DB1000 $CONFIG_MIPS32
    4217. 

  4217.  dep_bool 'Support for Alchemy Db1100 board' CONFIG_MIPS_DB1100 $CONFIG_MIPS32
    4218. 

  4218.  dep_bool 'Support for Alchemy Db1500 board' CONFIG_MIPS_DB1500 $CONFIG_MIPS32
    4219. 

  4219.  dep_bool 'Support for Alchemy Db1550 board' CONFIG_MIPS_DB1550 $CONFIG_MIPS32
    4220. 

  4220. +dep_bool 'Support for Alchemy Db1200 board' CONFIG_MIPS_DB1200 $CONFIG_MIPS32
    4221. 

  4221.  dep_bool 'Support for Alchemy PB1000 board' CONFIG_MIPS_PB1000 $CONFIG_MIPS32
    4222. 

  4222.  dep_bool 'Support for Alchemy PB1100 board' CONFIG_MIPS_PB1100 $CONFIG_MIPS32
    4223. 

  4223.  dep_bool 'Support for Alchemy PB1500 board' CONFIG_MIPS_PB1500 $CONFIG_MIPS32
    4224. 

  4224. -dep_bool 'Support for Alchemy Hydrogen3 board' CONFIG_MIPS_HYDROGEN3 $CONFIG_MIPS32
    4225. 

  4225.  dep_bool 'Support for Alchemy PB1550 board' CONFIG_MIPS_PB1550 $CONFIG_MIPS32
    4226. 

  4226. +dep_bool 'Support for Alchemy PB1200 board' CONFIG_MIPS_PB1200 $CONFIG_MIPS32
    4227. 

  4227. +dep_bool 'Support for Alchemy Hydrogen3 board' CONFIG_MIPS_HYDROGEN3 $CONFIG_MIPS32
    4228. 

  4228.  dep_bool 'Support for MyCable XXS1500 board' CONFIG_MIPS_XXS1500 $CONFIG_MIPS32
    4229. 

  4229.  dep_bool 'Support for 4G Systems MTX-1 board' CONFIG_MIPS_MTX1 $CONFIG_MIPS32
    4230. 

  4230.  dep_bool 'Support for Cogent CSB250 board' CONFIG_COGENT_CSB250 $CONFIG_MIPS32
    4231. 

  4231. @@ -249,6 +252,12 @@ if [ "$CONFIG_MIPS_MIRAGE" = "y" ]; then
    4232. 

  4232.     define_bool CONFIG_PC_KEYB y
    4233. 

  4233.     define_bool CONFIG_NONCOHERENT_IO y
    4234. 

  4234.  fi
    4235. 

  4235. +if [ "$CONFIG_MIPS_FICMMP" = "y" ]; then
    4236. 

  4236. +   define_bool CONFIG_SOC_AU1X00 y
    4237. 

  4237. +   define_bool CONFIG_SOC_AU1200 y
    4238. 

  4238. +   define_bool CONFIG_NONCOHERENT_IO y
    4239. 

  4239. +   define_bool CONFIG_PC_KEYB y
    4240. 

  4240. +fi
    4241. 

  4241.  if [ "$CONFIG_MIPS_BOSPORUS" = "y" ]; then
    4242. 

  4242.     define_bool CONFIG_SOC_AU1X00 y
    4243. 

  4243.     define_bool CONFIG_SOC_AU1500 y
    4244. 

  4244. @@ -263,6 +272,12 @@ if [ "$CONFIG_MIPS_PB1000" = "y" ]; then
    4245. 

  4245.     define_bool CONFIG_SWAP_IO_SPACE_W y
    4246. 

  4246.     define_bool CONFIG_SWAP_IO_SPACE_L y
    4247. 

  4247.  fi
    4248. 

  4248. +if [ "$CONFIG_MIPS_PB1500" = "y" ]; then
    4249. 

  4249. +   define_bool CONFIG_SOC_AU1X00 y
    4250. 

  4250. +   define_bool CONFIG_SOC_AU1500 y
    4251. 

  4251. +   define_bool CONFIG_NONCOHERENT_IO y
    4252. 

  4252. +   define_bool CONFIG_PC_KEYB y
    4253. 

  4253. +fi
    4254. 

  4254.  if [ "$CONFIG_MIPS_PB1100" = "y" ]; then
    4255. 

  4255.     define_bool CONFIG_SOC_AU1X00 y
    4256. 

  4256.     define_bool CONFIG_SOC_AU1100 y
    4257. 

  4257. @@ -271,9 +286,15 @@ if [ "$CONFIG_MIPS_PB1100" = "y" ]; then
    4258. 

  4258.     define_bool CONFIG_SWAP_IO_SPACE_W y
    4259. 

  4259.     define_bool CONFIG_SWAP_IO_SPACE_L y
    4260. 

  4260.  fi
    4261. 

  4261. -if [ "$CONFIG_MIPS_PB1500" = "y" ]; then
    4262. 

  4262. +if [ "$CONFIG_MIPS_PB1550" = "y" ]; then
    4263. 

  4263.     define_bool CONFIG_SOC_AU1X00 y
    4264. 

  4264. -   define_bool CONFIG_SOC_AU1500 y
    4265. 

  4265. +   define_bool CONFIG_SOC_AU1550 y
    4266. 

  4266. +   define_bool CONFIG_NONCOHERENT_IO n
    4267. 

  4267. +   define_bool CONFIG_PC_KEYB y
    4268. 

  4268. +fi
    4269. 

  4269. +if [ "$CONFIG_MIPS_PB1200" = "y" ]; then
    4270. 

  4270. +   define_bool CONFIG_SOC_AU1X00 y
    4271. 

  4271. +   define_bool CONFIG_SOC_AU1200 y
    4272. 

  4272.     define_bool CONFIG_NONCOHERENT_IO y
    4273. 

  4273.     define_bool CONFIG_PC_KEYB y
    4274. 

  4274.  fi
    4275. 

  4275. @@ -290,18 +311,24 @@ if [ "$CONFIG_MIPS_DB1500" = "y" ]; then
    4276. 

  4276.     define_bool CONFIG_NONCOHERENT_IO y
    4277. 

  4277.     define_bool CONFIG_PC_KEYB y
    4278. 

  4278.  fi
    4279. 

  4279. +if [ "$CONFIG_MIPS_DB1100" = "y" ]; then
    4280. 

  4280. +   define_bool CONFIG_SOC_AU1X00 y
    4281. 

  4281. +   define_bool CONFIG_SOC_AU1100 y
    4282. 

  4282. +   define_bool CONFIG_NONCOHERENT_IO y
    4283. 

  4283. +   define_bool CONFIG_PC_KEYB y
    4284. 

  4284. +   define_bool CONFIG_SWAP_IO_SPACE y
    4285. 

  4285. +fi
    4286. 

  4286.  if [ "$CONFIG_MIPS_DB1550" = "y" ]; then
    4287. 

  4287.     define_bool CONFIG_SOC_AU1X00 y
    4288. 

  4288.     define_bool CONFIG_SOC_AU1550 y
    4289. 

  4289.     define_bool CONFIG_NONCOHERENT_IO y
    4290. 

  4290.     define_bool CONFIG_PC_KEYB y
    4291. 

  4291.  fi
    4292. 

  4292. -if [ "$CONFIG_MIPS_DB1100" = "y" ]; then
    4293. 

  4293. +if [ "$CONFIG_MIPS_DB1200" = "y" ]; then
    4294. 

  4294.     define_bool CONFIG_SOC_AU1X00 y
    4295. 

  4295. -   define_bool CONFIG_SOC_AU1100 y
    4296. 

  4296. +   define_bool CONFIG_SOC_AU1200 y
    4297. 

  4297.     define_bool CONFIG_NONCOHERENT_IO y
    4298. 

  4298.     define_bool CONFIG_PC_KEYB y
    4299. 

  4299. -   define_bool CONFIG_SWAP_IO_SPACE y
    4300. 

  4300.  fi
    4301. 

  4301.  if [ "$CONFIG_MIPS_HYDROGEN3" = "y" ]; then
    4302. 

  4302.     define_bool CONFIG_SOC_AU1X00 y
    4303. 

  4303. @@ -327,12 +354,6 @@ if [ "$CONFIG_COGENT_CSB250" = "y" ]; th
    4304. 

  4304.     define_bool CONFIG_NONCOHERENT_IO y
    4305. 

  4305.     define_bool CONFIG_PC_KEYB y
    4306. 

  4306.  fi
    4307. 

  4307. -if [ "$CONFIG_MIPS_PB1550" = "y" ]; then
    4308. 

  4308. -   define_bool CONFIG_SOC_AU1X00 y
    4309. 

  4309. -   define_bool CONFIG_SOC_AU1550 y
    4310. 

  4310. -   define_bool CONFIG_NONCOHERENT_IO n
    4311. 

  4311. -   define_bool CONFIG_PC_KEYB y
    4312. 

  4312. -fi
    4313. 

  4313.  if [ "$CONFIG_MIPS_COBALT" = "y" ]; then
    4314. 

  4314.     define_bool CONFIG_BOOT_ELF32 y
    4315. 

  4315.     define_bool CONFIG_COBALT_LCD y
    4316. 

  4316. @@ -729,6 +750,13 @@ if [ "$CONFIG_ACER_PICA_61" = "y" -o \
    4317. 

  4317.       "$CONFIG_MIPS_PB1000" = "y" -o \
    4318. 

  4318.       "$CONFIG_MIPS_PB1100" = "y" -o \
    4319. 

  4319.       "$CONFIG_MIPS_PB1500" = "y" -o \
    4320. 

  4320. +     "$CONFIG_MIPS_PB1550" = "y" -o \
    4321. 

  4321. +     "$CONFIG_MIPS_PB1200" = "y" -o \
    4322. 

  4322. +     "$CONFIG_MIPS_DB1000" = "y" -o \
    4323. 

  4323. +     "$CONFIG_MIPS_DB1100" = "y" -o \
    4324. 

  4324. +     "$CONFIG_MIPS_DB1500" = "y" -o \
    4325. 

  4325. +     "$CONFIG_MIPS_DB1550" = "y" -o \
    4326. 

  4326. +     "$CONFIG_MIPS_DB1200" = "y" -o \
    4327. 

  4327.       "$CONFIG_NEC_OSPREY" = "y" -o \
    4328. 

  4328.       "$CONFIG_NEC_EAGLE" = "y" -o \
    4329. 

  4329.       "$CONFIG_NINO" = "y" -o \
    4330. 

  4330. --- a/arch/mips/defconfig
    4331. 

  4331. +++ b/arch/mips/defconfig
    4332. 

  4332. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    4333. 

  4333.  # CONFIG_MIPS_PB1000 is not set
    4334. 

  4334.  # CONFIG_MIPS_PB1100 is not set
    4335. 

  4335.  # CONFIG_MIPS_PB1500 is not set
    4336. 

  4336. -# CONFIG_MIPS_HYDROGEN3 is not set
    4337. 

  4337.  # CONFIG_MIPS_PB1550 is not set
    4338. 

  4338. +# CONFIG_MIPS_HYDROGEN3 is not set
    4339. 

  4339.  # CONFIG_MIPS_XXS1500 is not set
    4340. 

  4340.  # CONFIG_MIPS_MTX1 is not set
    4341. 

  4341.  # CONFIG_COGENT_CSB250 is not set
    4342. 

  4342. @@ -235,11 +235,6 @@ CONFIG_IP_PNP_BOOTP=y
    4343. 

  4343.  #
    4344. 

  4344.  # CONFIG_IPX is not set
    4345. 

  4345.  # CONFIG_ATALK is not set
    4346. 

  4346. -
    4347. 

  4347. -#
    4348. 

  4348. -# Appletalk devices
    4349. 

  4349. -#
    4350. 

  4350. -# CONFIG_DEV_APPLETALK is not set
    4351. 

  4351.  # CONFIG_DECNET is not set
    4352. 

  4352.  # CONFIG_BRIDGE is not set
    4353. 

  4353.  # CONFIG_X25 is not set
    4354. 

  4354. @@ -319,9 +314,11 @@ CONFIG_SGIWD93_SCSI=y
    4355. 

  4355.  # CONFIG_SCSI_MEGARAID is not set
    4356. 

  4356.  # CONFIG_SCSI_MEGARAID2 is not set
    4357. 

  4357.  # CONFIG_SCSI_SATA is not set
    4358. 

  4358. +# CONFIG_SCSI_SATA_AHCI is not set
    4359. 

  4359.  # CONFIG_SCSI_SATA_SVW is not set
    4360. 

  4360.  # CONFIG_SCSI_ATA_PIIX is not set
    4361. 

  4361.  # CONFIG_SCSI_SATA_NV is not set
    4362. 

  4362. +# CONFIG_SCSI_SATA_QSTOR is not set
    4363. 

  4363.  # CONFIG_SCSI_SATA_PROMISE is not set
    4364. 

  4364.  # CONFIG_SCSI_SATA_SX4 is not set
    4365. 

  4365.  # CONFIG_SCSI_SATA_SIL is not set
    4366. 

  4366. @@ -465,7 +462,6 @@ CONFIG_VT_CONSOLE=y
    4367. 

  4367.  # CONFIG_SERIAL is not set
    4368. 

  4368.  # CONFIG_SERIAL_EXTENDED is not set
    4369. 

  4369.  # CONFIG_SERIAL_NONSTANDARD is not set
    4370. 

  4370. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    4371. 

  4371.  CONFIG_UNIX98_PTYS=y
    4372. 

  4372.  CONFIG_UNIX98_PTY_COUNT=256
    4373. 

  4373.  
    4374. 

  4374. --- a/arch/mips/defconfig-atlas
    4375. 

  4375. +++ b/arch/mips/defconfig-atlas
    4376. 

  4376. @@ -28,8 +28,8 @@ CONFIG_EXPERIMENTAL=y
    4377. 

  4377.  # CONFIG_MIPS_PB1000 is not set
    4378. 

  4378.  # CONFIG_MIPS_PB1100 is not set
    4379. 

  4379.  # CONFIG_MIPS_PB1500 is not set
    4380. 

  4380. -# CONFIG_MIPS_HYDROGEN3 is not set
    4381. 

  4381.  # CONFIG_MIPS_PB1550 is not set
    4382. 

  4382. +# CONFIG_MIPS_HYDROGEN3 is not set
    4383. 

  4383.  # CONFIG_MIPS_XXS1500 is not set
    4384. 

  4384.  # CONFIG_MIPS_MTX1 is not set
    4385. 

  4385.  # CONFIG_COGENT_CSB250 is not set
    4386. 

  4386. @@ -235,11 +235,6 @@ CONFIG_IP_PNP=y
    4387. 

  4387.  #
    4388. 

  4388.  # CONFIG_IPX is not set
    4389. 

  4389.  # CONFIG_ATALK is not set
    4390. 

  4390. -
    4391. 

  4391. -#
    4392. 

  4392. -# Appletalk devices
    4393. 

  4393. -#
    4394. 

  4394. -# CONFIG_DEV_APPLETALK is not set
    4395. 

  4395.  # CONFIG_DECNET is not set
    4396. 

  4396.  # CONFIG_BRIDGE is not set
    4397. 

  4397.  # CONFIG_X25 is not set
    4398. 

  4398. @@ -317,9 +312,11 @@ CONFIG_SD_EXTRA_DEVS=40
    4399. 

  4399.  # CONFIG_SCSI_MEGARAID is not set
    4400. 

  4400.  # CONFIG_SCSI_MEGARAID2 is not set
    4401. 

  4401.  # CONFIG_SCSI_SATA is not set
    4402. 

  4402. +# CONFIG_SCSI_SATA_AHCI is not set
    4403. 

  4403.  # CONFIG_SCSI_SATA_SVW is not set
    4404. 

  4404.  # CONFIG_SCSI_ATA_PIIX is not set
    4405. 

  4405.  # CONFIG_SCSI_SATA_NV is not set
    4406. 

  4406. +# CONFIG_SCSI_SATA_QSTOR is not set
    4407. 

  4407.  # CONFIG_SCSI_SATA_PROMISE is not set
    4408. 

  4408.  # CONFIG_SCSI_SATA_SX4 is not set
    4409. 

  4409.  # CONFIG_SCSI_SATA_SIL is not set
    4410. 

  4410. @@ -528,7 +525,6 @@ CONFIG_SERIAL=y
    4411. 

  4411.  CONFIG_SERIAL_CONSOLE=y
    4412. 

  4412.  # CONFIG_SERIAL_EXTENDED is not set
    4413. 

  4413.  # CONFIG_SERIAL_NONSTANDARD is not set
    4414. 

  4414. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    4415. 

  4415.  CONFIG_UNIX98_PTYS=y
    4416. 

  4416.  CONFIG_UNIX98_PTY_COUNT=256
    4417. 

  4417.  
    4418. 

  4418. --- a/arch/mips/defconfig-bosporus
    4419. 

  4419. +++ b/arch/mips/defconfig-bosporus
    4420. 

  4420. @@ -30,8 +30,8 @@ CONFIG_MIPS_BOSPORUS=y
    4421. 

  4421.  # CONFIG_MIPS_PB1000 is not set
    4422. 

  4422.  # CONFIG_MIPS_PB1100 is not set
    4423. 

  4423.  # CONFIG_MIPS_PB1500 is not set
    4424. 

  4424. -# CONFIG_MIPS_HYDROGEN3 is not set
    4425. 

  4425.  # CONFIG_MIPS_PB1550 is not set
    4426. 

  4426. +# CONFIG_MIPS_HYDROGEN3 is not set
    4427. 

  4427.  # CONFIG_MIPS_XXS1500 is not set
    4428. 

  4428.  # CONFIG_MIPS_MTX1 is not set
    4429. 

  4429.  # CONFIG_COGENT_CSB250 is not set
    4430. 

  4430. @@ -208,9 +208,7 @@ CONFIG_MTD_CFI_AMDSTD=y
    4431. 

  4431.  CONFIG_MTD_BOSPORUS=y
    4432. 

  4432.  # CONFIG_MTD_XXS1500 is not set
    4433. 

  4433.  # CONFIG_MTD_MTX1 is not set
    4434. 

  4434. -# CONFIG_MTD_DB1X00 is not set
    4435. 

  4435.  # CONFIG_MTD_PB1550 is not set
    4436. 

  4436. -# CONFIG_MTD_HYDROGEN3 is not set
    4437. 

  4437.  # CONFIG_MTD_MIRAGE is not set
    4438. 

  4438.  # CONFIG_MTD_CSTM_MIPS_IXX is not set
    4439. 

  4439.  # CONFIG_MTD_OCELOT is not set
    4440. 

  4440. @@ -229,7 +227,6 @@ CONFIG_MTD_BOSPORUS=y
    4441. 

  4441.  #
    4442. 

  4442.  # Disk-On-Chip Device Drivers
    4443. 

  4443.  #
    4444. 

  4444. -# CONFIG_MTD_DOC1000 is not set
    4445. 

  4445.  # CONFIG_MTD_DOC2000 is not set
    4446. 

  4446.  # CONFIG_MTD_DOC2001 is not set
    4447. 

  4447.  # CONFIG_MTD_DOCPROBE is not set
    4448. 

  4448. @@ -373,11 +370,6 @@ CONFIG_IP_NF_MANGLE=m
    4449. 

  4449.  #
    4450. 

  4450.  # CONFIG_IPX is not set
    4451. 

  4451.  # CONFIG_ATALK is not set
    4452. 

  4452. -
    4453. 

  4453. -#
    4454. 

  4454. -# Appletalk devices
    4455. 

  4455. -#
    4456. 

  4456. -# CONFIG_DEV_APPLETALK is not set
    4457. 

  4457.  # CONFIG_DECNET is not set
    4458. 

  4458.  # CONFIG_BRIDGE is not set
    4459. 

  4459.  # CONFIG_X25 is not set
    4460. 

  4460. @@ -457,9 +449,11 @@ CONFIG_SCSI_CONSTANTS=y
    4461. 

  4461.  # CONFIG_SCSI_MEGARAID is not set
    4462. 

  4462.  # CONFIG_SCSI_MEGARAID2 is not set
    4463. 

  4463.  # CONFIG_SCSI_SATA is not set
    4464. 

  4464. +# CONFIG_SCSI_SATA_AHCI is not set
    4465. 

  4465.  # CONFIG_SCSI_SATA_SVW is not set
    4466. 

  4466.  # CONFIG_SCSI_ATA_PIIX is not set
    4467. 

  4467.  # CONFIG_SCSI_SATA_NV is not set
    4468. 

  4468. +# CONFIG_SCSI_SATA_QSTOR is not set
    4469. 

  4469.  # CONFIG_SCSI_SATA_PROMISE is not set
    4470. 

  4470.  # CONFIG_SCSI_SATA_SX4 is not set
    4471. 

  4471.  # CONFIG_SCSI_SATA_SIL is not set
    4472. 

  4472. @@ -681,7 +675,6 @@ CONFIG_AU1X00_SERIAL_CONSOLE=y
    4473. 

  4473.  # CONFIG_AU1X00_USB_TTY is not set
    4474. 

  4474.  # CONFIG_AU1X00_USB_RAW is not set
    4475. 

  4475.  # CONFIG_TXX927_SERIAL is not set
    4476. 

  4476. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    4477. 

  4477.  CONFIG_UNIX98_PTYS=y
    4478. 

  4478.  CONFIG_UNIX98_PTY_COUNT=256
    4479. 

  4479.  
    4480. 

  4480. --- a/arch/mips/defconfig-capcella
    4481. 

  4481. +++ b/arch/mips/defconfig-capcella
    4482. 

  4482. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    4483. 

  4483.  # CONFIG_MIPS_PB1000 is not set
    4484. 

  4484.  # CONFIG_MIPS_PB1100 is not set
    4485. 

  4485.  # CONFIG_MIPS_PB1500 is not set
    4486. 

  4486. -# CONFIG_MIPS_HYDROGEN3 is not set
    4487. 

  4487.  # CONFIG_MIPS_PB1550 is not set
    4488. 

  4488. +# CONFIG_MIPS_HYDROGEN3 is not set
    4489. 

  4489.  # CONFIG_MIPS_XXS1500 is not set
    4490. 

  4490.  # CONFIG_MIPS_MTX1 is not set
    4491. 

  4491.  # CONFIG_COGENT_CSB250 is not set
    4492. 

  4492. @@ -228,11 +228,6 @@ CONFIG_IP_PNP_BOOTP=y
    4493. 

  4493.  #
    4494. 

  4494.  # CONFIG_IPX is not set
    4495. 

  4495.  # CONFIG_ATALK is not set
    4496. 

  4496. -
    4497. 

  4497. -#
    4498. 

  4498. -# Appletalk devices
    4499. 

  4499. -#
    4500. 

  4500. -# CONFIG_DEV_APPLETALK is not set
    4501. 

  4501.  # CONFIG_DECNET is not set
    4502. 

  4502.  # CONFIG_BRIDGE is not set
    4503. 

  4503.  # CONFIG_X25 is not set
    4504. 

  4504. @@ -472,7 +467,6 @@ CONFIG_SERIAL=y
    4505. 

  4505.  CONFIG_SERIAL_CONSOLE=y
    4506. 

  4506.  # CONFIG_SERIAL_EXTENDED is not set
    4507. 

  4507.  # CONFIG_SERIAL_NONSTANDARD is not set
    4508. 

  4508. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    4509. 

  4509.  # CONFIG_VR41XX_KIU is not set
    4510. 

  4510.  CONFIG_UNIX98_PTYS=y
    4511. 

  4511.  CONFIG_UNIX98_PTY_COUNT=256
    4512. 

  4512. --- a/arch/mips/defconfig-cobalt
    4513. 

  4513. +++ b/arch/mips/defconfig-cobalt
    4514. 

  4514. @@ -28,8 +28,8 @@ CONFIG_EXPERIMENTAL=y
    4515. 

  4515.  # CONFIG_MIPS_PB1000 is not set
    4516. 

  4516.  # CONFIG_MIPS_PB1100 is not set
    4517. 

  4517.  # CONFIG_MIPS_PB1500 is not set
    4518. 

  4518. -# CONFIG_MIPS_HYDROGEN3 is not set
    4519. 

  4519.  # CONFIG_MIPS_PB1550 is not set
    4520. 

  4520. +# CONFIG_MIPS_HYDROGEN3 is not set
    4521. 

  4521.  # CONFIG_MIPS_XXS1500 is not set
    4522. 

  4522.  # CONFIG_MIPS_MTX1 is not set
    4523. 

  4523.  # CONFIG_COGENT_CSB250 is not set
    4524. 

  4524. @@ -222,11 +222,6 @@ CONFIG_INET=y
    4525. 

  4525.  #
    4526. 

  4526.  # CONFIG_IPX is not set
    4527. 

  4527.  # CONFIG_ATALK is not set
    4528. 

  4528. -
    4529. 

  4529. -#
    4530. 

  4530. -# Appletalk devices
    4531. 

  4531. -#
    4532. 

  4532. -# CONFIG_DEV_APPLETALK is not set
    4533. 

  4533.  # CONFIG_DECNET is not set
    4534. 

  4534.  # CONFIG_BRIDGE is not set
    4535. 

  4535.  # CONFIG_X25 is not set
    4536. 

  4536. @@ -505,7 +500,6 @@ CONFIG_SERIAL=y
    4537. 

  4537.  CONFIG_SERIAL_CONSOLE=y
    4538. 

  4538.  # CONFIG_SERIAL_EXTENDED is not set
    4539. 

  4539.  # CONFIG_SERIAL_NONSTANDARD is not set
    4540. 

  4540. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    4541. 

  4541.  CONFIG_UNIX98_PTYS=y
    4542. 

  4542.  CONFIG_UNIX98_PTY_COUNT=16
    4543. 

  4543.  
    4544. 

  4544. --- a/arch/mips/defconfig-csb250
    4545. 

  4545. +++ b/arch/mips/defconfig-csb250
    4546. 

  4546. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    4547. 

  4547.  # CONFIG_MIPS_PB1000 is not set
    4548. 

  4548.  # CONFIG_MIPS_PB1100 is not set
    4549. 

  4549.  # CONFIG_MIPS_PB1500 is not set
    4550. 

  4550. -# CONFIG_MIPS_HYDROGEN3 is not set
    4551. 

  4551.  # CONFIG_MIPS_PB1550 is not set
    4552. 

  4552. +# CONFIG_MIPS_HYDROGEN3 is not set
    4553. 

  4553.  # CONFIG_MIPS_XXS1500 is not set
    4554. 

  4554.  # CONFIG_MIPS_MTX1 is not set
    4555. 

  4555.  CONFIG_COGENT_CSB250=y
    4556. 

  4556. @@ -268,11 +268,6 @@ CONFIG_IP_PNP_BOOTP=y
    4557. 

  4557.  #
    4558. 

  4558.  # CONFIG_IPX is not set
    4559. 

  4559.  # CONFIG_ATALK is not set
    4560. 

  4560. -
    4561. 

  4561. -#
    4562. 

  4562. -# Appletalk devices
    4563. 

  4563. -#
    4564. 

  4564. -# CONFIG_DEV_APPLETALK is not set
    4565. 

  4565.  # CONFIG_DECNET is not set
    4566. 

  4566.  # CONFIG_BRIDGE is not set
    4567. 

  4567.  # CONFIG_X25 is not set
    4568. 

  4568. @@ -556,7 +551,6 @@ CONFIG_AU1X00_SERIAL_CONSOLE=y
    4569. 

  4569.  # CONFIG_AU1X00_USB_TTY is not set
    4570. 

  4570.  # CONFIG_AU1X00_USB_RAW is not set
    4571. 

  4571.  # CONFIG_TXX927_SERIAL is not set
    4572. 

  4572. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    4573. 

  4573.  CONFIG_UNIX98_PTYS=y
    4574. 

  4574.  CONFIG_UNIX98_PTY_COUNT=256
    4575. 

  4575.  
    4576. 

  4576. --- a/arch/mips/defconfig-db1000
    4577. 

  4577. +++ b/arch/mips/defconfig-db1000
    4578. 

  4578. @@ -30,8 +30,8 @@ CONFIG_MIPS_DB1000=y
    4579. 

  4579.  # CONFIG_MIPS_PB1000 is not set
    4580. 

  4580.  # CONFIG_MIPS_PB1100 is not set
    4581. 

  4581.  # CONFIG_MIPS_PB1500 is not set
    4582. 

  4582. -# CONFIG_MIPS_HYDROGEN3 is not set
    4583. 

  4583.  # CONFIG_MIPS_PB1550 is not set
    4584. 

  4584. +# CONFIG_MIPS_HYDROGEN3 is not set
    4585. 

  4585.  # CONFIG_MIPS_XXS1500 is not set
    4586. 

  4586.  # CONFIG_MIPS_MTX1 is not set
    4587. 

  4587.  # CONFIG_COGENT_CSB250 is not set
    4588. 

  4588. @@ -214,11 +214,7 @@ CONFIG_MTD_CFI_AMDSTD=y
    4589. 

  4589.  # CONFIG_MTD_BOSPORUS is not set
    4590. 

  4590.  # CONFIG_MTD_XXS1500 is not set
    4591. 

  4591.  # CONFIG_MTD_MTX1 is not set
    4592. 

  4592. -CONFIG_MTD_DB1X00=y
    4593. 

  4593. -CONFIG_MTD_DB1X00_BOOT=y
    4594. 

  4594. -CONFIG_MTD_DB1X00_USER=y
    4595. 

  4595.  # CONFIG_MTD_PB1550 is not set
    4596. 

  4596. -# CONFIG_MTD_HYDROGEN3 is not set
    4597. 

  4597.  # CONFIG_MTD_MIRAGE is not set
    4598. 

  4598.  # CONFIG_MTD_CSTM_MIPS_IXX is not set
    4599. 

  4599.  # CONFIG_MTD_OCELOT is not set
    4600. 

  4600. @@ -237,7 +233,6 @@ CONFIG_MTD_DB1X00_USER=y
    4601. 

  4601.  #
    4602. 

  4602.  # Disk-On-Chip Device Drivers
    4603. 

  4603.  #
    4604. 

  4604. -# CONFIG_MTD_DOC1000 is not set
    4605. 

  4605.  # CONFIG_MTD_DOC2000 is not set
    4606. 

  4606.  # CONFIG_MTD_DOC2001 is not set
    4607. 

  4607.  # CONFIG_MTD_DOCPROBE is not set
    4608. 

  4608. @@ -342,11 +337,6 @@ CONFIG_IP_PNP_BOOTP=y
    4609. 

  4609.  #
    4610. 

  4610.  # CONFIG_IPX is not set
    4611. 

  4611.  # CONFIG_ATALK is not set
    4612. 

  4612. -
    4613. 

  4613. -#
    4614. 

  4614. -# Appletalk devices
    4615. 

  4615. -#
    4616. 

  4616. -# CONFIG_DEV_APPLETALK is not set
    4617. 

  4617.  # CONFIG_DECNET is not set
    4618. 

  4618.  # CONFIG_BRIDGE is not set
    4619. 

  4619.  # CONFIG_X25 is not set
    4620. 

  4620. @@ -636,7 +626,6 @@ CONFIG_AU1X00_SERIAL_CONSOLE=y
    4621. 

  4621.  # CONFIG_AU1X00_USB_TTY is not set
    4622. 

  4622.  # CONFIG_AU1X00_USB_RAW is not set
    4623. 

  4623.  # CONFIG_TXX927_SERIAL is not set
    4624. 

  4624. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    4625. 

  4625.  CONFIG_UNIX98_PTYS=y
    4626. 

  4626.  CONFIG_UNIX98_PTY_COUNT=256
    4627. 

  4627.  
    4628. 

  4628. --- a/arch/mips/defconfig-db1100
    4629. 

  4629. +++ b/arch/mips/defconfig-db1100
    4630. 

  4630. @@ -30,8 +30,8 @@ CONFIG_MIPS_DB1100=y
    4631. 

  4631.  # CONFIG_MIPS_PB1000 is not set
    4632. 

  4632.  # CONFIG_MIPS_PB1100 is not set
    4633. 

  4633.  # CONFIG_MIPS_PB1500 is not set
    4634. 

  4634. -# CONFIG_MIPS_HYDROGEN3 is not set
    4635. 

  4635.  # CONFIG_MIPS_PB1550 is not set
    4636. 

  4636. +# CONFIG_MIPS_HYDROGEN3 is not set
    4637. 

  4637.  # CONFIG_MIPS_XXS1500 is not set
    4638. 

  4638.  # CONFIG_MIPS_MTX1 is not set
    4639. 

  4639.  # CONFIG_COGENT_CSB250 is not set
    4640. 

  4640. @@ -214,11 +214,7 @@ CONFIG_MTD_CFI_AMDSTD=y
    4641. 

  4641.  # CONFIG_MTD_BOSPORUS is not set
    4642. 

  4642.  # CONFIG_MTD_XXS1500 is not set
    4643. 

  4643.  # CONFIG_MTD_MTX1 is not set
    4644. 

  4644. -CONFIG_MTD_DB1X00=y
    4645. 

  4645. -# CONFIG_MTD_DB1X00_BOOT is not set
    4646. 

  4646. -CONFIG_MTD_DB1X00_USER=y
    4647. 

  4647.  # CONFIG_MTD_PB1550 is not set
    4648. 

  4648. -# CONFIG_MTD_HYDROGEN3 is not set
    4649. 

  4649.  # CONFIG_MTD_MIRAGE is not set
    4650. 

  4650.  # CONFIG_MTD_CSTM_MIPS_IXX is not set
    4651. 

  4651.  # CONFIG_MTD_OCELOT is not set
    4652. 

  4652. @@ -237,7 +233,6 @@ CONFIG_MTD_DB1X00_USER=y
    4653. 

  4653.  #
    4654. 

  4654.  # Disk-On-Chip Device Drivers
    4655. 

  4655.  #
    4656. 

  4656. -# CONFIG_MTD_DOC1000 is not set
    4657. 

  4657.  # CONFIG_MTD_DOC2000 is not set
    4658. 

  4658.  # CONFIG_MTD_DOC2001 is not set
    4659. 

  4659.  # CONFIG_MTD_DOCPROBE is not set
    4660. 

  4660. @@ -342,11 +337,6 @@ CONFIG_IP_PNP_BOOTP=y
    4661. 

  4661.  #
    4662. 

  4662.  # CONFIG_IPX is not set
    4663. 

  4663.  # CONFIG_ATALK is not set
    4664. 

  4664. -
    4665. 

  4665. -#
    4666. 

  4666. -# Appletalk devices
    4667. 

  4667. -#
    4668. 

  4668. -# CONFIG_DEV_APPLETALK is not set
    4669. 

  4669.  # CONFIG_DECNET is not set
    4670. 

  4670.  # CONFIG_BRIDGE is not set
    4671. 

  4671.  # CONFIG_X25 is not set
    4672. 

  4672. @@ -636,7 +626,6 @@ CONFIG_AU1X00_SERIAL_CONSOLE=y
    4673. 

  4673.  # CONFIG_AU1X00_USB_TTY is not set
    4674. 

  4674.  # CONFIG_AU1X00_USB_RAW is not set
    4675. 

  4675.  # CONFIG_TXX927_SERIAL is not set
    4676. 

  4676. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    4677. 

  4677.  CONFIG_UNIX98_PTYS=y
    4678. 

  4678.  CONFIG_UNIX98_PTY_COUNT=256
    4679. 

  4679.  
    4680. 

  4680. @@ -884,6 +873,7 @@ CONFIG_DUMMY_CONSOLE=y
    4681. 

  4681.  # CONFIG_FB_PM2 is not set
    4682. 

  4682.  # CONFIG_FB_PM3 is not set
    4683. 

  4683.  # CONFIG_FB_CYBER2000 is not set
    4684. 

  4684. +CONFIG_FB_AU1100=y
    4685. 

  4685.  # CONFIG_FB_MATROX is not set
    4686. 

  4686.  # CONFIG_FB_ATY is not set
    4687. 

  4687.  # CONFIG_FB_RADEON is not set
    4688. 

  4688. @@ -895,7 +885,6 @@ CONFIG_DUMMY_CONSOLE=y
    4689. 

  4689.  # CONFIG_FB_VOODOO1 is not set
    4690. 

  4690.  # CONFIG_FB_TRIDENT is not set
    4691. 

  4691.  # CONFIG_FB_E1356 is not set
    4692. 

  4692. -CONFIG_FB_AU1100=y
    4693. 

  4693.  # CONFIG_FB_IT8181 is not set
    4694. 

  4694.  # CONFIG_FB_VIRTUAL is not set
    4695. 

  4695.  CONFIG_FBCON_ADVANCED=y
    4696. 

  4696. --- /dev/null
    4697. 

  4697. +++ b/arch/mips/defconfig-db1200
    4698. 

  4698. @@ -0,0 +1,1032 @@
    4699. 

  4699. +#
    4700. 

  4700. +# Automatically generated make config: don't edit
    4701. 

  4701. +#
    4702. 

  4702. +CONFIG_MIPS=y
    4703. 

  4703. +CONFIG_MIPS32=y
    4704. 

  4704. +# CONFIG_MIPS64 is not set
    4705. 

  4705. +
    4706. 

  4706. +#
    4707. 

  4707. +# Code maturity level options
    4708. 

  4708. +#
    4709. 

  4709. +CONFIG_EXPERIMENTAL=y
    4710. 

  4710. +
    4711. 

  4711. +#
    4712. 

  4712. +# Loadable module support
    4713. 

  4713. +#
    4714. 

  4714. +CONFIG_MODULES=y
    4715. 

  4715. +# CONFIG_MODVERSIONS is not set
    4716. 

  4716. +CONFIG_KMOD=y
    4717. 

  4717. +
    4718. 

  4718. +#
    4719. 

  4719. +# Machine selection
    4720. 

  4720. +#
    4721. 

  4721. +# CONFIG_ACER_PICA_61 is not set
    4722. 

  4722. +# CONFIG_MIPS_BOSPORUS is not set
    4723. 

  4723. +# CONFIG_MIPS_MIRAGE is not set
    4724. 

  4724. +# CONFIG_MIPS_DB1000 is not set
    4725. 

  4725. +# CONFIG_MIPS_DB1100 is not set
    4726. 

  4726. +# CONFIG_MIPS_DB1500 is not set
    4727. 

  4727. +# CONFIG_MIPS_DB1550 is not set
    4728. 

  4728. +# CONFIG_MIPS_PB1000 is not set
    4729. 

  4729. +# CONFIG_MIPS_PB1100 is not set
    4730. 

  4730. +# CONFIG_MIPS_PB1500 is not set
    4731. 

  4731. +# CONFIG_MIPS_PB1550 is not set
    4732. 

  4732. +# CONFIG_MIPS_HYDROGEN3 is not set
    4733. 

  4733. +# CONFIG_MIPS_XXS1500 is not set
    4734. 

  4734. +# CONFIG_MIPS_MTX1 is not set
    4735. 

  4735. +# CONFIG_COGENT_CSB250 is not set
    4736. 

  4736. +# CONFIG_BAGET_MIPS is not set
    4737. 

  4737. +# CONFIG_CASIO_E55 is not set
    4738. 

  4738. +# CONFIG_MIPS_COBALT is not set
    4739. 

  4739. +# CONFIG_DECSTATION is not set
    4740. 

  4740. +# CONFIG_MIPS_EV64120 is not set
    4741. 

  4741. +# CONFIG_MIPS_EV96100 is not set
    4742. 

  4742. +# CONFIG_MIPS_IVR is not set
    4743. 

  4743. +# CONFIG_HP_LASERJET is not set
    4744. 

  4744. +# CONFIG_IBM_WORKPAD is not set
    4745. 

  4745. +# CONFIG_LASAT is not set
    4746. 

  4746. +# CONFIG_MIPS_ITE8172 is not set
    4747. 

  4747. +# CONFIG_MIPS_ATLAS is not set
    4748. 

  4748. +# CONFIG_MIPS_MAGNUM_4000 is not set
    4749. 

  4749. +# CONFIG_MIPS_MALTA is not set
    4750. 

  4750. +# CONFIG_MIPS_SEAD is not set
    4751. 

  4751. +# CONFIG_MOMENCO_OCELOT is not set
    4752. 

  4752. +# CONFIG_MOMENCO_OCELOT_G is not set
    4753. 

  4753. +# CONFIG_MOMENCO_OCELOT_C is not set
    4754. 

  4754. +# CONFIG_MOMENCO_JAGUAR_ATX is not set
    4755. 

  4755. +# CONFIG_PMC_BIG_SUR is not set
    4756. 

  4756. +# CONFIG_PMC_STRETCH is not set
    4757. 

  4757. +# CONFIG_PMC_YOSEMITE is not set
    4758. 

  4758. +# CONFIG_DDB5074 is not set
    4759. 

  4759. +# CONFIG_DDB5476 is not set
    4760. 

  4760. +# CONFIG_DDB5477 is not set
    4761. 

  4761. +# CONFIG_NEC_OSPREY is not set
    4762. 

  4762. +# CONFIG_NEC_EAGLE is not set
    4763. 

  4763. +# CONFIG_OLIVETTI_M700 is not set
    4764. 

  4764. +# CONFIG_NINO is not set
    4765. 

  4765. +# CONFIG_SGI_IP22 is not set
    4766. 

  4766. +# CONFIG_SGI_IP27 is not set
    4767. 

  4767. +# CONFIG_SIBYTE_SB1xxx_SOC is not set
    4768. 

  4768. +# CONFIG_SNI_RM200_PCI is not set
    4769. 

  4769. +# CONFIG_TANBAC_TB0226 is not set
    4770. 

  4770. +# CONFIG_TANBAC_TB0229 is not set
    4771. 

  4771. +# CONFIG_TOSHIBA_JMR3927 is not set
    4772. 

  4772. +# CONFIG_TOSHIBA_RBTX4927 is not set
    4773. 

  4773. +# CONFIG_VICTOR_MPC30X is not set
    4774. 

  4774. +# CONFIG_ZAO_CAPCELLA is not set
    4775. 

  4775. +# CONFIG_HIGHMEM is not set
    4776. 

  4776. +CONFIG_RWSEM_GENERIC_SPINLOCK=y
    4777. 

  4777. +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
    4778. 

  4778. +# CONFIG_MIPS_AU1000 is not set
    4779. 

  4779. +
    4780. 

  4780. +#
    4781. 

  4781. +# CPU selection
    4782. 

  4782. +#
    4783. 

  4783. +CONFIG_CPU_MIPS32=y
    4784. 

  4784. +# CONFIG_CPU_MIPS64 is not set
    4785. 

  4785. +# CONFIG_CPU_R3000 is not set
    4786. 

  4786. +# CONFIG_CPU_TX39XX is not set
    4787. 

  4787. +# CONFIG_CPU_VR41XX is not set
    4788. 

  4788. +# CONFIG_CPU_R4300 is not set
    4789. 

  4789. +# CONFIG_CPU_R4X00 is not set
    4790. 

  4790. +# CONFIG_CPU_TX49XX is not set
    4791. 

  4791. +# CONFIG_CPU_R5000 is not set
    4792. 

  4792. +# CONFIG_CPU_R5432 is not set
    4793. 

  4793. +# CONFIG_CPU_R6000 is not set
    4794. 

  4794. +# CONFIG_CPU_NEVADA is not set
    4795. 

  4795. +# CONFIG_CPU_R8000 is not set
    4796. 

  4796. +# CONFIG_CPU_R10000 is not set
    4797. 

  4797. +# CONFIG_CPU_RM7000 is not set
    4798. 

  4798. +# CONFIG_CPU_RM9000 is not set
    4799. 

  4799. +# CONFIG_CPU_SB1 is not set
    4800. 

  4800. +CONFIG_PAGE_SIZE_4KB=y
    4801. 

  4801. +# CONFIG_PAGE_SIZE_16KB is not set
    4802. 

  4802. +# CONFIG_PAGE_SIZE_64KB is not set
    4803. 

  4803. +CONFIG_CPU_HAS_PREFETCH=y
    4804. 

  4804. +# CONFIG_VTAG_ICACHE is not set
    4805. 

  4805. +CONFIG_64BIT_PHYS_ADDR=y
    4806. 

  4806. +# CONFIG_CPU_ADVANCED is not set
    4807. 

  4807. +CONFIG_CPU_HAS_LLSC=y
    4808. 

  4808. +# CONFIG_CPU_HAS_LLDSCD is not set
    4809. 

  4809. +# CONFIG_CPU_HAS_WB is not set
    4810. 

  4810. +CONFIG_CPU_HAS_SYNC=y
    4811. 

  4811. +
    4812. 

  4812. +#
    4813. 

  4813. +# General setup
    4814. 

  4814. +#
    4815. 

  4815. +CONFIG_CPU_LITTLE_ENDIAN=y
    4816. 

  4816. +# CONFIG_BUILD_ELF64 is not set
    4817. 

  4817. +CONFIG_NET=y
    4818. 

  4818. +CONFIG_PCI=y
    4819. 

  4819. +CONFIG_PCI_NEW=y
    4820. 

  4820. +CONFIG_PCI_AUTO=y
    4821. 

  4821. +# CONFIG_PCI_NAMES is not set
    4822. 

  4822. +# CONFIG_ISA is not set
    4823. 

  4823. +# CONFIG_TC is not set
    4824. 

  4824. +# CONFIG_MCA is not set
    4825. 

  4825. +# CONFIG_SBUS is not set
    4826. 

  4826. +CONFIG_HOTPLUG=y
    4827. 

  4827. +
    4828. 

  4828. +#
    4829. 

  4829. +# PCMCIA/CardBus support
    4830. 

  4830. +#
    4831. 

  4831. +CONFIG_PCMCIA=m
    4832. 

  4832. +# CONFIG_CARDBUS is not set
    4833. 

  4833. +# CONFIG_TCIC is not set
    4834. 

  4834. +# CONFIG_I82092 is not set
    4835. 

  4835. +# CONFIG_I82365 is not set
    4836. 

  4836. +
    4837. 

  4837. +#
    4838. 

  4838. +# PCI Hotplug Support
    4839. 

  4839. +#
    4840. 

  4840. +# CONFIG_HOTPLUG_PCI is not set
    4841. 

  4841. +# CONFIG_HOTPLUG_PCI_COMPAQ is not set
    4842. 

  4842. +# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
    4843. 

  4843. +# CONFIG_HOTPLUG_PCI_SHPC is not set
    4844. 

  4844. +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set
    4845. 

  4845. +# CONFIG_HOTPLUG_PCI_PCIE is not set
    4846. 

  4846. +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set
    4847. 

  4847. +CONFIG_SYSVIPC=y
    4848. 

  4848. +# CONFIG_BSD_PROCESS_ACCT is not set
    4849. 

  4849. +CONFIG_SYSCTL=y
    4850. 

  4850. +CONFIG_KCORE_ELF=y
    4851. 

  4851. +# CONFIG_KCORE_AOUT is not set
    4852. 

  4852. +# CONFIG_BINFMT_AOUT is not set
    4853. 

  4853. +CONFIG_BINFMT_ELF=y
    4854. 

  4854. +# CONFIG_MIPS32_COMPAT is not set
    4855. 

  4855. +# CONFIG_MIPS32_O32 is not set
    4856. 

  4856. +# CONFIG_MIPS32_N32 is not set
    4857. 

  4857. +# CONFIG_BINFMT_ELF32 is not set
    4858. 

  4858. +# CONFIG_BINFMT_MISC is not set
    4859. 

  4859. +# CONFIG_OOM_KILLER is not set
    4860. 

  4860. +CONFIG_CMDLINE_BOOL=y
    4861. 

  4861. +CONFIG_CMDLINE="mem=96M"
    4862. 

  4862. +
    4863. 

  4863. +#
    4864. 

  4864. +# Memory Technology Devices (MTD)
    4865. 

  4865. +#
    4866. 

  4866. +# CONFIG_MTD is not set
    4867. 

  4867. +
    4868. 

  4868. +#
    4869. 

  4869. +# Parallel port support
    4870. 

  4870. +#
    4871. 

  4871. +# CONFIG_PARPORT is not set
    4872. 

  4872. +
    4873. 

  4873. +#
    4874. 

  4874. +# Plug and Play configuration
    4875. 

  4875. +#
    4876. 

  4876. +# CONFIG_PNP is not set
    4877. 

  4877. +# CONFIG_ISAPNP is not set
    4878. 

  4878. +
    4879. 

  4879. +#
    4880. 

  4880. +# Block devices
    4881. 

  4881. +#
    4882. 

  4882. +# CONFIG_BLK_DEV_FD is not set
    4883. 

  4883. +# CONFIG_BLK_DEV_XD is not set
    4884. 

  4884. +# CONFIG_PARIDE is not set
    4885. 

  4885. +# CONFIG_BLK_CPQ_DA is not set
    4886. 

  4886. +# CONFIG_BLK_CPQ_CISS_DA is not set
    4887. 

  4887. +# CONFIG_CISS_SCSI_TAPE is not set
    4888. 

  4888. +# CONFIG_CISS_MONITOR_THREAD is not set
    4889. 

  4889. +# CONFIG_BLK_DEV_DAC960 is not set
    4890. 

  4890. +# CONFIG_BLK_DEV_UMEM is not set
    4891. 

  4891. +# CONFIG_BLK_DEV_SX8 is not set
    4892. 

  4892. +CONFIG_BLK_DEV_LOOP=y
    4893. 

  4893. +# CONFIG_BLK_DEV_NBD is not set
    4894. 

  4894. +# CONFIG_BLK_DEV_RAM is not set
    4895. 

  4895. +# CONFIG_BLK_DEV_INITRD is not set
    4896. 

  4896. +# CONFIG_BLK_STATS is not set
    4897. 

  4897. +
    4898. 

  4898. +#
    4899. 

  4899. +# Multi-device support (RAID and LVM)
    4900. 

  4900. +#
    4901. 

  4901. +# CONFIG_MD is not set
    4902. 

  4902. +# CONFIG_BLK_DEV_MD is not set
    4903. 

  4903. +# CONFIG_MD_LINEAR is not set
    4904. 

  4904. +# CONFIG_MD_RAID0 is not set
    4905. 

  4905. +# CONFIG_MD_RAID1 is not set
    4906. 

  4906. +# CONFIG_MD_RAID5 is not set
    4907. 

  4907. +# CONFIG_MD_MULTIPATH is not set
    4908. 

  4908. +# CONFIG_BLK_DEV_LVM is not set
    4909. 

  4909. +
    4910. 

  4910. +#
    4911. 

  4911. +# Networking options
    4912. 

  4912. +#
    4913. 

  4913. +CONFIG_PACKET=y
    4914. 

  4914. +# CONFIG_PACKET_MMAP is not set
    4915. 

  4915. +# CONFIG_NETLINK_DEV is not set
    4916. 

  4916. +CONFIG_NETFILTER=y
    4917. 

  4917. +# CONFIG_NETFILTER_DEBUG is not set
    4918. 

  4918. +CONFIG_FILTER=y
    4919. 

  4919. +CONFIG_UNIX=y
    4920. 

  4920. +CONFIG_INET=y
    4921. 

  4921. +CONFIG_IP_MULTICAST=y
    4922. 

  4922. +# CONFIG_IP_ADVANCED_ROUTER is not set
    4923. 

  4923. +CONFIG_IP_PNP=y
    4924. 

  4924. +# CONFIG_IP_PNP_DHCP is not set
    4925. 

  4925. +CONFIG_IP_PNP_BOOTP=y
    4926. 

  4926. +# CONFIG_IP_PNP_RARP is not set
    4927. 

  4927. +# CONFIG_NET_IPIP is not set
    4928. 

  4928. +# CONFIG_NET_IPGRE is not set
    4929. 

  4929. +# CONFIG_IP_MROUTE is not set
    4930. 

  4930. +# CONFIG_ARPD is not set
    4931. 

  4931. +# CONFIG_INET_ECN is not set
    4932. 

  4932. +# CONFIG_SYN_COOKIES is not set
    4933. 

  4933. +
    4934. 

  4934. +#
    4935. 

  4935. +#   IP: Netfilter Configuration
    4936. 

  4936. +#
    4937. 

  4937. +# CONFIG_IP_NF_CONNTRACK is not set
    4938. 

  4938. +# CONFIG_IP_NF_QUEUE is not set
    4939. 

  4939. +# CONFIG_IP_NF_IPTABLES is not set
    4940. 

  4940. +# CONFIG_IP_NF_ARPTABLES is not set
    4941. 

  4941. +# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
    4942. 

  4942. +# CONFIG_IP_NF_COMPAT_IPFWADM is not set
    4943. 

  4943. +
    4944. 

  4944. +#
    4945. 

  4945. +#   IP: Virtual Server Configuration
    4946. 

  4946. +#
    4947. 

  4947. +# CONFIG_IP_VS is not set
    4948. 

  4948. +# CONFIG_IPV6 is not set
    4949. 

  4949. +# CONFIG_KHTTPD is not set
    4950. 

  4950. +
    4951. 

  4951. +#
    4952. 

  4952. +#    SCTP Configuration (EXPERIMENTAL)
    4953. 

  4953. +#
    4954. 

  4954. +# CONFIG_IP_SCTP is not set
    4955. 

  4955. +# CONFIG_ATM is not set
    4956. 

  4956. +# CONFIG_VLAN_8021Q is not set
    4957. 

  4957. +
    4958. 

  4958. +#
    4959. 

  4959. +#  
    4960. 

  4960. +#
    4961. 

  4961. +# CONFIG_IPX is not set
    4962. 

  4962. +# CONFIG_ATALK is not set
    4963. 

  4963. +# CONFIG_DECNET is not set
    4964. 

  4964. +# CONFIG_BRIDGE is not set
    4965. 

  4965. +# CONFIG_X25 is not set
    4966. 

  4966. +# CONFIG_LAPB is not set
    4967. 

  4967. +# CONFIG_LLC is not set
    4968. 

  4968. +# CONFIG_NET_DIVERT is not set
    4969. 

  4969. +# CONFIG_ECONET is not set
    4970. 

  4970. +# CONFIG_WAN_ROUTER is not set
    4971. 

  4971. +# CONFIG_NET_FASTROUTE is not set
    4972. 

  4972. +# CONFIG_NET_HW_FLOWCONTROL is not set
    4973. 

  4973. +
    4974. 

  4974. +#
    4975. 

  4975. +# QoS and/or fair queueing
    4976. 

  4976. +#
    4977. 

  4977. +# CONFIG_NET_SCHED is not set
    4978. 

  4978. +
    4979. 

  4979. +#
    4980. 

  4980. +# Network testing
    4981. 

  4981. +#
    4982. 

  4982. +# CONFIG_NET_PKTGEN is not set
    4983. 

  4983. +
    4984. 

  4984. +#
    4985. 

  4985. +# Telephony Support
    4986. 

  4986. +#
    4987. 

  4987. +# CONFIG_PHONE is not set
    4988. 

  4988. +# CONFIG_PHONE_IXJ is not set
    4989. 

  4989. +# CONFIG_PHONE_IXJ_PCMCIA is not set
    4990. 

  4990. +
    4991. 

  4991. +#
    4992. 

  4992. +# ATA/IDE/MFM/RLL support
    4993. 

  4993. +#
    4994. 

  4994. +CONFIG_IDE=y
    4995. 

  4995. +
    4996. 

  4996. +#
    4997. 

  4997. +# IDE, ATA and ATAPI Block devices
    4998. 

  4998. +#
    4999. 

  4999. +CONFIG_BLK_DEV_IDE=y
    5000. 

  5000. +
    5001. 

  5001. +#
    5002. 

  5002. +# Please see Documentation/ide.txt for help/info on IDE drives
    5003. 

  5003. +#
    5004. 

  5004. +# CONFIG_BLK_DEV_HD_IDE is not set
    5005. 

  5005. +# CONFIG_BLK_DEV_HD is not set
    5006. 

  5006. +# CONFIG_BLK_DEV_IDE_SATA is not set
    5007. 

  5007. +CONFIG_BLK_DEV_IDEDISK=y
    5008. 

  5008. +CONFIG_IDEDISK_MULTI_MODE=y
    5009. 

  5009. +CONFIG_IDEDISK_STROKE=y
    5010. 

  5010. +CONFIG_BLK_DEV_IDECS=m
    5011. 

  5011. +# CONFIG_BLK_DEV_DELKIN is not set
    5012. 

  5012. +# CONFIG_BLK_DEV_IDECD is not set
    5013. 

  5013. +# CONFIG_BLK_DEV_IDETAPE is not set
    5014. 

  5014. +# CONFIG_BLK_DEV_IDEFLOPPY is not set
    5015. 

  5015. +# CONFIG_BLK_DEV_IDESCSI is not set
    5016. 

  5016. +# CONFIG_IDE_TASK_IOCTL is not set
    5017. 

  5017. +
    5018. 

  5018. +#
    5019. 

  5019. +# IDE chipset support/bugfixes
    5020. 

  5020. +#
    5021. 

  5021. +# CONFIG_BLK_DEV_CMD640 is not set
    5022. 

  5022. +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
    5023. 

  5023. +# CONFIG_BLK_DEV_ISAPNP is not set
    5024. 

  5024. +# CONFIG_BLK_DEV_IDEPCI is not set
    5025. 

  5025. +# CONFIG_IDE_CHIPSETS is not set
    5026. 

  5026. +# CONFIG_IDEDMA_AUTO is not set
    5027. 

  5027. +# CONFIG_DMA_NONPCI is not set
    5028. 

  5028. +# CONFIG_BLK_DEV_ATARAID is not set
    5029. 

  5029. +# CONFIG_BLK_DEV_ATARAID_PDC is not set
    5030. 

  5030. +# CONFIG_BLK_DEV_ATARAID_HPT is not set
    5031. 

  5031. +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
    5032. 

  5032. +# CONFIG_BLK_DEV_ATARAID_SII is not set
    5033. 

  5033. +
    5034. 

  5034. +#
    5035. 

  5035. +# SCSI support
    5036. 

  5036. +#
    5037. 

  5037. +CONFIG_SCSI=y
    5038. 

  5038. +
    5039. 

  5039. +#
    5040. 

  5040. +# SCSI support type (disk, tape, CD-ROM)
    5041. 

  5041. +#
    5042. 

  5042. +CONFIG_BLK_DEV_SD=y
    5043. 

  5043. +CONFIG_SD_EXTRA_DEVS=40
    5044. 

  5044. +CONFIG_CHR_DEV_ST=y
    5045. 

  5045. +# CONFIG_CHR_DEV_OSST is not set
    5046. 

  5046. +CONFIG_BLK_DEV_SR=y
    5047. 

  5047. +# CONFIG_BLK_DEV_SR_VENDOR is not set
    5048. 

  5048. +CONFIG_SR_EXTRA_DEVS=2
    5049. 

  5049. +# CONFIG_CHR_DEV_SG is not set
    5050. 

  5050. +
    5051. 

  5051. +#
    5052. 

  5052. +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
    5053. 

  5053. +#
    5054. 

  5054. +# CONFIG_SCSI_DEBUG_QUEUES is not set
    5055. 

  5055. +# CONFIG_SCSI_MULTI_LUN is not set
    5056. 

  5056. +CONFIG_SCSI_CONSTANTS=y
    5057. 

  5057. +# CONFIG_SCSI_LOGGING is not set
    5058. 

  5058. +
    5059. 

  5059. +#
    5060. 

  5060. +# SCSI low-level drivers
    5061. 

  5061. +#
    5062. 

  5062. +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
    5063. 

  5063. +# CONFIG_SCSI_7000FASST is not set
    5064. 

  5064. +# CONFIG_SCSI_ACARD is not set
    5065. 

  5065. +# CONFIG_SCSI_AHA152X is not set
    5066. 

  5066. +# CONFIG_SCSI_AHA1542 is not set
    5067. 

  5067. +# CONFIG_SCSI_AHA1740 is not set
    5068. 

  5068. +# CONFIG_SCSI_AACRAID is not set
    5069. 

  5069. +# CONFIG_SCSI_AIC7XXX is not set
    5070. 

  5070. +# CONFIG_SCSI_AIC79XX is not set
    5071. 

  5071. +# CONFIG_SCSI_AIC7XXX_OLD is not set
    5072. 

  5072. +# CONFIG_SCSI_DPT_I2O is not set
    5073. 

  5073. +# CONFIG_SCSI_ADVANSYS is not set
    5074. 

  5074. +# CONFIG_SCSI_IN2000 is not set
    5075. 

  5075. +# CONFIG_SCSI_AM53C974 is not set
    5076. 

  5076. +# CONFIG_SCSI_MEGARAID is not set
    5077. 

  5077. +# CONFIG_SCSI_MEGARAID2 is not set
    5078. 

  5078. +# CONFIG_SCSI_SATA is not set
    5079. 

  5079. +# CONFIG_SCSI_SATA_AHCI is not set
    5080. 

  5080. +# CONFIG_SCSI_SATA_SVW is not set
    5081. 

  5081. +# CONFIG_SCSI_ATA_PIIX is not set
    5082. 

  5082. +# CONFIG_SCSI_SATA_NV is not set
    5083. 

  5083. +# CONFIG_SCSI_SATA_QSTOR is not set
    5084. 

  5084. +# CONFIG_SCSI_SATA_PROMISE is not set
    5085. 

  5085. +# CONFIG_SCSI_SATA_SX4 is not set
    5086. 

  5086. +# CONFIG_SCSI_SATA_SIL is not set
    5087. 

  5087. +# CONFIG_SCSI_SATA_SIS is not set
    5088. 

  5088. +# CONFIG_SCSI_SATA_ULI is not set
    5089. 

  5089. +# CONFIG_SCSI_SATA_VIA is not set
    5090. 

  5090. +# CONFIG_SCSI_SATA_VITESSE is not set
    5091. 

  5091. +# CONFIG_SCSI_BUSLOGIC is not set
    5092. 

  5092. +# CONFIG_SCSI_CPQFCTS is not set
    5093. 

  5093. +# CONFIG_SCSI_DMX3191D is not set
    5094. 

  5094. +# CONFIG_SCSI_DTC3280 is not set
    5095. 

  5095. +# CONFIG_SCSI_EATA is not set
    5096. 

  5096. +# CONFIG_SCSI_EATA_DMA is not set
    5097. 

  5097. +# CONFIG_SCSI_EATA_PIO is not set
    5098. 

  5098. +# CONFIG_SCSI_FUTURE_DOMAIN is not set
    5099. 

  5099. +# CONFIG_SCSI_GDTH is not set
    5100. 

  5100. +# CONFIG_SCSI_GENERIC_NCR5380 is not set
    5101. 

  5101. +# CONFIG_SCSI_INITIO is not set
    5102. 

  5102. +# CONFIG_SCSI_INIA100 is not set
    5103. 

  5103. +# CONFIG_SCSI_NCR53C406A is not set
    5104. 

  5104. +# CONFIG_SCSI_NCR53C7xx is not set
    5105. 

  5105. +# CONFIG_SCSI_SYM53C8XX_2 is not set
    5106. 

  5106. +# CONFIG_SCSI_NCR53C8XX is not set
    5107. 

  5107. +# CONFIG_SCSI_SYM53C8XX is not set
    5108. 

  5108. +# CONFIG_SCSI_PAS16 is not set
    5109. 

  5109. +# CONFIG_SCSI_PCI2000 is not set
    5110. 

  5110. +# CONFIG_SCSI_PCI2220I is not set
    5111. 

  5111. +# CONFIG_SCSI_PSI240I is not set
    5112. 

  5112. +# CONFIG_SCSI_QLOGIC_FAS is not set
    5113. 

  5113. +# CONFIG_SCSI_QLOGIC_ISP is not set
    5114. 

  5114. +# CONFIG_SCSI_QLOGIC_FC is not set
    5115. 

  5115. +# CONFIG_SCSI_QLOGIC_1280 is not set
    5116. 

  5116. +# CONFIG_SCSI_SIM710 is not set
    5117. 

  5117. +# CONFIG_SCSI_SYM53C416 is not set
    5118. 

  5118. +# CONFIG_SCSI_DC390T is not set
    5119. 

  5119. +# CONFIG_SCSI_T128 is not set
    5120. 

  5120. +# CONFIG_SCSI_U14_34F is not set
    5121. 

  5121. +# CONFIG_SCSI_NSP32 is not set
    5122. 

  5122. +# CONFIG_SCSI_DEBUG is not set
    5123. 

  5123. +
    5124. 

  5124. +#
    5125. 

  5125. +# PCMCIA SCSI adapter support
    5126. 

  5126. +#
    5127. 

  5127. +# CONFIG_SCSI_PCMCIA is not set
    5128. 

  5128. +
    5129. 

  5129. +#
    5130. 

  5130. +# Fusion MPT device support
    5131. 

  5131. +#
    5132. 

  5132. +# CONFIG_FUSION is not set
    5133. 

  5133. +# CONFIG_FUSION_BOOT is not set
    5134. 

  5134. +# CONFIG_FUSION_ISENSE is not set
    5135. 

  5135. +# CONFIG_FUSION_CTL is not set
    5136. 

  5136. +# CONFIG_FUSION_LAN is not set
    5137. 

  5137. +
    5138. 

  5138. +#
    5139. 

  5139. +# IEEE 1394 (FireWire) support (EXPERIMENTAL)
    5140. 

  5140. +#
    5141. 

  5141. +# CONFIG_IEEE1394 is not set
    5142. 

  5142. +
    5143. 

  5143. +#
    5144. 

  5144. +# I2O device support
    5145. 

  5145. +#
    5146. 

  5146. +# CONFIG_I2O is not set
    5147. 

  5147. +# CONFIG_I2O_PCI is not set
    5148. 

  5148. +# CONFIG_I2O_BLOCK is not set
    5149. 

  5149. +# CONFIG_I2O_LAN is not set
    5150. 

  5150. +# CONFIG_I2O_SCSI is not set
    5151. 

  5151. +# CONFIG_I2O_PROC is not set
    5152. 

  5152. +
    5153. 

  5153. +#
    5154. 

  5154. +# Network device support
    5155. 

  5155. +#
    5156. 

  5156. +CONFIG_NETDEVICES=y
    5157. 

  5157. +
    5158. 

  5158. +#
    5159. 

  5159. +# ARCnet devices
    5160. 

  5160. +#
    5161. 

  5161. +# CONFIG_ARCNET is not set
    5162. 

  5162. +# CONFIG_DUMMY is not set
    5163. 

  5163. +# CONFIG_BONDING is not set
    5164. 

  5164. +# CONFIG_EQUALIZER is not set
    5165. 

  5165. +# CONFIG_TUN is not set
    5166. 

  5166. +# CONFIG_ETHERTAP is not set
    5167. 

  5167. +
    5168. 

  5168. +#
    5169. 

  5169. +# Ethernet (10 or 100Mbit)
    5170. 

  5170. +#
    5171. 

  5171. +CONFIG_NET_ETHERNET=y
    5172. 

  5172. +# CONFIG_SUNLANCE is not set
    5173. 

  5173. +# CONFIG_HAPPYMEAL is not set
    5174. 

  5174. +# CONFIG_SUNBMAC is not set
    5175. 

  5175. +# CONFIG_SUNQE is not set
    5176. 

  5176. +# CONFIG_SUNGEM is not set
    5177. 

  5177. +# CONFIG_NET_VENDOR_3COM is not set
    5178. 

  5178. +# CONFIG_LANCE is not set
    5179. 

  5179. +# CONFIG_NET_VENDOR_SMC is not set
    5180. 

  5180. +# CONFIG_NET_VENDOR_RACAL is not set
    5181. 

  5181. +# CONFIG_HP100 is not set
    5182. 

  5182. +# CONFIG_NET_ISA is not set
    5183. 

  5183. +# CONFIG_NET_PCI is not set
    5184. 

  5184. +# CONFIG_NET_POCKET is not set
    5185. 

  5185. +
    5186. 

  5186. +#
    5187. 

  5187. +# Ethernet (1000 Mbit)
    5188. 

  5188. +#
    5189. 

  5189. +# CONFIG_ACENIC is not set
    5190. 

  5190. +# CONFIG_DL2K is not set
    5191. 

  5191. +# CONFIG_E1000 is not set
    5192. 

  5192. +# CONFIG_MYRI_SBUS is not set
    5193. 

  5193. +# CONFIG_NS83820 is not set
    5194. 

  5194. +# CONFIG_HAMACHI is not set
    5195. 

  5195. +# CONFIG_YELLOWFIN is not set
    5196. 

  5196. +# CONFIG_R8169 is not set
    5197. 

  5197. +# CONFIG_SK98LIN is not set
    5198. 

  5198. +# CONFIG_TIGON3 is not set
    5199. 

  5199. +# CONFIG_FDDI is not set
    5200. 

  5200. +# CONFIG_HIPPI is not set
    5201. 

  5201. +# CONFIG_PLIP is not set
    5202. 

  5202. +# CONFIG_PPP is not set
    5203. 

  5203. +# CONFIG_SLIP is not set
    5204. 

  5204. +
    5205. 

  5205. +#
    5206. 

  5206. +# Wireless LAN (non-hamradio)
    5207. 

  5207. +#
    5208. 

  5208. +# CONFIG_NET_RADIO is not set
    5209. 

  5209. +
    5210. 

  5210. +#
    5211. 

  5211. +# Token Ring devices
    5212. 

  5212. +#
    5213. 

  5213. +# CONFIG_TR is not set
    5214. 

  5214. +# CONFIG_NET_FC is not set
    5215. 

  5215. +# CONFIG_RCPCI is not set
    5216. 

  5216. +# CONFIG_SHAPER is not set
    5217. 

  5217. +
    5218. 

  5218. +#
    5219. 

  5219. +# Wan interfaces
    5220. 

  5220. +#
    5221. 

  5221. +# CONFIG_WAN is not set
    5222. 

  5222. +
    5223. 

  5223. +#
    5224. 

  5224. +# PCMCIA network device support
    5225. 

  5225. +#
    5226. 

  5226. +# CONFIG_NET_PCMCIA is not set
    5227. 

  5227. +
    5228. 

  5228. +#
    5229. 

  5229. +# Amateur Radio support
    5230. 

  5230. +#
    5231. 

  5231. +# CONFIG_HAMRADIO is not set
    5232. 

  5232. +
    5233. 

  5233. +#
    5234. 

  5234. +# IrDA (infrared) support
    5235. 

  5235. +#
    5236. 

  5236. +# CONFIG_IRDA is not set
    5237. 

  5237. +
    5238. 

  5238. +#
    5239. 

  5239. +# ISDN subsystem
    5240. 

  5240. +#
    5241. 

  5241. +# CONFIG_ISDN is not set
    5242. 

  5242. +
    5243. 

  5243. +#
    5244. 

  5244. +# Input core support
    5245. 

  5245. +#
    5246. 

  5246. +CONFIG_INPUT=y
    5247. 

  5247. +CONFIG_INPUT_KEYBDEV=y
    5248. 

  5248. +CONFIG_INPUT_MOUSEDEV=y
    5249. 

  5249. +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
    5250. 

  5250. +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
    5251. 

  5251. +# CONFIG_INPUT_JOYDEV is not set
    5252. 

  5252. +CONFIG_INPUT_EVDEV=y
    5253. 

  5253. +# CONFIG_INPUT_UINPUT is not set
    5254. 

  5254. +
    5255. 

  5255. +#
    5256. 

  5256. +# Character devices
    5257. 

  5257. +#
    5258. 

  5258. +CONFIG_VT=y
    5259. 

  5259. +# CONFIG_VT_CONSOLE is not set
    5260. 

  5260. +# CONFIG_SERIAL is not set
    5261. 

  5261. +# CONFIG_SERIAL_EXTENDED is not set
    5262. 

  5262. +CONFIG_SERIAL_NONSTANDARD=y
    5263. 

  5263. +# CONFIG_COMPUTONE is not set
    5264. 

  5264. +# CONFIG_ROCKETPORT is not set
    5265. 

  5265. +# CONFIG_CYCLADES is not set
    5266. 

  5266. +# CONFIG_DIGIEPCA is not set
    5267. 

  5267. +# CONFIG_DIGI is not set
    5268. 

  5268. +# CONFIG_ESPSERIAL is not set
    5269. 

  5269. +# CONFIG_MOXA_INTELLIO is not set
    5270. 

  5270. +# CONFIG_MOXA_SMARTIO is not set
    5271. 

  5271. +# CONFIG_ISI is not set
    5272. 

  5272. +# CONFIG_SYNCLINK is not set
    5273. 

  5273. +# CONFIG_SYNCLINKMP is not set
    5274. 

  5274. +# CONFIG_N_HDLC is not set
    5275. 

  5275. +# CONFIG_RISCOM8 is not set
    5276. 

  5276. +# CONFIG_SPECIALIX is not set
    5277. 

  5277. +# CONFIG_SX is not set
    5278. 

  5278. +# CONFIG_RIO is not set
    5279. 

  5279. +# CONFIG_STALDRV is not set
    5280. 

  5280. +# CONFIG_SERIAL_TX3912 is not set
    5281. 

  5281. +# CONFIG_SERIAL_TX3912_CONSOLE is not set
    5282. 

  5282. +# CONFIG_SERIAL_TXX9 is not set
    5283. 

  5283. +# CONFIG_SERIAL_TXX9_CONSOLE is not set
    5284. 

  5284. +# CONFIG_TXX927_SERIAL is not set
    5285. 

  5285. +CONFIG_UNIX98_PTYS=y
    5286. 

  5286. +CONFIG_UNIX98_PTY_COUNT=256
    5287. 

  5287. +
    5288. 

  5288. +#
    5289. 

  5289. +# I2C support
    5290. 

  5290. +#
    5291. 

  5291. +# CONFIG_I2C is not set
    5292. 

  5292. +
    5293. 

  5293. +#
    5294. 

  5294. +# Mice
    5295. 

  5295. +#
    5296. 

  5296. +# CONFIG_BUSMOUSE is not set
    5297. 

  5297. +# CONFIG_MOUSE is not set
    5298. 

  5298. +
    5299. 

  5299. +#
    5300. 

  5300. +# Joysticks
    5301. 

  5301. +#
    5302. 

  5302. +# CONFIG_INPUT_GAMEPORT is not set
    5303. 

  5303. +# CONFIG_INPUT_NS558 is not set
    5304. 

  5304. +# CONFIG_INPUT_LIGHTNING is not set
    5305. 

  5305. +# CONFIG_INPUT_PCIGAME is not set
    5306. 

  5306. +# CONFIG_INPUT_CS461X is not set
    5307. 

  5307. +# CONFIG_INPUT_EMU10K1 is not set
    5308. 

  5308. +# CONFIG_INPUT_SERIO is not set
    5309. 

  5309. +# CONFIG_INPUT_SERPORT is not set
    5310. 

  5310. +
    5311. 

  5311. +#
    5312. 

  5312. +# Joysticks
    5313. 

  5313. +#
    5314. 

  5314. +# CONFIG_INPUT_ANALOG is not set
    5315. 

  5315. +# CONFIG_INPUT_A3D is not set
    5316. 

  5316. +# CONFIG_INPUT_ADI is not set
    5317. 

  5317. +# CONFIG_INPUT_COBRA is not set
    5318. 

  5318. +# CONFIG_INPUT_GF2K is not set
    5319. 

  5319. +# CONFIG_INPUT_GRIP is not set
    5320. 

  5320. +# CONFIG_INPUT_INTERACT is not set
    5321. 

  5321. +# CONFIG_INPUT_TMDC is not set
    5322. 

  5322. +# CONFIG_INPUT_SIDEWINDER is not set
    5323. 

  5323. +# CONFIG_INPUT_IFORCE_USB is not set
    5324. 

  5324. +# CONFIG_INPUT_IFORCE_232 is not set
    5325. 

  5325. +# CONFIG_INPUT_WARRIOR is not set
    5326. 

  5326. +# CONFIG_INPUT_MAGELLAN is not set
    5327. 

  5327. +# CONFIG_INPUT_SPACEORB is not set
    5328. 

  5328. +# CONFIG_INPUT_SPACEBALL is not set
    5329. 

  5329. +# CONFIG_INPUT_STINGER is not set
    5330. 

  5330. +# CONFIG_INPUT_DB9 is not set
    5331. 

  5331. +# CONFIG_INPUT_GAMECON is not set
    5332. 

  5332. +# CONFIG_INPUT_TURBOGRAFX is not set
    5333. 

  5333. +# CONFIG_QIC02_TAPE is not set
    5334. 

  5334. +# CONFIG_IPMI_HANDLER is not set
    5335. 

  5335. +# CONFIG_IPMI_PANIC_EVENT is not set
    5336. 

  5336. +# CONFIG_IPMI_DEVICE_INTERFACE is not set
    5337. 

  5337. +# CONFIG_IPMI_KCS is not set
    5338. 

  5338. +# CONFIG_IPMI_WATCHDOG is not set
    5339. 

  5339. +
    5340. 

  5340. +#
    5341. 

  5341. +# Watchdog Cards
    5342. 

  5342. +#
    5343. 

  5343. +# CONFIG_WATCHDOG is not set
    5344. 

  5344. +# CONFIG_SCx200 is not set
    5345. 

  5345. +# CONFIG_SCx200_GPIO is not set
    5346. 

  5346. +# CONFIG_AMD_PM768 is not set
    5347. 

  5347. +# CONFIG_NVRAM is not set
    5348. 

  5348. +# CONFIG_RTC is not set
    5349. 

  5349. +# CONFIG_DTLK is not set
    5350. 

  5350. +# CONFIG_R3964 is not set
    5351. 

  5351. +# CONFIG_APPLICOM is not set
    5352. 

  5352. +
    5353. 

  5353. +#
    5354. 

  5354. +# Ftape, the floppy tape device driver
    5355. 

  5355. +#
    5356. 

  5356. +# CONFIG_FTAPE is not set
    5357. 

  5357. +# CONFIG_AGP is not set
    5358. 

  5358. +
    5359. 

  5359. +#
    5360. 

  5360. +# Direct Rendering Manager (XFree86 DRI support)
    5361. 

  5361. +#
    5362. 

  5362. +# CONFIG_DRM is not set
    5363. 

  5363. +
    5364. 

  5364. +#
    5365. 

  5365. +# PCMCIA character devices
    5366. 

  5366. +#
    5367. 

  5367. +# CONFIG_PCMCIA_SERIAL_CS is not set
    5368. 

  5368. +# CONFIG_SYNCLINK_CS is not set
    5369. 

  5369. +
    5370. 

  5370. +#
    5371. 

  5371. +# File systems
    5372. 

  5372. +#
    5373. 

  5373. +# CONFIG_QUOTA is not set
    5374. 

  5374. +# CONFIG_QFMT_V2 is not set
    5375. 

  5375. +CONFIG_AUTOFS_FS=y
    5376. 

  5376. +# CONFIG_AUTOFS4_FS is not set
    5377. 

  5377. +# CONFIG_REISERFS_FS is not set
    5378. 

  5378. +# CONFIG_REISERFS_CHECK is not set
    5379. 

  5379. +# CONFIG_REISERFS_PROC_INFO is not set
    5380. 

  5380. +# CONFIG_ADFS_FS is not set
    5381. 

  5381. +# CONFIG_ADFS_FS_RW is not set
    5382. 

  5382. +# CONFIG_AFFS_FS is not set
    5383. 

  5383. +# CONFIG_HFS_FS is not set
    5384. 

  5384. +# CONFIG_HFSPLUS_FS is not set
    5385. 

  5385. +# CONFIG_BEFS_FS is not set
    5386. 

  5386. +# CONFIG_BEFS_DEBUG is not set
    5387. 

  5387. +# CONFIG_BFS_FS is not set
    5388. 

  5388. +CONFIG_EXT3_FS=y
    5389. 

  5389. +CONFIG_JBD=y
    5390. 

  5390. +# CONFIG_JBD_DEBUG is not set
    5391. 

  5391. +CONFIG_FAT_FS=y
    5392. 

  5392. +CONFIG_MSDOS_FS=y
    5393. 

  5393. +# CONFIG_UMSDOS_FS is not set
    5394. 

  5394. +CONFIG_VFAT_FS=y
    5395. 

  5395. +# CONFIG_EFS_FS is not set
    5396. 

  5396. +# CONFIG_JFFS_FS is not set
    5397. 

  5397. +# CONFIG_JFFS2_FS is not set
    5398. 

  5398. +# CONFIG_CRAMFS is not set
    5399. 

  5399. +CONFIG_TMPFS=y
    5400. 

  5400. +CONFIG_RAMFS=y
    5401. 

  5401. +# CONFIG_ISO9660_FS is not set
    5402. 

  5402. +# CONFIG_JOLIET is not set
    5403. 

  5403. +# CONFIG_ZISOFS is not set
    5404. 

  5404. +# CONFIG_JFS_FS is not set
    5405. 

  5405. +# CONFIG_JFS_DEBUG is not set
    5406. 

  5406. +# CONFIG_JFS_STATISTICS is not set
    5407. 

  5407. +# CONFIG_MINIX_FS is not set
    5408. 

  5408. +# CONFIG_VXFS_FS is not set
    5409. 

  5409. +# CONFIG_NTFS_FS is not set
    5410. 

  5410. +# CONFIG_NTFS_RW is not set
    5411. 

  5411. +# CONFIG_HPFS_FS is not set
    5412. 

  5412. +CONFIG_PROC_FS=y
    5413. 

  5413. +# CONFIG_DEVFS_FS is not set
    5414. 

  5414. +# CONFIG_DEVFS_MOUNT is not set
    5415. 

  5415. +# CONFIG_DEVFS_DEBUG is not set
    5416. 

  5416. +CONFIG_DEVPTS_FS=y
    5417. 

  5417. +# CONFIG_QNX4FS_FS is not set
    5418. 

  5418. +# CONFIG_QNX4FS_RW is not set
    5419. 

  5419. +# CONFIG_ROMFS_FS is not set
    5420. 

  5420. +CONFIG_EXT2_FS=y
    5421. 

  5421. +# CONFIG_SYSV_FS is not set
    5422. 

  5422. +# CONFIG_UDF_FS is not set
    5423. 

  5423. +# CONFIG_UDF_RW is not set
    5424. 

  5424. +# CONFIG_UFS_FS is not set
    5425. 

  5425. +# CONFIG_UFS_FS_WRITE is not set
    5426. 

  5426. +# CONFIG_XFS_FS is not set
    5427. 

  5427. +# CONFIG_XFS_QUOTA is not set
    5428. 

  5428. +# CONFIG_XFS_RT is not set
    5429. 

  5429. +# CONFIG_XFS_TRACE is not set
    5430. 

  5430. +# CONFIG_XFS_DEBUG is not set
    5431. 

  5431. +
    5432. 

  5432. +#
    5433. 

  5433. +# Network File Systems
    5434. 

  5434. +#
    5435. 

  5435. +# CONFIG_CODA_FS is not set
    5436. 

  5436. +# CONFIG_INTERMEZZO_FS is not set
    5437. 

  5437. +CONFIG_NFS_FS=y
    5438. 

  5438. +CONFIG_NFS_V3=y
    5439. 

  5439. +# CONFIG_NFS_DIRECTIO is not set
    5440. 

  5440. +CONFIG_ROOT_NFS=y
    5441. 

  5441. +# CONFIG_NFSD is not set
    5442. 

  5442. +# CONFIG_NFSD_V3 is not set
    5443. 

  5443. +# CONFIG_NFSD_TCP is not set
    5444. 

  5444. +CONFIG_SUNRPC=y
    5445. 

  5445. +CONFIG_LOCKD=y
    5446. 

  5446. +CONFIG_LOCKD_V4=y
    5447. 

  5447. +# CONFIG_SMB_FS is not set
    5448. 

  5448. +# CONFIG_NCP_FS is not set
    5449. 

  5449. +# CONFIG_NCPFS_PACKET_SIGNING is not set
    5450. 

  5450. +# CONFIG_NCPFS_IOCTL_LOCKING is not set
    5451. 

  5451. +# CONFIG_NCPFS_STRONG is not set
    5452. 

  5452. +# CONFIG_NCPFS_NFS_NS is not set
    5453. 

  5453. +# CONFIG_NCPFS_OS2_NS is not set
    5454. 

  5454. +# CONFIG_NCPFS_SMALLDOS is not set
    5455. 

  5455. +# CONFIG_NCPFS_NLS is not set
    5456. 

  5456. +# CONFIG_NCPFS_EXTRAS is not set
    5457. 

  5457. +# CONFIG_ZISOFS_FS is not set
    5458. 

  5458. +
    5459. 

  5459. +#
    5460. 

  5460. +# Partition Types
    5461. 

  5461. +#
    5462. 

  5462. +# CONFIG_PARTITION_ADVANCED is not set
    5463. 

  5463. +CONFIG_MSDOS_PARTITION=y
    5464. 

  5464. +# CONFIG_SMB_NLS is not set
    5465. 

  5465. +CONFIG_NLS=y
    5466. 

  5466. +
    5467. 

  5467. +#
    5468. 

  5468. +# Native Language Support
    5469. 

  5469. +#
    5470. 

  5470. +CONFIG_NLS_DEFAULT="iso8859-1"
    5471. 

  5471. +# CONFIG_NLS_CODEPAGE_437 is not set
    5472. 

  5472. +# CONFIG_NLS_CODEPAGE_737 is not set
    5473. 

  5473. +# CONFIG_NLS_CODEPAGE_775 is not set
    5474. 

  5474. +# CONFIG_NLS_CODEPAGE_850 is not set
    5475. 

  5475. +# CONFIG_NLS_CODEPAGE_852 is not set
    5476. 

  5476. +# CONFIG_NLS_CODEPAGE_855 is not set
    5477. 

  5477. +# CONFIG_NLS_CODEPAGE_857 is not set
    5478. 

  5478. +# CONFIG_NLS_CODEPAGE_860 is not set
    5479. 

  5479. +# CONFIG_NLS_CODEPAGE_861 is not set
    5480. 

  5480. +# CONFIG_NLS_CODEPAGE_862 is not set
    5481. 

  5481. +# CONFIG_NLS_CODEPAGE_863 is not set
    5482. 

  5482. +# CONFIG_NLS_CODEPAGE_864 is not set
    5483. 

  5483. +# CONFIG_NLS_CODEPAGE_865 is not set
    5484. 

  5484. +# CONFIG_NLS_CODEPAGE_866 is not set
    5485. 

  5485. +# CONFIG_NLS_CODEPAGE_869 is not set
    5486. 

  5486. +# CONFIG_NLS_CODEPAGE_936 is not set
    5487. 

  5487. +# CONFIG_NLS_CODEPAGE_950 is not set
    5488. 

  5488. +# CONFIG_NLS_CODEPAGE_932 is not set
    5489. 

  5489. +# CONFIG_NLS_CODEPAGE_949 is not set
    5490. 

  5490. +# CONFIG_NLS_CODEPAGE_874 is not set
    5491. 

  5491. +# CONFIG_NLS_ISO8859_8 is not set
    5492. 

  5492. +# CONFIG_NLS_CODEPAGE_1250 is not set
    5493. 

  5493. +# CONFIG_NLS_CODEPAGE_1251 is not set
    5494. 

  5494. +# CONFIG_NLS_ISO8859_1 is not set
    5495. 

  5495. +# CONFIG_NLS_ISO8859_2 is not set
    5496. 

  5496. +# CONFIG_NLS_ISO8859_3 is not set
    5497. 

  5497. +# CONFIG_NLS_ISO8859_4 is not set
    5498. 

  5498. +# CONFIG_NLS_ISO8859_5 is not set
    5499. 

  5499. +# CONFIG_NLS_ISO8859_6 is not set
    5500. 

  5500. +# CONFIG_NLS_ISO8859_7 is not set
    5501. 

  5501. +# CONFIG_NLS_ISO8859_9 is not set
    5502. 

  5502. +# CONFIG_NLS_ISO8859_13 is not set
    5503. 

  5503. +# CONFIG_NLS_ISO8859_14 is not set
    5504. 

  5504. +# CONFIG_NLS_ISO8859_15 is not set
    5505. 

  5505. +# CONFIG_NLS_KOI8_R is not set
    5506. 

  5506. +# CONFIG_NLS_KOI8_U is not set
    5507. 

  5507. +# CONFIG_NLS_UTF8 is not set
    5508. 

  5508. +
    5509. 

  5509. +#
    5510. 

  5510. +# Multimedia devices
    5511. 

  5511. +#
    5512. 

  5512. +# CONFIG_VIDEO_DEV is not set
    5513. 

  5513. +
    5514. 

  5514. +#
    5515. 

  5515. +# Console drivers
    5516. 

  5516. +#
    5517. 

  5517. +# CONFIG_VGA_CONSOLE is not set
    5518. 

  5518. +# CONFIG_MDA_CONSOLE is not set
    5519. 

  5519. +
    5520. 

  5520. +#
    5521. 

  5521. +# Frame-buffer support
    5522. 

  5522. +#
    5523. 

  5523. +CONFIG_FB=y
    5524. 

  5524. +CONFIG_DUMMY_CONSOLE=y
    5525. 

  5525. +# CONFIG_FB_RIVA is not set
    5526. 

  5526. +# CONFIG_FB_CLGEN is not set
    5527. 

  5527. +# CONFIG_FB_PM2 is not set
    5528. 

  5528. +# CONFIG_FB_PM3 is not set
    5529. 

  5529. +# CONFIG_FB_CYBER2000 is not set
    5530. 

  5530. +# CONFIG_FB_MATROX is not set
    5531. 

  5531. +# CONFIG_FB_ATY is not set
    5532. 

  5532. +# CONFIG_FB_RADEON is not set
    5533. 

  5533. +# CONFIG_FB_ATY128 is not set
    5534. 

  5534. +# CONFIG_FB_INTEL is not set
    5535. 

  5535. +# CONFIG_FB_SIS is not set
    5536. 

  5536. +# CONFIG_FB_NEOMAGIC is not set
    5537. 

  5537. +# CONFIG_FB_3DFX is not set
    5538. 

  5538. +# CONFIG_FB_VOODOO1 is not set
    5539. 

  5539. +# CONFIG_FB_TRIDENT is not set
    5540. 

  5540. +# CONFIG_FB_E1356 is not set
    5541. 

  5541. +# CONFIG_FB_IT8181 is not set
    5542. 

  5542. +# CONFIG_FB_VIRTUAL is not set
    5543. 

  5543. +CONFIG_FBCON_ADVANCED=y
    5544. 

  5544. +# CONFIG_FBCON_MFB is not set
    5545. 

  5545. +# CONFIG_FBCON_CFB2 is not set
    5546. 

  5546. +# CONFIG_FBCON_CFB4 is not set
    5547. 

  5547. +# CONFIG_FBCON_CFB8 is not set
    5548. 

  5548. +CONFIG_FBCON_CFB16=y
    5549. 

  5549. +# CONFIG_FBCON_CFB24 is not set
    5550. 

  5550. +CONFIG_FBCON_CFB32=y
    5551. 

  5551. +# CONFIG_FBCON_AFB is not set
    5552. 

  5552. +# CONFIG_FBCON_ILBM is not set
    5553. 

  5553. +# CONFIG_FBCON_IPLAN2P2 is not set
    5554. 

  5554. +# CONFIG_FBCON_IPLAN2P4 is not set
    5555. 

  5555. +# CONFIG_FBCON_IPLAN2P8 is not set
    5556. 

  5556. +# CONFIG_FBCON_MAC is not set
    5557. 

  5557. +# CONFIG_FBCON_VGA_PLANES is not set
    5558. 

  5558. +# CONFIG_FBCON_VGA is not set
    5559. 

  5559. +# CONFIG_FBCON_HGA is not set
    5560. 

  5560. +# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
    5561. 

  5561. +CONFIG_FBCON_FONTS=y
    5562. 

  5562. +CONFIG_FONT_8x8=y
    5563. 

  5563. +CONFIG_FONT_8x16=y
    5564. 

  5564. +# CONFIG_FONT_SUN8x16 is not set
    5565. 

  5565. +# CONFIG_FONT_SUN12x22 is not set
    5566. 

  5566. +# CONFIG_FONT_6x11 is not set
    5567. 

  5567. +# CONFIG_FONT_PEARL_8x8 is not set
    5568. 

  5568. +# CONFIG_FONT_ACORN_8x8 is not set
    5569. 

  5569. +
    5570. 

  5570. +#
    5571. 

  5571. +# Sound
    5572. 

  5572. +#
    5573. 

  5573. +CONFIG_SOUND=y
    5574. 

  5574. +# CONFIG_SOUND_ALI5455 is not set
    5575. 

  5575. +# CONFIG_SOUND_BT878 is not set
    5576. 

  5576. +# CONFIG_SOUND_CMPCI is not set
    5577. 

  5577. +# CONFIG_SOUND_EMU10K1 is not set
    5578. 

  5578. +# CONFIG_MIDI_EMU10K1 is not set
    5579. 

  5579. +# CONFIG_SOUND_FUSION is not set
    5580. 

  5580. +# CONFIG_SOUND_CS4281 is not set
    5581. 

  5581. +# CONFIG_SOUND_ES1370 is not set
    5582. 

  5582. +# CONFIG_SOUND_ES1371 is not set
    5583. 

  5583. +# CONFIG_SOUND_ESSSOLO1 is not set
    5584. 

  5584. +# CONFIG_SOUND_MAESTRO is not set
    5585. 

  5585. +# CONFIG_SOUND_MAESTRO3 is not set
    5586. 

  5586. +# CONFIG_SOUND_FORTE is not set
    5587. 

  5587. +# CONFIG_SOUND_ICH is not set
    5588. 

  5588. +# CONFIG_SOUND_RME96XX is not set
    5589. 

  5589. +# CONFIG_SOUND_SONICVIBES is not set
    5590. 

  5590. +# CONFIG_SOUND_TRIDENT is not set
    5591. 

  5591. +# CONFIG_SOUND_MSNDCLAS is not set
    5592. 

  5592. +# CONFIG_SOUND_MSNDPIN is not set
    5593. 

  5593. +# CONFIG_SOUND_VIA82CXXX is not set
    5594. 

  5594. +# CONFIG_MIDI_VIA82CXXX is not set
    5595. 

  5595. +# CONFIG_SOUND_OSS is not set
    5596. 

  5596. +# CONFIG_SOUND_TVMIXER is not set
    5597. 

  5597. +# CONFIG_SOUND_AD1980 is not set
    5598. 

  5598. +# CONFIG_SOUND_WM97XX is not set
    5599. 

  5599. +
    5600. 

  5600. +#
    5601. 

  5601. +# USB support
    5602. 

  5602. +#
    5603. 

  5603. +CONFIG_USB=y
    5604. 

  5604. +# CONFIG_USB_DEBUG is not set
    5605. 

  5605. +
    5606. 

  5606. +#
    5607. 

  5607. +# Miscellaneous USB options
    5608. 

  5608. +#
    5609. 

  5609. +CONFIG_USB_DEVICEFS=y
    5610. 

  5610. +# CONFIG_USB_BANDWIDTH is not set
    5611. 

  5611. +
    5612. 

  5612. +#
    5613. 

  5613. +# USB Host Controller Drivers
    5614. 

  5614. +#
    5615. 

  5615. +# CONFIG_USB_EHCI_HCD is not set
    5616. 

  5616. +# CONFIG_USB_UHCI is not set
    5617. 

  5617. +# CONFIG_USB_UHCI_ALT is not set
    5618. 

  5618. +CONFIG_USB_OHCI=y
    5619. 

  5619. +
    5620. 

  5620. +#
    5621. 

  5621. +# USB Device Class drivers
    5622. 

  5622. +#
    5623. 

  5623. +# CONFIG_USB_AUDIO is not set
    5624. 

  5624. +# CONFIG_USB_EMI26 is not set
    5625. 

  5625. +# CONFIG_USB_BLUETOOTH is not set
    5626. 

  5626. +# CONFIG_USB_MIDI is not set
    5627. 

  5627. +CONFIG_USB_STORAGE=y
    5628. 

  5628. +# CONFIG_USB_STORAGE_DEBUG is not set
    5629. 

  5629. +# CONFIG_USB_STORAGE_DATAFAB is not set
    5630. 

  5630. +# CONFIG_USB_STORAGE_FREECOM is not set
    5631. 

  5631. +# CONFIG_USB_STORAGE_ISD200 is not set
    5632. 

  5632. +# CONFIG_USB_STORAGE_DPCM is not set
    5633. 

  5633. +# CONFIG_USB_STORAGE_HP8200e is not set
    5634. 

  5634. +# CONFIG_USB_STORAGE_SDDR09 is not set
    5635. 

  5635. +# CONFIG_USB_STORAGE_SDDR55 is not set
    5636. 

  5636. +# CONFIG_USB_STORAGE_JUMPSHOT is not set
    5637. 

  5637. +# CONFIG_USB_ACM is not set
    5638. 

  5638. +# CONFIG_USB_PRINTER is not set
    5639. 

  5639. +
    5640. 

  5640. +#
    5641. 

  5641. +# USB Human Interface Devices (HID)
    5642. 

  5642. +#
    5643. 

  5643. +CONFIG_USB_HID=y
    5644. 

  5644. +CONFIG_USB_HIDINPUT=y
    5645. 

  5645. +CONFIG_USB_HIDDEV=y
    5646. 

  5646. +# CONFIG_USB_AIPTEK is not set
    5647. 

  5647. +# CONFIG_USB_WACOM is not set
    5648. 

  5648. +# CONFIG_USB_KBTAB is not set
    5649. 

  5649. +# CONFIG_USB_POWERMATE is not set
    5650. 

  5650. +
    5651. 

  5651. +#
    5652. 

  5652. +# USB Imaging devices
    5653. 

  5653. +#
    5654. 

  5654. +# CONFIG_USB_DC2XX is not set
    5655. 

  5655. +# CONFIG_USB_MDC800 is not set
    5656. 

  5656. +# CONFIG_USB_SCANNER is not set
    5657. 

  5657. +# CONFIG_USB_MICROTEK is not set
    5658. 

  5658. +# CONFIG_USB_HPUSBSCSI is not set
    5659. 

  5659. +
    5660. 

  5660. +#
    5661. 

  5661. +# USB Multimedia devices
    5662. 

  5662. +#
    5663. 

  5663. +
    5664. 

  5664. +#
    5665. 

  5665. +#   Video4Linux support is needed for USB Multimedia device support
    5666. 

  5666. +#
    5667. 

  5667. +
    5668. 

  5668. +#
    5669. 

  5669. +# USB Network adaptors
    5670. 

  5670. +#
    5671. 

  5671. +# CONFIG_USB_PEGASUS is not set
    5672. 

  5672. +# CONFIG_USB_RTL8150 is not set
    5673. 

  5673. +# CONFIG_USB_KAWETH is not set
    5674. 

  5674. +# CONFIG_USB_CATC is not set
    5675. 

  5675. +# CONFIG_USB_CDCETHER is not set
    5676. 

  5676. +# CONFIG_USB_USBNET is not set
    5677. 

  5677. +
    5678. 

  5678. +#
    5679. 

  5679. +# USB port drivers
    5680. 

  5680. +#
    5681. 

  5681. +# CONFIG_USB_USS720 is not set
    5682. 

  5682. +
    5683. 

  5683. +#
    5684. 

  5684. +# USB Serial Converter support
    5685. 

  5685. +#
    5686. 

  5686. +# CONFIG_USB_SERIAL is not set
    5687. 

  5687. +
    5688. 

  5688. +#
    5689. 

  5689. +# USB Miscellaneous drivers
    5690. 

  5690. +#
    5691. 

  5691. +# CONFIG_USB_RIO500 is not set
    5692. 

  5692. +# CONFIG_USB_AUERSWALD is not set
    5693. 

  5693. +# CONFIG_USB_TIGL is not set
    5694. 

  5694. +# CONFIG_USB_BRLVGER is not set
    5695. 

  5695. +# CONFIG_USB_LCD is not set
    5696. 

  5696. +
    5697. 

  5697. +#
    5698. 

  5698. +# Support for USB gadgets
    5699. 

  5699. +#
    5700. 

  5700. +# CONFIG_USB_GADGET is not set
    5701. 

  5701. +
    5702. 

  5702. +#
    5703. 

  5703. +# Bluetooth support
    5704. 

  5704. +#
    5705. 

  5705. +# CONFIG_BLUEZ is not set
    5706. 

  5706. +
    5707. 

  5707. +#
    5708. 

  5708. +# Kernel hacking
    5709. 

  5709. +#
    5710. 

  5710. +CONFIG_CROSSCOMPILE=y
    5711. 

  5711. +# CONFIG_RUNTIME_DEBUG is not set
    5712. 

  5712. +# CONFIG_KGDB is not set
    5713. 

  5713. +# CONFIG_GDB_CONSOLE is not set
    5714. 

  5714. +# CONFIG_DEBUG_INFO is not set
    5715. 

  5715. +# CONFIG_MAGIC_SYSRQ is not set
    5716. 

  5716. +# CONFIG_MIPS_UNCACHED is not set
    5717. 

  5717. +CONFIG_LOG_BUF_SHIFT=0
    5718. 

  5718. +
    5719. 

  5719. +#
    5720. 

  5720. +# Cryptographic options
    5721. 

  5721. +#
    5722. 

  5722. +# CONFIG_CRYPTO is not set
    5723. 

  5723. +
    5724. 

  5724. +#
    5725. 

  5725. +# Library routines
    5726. 

  5726. +#
    5727. 

  5727. +# CONFIG_CRC32 is not set
    5728. 

  5728. +CONFIG_ZLIB_INFLATE=m
    5729. 

  5729. +CONFIG_ZLIB_DEFLATE=m
    5730. 

  5730. +# CONFIG_FW_LOADER is not set
    5731. 

  5731. --- a/arch/mips/defconfig-db1500
    5732. 

  5732. +++ b/arch/mips/defconfig-db1500
    5733. 

  5733. @@ -30,8 +30,8 @@ CONFIG_MIPS_DB1500=y
    5734. 

  5734.  # CONFIG_MIPS_PB1000 is not set
    5735. 

  5735.  # CONFIG_MIPS_PB1100 is not set
    5736. 

  5736.  # CONFIG_MIPS_PB1500 is not set
    5737. 

  5737. -# CONFIG_MIPS_HYDROGEN3 is not set
    5738. 

  5738.  # CONFIG_MIPS_PB1550 is not set
    5739. 

  5739. +# CONFIG_MIPS_HYDROGEN3 is not set
    5740. 

  5740.  # CONFIG_MIPS_XXS1500 is not set
    5741. 

  5741.  # CONFIG_MIPS_MTX1 is not set
    5742. 

  5742.  # CONFIG_COGENT_CSB250 is not set
    5743. 

  5743. @@ -267,11 +267,6 @@ CONFIG_IP_PNP_BOOTP=y
    5744. 

  5744.  #
    5745. 

  5745.  # CONFIG_IPX is not set
    5746. 

  5746.  # CONFIG_ATALK is not set
    5747. 

  5747. -
    5748. 

  5748. -#
    5749. 

  5749. -# Appletalk devices
    5750. 

  5750. -#
    5751. 

  5751. -# CONFIG_DEV_APPLETALK is not set
    5752. 

  5752.  # CONFIG_DECNET is not set
    5753. 

  5753.  # CONFIG_BRIDGE is not set
    5754. 

  5754.  # CONFIG_X25 is not set
    5755. 

  5755. @@ -555,7 +550,6 @@ CONFIG_AU1X00_SERIAL_CONSOLE=y
    5756. 

  5756.  # CONFIG_AU1X00_USB_TTY is not set
    5757. 

  5757.  # CONFIG_AU1X00_USB_RAW is not set
    5758. 

  5758.  # CONFIG_TXX927_SERIAL is not set
    5759. 

  5759. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    5760. 

  5760.  CONFIG_UNIX98_PTYS=y
    5761. 

  5761.  CONFIG_UNIX98_PTY_COUNT=256
    5762. 

  5762.  
    5763. 

  5763. --- a/arch/mips/defconfig-db1550
    5764. 

  5764. +++ b/arch/mips/defconfig-db1550
    5765. 

  5765. @@ -30,8 +30,8 @@ CONFIG_MIPS_DB1550=y
    5766. 

  5766.  # CONFIG_MIPS_PB1000 is not set
    5767. 

  5767.  # CONFIG_MIPS_PB1100 is not set
    5768. 

  5768.  # CONFIG_MIPS_PB1500 is not set
    5769. 

  5769. -# CONFIG_MIPS_HYDROGEN3 is not set
    5770. 

  5770.  # CONFIG_MIPS_PB1550 is not set
    5771. 

  5771. +# CONFIG_MIPS_HYDROGEN3 is not set
    5772. 

  5772.  # CONFIG_MIPS_XXS1500 is not set
    5773. 

  5773.  # CONFIG_MIPS_MTX1 is not set
    5774. 

  5774.  # CONFIG_COGENT_CSB250 is not set
    5775. 

  5775. @@ -213,11 +213,9 @@ CONFIG_MTD_CFI_AMDSTD=y
    5776. 

  5776.  # CONFIG_MTD_BOSPORUS is not set
    5777. 

  5777.  # CONFIG_MTD_XXS1500 is not set
    5778. 

  5778.  # CONFIG_MTD_MTX1 is not set
    5779. 

  5779. -# CONFIG_MTD_DB1X00 is not set
    5780. 

  5780.  CONFIG_MTD_PB1550=y
    5781. 

  5781.  CONFIG_MTD_PB1550_BOOT=y
    5782. 

  5782.  CONFIG_MTD_PB1550_USER=y
    5783. 

  5783. -# CONFIG_MTD_HYDROGEN3 is not set
    5784. 

  5784.  # CONFIG_MTD_MIRAGE is not set
    5785. 

  5785.  # CONFIG_MTD_CSTM_MIPS_IXX is not set
    5786. 

  5786.  # CONFIG_MTD_OCELOT is not set
    5787. 

  5787. @@ -236,7 +234,6 @@ CONFIG_MTD_PB1550_USER=y
    5788. 

  5788.  #
    5789. 

  5789.  # Disk-On-Chip Device Drivers
    5790. 

  5790.  #
    5791. 

  5791. -# CONFIG_MTD_DOC1000 is not set
    5792. 

  5792.  # CONFIG_MTD_DOC2000 is not set
    5793. 

  5793.  # CONFIG_MTD_DOC2001 is not set
    5794. 

  5794.  # CONFIG_MTD_DOCPROBE is not set
    5795. 

  5795. @@ -343,11 +340,6 @@ CONFIG_IP_PNP_BOOTP=y
    5796. 

  5796.  #
    5797. 

  5797.  # CONFIG_IPX is not set
    5798. 

  5798.  # CONFIG_ATALK is not set
    5799. 

  5799. -
    5800. 

  5800. -#
    5801. 

  5801. -# Appletalk devices
    5802. 

  5802. -#
    5803. 

  5803. -# CONFIG_DEV_APPLETALK is not set
    5804. 

  5804.  # CONFIG_DECNET is not set
    5805. 

  5805.  # CONFIG_BRIDGE is not set
    5806. 

  5806.  # CONFIG_X25 is not set
    5807. 

  5807. @@ -633,7 +625,6 @@ CONFIG_AU1X00_SERIAL_CONSOLE=y
    5808. 

  5808.  # CONFIG_AU1X00_USB_TTY is not set
    5809. 

  5809.  # CONFIG_AU1X00_USB_RAW is not set
    5810. 

  5810.  # CONFIG_TXX927_SERIAL is not set
    5811. 

  5811. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    5812. 

  5812.  CONFIG_UNIX98_PTYS=y
    5813. 

  5813.  CONFIG_UNIX98_PTY_COUNT=256
    5814. 

  5814.  
    5815. 

  5815. --- a/arch/mips/defconfig-ddb5476
    5816. 

  5816. +++ b/arch/mips/defconfig-ddb5476
    5817. 

  5817. @@ -28,8 +28,8 @@ CONFIG_EXPERIMENTAL=y
    5818. 

  5818.  # CONFIG_MIPS_PB1000 is not set
    5819. 

  5819.  # CONFIG_MIPS_PB1100 is not set
    5820. 

  5820.  # CONFIG_MIPS_PB1500 is not set
    5821. 

  5821. -# CONFIG_MIPS_HYDROGEN3 is not set
    5822. 

  5822.  # CONFIG_MIPS_PB1550 is not set
    5823. 

  5823. +# CONFIG_MIPS_HYDROGEN3 is not set
    5824. 

  5824.  # CONFIG_MIPS_XXS1500 is not set
    5825. 

  5825.  # CONFIG_MIPS_MTX1 is not set
    5826. 

  5826.  # CONFIG_COGENT_CSB250 is not set
    5827. 

  5827. @@ -226,11 +226,6 @@ CONFIG_IP_PNP_BOOTP=y
    5828. 

  5828.  #
    5829. 

  5829.  # CONFIG_IPX is not set
    5830. 

  5830.  # CONFIG_ATALK is not set
    5831. 

  5831. -
    5832. 

  5832. -#
    5833. 

  5833. -# Appletalk devices
    5834. 

  5834. -#
    5835. 

  5835. -# CONFIG_DEV_APPLETALK is not set
    5836. 

  5836.  # CONFIG_DECNET is not set
    5837. 

  5837.  # CONFIG_BRIDGE is not set
    5838. 

  5838.  # CONFIG_X25 is not set
    5839. 

  5839. @@ -517,7 +512,6 @@ CONFIG_SERIAL=y
    5840. 

  5840.  CONFIG_SERIAL_CONSOLE=y
    5841. 

  5841.  # CONFIG_SERIAL_EXTENDED is not set
    5842. 

  5842.  # CONFIG_SERIAL_NONSTANDARD is not set
    5843. 

  5843. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    5844. 

  5844.  CONFIG_UNIX98_PTYS=y
    5845. 

  5845.  CONFIG_UNIX98_PTY_COUNT=256
    5846. 

  5846.  
    5847. 

  5847. --- a/arch/mips/defconfig-ddb5477
    5848. 

  5848. +++ b/arch/mips/defconfig-ddb5477
    5849. 

  5849. @@ -28,8 +28,8 @@ CONFIG_EXPERIMENTAL=y
    5850. 

  5850.  # CONFIG_MIPS_PB1000 is not set
    5851. 

  5851.  # CONFIG_MIPS_PB1100 is not set
    5852. 

  5852.  # CONFIG_MIPS_PB1500 is not set
    5853. 

  5853. -# CONFIG_MIPS_HYDROGEN3 is not set
    5854. 

  5854.  # CONFIG_MIPS_PB1550 is not set
    5855. 

  5855. +# CONFIG_MIPS_HYDROGEN3 is not set
    5856. 

  5856.  # CONFIG_MIPS_XXS1500 is not set
    5857. 

  5857.  # CONFIG_MIPS_MTX1 is not set
    5858. 

  5858.  # CONFIG_COGENT_CSB250 is not set
    5859. 

  5859. @@ -226,11 +226,6 @@ CONFIG_IP_PNP_BOOTP=y
    5860. 

  5860.  #
    5861. 

  5861.  # CONFIG_IPX is not set
    5862. 

  5862.  # CONFIG_ATALK is not set
    5863. 

  5863. -
    5864. 

  5864. -#
    5865. 

  5865. -# Appletalk devices
    5866. 

  5866. -#
    5867. 

  5867. -# CONFIG_DEV_APPLETALK is not set
    5868. 

  5868.  # CONFIG_DECNET is not set
    5869. 

  5869.  # CONFIG_BRIDGE is not set
    5870. 

  5870.  # CONFIG_X25 is not set
    5871. 

  5871. @@ -434,7 +429,6 @@ CONFIG_SERIAL=y
    5872. 

  5872.  CONFIG_SERIAL_CONSOLE=y
    5873. 

  5873.  # CONFIG_SERIAL_EXTENDED is not set
    5874. 

  5874.  # CONFIG_SERIAL_NONSTANDARD is not set
    5875. 

  5875. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    5876. 

  5876.  CONFIG_UNIX98_PTYS=y
    5877. 

  5877.  CONFIG_UNIX98_PTY_COUNT=256
    5878. 

  5878.  
    5879. 

  5879. --- a/arch/mips/defconfig-decstation
    5880. 

  5880. +++ b/arch/mips/defconfig-decstation
    5881. 

  5881. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    5882. 

  5882.  # CONFIG_MIPS_PB1000 is not set
    5883. 

  5883.  # CONFIG_MIPS_PB1100 is not set
    5884. 

  5884.  # CONFIG_MIPS_PB1500 is not set
    5885. 

  5885. -# CONFIG_MIPS_HYDROGEN3 is not set
    5886. 

  5886.  # CONFIG_MIPS_PB1550 is not set
    5887. 

  5887. +# CONFIG_MIPS_HYDROGEN3 is not set
    5888. 

  5888.  # CONFIG_MIPS_XXS1500 is not set
    5889. 

  5889.  # CONFIG_MIPS_MTX1 is not set
    5890. 

  5890.  # CONFIG_COGENT_CSB250 is not set
    5891. 

  5891. @@ -223,11 +223,6 @@ CONFIG_IP_PNP_BOOTP=y
    5892. 

  5892.  #
    5893. 

  5893.  # CONFIG_IPX is not set
    5894. 

  5894.  # CONFIG_ATALK is not set
    5895. 

  5895. -
    5896. 

  5896. -#
    5897. 

  5897. -# Appletalk devices
    5898. 

  5898. -#
    5899. 

  5899. -# CONFIG_DEV_APPLETALK is not set
    5900. 

  5900.  # CONFIG_DECNET is not set
    5901. 

  5901.  # CONFIG_BRIDGE is not set
    5902. 

  5902.  # CONFIG_X25 is not set
    5903. 

  5903. @@ -306,9 +301,11 @@ CONFIG_SCSI_DECNCR=y
    5904. 

  5904.  # CONFIG_SCSI_MEGARAID is not set
    5905. 

  5905.  # CONFIG_SCSI_MEGARAID2 is not set
    5906. 

  5906.  # CONFIG_SCSI_SATA is not set
    5907. 

  5907. +# CONFIG_SCSI_SATA_AHCI is not set
    5908. 

  5908.  # CONFIG_SCSI_SATA_SVW is not set
    5909. 

  5909.  # CONFIG_SCSI_ATA_PIIX is not set
    5910. 

  5910.  # CONFIG_SCSI_SATA_NV is not set
    5911. 

  5911. +# CONFIG_SCSI_SATA_QSTOR is not set
    5912. 

  5912.  # CONFIG_SCSI_SATA_PROMISE is not set
    5913. 

  5913.  # CONFIG_SCSI_SATA_SX4 is not set
    5914. 

  5914.  # CONFIG_SCSI_SATA_SIL is not set
    5915. 

  5915. @@ -477,7 +474,6 @@ CONFIG_SERIAL_DEC=y
    5916. 

  5916.  CONFIG_SERIAL_DEC_CONSOLE=y
    5917. 

  5917.  CONFIG_DZ=y
    5918. 

  5918.  CONFIG_ZS=y
    5919. 

  5919. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    5920. 

  5920.  CONFIG_UNIX98_PTYS=y
    5921. 

  5921.  CONFIG_UNIX98_PTY_COUNT=256
    5922. 

  5922.  
    5923. 

  5923. --- a/arch/mips/defconfig-e55
    5924. 

  5924. +++ b/arch/mips/defconfig-e55
    5925. 

  5925. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    5926. 

  5926.  # CONFIG_MIPS_PB1000 is not set
    5927. 

  5927.  # CONFIG_MIPS_PB1100 is not set
    5928. 

  5928.  # CONFIG_MIPS_PB1500 is not set
    5929. 

  5929. -# CONFIG_MIPS_HYDROGEN3 is not set
    5930. 

  5930.  # CONFIG_MIPS_PB1550 is not set
    5931. 

  5931. +# CONFIG_MIPS_HYDROGEN3 is not set
    5932. 

  5932.  # CONFIG_MIPS_XXS1500 is not set
    5933. 

  5933.  # CONFIG_MIPS_MTX1 is not set
    5934. 

  5934.  # CONFIG_COGENT_CSB250 is not set
    5935. 

  5935. @@ -222,11 +222,6 @@ CONFIG_IP_MULTICAST=y
    5936. 

  5936.  #
    5937. 

  5937.  # CONFIG_IPX is not set
    5938. 

  5938.  # CONFIG_ATALK is not set
    5939. 

  5939. -
    5940. 

  5940. -#
    5941. 

  5941. -# Appletalk devices
    5942. 

  5942. -#
    5943. 

  5943. -# CONFIG_DEV_APPLETALK is not set
    5944. 

  5944.  # CONFIG_DECNET is not set
    5945. 

  5945.  # CONFIG_BRIDGE is not set
    5946. 

  5946.  # CONFIG_X25 is not set
    5947. 

  5947. @@ -426,7 +421,6 @@ CONFIG_SERIAL_MANY_PORTS=y
    5948. 

  5948.  # CONFIG_SERIAL_MULTIPORT is not set
    5949. 

  5949.  # CONFIG_HUB6 is not set
    5950. 

  5950.  # CONFIG_SERIAL_NONSTANDARD is not set
    5951. 

  5951. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    5952. 

  5952.  # CONFIG_VR41XX_KIU is not set
    5953. 

  5953.  CONFIG_UNIX98_PTYS=y
    5954. 

  5954.  CONFIG_UNIX98_PTY_COUNT=256
    5955. 

  5955. --- a/arch/mips/defconfig-eagle
    5956. 

  5956. +++ b/arch/mips/defconfig-eagle
    5957. 

  5957. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    5958. 

  5958.  # CONFIG_MIPS_PB1000 is not set
    5959. 

  5959.  # CONFIG_MIPS_PB1100 is not set
    5960. 

  5960.  # CONFIG_MIPS_PB1500 is not set
    5961. 

  5961. -# CONFIG_MIPS_HYDROGEN3 is not set
    5962. 

  5962.  # CONFIG_MIPS_PB1550 is not set
    5963. 

  5963. +# CONFIG_MIPS_HYDROGEN3 is not set
    5964. 

  5964.  # CONFIG_MIPS_XXS1500 is not set
    5965. 

  5965.  # CONFIG_MIPS_MTX1 is not set
    5966. 

  5966.  # CONFIG_COGENT_CSB250 is not set
    5967. 

  5967. @@ -208,8 +208,8 @@ CONFIG_MTD_CFI_INTELEXT=y
    5968. 

  5968.  # Mapping drivers for chip access
    5969. 

  5969.  #
    5970. 

  5970.  CONFIG_MTD_PHYSMAP=y
    5971. 

  5971. -CONFIG_MTD_PHYSMAP_START=1c000000
    5972. 

  5972. -CONFIG_MTD_PHYSMAP_LEN=2000000
    5973. 

  5973. +CONFIG_MTD_PHYSMAP_START=0x1c000000
    5974. 

  5974. +CONFIG_MTD_PHYSMAP_LEN=0x2000000
    5975. 

  5975.  CONFIG_MTD_PHYSMAP_BUSWIDTH=4
    5976. 

  5976.  # CONFIG_MTD_PB1000 is not set
    5977. 

  5977.  # CONFIG_MTD_PB1500 is not set
    5978. 

  5978. @@ -217,9 +217,7 @@ CONFIG_MTD_PHYSMAP_BUSWIDTH=4
    5979. 

  5979.  # CONFIG_MTD_BOSPORUS is not set
    5980. 

  5980.  # CONFIG_MTD_XXS1500 is not set
    5981. 

  5981.  # CONFIG_MTD_MTX1 is not set
    5982. 

  5982. -# CONFIG_MTD_DB1X00 is not set
    5983. 

  5983.  # CONFIG_MTD_PB1550 is not set
    5984. 

  5984. -# CONFIG_MTD_HYDROGEN3 is not set
    5985. 

  5985.  # CONFIG_MTD_MIRAGE is not set
    5986. 

  5986.  # CONFIG_MTD_CSTM_MIPS_IXX is not set
    5987. 

  5987.  # CONFIG_MTD_OCELOT is not set
    5988. 

  5988. @@ -238,7 +236,6 @@ CONFIG_MTD_PHYSMAP_BUSWIDTH=4
    5989. 

  5989.  #
    5990. 

  5990.  # Disk-On-Chip Device Drivers
    5991. 

  5991.  #
    5992. 

  5992. -# CONFIG_MTD_DOC1000 is not set
    5993. 

  5993.  # CONFIG_MTD_DOC2000 is not set
    5994. 

  5994.  # CONFIG_MTD_DOC2001 is not set
    5995. 

  5995.  # CONFIG_MTD_DOCPROBE is not set
    5996. 

  5996. @@ -327,11 +324,6 @@ CONFIG_IP_PNP_BOOTP=y
    5997. 

  5997.  #
    5998. 

  5998.  # CONFIG_IPX is not set
    5999. 

  5999.  # CONFIG_ATALK is not set
    6000. 

  6000. -
    6001. 

  6001. -#
    6002. 

  6002. -# Appletalk devices
    6003. 

  6003. -#
    6004. 

  6004. -# CONFIG_DEV_APPLETALK is not set
    6005. 

  6005.  # CONFIG_DECNET is not set
    6006. 

  6006.  # CONFIG_BRIDGE is not set
    6007. 

  6007.  # CONFIG_X25 is not set
    6008. 

  6008. @@ -587,7 +579,6 @@ CONFIG_SERIAL=y
    6009. 

  6009.  CONFIG_SERIAL_CONSOLE=y
    6010. 

  6010.  # CONFIG_SERIAL_EXTENDED is not set
    6011. 

  6011.  # CONFIG_SERIAL_NONSTANDARD is not set
    6012. 

  6012. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    6013. 

  6013.  # CONFIG_VR41XX_KIU is not set
    6014. 

  6014.  CONFIG_UNIX98_PTYS=y
    6015. 

  6015.  CONFIG_UNIX98_PTY_COUNT=256
    6016. 

  6016. --- a/arch/mips/defconfig-ev64120
    6017. 

  6017. +++ b/arch/mips/defconfig-ev64120
    6018. 

  6018. @@ -30,8 +30,8 @@ CONFIG_MODULES=y
    6019. 

  6019.  # CONFIG_MIPS_PB1000 is not set
    6020. 

  6020.  # CONFIG_MIPS_PB1100 is not set
    6021. 

  6021.  # CONFIG_MIPS_PB1500 is not set
    6022. 

  6022. -# CONFIG_MIPS_HYDROGEN3 is not set
    6023. 

  6023.  # CONFIG_MIPS_PB1550 is not set
    6024. 

  6024. +# CONFIG_MIPS_HYDROGEN3 is not set
    6025. 

  6025.  # CONFIG_MIPS_XXS1500 is not set
    6026. 

  6026.  # CONFIG_MIPS_MTX1 is not set
    6027. 

  6027.  # CONFIG_COGENT_CSB250 is not set
    6028. 

  6028. @@ -230,11 +230,6 @@ CONFIG_IP_PNP=y
    6029. 

  6029.  #
    6030. 

  6030.  # CONFIG_IPX is not set
    6031. 

  6031.  # CONFIG_ATALK is not set
    6032. 

  6032. -
    6033. 

  6033. -#
    6034. 

  6034. -# Appletalk devices
    6035. 

  6035. -#
    6036. 

  6036. -# CONFIG_DEV_APPLETALK is not set
    6037. 

  6037.  # CONFIG_DECNET is not set
    6038. 

  6038.  # CONFIG_BRIDGE is not set
    6039. 

  6039.  # CONFIG_X25 is not set
    6040. 

  6040. @@ -443,7 +438,6 @@ CONFIG_SERIAL=y
    6041. 

  6041.  # CONFIG_SERIAL_CONSOLE is not set
    6042. 

  6042.  # CONFIG_SERIAL_EXTENDED is not set
    6043. 

  6043.  # CONFIG_SERIAL_NONSTANDARD is not set
    6044. 

  6044. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    6045. 

  6045.  CONFIG_UNIX98_PTYS=y
    6046. 

  6046.  CONFIG_UNIX98_PTY_COUNT=256
    6047. 

  6047.  
    6048. 

  6048. --- a/arch/mips/defconfig-ev96100
    6049. 

  6049. +++ b/arch/mips/defconfig-ev96100
    6050. 

  6050. @@ -30,8 +30,8 @@ CONFIG_MODULES=y
    6051. 

  6051.  # CONFIG_MIPS_PB1000 is not set
    6052. 

  6052.  # CONFIG_MIPS_PB1100 is not set
    6053. 

  6053.  # CONFIG_MIPS_PB1500 is not set
    6054. 

  6054. -# CONFIG_MIPS_HYDROGEN3 is not set
    6055. 

  6055.  # CONFIG_MIPS_PB1550 is not set
    6056. 

  6056. +# CONFIG_MIPS_HYDROGEN3 is not set
    6057. 

  6057.  # CONFIG_MIPS_XXS1500 is not set
    6058. 

  6058.  # CONFIG_MIPS_MTX1 is not set
    6059. 

  6059.  # CONFIG_COGENT_CSB250 is not set
    6060. 

  6060. @@ -232,11 +232,6 @@ CONFIG_IP_PNP_BOOTP=y
    6061. 

  6061.  #
    6062. 

  6062.  # CONFIG_IPX is not set
    6063. 

  6063.  # CONFIG_ATALK is not set
    6064. 

  6064. -
    6065. 

  6065. -#
    6066. 

  6066. -# Appletalk devices
    6067. 

  6067. -#
    6068. 

  6068. -# CONFIG_DEV_APPLETALK is not set
    6069. 

  6069.  # CONFIG_DECNET is not set
    6070. 

  6070.  # CONFIG_BRIDGE is not set
    6071. 

  6071.  # CONFIG_X25 is not set
    6072. 

  6072. @@ -441,7 +436,6 @@ CONFIG_SERIAL=y
    6073. 

  6073.  CONFIG_SERIAL_CONSOLE=y
    6074. 

  6074.  # CONFIG_SERIAL_EXTENDED is not set
    6075. 

  6075.  # CONFIG_SERIAL_NONSTANDARD is not set
    6076. 

  6076. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    6077. 

  6077.  CONFIG_UNIX98_PTYS=y
    6078. 

  6078.  CONFIG_UNIX98_PTY_COUNT=256
    6079. 

  6079.  
    6080. 

  6080. --- /dev/null
    6081. 

  6081. +++ b/arch/mips/defconfig-ficmmp
    6082. 

  6082. @@ -0,0 +1,862 @@
    6083. 

  6083. +#
    6084. 

  6084. +# Automatically generated make config: don't edit
    6085. 

  6085. +#
    6086. 

  6086. +CONFIG_MIPS=y
    6087. 

  6087. +CONFIG_MIPS32=y
    6088. 

  6088. +# CONFIG_MIPS64 is not set
    6089. 

  6089. +
    6090. 

  6090. +#
    6091. 

  6091. +# Code maturity level options
    6092. 

  6092. +#
    6093. 

  6093. +CONFIG_EXPERIMENTAL=y
    6094. 

  6094. +
    6095. 

  6095. +#
    6096. 

  6096. +# Loadable module support
    6097. 

  6097. +#
    6098. 

  6098. +CONFIG_MODULES=y
    6099. 

  6099. +# CONFIG_MODVERSIONS is not set
    6100. 

  6100. +CONFIG_KMOD=y
    6101. 

  6101. +
    6102. 

  6102. +#
    6103. 

  6103. +# Machine selection
    6104. 

  6104. +#
    6105. 

  6105. +# CONFIG_ACER_PICA_61 is not set
    6106. 

  6106. +# CONFIG_MIPS_BOSPORUS is not set
    6107. 

  6107. +# CONFIG_MIPS_MIRAGE is not set
    6108. 

  6108. +# CONFIG_MIPS_DB1000 is not set
    6109. 

  6109. +# CONFIG_MIPS_DB1100 is not set
    6110. 

  6110. +# CONFIG_MIPS_DB1500 is not set
    6111. 

  6111. +# CONFIG_MIPS_DB1550 is not set
    6112. 

  6112. +# CONFIG_MIPS_PB1000 is not set
    6113. 

  6113. +# CONFIG_MIPS_PB1100 is not set
    6114. 

  6114. +# CONFIG_MIPS_PB1500 is not set
    6115. 

  6115. +# CONFIG_MIPS_PB1550 is not set
    6116. 

  6116. +# CONFIG_MIPS_HYDROGEN3 is not set
    6117. 

  6117. +# CONFIG_MIPS_XXS1500 is not set
    6118. 

  6118. +# CONFIG_MIPS_MTX1 is not set
    6119. 

  6119. +# CONFIG_COGENT_CSB250 is not set
    6120. 

  6120. +# CONFIG_BAGET_MIPS is not set
    6121. 

  6121. +# CONFIG_CASIO_E55 is not set
    6122. 

  6122. +# CONFIG_MIPS_COBALT is not set
    6123. 

  6123. +# CONFIG_DECSTATION is not set
    6124. 

  6124. +# CONFIG_MIPS_EV64120 is not set
    6125. 

  6125. +# CONFIG_MIPS_EV96100 is not set
    6126. 

  6126. +# CONFIG_MIPS_IVR is not set
    6127. 

  6127. +# CONFIG_HP_LASERJET is not set
    6128. 

  6128. +# CONFIG_IBM_WORKPAD is not set
    6129. 

  6129. +# CONFIG_LASAT is not set
    6130. 

  6130. +# CONFIG_MIPS_ITE8172 is not set
    6131. 

  6131. +# CONFIG_MIPS_ATLAS is not set
    6132. 

  6132. +# CONFIG_MIPS_MAGNUM_4000 is not set
    6133. 

  6133. +# CONFIG_MIPS_MALTA is not set
    6134. 

  6134. +# CONFIG_MIPS_SEAD is not set
    6135. 

  6135. +# CONFIG_MOMENCO_OCELOT is not set
    6136. 

  6136. +# CONFIG_MOMENCO_OCELOT_G is not set
    6137. 

  6137. +# CONFIG_MOMENCO_OCELOT_C is not set
    6138. 

  6138. +# CONFIG_MOMENCO_JAGUAR_ATX is not set
    6139. 

  6139. +# CONFIG_PMC_BIG_SUR is not set
    6140. 

  6140. +# CONFIG_PMC_STRETCH is not set
    6141. 

  6141. +# CONFIG_PMC_YOSEMITE is not set
    6142. 

  6142. +# CONFIG_DDB5074 is not set
    6143. 

  6143. +# CONFIG_DDB5476 is not set
    6144. 

  6144. +# CONFIG_DDB5477 is not set
    6145. 

  6145. +# CONFIG_NEC_OSPREY is not set
    6146. 

  6146. +# CONFIG_NEC_EAGLE is not set
    6147. 

  6147. +# CONFIG_OLIVETTI_M700 is not set
    6148. 

  6148. +# CONFIG_NINO is not set
    6149. 

  6149. +# CONFIG_SGI_IP22 is not set
    6150. 

  6150. +# CONFIG_SGI_IP27 is not set
    6151. 

  6151. +# CONFIG_SIBYTE_SB1xxx_SOC is not set
    6152. 

  6152. +# CONFIG_SNI_RM200_PCI is not set
    6153. 

  6153. +# CONFIG_TANBAC_TB0226 is not set
    6154. 

  6154. +# CONFIG_TANBAC_TB0229 is not set
    6155. 

  6155. +# CONFIG_TOSHIBA_JMR3927 is not set
    6156. 

  6156. +# CONFIG_TOSHIBA_RBTX4927 is not set
    6157. 

  6157. +# CONFIG_VICTOR_MPC30X is not set
    6158. 

  6158. +# CONFIG_ZAO_CAPCELLA is not set
    6159. 

  6159. +# CONFIG_HIGHMEM is not set
    6160. 

  6160. +CONFIG_RWSEM_GENERIC_SPINLOCK=y
    6161. 

  6161. +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
    6162. 

  6162. +# CONFIG_MIPS_AU1000 is not set
    6163. 

  6163. +
    6164. 

  6164. +#
    6165. 

  6165. +# CPU selection
    6166. 

  6166. +#
    6167. 

  6167. +CONFIG_CPU_MIPS32=y
    6168. 

  6168. +# CONFIG_CPU_MIPS64 is not set
    6169. 

  6169. +# CONFIG_CPU_R3000 is not set
    6170. 

  6170. +# CONFIG_CPU_TX39XX is not set
    6171. 

  6171. +# CONFIG_CPU_VR41XX is not set
    6172. 

  6172. +# CONFIG_CPU_R4300 is not set
    6173. 

  6173. +# CONFIG_CPU_R4X00 is not set
    6174. 

  6174. +# CONFIG_CPU_TX49XX is not set
    6175. 

  6175. +# CONFIG_CPU_R5000 is not set
    6176. 

  6176. +# CONFIG_CPU_R5432 is not set
    6177. 

  6177. +# CONFIG_CPU_R6000 is not set
    6178. 

  6178. +# CONFIG_CPU_NEVADA is not set
    6179. 

  6179. +# CONFIG_CPU_R8000 is not set
    6180. 

  6180. +# CONFIG_CPU_R10000 is not set
    6181. 

  6181. +# CONFIG_CPU_RM7000 is not set
    6182. 

  6182. +# CONFIG_CPU_RM9000 is not set
    6183. 

  6183. +# CONFIG_CPU_SB1 is not set
    6184. 

  6184. +CONFIG_PAGE_SIZE_4KB=y
    6185. 

  6185. +# CONFIG_PAGE_SIZE_16KB is not set
    6186. 

  6186. +# CONFIG_PAGE_SIZE_64KB is not set
    6187. 

  6187. +CONFIG_CPU_HAS_PREFETCH=y
    6188. 

  6188. +# CONFIG_VTAG_ICACHE is not set
    6189. 

  6189. +CONFIG_64BIT_PHYS_ADDR=y
    6190. 

  6190. +# CONFIG_CPU_ADVANCED is not set
    6191. 

  6191. +CONFIG_CPU_HAS_LLSC=y
    6192. 

  6192. +# CONFIG_CPU_HAS_LLDSCD is not set
    6193. 

  6193. +# CONFIG_CPU_HAS_WB is not set
    6194. 

  6194. +CONFIG_CPU_HAS_SYNC=y
    6195. 

  6195. +
    6196. 

  6196. +#
    6197. 

  6197. +# General setup
    6198. 

  6198. +#
    6199. 

  6199. +CONFIG_CPU_LITTLE_ENDIAN=y
    6200. 

  6200. +# CONFIG_BUILD_ELF64 is not set
    6201. 

  6201. +CONFIG_NET=y
    6202. 

  6202. +# CONFIG_PCI is not set
    6203. 

  6203. +# CONFIG_PCI_NEW is not set
    6204. 

  6204. +CONFIG_PCI_AUTO=y
    6205. 

  6205. +# CONFIG_ISA is not set
    6206. 

  6206. +# CONFIG_TC is not set
    6207. 

  6207. +# CONFIG_MCA is not set
    6208. 

  6208. +# CONFIG_SBUS is not set
    6209. 

  6209. +# CONFIG_HOTPLUG is not set
    6210. 

  6210. +# CONFIG_PCMCIA is not set
    6211. 

  6211. +# CONFIG_HOTPLUG_PCI is not set
    6212. 

  6212. +CONFIG_SYSVIPC=y
    6213. 

  6213. +# CONFIG_BSD_PROCESS_ACCT is not set
    6214. 

  6214. +CONFIG_SYSCTL=y
    6215. 

  6215. +CONFIG_KCORE_ELF=y
    6216. 

  6216. +# CONFIG_KCORE_AOUT is not set
    6217. 

  6217. +# CONFIG_BINFMT_AOUT is not set
    6218. 

  6218. +CONFIG_BINFMT_ELF=y
    6219. 

  6219. +# CONFIG_MIPS32_COMPAT is not set
    6220. 

  6220. +# CONFIG_MIPS32_O32 is not set
    6221. 

  6221. +# CONFIG_MIPS32_N32 is not set
    6222. 

  6222. +# CONFIG_BINFMT_ELF32 is not set
    6223. 

  6223. +# CONFIG_BINFMT_MISC is not set
    6224. 

  6224. +# CONFIG_OOM_KILLER is not set
    6225. 

  6225. +CONFIG_CMDLINE_BOOL=y
    6226. 

  6226. +CONFIG_CMDLINE="ide3=dma mem=96M root=/dev/hda2 rootflags=data=journal"
    6227. 

  6227. +
    6228. 

  6228. +#
    6229. 

  6229. +# Memory Technology Devices (MTD)
    6230. 

  6230. +#
    6231. 

  6231. +# CONFIG_MTD is not set
    6232. 

  6232. +
    6233. 

  6233. +#
    6234. 

  6234. +# Parallel port support
    6235. 

  6235. +#
    6236. 

  6236. +# CONFIG_PARPORT is not set
    6237. 

  6237. +
    6238. 

  6238. +#
    6239. 

  6239. +# Plug and Play configuration
    6240. 

  6240. +#
    6241. 

  6241. +# CONFIG_PNP is not set
    6242. 

  6242. +# CONFIG_ISAPNP is not set
    6243. 

  6243. +
    6244. 

  6244. +#
    6245. 

  6245. +# Block devices
    6246. 

  6246. +#
    6247. 

  6247. +# CONFIG_BLK_DEV_FD is not set
    6248. 

  6248. +# CONFIG_BLK_DEV_XD is not set
    6249. 

  6249. +# CONFIG_PARIDE is not set
    6250. 

  6250. +# CONFIG_BLK_CPQ_DA is not set
    6251. 

  6251. +# CONFIG_BLK_CPQ_CISS_DA is not set
    6252. 

  6252. +# CONFIG_CISS_SCSI_TAPE is not set
    6253. 

  6253. +# CONFIG_CISS_MONITOR_THREAD is not set
    6254. 

  6254. +# CONFIG_BLK_DEV_DAC960 is not set
    6255. 

  6255. +# CONFIG_BLK_DEV_UMEM is not set
    6256. 

  6256. +# CONFIG_BLK_DEV_SX8 is not set
    6257. 

  6257. +CONFIG_BLK_DEV_LOOP=y
    6258. 

  6258. +# CONFIG_BLK_DEV_NBD is not set
    6259. 

  6259. +# CONFIG_BLK_DEV_RAM is not set
    6260. 

  6260. +# CONFIG_BLK_DEV_INITRD is not set
    6261. 

  6261. +# CONFIG_BLK_STATS is not set
    6262. 

  6262. +
    6263. 

  6263. +#
    6264. 

  6264. +# Multi-device support (RAID and LVM)
    6265. 

  6265. +#
    6266. 

  6266. +# CONFIG_MD is not set
    6267. 

  6267. +# CONFIG_BLK_DEV_MD is not set
    6268. 

  6268. +# CONFIG_MD_LINEAR is not set
    6269. 

  6269. +# CONFIG_MD_RAID0 is not set
    6270. 

  6270. +# CONFIG_MD_RAID1 is not set
    6271. 

  6271. +# CONFIG_MD_RAID5 is not set
    6272. 

  6272. +# CONFIG_MD_MULTIPATH is not set
    6273. 

  6273. +# CONFIG_BLK_DEV_LVM is not set
    6274. 

  6274. +
    6275. 

  6275. +#
    6276. 

  6276. +# Networking options
    6277. 

  6277. +#
    6278. 

  6278. +CONFIG_PACKET=y
    6279. 

  6279. +# CONFIG_PACKET_MMAP is not set
    6280. 

  6280. +# CONFIG_NETLINK_DEV is not set
    6281. 

  6281. +CONFIG_NETFILTER=y
    6282. 

  6282. +# CONFIG_NETFILTER_DEBUG is not set
    6283. 

  6283. +CONFIG_FILTER=y
    6284. 

  6284. +CONFIG_UNIX=y
    6285. 

  6285. +CONFIG_INET=y
    6286. 

  6286. +CONFIG_IP_MULTICAST=y
    6287. 

  6287. +# CONFIG_IP_ADVANCED_ROUTER is not set
    6288. 

  6288. +# CONFIG_IP_PNP is not set
    6289. 

  6289. +# CONFIG_NET_IPIP is not set
    6290. 

  6290. +# CONFIG_NET_IPGRE is not set
    6291. 

  6291. +# CONFIG_IP_MROUTE is not set
    6292. 

  6292. +# CONFIG_ARPD is not set
    6293. 

  6293. +# CONFIG_INET_ECN is not set
    6294. 

  6294. +# CONFIG_SYN_COOKIES is not set
    6295. 

  6295. +
    6296. 

  6296. +#
    6297. 

  6297. +#   IP: Netfilter Configuration
    6298. 

  6298. +#
    6299. 

  6299. +# CONFIG_IP_NF_CONNTRACK is not set
    6300. 

  6300. +# CONFIG_IP_NF_QUEUE is not set
    6301. 

  6301. +# CONFIG_IP_NF_IPTABLES is not set
    6302. 

  6302. +# CONFIG_IP_NF_ARPTABLES is not set
    6303. 

  6303. +# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
    6304. 

  6304. +# CONFIG_IP_NF_COMPAT_IPFWADM is not set
    6305. 

  6305. +
    6306. 

  6306. +#
    6307. 

  6307. +#   IP: Virtual Server Configuration
    6308. 

  6308. +#
    6309. 

  6309. +# CONFIG_IP_VS is not set
    6310. 

  6310. +# CONFIG_IPV6 is not set
    6311. 

  6311. +# CONFIG_KHTTPD is not set
    6312. 

  6312. +
    6313. 

  6313. +#
    6314. 

  6314. +#    SCTP Configuration (EXPERIMENTAL)
    6315. 

  6315. +#
    6316. 

  6316. +# CONFIG_IP_SCTP is not set
    6317. 

  6317. +# CONFIG_ATM is not set
    6318. 

  6318. +# CONFIG_VLAN_8021Q is not set
    6319. 

  6319. +
    6320. 

  6320. +#
    6321. 

  6321. +#  
    6322. 

  6322. +#
    6323. 

  6323. +# CONFIG_IPX is not set
    6324. 

  6324. +# CONFIG_ATALK is not set
    6325. 

  6325. +# CONFIG_DECNET is not set
    6326. 

  6326. +# CONFIG_BRIDGE is not set
    6327. 

  6327. +# CONFIG_X25 is not set
    6328. 

  6328. +# CONFIG_LAPB is not set
    6329. 

  6329. +# CONFIG_LLC is not set
    6330. 

  6330. +# CONFIG_NET_DIVERT is not set
    6331. 

  6331. +# CONFIG_ECONET is not set
    6332. 

  6332. +# CONFIG_WAN_ROUTER is not set
    6333. 

  6333. +# CONFIG_NET_FASTROUTE is not set
    6334. 

  6334. +# CONFIG_NET_HW_FLOWCONTROL is not set
    6335. 

  6335. +
    6336. 

  6336. +#
    6337. 

  6337. +# QoS and/or fair queueing
    6338. 

  6338. +#
    6339. 

  6339. +# CONFIG_NET_SCHED is not set
    6340. 

  6340. +
    6341. 

  6341. +#
    6342. 

  6342. +# Network testing
    6343. 

  6343. +#
    6344. 

  6344. +# CONFIG_NET_PKTGEN is not set
    6345. 

  6345. +
    6346. 

  6346. +#
    6347. 

  6347. +# Telephony Support
    6348. 

  6348. +#
    6349. 

  6349. +# CONFIG_PHONE is not set
    6350. 

  6350. +# CONFIG_PHONE_IXJ is not set
    6351. 

  6351. +# CONFIG_PHONE_IXJ_PCMCIA is not set
    6352. 

  6352. +
    6353. 

  6353. +#
    6354. 

  6354. +# ATA/IDE/MFM/RLL support
    6355. 

  6355. +#
    6356. 

  6356. +CONFIG_IDE=y
    6357. 

  6357. +
    6358. 

  6358. +#
    6359. 

  6359. +# IDE, ATA and ATAPI Block devices
    6360. 

  6360. +#
    6361. 

  6361. +CONFIG_BLK_DEV_IDE=y
    6362. 

  6362. +
    6363. 

  6363. +#
    6364. 

  6364. +# Please see Documentation/ide.txt for help/info on IDE drives
    6365. 

  6365. +#
    6366. 

  6366. +CONFIG_BLK_DEV_HD_IDE=y
    6367. 

  6367. +CONFIG_BLK_DEV_HD=y
    6368. 

  6368. +# CONFIG_BLK_DEV_IDE_SATA is not set
    6369. 

  6369. +CONFIG_BLK_DEV_IDEDISK=y
    6370. 

  6370. +CONFIG_IDEDISK_MULTI_MODE=y
    6371. 

  6371. +CONFIG_IDEDISK_STROKE=y
    6372. 

  6372. +# CONFIG_BLK_DEV_IDECS is not set
    6373. 

  6373. +# CONFIG_BLK_DEV_DELKIN is not set
    6374. 

  6374. +# CONFIG_BLK_DEV_IDECD is not set
    6375. 

  6375. +# CONFIG_BLK_DEV_IDETAPE is not set
    6376. 

  6376. +# CONFIG_BLK_DEV_IDEFLOPPY is not set
    6377. 

  6377. +# CONFIG_BLK_DEV_IDESCSI is not set
    6378. 

  6378. +# CONFIG_IDE_TASK_IOCTL is not set
    6379. 

  6379. +
    6380. 

  6380. +#
    6381. 

  6381. +# IDE chipset support/bugfixes
    6382. 

  6382. +#
    6383. 

  6383. +# CONFIG_BLK_DEV_CMD640 is not set
    6384. 

  6384. +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
    6385. 

  6385. +# CONFIG_BLK_DEV_ISAPNP is not set
    6386. 

  6386. +# CONFIG_IDE_CHIPSETS is not set
    6387. 

  6387. +# CONFIG_IDEDMA_AUTO is not set
    6388. 

  6388. +# CONFIG_DMA_NONPCI is not set
    6389. 

  6389. +# CONFIG_BLK_DEV_ATARAID is not set
    6390. 

  6390. +# CONFIG_BLK_DEV_ATARAID_PDC is not set
    6391. 

  6391. +# CONFIG_BLK_DEV_ATARAID_HPT is not set
    6392. 

  6392. +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
    6393. 

  6393. +# CONFIG_BLK_DEV_ATARAID_SII is not set
    6394. 

  6394. +
    6395. 

  6395. +#
    6396. 

  6396. +# SCSI support
    6397. 

  6397. +#
    6398. 

  6398. +CONFIG_SCSI=y
    6399. 

  6399. +
    6400. 

  6400. +#
    6401. 

  6401. +# SCSI support type (disk, tape, CD-ROM)
    6402. 

  6402. +#
    6403. 

  6403. +CONFIG_BLK_DEV_SD=y
    6404. 

  6404. +CONFIG_SD_EXTRA_DEVS=40
    6405. 

  6405. +CONFIG_CHR_DEV_ST=y
    6406. 

  6406. +# CONFIG_CHR_DEV_OSST is not set
    6407. 

  6407. +CONFIG_BLK_DEV_SR=y
    6408. 

  6408. +# CONFIG_BLK_DEV_SR_VENDOR is not set
    6409. 

  6409. +CONFIG_SR_EXTRA_DEVS=2
    6410. 

  6410. +# CONFIG_CHR_DEV_SG is not set
    6411. 

  6411. +
    6412. 

  6412. +#
    6413. 

  6413. +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
    6414. 

  6414. +#
    6415. 

  6415. +# CONFIG_SCSI_DEBUG_QUEUES is not set
    6416. 

  6416. +# CONFIG_SCSI_MULTI_LUN is not set
    6417. 

  6417. +CONFIG_SCSI_CONSTANTS=y
    6418. 

  6418. +# CONFIG_SCSI_LOGGING is not set
    6419. 

  6419. +
    6420. 

  6420. +#
    6421. 

  6421. +# SCSI low-level drivers
    6422. 

  6422. +#
    6423. 

  6423. +# CONFIG_SCSI_7000FASST is not set
    6424. 

  6424. +# CONFIG_SCSI_ACARD is not set
    6425. 

  6425. +# CONFIG_SCSI_AHA152X is not set
    6426. 

  6426. +# CONFIG_SCSI_AHA1542 is not set
    6427. 

  6427. +# CONFIG_SCSI_AHA1740 is not set
    6428. 

  6428. +# CONFIG_SCSI_AACRAID is not set
    6429. 

  6429. +# CONFIG_SCSI_AIC7XXX is not set
    6430. 

  6430. +# CONFIG_SCSI_AIC79XX is not set
    6431. 

  6431. +# CONFIG_SCSI_AIC7XXX_OLD is not set
    6432. 

  6432. +# CONFIG_SCSI_DPT_I2O is not set
    6433. 

  6433. +# CONFIG_SCSI_ADVANSYS is not set
    6434. 

  6434. +# CONFIG_SCSI_IN2000 is not set
    6435. 

  6435. +# CONFIG_SCSI_AM53C974 is not set
    6436. 

  6436. +# CONFIG_SCSI_MEGARAID is not set
    6437. 

  6437. +# CONFIG_SCSI_MEGARAID2 is not set
    6438. 

  6438. +# CONFIG_SCSI_SATA is not set
    6439. 

  6439. +# CONFIG_SCSI_SATA_AHCI is not set
    6440. 

  6440. +# CONFIG_SCSI_SATA_SVW is not set
    6441. 

  6441. +# CONFIG_SCSI_ATA_PIIX is not set
    6442. 

  6442. +# CONFIG_SCSI_SATA_NV is not set
    6443. 

  6443. +# CONFIG_SCSI_SATA_QSTOR is not set
    6444. 

  6444. +# CONFIG_SCSI_SATA_PROMISE is not set
    6445. 

  6445. +# CONFIG_SCSI_SATA_SX4 is not set
    6446. 

  6446. +# CONFIG_SCSI_SATA_SIL is not set
    6447. 

  6447. +# CONFIG_SCSI_SATA_SIS is not set
    6448. 

  6448. +# CONFIG_SCSI_SATA_ULI is not set
    6449. 

  6449. +# CONFIG_SCSI_SATA_VIA is not set
    6450. 

  6450. +# CONFIG_SCSI_SATA_VITESSE is not set
    6451. 

  6451. +# CONFIG_SCSI_BUSLOGIC is not set
    6452. 

  6452. +# CONFIG_SCSI_DMX3191D is not set
    6453. 

  6453. +# CONFIG_SCSI_DTC3280 is not set
    6454. 

  6454. +# CONFIG_SCSI_EATA is not set
    6455. 

  6455. +# CONFIG_SCSI_EATA_DMA is not set
    6456. 

  6456. +# CONFIG_SCSI_EATA_PIO is not set
    6457. 

  6457. +# CONFIG_SCSI_FUTURE_DOMAIN is not set
    6458. 

  6458. +# CONFIG_SCSI_GDTH is not set
    6459. 

  6459. +# CONFIG_SCSI_GENERIC_NCR5380 is not set
    6460. 

  6460. +# CONFIG_SCSI_INITIO is not set
    6461. 

  6461. +# CONFIG_SCSI_INIA100 is not set
    6462. 

  6462. +# CONFIG_SCSI_NCR53C406A is not set
    6463. 

  6463. +# CONFIG_SCSI_NCR53C7xx is not set
    6464. 

  6464. +# CONFIG_SCSI_PAS16 is not set
    6465. 

  6465. +# CONFIG_SCSI_PCI2000 is not set
    6466. 

  6466. +# CONFIG_SCSI_PCI2220I is not set
    6467. 

  6467. +# CONFIG_SCSI_PSI240I is not set
    6468. 

  6468. +# CONFIG_SCSI_QLOGIC_FAS is not set
    6469. 

  6469. +# CONFIG_SCSI_SIM710 is not set
    6470. 

  6470. +# CONFIG_SCSI_SYM53C416 is not set
    6471. 

  6471. +# CONFIG_SCSI_T128 is not set
    6472. 

  6472. +# CONFIG_SCSI_U14_34F is not set
    6473. 

  6473. +# CONFIG_SCSI_NSP32 is not set
    6474. 

  6474. +# CONFIG_SCSI_DEBUG is not set
    6475. 

  6475. +
    6476. 

  6476. +#
    6477. 

  6477. +# Fusion MPT device support
    6478. 

  6478. +#
    6479. 

  6479. +# CONFIG_FUSION is not set
    6480. 

  6480. +# CONFIG_FUSION_BOOT is not set
    6481. 

  6481. +# CONFIG_FUSION_ISENSE is not set
    6482. 

  6482. +# CONFIG_FUSION_CTL is not set
    6483. 

  6483. +# CONFIG_FUSION_LAN is not set
    6484. 

  6484. +
    6485. 

  6485. +#
    6486. 

  6486. +# Network device support
    6487. 

  6487. +#
    6488. 

  6488. +CONFIG_NETDEVICES=y
    6489. 

  6489. +
    6490. 

  6490. +#
    6491. 

  6491. +# ARCnet devices
    6492. 

  6492. +#
    6493. 

  6493. +# CONFIG_ARCNET is not set
    6494. 

  6494. +# CONFIG_DUMMY is not set
    6495. 

  6495. +# CONFIG_BONDING is not set
    6496. 

  6496. +# CONFIG_EQUALIZER is not set
    6497. 

  6497. +# CONFIG_TUN is not set
    6498. 

  6498. +# CONFIG_ETHERTAP is not set
    6499. 

  6499. +
    6500. 

  6500. +#
    6501. 

  6501. +# Ethernet (10 or 100Mbit)
    6502. 

  6502. +#
    6503. 

  6503. +CONFIG_NET_ETHERNET=y
    6504. 

  6504. +# CONFIG_SUNLANCE is not set
    6505. 

  6505. +# CONFIG_SUNBMAC is not set
    6506. 

  6506. +# CONFIG_SUNQE is not set
    6507. 

  6507. +# CONFIG_SUNGEM is not set
    6508. 

  6508. +# CONFIG_NET_VENDOR_3COM is not set
    6509. 

  6509. +# CONFIG_LANCE is not set
    6510. 

  6510. +# CONFIG_NET_VENDOR_SMC is not set
    6511. 

  6511. +# CONFIG_NET_VENDOR_RACAL is not set
    6512. 

  6512. +# CONFIG_NET_ISA is not set
    6513. 

  6513. +# CONFIG_NET_PCI is not set
    6514. 

  6514. +# CONFIG_NET_POCKET is not set
    6515. 

  6515. +
    6516. 

  6516. +#
    6517. 

  6517. +# Ethernet (1000 Mbit)
    6518. 

  6518. +#
    6519. 

  6519. +# CONFIG_ACENIC is not set
    6520. 

  6520. +# CONFIG_DL2K is not set
    6521. 

  6521. +# CONFIG_E1000 is not set
    6522. 

  6522. +# CONFIG_MYRI_SBUS is not set
    6523. 

  6523. +# CONFIG_NS83820 is not set
    6524. 

  6524. +# CONFIG_HAMACHI is not set
    6525. 

  6525. +# CONFIG_YELLOWFIN is not set
    6526. 

  6526. +# CONFIG_R8169 is not set
    6527. 

  6527. +# CONFIG_SK98LIN is not set
    6528. 

  6528. +# CONFIG_TIGON3 is not set
    6529. 

  6529. +# CONFIG_FDDI is not set
    6530. 

  6530. +# CONFIG_HIPPI is not set
    6531. 

  6531. +# CONFIG_PLIP is not set
    6532. 

  6532. +# CONFIG_PPP is not set
    6533. 

  6533. +# CONFIG_SLIP is not set
    6534. 

  6534. +
    6535. 

  6535. +#
    6536. 

  6536. +# Wireless LAN (non-hamradio)
    6537. 

  6537. +#
    6538. 

  6538. +# CONFIG_NET_RADIO is not set
    6539. 

  6539. +
    6540. 

  6540. +#
    6541. 

  6541. +# Token Ring devices
    6542. 

  6542. +#
    6543. 

  6543. +# CONFIG_TR is not set
    6544. 

  6544. +# CONFIG_NET_FC is not set
    6545. 

  6545. +# CONFIG_RCPCI is not set
    6546. 

  6546. +# CONFIG_SHAPER is not set
    6547. 

  6547. +
    6548. 

  6548. +#
    6549. 

  6549. +# Wan interfaces
    6550. 

  6550. +#
    6551. 

  6551. +# CONFIG_WAN is not set
    6552. 

  6552. +
    6553. 

  6553. +#
    6554. 

  6554. +# Amateur Radio support
    6555. 

  6555. +#
    6556. 

  6556. +# CONFIG_HAMRADIO is not set
    6557. 

  6557. +
    6558. 

  6558. +#
    6559. 

  6559. +# IrDA (infrared) support
    6560. 

  6560. +#
    6561. 

  6561. +# CONFIG_IRDA is not set
    6562. 

  6562. +
    6563. 

  6563. +#
    6564. 

  6564. +# ISDN subsystem
    6565. 

  6565. +#
    6566. 

  6566. +# CONFIG_ISDN is not set
    6567. 

  6567. +
    6568. 

  6568. +#
    6569. 

  6569. +# Input core support
    6570. 

  6570. +#
    6571. 

  6571. +CONFIG_INPUT=y
    6572. 

  6572. +CONFIG_INPUT_KEYBDEV=y
    6573. 

  6573. +CONFIG_INPUT_MOUSEDEV=y
    6574. 

  6574. +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
    6575. 

  6575. +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
    6576. 

  6576. +# CONFIG_INPUT_JOYDEV is not set
    6577. 

  6577. +CONFIG_INPUT_EVDEV=y
    6578. 

  6578. +# CONFIG_INPUT_UINPUT is not set
    6579. 

  6579. +
    6580. 

  6580. +#
    6581. 

  6581. +# Character devices
    6582. 

  6582. +#
    6583. 

  6583. +CONFIG_VT=y
    6584. 

  6584. +CONFIG_VT_CONSOLE=y
    6585. 

  6585. +# CONFIG_SERIAL is not set
    6586. 

  6586. +# CONFIG_SERIAL_EXTENDED is not set
    6587. 

  6587. +CONFIG_SERIAL_NONSTANDARD=y
    6588. 

  6588. +# CONFIG_COMPUTONE is not set
    6589. 

  6589. +# CONFIG_ROCKETPORT is not set
    6590. 

  6590. +# CONFIG_CYCLADES is not set
    6591. 

  6591. +# CONFIG_DIGIEPCA is not set
    6592. 

  6592. +# CONFIG_DIGI is not set
    6593. 

  6593. +# CONFIG_ESPSERIAL is not set
    6594. 

  6594. +# CONFIG_MOXA_INTELLIO is not set
    6595. 

  6595. +# CONFIG_MOXA_SMARTIO is not set
    6596. 

  6596. +# CONFIG_ISI is not set
    6597. 

  6597. +# CONFIG_SYNCLINK is not set
    6598. 

  6598. +# CONFIG_SYNCLINKMP is not set
    6599. 

  6599. +# CONFIG_N_HDLC is not set
    6600. 

  6600. +# CONFIG_RISCOM8 is not set
    6601. 

  6601. +# CONFIG_SPECIALIX is not set
    6602. 

  6602. +# CONFIG_SX is not set
    6603. 

  6603. +# CONFIG_RIO is not set
    6604. 

  6604. +# CONFIG_STALDRV is not set
    6605. 

  6605. +# CONFIG_SERIAL_TX3912 is not set
    6606. 

  6606. +# CONFIG_SERIAL_TX3912_CONSOLE is not set
    6607. 

  6607. +# CONFIG_SERIAL_TXX9 is not set
    6608. 

  6608. +# CONFIG_SERIAL_TXX9_CONSOLE is not set
    6609. 

  6609. +# CONFIG_TXX927_SERIAL is not set
    6610. 

  6610. +CONFIG_UNIX98_PTYS=y
    6611. 

  6611. +CONFIG_UNIX98_PTY_COUNT=256
    6612. 

  6612. +
    6613. 

  6613. +#
    6614. 

  6614. +# I2C support
    6615. 

  6615. +#
    6616. 

  6616. +CONFIG_I2C=y
    6617. 

  6617. +# CONFIG_I2C_ALGOBIT is not set
    6618. 

  6618. +# CONFIG_SCx200_ACB is not set
    6619. 

  6619. +# CONFIG_I2C_ALGOPCF is not set
    6620. 

  6620. +# CONFIG_I2C_CHARDEV is not set
    6621. 

  6621. +# CONFIG_I2C_PROC is not set
    6622. 

  6622. +
    6623. 

  6623. +#
    6624. 

  6624. +# Mice
    6625. 

  6625. +#
    6626. 

  6626. +# CONFIG_BUSMOUSE is not set
    6627. 

  6627. +# CONFIG_MOUSE is not set
    6628. 

  6628. +
    6629. 

  6629. +#
    6630. 

  6630. +# Joysticks
    6631. 

  6631. +#
    6632. 

  6632. +# CONFIG_INPUT_GAMEPORT is not set
    6633. 

  6633. +# CONFIG_INPUT_NS558 is not set
    6634. 

  6634. +# CONFIG_INPUT_LIGHTNING is not set
    6635. 

  6635. +# CONFIG_INPUT_PCIGAME is not set
    6636. 

  6636. +# CONFIG_INPUT_CS461X is not set
    6637. 

  6637. +# CONFIG_INPUT_EMU10K1 is not set
    6638. 

  6638. +# CONFIG_INPUT_SERIO is not set
    6639. 

  6639. +# CONFIG_INPUT_SERPORT is not set
    6640. 

  6640. +
    6641. 

  6641. +#
    6642. 

  6642. +# Joysticks
    6643. 

  6643. +#
    6644. 

  6644. +# CONFIG_INPUT_ANALOG is not set
    6645. 

  6645. +# CONFIG_INPUT_A3D is not set
    6646. 

  6646. +# CONFIG_INPUT_ADI is not set
    6647. 

  6647. +# CONFIG_INPUT_COBRA is not set
    6648. 

  6648. +# CONFIG_INPUT_GF2K is not set
    6649. 

  6649. +# CONFIG_INPUT_GRIP is not set
    6650. 

  6650. +# CONFIG_INPUT_INTERACT is not set
    6651. 

  6651. +# CONFIG_INPUT_TMDC is not set
    6652. 

  6652. +# CONFIG_INPUT_SIDEWINDER is not set
    6653. 

  6653. +# CONFIG_INPUT_IFORCE_USB is not set
    6654. 

  6654. +# CONFIG_INPUT_IFORCE_232 is not set
    6655. 

  6655. +# CONFIG_INPUT_WARRIOR is not set
    6656. 

  6656. +# CONFIG_INPUT_MAGELLAN is not set
    6657. 

  6657. +# CONFIG_INPUT_SPACEORB is not set
    6658. 

  6658. +# CONFIG_INPUT_SPACEBALL is not set
    6659. 

  6659. +# CONFIG_INPUT_STINGER is not set
    6660. 

  6660. +# CONFIG_INPUT_DB9 is not set
    6661. 

  6661. +# CONFIG_INPUT_GAMECON is not set
    6662. 

  6662. +# CONFIG_INPUT_TURBOGRAFX is not set
    6663. 

  6663. +# CONFIG_QIC02_TAPE is not set
    6664. 

  6664. +# CONFIG_IPMI_HANDLER is not set
    6665. 

  6665. +# CONFIG_IPMI_PANIC_EVENT is not set
    6666. 

  6666. +# CONFIG_IPMI_DEVICE_INTERFACE is not set
    6667. 

  6667. +# CONFIG_IPMI_KCS is not set
    6668. 

  6668. +# CONFIG_IPMI_WATCHDOG is not set
    6669. 

  6669. +
    6670. 

  6670. +#
    6671. 

  6671. +# Watchdog Cards
    6672. 

  6672. +#
    6673. 

  6673. +# CONFIG_WATCHDOG is not set
    6674. 

  6674. +# CONFIG_SCx200 is not set
    6675. 

  6675. +# CONFIG_SCx200_GPIO is not set
    6676. 

  6676. +# CONFIG_AMD_PM768 is not set
    6677. 

  6677. +# CONFIG_NVRAM is not set
    6678. 

  6678. +# CONFIG_RTC is not set
    6679. 

  6679. +# CONFIG_DTLK is not set
    6680. 

  6680. +# CONFIG_R3964 is not set
    6681. 

  6681. +# CONFIG_APPLICOM is not set
    6682. 

  6682. +
    6683. 

  6683. +#
    6684. 

  6684. +# Ftape, the floppy tape device driver
    6685. 

  6685. +#
    6686. 

  6686. +# CONFIG_FTAPE is not set
    6687. 

  6687. +# CONFIG_AGP is not set
    6688. 

  6688. +
    6689. 

  6689. +#
    6690. 

  6690. +# Direct Rendering Manager (XFree86 DRI support)
    6691. 

  6691. +#
    6692. 

  6692. +# CONFIG_DRM is not set
    6693. 

  6693. +
    6694. 

  6694. +#
    6695. 

  6695. +# File systems
    6696. 

  6696. +#
    6697. 

  6697. +# CONFIG_QUOTA is not set
    6698. 

  6698. +# CONFIG_QFMT_V2 is not set
    6699. 

  6699. +CONFIG_AUTOFS_FS=y
    6700. 

  6700. +# CONFIG_AUTOFS4_FS is not set
    6701. 

  6701. +# CONFIG_REISERFS_FS is not set
    6702. 

  6702. +# CONFIG_REISERFS_CHECK is not set
    6703. 

  6703. +# CONFIG_REISERFS_PROC_INFO is not set
    6704. 

  6704. +# CONFIG_ADFS_FS is not set
    6705. 

  6705. +# CONFIG_ADFS_FS_RW is not set
    6706. 

  6706. +# CONFIG_AFFS_FS is not set
    6707. 

  6707. +# CONFIG_HFS_FS is not set
    6708. 

  6708. +# CONFIG_HFSPLUS_FS is not set
    6709. 

  6709. +# CONFIG_BEFS_FS is not set
    6710. 

  6710. +# CONFIG_BEFS_DEBUG is not set
    6711. 

  6711. +# CONFIG_BFS_FS is not set
    6712. 

  6712. +CONFIG_EXT3_FS=y
    6713. 

  6713. +CONFIG_JBD=y
    6714. 

  6714. +# CONFIG_JBD_DEBUG is not set
    6715. 

  6715. +CONFIG_FAT_FS=y
    6716. 

  6716. +CONFIG_MSDOS_FS=y
    6717. 

  6717. +# CONFIG_UMSDOS_FS is not set
    6718. 

  6718. +CONFIG_VFAT_FS=y
    6719. 

  6719. +# CONFIG_EFS_FS is not set
    6720. 

  6720. +# CONFIG_JFFS_FS is not set
    6721. 

  6721. +# CONFIG_JFFS2_FS is not set
    6722. 

  6722. +# CONFIG_CRAMFS is not set
    6723. 

  6723. +# CONFIG_TMPFS is not set
    6724. 

  6724. +CONFIG_RAMFS=y
    6725. 

  6725. +# CONFIG_ISO9660_FS is not set
    6726. 

  6726. +# CONFIG_JOLIET is not set
    6727. 

  6727. +# CONFIG_ZISOFS is not set
    6728. 

  6728. +# CONFIG_JFS_FS is not set
    6729. 

  6729. +# CONFIG_JFS_DEBUG is not set
    6730. 

  6730. +# CONFIG_JFS_STATISTICS is not set
    6731. 

  6731. +# CONFIG_MINIX_FS is not set
    6732. 

  6732. +# CONFIG_VXFS_FS is not set
    6733. 

  6733. +# CONFIG_NTFS_FS is not set
    6734. 

  6734. +# CONFIG_NTFS_RW is not set
    6735. 

  6735. +# CONFIG_HPFS_FS is not set
    6736. 

  6736. +CONFIG_PROC_FS=y
    6737. 

  6737. +# CONFIG_DEVFS_FS is not set
    6738. 

  6738. +# CONFIG_DEVFS_MOUNT is not set
    6739. 

  6739. +# CONFIG_DEVFS_DEBUG is not set
    6740. 

  6740. +CONFIG_DEVPTS_FS=y
    6741. 

  6741. +# CONFIG_QNX4FS_FS is not set
    6742. 

  6742. +# CONFIG_QNX4FS_RW is not set
    6743. 

  6743. +# CONFIG_ROMFS_FS is not set
    6744. 

  6744. +CONFIG_EXT2_FS=y
    6745. 

  6745. +# CONFIG_SYSV_FS is not set
    6746. 

  6746. +# CONFIG_UDF_FS is not set
    6747. 

  6747. +# CONFIG_UDF_RW is not set
    6748. 

  6748. +# CONFIG_UFS_FS is not set
    6749. 

  6749. +# CONFIG_UFS_FS_WRITE is not set
    6750. 

  6750. +# CONFIG_XFS_FS is not set
    6751. 

  6751. +# CONFIG_XFS_QUOTA is not set
    6752. 

  6752. +# CONFIG_XFS_RT is not set
    6753. 

  6753. +# CONFIG_XFS_TRACE is not set
    6754. 

  6754. +# CONFIG_XFS_DEBUG is not set
    6755. 

  6755. +
    6756. 

  6756. +#
    6757. 

  6757. +# Network File Systems
    6758. 

  6758. +#
    6759. 

  6759. +# CONFIG_CODA_FS is not set
    6760. 

  6760. +# CONFIG_INTERMEZZO_FS is not set
    6761. 

  6761. +# CONFIG_NFS_FS is not set
    6762. 

  6762. +# CONFIG_NFS_V3 is not set
    6763. 

  6763. +# CONFIG_NFS_DIRECTIO is not set
    6764. 

  6764. +# CONFIG_ROOT_NFS is not set
    6765. 

  6765. +# CONFIG_NFSD is not set
    6766. 

  6766. +# CONFIG_NFSD_V3 is not set
    6767. 

  6767. +# CONFIG_NFSD_TCP is not set
    6768. 

  6768. +# CONFIG_SUNRPC is not set
    6769. 

  6769. +# CONFIG_LOCKD is not set
    6770. 

  6770. +# CONFIG_SMB_FS is not set
    6771. 

  6771. +# CONFIG_NCP_FS is not set
    6772. 

  6772. +# CONFIG_NCPFS_PACKET_SIGNING is not set
    6773. 

  6773. +# CONFIG_NCPFS_IOCTL_LOCKING is not set
    6774. 

  6774. +# CONFIG_NCPFS_STRONG is not set
    6775. 

  6775. +# CONFIG_NCPFS_NFS_NS is not set
    6776. 

  6776. +# CONFIG_NCPFS_OS2_NS is not set
    6777. 

  6777. +# CONFIG_NCPFS_SMALLDOS is not set
    6778. 

  6778. +# CONFIG_NCPFS_NLS is not set
    6779. 

  6779. +# CONFIG_NCPFS_EXTRAS is not set
    6780. 

  6780. +# CONFIG_ZISOFS_FS is not set
    6781. 

  6781. +
    6782. 

  6782. +#
    6783. 

  6783. +# Partition Types
    6784. 

  6784. +#
    6785. 

  6785. +# CONFIG_PARTITION_ADVANCED is not set
    6786. 

  6786. +CONFIG_MSDOS_PARTITION=y
    6787. 

  6787. +# CONFIG_SMB_NLS is not set
    6788. 

  6788. +CONFIG_NLS=y
    6789. 

  6789. +
    6790. 

  6790. +#
    6791. 

  6791. +# Native Language Support
    6792. 

  6792. +#
    6793. 

  6793. +CONFIG_NLS_DEFAULT="iso8859-1"
    6794. 

  6794. +# CONFIG_NLS_CODEPAGE_437 is not set
    6795. 

  6795. +# CONFIG_NLS_CODEPAGE_737 is not set
    6796. 

  6796. +# CONFIG_NLS_CODEPAGE_775 is not set
    6797. 

  6797. +# CONFIG_NLS_CODEPAGE_850 is not set
    6798. 

  6798. +# CONFIG_NLS_CODEPAGE_852 is not set
    6799. 

  6799. +# CONFIG_NLS_CODEPAGE_855 is not set
    6800. 

  6800. +# CONFIG_NLS_CODEPAGE_857 is not set
    6801. 

  6801. +# CONFIG_NLS_CODEPAGE_860 is not set
    6802. 

  6802. +# CONFIG_NLS_CODEPAGE_861 is not set
    6803. 

  6803. +# CONFIG_NLS_CODEPAGE_862 is not set
    6804. 

  6804. +# CONFIG_NLS_CODEPAGE_863 is not set
    6805. 

  6805. +# CONFIG_NLS_CODEPAGE_864 is not set
    6806. 

  6806. +# CONFIG_NLS_CODEPAGE_865 is not set
    6807. 

  6807. +# CONFIG_NLS_CODEPAGE_866 is not set
    6808. 

  6808. +# CONFIG_NLS_CODEPAGE_869 is not set
    6809. 

  6809. +# CONFIG_NLS_CODEPAGE_936 is not set
    6810. 

  6810. +# CONFIG_NLS_CODEPAGE_950 is not set
    6811. 

  6811. +# CONFIG_NLS_CODEPAGE_932 is not set
    6812. 

  6812. +# CONFIG_NLS_CODEPAGE_949 is not set
    6813. 

  6813. +# CONFIG_NLS_CODEPAGE_874 is not set
    6814. 

  6814. +# CONFIG_NLS_ISO8859_8 is not set
    6815. 

  6815. +# CONFIG_NLS_CODEPAGE_1250 is not set
    6816. 

  6816. +# CONFIG_NLS_CODEPAGE_1251 is not set
    6817. 

  6817. +# CONFIG_NLS_ISO8859_1 is not set
    6818. 

  6818. +# CONFIG_NLS_ISO8859_2 is not set
    6819. 

  6819. +# CONFIG_NLS_ISO8859_3 is not set
    6820. 

  6820. +# CONFIG_NLS_ISO8859_4 is not set
    6821. 

  6821. +# CONFIG_NLS_ISO8859_5 is not set
    6822. 

  6822. +# CONFIG_NLS_ISO8859_6 is not set
    6823. 

  6823. +# CONFIG_NLS_ISO8859_7 is not set
    6824. 

  6824. +# CONFIG_NLS_ISO8859_9 is not set
    6825. 

  6825. +# CONFIG_NLS_ISO8859_13 is not set
    6826. 

  6826. +# CONFIG_NLS_ISO8859_14 is not set
    6827. 

  6827. +# CONFIG_NLS_ISO8859_15 is not set
    6828. 

  6828. +# CONFIG_NLS_KOI8_R is not set
    6829. 

  6829. +# CONFIG_NLS_KOI8_U is not set
    6830. 

  6830. +# CONFIG_NLS_UTF8 is not set
    6831. 

  6831. +
    6832. 

  6832. +#
    6833. 

  6833. +# Multimedia devices
    6834. 

  6834. +#
    6835. 

  6835. +# CONFIG_VIDEO_DEV is not set
    6836. 

  6836. +
    6837. 

  6837. +#
    6838. 

  6838. +# Console drivers
    6839. 

  6839. +#
    6840. 

  6840. +# CONFIG_VGA_CONSOLE is not set
    6841. 

  6841. +# CONFIG_MDA_CONSOLE is not set
    6842. 

  6842. +
    6843. 

  6843. +#
    6844. 

  6844. +# Frame-buffer support
    6845. 

  6845. +#
    6846. 

  6846. +CONFIG_FB=y
    6847. 

  6847. +CONFIG_DUMMY_CONSOLE=y
    6848. 

  6848. +# CONFIG_FB_CYBER2000 is not set
    6849. 

  6849. +# CONFIG_FB_VIRTUAL is not set
    6850. 

  6850. +CONFIG_FBCON_ADVANCED=y
    6851. 

  6851. +# CONFIG_FBCON_MFB is not set
    6852. 

  6852. +# CONFIG_FBCON_CFB2 is not set
    6853. 

  6853. +# CONFIG_FBCON_CFB4 is not set
    6854. 

  6854. +# CONFIG_FBCON_CFB8 is not set
    6855. 

  6855. +CONFIG_FBCON_CFB16=y
    6856. 

  6856. +# CONFIG_FBCON_CFB24 is not set
    6857. 

  6857. +# CONFIG_FBCON_CFB32 is not set
    6858. 

  6858. +# CONFIG_FBCON_AFB is not set
    6859. 

  6859. +# CONFIG_FBCON_ILBM is not set
    6860. 

  6860. +# CONFIG_FBCON_IPLAN2P2 is not set
    6861. 

  6861. +# CONFIG_FBCON_IPLAN2P4 is not set
    6862. 

  6862. +# CONFIG_FBCON_IPLAN2P8 is not set
    6863. 

  6863. +# CONFIG_FBCON_MAC is not set
    6864. 

  6864. +# CONFIG_FBCON_VGA_PLANES is not set
    6865. 

  6865. +# CONFIG_FBCON_VGA is not set
    6866. 

  6866. +# CONFIG_FBCON_HGA is not set
    6867. 

  6867. +# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
    6868. 

  6868. +CONFIG_FBCON_FONTS=y
    6869. 

  6869. +CONFIG_FONT_8x8=y
    6870. 

  6870. +CONFIG_FONT_8x16=y
    6871. 

  6871. +# CONFIG_FONT_SUN8x16 is not set
    6872. 

  6872. +# CONFIG_FONT_SUN12x22 is not set
    6873. 

  6873. +# CONFIG_FONT_6x11 is not set
    6874. 

  6874. +# CONFIG_FONT_PEARL_8x8 is not set
    6875. 

  6875. +# CONFIG_FONT_ACORN_8x8 is not set
    6876. 

  6876. +
    6877. 

  6877. +#
    6878. 

  6878. +# Sound
    6879. 

  6879. +#
    6880. 

  6880. +CONFIG_SOUND=y
    6881. 

  6881. +# CONFIG_SOUND_ALI5455 is not set
    6882. 

  6882. +# CONFIG_SOUND_BT878 is not set
    6883. 

  6883. +# CONFIG_SOUND_CMPCI is not set
    6884. 

  6884. +# CONFIG_SOUND_EMU10K1 is not set
    6885. 

  6885. +# CONFIG_MIDI_EMU10K1 is not set
    6886. 

  6886. +# CONFIG_SOUND_FUSION is not set
    6887. 

  6887. +# CONFIG_SOUND_CS4281 is not set
    6888. 

  6888. +# CONFIG_SOUND_ES1370 is not set
    6889. 

  6889. +# CONFIG_SOUND_ES1371 is not set
    6890. 

  6890. +# CONFIG_SOUND_ESSSOLO1 is not set
    6891. 

  6891. +# CONFIG_SOUND_MAESTRO is not set
    6892. 

  6892. +# CONFIG_SOUND_MAESTRO3 is not set
    6893. 

  6893. +# CONFIG_SOUND_FORTE is not set
    6894. 

  6894. +# CONFIG_SOUND_ICH is not set
    6895. 

  6895. +# CONFIG_SOUND_RME96XX is not set
    6896. 

  6896. +# CONFIG_SOUND_SONICVIBES is not set
    6897. 

  6897. +# CONFIG_SOUND_TRIDENT is not set
    6898. 

  6898. +# CONFIG_SOUND_MSNDCLAS is not set
    6899. 

  6899. +# CONFIG_SOUND_MSNDPIN is not set
    6900. 

  6900. +# CONFIG_SOUND_VIA82CXXX is not set
    6901. 

  6901. +# CONFIG_MIDI_VIA82CXXX is not set
    6902. 

  6902. +# CONFIG_SOUND_OSS is not set
    6903. 

  6903. +# CONFIG_SOUND_TVMIXER is not set
    6904. 

  6904. +# CONFIG_SOUND_AD1980 is not set
    6905. 

  6905. +# CONFIG_SOUND_WM97XX is not set
    6906. 

  6906. +
    6907. 

  6907. +#
    6908. 

  6908. +# USB support
    6909. 

  6909. +#
    6910. 

  6910. +# CONFIG_USB is not set
    6911. 

  6911. +
    6912. 

  6912. +#
    6913. 

  6913. +# Support for USB gadgets
    6914. 

  6914. +#
    6915. 

  6915. +# CONFIG_USB_GADGET is not set
    6916. 

  6916. +
    6917. 

  6917. +#
    6918. 

  6918. +# Bluetooth support
    6919. 

  6919. +#
    6920. 

  6920. +# CONFIG_BLUEZ is not set
    6921. 

  6921. +
    6922. 

  6922. +#
    6923. 

  6923. +# Kernel hacking
    6924. 

  6924. +#
    6925. 

  6925. +CONFIG_CROSSCOMPILE=y
    6926. 

  6926. +# CONFIG_RUNTIME_DEBUG is not set
    6927. 

  6927. +# CONFIG_KGDB is not set
    6928. 

  6928. +# CONFIG_GDB_CONSOLE is not set
    6929. 

  6929. +# CONFIG_DEBUG_INFO is not set
    6930. 

  6930. +# CONFIG_MAGIC_SYSRQ is not set
    6931. 

  6931. +# CONFIG_MIPS_UNCACHED is not set
    6932. 

  6932. +CONFIG_LOG_BUF_SHIFT=0
    6933. 

  6933. +
    6934. 

  6934. +#
    6935. 

  6935. +# Cryptographic options
    6936. 

  6936. +#
    6937. 

  6937. +# CONFIG_CRYPTO is not set
    6938. 

  6938. +
    6939. 

  6939. +#
    6940. 

  6940. +# Library routines
    6941. 

  6941. +#
    6942. 

  6942. +# CONFIG_CRC32 is not set
    6943. 

  6943. +CONFIG_ZLIB_INFLATE=m
    6944. 

  6944. +CONFIG_ZLIB_DEFLATE=m
    6945. 

  6945. --- a/arch/mips/defconfig-hp-lj
    6946. 

  6946. +++ b/arch/mips/defconfig-hp-lj
    6947. 

  6947. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    6948. 

  6948.  # CONFIG_MIPS_PB1000 is not set
    6949. 

  6949.  # CONFIG_MIPS_PB1100 is not set
    6950. 

  6950.  # CONFIG_MIPS_PB1500 is not set
    6951. 

  6951. -# CONFIG_MIPS_HYDROGEN3 is not set
    6952. 

  6952.  # CONFIG_MIPS_PB1550 is not set
    6953. 

  6953. +# CONFIG_MIPS_HYDROGEN3 is not set
    6954. 

  6954.  # CONFIG_MIPS_XXS1500 is not set
    6955. 

  6955.  # CONFIG_MIPS_MTX1 is not set
    6956. 

  6956.  # CONFIG_COGENT_CSB250 is not set
    6957. 

  6957. @@ -184,8 +184,8 @@ CONFIG_MTD_CFI_AMDSTD=y
    6958. 

  6958.  # Mapping drivers for chip access
    6959. 

  6959.  #
    6960. 

  6960.  CONFIG_MTD_PHYSMAP=y
    6961. 

  6961. -CONFIG_MTD_PHYSMAP_START=10040000
    6962. 

  6962. -CONFIG_MTD_PHYSMAP_LEN=00fc0000
    6963. 

  6963. +CONFIG_MTD_PHYSMAP_START=0x10040000
    6964. 

  6964. +CONFIG_MTD_PHYSMAP_LEN=0x00fc0000
    6965. 

  6965.  CONFIG_MTD_PHYSMAP_BUSWIDTH=4
    6966. 

  6966.  # CONFIG_MTD_PB1000 is not set
    6967. 

  6967.  # CONFIG_MTD_PB1500 is not set
    6968. 

  6968. @@ -193,9 +193,7 @@ CONFIG_MTD_PHYSMAP_BUSWIDTH=4
    6969. 

  6969.  # CONFIG_MTD_BOSPORUS is not set
    6970. 

  6970.  # CONFIG_MTD_XXS1500 is not set
    6971. 

  6971.  # CONFIG_MTD_MTX1 is not set
    6972. 

  6972. -# CONFIG_MTD_DB1X00 is not set
    6973. 

  6973.  # CONFIG_MTD_PB1550 is not set
    6974. 

  6974. -# CONFIG_MTD_HYDROGEN3 is not set
    6975. 

  6975.  # CONFIG_MTD_MIRAGE is not set
    6976. 

  6976.  # CONFIG_MTD_CSTM_MIPS_IXX is not set
    6977. 

  6977.  # CONFIG_MTD_OCELOT is not set
    6978. 

  6978. @@ -214,7 +212,6 @@ CONFIG_MTD_PHYSMAP_BUSWIDTH=4
    6979. 

  6979.  #
    6980. 

  6980.  # Disk-On-Chip Device Drivers
    6981. 

  6981.  #
    6982. 

  6982. -# CONFIG_MTD_DOC1000 is not set
    6983. 

  6983.  # CONFIG_MTD_DOC2000 is not set
    6984. 

  6984.  # CONFIG_MTD_DOC2001 is not set
    6985. 

  6985.  # CONFIG_MTD_DOCPROBE is not set
    6986. 

  6986. @@ -304,11 +301,6 @@ CONFIG_IP_PNP_DHCP=y
    6987. 

  6987.  #
    6988. 

  6988.  # CONFIG_IPX is not set
    6989. 

  6989.  # CONFIG_ATALK is not set
    6990. 

  6990. -
    6991. 

  6991. -#
    6992. 

  6992. -# Appletalk devices
    6993. 

  6993. -#
    6994. 

  6994. -# CONFIG_DEV_APPLETALK is not set
    6995. 

  6995.  # CONFIG_DECNET is not set
    6996. 

  6996.  # CONFIG_BRIDGE is not set
    6997. 

  6997.  # CONFIG_X25 is not set
    6998. 

  6998. @@ -604,7 +596,6 @@ CONFIG_SERIAL=y
    6999. 

  6999.  CONFIG_SERIAL_CONSOLE=y
    7000. 

  7000.  # CONFIG_SERIAL_EXTENDED is not set
    7001. 

  7001.  # CONFIG_SERIAL_NONSTANDARD is not set
    7002. 

  7002. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    7003. 

  7003.  # CONFIG_UNIX98_PTYS is not set
    7004. 

  7004.  
    7005. 

  7005.  #
    7006. 

  7006. --- a/arch/mips/defconfig-hydrogen3
    7007. 

  7007. +++ b/arch/mips/defconfig-hydrogen3
    7008. 

  7008. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    7009. 

  7009.  # CONFIG_MIPS_PB1000 is not set
    7010. 

  7010.  # CONFIG_MIPS_PB1100 is not set
    7011. 

  7011.  # CONFIG_MIPS_PB1500 is not set
    7012. 

  7012. -CONFIG_MIPS_HYDROGEN3=y
    7013. 

  7013.  # CONFIG_MIPS_PB1550 is not set
    7014. 

  7014. +CONFIG_MIPS_HYDROGEN3=y
    7015. 

  7015.  # CONFIG_MIPS_XXS1500 is not set
    7016. 

  7016.  # CONFIG_MIPS_MTX1 is not set
    7017. 

  7017.  # CONFIG_COGENT_CSB250 is not set
    7018. 

  7018. @@ -214,9 +214,7 @@ CONFIG_MTD_CFI_AMDSTD=y
    7019. 

  7019.  # CONFIG_MTD_BOSPORUS is not set
    7020. 

  7020.  # CONFIG_MTD_XXS1500 is not set
    7021. 

  7021.  # CONFIG_MTD_MTX1 is not set
    7022. 

  7022. -# CONFIG_MTD_DB1X00 is not set
    7023. 

  7023.  # CONFIG_MTD_PB1550 is not set
    7024. 

  7024. -CONFIG_MTD_HYDROGEN3=y
    7025. 

  7025.  # CONFIG_MTD_MIRAGE is not set
    7026. 

  7026.  # CONFIG_MTD_CSTM_MIPS_IXX is not set
    7027. 

  7027.  # CONFIG_MTD_OCELOT is not set
    7028. 

  7028. @@ -235,7 +233,6 @@ CONFIG_MTD_HYDROGEN3=y
    7029. 

  7029.  #
    7030. 

  7030.  # Disk-On-Chip Device Drivers
    7031. 

  7031.  #
    7032. 

  7032. -# CONFIG_MTD_DOC1000 is not set
    7033. 

  7033.  # CONFIG_MTD_DOC2000 is not set
    7034. 

  7034.  # CONFIG_MTD_DOC2001 is not set
    7035. 

  7035.  # CONFIG_MTD_DOCPROBE is not set
    7036. 

  7036. @@ -340,11 +337,6 @@ CONFIG_IP_PNP_BOOTP=y
    7037. 

  7037.  #
    7038. 

  7038.  # CONFIG_IPX is not set
    7039. 

  7039.  # CONFIG_ATALK is not set
    7040. 

  7040. -
    7041. 

  7041. -#
    7042. 

  7042. -# Appletalk devices
    7043. 

  7043. -#
    7044. 

  7044. -# CONFIG_DEV_APPLETALK is not set
    7045. 

  7045.  # CONFIG_DECNET is not set
    7046. 

  7046.  # CONFIG_BRIDGE is not set
    7047. 

  7047.  # CONFIG_X25 is not set
    7048. 

  7048. @@ -590,7 +582,6 @@ CONFIG_AU1X00_SERIAL_CONSOLE=y
    7049. 

  7049.  # CONFIG_AU1X00_USB_TTY is not set
    7050. 

  7050.  # CONFIG_AU1X00_USB_RAW is not set
    7051. 

  7051.  # CONFIG_TXX927_SERIAL is not set
    7052. 

  7052. -CONFIG_MIPS_HYDROGEN3_BUTTONS=y
    7053. 

  7053.  CONFIG_UNIX98_PTYS=y
    7054. 

  7054.  CONFIG_UNIX98_PTY_COUNT=256
    7055. 

  7055.  
    7056. 

  7056. @@ -838,6 +829,7 @@ CONFIG_DUMMY_CONSOLE=y
    7057. 

  7057.  # CONFIG_FB_PM2 is not set
    7058. 

  7058.  # CONFIG_FB_PM3 is not set
    7059. 

  7059.  # CONFIG_FB_CYBER2000 is not set
    7060. 

  7060. +CONFIG_FB_AU1100=y
    7061. 

  7061.  # CONFIG_FB_MATROX is not set
    7062. 

  7062.  # CONFIG_FB_ATY is not set
    7063. 

  7063.  # CONFIG_FB_RADEON is not set
    7064. 

  7064. @@ -849,7 +841,6 @@ CONFIG_DUMMY_CONSOLE=y
    7065. 

  7065.  # CONFIG_FB_VOODOO1 is not set
    7066. 

  7066.  # CONFIG_FB_TRIDENT is not set
    7067. 

  7067.  # CONFIG_FB_E1356 is not set
    7068. 

  7068. -CONFIG_FB_AU1100=y
    7069. 

  7069.  # CONFIG_FB_IT8181 is not set
    7070. 

  7070.  # CONFIG_FB_VIRTUAL is not set
    7071. 

  7071.  CONFIG_FBCON_ADVANCED=y
    7072. 

  7072. --- a/arch/mips/defconfig-ip22
    7073. 

  7073. +++ b/arch/mips/defconfig-ip22
    7074. 

  7074. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    7075. 

  7075.  # CONFIG_MIPS_PB1000 is not set
    7076. 

  7076.  # CONFIG_MIPS_PB1100 is not set
    7077. 

  7077.  # CONFIG_MIPS_PB1500 is not set
    7078. 

  7078. -# CONFIG_MIPS_HYDROGEN3 is not set
    7079. 

  7079.  # CONFIG_MIPS_PB1550 is not set
    7080. 

  7080. +# CONFIG_MIPS_HYDROGEN3 is not set
    7081. 

  7081.  # CONFIG_MIPS_XXS1500 is not set
    7082. 

  7082.  # CONFIG_MIPS_MTX1 is not set
    7083. 

  7083.  # CONFIG_COGENT_CSB250 is not set
    7084. 

  7084. @@ -235,11 +235,6 @@ CONFIG_IP_PNP_BOOTP=y
    7085. 

  7085.  #
    7086. 

  7086.  # CONFIG_IPX is not set
    7087. 

  7087.  # CONFIG_ATALK is not set
    7088. 

  7088. -
    7089. 

  7089. -#
    7090. 

  7090. -# Appletalk devices
    7091. 

  7091. -#
    7092. 

  7092. -# CONFIG_DEV_APPLETALK is not set
    7093. 

  7093.  # CONFIG_DECNET is not set
    7094. 

  7094.  # CONFIG_BRIDGE is not set
    7095. 

  7095.  # CONFIG_X25 is not set
    7096. 

  7096. @@ -319,9 +314,11 @@ CONFIG_SGIWD93_SCSI=y
    7097. 

  7097.  # CONFIG_SCSI_MEGARAID is not set
    7098. 

  7098.  # CONFIG_SCSI_MEGARAID2 is not set
    7099. 

  7099.  # CONFIG_SCSI_SATA is not set
    7100. 

  7100. +# CONFIG_SCSI_SATA_AHCI is not set
    7101. 

  7101.  # CONFIG_SCSI_SATA_SVW is not set
    7102. 

  7102.  # CONFIG_SCSI_ATA_PIIX is not set
    7103. 

  7103.  # CONFIG_SCSI_SATA_NV is not set
    7104. 

  7104. +# CONFIG_SCSI_SATA_QSTOR is not set
    7105. 

  7105.  # CONFIG_SCSI_SATA_PROMISE is not set
    7106. 

  7106.  # CONFIG_SCSI_SATA_SX4 is not set
    7107. 

  7107.  # CONFIG_SCSI_SATA_SIL is not set
    7108. 

  7108. @@ -465,7 +462,6 @@ CONFIG_VT_CONSOLE=y
    7109. 

  7109.  # CONFIG_SERIAL is not set
    7110. 

  7110.  # CONFIG_SERIAL_EXTENDED is not set
    7111. 

  7111.  # CONFIG_SERIAL_NONSTANDARD is not set
    7112. 

  7112. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    7113. 

  7113.  CONFIG_UNIX98_PTYS=y
    7114. 

  7114.  CONFIG_UNIX98_PTY_COUNT=256
    7115. 

  7115.  
    7116. 

  7116. --- a/arch/mips/defconfig-it8172
    7117. 

  7117. +++ b/arch/mips/defconfig-it8172
    7118. 

  7118. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    7119. 

  7119.  # CONFIG_MIPS_PB1000 is not set
    7120. 

  7120.  # CONFIG_MIPS_PB1100 is not set
    7121. 

  7121.  # CONFIG_MIPS_PB1500 is not set
    7122. 

  7122. -# CONFIG_MIPS_HYDROGEN3 is not set
    7123. 

  7123.  # CONFIG_MIPS_PB1550 is not set
    7124. 

  7124. +# CONFIG_MIPS_HYDROGEN3 is not set
    7125. 

  7125.  # CONFIG_MIPS_XXS1500 is not set
    7126. 

  7126.  # CONFIG_MIPS_MTX1 is not set
    7127. 

  7127.  # CONFIG_COGENT_CSB250 is not set
    7128. 

  7128. @@ -186,8 +186,8 @@ CONFIG_MTD_CFI_INTELEXT=y
    7129. 

  7129.  # Mapping drivers for chip access
    7130. 

  7130.  #
    7131. 

  7131.  CONFIG_MTD_PHYSMAP=y
    7132. 

  7132. -CONFIG_MTD_PHYSMAP_START=8000000
    7133. 

  7133. -CONFIG_MTD_PHYSMAP_LEN=2000000
    7134. 

  7134. +CONFIG_MTD_PHYSMAP_START=0x8000000
    7135. 

  7135. +CONFIG_MTD_PHYSMAP_LEN=0x2000000
    7136. 

  7136.  CONFIG_MTD_PHYSMAP_BUSWIDTH=4
    7137. 

  7137.  # CONFIG_MTD_PB1000 is not set
    7138. 

  7138.  # CONFIG_MTD_PB1500 is not set
    7139. 

  7139. @@ -195,9 +195,7 @@ CONFIG_MTD_PHYSMAP_BUSWIDTH=4
    7140. 

  7140.  # CONFIG_MTD_BOSPORUS is not set
    7141. 

  7141.  # CONFIG_MTD_XXS1500 is not set
    7142. 

  7142.  # CONFIG_MTD_MTX1 is not set
    7143. 

  7143. -# CONFIG_MTD_DB1X00 is not set
    7144. 

  7144.  # CONFIG_MTD_PB1550 is not set
    7145. 

  7145. -# CONFIG_MTD_HYDROGEN3 is not set
    7146. 

  7146.  # CONFIG_MTD_MIRAGE is not set
    7147. 

  7147.  # CONFIG_MTD_CSTM_MIPS_IXX is not set
    7148. 

  7148.  # CONFIG_MTD_OCELOT is not set
    7149. 

  7149. @@ -216,7 +214,6 @@ CONFIG_MTD_PHYSMAP_BUSWIDTH=4
    7150. 

  7150.  #
    7151. 

  7151.  # Disk-On-Chip Device Drivers
    7152. 

  7152.  #
    7153. 

  7153. -# CONFIG_MTD_DOC1000 is not set
    7154. 

  7154.  # CONFIG_MTD_DOC2000 is not set
    7155. 

  7155.  # CONFIG_MTD_DOC2001 is not set
    7156. 

  7156.  # CONFIG_MTD_DOCPROBE is not set
    7157. 

  7157. @@ -304,11 +301,6 @@ CONFIG_IP_PNP_BOOTP=y
    7158. 

  7158.  #
    7159. 

  7159.  # CONFIG_IPX is not set
    7160. 

  7160.  # CONFIG_ATALK is not set
    7161. 

  7161. -
    7162. 

  7162. -#
    7163. 

  7163. -# Appletalk devices
    7164. 

  7164. -#
    7165. 

  7165. -# CONFIG_DEV_APPLETALK is not set
    7166. 

  7166.  # CONFIG_DECNET is not set
    7167. 

  7167.  # CONFIG_BRIDGE is not set
    7168. 

  7168.  # CONFIG_X25 is not set
    7169. 

  7169. @@ -592,7 +584,6 @@ CONFIG_SERIAL_CONSOLE=y
    7170. 

  7170.  CONFIG_PC_KEYB=y
    7171. 

  7171.  # CONFIG_IT8172_SCR0 is not set
    7172. 

  7172.  # CONFIG_IT8172_SCR1 is not set
    7173. 

  7173. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    7174. 

  7174.  CONFIG_UNIX98_PTYS=y
    7175. 

  7175.  CONFIG_UNIX98_PTY_COUNT=256
    7176. 

  7176.  
    7177. 

  7177. --- a/arch/mips/defconfig-ivr
    7178. 

  7178. +++ b/arch/mips/defconfig-ivr
    7179. 

  7179. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    7180. 

  7180.  # CONFIG_MIPS_PB1000 is not set
    7181. 

  7181.  # CONFIG_MIPS_PB1100 is not set
    7182. 

  7182.  # CONFIG_MIPS_PB1500 is not set
    7183. 

  7183. -# CONFIG_MIPS_HYDROGEN3 is not set
    7184. 

  7184.  # CONFIG_MIPS_PB1550 is not set
    7185. 

  7185. +# CONFIG_MIPS_HYDROGEN3 is not set
    7186. 

  7186.  # CONFIG_MIPS_XXS1500 is not set
    7187. 

  7187.  # CONFIG_MIPS_MTX1 is not set
    7188. 

  7188.  # CONFIG_COGENT_CSB250 is not set
    7189. 

  7189. @@ -226,11 +226,6 @@ CONFIG_IP_PNP_BOOTP=y
    7190. 

  7190.  #
    7191. 

  7191.  # CONFIG_IPX is not set
    7192. 

  7192.  # CONFIG_ATALK is not set
    7193. 

  7193. -
    7194. 

  7194. -#
    7195. 

  7195. -# Appletalk devices
    7196. 

  7196. -#
    7197. 

  7197. -# CONFIG_DEV_APPLETALK is not set
    7198. 

  7198.  # CONFIG_DECNET is not set
    7199. 

  7199.  # CONFIG_BRIDGE is not set
    7200. 

  7200.  # CONFIG_X25 is not set
    7201. 

  7201. @@ -516,7 +511,6 @@ CONFIG_SERIAL_CONSOLE=y
    7202. 

  7202.  CONFIG_QTRONIX_KEYBOARD=y
    7203. 

  7203.  CONFIG_IT8172_CIR=y
    7204. 

  7204.  # CONFIG_IT8172_SCR0 is not set
    7205. 

  7205. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    7206. 

  7206.  CONFIG_UNIX98_PTYS=y
    7207. 

  7207.  CONFIG_UNIX98_PTY_COUNT=256
    7208. 

  7208.  
    7209. 

  7209. --- a/arch/mips/defconfig-jmr3927
    7210. 

  7210. +++ b/arch/mips/defconfig-jmr3927
    7211. 

  7211. @@ -28,8 +28,8 @@ CONFIG_EXPERIMENTAL=y
    7212. 

  7212.  # CONFIG_MIPS_PB1000 is not set
    7213. 

  7213.  # CONFIG_MIPS_PB1100 is not set
    7214. 

  7214.  # CONFIG_MIPS_PB1500 is not set
    7215. 

  7215. -# CONFIG_MIPS_HYDROGEN3 is not set
    7216. 

  7216.  # CONFIG_MIPS_PB1550 is not set
    7217. 

  7217. +# CONFIG_MIPS_HYDROGEN3 is not set
    7218. 

  7218.  # CONFIG_MIPS_XXS1500 is not set
    7219. 

  7219.  # CONFIG_MIPS_MTX1 is not set
    7220. 

  7220.  # CONFIG_COGENT_CSB250 is not set
    7221. 

  7221. @@ -225,11 +225,6 @@ CONFIG_IP_PNP_BOOTP=y
    7222. 

  7222.  #
    7223. 

  7223.  # CONFIG_IPX is not set
    7224. 

  7224.  # CONFIG_ATALK is not set
    7225. 

  7225. -
    7226. 

  7226. -#
    7227. 

  7227. -# Appletalk devices
    7228. 

  7228. -#
    7229. 

  7229. -# CONFIG_DEV_APPLETALK is not set
    7230. 

  7230.  # CONFIG_DECNET is not set
    7231. 

  7231.  # CONFIG_BRIDGE is not set
    7232. 

  7232.  # CONFIG_X25 is not set
    7233. 

  7233. @@ -454,7 +449,6 @@ CONFIG_SERIAL_NONSTANDARD=y
    7234. 

  7234.  # CONFIG_SERIAL_TXX9_CONSOLE is not set
    7235. 

  7235.  CONFIG_TXX927_SERIAL=y
    7236. 

  7236.  CONFIG_TXX927_SERIAL_CONSOLE=y
    7237. 

  7237. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    7238. 

  7238.  # CONFIG_UNIX98_PTYS is not set
    7239. 

  7239.  
    7240. 

  7240.  #
    7241. 

  7241. --- a/arch/mips/defconfig-lasat
    7242. 

  7242. +++ b/arch/mips/defconfig-lasat
    7243. 

  7243. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    7244. 

  7244.  # CONFIG_MIPS_PB1000 is not set
    7245. 

  7245.  # CONFIG_MIPS_PB1100 is not set
    7246. 

  7246.  # CONFIG_MIPS_PB1500 is not set
    7247. 

  7247. -# CONFIG_MIPS_HYDROGEN3 is not set
    7248. 

  7248.  # CONFIG_MIPS_PB1550 is not set
    7249. 

  7249. +# CONFIG_MIPS_HYDROGEN3 is not set
    7250. 

  7250.  # CONFIG_MIPS_XXS1500 is not set
    7251. 

  7251.  # CONFIG_MIPS_MTX1 is not set
    7252. 

  7252.  # CONFIG_COGENT_CSB250 is not set
    7253. 

  7253. @@ -198,9 +198,7 @@ CONFIG_MTD_CFI_AMDSTD=y
    7254. 

  7254.  # CONFIG_MTD_BOSPORUS is not set
    7255. 

  7255.  # CONFIG_MTD_XXS1500 is not set
    7256. 

  7256.  # CONFIG_MTD_MTX1 is not set
    7257. 

  7257. -# CONFIG_MTD_DB1X00 is not set
    7258. 

  7258.  # CONFIG_MTD_PB1550 is not set
    7259. 

  7259. -# CONFIG_MTD_HYDROGEN3 is not set
    7260. 

  7260.  # CONFIG_MTD_MIRAGE is not set
    7261. 

  7261.  # CONFIG_MTD_CSTM_MIPS_IXX is not set
    7262. 

  7262.  # CONFIG_MTD_OCELOT is not set
    7263. 

  7263. @@ -219,7 +217,6 @@ CONFIG_MTD_LASAT=y
    7264. 

  7264.  #
    7265. 

  7265.  # Disk-On-Chip Device Drivers
    7266. 

  7266.  #
    7267. 

  7267. -# CONFIG_MTD_DOC1000 is not set
    7268. 

  7268.  # CONFIG_MTD_DOC2000 is not set
    7269. 

  7269.  # CONFIG_MTD_DOC2001 is not set
    7270. 

  7270.  # CONFIG_MTD_DOCPROBE is not set
    7271. 

  7271. @@ -303,11 +300,6 @@ CONFIG_INET=y
    7272. 

  7272.  #
    7273. 

  7273.  # CONFIG_IPX is not set
    7274. 

  7274.  # CONFIG_ATALK is not set
    7275. 

  7275. -
    7276. 

  7276. -#
    7277. 

  7277. -# Appletalk devices
    7278. 

  7278. -#
    7279. 

  7279. -# CONFIG_DEV_APPLETALK is not set
    7280. 

  7280.  # CONFIG_DECNET is not set
    7281. 

  7281.  # CONFIG_BRIDGE is not set
    7282. 

  7282.  # CONFIG_X25 is not set
    7283. 

  7283. @@ -584,7 +576,6 @@ CONFIG_SERIAL=y
    7284. 

  7284.  CONFIG_SERIAL_CONSOLE=y
    7285. 

  7285.  # CONFIG_SERIAL_EXTENDED is not set
    7286. 

  7286.  # CONFIG_SERIAL_NONSTANDARD is not set
    7287. 

  7287. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    7288. 

  7288.  CONFIG_UNIX98_PTYS=y
    7289. 

  7289.  CONFIG_UNIX98_PTY_COUNT=256
    7290. 

  7290.  
    7291. 

  7291. --- a/arch/mips/defconfig-malta
    7292. 

  7292. +++ b/arch/mips/defconfig-malta
    7293. 

  7293. @@ -22,16 +22,19 @@ CONFIG_KMOD=y
    7294. 

  7294.  #
    7295. 

  7295.  # CONFIG_ACER_PICA_61 is not set
    7296. 

  7296.  # CONFIG_MIPS_BOSPORUS is not set
    7297. 

  7297. +# CONFIG_MIPS_FICMMP is not set
    7298. 

  7298.  # CONFIG_MIPS_MIRAGE is not set
    7299. 

  7299.  # CONFIG_MIPS_DB1000 is not set
    7300. 

  7300.  # CONFIG_MIPS_DB1100 is not set
    7301. 

  7301.  # CONFIG_MIPS_DB1500 is not set
    7302. 

  7302.  # CONFIG_MIPS_DB1550 is not set
    7303. 

  7303. +# CONFIG_MIPS_DB1200 is not set
    7304. 

  7304.  # CONFIG_MIPS_PB1000 is not set
    7305. 

  7305.  # CONFIG_MIPS_PB1100 is not set
    7306. 

  7306.  # CONFIG_MIPS_PB1500 is not set
    7307. 

  7307. -# CONFIG_MIPS_HYDROGEN3 is not set
    7308. 

  7308.  # CONFIG_MIPS_PB1550 is not set
    7309. 

  7309. +# CONFIG_MIPS_PB1200 is not set
    7310. 

  7310. +# CONFIG_MIPS_HYDROGEN3 is not set
    7311. 

  7311.  # CONFIG_MIPS_XXS1500 is not set
    7312. 

  7312.  # CONFIG_MIPS_MTX1 is not set
    7313. 

  7313.  # CONFIG_COGENT_CSB250 is not set
    7314. 

  7314. @@ -237,11 +240,6 @@ CONFIG_IP_PNP_BOOTP=y
    7315. 

  7315.  #
    7316. 

  7316.  # CONFIG_IPX is not set
    7317. 

  7317.  # CONFIG_ATALK is not set
    7318. 

  7318. -
    7319. 

  7319. -#
    7320. 

  7320. -# Appletalk devices
    7321. 

  7321. -#
    7322. 

  7322. -# CONFIG_DEV_APPLETALK is not set
    7323. 

  7323.  # CONFIG_DECNET is not set
    7324. 

  7324.  # CONFIG_BRIDGE is not set
    7325. 

  7325.  # CONFIG_X25 is not set
    7326. 

  7326. @@ -273,8 +271,83 @@ CONFIG_IP_PNP_BOOTP=y
    7327. 

  7327.  #
    7328. 

  7328.  # ATA/IDE/MFM/RLL support
    7329. 

  7329.  #
    7330. 

  7330. -# CONFIG_IDE is not set
    7331. 

  7331. +CONFIG_IDE=y
    7332. 

  7332. +
    7333. 

  7333. +#
    7334. 

  7334. +# IDE, ATA and ATAPI Block devices
    7335. 

  7335. +#
    7336. 

  7336. +CONFIG_BLK_DEV_IDE=y
    7337. 

  7337. +
    7338. 

  7338. +#
    7339. 

  7339. +# Please see Documentation/ide.txt for help/info on IDE drives
    7340. 

  7340. +#
    7341. 

  7341. +# CONFIG_BLK_DEV_HD_IDE is not set
    7342. 

  7342.  # CONFIG_BLK_DEV_HD is not set
    7343. 

  7343. +# CONFIG_BLK_DEV_IDE_SATA is not set
    7344. 

  7344. +CONFIG_BLK_DEV_IDEDISK=y
    7345. 

  7345. +# CONFIG_IDEDISK_MULTI_MODE is not set
    7346. 

  7346. +# CONFIG_IDEDISK_STROKE is not set
    7347. 

  7347. +# CONFIG_BLK_DEV_IDECS is not set
    7348. 

  7348. +# CONFIG_BLK_DEV_DELKIN is not set
    7349. 

  7349. +CONFIG_BLK_DEV_IDECD=y
    7350. 

  7350. +CONFIG_BLK_DEV_IDETAPE=y
    7351. 

  7351. +CONFIG_BLK_DEV_IDEFLOPPY=y
    7352. 

  7352. +CONFIG_BLK_DEV_IDESCSI=y
    7353. 

  7353. +# CONFIG_IDE_TASK_IOCTL is not set
    7354. 

  7354. +
    7355. 

  7355. +#
    7356. 

  7356. +# IDE chipset support/bugfixes
    7357. 

  7357. +#
    7358. 

  7358. +# CONFIG_BLK_DEV_CMD640 is not set
    7359. 

  7359. +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
    7360. 

  7360. +# CONFIG_BLK_DEV_ISAPNP is not set
    7361. 

  7361. +CONFIG_BLK_DEV_IDEPCI=y
    7362. 

  7362. +CONFIG_BLK_DEV_GENERIC=y
    7363. 

  7363. +CONFIG_IDEPCI_SHARE_IRQ=y
    7364. 

  7364. +CONFIG_BLK_DEV_IDEDMA_PCI=y
    7365. 

  7365. +# CONFIG_BLK_DEV_OFFBOARD is not set
    7366. 

  7366. +CONFIG_BLK_DEV_IDEDMA_FORCED=y
    7367. 

  7367. +CONFIG_IDEDMA_PCI_AUTO=y
    7368. 

  7368. +# CONFIG_IDEDMA_ONLYDISK is not set
    7369. 

  7369. +CONFIG_BLK_DEV_IDEDMA=y
    7370. 

  7370. +# CONFIG_IDEDMA_PCI_WIP is not set
    7371. 

  7371. +# CONFIG_BLK_DEV_ADMA100 is not set
    7372. 

  7372. +# CONFIG_BLK_DEV_AEC62XX is not set
    7373. 

  7373. +# CONFIG_BLK_DEV_ALI15X3 is not set
    7374. 

  7374. +# CONFIG_WDC_ALI15X3 is not set
    7375. 

  7375. +# CONFIG_BLK_DEV_AMD74XX is not set
    7376. 

  7376. +# CONFIG_AMD74XX_OVERRIDE is not set
    7377. 

  7377. +# CONFIG_BLK_DEV_ATIIXP is not set
    7378. 

  7378. +# CONFIG_BLK_DEV_CMD64X is not set
    7379. 

  7379. +# CONFIG_BLK_DEV_TRIFLEX is not set
    7380. 

  7380. +# CONFIG_BLK_DEV_CY82C693 is not set
    7381. 

  7381. +# CONFIG_BLK_DEV_CS5530 is not set
    7382. 

  7382. +# CONFIG_BLK_DEV_HPT34X is not set
    7383. 

  7383. +# CONFIG_HPT34X_AUTODMA is not set
    7384. 

  7384. +# CONFIG_BLK_DEV_HPT366 is not set
    7385. 

  7385. +CONFIG_BLK_DEV_PIIX=y
    7386. 

  7386. +# CONFIG_BLK_DEV_NS87415 is not set
    7387. 

  7387. +# CONFIG_BLK_DEV_OPTI621 is not set
    7388. 

  7388. +# CONFIG_BLK_DEV_PDC202XX_OLD is not set
    7389. 

  7389. +# CONFIG_PDC202XX_BURST is not set
    7390. 

  7390. +# CONFIG_BLK_DEV_PDC202XX_NEW is not set
    7391. 

  7391. +# CONFIG_BLK_DEV_RZ1000 is not set
    7392. 

  7392. +# CONFIG_BLK_DEV_SC1200 is not set
    7393. 

  7393. +# CONFIG_BLK_DEV_SVWKS is not set
    7394. 

  7394. +# CONFIG_BLK_DEV_SIIMAGE is not set
    7395. 

  7395. +# CONFIG_BLK_DEV_SIS5513 is not set
    7396. 

  7396. +# CONFIG_BLK_DEV_SLC90E66 is not set
    7397. 

  7397. +# CONFIG_BLK_DEV_TRM290 is not set
    7398. 

  7398. +# CONFIG_BLK_DEV_VIA82CXXX is not set
    7399. 

  7399. +# CONFIG_IDE_CHIPSETS is not set
    7400. 

  7400. +CONFIG_IDEDMA_AUTO=y
    7401. 

  7401. +# CONFIG_IDEDMA_IVB is not set
    7402. 

  7402. +# CONFIG_DMA_NONPCI is not set
    7403. 

  7403. +# CONFIG_BLK_DEV_ATARAID is not set
    7404. 

  7404. +# CONFIG_BLK_DEV_ATARAID_PDC is not set
    7405. 

  7405. +# CONFIG_BLK_DEV_ATARAID_HPT is not set
    7406. 

  7406. +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
    7407. 

  7407. +# CONFIG_BLK_DEV_ATARAID_SII is not set
    7408. 

  7408.  
    7409. 

  7409.  #
    7410. 

  7410.  # SCSI support
    7411. 

  7411. @@ -319,9 +392,11 @@ CONFIG_SD_EXTRA_DEVS=40
    7412. 

  7412.  # CONFIG_SCSI_MEGARAID is not set
    7413. 

  7413.  # CONFIG_SCSI_MEGARAID2 is not set
    7414. 

  7414.  # CONFIG_SCSI_SATA is not set
    7415. 

  7415. +# CONFIG_SCSI_SATA_AHCI is not set
    7416. 

  7416.  # CONFIG_SCSI_SATA_SVW is not set
    7417. 

  7417.  # CONFIG_SCSI_ATA_PIIX is not set
    7418. 

  7418.  # CONFIG_SCSI_SATA_NV is not set
    7419. 

  7419. +# CONFIG_SCSI_SATA_QSTOR is not set
    7420. 

  7420.  # CONFIG_SCSI_SATA_PROMISE is not set
    7421. 

  7421.  # CONFIG_SCSI_SATA_SX4 is not set
    7422. 

  7422.  # CONFIG_SCSI_SATA_SIL is not set
    7423. 

  7423. @@ -524,7 +599,6 @@ CONFIG_SERIAL=y
    7424. 

  7424.  CONFIG_SERIAL_CONSOLE=y
    7425. 

  7425.  # CONFIG_SERIAL_EXTENDED is not set
    7426. 

  7426.  # CONFIG_SERIAL_NONSTANDARD is not set
    7427. 

  7427. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    7428. 

  7428.  CONFIG_UNIX98_PTYS=y
    7429. 

  7429.  CONFIG_UNIX98_PTY_COUNT=256
    7430. 

  7430.  
    7431. 

  7431. --- a/arch/mips/defconfig-mirage
    7432. 

  7432. +++ b/arch/mips/defconfig-mirage
    7433. 

  7433. @@ -30,8 +30,8 @@ CONFIG_MIPS_MIRAGE=y
    7434. 

  7434.  # CONFIG_MIPS_PB1000 is not set
    7435. 

  7435.  # CONFIG_MIPS_PB1100 is not set
    7436. 

  7436.  # CONFIG_MIPS_PB1500 is not set
    7437. 

  7437. -# CONFIG_MIPS_HYDROGEN3 is not set
    7438. 

  7438.  # CONFIG_MIPS_PB1550 is not set
    7439. 

  7439. +# CONFIG_MIPS_HYDROGEN3 is not set
    7440. 

  7440.  # CONFIG_MIPS_XXS1500 is not set
    7441. 

  7441.  # CONFIG_MIPS_MTX1 is not set
    7442. 

  7442.  # CONFIG_COGENT_CSB250 is not set
    7443. 

  7443. @@ -209,9 +209,7 @@ CONFIG_MTD_CFI_AMDSTD=y
    7444. 

  7444.  # CONFIG_MTD_BOSPORUS is not set
    7445. 

  7445.  # CONFIG_MTD_XXS1500 is not set
    7446. 

  7446.  # CONFIG_MTD_MTX1 is not set
    7447. 

  7447. -# CONFIG_MTD_DB1X00 is not set
    7448. 

  7448.  # CONFIG_MTD_PB1550 is not set
    7449. 

  7449. -# CONFIG_MTD_HYDROGEN3 is not set
    7450. 

  7450.  CONFIG_MTD_MIRAGE=y
    7451. 

  7451.  # CONFIG_MTD_CSTM_MIPS_IXX is not set
    7452. 

  7452.  # CONFIG_MTD_OCELOT is not set
    7453. 

  7453. @@ -230,7 +228,6 @@ CONFIG_MTD_MIRAGE=y
    7454. 

  7454.  #
    7455. 

  7455.  # Disk-On-Chip Device Drivers
    7456. 

  7456.  #
    7457. 

  7457. -# CONFIG_MTD_DOC1000 is not set
    7458. 

  7458.  # CONFIG_MTD_DOC2000 is not set
    7459. 

  7459.  # CONFIG_MTD_DOC2001 is not set
    7460. 

  7460.  # CONFIG_MTD_DOCPROBE is not set
    7461. 

  7461. @@ -335,11 +332,6 @@ CONFIG_IP_PNP_BOOTP=y
    7462. 

  7462.  #
    7463. 

  7463.  # CONFIG_IPX is not set
    7464. 

  7464.  # CONFIG_ATALK is not set
    7465. 

  7465. -
    7466. 

  7466. -#
    7467. 

  7467. -# Appletalk devices
    7468. 

  7468. -#
    7469. 

  7469. -# CONFIG_DEV_APPLETALK is not set
    7470. 

  7470.  # CONFIG_DECNET is not set
    7471. 

  7471.  # CONFIG_BRIDGE is not set
    7472. 

  7472.  # CONFIG_X25 is not set
    7473. 

  7473. @@ -560,7 +552,6 @@ CONFIG_AU1X00_SERIAL_CONSOLE=y
    7474. 

  7474.  # CONFIG_AU1X00_USB_TTY is not set
    7475. 

  7475.  # CONFIG_AU1X00_USB_RAW is not set
    7476. 

  7476.  # CONFIG_TXX927_SERIAL is not set
    7477. 

  7477. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    7478. 

  7478.  CONFIG_UNIX98_PTYS=y
    7479. 

  7479.  CONFIG_UNIX98_PTY_COUNT=256
    7480. 

  7480.  
    7481. 

  7481. --- a/arch/mips/defconfig-mpc30x
    7482. 

  7482. +++ b/arch/mips/defconfig-mpc30x
    7483. 

  7483. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    7484. 

  7484.  # CONFIG_MIPS_PB1000 is not set
    7485. 

  7485.  # CONFIG_MIPS_PB1100 is not set
    7486. 

  7486.  # CONFIG_MIPS_PB1500 is not set
    7487. 

  7487. -# CONFIG_MIPS_HYDROGEN3 is not set
    7488. 

  7488.  # CONFIG_MIPS_PB1550 is not set
    7489. 

  7489. +# CONFIG_MIPS_HYDROGEN3 is not set
    7490. 

  7490.  # CONFIG_MIPS_XXS1500 is not set
    7491. 

  7491.  # CONFIG_MIPS_MTX1 is not set
    7492. 

  7492.  # CONFIG_COGENT_CSB250 is not set
    7493. 

  7493. @@ -228,11 +228,6 @@ CONFIG_IP_PNP_BOOTP=y
    7494. 

  7494.  #
    7495. 

  7495.  # CONFIG_IPX is not set
    7496. 

  7496.  # CONFIG_ATALK is not set
    7497. 

  7497. -
    7498. 

  7498. -#
    7499. 

  7499. -# Appletalk devices
    7500. 

  7500. -#
    7501. 

  7501. -# CONFIG_DEV_APPLETALK is not set
    7502. 

  7502.  # CONFIG_DECNET is not set
    7503. 

  7503.  # CONFIG_BRIDGE is not set
    7504. 

  7504.  # CONFIG_X25 is not set
    7505. 

  7505. @@ -400,7 +395,6 @@ CONFIG_SERIAL=y
    7506. 

  7506.  CONFIG_SERIAL_CONSOLE=y
    7507. 

  7507.  # CONFIG_SERIAL_EXTENDED is not set
    7508. 

  7508.  # CONFIG_SERIAL_NONSTANDARD is not set
    7509. 

  7509. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    7510. 

  7510.  # CONFIG_VR41XX_KIU is not set
    7511. 

  7511.  CONFIG_UNIX98_PTYS=y
    7512. 

  7512.  CONFIG_UNIX98_PTY_COUNT=256
    7513. 

  7513. --- a/arch/mips/defconfig-mtx-1
    7514. 

  7514. +++ b/arch/mips/defconfig-mtx-1
    7515. 

  7515. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    7516. 

  7516.  # CONFIG_MIPS_PB1000 is not set
    7517. 

  7517.  # CONFIG_MIPS_PB1100 is not set
    7518. 

  7518.  # CONFIG_MIPS_PB1500 is not set
    7519. 

  7519. -# CONFIG_MIPS_HYDROGEN3 is not set
    7520. 

  7520.  # CONFIG_MIPS_PB1550 is not set
    7521. 

  7521. +# CONFIG_MIPS_HYDROGEN3 is not set
    7522. 

  7522.  # CONFIG_MIPS_XXS1500 is not set
    7523. 

  7523.  CONFIG_MIPS_MTX1=y
    7524. 

  7524.  # CONFIG_COGENT_CSB250 is not set
    7525. 

  7525. @@ -193,9 +193,7 @@ CONFIG_MTD_CFI_AMDSTD=y
    7526. 

  7526.  # CONFIG_MTD_BOSPORUS is not set
    7527. 

  7527.  # CONFIG_MTD_XXS1500 is not set
    7528. 

  7528.  CONFIG_MTD_MTX1=y
    7529. 

  7529. -# CONFIG_MTD_DB1X00 is not set
    7530. 

  7530.  # CONFIG_MTD_PB1550 is not set
    7531. 

  7531. -# CONFIG_MTD_HYDROGEN3 is not set
    7532. 

  7532.  # CONFIG_MTD_MIRAGE is not set
    7533. 

  7533.  # CONFIG_MTD_CSTM_MIPS_IXX is not set
    7534. 

  7534.  # CONFIG_MTD_OCELOT is not set
    7535. 

  7535. @@ -214,7 +212,6 @@ CONFIG_MTD_MTX1=y
    7536. 

  7536.  #
    7537. 

  7537.  # Disk-On-Chip Device Drivers
    7538. 

  7538.  #
    7539. 

  7539. -# CONFIG_MTD_DOC1000 is not set
    7540. 

  7540.  # CONFIG_MTD_DOC2000 is not set
    7541. 

  7541.  # CONFIG_MTD_DOC2001 is not set
    7542. 

  7542.  # CONFIG_MTD_DOCPROBE is not set
    7543. 

  7543. @@ -371,11 +368,6 @@ CONFIG_VLAN_8021Q=m
    7544. 

  7544.  #
    7545. 

  7545.  # CONFIG_IPX is not set
    7546. 

  7546.  # CONFIG_ATALK is not set
    7547. 

  7547. -
    7548. 

  7548. -#
    7549. 

  7549. -# Appletalk devices
    7550. 

  7550. -#
    7551. 

  7551. -# CONFIG_DEV_APPLETALK is not set
    7552. 

  7552.  # CONFIG_DECNET is not set
    7553. 

  7553.  CONFIG_BRIDGE=m
    7554. 

  7554.  # CONFIG_X25 is not set
    7555. 

  7555. @@ -479,9 +471,11 @@ CONFIG_SR_EXTRA_DEVS=2
    7556. 

  7556.  # CONFIG_SCSI_MEGARAID is not set
    7557. 

  7557.  # CONFIG_SCSI_MEGARAID2 is not set
    7558. 

  7558.  # CONFIG_SCSI_SATA is not set
    7559. 

  7559. +# CONFIG_SCSI_SATA_AHCI is not set
    7560. 

  7560.  # CONFIG_SCSI_SATA_SVW is not set
    7561. 

  7561.  # CONFIG_SCSI_ATA_PIIX is not set
    7562. 

  7562.  # CONFIG_SCSI_SATA_NV is not set
    7563. 

  7563. +# CONFIG_SCSI_SATA_QSTOR is not set
    7564. 

  7564.  # CONFIG_SCSI_SATA_PROMISE is not set
    7565. 

  7565.  # CONFIG_SCSI_SATA_SX4 is not set
    7566. 

  7566.  # CONFIG_SCSI_SATA_SIL is not set
    7567. 

  7567. @@ -700,7 +694,6 @@ CONFIG_AU1X00_SERIAL_CONSOLE=y
    7568. 

  7568.  # CONFIG_AU1X00_USB_TTY is not set
    7569. 

  7569.  # CONFIG_AU1X00_USB_RAW is not set
    7570. 

  7570.  # CONFIG_TXX927_SERIAL is not set
    7571. 

  7571. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    7572. 

  7572.  CONFIG_UNIX98_PTYS=y
    7573. 

  7573.  CONFIG_UNIX98_PTY_COUNT=256
    7574. 

  7574.  
    7575. 

  7575. --- a/arch/mips/defconfig-nino
    7576. 

  7576. +++ b/arch/mips/defconfig-nino
    7577. 

  7577. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    7578. 

  7578.  # CONFIG_MIPS_PB1000 is not set
    7579. 

  7579.  # CONFIG_MIPS_PB1100 is not set
    7580. 

  7580.  # CONFIG_MIPS_PB1500 is not set
    7581. 

  7581. -# CONFIG_MIPS_HYDROGEN3 is not set
    7582. 

  7582.  # CONFIG_MIPS_PB1550 is not set
    7583. 

  7583. +# CONFIG_MIPS_HYDROGEN3 is not set
    7584. 

  7584.  # CONFIG_MIPS_XXS1500 is not set
    7585. 

  7585.  # CONFIG_MIPS_MTX1 is not set
    7586. 

  7586.  # CONFIG_COGENT_CSB250 is not set
    7587. 

  7587. @@ -226,11 +226,6 @@ CONFIG_INET=y
    7588. 

  7588.  #
    7589. 

  7589.  # CONFIG_IPX is not set
    7590. 

  7590.  # CONFIG_ATALK is not set
    7591. 

  7591. -
    7592. 

  7592. -#
    7593. 

  7593. -# Appletalk devices
    7594. 

  7594. -#
    7595. 

  7595. -# CONFIG_DEV_APPLETALK is not set
    7596. 

  7596.  # CONFIG_DECNET is not set
    7597. 

  7597.  # CONFIG_BRIDGE is not set
    7598. 

  7598.  # CONFIG_X25 is not set
    7599. 

  7599. @@ -339,7 +334,6 @@ CONFIG_SERIAL_TX3912_CONSOLE=y
    7600. 

  7600.  # CONFIG_SERIAL_TXX9 is not set
    7601. 

  7601.  # CONFIG_SERIAL_TXX9_CONSOLE is not set
    7602. 

  7602.  # CONFIG_TXX927_SERIAL is not set
    7603. 

  7603. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    7604. 

  7604.  # CONFIG_UNIX98_PTYS is not set
    7605. 

  7605.  
    7606. 

  7606.  #
    7607. 

  7607. --- a/arch/mips/defconfig-ocelot
    7608. 

  7608. +++ b/arch/mips/defconfig-ocelot
    7609. 

  7609. @@ -28,8 +28,8 @@ CONFIG_EXPERIMENTAL=y
    7610. 

  7610.  # CONFIG_MIPS_PB1000 is not set
    7611. 

  7611.  # CONFIG_MIPS_PB1100 is not set
    7612. 

  7612.  # CONFIG_MIPS_PB1500 is not set
    7613. 

  7613. -# CONFIG_MIPS_HYDROGEN3 is not set
    7614. 

  7614.  # CONFIG_MIPS_PB1550 is not set
    7615. 

  7615. +# CONFIG_MIPS_HYDROGEN3 is not set
    7616. 

  7616.  # CONFIG_MIPS_XXS1500 is not set
    7617. 

  7617.  # CONFIG_MIPS_MTX1 is not set
    7618. 

  7618.  # CONFIG_COGENT_CSB250 is not set
    7619. 

  7619. @@ -194,9 +194,7 @@ CONFIG_MTD_JEDEC=y
    7620. 

  7620.  # CONFIG_MTD_BOSPORUS is not set
    7621. 

  7621.  # CONFIG_MTD_XXS1500 is not set
    7622. 

  7622.  # CONFIG_MTD_MTX1 is not set
    7623. 

  7623. -# CONFIG_MTD_DB1X00 is not set
    7624. 

  7624.  # CONFIG_MTD_PB1550 is not set
    7625. 

  7625. -# CONFIG_MTD_HYDROGEN3 is not set
    7626. 

  7626.  # CONFIG_MTD_MIRAGE is not set
    7627. 

  7627.  # CONFIG_MTD_CSTM_MIPS_IXX is not set
    7628. 

  7628.  CONFIG_MTD_OCELOT=y
    7629. 

  7629. @@ -215,7 +213,6 @@ CONFIG_MTD_OCELOT=y
    7630. 

  7630.  #
    7631. 

  7631.  # Disk-On-Chip Device Drivers
    7632. 

  7632.  #
    7633. 

  7633. -# CONFIG_MTD_DOC1000 is not set
    7634. 

  7634.  CONFIG_MTD_DOC2000=y
    7635. 

  7635.  # CONFIG_MTD_DOC2001 is not set
    7636. 

  7636.  CONFIG_MTD_DOCPROBE=y
    7637. 

  7637. @@ -307,11 +304,6 @@ CONFIG_IP_PNP_BOOTP=y
    7638. 

  7638.  #
    7639. 

  7639.  # CONFIG_IPX is not set
    7640. 

  7640.  # CONFIG_ATALK is not set
    7641. 

  7641. -
    7642. 

  7642. -#
    7643. 

  7643. -# Appletalk devices
    7644. 

  7644. -#
    7645. 

  7645. -# CONFIG_DEV_APPLETALK is not set
    7646. 

  7646.  # CONFIG_DECNET is not set
    7647. 

  7647.  # CONFIG_BRIDGE is not set
    7648. 

  7648.  # CONFIG_X25 is not set
    7649. 

  7649. @@ -513,7 +505,6 @@ CONFIG_SERIAL=y
    7650. 

  7650.  CONFIG_SERIAL_CONSOLE=y
    7651. 

  7651.  # CONFIG_SERIAL_EXTENDED is not set
    7652. 

  7652.  # CONFIG_SERIAL_NONSTANDARD is not set
    7653. 

  7653. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    7654. 

  7654.  CONFIG_UNIX98_PTYS=y
    7655. 

  7655.  CONFIG_UNIX98_PTY_COUNT=256
    7656. 

  7656.  
    7657. 

  7657. --- a/arch/mips/defconfig-osprey
    7658. 

  7658. +++ b/arch/mips/defconfig-osprey
    7659. 

  7659. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    7660. 

  7660.  # CONFIG_MIPS_PB1000 is not set
    7661. 

  7661.  # CONFIG_MIPS_PB1100 is not set
    7662. 

  7662.  # CONFIG_MIPS_PB1500 is not set
    7663. 

  7663. -# CONFIG_MIPS_HYDROGEN3 is not set
    7664. 

  7664.  # CONFIG_MIPS_PB1550 is not set
    7665. 

  7665. +# CONFIG_MIPS_HYDROGEN3 is not set
    7666. 

  7666.  # CONFIG_MIPS_XXS1500 is not set
    7667. 

  7667.  # CONFIG_MIPS_MTX1 is not set
    7668. 

  7668.  # CONFIG_COGENT_CSB250 is not set
    7669. 

  7669. @@ -227,11 +227,6 @@ CONFIG_IP_PNP_BOOTP=y
    7670. 

  7670.  #
    7671. 

  7671.  # CONFIG_IPX is not set
    7672. 

  7672.  # CONFIG_ATALK is not set
    7673. 

  7673. -
    7674. 

  7674. -#
    7675. 

  7675. -# Appletalk devices
    7676. 

  7676. -#
    7677. 

  7677. -# CONFIG_DEV_APPLETALK is not set
    7678. 

  7678.  # CONFIG_DECNET is not set
    7679. 

  7679.  # CONFIG_BRIDGE is not set
    7680. 

  7680.  # CONFIG_X25 is not set
    7681. 

  7681. @@ -388,7 +383,6 @@ CONFIG_SERIAL_MANY_PORTS=y
    7682. 

  7682.  # CONFIG_SERIAL_MULTIPORT is not set
    7683. 

  7683.  # CONFIG_HUB6 is not set
    7684. 

  7684.  # CONFIG_SERIAL_NONSTANDARD is not set
    7685. 

  7685. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    7686. 

  7686.  # CONFIG_VR41XX_KIU is not set
    7687. 

  7687.  CONFIG_UNIX98_PTYS=y
    7688. 

  7688.  CONFIG_UNIX98_PTY_COUNT=256
    7689. 

  7689. --- a/arch/mips/defconfig-pb1000
    7690. 

  7690. +++ b/arch/mips/defconfig-pb1000
    7691. 

  7691. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    7692. 

  7692.  CONFIG_MIPS_PB1000=y
    7693. 

  7693.  # CONFIG_MIPS_PB1100 is not set
    7694. 

  7694.  # CONFIG_MIPS_PB1500 is not set
    7695. 

  7695. -# CONFIG_MIPS_HYDROGEN3 is not set
    7696. 

  7696.  # CONFIG_MIPS_PB1550 is not set
    7697. 

  7697. +# CONFIG_MIPS_HYDROGEN3 is not set
    7698. 

  7698.  # CONFIG_MIPS_XXS1500 is not set
    7699. 

  7699.  # CONFIG_MIPS_MTX1 is not set
    7700. 

  7700.  # CONFIG_COGENT_CSB250 is not set
    7701. 

  7701. @@ -215,9 +215,7 @@ CONFIG_MTD_PB1000=y
    7702. 

  7702.  # CONFIG_MTD_BOSPORUS is not set
    7703. 

  7703.  # CONFIG_MTD_XXS1500 is not set
    7704. 

  7704.  # CONFIG_MTD_MTX1 is not set
    7705. 

  7705. -# CONFIG_MTD_DB1X00 is not set
    7706. 

  7706.  # CONFIG_MTD_PB1550 is not set
    7707. 

  7707. -# CONFIG_MTD_HYDROGEN3 is not set
    7708. 

  7708.  # CONFIG_MTD_MIRAGE is not set
    7709. 

  7709.  # CONFIG_MTD_CSTM_MIPS_IXX is not set
    7710. 

  7710.  # CONFIG_MTD_OCELOT is not set
    7711. 

  7711. @@ -236,7 +234,6 @@ CONFIG_MTD_PB1000=y
    7712. 

  7712.  #
    7713. 

  7713.  # Disk-On-Chip Device Drivers
    7714. 

  7714.  #
    7715. 

  7715. -# CONFIG_MTD_DOC1000 is not set
    7716. 

  7716.  # CONFIG_MTD_DOC2000 is not set
    7717. 

  7717.  # CONFIG_MTD_DOC2001 is not set
    7718. 

  7718.  # CONFIG_MTD_DOCPROBE is not set
    7719. 

  7719. @@ -324,11 +321,6 @@ CONFIG_IP_PNP_BOOTP=y
    7720. 

  7720.  #
    7721. 

  7721.  # CONFIG_IPX is not set
    7722. 

  7722.  # CONFIG_ATALK is not set
    7723. 

  7723. -
    7724. 

  7724. -#
    7725. 

  7725. -# Appletalk devices
    7726. 

  7726. -#
    7727. 

  7727. -# CONFIG_DEV_APPLETALK is not set
    7728. 

  7728.  # CONFIG_DECNET is not set
    7729. 

  7729.  # CONFIG_BRIDGE is not set
    7730. 

  7730.  # CONFIG_X25 is not set
    7731. 

  7731. @@ -622,7 +614,6 @@ CONFIG_AU1X00_SERIAL_CONSOLE=y
    7732. 

  7732.  # CONFIG_AU1X00_USB_TTY is not set
    7733. 

  7733.  # CONFIG_AU1X00_USB_RAW is not set
    7734. 

  7734.  # CONFIG_TXX927_SERIAL is not set
    7735. 

  7735. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    7736. 

  7736.  CONFIG_UNIX98_PTYS=y
    7737. 

  7737.  CONFIG_UNIX98_PTY_COUNT=256
    7738. 

  7738.  
    7739. 

  7739. @@ -707,7 +698,7 @@ CONFIG_UNIX98_PTY_COUNT=256
    7740. 

  7740.  #
    7741. 

  7741.  # CONFIG_PCMCIA_SERIAL_CS is not set
    7742. 

  7742.  # CONFIG_SYNCLINK_CS is not set
    7743. 

  7743. -CONFIG_AU1X00_GPIO=m
    7744. 

  7744. +CONFIG_AU1X00_GPIO=y
    7745. 

  7745.  # CONFIG_TS_AU1X00_ADS7846 is not set
    7746. 

  7746.  
    7747. 

  7747.  #
    7748. 

  7748. --- a/arch/mips/defconfig-pb1100
    7749. 

  7749. +++ b/arch/mips/defconfig-pb1100
    7750. 

  7750. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    7751. 

  7751.  # CONFIG_MIPS_PB1000 is not set
    7752. 

  7752.  CONFIG_MIPS_PB1100=y
    7753. 

  7753.  # CONFIG_MIPS_PB1500 is not set
    7754. 

  7754. -# CONFIG_MIPS_HYDROGEN3 is not set
    7755. 

  7755.  # CONFIG_MIPS_PB1550 is not set
    7756. 

  7756. +# CONFIG_MIPS_HYDROGEN3 is not set
    7757. 

  7757.  # CONFIG_MIPS_XXS1500 is not set
    7758. 

  7758.  # CONFIG_MIPS_MTX1 is not set
    7759. 

  7759.  # CONFIG_COGENT_CSB250 is not set
    7760. 

  7760. @@ -198,9 +198,7 @@ CONFIG_MTD_PB1100=y
    7761. 

  7761.  # CONFIG_MTD_MTX1 is not set
    7762. 

  7762.  CONFIG_MTD_PB1500_BOOT=y
    7763. 

  7763.  CONFIG_MTD_PB1500_USER=y
    7764. 

  7764. -# CONFIG_MTD_DB1X00 is not set
    7765. 

  7765.  # CONFIG_MTD_PB1550 is not set
    7766. 

  7766. -# CONFIG_MTD_HYDROGEN3 is not set
    7767. 

  7767.  # CONFIG_MTD_MIRAGE is not set
    7768. 

  7768.  # CONFIG_MTD_CSTM_MIPS_IXX is not set
    7769. 

  7769.  # CONFIG_MTD_OCELOT is not set
    7770. 

  7770. @@ -219,7 +217,6 @@ CONFIG_MTD_PB1500_USER=y
    7771. 

  7771.  #
    7772. 

  7772.  # Disk-On-Chip Device Drivers
    7773. 

  7773.  #
    7774. 

  7774. -# CONFIG_MTD_DOC1000 is not set
    7775. 

  7775.  # CONFIG_MTD_DOC2000 is not set
    7776. 

  7776.  # CONFIG_MTD_DOC2001 is not set
    7777. 

  7777.  # CONFIG_MTD_DOCPROBE is not set
    7778. 

  7778. @@ -324,11 +321,6 @@ CONFIG_IP_PNP_BOOTP=y
    7779. 

  7779.  #
    7780. 

  7780.  # CONFIG_IPX is not set
    7781. 

  7781.  # CONFIG_ATALK is not set
    7782. 

  7782. -
    7783. 

  7783. -#
    7784. 

  7784. -# Appletalk devices
    7785. 

  7785. -#
    7786. 

  7786. -# CONFIG_DEV_APPLETALK is not set
    7787. 

  7787.  # CONFIG_DECNET is not set
    7788. 

  7788.  # CONFIG_BRIDGE is not set
    7789. 

  7789.  # CONFIG_X25 is not set
    7790. 

  7790. @@ -613,7 +605,6 @@ CONFIG_AU1X00_SERIAL_CONSOLE=y
    7791. 

  7791.  # CONFIG_AU1X00_USB_TTY is not set
    7792. 

  7792.  # CONFIG_AU1X00_USB_RAW is not set
    7793. 

  7793.  # CONFIG_TXX927_SERIAL is not set
    7794. 

  7794. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    7795. 

  7795.  CONFIG_UNIX98_PTYS=y
    7796. 

  7796.  CONFIG_UNIX98_PTY_COUNT=256
    7797. 

  7797.  
    7798. 

  7798. @@ -859,6 +850,7 @@ CONFIG_DUMMY_CONSOLE=y
    7799. 

  7799.  # CONFIG_FB_PM2 is not set
    7800. 

  7800.  # CONFIG_FB_PM3 is not set
    7801. 

  7801.  # CONFIG_FB_CYBER2000 is not set
    7802. 

  7802. +CONFIG_FB_AU1100=y
    7803. 

  7803.  # CONFIG_FB_MATROX is not set
    7804. 

  7804.  # CONFIG_FB_ATY is not set
    7805. 

  7805.  # CONFIG_FB_RADEON is not set
    7806. 

  7806. @@ -870,7 +862,6 @@ CONFIG_DUMMY_CONSOLE=y
    7807. 

  7807.  # CONFIG_FB_VOODOO1 is not set
    7808. 

  7808.  # CONFIG_FB_TRIDENT is not set
    7809. 

  7809.  # CONFIG_FB_E1356 is not set
    7810. 

  7810. -CONFIG_FB_AU1100=y
    7811. 

  7811.  # CONFIG_FB_IT8181 is not set
    7812. 

  7812.  # CONFIG_FB_VIRTUAL is not set
    7813. 

  7813.  CONFIG_FBCON_ADVANCED=y
    7814. 

  7814. --- /dev/null
    7815. 

  7815. +++ b/arch/mips/defconfig-pb1200
    7816. 

  7816. @@ -0,0 +1,1060 @@
    7817. 

  7817. +#
    7818. 

  7818. +# Automatically generated make config: don't edit
    7819. 

  7819. +#
    7820. 

  7820. +CONFIG_MIPS=y
    7821. 

  7821. +CONFIG_MIPS32=y
    7822. 

  7822. +# CONFIG_MIPS64 is not set
    7823. 

  7823. +
    7824. 

  7824. +#
    7825. 

  7825. +# Code maturity level options
    7826. 

  7826. +#
    7827. 

  7827. +CONFIG_EXPERIMENTAL=y
    7828. 

  7828. +
    7829. 

  7829. +#
    7830. 

  7830. +# Loadable module support
    7831. 

  7831. +#
    7832. 

  7832. +CONFIG_MODULES=y
    7833. 

  7833. +# CONFIG_MODVERSIONS is not set
    7834. 

  7834. +CONFIG_KMOD=y
    7835. 

  7835. +
    7836. 

  7836. +#
    7837. 

  7837. +# Machine selection
    7838. 

  7838. +#
    7839. 

  7839. +# CONFIG_ACER_PICA_61 is not set
    7840. 

  7840. +# CONFIG_MIPS_BOSPORUS is not set
    7841. 

  7841. +# CONFIG_MIPS_MIRAGE is not set
    7842. 

  7842. +# CONFIG_MIPS_DB1000 is not set
    7843. 

  7843. +# CONFIG_MIPS_DB1100 is not set
    7844. 

  7844. +# CONFIG_MIPS_DB1500 is not set
    7845. 

  7845. +# CONFIG_MIPS_DB1550 is not set
    7846. 

  7846. +# CONFIG_MIPS_PB1000 is not set
    7847. 

  7847. +# CONFIG_MIPS_PB1100 is not set
    7848. 

  7848. +# CONFIG_MIPS_PB1500 is not set
    7849. 

  7849. +# CONFIG_MIPS_PB1550 is not set
    7850. 

  7850. +# CONFIG_MIPS_HYDROGEN3 is not set
    7851. 

  7851. +# CONFIG_MIPS_XXS1500 is not set
    7852. 

  7852. +# CONFIG_MIPS_MTX1 is not set
    7853. 

  7853. +# CONFIG_COGENT_CSB250 is not set
    7854. 

  7854. +# CONFIG_BAGET_MIPS is not set
    7855. 

  7855. +# CONFIG_CASIO_E55 is not set
    7856. 

  7856. +# CONFIG_MIPS_COBALT is not set
    7857. 

  7857. +# CONFIG_DECSTATION is not set
    7858. 

  7858. +# CONFIG_MIPS_EV64120 is not set
    7859. 

  7859. +# CONFIG_MIPS_EV96100 is not set
    7860. 

  7860. +# CONFIG_MIPS_IVR is not set
    7861. 

  7861. +# CONFIG_HP_LASERJET is not set
    7862. 

  7862. +# CONFIG_IBM_WORKPAD is not set
    7863. 

  7863. +# CONFIG_LASAT is not set
    7864. 

  7864. +# CONFIG_MIPS_ITE8172 is not set
    7865. 

  7865. +# CONFIG_MIPS_ATLAS is not set
    7866. 

  7866. +# CONFIG_MIPS_MAGNUM_4000 is not set
    7867. 

  7867. +# CONFIG_MIPS_MALTA is not set
    7868. 

  7868. +# CONFIG_MIPS_SEAD is not set
    7869. 

  7869. +# CONFIG_MOMENCO_OCELOT is not set
    7870. 

  7870. +# CONFIG_MOMENCO_OCELOT_G is not set
    7871. 

  7871. +# CONFIG_MOMENCO_OCELOT_C is not set
    7872. 

  7872. +# CONFIG_MOMENCO_JAGUAR_ATX is not set
    7873. 

  7873. +# CONFIG_PMC_BIG_SUR is not set
    7874. 

  7874. +# CONFIG_PMC_STRETCH is not set
    7875. 

  7875. +# CONFIG_PMC_YOSEMITE is not set
    7876. 

  7876. +# CONFIG_DDB5074 is not set
    7877. 

  7877. +# CONFIG_DDB5476 is not set
    7878. 

  7878. +# CONFIG_DDB5477 is not set
    7879. 

  7879. +# CONFIG_NEC_OSPREY is not set
    7880. 

  7880. +# CONFIG_NEC_EAGLE is not set
    7881. 

  7881. +# CONFIG_OLIVETTI_M700 is not set
    7882. 

  7882. +# CONFIG_NINO is not set
    7883. 

  7883. +# CONFIG_SGI_IP22 is not set
    7884. 

  7884. +# CONFIG_SGI_IP27 is not set
    7885. 

  7885. +# CONFIG_SIBYTE_SB1xxx_SOC is not set
    7886. 

  7886. +# CONFIG_SNI_RM200_PCI is not set
    7887. 

  7887. +# CONFIG_TANBAC_TB0226 is not set
    7888. 

  7888. +# CONFIG_TANBAC_TB0229 is not set
    7889. 

  7889. +# CONFIG_TOSHIBA_JMR3927 is not set
    7890. 

  7890. +# CONFIG_TOSHIBA_RBTX4927 is not set
    7891. 

  7891. +# CONFIG_VICTOR_MPC30X is not set
    7892. 

  7892. +# CONFIG_ZAO_CAPCELLA is not set
    7893. 

  7893. +# CONFIG_HIGHMEM is not set
    7894. 

  7894. +CONFIG_RWSEM_GENERIC_SPINLOCK=y
    7895. 

  7895. +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
    7896. 

  7896. +CONFIG_SOC_AU1X00=y
    7897. 

  7897. +CONFIG_SOC_AU1200=y
    7898. 

  7898. +CONFIG_NONCOHERENT_IO=y
    7899. 

  7899. +CONFIG_PC_KEYB=y
    7900. 

  7900. +# CONFIG_MIPS_AU1000 is not set
    7901. 

  7901. +
    7902. 

  7902. +#
    7903. 

  7903. +# CPU selection
    7904. 

  7904. +#
    7905. 

  7905. +CONFIG_CPU_MIPS32=y
    7906. 

  7906. +# CONFIG_CPU_MIPS64 is not set
    7907. 

  7907. +# CONFIG_CPU_R3000 is not set
    7908. 

  7908. +# CONFIG_CPU_TX39XX is not set
    7909. 

  7909. +# CONFIG_CPU_VR41XX is not set
    7910. 

  7910. +# CONFIG_CPU_R4300 is not set
    7911. 

  7911. +# CONFIG_CPU_R4X00 is not set
    7912. 

  7912. +# CONFIG_CPU_TX49XX is not set
    7913. 

  7913. +# CONFIG_CPU_R5000 is not set
    7914. 

  7914. +# CONFIG_CPU_R5432 is not set
    7915. 

  7915. +# CONFIG_CPU_R6000 is not set
    7916. 

  7916. +# CONFIG_CPU_NEVADA is not set
    7917. 

  7917. +# CONFIG_CPU_R8000 is not set
    7918. 

  7918. +# CONFIG_CPU_R10000 is not set
    7919. 

  7919. +# CONFIG_CPU_RM7000 is not set
    7920. 

  7920. +# CONFIG_CPU_RM9000 is not set
    7921. 

  7921. +# CONFIG_CPU_SB1 is not set
    7922. 

  7922. +CONFIG_PAGE_SIZE_4KB=y
    7923. 

  7923. +# CONFIG_PAGE_SIZE_16KB is not set
    7924. 

  7924. +# CONFIG_PAGE_SIZE_64KB is not set
    7925. 

  7925. +CONFIG_CPU_HAS_PREFETCH=y
    7926. 

  7926. +# CONFIG_VTAG_ICACHE is not set
    7927. 

  7927. +CONFIG_64BIT_PHYS_ADDR=y
    7928. 

  7928. +# CONFIG_CPU_ADVANCED is not set
    7929. 

  7929. +CONFIG_CPU_HAS_LLSC=y
    7930. 

  7930. +# CONFIG_CPU_HAS_LLDSCD is not set
    7931. 

  7931. +# CONFIG_CPU_HAS_WB is not set
    7932. 

  7932. +CONFIG_CPU_HAS_SYNC=y
    7933. 

  7933. +
    7934. 

  7934. +#
    7935. 

  7935. +# General setup
    7936. 

  7936. +#
    7937. 

  7937. +CONFIG_CPU_LITTLE_ENDIAN=y
    7938. 

  7938. +# CONFIG_BUILD_ELF64 is not set
    7939. 

  7939. +CONFIG_NET=y
    7940. 

  7940. +CONFIG_PCI=y
    7941. 

  7941. +CONFIG_PCI_NEW=y
    7942. 

  7942. +CONFIG_PCI_AUTO=y
    7943. 

  7943. +# CONFIG_PCI_NAMES is not set
    7944. 

  7944. +# CONFIG_ISA is not set
    7945. 

  7945. +# CONFIG_TC is not set
    7946. 

  7946. +# CONFIG_MCA is not set
    7947. 

  7947. +# CONFIG_SBUS is not set
    7948. 

  7948. +CONFIG_HOTPLUG=y
    7949. 

  7949. +
    7950. 

  7950. +#
    7951. 

  7951. +# PCMCIA/CardBus support
    7952. 

  7952. +#
    7953. 

  7953. +CONFIG_PCMCIA=m
    7954. 

  7954. +# CONFIG_CARDBUS is not set
    7955. 

  7955. +# CONFIG_TCIC is not set
    7956. 

  7956. +# CONFIG_I82092 is not set
    7957. 

  7957. +# CONFIG_I82365 is not set
    7958. 

  7958. +CONFIG_PCMCIA_AU1X00=m
    7959. 

  7959. +
    7960. 

  7960. +#
    7961. 

  7961. +# PCI Hotplug Support
    7962. 

  7962. +#
    7963. 

  7963. +# CONFIG_HOTPLUG_PCI is not set
    7964. 

  7964. +# CONFIG_HOTPLUG_PCI_COMPAQ is not set
    7965. 

  7965. +# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
    7966. 

  7966. +# CONFIG_HOTPLUG_PCI_SHPC is not set
    7967. 

  7967. +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set
    7968. 

  7968. +# CONFIG_HOTPLUG_PCI_PCIE is not set
    7969. 

  7969. +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set
    7970. 

  7970. +CONFIG_SYSVIPC=y
    7971. 

  7971. +# CONFIG_BSD_PROCESS_ACCT is not set
    7972. 

  7972. +CONFIG_SYSCTL=y
    7973. 

  7973. +CONFIG_KCORE_ELF=y
    7974. 

  7974. +# CONFIG_KCORE_AOUT is not set
    7975. 

  7975. +# CONFIG_BINFMT_AOUT is not set
    7976. 

  7976. +CONFIG_BINFMT_ELF=y
    7977. 

  7977. +# CONFIG_MIPS32_COMPAT is not set
    7978. 

  7978. +# CONFIG_MIPS32_O32 is not set
    7979. 

  7979. +# CONFIG_MIPS32_N32 is not set
    7980. 

  7980. +# CONFIG_BINFMT_ELF32 is not set
    7981. 

  7981. +# CONFIG_BINFMT_MISC is not set
    7982. 

  7982. +# CONFIG_OOM_KILLER is not set
    7983. 

  7983. +CONFIG_CMDLINE_BOOL=y
    7984. 

  7984. +CONFIG_CMDLINE="mem=96M"
    7985. 

  7985. +# CONFIG_PM is not set
    7986. 

  7986. +
    7987. 

  7987. +#
    7988. 

  7988. +# Memory Technology Devices (MTD)
    7989. 

  7989. +#
    7990. 

  7990. +# CONFIG_MTD is not set
    7991. 

  7991. +
    7992. 

  7992. +#
    7993. 

  7993. +# Parallel port support
    7994. 

  7994. +#
    7995. 

  7995. +# CONFIG_PARPORT is not set
    7996. 

  7996. +
    7997. 

  7997. +#
    7998. 

  7998. +# Plug and Play configuration
    7999. 

  7999. +#
    8000. 

  8000. +# CONFIG_PNP is not set
    8001. 

  8001. +# CONFIG_ISAPNP is not set
    8002. 

  8002. +
    8003. 

  8003. +#
    8004. 

  8004. +# Block devices
    8005. 

  8005. +#
    8006. 

  8006. +# CONFIG_BLK_DEV_FD is not set
    8007. 

  8007. +# CONFIG_BLK_DEV_XD is not set
    8008. 

  8008. +# CONFIG_PARIDE is not set
    8009. 

  8009. +# CONFIG_BLK_CPQ_DA is not set
    8010. 

  8010. +# CONFIG_BLK_CPQ_CISS_DA is not set
    8011. 

  8011. +# CONFIG_CISS_SCSI_TAPE is not set
    8012. 

  8012. +# CONFIG_CISS_MONITOR_THREAD is not set
    8013. 

  8013. +# CONFIG_BLK_DEV_DAC960 is not set
    8014. 

  8014. +# CONFIG_BLK_DEV_UMEM is not set
    8015. 

  8015. +# CONFIG_BLK_DEV_SX8 is not set
    8016. 

  8016. +CONFIG_BLK_DEV_LOOP=y
    8017. 

  8017. +# CONFIG_BLK_DEV_NBD is not set
    8018. 

  8018. +# CONFIG_BLK_DEV_RAM is not set
    8019. 

  8019. +# CONFIG_BLK_DEV_INITRD is not set
    8020. 

  8020. +# CONFIG_BLK_STATS is not set
    8021. 

  8021. +
    8022. 

  8022. +#
    8023. 

  8023. +# Multi-device support (RAID and LVM)
    8024. 

  8024. +#
    8025. 

  8025. +# CONFIG_MD is not set
    8026. 

  8026. +# CONFIG_BLK_DEV_MD is not set
    8027. 

  8027. +# CONFIG_MD_LINEAR is not set
    8028. 

  8028. +# CONFIG_MD_RAID0 is not set
    8029. 

  8029. +# CONFIG_MD_RAID1 is not set
    8030. 

  8030. +# CONFIG_MD_RAID5 is not set
    8031. 

  8031. +# CONFIG_MD_MULTIPATH is not set
    8032. 

  8032. +# CONFIG_BLK_DEV_LVM is not set
    8033. 

  8033. +
    8034. 

  8034. +#
    8035. 

  8035. +# Networking options
    8036. 

  8036. +#
    8037. 

  8037. +CONFIG_PACKET=y
    8038. 

  8038. +# CONFIG_PACKET_MMAP is not set
    8039. 

  8039. +# CONFIG_NETLINK_DEV is not set
    8040. 

  8040. +CONFIG_NETFILTER=y
    8041. 

  8041. +# CONFIG_NETFILTER_DEBUG is not set
    8042. 

  8042. +CONFIG_FILTER=y
    8043. 

  8043. +CONFIG_UNIX=y
    8044. 

  8044. +CONFIG_INET=y
    8045. 

  8045. +CONFIG_IP_MULTICAST=y
    8046. 

  8046. +# CONFIG_IP_ADVANCED_ROUTER is not set
    8047. 

  8047. +CONFIG_IP_PNP=y
    8048. 

  8048. +# CONFIG_IP_PNP_DHCP is not set
    8049. 

  8049. +CONFIG_IP_PNP_BOOTP=y
    8050. 

  8050. +# CONFIG_IP_PNP_RARP is not set
    8051. 

  8051. +# CONFIG_NET_IPIP is not set
    8052. 

  8052. +# CONFIG_NET_IPGRE is not set
    8053. 

  8053. +# CONFIG_IP_MROUTE is not set
    8054. 

  8054. +# CONFIG_ARPD is not set
    8055. 

  8055. +# CONFIG_INET_ECN is not set
    8056. 

  8056. +# CONFIG_SYN_COOKIES is not set
    8057. 

  8057. +
    8058. 

  8058. +#
    8059. 

  8059. +#   IP: Netfilter Configuration
    8060. 

  8060. +#
    8061. 

  8061. +# CONFIG_IP_NF_CONNTRACK is not set
    8062. 

  8062. +# CONFIG_IP_NF_QUEUE is not set
    8063. 

  8063. +# CONFIG_IP_NF_IPTABLES is not set
    8064. 

  8064. +# CONFIG_IP_NF_ARPTABLES is not set
    8065. 

  8065. +# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
    8066. 

  8066. +# CONFIG_IP_NF_COMPAT_IPFWADM is not set
    8067. 

  8067. +
    8068. 

  8068. +#
    8069. 

  8069. +#   IP: Virtual Server Configuration
    8070. 

  8070. +#
    8071. 

  8071. +# CONFIG_IP_VS is not set
    8072. 

  8072. +# CONFIG_IPV6 is not set
    8073. 

  8073. +# CONFIG_KHTTPD is not set
    8074. 

  8074. +
    8075. 

  8075. +#
    8076. 

  8076. +#    SCTP Configuration (EXPERIMENTAL)
    8077. 

  8077. +#
    8078. 

  8078. +# CONFIG_IP_SCTP is not set
    8079. 

  8079. +# CONFIG_ATM is not set
    8080. 

  8080. +# CONFIG_VLAN_8021Q is not set
    8081. 

  8081. +
    8082. 

  8082. +#
    8083. 

  8083. +#  
    8084. 

  8084. +#
    8085. 

  8085. +# CONFIG_IPX is not set
    8086. 

  8086. +# CONFIG_ATALK is not set
    8087. 

  8087. +# CONFIG_DECNET is not set
    8088. 

  8088. +# CONFIG_BRIDGE is not set
    8089. 

  8089. +# CONFIG_X25 is not set
    8090. 

  8090. +# CONFIG_LAPB is not set
    8091. 

  8091. +# CONFIG_LLC is not set
    8092. 

  8092. +# CONFIG_NET_DIVERT is not set
    8093. 

  8093. +# CONFIG_ECONET is not set
    8094. 

  8094. +# CONFIG_WAN_ROUTER is not set
    8095. 

  8095. +# CONFIG_NET_FASTROUTE is not set
    8096. 

  8096. +# CONFIG_NET_HW_FLOWCONTROL is not set
    8097. 

  8097. +
    8098. 

  8098. +#
    8099. 

  8099. +# QoS and/or fair queueing
    8100. 

  8100. +#
    8101. 

  8101. +# CONFIG_NET_SCHED is not set
    8102. 

  8102. +
    8103. 

  8103. +#
    8104. 

  8104. +# Network testing
    8105. 

  8105. +#
    8106. 

  8106. +# CONFIG_NET_PKTGEN is not set
    8107. 

  8107. +
    8108. 

  8108. +#
    8109. 

  8109. +# Telephony Support
    8110. 

  8110. +#
    8111. 

  8111. +# CONFIG_PHONE is not set
    8112. 

  8112. +# CONFIG_PHONE_IXJ is not set
    8113. 

  8113. +# CONFIG_PHONE_IXJ_PCMCIA is not set
    8114. 

  8114. +
    8115. 

  8115. +#
    8116. 

  8116. +# ATA/IDE/MFM/RLL support
    8117. 

  8117. +#
    8118. 

  8118. +CONFIG_IDE=y
    8119. 

  8119. +
    8120. 

  8120. +#
    8121. 

  8121. +# IDE, ATA and ATAPI Block devices
    8122. 

  8122. +#
    8123. 

  8123. +CONFIG_BLK_DEV_IDE=y
    8124. 

  8124. +
    8125. 

  8125. +#
    8126. 

  8126. +# Please see Documentation/ide.txt for help/info on IDE drives
    8127. 

  8127. +#
    8128. 

  8128. +# CONFIG_BLK_DEV_HD_IDE is not set
    8129. 

  8129. +# CONFIG_BLK_DEV_HD is not set
    8130. 

  8130. +# CONFIG_BLK_DEV_IDE_SATA is not set
    8131. 

  8131. +CONFIG_BLK_DEV_IDEDISK=y
    8132. 

  8132. +CONFIG_IDEDISK_MULTI_MODE=y
    8133. 

  8133. +CONFIG_IDEDISK_STROKE=y
    8134. 

  8134. +CONFIG_BLK_DEV_IDECS=m
    8135. 

  8135. +# CONFIG_BLK_DEV_DELKIN is not set
    8136. 

  8136. +# CONFIG_BLK_DEV_IDECD is not set
    8137. 

  8137. +# CONFIG_BLK_DEV_IDETAPE is not set
    8138. 

  8138. +# CONFIG_BLK_DEV_IDEFLOPPY is not set
    8139. 

  8139. +# CONFIG_BLK_DEV_IDESCSI is not set
    8140. 

  8140. +# CONFIG_IDE_TASK_IOCTL is not set
    8141. 

  8141. +
    8142. 

  8142. +#
    8143. 

  8143. +# IDE chipset support/bugfixes
    8144. 

  8144. +#
    8145. 

  8145. +# CONFIG_BLK_DEV_CMD640 is not set
    8146. 

  8146. +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
    8147. 

  8147. +# CONFIG_BLK_DEV_ISAPNP is not set
    8148. 

  8148. +# CONFIG_BLK_DEV_IDEPCI is not set
    8149. 

  8149. +# CONFIG_IDE_CHIPSETS is not set
    8150. 

  8150. +# CONFIG_IDEDMA_AUTO is not set
    8151. 

  8151. +# CONFIG_DMA_NONPCI is not set
    8152. 

  8152. +# CONFIG_BLK_DEV_ATARAID is not set
    8153. 

  8153. +# CONFIG_BLK_DEV_ATARAID_PDC is not set
    8154. 

  8154. +# CONFIG_BLK_DEV_ATARAID_HPT is not set
    8155. 

  8155. +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
    8156. 

  8156. +# CONFIG_BLK_DEV_ATARAID_SII is not set
    8157. 

  8157. +
    8158. 

  8158. +#
    8159. 

  8159. +# SCSI support
    8160. 

  8160. +#
    8161. 

  8161. +CONFIG_SCSI=y
    8162. 

  8162. +
    8163. 

  8163. +#
    8164. 

  8164. +# SCSI support type (disk, tape, CD-ROM)
    8165. 

  8165. +#
    8166. 

  8166. +CONFIG_BLK_DEV_SD=y
    8167. 

  8167. +CONFIG_SD_EXTRA_DEVS=40
    8168. 

  8168. +CONFIG_CHR_DEV_ST=y
    8169. 

  8169. +# CONFIG_CHR_DEV_OSST is not set
    8170. 

  8170. +CONFIG_BLK_DEV_SR=y
    8171. 

  8171. +# CONFIG_BLK_DEV_SR_VENDOR is not set
    8172. 

  8172. +CONFIG_SR_EXTRA_DEVS=2
    8173. 

  8173. +# CONFIG_CHR_DEV_SG is not set
    8174. 

  8174. +
    8175. 

  8175. +#
    8176. 

  8176. +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
    8177. 

  8177. +#
    8178. 

  8178. +# CONFIG_SCSI_DEBUG_QUEUES is not set
    8179. 

  8179. +# CONFIG_SCSI_MULTI_LUN is not set
    8180. 

  8180. +CONFIG_SCSI_CONSTANTS=y
    8181. 

  8181. +# CONFIG_SCSI_LOGGING is not set
    8182. 

  8182. +
    8183. 

  8183. +#
    8184. 

  8184. +# SCSI low-level drivers
    8185. 

  8185. +#
    8186. 

  8186. +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
    8187. 

  8187. +# CONFIG_SCSI_7000FASST is not set
    8188. 

  8188. +# CONFIG_SCSI_ACARD is not set
    8189. 

  8189. +# CONFIG_SCSI_AHA152X is not set
    8190. 

  8190. +# CONFIG_SCSI_AHA1542 is not set
    8191. 

  8191. +# CONFIG_SCSI_AHA1740 is not set
    8192. 

  8192. +# CONFIG_SCSI_AACRAID is not set
    8193. 

  8193. +# CONFIG_SCSI_AIC7XXX is not set
    8194. 

  8194. +# CONFIG_SCSI_AIC79XX is not set
    8195. 

  8195. +# CONFIG_SCSI_AIC7XXX_OLD is not set
    8196. 

  8196. +# CONFIG_SCSI_DPT_I2O is not set
    8197. 

  8197. +# CONFIG_SCSI_ADVANSYS is not set
    8198. 

  8198. +# CONFIG_SCSI_IN2000 is not set
    8199. 

  8199. +# CONFIG_SCSI_AM53C974 is not set
    8200. 

  8200. +# CONFIG_SCSI_MEGARAID is not set
    8201. 

  8201. +# CONFIG_SCSI_MEGARAID2 is not set
    8202. 

  8202. +# CONFIG_SCSI_SATA is not set
    8203. 

  8203. +# CONFIG_SCSI_SATA_AHCI is not set
    8204. 

  8204. +# CONFIG_SCSI_SATA_SVW is not set
    8205. 

  8205. +# CONFIG_SCSI_ATA_PIIX is not set
    8206. 

  8206. +# CONFIG_SCSI_SATA_NV is not set
    8207. 

  8207. +# CONFIG_SCSI_SATA_QSTOR is not set
    8208. 

  8208. +# CONFIG_SCSI_SATA_PROMISE is not set
    8209. 

  8209. +# CONFIG_SCSI_SATA_SX4 is not set
    8210. 

  8210. +# CONFIG_SCSI_SATA_SIL is not set
    8211. 

  8211. +# CONFIG_SCSI_SATA_SIS is not set
    8212. 

  8212. +# CONFIG_SCSI_SATA_ULI is not set
    8213. 

  8213. +# CONFIG_SCSI_SATA_VIA is not set
    8214. 

  8214. +# CONFIG_SCSI_SATA_VITESSE is not set
    8215. 

  8215. +# CONFIG_SCSI_BUSLOGIC is not set
    8216. 

  8216. +# CONFIG_SCSI_CPQFCTS is not set
    8217. 

  8217. +# CONFIG_SCSI_DMX3191D is not set
    8218. 

  8218. +# CONFIG_SCSI_DTC3280 is not set
    8219. 

  8219. +# CONFIG_SCSI_EATA is not set
    8220. 

  8220. +# CONFIG_SCSI_EATA_DMA is not set
    8221. 

  8221. +# CONFIG_SCSI_EATA_PIO is not set
    8222. 

  8222. +# CONFIG_SCSI_FUTURE_DOMAIN is not set
    8223. 

  8223. +# CONFIG_SCSI_GDTH is not set
    8224. 

  8224. +# CONFIG_SCSI_GENERIC_NCR5380 is not set
    8225. 

  8225. +# CONFIG_SCSI_INITIO is not set
    8226. 

  8226. +# CONFIG_SCSI_INIA100 is not set
    8227. 

  8227. +# CONFIG_SCSI_NCR53C406A is not set
    8228. 

  8228. +# CONFIG_SCSI_NCR53C7xx is not set
    8229. 

  8229. +# CONFIG_SCSI_SYM53C8XX_2 is not set
    8230. 

  8230. +# CONFIG_SCSI_NCR53C8XX is not set
    8231. 

  8231. +# CONFIG_SCSI_SYM53C8XX is not set
    8232. 

  8232. +# CONFIG_SCSI_PAS16 is not set
    8233. 

  8233. +# CONFIG_SCSI_PCI2000 is not set
    8234. 

  8234. +# CONFIG_SCSI_PCI2220I is not set
    8235. 

  8235. +# CONFIG_SCSI_PSI240I is not set
    8236. 

  8236. +# CONFIG_SCSI_QLOGIC_FAS is not set
    8237. 

  8237. +# CONFIG_SCSI_QLOGIC_ISP is not set
    8238. 

  8238. +# CONFIG_SCSI_QLOGIC_FC is not set
    8239. 

  8239. +# CONFIG_SCSI_QLOGIC_1280 is not set
    8240. 

  8240. +# CONFIG_SCSI_SIM710 is not set
    8241. 

  8241. +# CONFIG_SCSI_SYM53C416 is not set
    8242. 

  8242. +# CONFIG_SCSI_DC390T is not set
    8243. 

  8243. +# CONFIG_SCSI_T128 is not set
    8244. 

  8244. +# CONFIG_SCSI_U14_34F is not set
    8245. 

  8245. +# CONFIG_SCSI_NSP32 is not set
    8246. 

  8246. +# CONFIG_SCSI_DEBUG is not set
    8247. 

  8247. +
    8248. 

  8248. +#
    8249. 

  8249. +# PCMCIA SCSI adapter support
    8250. 

  8250. +#
    8251. 

  8251. +# CONFIG_SCSI_PCMCIA is not set
    8252. 

  8252. +
    8253. 

  8253. +#
    8254. 

  8254. +# Fusion MPT device support
    8255. 

  8255. +#
    8256. 

  8256. +# CONFIG_FUSION is not set
    8257. 

  8257. +# CONFIG_FUSION_BOOT is not set
    8258. 

  8258. +# CONFIG_FUSION_ISENSE is not set
    8259. 

  8259. +# CONFIG_FUSION_CTL is not set
    8260. 

  8260. +# CONFIG_FUSION_LAN is not set
    8261. 

  8261. +
    8262. 

  8262. +#
    8263. 

  8263. +# IEEE 1394 (FireWire) support (EXPERIMENTAL)
    8264. 

  8264. +#
    8265. 

  8265. +# CONFIG_IEEE1394 is not set
    8266. 

  8266. +
    8267. 

  8267. +#
    8268. 

  8268. +# I2O device support
    8269. 

  8269. +#
    8270. 

  8270. +# CONFIG_I2O is not set
    8271. 

  8271. +# CONFIG_I2O_PCI is not set
    8272. 

  8272. +# CONFIG_I2O_BLOCK is not set
    8273. 

  8273. +# CONFIG_I2O_LAN is not set
    8274. 

  8274. +# CONFIG_I2O_SCSI is not set
    8275. 

  8275. +# CONFIG_I2O_PROC is not set
    8276. 

  8276. +
    8277. 

  8277. +#
    8278. 

  8278. +# Network device support
    8279. 

  8279. +#
    8280. 

  8280. +CONFIG_NETDEVICES=y
    8281. 

  8281. +
    8282. 

  8282. +#
    8283. 

  8283. +# ARCnet devices
    8284. 

  8284. +#
    8285. 

  8285. +# CONFIG_ARCNET is not set
    8286. 

  8286. +# CONFIG_DUMMY is not set
    8287. 

  8287. +# CONFIG_BONDING is not set
    8288. 

  8288. +# CONFIG_EQUALIZER is not set
    8289. 

  8289. +# CONFIG_TUN is not set
    8290. 

  8290. +# CONFIG_ETHERTAP is not set
    8291. 

  8291. +
    8292. 

  8292. +#
    8293. 

  8293. +# Ethernet (10 or 100Mbit)
    8294. 

  8294. +#
    8295. 

  8295. +CONFIG_NET_ETHERNET=y
    8296. 

  8296. +# CONFIG_MIPS_AU1X00_ENET is not set
    8297. 

  8297. +# CONFIG_SUNLANCE is not set
    8298. 

  8298. +# CONFIG_HAPPYMEAL is not set
    8299. 

  8299. +# CONFIG_SUNBMAC is not set
    8300. 

  8300. +# CONFIG_SUNQE is not set
    8301. 

  8301. +# CONFIG_SUNGEM is not set
    8302. 

  8302. +# CONFIG_NET_VENDOR_3COM is not set
    8303. 

  8303. +# CONFIG_LANCE is not set
    8304. 

  8304. +# CONFIG_NET_VENDOR_SMC is not set
    8305. 

  8305. +# CONFIG_NET_VENDOR_RACAL is not set
    8306. 

  8306. +# CONFIG_HP100 is not set
    8307. 

  8307. +# CONFIG_NET_ISA is not set
    8308. 

  8308. +# CONFIG_NET_PCI is not set
    8309. 

  8309. +# CONFIG_NET_POCKET is not set
    8310. 

  8310. +
    8311. 

  8311. +#
    8312. 

  8312. +# Ethernet (1000 Mbit)
    8313. 

  8313. +#
    8314. 

  8314. +# CONFIG_ACENIC is not set
    8315. 

  8315. +# CONFIG_DL2K is not set
    8316. 

  8316. +# CONFIG_E1000 is not set
    8317. 

  8317. +# CONFIG_MYRI_SBUS is not set
    8318. 

  8318. +# CONFIG_NS83820 is not set
    8319. 

  8319. +# CONFIG_HAMACHI is not set
    8320. 

  8320. +# CONFIG_YELLOWFIN is not set
    8321. 

  8321. +# CONFIG_R8169 is not set
    8322. 

  8322. +# CONFIG_SK98LIN is not set
    8323. 

  8323. +# CONFIG_TIGON3 is not set
    8324. 

  8324. +# CONFIG_FDDI is not set
    8325. 

  8325. +# CONFIG_HIPPI is not set
    8326. 

  8326. +# CONFIG_PLIP is not set
    8327. 

  8327. +CONFIG_PPP=m
    8328. 

  8328. +CONFIG_PPP_MULTILINK=y
    8329. 

  8329. +# CONFIG_PPP_FILTER is not set
    8330. 

  8330. +CONFIG_PPP_ASYNC=m
    8331. 

  8331. +# CONFIG_PPP_SYNC_TTY is not set
    8332. 

  8332. +CONFIG_PPP_DEFLATE=m
    8333. 

  8333. +# CONFIG_PPP_BSDCOMP is not set
    8334. 

  8334. +CONFIG_PPPOE=m
    8335. 

  8335. +# CONFIG_SLIP is not set
    8336. 

  8336. +
    8337. 

  8337. +#
    8338. 

  8338. +# Wireless LAN (non-hamradio)
    8339. 

  8339. +#
    8340. 

  8340. +# CONFIG_NET_RADIO is not set
    8341. 

  8341. +
    8342. 

  8342. +#
    8343. 

  8343. +# Token Ring devices
    8344. 

  8344. +#
    8345. 

  8345. +# CONFIG_TR is not set
    8346. 

  8346. +# CONFIG_NET_FC is not set
    8347. 

  8347. +# CONFIG_RCPCI is not set
    8348. 

  8348. +# CONFIG_SHAPER is not set
    8349. 

  8349. +
    8350. 

  8350. +#
    8351. 

  8351. +# Wan interfaces
    8352. 

  8352. +#
    8353. 

  8353. +# CONFIG_WAN is not set
    8354. 

  8354. +
    8355. 

  8355. +#
    8356. 

  8356. +# PCMCIA network device support
    8357. 

  8357. +#
    8358. 

  8358. +# CONFIG_NET_PCMCIA is not set
    8359. 

  8359. +
    8360. 

  8360. +#
    8361. 

  8361. +# Amateur Radio support
    8362. 

  8362. +#
    8363. 

  8363. +# CONFIG_HAMRADIO is not set
    8364. 

  8364. +
    8365. 

  8365. +#
    8366. 

  8366. +# IrDA (infrared) support
    8367. 

  8367. +#
    8368. 

  8368. +# CONFIG_IRDA is not set
    8369. 

  8369. +
    8370. 

  8370. +#
    8371. 

  8371. +# ISDN subsystem
    8372. 

  8372. +#
    8373. 

  8373. +# CONFIG_ISDN is not set
    8374. 

  8374. +
    8375. 

  8375. +#
    8376. 

  8376. +# Input core support
    8377. 

  8377. +#
    8378. 

  8378. +CONFIG_INPUT=y
    8379. 

  8379. +CONFIG_INPUT_KEYBDEV=y
    8380. 

  8380. +CONFIG_INPUT_MOUSEDEV=y
    8381. 

  8381. +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
    8382. 

  8382. +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
    8383. 

  8383. +# CONFIG_INPUT_JOYDEV is not set
    8384. 

  8384. +CONFIG_INPUT_EVDEV=y
    8385. 

  8385. +# CONFIG_INPUT_UINPUT is not set
    8386. 

  8386. +
    8387. 

  8387. +#
    8388. 

  8388. +# Character devices
    8389. 

  8389. +#
    8390. 

  8390. +CONFIG_VT=y
    8391. 

  8391. +# CONFIG_VT_CONSOLE is not set
    8392. 

  8392. +# CONFIG_SERIAL is not set
    8393. 

  8393. +# CONFIG_SERIAL_EXTENDED is not set
    8394. 

  8394. +CONFIG_SERIAL_NONSTANDARD=y
    8395. 

  8395. +# CONFIG_COMPUTONE is not set
    8396. 

  8396. +# CONFIG_ROCKETPORT is not set
    8397. 

  8397. +# CONFIG_CYCLADES is not set
    8398. 

  8398. +# CONFIG_DIGIEPCA is not set
    8399. 

  8399. +# CONFIG_DIGI is not set
    8400. 

  8400. +# CONFIG_ESPSERIAL is not set
    8401. 

  8401. +# CONFIG_MOXA_INTELLIO is not set
    8402. 

  8402. +# CONFIG_MOXA_SMARTIO is not set
    8403. 

  8403. +# CONFIG_ISI is not set
    8404. 

  8404. +# CONFIG_SYNCLINK is not set
    8405. 

  8405. +# CONFIG_SYNCLINKMP is not set
    8406. 

  8406. +# CONFIG_N_HDLC is not set
    8407. 

  8407. +# CONFIG_RISCOM8 is not set
    8408. 

  8408. +# CONFIG_SPECIALIX is not set
    8409. 

  8409. +# CONFIG_SX is not set
    8410. 

  8410. +# CONFIG_RIO is not set
    8411. 

  8411. +# CONFIG_STALDRV is not set
    8412. 

  8412. +# CONFIG_SERIAL_TX3912 is not set
    8413. 

  8413. +# CONFIG_SERIAL_TX3912_CONSOLE is not set
    8414. 

  8414. +# CONFIG_SERIAL_TXX9 is not set
    8415. 

  8415. +# CONFIG_SERIAL_TXX9_CONSOLE is not set
    8416. 

  8416. +CONFIG_AU1X00_UART=y
    8417. 

  8417. +CONFIG_AU1X00_SERIAL_CONSOLE=y
    8418. 

  8418. +# CONFIG_AU1X00_USB_TTY is not set
    8419. 

  8419. +# CONFIG_AU1X00_USB_RAW is not set
    8420. 

  8420. +# CONFIG_TXX927_SERIAL is not set
    8421. 

  8421. +CONFIG_UNIX98_PTYS=y
    8422. 

  8422. +CONFIG_UNIX98_PTY_COUNT=256
    8423. 

  8423. +
    8424. 

  8424. +#
    8425. 

  8425. +# I2C support
    8426. 

  8426. +#
    8427. 

  8427. +CONFIG_I2C=y
    8428. 

  8428. +# CONFIG_I2C_ALGOBIT is not set
    8429. 

  8429. +# CONFIG_SCx200_ACB is not set
    8430. 

  8430. +# CONFIG_I2C_ALGOPCF is not set
    8431. 

  8431. +# CONFIG_I2C_CHARDEV is not set
    8432. 

  8432. +CONFIG_I2C_PROC=y
    8433. 

  8433. +
    8434. 

  8434. +#
    8435. 

  8435. +# Mice
    8436. 

  8436. +#
    8437. 

  8437. +# CONFIG_BUSMOUSE is not set
    8438. 

  8438. +# CONFIG_MOUSE is not set
    8439. 

  8439. +
    8440. 

  8440. +#
    8441. 

  8441. +# Joysticks
    8442. 

  8442. +#
    8443. 

  8443. +# CONFIG_INPUT_GAMEPORT is not set
    8444. 

  8444. +# CONFIG_INPUT_NS558 is not set
    8445. 

  8445. +# CONFIG_INPUT_LIGHTNING is not set
    8446. 

  8446. +# CONFIG_INPUT_PCIGAME is not set
    8447. 

  8447. +# CONFIG_INPUT_CS461X is not set
    8448. 

  8448. +# CONFIG_INPUT_EMU10K1 is not set
    8449. 

  8449. +# CONFIG_INPUT_SERIO is not set
    8450. 

  8450. +# CONFIG_INPUT_SERPORT is not set
    8451. 

  8451. +
    8452. 

  8452. +#
    8453. 

  8453. +# Joysticks
    8454. 

  8454. +#
    8455. 

  8455. +# CONFIG_INPUT_ANALOG is not set
    8456. 

  8456. +# CONFIG_INPUT_A3D is not set
    8457. 

  8457. +# CONFIG_INPUT_ADI is not set
    8458. 

  8458. +# CONFIG_INPUT_COBRA is not set
    8459. 

  8459. +# CONFIG_INPUT_GF2K is not set
    8460. 

  8460. +# CONFIG_INPUT_GRIP is not set
    8461. 

  8461. +# CONFIG_INPUT_INTERACT is not set
    8462. 

  8462. +# CONFIG_INPUT_TMDC is not set
    8463. 

  8463. +# CONFIG_INPUT_SIDEWINDER is not set
    8464. 

  8464. +# CONFIG_INPUT_IFORCE_USB is not set
    8465. 

  8465. +# CONFIG_INPUT_IFORCE_232 is not set
    8466. 

  8466. +# CONFIG_INPUT_WARRIOR is not set
    8467. 

  8467. +# CONFIG_INPUT_MAGELLAN is not set
    8468. 

  8468. +# CONFIG_INPUT_SPACEORB is not set
    8469. 

  8469. +# CONFIG_INPUT_SPACEBALL is not set
    8470. 

  8470. +# CONFIG_INPUT_STINGER is not set
    8471. 

  8471. +# CONFIG_INPUT_DB9 is not set
    8472. 

  8472. +# CONFIG_INPUT_GAMECON is not set
    8473. 

  8473. +# CONFIG_INPUT_TURBOGRAFX is not set
    8474. 

  8474. +# CONFIG_QIC02_TAPE is not set
    8475. 

  8475. +# CONFIG_IPMI_HANDLER is not set
    8476. 

  8476. +# CONFIG_IPMI_PANIC_EVENT is not set
    8477. 

  8477. +# CONFIG_IPMI_DEVICE_INTERFACE is not set
    8478. 

  8478. +# CONFIG_IPMI_KCS is not set
    8479. 

  8479. +# CONFIG_IPMI_WATCHDOG is not set
    8480. 

  8480. +
    8481. 

  8481. +#
    8482. 

  8482. +# Watchdog Cards
    8483. 

  8483. +#
    8484. 

  8484. +# CONFIG_WATCHDOG is not set
    8485. 

  8485. +# CONFIG_SCx200 is not set
    8486. 

  8486. +# CONFIG_SCx200_GPIO is not set
    8487. 

  8487. +# CONFIG_AMD_PM768 is not set
    8488. 

  8488. +# CONFIG_NVRAM is not set
    8489. 

  8489. +# CONFIG_RTC is not set
    8490. 

  8490. +# CONFIG_DTLK is not set
    8491. 

  8491. +# CONFIG_R3964 is not set
    8492. 

  8492. +# CONFIG_APPLICOM is not set
    8493. 

  8493. +
    8494. 

  8494. +#
    8495. 

  8495. +# Ftape, the floppy tape device driver
    8496. 

  8496. +#
    8497. 

  8497. +# CONFIG_FTAPE is not set
    8498. 

  8498. +# CONFIG_AGP is not set
    8499. 

  8499. +
    8500. 

  8500. +#
    8501. 

  8501. +# Direct Rendering Manager (XFree86 DRI support)
    8502. 

  8502. +#
    8503. 

  8503. +# CONFIG_DRM is not set
    8504. 

  8504. +
    8505. 

  8505. +#
    8506. 

  8506. +# PCMCIA character devices
    8507. 

  8507. +#
    8508. 

  8508. +# CONFIG_PCMCIA_SERIAL_CS is not set
    8509. 

  8509. +# CONFIG_SYNCLINK_CS is not set
    8510. 

  8510. +# CONFIG_AU1X00_GPIO is not set
    8511. 

  8511. +# CONFIG_TS_AU1X00_ADS7846 is not set
    8512. 

  8512. +
    8513. 

  8513. +#
    8514. 

  8514. +# File systems
    8515. 

  8515. +#
    8516. 

  8516. +# CONFIG_QUOTA is not set
    8517. 

  8517. +# CONFIG_QFMT_V2 is not set
    8518. 

  8518. +CONFIG_AUTOFS_FS=y
    8519. 

  8519. +# CONFIG_AUTOFS4_FS is not set
    8520. 

  8520. +# CONFIG_REISERFS_FS is not set
    8521. 

  8521. +# CONFIG_REISERFS_CHECK is not set
    8522. 

  8522. +# CONFIG_REISERFS_PROC_INFO is not set
    8523. 

  8523. +# CONFIG_ADFS_FS is not set
    8524. 

  8524. +# CONFIG_ADFS_FS_RW is not set
    8525. 

  8525. +# CONFIG_AFFS_FS is not set
    8526. 

  8526. +# CONFIG_HFS_FS is not set
    8527. 

  8527. +# CONFIG_HFSPLUS_FS is not set
    8528. 

  8528. +# CONFIG_BEFS_FS is not set
    8529. 

  8529. +# CONFIG_BEFS_DEBUG is not set
    8530. 

  8530. +# CONFIG_BFS_FS is not set
    8531. 

  8531. +CONFIG_EXT3_FS=y
    8532. 

  8532. +CONFIG_JBD=y
    8533. 

  8533. +# CONFIG_JBD_DEBUG is not set
    8534. 

  8534. +CONFIG_FAT_FS=y
    8535. 

  8535. +CONFIG_MSDOS_FS=y
    8536. 

  8536. +# CONFIG_UMSDOS_FS is not set
    8537. 

  8537. +CONFIG_VFAT_FS=y
    8538. 

  8538. +# CONFIG_EFS_FS is not set
    8539. 

  8539. +# CONFIG_JFFS_FS is not set
    8540. 

  8540. +# CONFIG_JFFS2_FS is not set
    8541. 

  8541. +# CONFIG_CRAMFS is not set
    8542. 

  8542. +CONFIG_TMPFS=y
    8543. 

  8543. +CONFIG_RAMFS=y
    8544. 

  8544. +# CONFIG_ISO9660_FS is not set
    8545. 

  8545. +# CONFIG_JOLIET is not set
    8546. 

  8546. +# CONFIG_ZISOFS is not set
    8547. 

  8547. +# CONFIG_JFS_FS is not set
    8548. 

  8548. +# CONFIG_JFS_DEBUG is not set
    8549. 

  8549. +# CONFIG_JFS_STATISTICS is not set
    8550. 

  8550. +# CONFIG_MINIX_FS is not set
    8551. 

  8551. +# CONFIG_VXFS_FS is not set
    8552. 

  8552. +# CONFIG_NTFS_FS is not set
    8553. 

  8553. +# CONFIG_NTFS_RW is not set
    8554. 

  8554. +# CONFIG_HPFS_FS is not set
    8555. 

  8555. +CONFIG_PROC_FS=y
    8556. 

  8556. +# CONFIG_DEVFS_FS is not set
    8557. 

  8557. +# CONFIG_DEVFS_MOUNT is not set
    8558. 

  8558. +# CONFIG_DEVFS_DEBUG is not set
    8559. 

  8559. +CONFIG_DEVPTS_FS=y
    8560. 

  8560. +# CONFIG_QNX4FS_FS is not set
    8561. 

  8561. +# CONFIG_QNX4FS_RW is not set
    8562. 

  8562. +# CONFIG_ROMFS_FS is not set
    8563. 

  8563. +CONFIG_EXT2_FS=y
    8564. 

  8564. +# CONFIG_SYSV_FS is not set
    8565. 

  8565. +# CONFIG_UDF_FS is not set
    8566. 

  8566. +# CONFIG_UDF_RW is not set
    8567. 

  8567. +# CONFIG_UFS_FS is not set
    8568. 

  8568. +# CONFIG_UFS_FS_WRITE is not set
    8569. 

  8569. +# CONFIG_XFS_FS is not set
    8570. 

  8570. +# CONFIG_XFS_QUOTA is not set
    8571. 

  8571. +# CONFIG_XFS_RT is not set
    8572. 

  8572. +# CONFIG_XFS_TRACE is not set
    8573. 

  8573. +# CONFIG_XFS_DEBUG is not set
    8574. 

  8574. +
    8575. 

  8575. +#
    8576. 

  8576. +# Network File Systems
    8577. 

  8577. +#
    8578. 

  8578. +# CONFIG_CODA_FS is not set
    8579. 

  8579. +# CONFIG_INTERMEZZO_FS is not set
    8580. 

  8580. +CONFIG_NFS_FS=y
    8581. 

  8581. +CONFIG_NFS_V3=y
    8582. 

  8582. +# CONFIG_NFS_DIRECTIO is not set
    8583. 

  8583. +CONFIG_ROOT_NFS=y
    8584. 

  8584. +# CONFIG_NFSD is not set
    8585. 

  8585. +# CONFIG_NFSD_V3 is not set
    8586. 

  8586. +# CONFIG_NFSD_TCP is not set
    8587. 

  8587. +CONFIG_SUNRPC=y
    8588. 

  8588. +CONFIG_LOCKD=y
    8589. 

  8589. +CONFIG_LOCKD_V4=y
    8590. 

  8590. +# CONFIG_SMB_FS is not set
    8591. 

  8591. +# CONFIG_NCP_FS is not set
    8592. 

  8592. +# CONFIG_NCPFS_PACKET_SIGNING is not set
    8593. 

  8593. +# CONFIG_NCPFS_IOCTL_LOCKING is not set
    8594. 

  8594. +# CONFIG_NCPFS_STRONG is not set
    8595. 

  8595. +# CONFIG_NCPFS_NFS_NS is not set
    8596. 

  8596. +# CONFIG_NCPFS_OS2_NS is not set
    8597. 

  8597. +# CONFIG_NCPFS_SMALLDOS is not set
    8598. 

  8598. +# CONFIG_NCPFS_NLS is not set
    8599. 

  8599. +# CONFIG_NCPFS_EXTRAS is not set
    8600. 

  8600. +# CONFIG_ZISOFS_FS is not set
    8601. 

  8601. +
    8602. 

  8602. +#
    8603. 

  8603. +# Partition Types
    8604. 

  8604. +#
    8605. 

  8605. +# CONFIG_PARTITION_ADVANCED is not set
    8606. 

  8606. +CONFIG_MSDOS_PARTITION=y
    8607. 

  8607. +# CONFIG_SMB_NLS is not set
    8608. 

  8608. +CONFIG_NLS=y
    8609. 

  8609. +
    8610. 

  8610. +#
    8611. 

  8611. +# Native Language Support
    8612. 

  8612. +#
    8613. 

  8613. +CONFIG_NLS_DEFAULT="iso8859-1"
    8614. 

  8614. +# CONFIG_NLS_CODEPAGE_437 is not set
    8615. 

  8615. +# CONFIG_NLS_CODEPAGE_737 is not set
    8616. 

  8616. +# CONFIG_NLS_CODEPAGE_775 is not set
    8617. 

  8617. +# CONFIG_NLS_CODEPAGE_850 is not set
    8618. 

  8618. +# CONFIG_NLS_CODEPAGE_852 is not set
    8619. 

  8619. +# CONFIG_NLS_CODEPAGE_855 is not set
    8620. 

  8620. +# CONFIG_NLS_CODEPAGE_857 is not set
    8621. 

  8621. +# CONFIG_NLS_CODEPAGE_860 is not set
    8622. 

  8622. +# CONFIG_NLS_CODEPAGE_861 is not set
    8623. 

  8623. +# CONFIG_NLS_CODEPAGE_862 is not set
    8624. 

  8624. +# CONFIG_NLS_CODEPAGE_863 is not set
    8625. 

  8625. +# CONFIG_NLS_CODEPAGE_864 is not set
    8626. 

  8626. +# CONFIG_NLS_CODEPAGE_865 is not set
    8627. 

  8627. +# CONFIG_NLS_CODEPAGE_866 is not set
    8628. 

  8628. +# CONFIG_NLS_CODEPAGE_869 is not set
    8629. 

  8629. +# CONFIG_NLS_CODEPAGE_936 is not set
    8630. 

  8630. +# CONFIG_NLS_CODEPAGE_950 is not set
    8631. 

  8631. +# CONFIG_NLS_CODEPAGE_932 is not set
    8632. 

  8632. +# CONFIG_NLS_CODEPAGE_949 is not set
    8633. 

  8633. +# CONFIG_NLS_CODEPAGE_874 is not set
    8634. 

  8634. +# CONFIG_NLS_ISO8859_8 is not set
    8635. 

  8635. +# CONFIG_NLS_CODEPAGE_1250 is not set
    8636. 

  8636. +# CONFIG_NLS_CODEPAGE_1251 is not set
    8637. 

  8637. +# CONFIG_NLS_ISO8859_1 is not set
    8638. 

  8638. +# CONFIG_NLS_ISO8859_2 is not set
    8639. 

  8639. +# CONFIG_NLS_ISO8859_3 is not set
    8640. 

  8640. +# CONFIG_NLS_ISO8859_4 is not set
    8641. 

  8641. +# CONFIG_NLS_ISO8859_5 is not set
    8642. 

  8642. +# CONFIG_NLS_ISO8859_6 is not set
    8643. 

  8643. +# CONFIG_NLS_ISO8859_7 is not set
    8644. 

  8644. +# CONFIG_NLS_ISO8859_9 is not set
    8645. 

  8645. +# CONFIG_NLS_ISO8859_13 is not set
    8646. 

  8646. +# CONFIG_NLS_ISO8859_14 is not set
    8647. 

  8647. +# CONFIG_NLS_ISO8859_15 is not set
    8648. 

  8648. +# CONFIG_NLS_KOI8_R is not set
    8649. 

  8649. +# CONFIG_NLS_KOI8_U is not set
    8650. 

  8650. +# CONFIG_NLS_UTF8 is not set
    8651. 

  8651. +
    8652. 

  8652. +#
    8653. 

  8653. +# Multimedia devices
    8654. 

  8654. +#
    8655. 

  8655. +# CONFIG_VIDEO_DEV is not set
    8656. 

  8656. +
    8657. 

  8657. +#
    8658. 

  8658. +# Console drivers
    8659. 

  8659. +#
    8660. 

  8660. +# CONFIG_VGA_CONSOLE is not set
    8661. 

  8661. +# CONFIG_MDA_CONSOLE is not set
    8662. 

  8662. +
    8663. 

  8663. +#
    8664. 

  8664. +# Frame-buffer support
    8665. 

  8665. +#
    8666. 

  8666. +CONFIG_FB=y
    8667. 

  8667. +CONFIG_DUMMY_CONSOLE=y
    8668. 

  8668. +# CONFIG_FB_RIVA is not set
    8669. 

  8669. +# CONFIG_FB_CLGEN is not set
    8670. 

  8670. +# CONFIG_FB_PM2 is not set
    8671. 

  8671. +# CONFIG_FB_PM3 is not set
    8672. 

  8672. +# CONFIG_FB_CYBER2000 is not set
    8673. 

  8673. +# CONFIG_FB_MATROX is not set
    8674. 

  8674. +# CONFIG_FB_ATY is not set
    8675. 

  8675. +# CONFIG_FB_RADEON is not set
    8676. 

  8676. +# CONFIG_FB_ATY128 is not set
    8677. 

  8677. +# CONFIG_FB_INTEL is not set
    8678. 

  8678. +# CONFIG_FB_SIS is not set
    8679. 

  8679. +# CONFIG_FB_NEOMAGIC is not set
    8680. 

  8680. +# CONFIG_FB_3DFX is not set
    8681. 

  8681. +# CONFIG_FB_VOODOO1 is not set
    8682. 

  8682. +# CONFIG_FB_TRIDENT is not set
    8683. 

  8683. +# CONFIG_FB_E1356 is not set
    8684. 

  8684. +# CONFIG_FB_IT8181 is not set
    8685. 

  8685. +# CONFIG_FB_VIRTUAL is not set
    8686. 

  8686. +CONFIG_FBCON_ADVANCED=y
    8687. 

  8687. +# CONFIG_FBCON_MFB is not set
    8688. 

  8688. +# CONFIG_FBCON_CFB2 is not set
    8689. 

  8689. +# CONFIG_FBCON_CFB4 is not set
    8690. 

  8690. +# CONFIG_FBCON_CFB8 is not set
    8691. 

  8691. +CONFIG_FBCON_CFB16=y
    8692. 

  8692. +# CONFIG_FBCON_CFB24 is not set
    8693. 

  8693. +CONFIG_FBCON_CFB32=y
    8694. 

  8694. +# CONFIG_FBCON_AFB is not set
    8695. 

  8695. +# CONFIG_FBCON_ILBM is not set
    8696. 

  8696. +# CONFIG_FBCON_IPLAN2P2 is not set
    8697. 

  8697. +# CONFIG_FBCON_IPLAN2P4 is not set
    8698. 

  8698. +# CONFIG_FBCON_IPLAN2P8 is not set
    8699. 

  8699. +# CONFIG_FBCON_MAC is not set
    8700. 

  8700. +# CONFIG_FBCON_VGA_PLANES is not set
    8701. 

  8701. +# CONFIG_FBCON_VGA is not set
    8702. 

  8702. +# CONFIG_FBCON_HGA is not set
    8703. 

  8703. +# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
    8704. 

  8704. +CONFIG_FBCON_FONTS=y
    8705. 

  8705. +CONFIG_FONT_8x8=y
    8706. 

  8706. +CONFIG_FONT_8x16=y
    8707. 

  8707. +# CONFIG_FONT_SUN8x16 is not set
    8708. 

  8708. +# CONFIG_FONT_SUN12x22 is not set
    8709. 

  8709. +# CONFIG_FONT_6x11 is not set
    8710. 

  8710. +# CONFIG_FONT_PEARL_8x8 is not set
    8711. 

  8711. +# CONFIG_FONT_ACORN_8x8 is not set
    8712. 

  8712. +
    8713. 

  8713. +#
    8714. 

  8714. +# Sound
    8715. 

  8715. +#
    8716. 

  8716. +CONFIG_SOUND=y
    8717. 

  8717. +# CONFIG_SOUND_ALI5455 is not set
    8718. 

  8718. +# CONFIG_SOUND_BT878 is not set
    8719. 

  8719. +# CONFIG_SOUND_CMPCI is not set
    8720. 

  8720. +# CONFIG_SOUND_EMU10K1 is not set
    8721. 

  8721. +# CONFIG_MIDI_EMU10K1 is not set
    8722. 

  8722. +# CONFIG_SOUND_FUSION is not set
    8723. 

  8723. +# CONFIG_SOUND_CS4281 is not set
    8724. 

  8724. +# CONFIG_SOUND_ES1370 is not set
    8725. 

  8725. +# CONFIG_SOUND_ES1371 is not set
    8726. 

  8726. +# CONFIG_SOUND_ESSSOLO1 is not set
    8727. 

  8727. +# CONFIG_SOUND_MAESTRO is not set
    8728. 

  8728. +# CONFIG_SOUND_MAESTRO3 is not set
    8729. 

  8729. +# CONFIG_SOUND_FORTE is not set
    8730. 

  8730. +# CONFIG_SOUND_ICH is not set
    8731. 

  8731. +# CONFIG_SOUND_RME96XX is not set
    8732. 

  8732. +# CONFIG_SOUND_SONICVIBES is not set
    8733. 

  8733. +# CONFIG_SOUND_AU1X00 is not set
    8734. 

  8734. +CONFIG_SOUND_AU1550_PSC=y
    8735. 

  8735. +# CONFIG_SOUND_AU1550_I2S is not set
    8736. 

  8736. +# CONFIG_SOUND_TRIDENT is not set
    8737. 

  8737. +# CONFIG_SOUND_MSNDCLAS is not set
    8738. 

  8738. +# CONFIG_SOUND_MSNDPIN is not set
    8739. 

  8739. +# CONFIG_SOUND_VIA82CXXX is not set
    8740. 

  8740. +# CONFIG_MIDI_VIA82CXXX is not set
    8741. 

  8741. +# CONFIG_SOUND_OSS is not set
    8742. 

  8742. +# CONFIG_SOUND_TVMIXER is not set
    8743. 

  8743. +# CONFIG_SOUND_AD1980 is not set
    8744. 

  8744. +# CONFIG_SOUND_WM97XX is not set
    8745. 

  8745. +
    8746. 

  8746. +#
    8747. 

  8747. +# USB support
    8748. 

  8748. +#
    8749. 

  8749. +CONFIG_USB=y
    8750. 

  8750. +# CONFIG_USB_DEBUG is not set
    8751. 

  8751. +
    8752. 

  8752. +#
    8753. 

  8753. +# Miscellaneous USB options
    8754. 

  8754. +#
    8755. 

  8755. +CONFIG_USB_DEVICEFS=y
    8756. 

  8756. +# CONFIG_USB_BANDWIDTH is not set
    8757. 

  8757. +
    8758. 

  8758. +#
    8759. 

  8759. +# USB Host Controller Drivers
    8760. 

  8760. +#
    8761. 

  8761. +# CONFIG_USB_EHCI_HCD is not set
    8762. 

  8762. +# CONFIG_USB_UHCI is not set
    8763. 

  8763. +# CONFIG_USB_UHCI_ALT is not set
    8764. 

  8764. +CONFIG_USB_OHCI=y
    8765. 

  8765. +
    8766. 

  8766. +#
    8767. 

  8767. +# USB Device Class drivers
    8768. 

  8768. +#
    8769. 

  8769. +# CONFIG_USB_AUDIO is not set
    8770. 

  8770. +# CONFIG_USB_EMI26 is not set
    8771. 

  8771. +# CONFIG_USB_BLUETOOTH is not set
    8772. 

  8772. +# CONFIG_USB_MIDI is not set
    8773. 

  8773. +CONFIG_USB_STORAGE=y
    8774. 

  8774. +# CONFIG_USB_STORAGE_DEBUG is not set
    8775. 

  8775. +# CONFIG_USB_STORAGE_DATAFAB is not set
    8776. 

  8776. +# CONFIG_USB_STORAGE_FREECOM is not set
    8777. 

  8777. +# CONFIG_USB_STORAGE_ISD200 is not set
    8778. 

  8778. +# CONFIG_USB_STORAGE_DPCM is not set
    8779. 

  8779. +# CONFIG_USB_STORAGE_HP8200e is not set
    8780. 

  8780. +# CONFIG_USB_STORAGE_SDDR09 is not set
    8781. 

  8781. +# CONFIG_USB_STORAGE_SDDR55 is not set
    8782. 

  8782. +# CONFIG_USB_STORAGE_JUMPSHOT is not set
    8783. 

  8783. +# CONFIG_USB_ACM is not set
    8784. 

  8784. +# CONFIG_USB_PRINTER is not set
    8785. 

  8785. +
    8786. 

  8786. +#
    8787. 

  8787. +# USB Human Interface Devices (HID)
    8788. 

  8788. +#
    8789. 

  8789. +CONFIG_USB_HID=y
    8790. 

  8790. +CONFIG_USB_HIDINPUT=y
    8791. 

  8791. +CONFIG_USB_HIDDEV=y
    8792. 

  8792. +# CONFIG_USB_AIPTEK is not set
    8793. 

  8793. +# CONFIG_USB_WACOM is not set
    8794. 

  8794. +# CONFIG_USB_KBTAB is not set
    8795. 

  8795. +# CONFIG_USB_POWERMATE is not set
    8796. 

  8796. +
    8797. 

  8797. +#
    8798. 

  8798. +# USB Imaging devices
    8799. 

  8799. +#
    8800. 

  8800. +# CONFIG_USB_DC2XX is not set
    8801. 

  8801. +# CONFIG_USB_MDC800 is not set
    8802. 

  8802. +# CONFIG_USB_SCANNER is not set
    8803. 

  8803. +# CONFIG_USB_MICROTEK is not set
    8804. 

  8804. +# CONFIG_USB_HPUSBSCSI is not set
    8805. 

  8805. +
    8806. 

  8806. +#
    8807. 

  8807. +# USB Multimedia devices
    8808. 

  8808. +#
    8809. 

  8809. +
    8810. 

  8810. +#
    8811. 

  8811. +#   Video4Linux support is needed for USB Multimedia device support
    8812. 

  8812. +#
    8813. 

  8813. +
    8814. 

  8814. +#
    8815. 

  8815. +# USB Network adaptors
    8816. 

  8816. +#
    8817. 

  8817. +# CONFIG_USB_PEGASUS is not set
    8818. 

  8818. +# CONFIG_USB_RTL8150 is not set
    8819. 

  8819. +# CONFIG_USB_KAWETH is not set
    8820. 

  8820. +# CONFIG_USB_CATC is not set
    8821. 

  8821. +# CONFIG_USB_CDCETHER is not set
    8822. 

  8822. +# CONFIG_USB_USBNET is not set
    8823. 

  8823. +
    8824. 

  8824. +#
    8825. 

  8825. +# USB port drivers
    8826. 

  8826. +#
    8827. 

  8827. +# CONFIG_USB_USS720 is not set
    8828. 

  8828. +
    8829. 

  8829. +#
    8830. 

  8830. +# USB Serial Converter support
    8831. 

  8831. +#
    8832. 

  8832. +# CONFIG_USB_SERIAL is not set
    8833. 

  8833. +
    8834. 

  8834. +#
    8835. 

  8835. +# USB Miscellaneous drivers
    8836. 

  8836. +#
    8837. 

  8837. +# CONFIG_USB_RIO500 is not set
    8838. 

  8838. +# CONFIG_USB_AUERSWALD is not set
    8839. 

  8839. +# CONFIG_USB_TIGL is not set
    8840. 

  8840. +# CONFIG_USB_BRLVGER is not set
    8841. 

  8841. +# CONFIG_USB_LCD is not set
    8842. 

  8842. +
    8843. 

  8843. +#
    8844. 

  8844. +# Support for USB gadgets
    8845. 

  8845. +#
    8846. 

  8846. +# CONFIG_USB_GADGET is not set
    8847. 

  8847. +
    8848. 

  8848. +#
    8849. 

  8849. +# Bluetooth support
    8850. 

  8850. +#
    8851. 

  8851. +# CONFIG_BLUEZ is not set
    8852. 

  8852. +
    8853. 

  8853. +#
    8854. 

  8854. +# Kernel hacking
    8855. 

  8855. +#
    8856. 

  8856. +CONFIG_CROSSCOMPILE=y
    8857. 

  8857. +# CONFIG_RUNTIME_DEBUG is not set
    8858. 

  8858. +# CONFIG_KGDB is not set
    8859. 

  8859. +# CONFIG_GDB_CONSOLE is not set
    8860. 

  8860. +# CONFIG_DEBUG_INFO is not set
    8861. 

  8861. +# CONFIG_MAGIC_SYSRQ is not set
    8862. 

  8862. +# CONFIG_MIPS_UNCACHED is not set
    8863. 

  8863. +CONFIG_LOG_BUF_SHIFT=0
    8864. 

  8864. +
    8865. 

  8865. +#
    8866. 

  8866. +# Cryptographic options
    8867. 

  8867. +#
    8868. 

  8868. +# CONFIG_CRYPTO is not set
    8869. 

  8869. +
    8870. 

  8870. +#
    8871. 

  8871. +# Library routines
    8872. 

  8872. +#
    8873. 

  8873. +# CONFIG_CRC32 is not set
    8874. 

  8874. +CONFIG_ZLIB_INFLATE=m
    8875. 

  8875. +CONFIG_ZLIB_DEFLATE=m
    8876. 

  8876. +# CONFIG_FW_LOADER is not set
    8877. 

  8877. --- a/arch/mips/defconfig-pb1500
    8878. 

  8878. +++ b/arch/mips/defconfig-pb1500
    8879. 

  8879. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    8880. 

  8880.  # CONFIG_MIPS_PB1000 is not set
    8881. 

  8881.  # CONFIG_MIPS_PB1100 is not set
    8882. 

  8882.  CONFIG_MIPS_PB1500=y
    8883. 

  8883. -# CONFIG_MIPS_HYDROGEN3 is not set
    8884. 

  8884.  # CONFIG_MIPS_PB1550 is not set
    8885. 

  8885. +# CONFIG_MIPS_HYDROGEN3 is not set
    8886. 

  8886.  # CONFIG_MIPS_XXS1500 is not set
    8887. 

  8887.  # CONFIG_MIPS_MTX1 is not set
    8888. 

  8888.  # CONFIG_COGENT_CSB250 is not set
    8889. 

  8889. @@ -215,9 +215,7 @@ CONFIG_MTD_PB1500=y
    8890. 

  8890.  # CONFIG_MTD_MTX1 is not set
    8891. 

  8891.  CONFIG_MTD_PB1500_BOOT=y
    8892. 

  8892.  # CONFIG_MTD_PB1500_USER is not set
    8893. 

  8893. -# CONFIG_MTD_DB1X00 is not set
    8894. 

  8894.  # CONFIG_MTD_PB1550 is not set
    8895. 

  8895. -# CONFIG_MTD_HYDROGEN3 is not set
    8896. 

  8896.  # CONFIG_MTD_MIRAGE is not set
    8897. 

  8897.  # CONFIG_MTD_CSTM_MIPS_IXX is not set
    8898. 

  8898.  # CONFIG_MTD_OCELOT is not set
    8899. 

  8899. @@ -236,7 +234,6 @@ CONFIG_MTD_PB1500_BOOT=y
    8900. 

  8900.  #
    8901. 

  8901.  # Disk-On-Chip Device Drivers
    8902. 

  8902.  #
    8903. 

  8903. -# CONFIG_MTD_DOC1000 is not set
    8904. 

  8904.  # CONFIG_MTD_DOC2000 is not set
    8905. 

  8905.  # CONFIG_MTD_DOC2001 is not set
    8906. 

  8906.  # CONFIG_MTD_DOCPROBE is not set
    8907. 

  8907. @@ -341,11 +338,6 @@ CONFIG_IP_PNP_BOOTP=y
    8908. 

  8908.  #
    8909. 

  8909.  # CONFIG_IPX is not set
    8910. 

  8910.  # CONFIG_ATALK is not set
    8911. 

  8911. -
    8912. 

  8912. -#
    8913. 

  8913. -# Appletalk devices
    8914. 

  8914. -#
    8915. 

  8915. -# CONFIG_DEV_APPLETALK is not set
    8916. 

  8916.  # CONFIG_DECNET is not set
    8917. 

  8917.  # CONFIG_BRIDGE is not set
    8918. 

  8918.  # CONFIG_X25 is not set
    8919. 

  8919. @@ -675,7 +667,6 @@ CONFIG_AU1X00_SERIAL_CONSOLE=y
    8920. 

  8920.  # CONFIG_AU1X00_USB_TTY is not set
    8921. 

  8921.  # CONFIG_AU1X00_USB_RAW is not set
    8922. 

  8922.  # CONFIG_TXX927_SERIAL is not set
    8923. 

  8923. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    8924. 

  8924.  CONFIG_UNIX98_PTYS=y
    8925. 

  8925.  CONFIG_UNIX98_PTY_COUNT=256
    8926. 

  8926.  
    8927. 

  8927. --- a/arch/mips/defconfig-pb1550
    8928. 

  8928. +++ b/arch/mips/defconfig-pb1550
    8929. 

  8929. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    8930. 

  8930.  # CONFIG_MIPS_PB1000 is not set
    8931. 

  8931.  # CONFIG_MIPS_PB1100 is not set
    8932. 

  8932.  # CONFIG_MIPS_PB1500 is not set
    8933. 

  8933. -# CONFIG_MIPS_HYDROGEN3 is not set
    8934. 

  8934.  CONFIG_MIPS_PB1550=y
    8935. 

  8935. +# CONFIG_MIPS_HYDROGEN3 is not set
    8936. 

  8936.  # CONFIG_MIPS_XXS1500 is not set
    8937. 

  8937.  # CONFIG_MIPS_MTX1 is not set
    8938. 

  8938.  # CONFIG_COGENT_CSB250 is not set
    8939. 

  8939. @@ -213,11 +213,9 @@ CONFIG_MTD_CFI_AMDSTD=y
    8940. 

  8940.  # CONFIG_MTD_BOSPORUS is not set
    8941. 

  8941.  # CONFIG_MTD_XXS1500 is not set
    8942. 

  8942.  # CONFIG_MTD_MTX1 is not set
    8943. 

  8943. -# CONFIG_MTD_DB1X00 is not set
    8944. 

  8944.  CONFIG_MTD_PB1550=y
    8945. 

  8945.  CONFIG_MTD_PB1550_BOOT=y
    8946. 

  8946.  CONFIG_MTD_PB1550_USER=y
    8947. 

  8947. -# CONFIG_MTD_HYDROGEN3 is not set
    8948. 

  8948.  # CONFIG_MTD_MIRAGE is not set
    8949. 

  8949.  # CONFIG_MTD_CSTM_MIPS_IXX is not set
    8950. 

  8950.  # CONFIG_MTD_OCELOT is not set
    8951. 

  8951. @@ -236,7 +234,6 @@ CONFIG_MTD_PB1550_USER=y
    8952. 

  8952.  #
    8953. 

  8953.  # Disk-On-Chip Device Drivers
    8954. 

  8954.  #
    8955. 

  8955. -# CONFIG_MTD_DOC1000 is not set
    8956. 

  8956.  # CONFIG_MTD_DOC2000 is not set
    8957. 

  8957.  # CONFIG_MTD_DOC2001 is not set
    8958. 

  8958.  # CONFIG_MTD_DOCPROBE is not set
    8959. 

  8959. @@ -343,11 +340,6 @@ CONFIG_IP_PNP_BOOTP=y
    8960. 

  8960.  #
    8961. 

  8961.  # CONFIG_IPX is not set
    8962. 

  8962.  # CONFIG_ATALK is not set
    8963. 

  8963. -
    8964. 

  8964. -#
    8965. 

  8965. -# Appletalk devices
    8966. 

  8966. -#
    8967. 

  8967. -# CONFIG_DEV_APPLETALK is not set
    8968. 

  8968.  # CONFIG_DECNET is not set
    8969. 

  8969.  # CONFIG_BRIDGE is not set
    8970. 

  8970.  # CONFIG_X25 is not set
    8971. 

  8971. @@ -633,7 +625,6 @@ CONFIG_AU1X00_SERIAL_CONSOLE=y
    8972. 

  8972.  # CONFIG_AU1X00_USB_TTY is not set
    8973. 

  8973.  # CONFIG_AU1X00_USB_RAW is not set
    8974. 

  8974.  # CONFIG_TXX927_SERIAL is not set
    8975. 

  8975. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    8976. 

  8976.  CONFIG_UNIX98_PTYS=y
    8977. 

  8977.  CONFIG_UNIX98_PTY_COUNT=256
    8978. 

  8978.  
    8979. 

  8979. --- a/arch/mips/defconfig-rbtx4927
    8980. 

  8980. +++ b/arch/mips/defconfig-rbtx4927
    8981. 

  8981. @@ -28,8 +28,8 @@ CONFIG_EXPERIMENTAL=y
    8982. 

  8982.  # CONFIG_MIPS_PB1000 is not set
    8983. 

  8983.  # CONFIG_MIPS_PB1100 is not set
    8984. 

  8984.  # CONFIG_MIPS_PB1500 is not set
    8985. 

  8985. -# CONFIG_MIPS_HYDROGEN3 is not set
    8986. 

  8986.  # CONFIG_MIPS_PB1550 is not set
    8987. 

  8987. +# CONFIG_MIPS_HYDROGEN3 is not set
    8988. 

  8988.  # CONFIG_MIPS_XXS1500 is not set
    8989. 

  8989.  # CONFIG_MIPS_MTX1 is not set
    8990. 

  8990.  # CONFIG_COGENT_CSB250 is not set
    8991. 

  8991. @@ -223,11 +223,6 @@ CONFIG_IP_PNP_DHCP=y
    8992. 

  8992.  #
    8993. 

  8993.  # CONFIG_IPX is not set
    8994. 

  8994.  # CONFIG_ATALK is not set
    8995. 

  8995. -
    8996. 

  8996. -#
    8997. 

  8997. -# Appletalk devices
    8998. 

  8998. -#
    8999. 

  8999. -# CONFIG_DEV_APPLETALK is not set
    9000. 

  9000.  # CONFIG_DECNET is not set
    9001. 

  9001.  # CONFIG_BRIDGE is not set
    9002. 

  9002.  # CONFIG_X25 is not set
    9003. 

  9003. @@ -466,7 +461,6 @@ CONFIG_SERIAL_NONSTANDARD=y
    9004. 

  9004.  CONFIG_SERIAL_TXX9=y
    9005. 

  9005.  CONFIG_SERIAL_TXX9_CONSOLE=y
    9006. 

  9006.  # CONFIG_TXX927_SERIAL is not set
    9007. 

  9007. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    9008. 

  9008.  # CONFIG_UNIX98_PTYS is not set
    9009. 

  9009.  
    9010. 

  9010.  #
    9011. 

  9011. --- a/arch/mips/defconfig-rm200
    9012. 

  9012. +++ b/arch/mips/defconfig-rm200
    9013. 

  9013. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    9014. 

  9014.  # CONFIG_MIPS_PB1000 is not set
    9015. 

  9015.  # CONFIG_MIPS_PB1100 is not set
    9016. 

  9016.  # CONFIG_MIPS_PB1500 is not set
    9017. 

  9017. -# CONFIG_MIPS_HYDROGEN3 is not set
    9018. 

  9018.  # CONFIG_MIPS_PB1550 is not set
    9019. 

  9019. +# CONFIG_MIPS_HYDROGEN3 is not set
    9020. 

  9020.  # CONFIG_MIPS_XXS1500 is not set
    9021. 

  9021.  # CONFIG_MIPS_MTX1 is not set
    9022. 

  9022.  # CONFIG_COGENT_CSB250 is not set
    9023. 

  9023. @@ -229,11 +229,6 @@ CONFIG_INET=y
    9024. 

  9024.  #
    9025. 

  9025.  # CONFIG_IPX is not set
    9026. 

  9026.  # CONFIG_ATALK is not set
    9027. 

  9027. -
    9028. 

  9028. -#
    9029. 

  9029. -# Appletalk devices
    9030. 

  9030. -#
    9031. 

  9031. -# CONFIG_DEV_APPLETALK is not set
    9032. 

  9032.  # CONFIG_DECNET is not set
    9033. 

  9033.  # CONFIG_BRIDGE is not set
    9034. 

  9034.  # CONFIG_X25 is not set
    9035. 

  9035. @@ -340,7 +335,6 @@ CONFIG_VT_CONSOLE=y
    9036. 

  9036.  # CONFIG_SERIAL is not set
    9037. 

  9037.  # CONFIG_SERIAL_EXTENDED is not set
    9038. 

  9038.  # CONFIG_SERIAL_NONSTANDARD is not set
    9039. 

  9039. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    9040. 

  9040.  CONFIG_UNIX98_PTYS=y
    9041. 

  9041.  CONFIG_UNIX98_PTY_COUNT=256
    9042. 

  9042.  
    9043. 

  9043. --- a/arch/mips/defconfig-sb1250-swarm
    9044. 

  9044. +++ b/arch/mips/defconfig-sb1250-swarm
    9045. 

  9045. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    9046. 

  9046.  # CONFIG_MIPS_PB1000 is not set
    9047. 

  9047.  # CONFIG_MIPS_PB1100 is not set
    9048. 

  9048.  # CONFIG_MIPS_PB1500 is not set
    9049. 

  9049. -# CONFIG_MIPS_HYDROGEN3 is not set
    9050. 

  9050.  # CONFIG_MIPS_PB1550 is not set
    9051. 

  9051. +# CONFIG_MIPS_HYDROGEN3 is not set
    9052. 

  9052.  # CONFIG_MIPS_XXS1500 is not set
    9053. 

  9053.  # CONFIG_MIPS_MTX1 is not set
    9054. 

  9054.  # CONFIG_COGENT_CSB250 is not set
    9055. 

  9055. @@ -90,6 +90,7 @@ CONFIG_SIBYTE_CFE=y
    9056. 

  9056.  # CONFIG_SIBYTE_TBPROF is not set
    9057. 

  9057.  CONFIG_SIBYTE_GENBUS_IDE=y
    9058. 

  9058.  CONFIG_SMP_CAPABLE=y
    9059. 

  9059. +CONFIG_MIPS_RTC=y
    9060. 

  9060.  # CONFIG_SNI_RM200_PCI is not set
    9061. 

  9061.  # CONFIG_TANBAC_TB0226 is not set
    9062. 

  9062.  # CONFIG_TANBAC_TB0229 is not set
    9063. 

  9063. @@ -253,11 +254,6 @@ CONFIG_INET=y
    9064. 

  9064.  #
    9065. 

  9065.  # CONFIG_IPX is not set
    9066. 

  9066.  # CONFIG_ATALK is not set
    9067. 

  9067. -
    9068. 

  9068. -#
    9069. 

  9069. -# Appletalk devices
    9070. 

  9070. -#
    9071. 

  9071. -# CONFIG_DEV_APPLETALK is not set
    9072. 

  9072.  # CONFIG_DECNET is not set
    9073. 

  9073.  # CONFIG_BRIDGE is not set
    9074. 

  9074.  # CONFIG_X25 is not set
    9075. 

  9075. @@ -469,7 +465,6 @@ CONFIG_SERIAL_NONSTANDARD=y
    9076. 

  9076.  CONFIG_SIBYTE_SB1250_DUART=y
    9077. 

  9077.  CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y
    9078. 

  9078.  CONFIG_SERIAL_CONSOLE=y
    9079. 

  9079. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    9080. 

  9080.  CONFIG_UNIX98_PTYS=y
    9081. 

  9081.  CONFIG_UNIX98_PTY_COUNT=256
    9082. 

  9082.  
    9083. 

  9083. --- a/arch/mips/defconfig-sead
    9084. 

  9084. +++ b/arch/mips/defconfig-sead
    9085. 

  9085. @@ -28,8 +28,8 @@ CONFIG_EXPERIMENTAL=y
    9086. 

  9086.  # CONFIG_MIPS_PB1000 is not set
    9087. 

  9087.  # CONFIG_MIPS_PB1100 is not set
    9088. 

  9088.  # CONFIG_MIPS_PB1500 is not set
    9089. 

  9089. -# CONFIG_MIPS_HYDROGEN3 is not set
    9090. 

  9090.  # CONFIG_MIPS_PB1550 is not set
    9091. 

  9091. +# CONFIG_MIPS_HYDROGEN3 is not set
    9092. 

  9092.  # CONFIG_MIPS_XXS1500 is not set
    9093. 

  9093.  # CONFIG_MIPS_MTX1 is not set
    9094. 

  9094.  # CONFIG_COGENT_CSB250 is not set
    9095. 

  9095. @@ -244,7 +244,6 @@ CONFIG_SERIAL=y
    9096. 

  9096.  CONFIG_SERIAL_CONSOLE=y
    9097. 

  9097.  # CONFIG_SERIAL_EXTENDED is not set
    9098. 

  9098.  # CONFIG_SERIAL_NONSTANDARD is not set
    9099. 

  9099. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    9100. 

  9100.  # CONFIG_UNIX98_PTYS is not set
    9101. 

  9101.  
    9102. 

  9102.  #
    9103. 

  9103. --- a/arch/mips/defconfig-stretch
    9104. 

  9104. +++ b/arch/mips/defconfig-stretch
    9105. 

  9105. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    9106. 

  9106.  # CONFIG_MIPS_PB1000 is not set
    9107. 

  9107.  # CONFIG_MIPS_PB1100 is not set
    9108. 

  9108.  # CONFIG_MIPS_PB1500 is not set
    9109. 

  9109. -# CONFIG_MIPS_HYDROGEN3 is not set
    9110. 

  9110.  # CONFIG_MIPS_PB1550 is not set
    9111. 

  9111. +# CONFIG_MIPS_HYDROGEN3 is not set
    9112. 

  9112.  # CONFIG_MIPS_XXS1500 is not set
    9113. 

  9113.  # CONFIG_MIPS_MTX1 is not set
    9114. 

  9114.  # CONFIG_COGENT_CSB250 is not set
    9115. 

  9115. @@ -240,11 +240,6 @@ CONFIG_IP_PNP_DHCP=y
    9116. 

  9116.  #
    9117. 

  9117.  # CONFIG_IPX is not set
    9118. 

  9118.  # CONFIG_ATALK is not set
    9119. 

  9119. -
    9120. 

  9120. -#
    9121. 

  9121. -# Appletalk devices
    9122. 

  9122. -#
    9123. 

  9123. -# CONFIG_DEV_APPLETALK is not set
    9124. 

  9124.  # CONFIG_DECNET is not set
    9125. 

  9125.  # CONFIG_BRIDGE is not set
    9126. 

  9126.  # CONFIG_X25 is not set
    9127. 

  9127. @@ -324,9 +319,11 @@ CONFIG_CHR_DEV_SG=y
    9128. 

  9128.  # CONFIG_SCSI_MEGARAID is not set
    9129. 

  9129.  # CONFIG_SCSI_MEGARAID2 is not set
    9130. 

  9130.  # CONFIG_SCSI_SATA is not set
    9131. 

  9131. +# CONFIG_SCSI_SATA_AHCI is not set
    9132. 

  9132.  # CONFIG_SCSI_SATA_SVW is not set
    9133. 

  9133.  # CONFIG_SCSI_ATA_PIIX is not set
    9134. 

  9134.  # CONFIG_SCSI_SATA_NV is not set
    9135. 

  9135. +# CONFIG_SCSI_SATA_QSTOR is not set
    9136. 

  9136.  # CONFIG_SCSI_SATA_PROMISE is not set
    9137. 

  9137.  # CONFIG_SCSI_SATA_SX4 is not set
    9138. 

  9138.  # CONFIG_SCSI_SATA_SIL is not set
    9139. 

  9139. @@ -516,7 +513,6 @@ CONFIG_SERIAL_NONSTANDARD=y
    9140. 

  9140.  # CONFIG_SERIAL_TXX9 is not set
    9141. 

  9141.  # CONFIG_SERIAL_TXX9_CONSOLE is not set
    9142. 

  9142.  # CONFIG_TXX927_SERIAL is not set
    9143. 

  9143. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    9144. 

  9144.  CONFIG_UNIX98_PTYS=y
    9145. 

  9145.  CONFIG_UNIX98_PTY_COUNT=256
    9146. 

  9146.  
    9147. 

  9147. --- a/arch/mips/defconfig-tb0226
    9148. 

  9148. +++ b/arch/mips/defconfig-tb0226
    9149. 

  9149. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    9150. 

  9150.  # CONFIG_MIPS_PB1000 is not set
    9151. 

  9151.  # CONFIG_MIPS_PB1100 is not set
    9152. 

  9152.  # CONFIG_MIPS_PB1500 is not set
    9153. 

  9153. -# CONFIG_MIPS_HYDROGEN3 is not set
    9154. 

  9154.  # CONFIG_MIPS_PB1550 is not set
    9155. 

  9155. +# CONFIG_MIPS_HYDROGEN3 is not set
    9156. 

  9156.  # CONFIG_MIPS_XXS1500 is not set
    9157. 

  9157.  # CONFIG_MIPS_MTX1 is not set
    9158. 

  9158.  # CONFIG_COGENT_CSB250 is not set
    9159. 

  9159. @@ -228,11 +228,6 @@ CONFIG_IP_PNP_BOOTP=y
    9160. 

  9160.  #
    9161. 

  9161.  # CONFIG_IPX is not set
    9162. 

  9162.  # CONFIG_ATALK is not set
    9163. 

  9163. -
    9164. 

  9164. -#
    9165. 

  9165. -# Appletalk devices
    9166. 

  9166. -#
    9167. 

  9167. -# CONFIG_DEV_APPLETALK is not set
    9168. 

  9168.  # CONFIG_DECNET is not set
    9169. 

  9169.  # CONFIG_BRIDGE is not set
    9170. 

  9170.  # CONFIG_X25 is not set
    9171. 

  9171. @@ -312,9 +307,11 @@ CONFIG_SCSI_CONSTANTS=y
    9172. 

  9172.  # CONFIG_SCSI_MEGARAID is not set
    9173. 

  9173.  # CONFIG_SCSI_MEGARAID2 is not set
    9174. 

  9174.  # CONFIG_SCSI_SATA is not set
    9175. 

  9175. +# CONFIG_SCSI_SATA_AHCI is not set
    9176. 

  9176.  # CONFIG_SCSI_SATA_SVW is not set
    9177. 

  9177.  # CONFIG_SCSI_ATA_PIIX is not set
    9178. 

  9178.  # CONFIG_SCSI_SATA_NV is not set
    9179. 

  9179. +# CONFIG_SCSI_SATA_QSTOR is not set
    9180. 

  9180.  # CONFIG_SCSI_SATA_PROMISE is not set
    9181. 

  9181.  # CONFIG_SCSI_SATA_SX4 is not set
    9182. 

  9182.  # CONFIG_SCSI_SATA_SIL is not set
    9183. 

  9183. @@ -518,7 +515,6 @@ CONFIG_SERIAL=y
    9184. 

  9184.  CONFIG_SERIAL_CONSOLE=y
    9185. 

  9185.  # CONFIG_SERIAL_EXTENDED is not set
    9186. 

  9186.  # CONFIG_SERIAL_NONSTANDARD is not set
    9187. 

  9187. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    9188. 

  9188.  # CONFIG_VR41XX_KIU is not set
    9189. 

  9189.  CONFIG_UNIX98_PTYS=y
    9190. 

  9190.  CONFIG_UNIX98_PTY_COUNT=256
    9191. 

  9191. --- a/arch/mips/defconfig-tb0229
    9192. 

  9192. +++ b/arch/mips/defconfig-tb0229
    9193. 

  9193. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    9194. 

  9194.  # CONFIG_MIPS_PB1000 is not set
    9195. 

  9195.  # CONFIG_MIPS_PB1100 is not set
    9196. 

  9196.  # CONFIG_MIPS_PB1500 is not set
    9197. 

  9197. -# CONFIG_MIPS_HYDROGEN3 is not set
    9198. 

  9198.  # CONFIG_MIPS_PB1550 is not set
    9199. 

  9199. +# CONFIG_MIPS_HYDROGEN3 is not set
    9200. 

  9200.  # CONFIG_MIPS_XXS1500 is not set
    9201. 

  9201.  # CONFIG_MIPS_MTX1 is not set
    9202. 

  9202.  # CONFIG_COGENT_CSB250 is not set
    9203. 

  9203. @@ -230,11 +230,6 @@ CONFIG_IP_PNP_BOOTP=y
    9204. 

  9204.  #
    9205. 

  9205.  # CONFIG_IPX is not set
    9206. 

  9206.  # CONFIG_ATALK is not set
    9207. 

  9207. -
    9208. 

  9208. -#
    9209. 

  9209. -# Appletalk devices
    9210. 

  9210. -#
    9211. 

  9211. -# CONFIG_DEV_APPLETALK is not set
    9212. 

  9212.  # CONFIG_DECNET is not set
    9213. 

  9213.  # CONFIG_BRIDGE is not set
    9214. 

  9214.  # CONFIG_X25 is not set
    9215. 

  9215. @@ -445,7 +440,6 @@ CONFIG_SERIAL=y
    9216. 

  9216.  CONFIG_SERIAL_CONSOLE=y
    9217. 

  9217.  # CONFIG_SERIAL_EXTENDED is not set
    9218. 

  9218.  # CONFIG_SERIAL_NONSTANDARD is not set
    9219. 

  9219. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    9220. 

  9220.  # CONFIG_VR41XX_KIU is not set
    9221. 

  9221.  CONFIG_UNIX98_PTYS=y
    9222. 

  9222.  CONFIG_UNIX98_PTY_COUNT=256
    9223. 

  9223. --- a/arch/mips/defconfig-ti1500
    9224. 

  9224. +++ b/arch/mips/defconfig-ti1500
    9225. 

  9225. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    9226. 

  9226.  # CONFIG_MIPS_PB1000 is not set
    9227. 

  9227.  # CONFIG_MIPS_PB1100 is not set
    9228. 

  9228.  # CONFIG_MIPS_PB1500 is not set
    9229. 

  9229. -# CONFIG_MIPS_HYDROGEN3 is not set
    9230. 

  9230.  # CONFIG_MIPS_PB1550 is not set
    9231. 

  9231. +# CONFIG_MIPS_HYDROGEN3 is not set
    9232. 

  9232.  CONFIG_MIPS_XXS1500=y
    9233. 

  9233.  # CONFIG_MIPS_MTX1 is not set
    9234. 

  9234.  # CONFIG_COGENT_CSB250 is not set
    9235. 

  9235. @@ -213,9 +213,7 @@ CONFIG_MTD_CFI_AMDSTD=y
    9236. 

  9236.  # CONFIG_MTD_BOSPORUS is not set
    9237. 

  9237.  CONFIG_MTD_XXS1500=y
    9238. 

  9238.  # CONFIG_MTD_MTX1 is not set
    9239. 

  9239. -# CONFIG_MTD_DB1X00 is not set
    9240. 

  9240.  # CONFIG_MTD_PB1550 is not set
    9241. 

  9241. -# CONFIG_MTD_HYDROGEN3 is not set
    9242. 

  9242.  # CONFIG_MTD_MIRAGE is not set
    9243. 

  9243.  # CONFIG_MTD_CSTM_MIPS_IXX is not set
    9244. 

  9244.  # CONFIG_MTD_OCELOT is not set
    9245. 

  9245. @@ -234,7 +232,6 @@ CONFIG_MTD_XXS1500=y
    9246. 

  9246.  #
    9247. 

  9247.  # Disk-On-Chip Device Drivers
    9248. 

  9248.  #
    9249. 

  9249. -# CONFIG_MTD_DOC1000 is not set
    9250. 

  9250.  # CONFIG_MTD_DOC2000 is not set
    9251. 

  9251.  # CONFIG_MTD_DOC2001 is not set
    9252. 

  9252.  # CONFIG_MTD_DOCPROBE is not set
    9253. 

  9253. @@ -339,11 +336,6 @@ CONFIG_IP_PNP_BOOTP=y
    9254. 

  9254.  #
    9255. 

  9255.  # CONFIG_IPX is not set
    9256. 

  9256.  # CONFIG_ATALK is not set
    9257. 

  9257. -
    9258. 

  9258. -#
    9259. 

  9259. -# Appletalk devices
    9260. 

  9260. -#
    9261. 

  9261. -# CONFIG_DEV_APPLETALK is not set
    9262. 

  9262.  # CONFIG_DECNET is not set
    9263. 

  9263.  # CONFIG_BRIDGE is not set
    9264. 

  9264.  # CONFIG_X25 is not set
    9265. 

  9265. @@ -600,7 +592,6 @@ CONFIG_AU1X00_SERIAL_CONSOLE=y
    9266. 

  9266.  # CONFIG_AU1X00_USB_TTY is not set
    9267. 

  9267.  # CONFIG_AU1X00_USB_RAW is not set
    9268. 

  9268.  # CONFIG_TXX927_SERIAL is not set
    9269. 

  9269. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    9270. 

  9270.  CONFIG_UNIX98_PTYS=y
    9271. 

  9271.  CONFIG_UNIX98_PTY_COUNT=256
    9272. 

  9272.  
    9273. 

  9273. --- a/arch/mips/defconfig-workpad
    9274. 

  9274. +++ b/arch/mips/defconfig-workpad
    9275. 

  9275. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    9276. 

  9276.  # CONFIG_MIPS_PB1000 is not set
    9277. 

  9277.  # CONFIG_MIPS_PB1100 is not set
    9278. 

  9278.  # CONFIG_MIPS_PB1500 is not set
    9279. 

  9279. -# CONFIG_MIPS_HYDROGEN3 is not set
    9280. 

  9280.  # CONFIG_MIPS_PB1550 is not set
    9281. 

  9281. +# CONFIG_MIPS_HYDROGEN3 is not set
    9282. 

  9282.  # CONFIG_MIPS_XXS1500 is not set
    9283. 

  9283.  # CONFIG_MIPS_MTX1 is not set
    9284. 

  9284.  # CONFIG_COGENT_CSB250 is not set
    9285. 

  9285. @@ -222,11 +222,6 @@ CONFIG_IP_MULTICAST=y
    9286. 

  9286.  #
    9287. 

  9287.  # CONFIG_IPX is not set
    9288. 

  9288.  # CONFIG_ATALK is not set
    9289. 

  9289. -
    9290. 

  9290. -#
    9291. 

  9291. -# Appletalk devices
    9292. 

  9292. -#
    9293. 

  9293. -# CONFIG_DEV_APPLETALK is not set
    9294. 

  9294.  # CONFIG_DECNET is not set
    9295. 

  9295.  # CONFIG_BRIDGE is not set
    9296. 

  9296.  # CONFIG_X25 is not set
    9297. 

  9297. @@ -426,7 +421,6 @@ CONFIG_SERIAL_MANY_PORTS=y
    9298. 

  9298.  # CONFIG_SERIAL_MULTIPORT is not set
    9299. 

  9299.  # CONFIG_HUB6 is not set
    9300. 

  9300.  # CONFIG_SERIAL_NONSTANDARD is not set
    9301. 

  9301. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    9302. 

  9302.  # CONFIG_VR41XX_KIU is not set
    9303. 

  9303.  CONFIG_UNIX98_PTYS=y
    9304. 

  9304.  CONFIG_UNIX98_PTY_COUNT=256
    9305. 

  9305. --- a/arch/mips/defconfig-xxs1500
    9306. 

  9306. +++ b/arch/mips/defconfig-xxs1500
    9307. 

  9307. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    9308. 

  9308.  # CONFIG_MIPS_PB1000 is not set
    9309. 

  9309.  # CONFIG_MIPS_PB1100 is not set
    9310. 

  9310.  # CONFIG_MIPS_PB1500 is not set
    9311. 

  9311. -# CONFIG_MIPS_HYDROGEN3 is not set
    9312. 

  9312.  # CONFIG_MIPS_PB1550 is not set
    9313. 

  9313. +# CONFIG_MIPS_HYDROGEN3 is not set
    9314. 

  9314.  CONFIG_MIPS_XXS1500=y
    9315. 

  9315.  # CONFIG_MIPS_MTX1 is not set
    9316. 

  9316.  # CONFIG_COGENT_CSB250 is not set
    9317. 

  9317. @@ -213,9 +213,7 @@ CONFIG_MTD_CFI_AMDSTD=y
    9318. 

  9318.  # CONFIG_MTD_BOSPORUS is not set
    9319. 

  9319.  CONFIG_MTD_XXS1500=y
    9320. 

  9320.  # CONFIG_MTD_MTX1 is not set
    9321. 

  9321. -# CONFIG_MTD_DB1X00 is not set
    9322. 

  9322.  # CONFIG_MTD_PB1550 is not set
    9323. 

  9323. -# CONFIG_MTD_HYDROGEN3 is not set
    9324. 

  9324.  # CONFIG_MTD_MIRAGE is not set
    9325. 

  9325.  # CONFIG_MTD_CSTM_MIPS_IXX is not set
    9326. 

  9326.  # CONFIG_MTD_OCELOT is not set
    9327. 

  9327. @@ -234,7 +232,6 @@ CONFIG_MTD_XXS1500=y
    9328. 

  9328.  #
    9329. 

  9329.  # Disk-On-Chip Device Drivers
    9330. 

  9330.  #
    9331. 

  9331. -# CONFIG_MTD_DOC1000 is not set
    9332. 

  9332.  # CONFIG_MTD_DOC2000 is not set
    9333. 

  9333.  # CONFIG_MTD_DOC2001 is not set
    9334. 

  9334.  # CONFIG_MTD_DOCPROBE is not set
    9335. 

  9335. @@ -339,11 +336,6 @@ CONFIG_IP_PNP_BOOTP=y
    9336. 

  9336.  #
    9337. 

  9337.  # CONFIG_IPX is not set
    9338. 

  9338.  # CONFIG_ATALK is not set
    9339. 

  9339. -
    9340. 

  9340. -#
    9341. 

  9341. -# Appletalk devices
    9342. 

  9342. -#
    9343. 

  9343. -# CONFIG_DEV_APPLETALK is not set
    9344. 

  9344.  # CONFIG_DECNET is not set
    9345. 

  9345.  # CONFIG_BRIDGE is not set
    9346. 

  9346.  # CONFIG_X25 is not set
    9347. 

  9347. @@ -671,7 +663,6 @@ CONFIG_AU1X00_SERIAL_CONSOLE=y
    9348. 

  9348.  # CONFIG_AU1X00_USB_TTY is not set
    9349. 

  9349.  # CONFIG_AU1X00_USB_RAW is not set
    9350. 

  9350.  # CONFIG_TXX927_SERIAL is not set
    9351. 

  9351. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    9352. 

  9352.  CONFIG_UNIX98_PTYS=y
    9353. 

  9353.  CONFIG_UNIX98_PTY_COUNT=256
    9354. 

  9354.  
    9355. 

  9355. --- a/arch/mips/defconfig-yosemite
    9356. 

  9356. +++ b/arch/mips/defconfig-yosemite
    9357. 

  9357. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    9358. 

  9358.  # CONFIG_MIPS_PB1000 is not set
    9359. 

  9359.  # CONFIG_MIPS_PB1100 is not set
    9360. 

  9360.  # CONFIG_MIPS_PB1500 is not set
    9361. 

  9361. -# CONFIG_MIPS_HYDROGEN3 is not set
    9362. 

  9362.  # CONFIG_MIPS_PB1550 is not set
    9363. 

  9363. +# CONFIG_MIPS_HYDROGEN3 is not set
    9364. 

  9364.  # CONFIG_MIPS_XXS1500 is not set
    9365. 

  9365.  # CONFIG_MIPS_MTX1 is not set
    9366. 

  9366.  # CONFIG_COGENT_CSB250 is not set
    9367. 

  9367. @@ -227,11 +227,6 @@ CONFIG_IP_PNP_DHCP=y
    9368. 

  9368.  #
    9369. 

  9369.  # CONFIG_IPX is not set
    9370. 

  9370.  # CONFIG_ATALK is not set
    9371. 

  9371. -
    9372. 

  9372. -#
    9373. 

  9373. -# Appletalk devices
    9374. 

  9374. -#
    9375. 

  9375. -# CONFIG_DEV_APPLETALK is not set
    9376. 

  9376.  # CONFIG_DECNET is not set
    9377. 

  9377.  # CONFIG_BRIDGE is not set
    9378. 

  9378.  # CONFIG_X25 is not set
    9379. 

  9379. @@ -310,9 +305,11 @@ CONFIG_CHR_DEV_SG=y
    9380. 

  9380.  # CONFIG_SCSI_MEGARAID is not set
    9381. 

  9381.  # CONFIG_SCSI_MEGARAID2 is not set
    9382. 

  9382.  # CONFIG_SCSI_SATA is not set
    9383. 

  9383. +# CONFIG_SCSI_SATA_AHCI is not set
    9384. 

  9384.  # CONFIG_SCSI_SATA_SVW is not set
    9385. 

  9385.  # CONFIG_SCSI_ATA_PIIX is not set
    9386. 

  9386.  # CONFIG_SCSI_SATA_NV is not set
    9387. 

  9387. +# CONFIG_SCSI_SATA_QSTOR is not set
    9388. 

  9388.  # CONFIG_SCSI_SATA_PROMISE is not set
    9389. 

  9389.  # CONFIG_SCSI_SATA_SX4 is not set
    9390. 

  9390.  # CONFIG_SCSI_SATA_SIL is not set
    9391. 

  9391. @@ -477,7 +474,6 @@ CONFIG_SERIAL_NONSTANDARD=y
    9392. 

  9392.  # CONFIG_SERIAL_TXX9 is not set
    9393. 

  9393.  # CONFIG_SERIAL_TXX9_CONSOLE is not set
    9394. 

  9394.  # CONFIG_TXX927_SERIAL is not set
    9395. 

  9395. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    9396. 

  9396.  CONFIG_UNIX98_PTYS=y
    9397. 

  9397.  CONFIG_UNIX98_PTY_COUNT=256
    9398. 

  9398.  
    9399. 

  9399. --- a/arch/mips/kernel/cpu-probe.c
    9400. 

  9400. +++ b/arch/mips/kernel/cpu-probe.c
    9401. 

  9401. @@ -34,21 +34,16 @@ static void r4k_wait(void)
    9402. 

  9402.  		".set\tmips0");
    9403. 

  9403.  }
    9404. 

  9404.  
    9405. 

  9405. -/* The Au1xxx wait is available only if we run CONFIG_PM and
    9406. 

  9406. - * the timer setup found we had a 32KHz counter available.
    9407. 

  9407. - * There are still problems with functions that may call au1k_wait
    9408. 

  9408. - * directly, but that will be discovered pretty quickly.
    9409. 

  9409. - */
    9410. 

  9410. -extern void (*au1k_wait_ptr)(void);
    9411. 

  9411. -void au1k_wait(void)
    9412. 

  9412. +/* The Au1xxx wait is available only if using 32khz counter or
    9413. 

  9413. + * external timer source, but specifically not CP0 Counter. */
    9414. 

  9414. +int allow_au1k_wait; 
    9415. 

  9415. +
    9416. 

  9416. +static void au1k_wait(void)
    9417. 

  9417.  {
    9418. 

  9418. -#ifdef CONFIG_PM
    9419. 

  9419. -	unsigned long addr;
    9420. 

  9420.  	/* using the wait instruction makes CP0 counter unusable */
    9421. 

  9421. -	__asm__("la %0,au1k_wait\n\t"
    9422. 

  9422. -		".set mips3\n\t"
    9423. 

  9423. -		"cache 0x14,0(%0)\n\t"
    9424. 

  9424. -		"cache 0x14,32(%0)\n\t"
    9425. 

  9425. +	__asm__(".set mips3\n\t"
    9426. 

  9426. +		"cache 0x14, 0(%0)\n\t"
    9427. 

  9427. +		"cache 0x14, 32(%0)\n\t"
    9428. 

  9428.  		"sync\n\t"
    9429. 

  9429.  		"nop\n\t"
    9430. 

  9430.  		"wait\n\t"
    9431. 

  9431. @@ -57,11 +52,7 @@ void au1k_wait(void)
    9432. 

  9432.  		"nop\n\t"
    9433. 

  9433.  		"nop\n\t"
    9434. 

  9434.  		".set mips0\n\t"
    9435. 

  9435. -		: : "r" (addr));
    9436. 

  9436. -#else
    9437. 

  9437. -	__asm__("nop\n\t"
    9438. 

  9438. -		"nop");
    9439. 

  9439. -#endif
    9440. 

  9440. +		: : "r" (au1k_wait));
    9441. 

  9441.  }
    9442. 

  9442.  
    9443. 

  9443.  static inline void check_wait(void)
    9444. 

  9444. @@ -100,20 +91,17 @@ static inline void check_wait(void)
    9445. 

  9445.  		cpu_wait = r4k_wait;
    9446. 

  9446.  		printk(" available.\n");
    9447. 

  9447.  		break;
    9448. 

  9448. -#ifdef CONFIG_PM
    9449. 

  9449.  	case CPU_AU1000:
    9450. 

  9450.  	case CPU_AU1100:
    9451. 

  9451.  	case CPU_AU1500:
    9452. 

  9452.  	case CPU_AU1550:
    9453. 

  9453. -		if (au1k_wait_ptr != NULL) {
    9454. 

  9454. -			cpu_wait = au1k_wait_ptr;
    9455. 

  9455. +	case CPU_AU1200:
    9456. 

  9456. +		if (allow_au1k_wait) {
    9457. 

  9457. +			cpu_wait = au1k_wait;
    9458. 

  9458.  			printk(" available.\n");
    9459. 

  9459. -		}
    9460. 

  9460. -		else {
    9461. 

  9461. +		} else
    9462. 

  9462.  			printk(" unavailable.\n");
    9463. 

  9463. -		}
    9464. 

  9464.  		break;
    9465. 

  9465. -#endif
    9466. 

  9466.  	default:
    9467. 

  9467.  		printk(" unavailable.\n");
    9468. 

  9468.  		break;
    9469. 

  9469. --- a/arch/mips/kernel/head.S
    9470. 

  9470. +++ b/arch/mips/kernel/head.S
    9471. 

  9471. @@ -43,9 +43,9 @@
    9472. 

  9472.  
    9473. 

  9473.  		/* Cache Error */
    9474. 

  9474.  		LEAF(except_vec2_generic)
    9475. 

  9475. +		.set	push
    9476. 

  9476.  		.set	noreorder
    9477. 

  9477.  		.set	noat
    9478. 

  9478. -		.set    mips0
    9479. 

  9479.  		/*
    9480. 

  9480.  		 * This is a very bad place to be.  Our cache error
    9481. 

  9481.  		 * detection has triggered.  If we have write-back data
    9482. 

  9482. @@ -64,10 +64,9 @@
    9483. 

  9483.  
    9484. 

  9484.  		j	cache_parity_error
    9485. 

  9485.  		 nop
    9486. 

  9486. +		.set	pop
    9487. 

  9487.  		END(except_vec2_generic)
    9488. 

  9488.  
    9489. 

  9489. -		.set	at
    9490. 

  9490. -
    9491. 

  9491.  		/*
    9492. 

  9492.  		 * Special interrupt vector for embedded MIPS.  This is a
    9493. 

  9493.  		 * dedicated interrupt vector which reduces interrupt processing
    9494. 

  9494. @@ -76,8 +75,11 @@
    9495. 

  9495.  		 * size!
    9496. 

  9496.  		 */
    9497. 

  9497.  		NESTED(except_vec4, 0, sp)
    9498. 

  9498. +		.set	push
    9499. 

  9499. +		.set	noreorder
    9500. 

  9500.  1:		j	1b			/* Dummy, will be replaced */
    9501. 

  9501.  		 nop
    9502. 

  9502. +		.set	pop
    9503. 

  9503.  		END(except_vec4)
    9504. 

  9504.  
    9505. 

  9505.  		/*
    9506. 

  9506. @@ -87,8 +89,11 @@
    9507. 

  9507.  		 * unconditional jump to this vector.
    9508. 

  9508.  		 */
    9509. 

  9509.  		NESTED(except_vec_ejtag_debug, 0, sp)
    9510. 

  9510. +		.set	push
    9511. 

  9511. +		.set	noreorder
    9512. 

  9512.  		j	ejtag_debug_handler
    9513. 

  9513.  		 nop
    9514. 

  9514. +		.set	pop
    9515. 

  9515.  		END(except_vec_ejtag_debug)
    9516. 

  9516.  
    9517. 

  9517.  		__FINIT
    9518. 

  9518. @@ -97,6 +102,7 @@
    9519. 

  9519.  		 * EJTAG debug exception handler.
    9520. 

  9520.  		 */
    9521. 

  9521.  		NESTED(ejtag_debug_handler, PT_SIZE, sp)
    9522. 

  9522. +		.set	push
    9523. 

  9523.  		.set	noat
    9524. 

  9524.  		.set	noreorder
    9525. 

  9525.  		mtc0	k0, CP0_DESAVE
    9526. 

  9526. @@ -120,7 +126,7 @@ ejtag_return:
    9527. 

  9527.  		deret
    9528. 

  9528.  		.set	mips0
    9529. 

  9529.  		 nop
    9530. 

  9530. -		.set	at
    9531. 

  9531. +		.set	pop
    9532. 

  9532.  		END(ejtag_debug_handler)
    9533. 

  9533.  
    9534. 

  9534.  		__INIT
    9535. 

  9535. @@ -132,13 +138,17 @@ ejtag_return:
    9536. 

  9536.  		* unconditional jump to this vector.
    9537. 

  9537.  		*/
    9538. 

  9538.  		NESTED(except_vec_nmi, 0, sp)
    9539. 

  9539. +		.set	push
    9540. 

  9540. +		.set	noreorder
    9541. 

  9541.  		j       nmi_handler
    9542. 

  9542.  		 nop
    9543. 

  9543. +		.set	pop
    9544. 

  9544.  		END(except_vec_nmi)
    9545. 

  9545.  
    9546. 

  9546.  		__FINIT
    9547. 

  9547.  
    9548. 

  9548.  		NESTED(nmi_handler, PT_SIZE, sp)
    9549. 

  9549. +		.set	push
    9550. 

  9550.  		.set    noat
    9551. 

  9551.  		.set    noreorder
    9552. 

  9552.  		.set    mips3
    9553. 

  9553. @@ -147,8 +157,7 @@ ejtag_return:
    9554. 

  9554.  		 move   a0, sp
    9555. 

  9555.  		RESTORE_ALL
    9556. 

  9556.  		eret
    9557. 

  9557. -		.set    at
    9558. 

  9558. -		.set    mips0
    9559. 

  9559. +		.set	pop
    9560. 

  9560.  		END(nmi_handler)
    9561. 

  9561.  
    9562. 

  9562.  		__INIT
    9563. 

  9563. @@ -157,7 +166,20 @@ ejtag_return:
    9564. 

  9564.  		 * Kernel entry point
    9565. 

  9565.  		 */
    9566. 

  9566.  		NESTED(kernel_entry, 16, sp)
    9567. 

  9567. +		.set	push
    9568. 

  9568. +		/*
    9569. 

  9569. +		 * For the moment disable interrupts and mark the kernel mode.
    9570. 

  9570. +		 * A full initialization of the CPU's status register is done
    9571. 

  9571. +		 * later in per_cpu_trap_init().
    9572. 

  9572. +		 */
    9573. 

  9573. +		mfc0	t0, CP0_STATUS
    9574. 

  9574. +		or	t0, ST0_CU0|0x1f
    9575. 

  9575. +		xor	t0, 0x1f
    9576. 

  9576. +		mtc0	t0, CP0_STATUS
    9577. 

  9577. +
    9578. 

  9578.  		.set	noreorder
    9579. 

  9579. +		sll	zero,3				# ehb
    9580. 

  9580. +		.set	reorder
    9581. 

  9581.  
    9582. 

  9582.  		/*
    9583. 

  9583.  		 * The firmware/bootloader passes argc/argp/envp
    9584. 

  9584. @@ -170,8 +192,8 @@ ejtag_return:
    9585. 

  9585.  		la	t1, (_end - 4)
    9586. 

  9586.  1:
    9587. 

  9587.  		addiu	t0, 4
    9588. 

  9588. +		sw	zero, (t0)
    9589. 

  9589.  		bne	t0, t1, 1b
    9590. 

  9590. -		 sw	zero, (t0)
    9591. 

  9591.  
    9592. 

  9592.  		/*
    9593. 

  9593.  		 * Stack for kernel and init, current variable
    9594. 

  9594. @@ -182,7 +204,7 @@ ejtag_return:
    9595. 

  9595.  		sw	t0, kernelsp
    9596. 

  9596.  
    9597. 

  9597.  		jal	init_arch
    9598. 

  9598. -		 nop
    9599. 

  9599. +		.set	pop
    9600. 

  9600.  		END(kernel_entry)
    9601. 

  9601.  
    9602. 

  9602.  
    9603. 

  9603. @@ -193,17 +215,26 @@ ejtag_return:
    9604. 

  9604.   * function after setting up the stack and gp registers.
    9605. 

  9605.   */
    9606. 

  9606.  		LEAF(smp_bootstrap)
    9607. 

  9607. -		.set push
    9608. 

  9608. -		.set noreorder
    9609. 

  9609. -		mtc0	zero, CP0_WIRED
    9610. 

  9610. -		CLI
    9611. 

  9611. +		.set	push
    9612. 

  9612. +		/*
    9613. 

  9613. +		 * For the moment disable interrupts and bootstrap exception
    9614. 

  9614. +		 * vectors and mark the kernel mode.  A full initialization of
    9615. 

  9615. +		 * the CPU's status register is done later in
    9616. 

  9616. +		 * per_cpu_trap_init().
    9617. 

  9617. +		 */
    9618. 

  9618.  		mfc0	t0, CP0_STATUS
    9619. 

  9619. -		li	t1, ~(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_UX)
    9620. 

  9620. -		and	t0, t1
    9621. 

  9621. -		or	t0, (ST0_CU0);
    9622. 

  9622. +		or	t0, ST0_CU0|ST0_BEV|0x1f
    9623. 

  9623. +		xor	t0, ST0_BEV|0x1f
    9624. 

  9624. +		mtc0	t0, CP0_STATUS
    9625. 

  9625. +
    9626. 

  9626. +		.set	noreorder
    9627. 

  9627. +		sll	zero,3				# ehb
    9628. 

  9628. +		.set	reorder
    9629. 

  9629. +
    9630. 

  9630. +		mtc0	zero, CP0_WIRED
    9631. 

  9631. +
    9632. 

  9632.  		jal	start_secondary
    9633. 

  9633. -		 mtc0	t0, CP0_STATUS
    9634. 

  9634. -		.set pop
    9635. 

  9635. +		.set	pop
    9636. 

  9636.  		END(smp_bootstrap)
    9637. 

  9637.  #endif
    9638. 

  9638.  
    9639. 

  9639. --- a/arch/mips/kernel/process.c
    9640. 

  9640. +++ b/arch/mips/kernel/process.c
    9641. 

  9641. @@ -128,6 +128,26 @@ int dump_fpu(struct pt_regs *regs, elf_f
    9642. 

  9642.  	return 1;
    9643. 

  9643.  }
    9644. 

  9644.  
    9645. 

  9645. +void dump_regs(elf_greg_t *gp, struct pt_regs *regs)
    9646. 

  9646. +{
    9647. 

  9647. +	int i;
    9648. 

  9648. +
    9649. 

  9649. +	for (i = 0; i < EF_REG0; i++)
    9650. 

  9650. +		gp[i] = 0;
    9651. 

  9651. +	gp[EF_REG0] = 0;
    9652. 

  9652. +	for (i = 1; i <= 31; i++)
    9653. 

  9653. +		gp[EF_REG0 + i] = regs->regs[i];
    9654. 

  9654. +	gp[EF_REG26] = 0;
    9655. 

  9655. +	gp[EF_REG27] = 0;
    9656. 

  9656. +	gp[EF_LO] = regs->lo;
    9657. 

  9657. +	gp[EF_HI] = regs->hi;
    9658. 

  9658. +	gp[EF_CP0_EPC] = regs->cp0_epc;
    9659. 

  9659. +	gp[EF_CP0_BADVADDR] = regs->cp0_badvaddr;
    9660. 

  9660. +	gp[EF_CP0_STATUS] = regs->cp0_status;
    9661. 

  9661. +	gp[EF_CP0_CAUSE] = regs->cp0_cause;
    9662. 

  9662. +	gp[EF_UNUSED0] = 0;
    9663. 

  9663. +}
    9664. 

  9664. +
    9665. 

  9665.  /*
    9666. 

  9666.   * Create a kernel thread
    9667. 

  9667.   */
    9668. 

  9668. --- a/arch/mips/kernel/scall_o32.S
    9669. 

  9669. +++ b/arch/mips/kernel/scall_o32.S
    9670. 

  9670. @@ -121,15 +121,14 @@ reschedule:
    9671. 

  9671.  
    9672. 

  9672.  trace_a_syscall:
    9673. 

  9673.  	SAVE_STATIC
    9674. 

  9674. -	sw	t2, PT_R1(sp)
    9675. 

  9675. +	move	s0, t2
    9676. 

  9676.  	jal	syscall_trace
    9677. 

  9677. -	lw	t2, PT_R1(sp)
    9678. 

  9678.  
    9679. 

  9679.  	lw	a0, PT_R4(sp)		# Restore argument registers
    9680. 

  9680.  	lw	a1, PT_R5(sp)
    9681. 

  9681.  	lw	a2, PT_R6(sp)
    9682. 

  9682.  	lw	a3, PT_R7(sp)
    9683. 

  9683. -	jalr	t2
    9684. 

  9684. +	jalr	s0
    9685. 

  9685.  
    9686. 

  9686.  	li	t0, -EMAXERRNO - 1	# error?
    9687. 

  9687.  	sltu	t0, t0, v0
    9688. 

  9688. --- a/arch/mips/kernel/setup.c
    9689. 

  9689. +++ b/arch/mips/kernel/setup.c
    9690. 

  9690. @@ -5,7 +5,7 @@
    9691. 

  9691.   *
    9692. 

  9692.   * Copyright (C) 1995  Linus Torvalds
    9693. 

  9693.   * Copyright (C) 1995  Waldorf Electronics
    9694. 

  9694. - * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2001  Ralf Baechle
    9695. 

  9695. + * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 01, 05  Ralf Baechle
    9696. 

  9696.   * Copyright (C) 1996  Stoned Elipot
    9697. 

  9697.   * Copyright (C) 2000, 2001, 2002  Maciej W. Rozycki
    9698. 

  9698.   */
    9699. 

  9699. @@ -71,6 +71,8 @@ extern void * __rd_start, * __rd_end;
    9700. 

  9700.  extern struct rtc_ops no_rtc_ops;
    9701. 

  9701.  struct rtc_ops *rtc_ops;
    9702. 

  9702.  
    9703. 

  9703. +EXPORT_SYMBOL(rtc_ops);
    9704. 

  9704. +
    9705. 

  9705.  #ifdef CONFIG_PC_KEYB
    9706. 

  9706.  struct kbd_ops *kbd_ops;
    9707. 

  9707.  #endif
    9708. 

  9708. @@ -132,10 +134,6 @@ init_arch(int argc, char **argv, char **
    9709. 

  9709.  	 */
    9710. 

  9710.  	load_mmu();
    9711. 

  9711.  
    9712. 

  9712. -	/* Disable coprocessors and set FPU for 16/32 FPR register model */
    9713. 

  9713. -	clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_FR);
    9714. 

  9714. -	set_c0_status(ST0_CU0);
    9715. 

  9715. -
    9716. 

  9716.  	start_kernel();
    9717. 

  9717.  }
    9718. 

  9718.  
    9719. 

  9719. --- a/arch/mips/kernel/traps.c
    9720. 

  9720. +++ b/arch/mips/kernel/traps.c
    9721. 

  9721. @@ -452,9 +452,10 @@ static inline void simulate_ll(struct pt
    9722. 

  9722.  	}
    9723. 

  9723.  	ll_task = current;
    9724. 

  9724.  
    9725. 

  9725. +	compute_return_epc(regs);
    9726. 

  9726. +
    9727. 

  9727.  	regs->regs[(opcode & RT) >> 16] = value;
    9728. 

  9728.  
    9729. 

  9729. -	compute_return_epc(regs);
    9730. 

  9730.  	return;
    9731. 

  9731.  
    9732. 

  9732.  sig:
    9733. 

  9733. @@ -485,8 +486,8 @@ static inline void simulate_sc(struct pt
    9734. 

  9734.  		goto sig;
    9735. 

  9735.  	}
    9736. 

  9736.  	if (ll_bit == 0 || ll_task != current) {
    9737. 

  9737. -		regs->regs[reg] = 0;
    9738. 

  9738.  		compute_return_epc(regs);
    9739. 

  9739. +		regs->regs[reg] = 0;
    9740. 

  9740.  		return;
    9741. 

  9741.  	}
    9742. 

  9742.  
    9743. 

  9743. @@ -495,9 +496,9 @@ static inline void simulate_sc(struct pt
    9744. 

  9744.  		goto sig;
    9745. 

  9745.  	}
    9746. 

  9746.  
    9747. 

  9747. +	compute_return_epc(regs);
    9748. 

  9748.  	regs->regs[reg] = 1;
    9749. 

  9749.  
    9750. 

  9750. -	compute_return_epc(regs);
    9751. 

  9751.  	return;
    9752. 

  9752.  
    9753. 

  9753.  sig:
    9754. 

  9754. @@ -887,12 +888,18 @@ extern asmlinkage int fpu_emulator_resto
    9755. 

  9755.  void __init per_cpu_trap_init(void)
    9756. 

  9756.  {
    9757. 

  9757.  	unsigned int cpu = smp_processor_id();
    9758. 

  9758. +	unsigned int status_set = ST0_CU0;
    9759. 

  9759.  
    9760. 

  9760. -	/* Some firmware leaves the BEV flag set, clear it.  */
    9761. 

  9761. -	clear_c0_status(ST0_CU3|ST0_CU2|ST0_CU1|ST0_BEV|ST0_KX|ST0_SX|ST0_UX);
    9762. 

  9762. -
    9763. 

  9763. +	/*
    9764. 

  9764. +	 * Disable coprocessors and 64-bit addressing and set FPU for
    9765. 

  9765. +	 * the 16/32 FPR register model.  Reset the BEV flag that some
    9766. 

  9766. +	 * firmware may have left set and the TS bit (for IP27).  Set
    9767. 

  9767. +	 * XX for ISA IV code to work.
    9768. 

  9768. +	 */
    9769. 

  9769.  	if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
    9770. 

  9770. -		set_c0_status(ST0_XX);
    9771. 

  9771. +		status_set |= ST0_XX;
    9772. 

  9772. +	change_c0_status(ST0_CU|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
    9773. 

  9773. +			 status_set);
    9774. 

  9774.  
    9775. 

  9775.  	/*
    9776. 

  9776.  	 * Some MIPS CPUs have a dedicated interrupt vector which reduces the
    9777. 

  9777. @@ -902,7 +909,7 @@ void __init per_cpu_trap_init(void)
    9778. 

  9778.  		set_c0_cause(CAUSEF_IV);
    9779. 

  9779.  
    9780. 

  9780.  	cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
    9781. 

  9781. -	write_c0_context(cpu << 23);
    9782. 

  9782. +	TLBMISS_HANDLER_SETUP();
    9783. 

  9783.  
    9784. 

  9784.  	atomic_inc(&init_mm.mm_count);
    9785. 

  9785.  	current->active_mm = &init_mm;
    9786. 

  9786. @@ -918,8 +925,6 @@ void __init trap_init(void)
    9787. 

  9787.  	extern char except_vec4;
    9788. 

  9788.  	unsigned long i;
    9789. 

  9789.  
    9790. 

  9790. -	per_cpu_trap_init();
    9791. 

  9791. -
    9792. 

  9792.  	/* Copy the generic exception handler code to it's final destination. */
    9793. 

  9793.  	memcpy((void *)(KSEG0 + 0x80), &except_vec1_generic, 0x80);
    9794. 

  9794.  
    9795. 

  9795. @@ -1020,10 +1025,5 @@ void __init trap_init(void)
    9796. 

  9796.  
    9797. 

  9797.  	flush_icache_range(KSEG0, KSEG0 + 0x400);
    9798. 

  9798.  
    9799. 

  9799. -	atomic_inc(&init_mm.mm_count);	/* XXX UP?  */
    9800. 

  9800. -	current->active_mm = &init_mm;
    9801. 

  9801. -
    9802. 

  9802. -	/* XXX Must be done for all CPUs  */
    9803. 

  9803. -	current_cpu_data.asid_cache = ASID_FIRST_VERSION;
    9804. 

  9804. -	TLBMISS_HANDLER_SETUP();
    9805. 

  9805. +	per_cpu_trap_init();
    9806. 

  9806.  }
    9807. 

  9807. --- a/arch/mips/lib/rtc-no.c
    9808. 

  9808. +++ b/arch/mips/lib/rtc-no.c
    9809. 

  9809. @@ -6,10 +6,9 @@
    9810. 

  9810.   * Stub RTC routines to keep Linux from crashing on machine which don't
    9811. 

  9811.   * have a RTC chip.
    9812. 

  9812.   *
    9813. 

  9813. - * Copyright (C) 1998, 2001 by Ralf Baechle
    9814. 

  9814. + * Copyright (C) 1998, 2001, 2005 by Ralf Baechle
    9815. 

  9815.   */
    9816. 

  9816.  #include <linux/kernel.h>
    9817. 

  9817. -#include <linux/module.h>
    9818. 

  9818.  #include <linux/mc146818rtc.h>
    9819. 

  9819.  
    9820. 

  9820.  static unsigned int shouldnt_happen(void)
    9821. 

  9821. @@ -29,5 +28,3 @@ struct rtc_ops no_rtc_ops = {
    9822. 

  9822.      .rtc_write_data = (void *) &shouldnt_happen,
    9823. 

  9823.      .rtc_bcd_mode   = (void *) &shouldnt_happen
    9824. 

  9824.  };
    9825. 

  9825. -
    9826. 

  9826. -EXPORT_SYMBOL(rtc_ops);
    9827. 

  9827. --- a/arch/mips/lib/rtc-std.c
    9828. 

  9828. +++ b/arch/mips/lib/rtc-std.c
    9829. 

  9829. @@ -5,9 +5,8 @@
    9830. 

  9830.   *
    9831. 

  9831.   * RTC routines for PC style attached Dallas chip.
    9832. 

  9832.   *
    9833. 

  9833. - * Copyright (C) 1998, 2001 by Ralf Baechle
    9834. 

  9834. + * Copyright (C) 1998, 2001, 05 by Ralf Baechle
    9835. 

  9835.   */
    9836. 

  9836. -#include <linux/module.h>
    9837. 

  9837.  #include <linux/mc146818rtc.h>
    9838. 

  9838.  #include <asm/io.h>
    9839. 

  9839.  
    9840. 

  9840. @@ -33,5 +32,3 @@ struct rtc_ops std_rtc_ops = {
    9841. 

  9841.  	&std_rtc_write_data,
    9842. 

  9842.  	&std_rtc_bcd_mode
    9843. 

  9843.  };
    9844. 

  9844. -
    9845. 

  9845. -EXPORT_SYMBOL(rtc_ops);
    9846. 

  9846. --- a/arch/mips/Makefile
    9847. 

  9847. +++ b/arch/mips/Makefile
    9848. 

  9848. @@ -209,7 +209,7 @@ LOADADDR	:= 0x80080000
    9849. 

  9849.  endif
    9850. 

  9850.  
    9851. 

  9851.  #
    9852. 

  9852. -# Au1000 (Alchemy Semi PB1000) eval board
    9853. 

  9853. +# Au1x AMD Alchemy eval boards
    9854. 

  9854.  #
    9855. 

  9855.  ifdef CONFIG_MIPS_PB1000
    9856. 

  9856.  LIBS		+= arch/mips/au1000/pb1000/pb1000.o \
    9857. 

  9857. @@ -218,9 +218,6 @@ SUBDIRS		+= arch/mips/au1000/pb1000 arch
    9858. 

  9858.  LOADADDR	:= 0x80100000
    9859. 

  9859.  endif
    9860. 

  9860.  
    9861. 

  9861. -#
    9862. 

  9862. -# Au1100 (Alchemy Semi PB1100) eval board
    9863. 

  9863. -#
    9864. 

  9864.  ifdef CONFIG_MIPS_PB1100
    9865. 

  9865.  LIBS          += arch/mips/au1000/pb1100/pb1100.o \
    9866. 

  9866.                   arch/mips/au1000/common/au1000.o
    9867. 

  9867. @@ -228,9 +225,6 @@ SUBDIRS       += arch/mips/au1000/pb1100
    9868. 

  9868.  LOADADDR      += 0x80100000
    9869. 

  9869.  endif
    9870. 

  9870.  
    9871. 

  9871. -#
    9872. 

  9872. -# Au1500 (Alchemy Semi PB1500) eval board
    9873. 

  9873. -#
    9874. 

  9874.  ifdef CONFIG_MIPS_PB1500
    9875. 

  9875.  LIBS		+= arch/mips/au1000/pb1500/pb1500.o \
    9876. 

  9876.  		   arch/mips/au1000/common/au1000.o
    9877. 

  9877. @@ -238,9 +232,6 @@ SUBDIRS		+= arch/mips/au1000/pb1500 arch
    9878. 

  9878.  LOADADDR	:= 0x80100000
    9879. 

  9879.  endif
    9880. 

  9880.  
    9881. 

  9881. -#
    9882. 

  9882. -# Au1x00 (AMD/Alchemy) eval boards
    9883. 

  9883. -#
    9884. 

  9884.  ifdef CONFIG_MIPS_DB1000
    9885. 

  9885.  LIBS          += arch/mips/au1000/db1x00/db1x00.o \
    9886. 

  9886.                   arch/mips/au1000/common/au1000.o
    9887. 

  9887. @@ -311,6 +302,27 @@ SUBDIRS       += arch/mips/au1000/pb1550
    9888. 

  9888.  LOADADDR      += 0x80100000
    9889. 

  9889.  endif
    9890. 

  9890.  
    9891. 

  9891. +ifdef CONFIG_MIPS_PB1200
    9892. 

  9892. +LIBS          += arch/mips/au1000/pb1200/pb1200.o \
    9893. 

  9893. +                 arch/mips/au1000/common/au1000.o
    9894. 

  9894. +SUBDIRS       += arch/mips/au1000/pb1200 arch/mips/au1000/common
    9895. 

  9895. +LOADADDR      += 0x80100000
    9896. 

  9896. +endif
    9897. 

  9897. +
    9898. 

  9898. +ifdef CONFIG_MIPS_DB1200
    9899. 

  9899. +LIBS          += arch/mips/au1000/pb1200/pb1200.o \
    9900. 

  9900. +                 arch/mips/au1000/common/au1000.o
    9901. 

  9901. +SUBDIRS       += arch/mips/au1000/pb1200 arch/mips/au1000/common
    9902. 

  9902. +LOADADDR      += 0x80100000
    9903. 

  9903. +endif
    9904. 

  9904. +
    9905. 

  9905. +ifdef CONFIG_MIPS_FICMMP
    9906. 

  9906. +LIBS          += arch/mips/au1000/ficmmp/ficmmp.o \
    9907. 

  9907. +                 arch/mips/au1000/common/au1000.o
    9908. 

  9908. +SUBDIRS       += arch/mips/au1000/ficmmp arch/mips/au1000/common
    9909. 

  9909. +LOADADDR      += 0x80100000
    9910. 

  9910. +endif
    9911. 

  9911. +
    9912. 

  9912.  
    9913. 

  9913.  #
    9914. 

  9914.  # Cogent CSB250
    9915. 

  9915. --- a/arch/mips/mm/cerr-sb1.c
    9916. 

  9916. +++ b/arch/mips/mm/cerr-sb1.c
    9917. 

  9917. @@ -252,14 +252,14 @@ static const uint8_t parity[256] = {
    9918. 

  9918.  
    9919. 

  9919.  /* Masks to select bits for Hamming parity, mask_72_64[i] for bit[i] */
    9920. 

  9920.  static const uint64_t mask_72_64[8] = {
    9921. 

  9921. -	0x0738C808099264FFL,
    9922. 

  9922. -	0x38C808099264FF07L,
    9923. 

  9923. -	0xC808099264FF0738L,
    9924. 

  9924. -	0x08099264FF0738C8L,
    9925. 

  9925. -	0x099264FF0738C808L,
    9926. 

  9926. -	0x9264FF0738C80809L,
    9927. 

  9927. -	0x64FF0738C8080992L,
    9928. 

  9928. -	0xFF0738C808099264L
    9929. 

  9929. +	0x0738C808099264FFULL,
    9930. 

  9930. +	0x38C808099264FF07ULL,
    9931. 

  9931. +	0xC808099264FF0738ULL,
    9932. 

  9932. +	0x08099264FF0738C8ULL,
    9933. 

  9933. +	0x099264FF0738C808ULL,
    9934. 

  9934. +	0x9264FF0738C80809ULL,
    9935. 

  9935. +	0x64FF0738C8080992ULL,
    9936. 

  9936. +	0xFF0738C808099264ULL
    9937. 

  9937.  };
    9938. 

  9938.  
    9939. 

  9939.  /* Calculate the parity on a range of bits */
    9940. 

  9940. @@ -331,9 +331,9 @@ static uint32_t extract_ic(unsigned shor
    9941. 

  9941.  				    ((lru >> 4) & 0x3),
    9942. 

  9942.  				    ((lru >> 6) & 0x3));
    9943. 

  9943.  		}
    9944. 

  9944. -		va = (taglo & 0xC0000FFFFFFFE000) | addr;
    9945. 

  9945. +		va = (taglo & 0xC0000FFFFFFFE000ULL) | addr;
    9946. 

  9946.  		if ((taglo & (1 << 31)) && (((taglo >> 62) & 0x3) == 3))
    9947. 

  9947. -			va |= 0x3FFFF00000000000;
    9948. 

  9948. +			va |= 0x3FFFF00000000000ULL;
    9949. 

  9949.  		valid = ((taghi >> 29) & 1);
    9950. 

  9950.  		if (valid) {
    9951. 

  9951.  			tlo_tmp = taglo & 0xfff3ff;
    9952. 

  9952. @@ -474,7 +474,7 @@ static uint32_t extract_dc(unsigned shor
    9953. 

  9953.  		: "r" ((way << 13) | addr));
    9954. 

  9954.  
    9955. 

  9955.  		taglo = ((unsigned long long)taglohi << 32) | taglolo;
    9956. 

  9956. -		pa = (taglo & 0xFFFFFFE000) | addr;
    9957. 

  9957. +		pa = (taglo & 0xFFFFFFE000ULL) | addr;
    9958. 

  9958.  		if (way == 0) {
    9959. 

  9959.  			lru = (taghi >> 14) & 0xff;
    9960. 

  9960.  			prom_printf("[Bank %d Set 0x%02x]  LRU > %d %d %d %d > MRU\n",
    9961. 

  9961. --- a/arch/mips/mm/c-r4k.c
    9962. 

  9962. +++ b/arch/mips/mm/c-r4k.c
    9963. 

  9963. @@ -867,9 +867,16 @@ static void __init probe_pcache(void)
    9964. 

  9964.  	 * normally they'd suffer from aliases but magic in the hardware deals
    9965. 

  9965.  	 * with that for us so we don't need to take care ourselves.
    9966. 

  9966.  	 */
    9967. 

  9967. -	if (c->cputype != CPU_R10000 && c->cputype != CPU_R12000)
    9968. 

  9968. -		if (c->dcache.waysize > PAGE_SIZE)
    9969. 

  9969. -		        c->dcache.flags |= MIPS_CACHE_ALIASES;
    9970. 

  9970. +	switch (c->cputype) {
    9971. 

  9971. +	case CPU_R10000:
    9972. 

  9972. +	case CPU_R12000:
    9973. 

  9973. +		break;
    9974. 

  9974. +	case CPU_24K:
    9975. 

  9975. +		if (!(read_c0_config7() & (1 << 16)))
    9976. 

  9976. +	default:
    9977. 

  9977. +			if (c->dcache.waysize > PAGE_SIZE)
    9978. 

  9978. +				c->dcache.flags |= MIPS_CACHE_ALIASES;
    9979. 

  9979. +	}
    9980. 

  9980.  
    9981. 

  9981.  	switch (c->cputype) {
    9982. 

  9982.  	case CPU_20KC:
    9983. 

  9983. @@ -1069,9 +1076,6 @@ void __init ld_mmu_r4xx0(void)
    9984. 

  9984.  	probe_pcache();
    9985. 

  9985.  	setup_scache();
    9986. 

  9986.  
    9987. 

  9987. -	if (c->dcache.sets * c->dcache.ways > PAGE_SIZE)
    9988. 

  9988. -		c->dcache.flags |= MIPS_CACHE_ALIASES;
    9989. 

  9989. -
    9990. 

  9990.  	r4k_blast_dcache_page_setup();
    9991. 

  9991.  	r4k_blast_dcache_page_indexed_setup();
    9992. 

  9992.  	r4k_blast_dcache_setup();
    9993. 

  9993. --- a/arch/mips/mm/tlbex-mips32.S
    9994. 

  9994. +++ b/arch/mips/mm/tlbex-mips32.S
    9995. 

  9995. @@ -196,7 +196,7 @@
    9996. 

  9996.  	.set	noat; \
    9997. 

  9997.  	SAVE_ALL; \
    9998. 

  9998.  	mfc0	a2, CP0_BADVADDR; \
    9999. 

  9999. -	STI; \
    10000. 

  10000. +	KMODE; \
    10001. 

  10001.  	.set	at; \
    10002. 

  10002.  	move	a0, sp; \
    10003. 

  10003.  	jal	do_page_fault; \
    10004. 

  10004. --- a/arch/mips/mm/tlbex-r4k.S
    10005. 

  10005. +++ b/arch/mips/mm/tlbex-r4k.S
    10006. 

  10006. @@ -184,13 +184,10 @@
    10007. 

  10007.  	P_MTC0	k0, CP0_ENTRYLO0		# load it
    10008. 

  10008.  	PTE_SRL	k1, k1, 6			# convert to entrylo1
    10009. 

  10009.  	P_MTC0	k1, CP0_ENTRYLO1		# load it
    10010. 

  10010. -	b	1f
    10011. 

  10011. -	rm9000_tlb_hazard
    10012. 

  10012. +	mtc0_tlbw_hazard
    10013. 

  10013.  	tlbwr					# write random tlb entry
    10014. 

  10014. -1:
    10015. 

  10015. -	nop
    10016. 

  10016. -	rm9000_tlb_hazard
    10017. 

  10017. -	eret					# return from trap
    10018. 

  10018. +	tlbw_eret_hazard
    10019. 

  10019. +	eret
    10020. 

  10020.  	END(except_vec0_r4000)
    10021. 

  10021.  
    10022. 

  10022.  	/* TLB refill, EXL == 0, R4600 version */
    10023. 

  10023. @@ -468,13 +465,9 @@ invalid_tlbl:
    10024. 

  10024.  	PTE_PRESENT(k0, k1, nopage_tlbl)
    10025. 

  10025.  	PTE_MAKEVALID(k0, k1)
    10026. 

  10026.  	PTE_RELOAD(k1, k0)
    10027. 

  10027. -	rm9000_tlb_hazard
    10028. 

  10028. -	nop
    10029. 

  10029. -	b	1f
    10030. 

  10030. -	 tlbwi
    10031. 

  10031. -1:
    10032. 

  10032. -	nop
    10033. 

  10033. -	rm9000_tlb_hazard
    10034. 

  10034. +	mtc0_tlbw_hazard
    10035. 

  10035. +	tlbwi
    10036. 

  10036. +	tlbw_eret_hazard
    10037. 

  10037.  	.set	mips3
    10038. 

  10038.  	eret
    10039. 

  10039.  	.set	mips0
    10040. 

  10040. @@ -496,13 +489,9 @@ nopage_tlbl:
    10041. 

  10041.  	PTE_WRITABLE(k0, k1, nopage_tlbs)
    10042. 

  10042.  	PTE_MAKEWRITE(k0, k1)
    10043. 

  10043.  	PTE_RELOAD(k1, k0)
    10044. 

  10044. -	rm9000_tlb_hazard
    10045. 

  10045. -	nop
    10046. 

  10046. -	b	1f
    10047. 

  10047. -	 tlbwi
    10048. 

  10048. -1:
    10049. 

  10049. -	nop
    10050. 

  10050. -	rm9000_tlb_hazard
    10051. 

  10051. +	mtc0_tlbw_hazard
    10052. 

  10052. +	tlbwi
    10053. 

  10053. +	tlbw_eret_hazard
    10054. 

  10054.  	.set	mips3
    10055. 

  10055.  	eret
    10056. 

  10056.  	.set	mips0
    10057. 

  10057. @@ -529,13 +518,9 @@ nopage_tlbs:
    10058. 

  10058.  
    10059. 

  10059.  	/* Now reload the entry into the tlb. */
    10060. 

  10060.  	PTE_RELOAD(k1, k0)
    10061. 

  10061. -	rm9000_tlb_hazard
    10062. 

  10062. -	nop
    10063. 

  10063. -	b	1f
    10064. 

  10064. -	 tlbwi
    10065. 

  10065. -1:
    10066. 

  10066. -	rm9000_tlb_hazard
    10067. 

  10067. -	nop
    10068. 

  10068. +	mtc0_tlbw_hazard
    10069. 

  10069. +	tlbwi
    10070. 

  10070. +	tlbw_eret_hazard
    10071. 

  10071.  	.set	mips3
    10072. 

  10072.  	eret
    10073. 

  10073.  	.set	mips0
    10074. 

  10074. --- a/arch/mips/mm/tlb-r4k.c
    10075. 

  10075. +++ b/arch/mips/mm/tlb-r4k.c
    10076. 

  10076. @@ -3,17 +3,12 @@
    10077. 

  10077.   * License.  See the file "COPYING" in the main directory of this archive
    10078. 

  10078.   * for more details.
    10079. 

  10079.   *
    10080. 

  10080. - * r4xx0.c: R4000 processor variant specific MMU/Cache routines.
    10081. 

  10081. - *
    10082. 

  10082.   * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
    10083. 

  10083.   * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle ralf@gnu.org
    10084. 

  10084. - *
    10085. 

  10085. - * To do:
    10086. 

  10086. - *
    10087. 

  10087. - *  - this code is a overbloated pig
    10088. 

  10088. - *  - many of the bug workarounds are not efficient at all, but at
    10089. 

  10089. - *    least they are functional ...
    10090. 

  10090. + * Carsten Langgaard, carstenl@mips.com
    10091. 

  10091. + * Copyright (C) 2002 MIPS Technologies, Inc.  All rights reserved.
    10092. 

  10092.   */
    10093. 

  10093. +#include <linux/config.h>
    10094. 

  10094.  #include <linux/init.h>
    10095. 

  10095.  #include <linux/sched.h>
    10096. 

  10096.  #include <linux/mm.h>
    10097. 

  10097. @@ -25,9 +20,6 @@
    10098. 

  10098.  #include <asm/pgtable.h>
    10099. 

  10099.  #include <asm/system.h>
    10100. 

  10100.  
    10101. 

  10101. -#undef DEBUG_TLB
    10102. 

  10102. -#undef DEBUG_TLBUPDATE
    10103. 

  10103. -
    10104. 

  10104.  extern char except_vec0_nevada, except_vec0_r4000, except_vec0_r4600;
    10105. 

  10105.  
    10106. 

  10106.  /* CP0 hazard avoidance. */
    10107. 

  10107. @@ -41,33 +33,23 @@ void local_flush_tlb_all(void)
    10108. 

  10108.  	unsigned long old_ctx;
    10109. 

  10109.  	int entry;
    10110. 

  10110.  
    10111. 

  10111. -#ifdef DEBUG_TLB
    10112. 

  10112. -	printk("[tlball]");
    10113. 

  10113. -#endif
    10114. 

  10114. -
    10115. 

  10115.  	local_irq_save(flags);
    10116. 

  10116.  	/* Save old context and create impossible VPN2 value */
    10117. 

  10117.  	old_ctx = read_c0_entryhi();
    10118. 

  10118.  	write_c0_entrylo0(0);
    10119. 

  10119.  	write_c0_entrylo1(0);
    10120. 

  10120. -	BARRIER;
    10121. 

  10121.  
    10122. 

  10122.  	entry = read_c0_wired();
    10123. 

  10123.  
    10124. 

  10124.  	/* Blast 'em all away. */
    10125. 

  10125.  	while (entry < current_cpu_data.tlbsize) {
    10126. 

  10126. -		/*
    10127. 

  10127. -		 * Make sure all entries differ.  If they're not different
    10128. 

  10128. -		 * MIPS32 will take revenge ...
    10129. 

  10129. -		 */
    10130. 

  10130.  		write_c0_entryhi(KSEG0 + entry*0x2000);
    10131. 

  10131.  		write_c0_index(entry);
    10132. 

  10132. -		BARRIER;
    10133. 

  10133. +		mtc0_tlbw_hazard();
    10134. 

  10134.  		tlb_write_indexed();
    10135. 

  10135. -		BARRIER;
    10136. 

  10136.  		entry++;
    10137. 

  10137.  	}
    10138. 

  10138. -	BARRIER;
    10139. 

  10139. +	tlbw_use_hazard();
    10140. 

  10140.  	write_c0_entryhi(old_ctx);
    10141. 

  10141.  	local_irq_restore(flags);
    10142. 

  10142.  }
    10143. 

  10143. @@ -76,12 +58,8 @@ void local_flush_tlb_mm(struct mm_struct
    10144. 

  10144.  {
    10145. 

  10145.  	int cpu = smp_processor_id();
    10146. 

  10146.  
    10147. 

  10147. -	if (cpu_context(cpu, mm) != 0) {
    10148. 

  10148. -#ifdef DEBUG_TLB
    10149. 

  10149. -		printk("[tlbmm<%d>]", cpu_context(cpu, mm));
    10150. 

  10150. -#endif
    10151. 

  10151. +	if (cpu_context(cpu, mm) != 0)
    10152. 

  10152.  		drop_mmu_context(mm,cpu);
    10153. 

  10153. -	}
    10154. 

  10154.  }
    10155. 

  10155.  
    10156. 

  10156.  void local_flush_tlb_range(struct mm_struct *mm, unsigned long start,
    10157. 

  10157. @@ -93,10 +71,6 @@ void local_flush_tlb_range(struct mm_str
    10158. 

  10158.  		unsigned long flags;
    10159. 

  10159.  		int size;
    10160. 

  10160.  
    10161. 

  10161. -#ifdef DEBUG_TLB
    10162. 

  10162. -		printk("[tlbrange<%02x,%08lx,%08lx>]",
    10163. 

  10163. -		       cpu_asid(cpu, mm), start, end);
    10164. 

  10164. -#endif
    10165. 

  10165.  		local_irq_save(flags);
    10166. 

  10166.  		size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
    10167. 

  10167.  		size = (size + 1) >> 1;
    10168. 

  10168. @@ -112,7 +86,7 @@ void local_flush_tlb_range(struct mm_str
    10169. 

  10169.  
    10170. 

  10170.  				write_c0_entryhi(start | newpid);
    10171. 

  10171.  				start += (PAGE_SIZE << 1);
    10172. 

  10172. -				BARRIER;
    10173. 

  10173. +				mtc0_tlbw_hazard();
    10174. 

  10174.  				tlb_probe();
    10175. 

  10175.  				BARRIER;
    10176. 

  10176.  				idx = read_c0_index();
    10177. 

  10177. @@ -122,10 +96,10 @@ void local_flush_tlb_range(struct mm_str
    10178. 

  10178.  					continue;
    10179. 

  10179.  				/* Make sure all entries differ. */
    10180. 

  10180.  				write_c0_entryhi(KSEG0 + idx*0x2000);
    10181. 

  10181. -				BARRIER;
    10182. 

  10182. +				mtc0_tlbw_hazard();
    10183. 

  10183.  				tlb_write_indexed();
    10184. 

  10184. -				BARRIER;
    10185. 

  10185.  			}
    10186. 

  10186. +			tlbw_use_hazard();
    10187. 

  10187.  			write_c0_entryhi(oldpid);
    10188. 

  10188.  		} else {
    10189. 

  10189.  			drop_mmu_context(mm, cpu);
    10190. 

  10190. @@ -138,34 +112,30 @@ void local_flush_tlb_page(struct vm_area
    10191. 

  10191.  {
    10192. 

  10192.  	int cpu = smp_processor_id();
    10193. 

  10193.  
    10194. 

  10194. -	if (!vma || cpu_context(cpu, vma->vm_mm) != 0) {
    10195. 

  10195. +	if (cpu_context(cpu, vma->vm_mm) != 0) {
    10196. 

  10196.  		unsigned long flags;
    10197. 

  10197. -		int oldpid, newpid, idx;
    10198. 

  10198. +		unsigned long oldpid, newpid, idx;
    10199. 

  10199.  
    10200. 

  10200. -#ifdef DEBUG_TLB
    10201. 

  10201. -		printk("[tlbpage<%d,%08lx>]", cpu_context(cpu, vma->vm_mm),
    10202. 

  10202. -		       page);
    10203. 

  10203. -#endif
    10204. 

  10204.  		newpid = cpu_asid(cpu, vma->vm_mm);
    10205. 

  10205.  		page &= (PAGE_MASK << 1);
    10206. 

  10206.  		local_irq_save(flags);
    10207. 

  10207.  		oldpid = read_c0_entryhi();
    10208. 

  10208.  		write_c0_entryhi(page | newpid);
    10209. 

  10209. -		BARRIER;
    10210. 

  10210. +		mtc0_tlbw_hazard();
    10211. 

  10211.  		tlb_probe();
    10212. 

  10212.  		BARRIER;
    10213. 

  10213.  		idx = read_c0_index();
    10214. 

  10214.  		write_c0_entrylo0(0);
    10215. 

  10215.  		write_c0_entrylo1(0);
    10216. 

  10216. -		if(idx < 0)
    10217. 

  10217. +		if (idx < 0)
    10218. 

  10218.  			goto finish;
    10219. 

  10219.  		/* Make sure all entries differ. */
    10220. 

  10220.  		write_c0_entryhi(KSEG0+idx*0x2000);
    10221. 

  10221. -		BARRIER;
    10222. 

  10222. +		mtc0_tlbw_hazard();
    10223. 

  10223.  		tlb_write_indexed();
    10224. 

  10224. +		tlbw_use_hazard();
    10225. 

  10225.  
    10226. 

  10226.  	finish:
    10227. 

  10227. -		BARRIER;
    10228. 

  10228.  		write_c0_entryhi(oldpid);
    10229. 

  10229.  		local_irq_restore(flags);
    10230. 

  10230.  	}
    10231. 

  10231. @@ -185,7 +155,7 @@ void local_flush_tlb_one(unsigned long p
    10232. 

  10232.  
    10233. 

  10233.  	local_irq_save(flags);
    10234. 

  10234.  	write_c0_entryhi(page);
    10235. 

  10235. -	BARRIER;
    10236. 

  10236. +	mtc0_tlbw_hazard();
    10237. 

  10237.  	tlb_probe();
    10238. 

  10238.  	BARRIER;
    10239. 

  10239.  	idx = read_c0_index();
    10240. 

  10240. @@ -194,18 +164,19 @@ void local_flush_tlb_one(unsigned long p
    10241. 

  10241.  	if (idx >= 0) {
    10242. 

  10242.  		/* Make sure all entries differ. */
    10243. 

  10243.  		write_c0_entryhi(KSEG0+idx*0x2000);
    10244. 

  10244. +		mtc0_tlbw_hazard();
    10245. 

  10245.  		tlb_write_indexed();
    10246. 

  10246. +		tlbw_use_hazard();
    10247. 

  10247.  	}
    10248. 

  10248. -	BARRIER;
    10249. 

  10249.  	write_c0_entryhi(oldpid);
    10250. 

  10250. +
    10251. 

  10251.  	local_irq_restore(flags);
    10252. 

  10252.  }
    10253. 

  10253.  
    10254. 

  10254.  EXPORT_SYMBOL(local_flush_tlb_one);
    10255. 

  10255.  
    10256. 

  10256. -/* We will need multiple versions of update_mmu_cache(), one that just
    10257. 

  10257. - * updates the TLB with the new pte(s), and another which also checks
    10258. 

  10258. - * for the R4k "end of page" hardware bug and does the needy.
    10259. 

  10259. +/*
    10260. 

  10260. + * Updates the TLB with the new pte(s).
    10261. 

  10261.   */
    10262. 

  10262.  void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
    10263. 

  10263.  {
    10264. 

  10264. @@ -223,25 +194,16 @@ void __update_tlb(struct vm_area_struct 
    10265. 

  10265.  
    10266. 

  10266.  	pid = read_c0_entryhi() & ASID_MASK;
    10267. 

  10267.  
    10268. 

  10268. -#ifdef DEBUG_TLB
    10269. 

  10269. -	if ((pid != cpu_asid(cpu, vma->vm_mm)) ||
    10270. 

  10270. -	    (cpu_context(vma->vm_mm) == 0)) {
    10271. 

  10271. -		printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d "
    10272. 

  10272. -		       "tlbpid=%d\n", (int) (cpu_asid(cpu, vma->vm_mm)), pid);
    10273. 

  10273. -	}
    10274. 

  10274. -#endif
    10275. 

  10275. -
    10276. 

  10276.  	local_irq_save(flags);
    10277. 

  10277.  	address &= (PAGE_MASK << 1);
    10278. 

  10278.  	write_c0_entryhi(address | pid);
    10279. 

  10279.  	pgdp = pgd_offset(vma->vm_mm, address);
    10280. 

  10280. -	BARRIER;
    10281. 

  10281. +	mtc0_tlbw_hazard();
    10282. 

  10282.  	tlb_probe();
    10283. 

  10283.  	BARRIER;
    10284. 

  10284.  	pmdp = pmd_offset(pgdp, address);
    10285. 

  10285.  	idx = read_c0_index();
    10286. 

  10286.  	ptep = pte_offset(pmdp, address);
    10287. 

  10287. -	BARRIER;
    10288. 

  10288.  #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
    10289. 

  10289.  	write_c0_entrylo0(ptep->pte_high);
    10290. 

  10290.  	ptep++;
    10291. 

  10291. @@ -251,15 +213,13 @@ void __update_tlb(struct vm_area_struct 
    10292. 

  10292.  	write_c0_entrylo1(pte_val(*ptep) >> 6);
    10293. 

  10293.  #endif
    10294. 

  10294.  	write_c0_entryhi(address | pid);
    10295. 

  10295. -	BARRIER;
    10296. 

  10296. -	if (idx < 0) {
    10297. 

  10297. +	mtc0_tlbw_hazard();
    10298. 

  10298. +	if (idx < 0)
    10299. 

  10299.  		tlb_write_random();
    10300. 

  10300. -	} else {
    10301. 

  10301. +	else
    10302. 

  10302.  		tlb_write_indexed();
    10303. 

  10303. -	}
    10304. 

  10304. -	BARRIER;
    10305. 

  10305. +	tlbw_use_hazard();
    10306. 

  10306.  	write_c0_entryhi(pid);
    10307. 

  10307. -	BARRIER;
    10308. 

  10308.  	local_irq_restore(flags);
    10309. 

  10309.  }
    10310. 

  10310.  
    10311. 

  10311. @@ -279,24 +239,26 @@ static void r4k_update_mmu_cache_hwbug(s
    10312. 

  10312.  	asid = read_c0_entryhi() & ASID_MASK;
    10313. 

  10313.  	write_c0_entryhi(address | asid);
    10314. 

  10314.  	pgdp = pgd_offset(vma->vm_mm, address);
    10315. 

  10315. +	mtc0_tlbw_hazard();
    10316. 

  10316.  	tlb_probe();
    10317. 

  10317. +	BARRIER;
    10318. 

  10318.  	pmdp = pmd_offset(pgdp, address);
    10319. 

  10319.  	idx = read_c0_index();
    10320. 

  10320.  	ptep = pte_offset(pmdp, address);
    10321. 

  10321.  	write_c0_entrylo0(pte_val(*ptep++) >> 6);
    10322. 

  10322.  	write_c0_entrylo1(pte_val(*ptep) >> 6);
    10323. 

  10323. -	BARRIER;
    10324. 

  10324. +	mtc0_tlbw_hazard();
    10325. 

  10325.  	if (idx < 0)
    10326. 

  10326.  		tlb_write_random();
    10327. 

  10327.  	else
    10328. 

  10328.  		tlb_write_indexed();
    10329. 

  10329. -	BARRIER;
    10330. 

  10330. +	tlbw_use_hazard();
    10331. 

  10331.  	local_irq_restore(flags);
    10332. 

  10332.  }
    10333. 

  10333.  #endif
    10334. 

  10334.  
    10335. 

  10335.  void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
    10336. 

  10336. -		     unsigned long entryhi, unsigned long pagemask)
    10337. 

  10337. +			    unsigned long entryhi, unsigned long pagemask)
    10338. 

  10338.  {
    10339. 

  10339.  	unsigned long flags;
    10340. 

  10340.  	unsigned long wired;
    10341. 

  10341. @@ -315,9 +277,9 @@ void __init add_wired_entry(unsigned lon
    10342. 

  10342.  	write_c0_entryhi(entryhi);
    10343. 

  10343.  	write_c0_entrylo0(entrylo0);
    10344. 

  10344.  	write_c0_entrylo1(entrylo1);
    10345. 

  10345. -	BARRIER;
    10346. 

  10346. +	mtc0_tlbw_hazard();
    10347. 

  10347.  	tlb_write_indexed();
    10348. 

  10348. -	BARRIER;
    10349. 

  10349. +	tlbw_use_hazard();
    10350. 

  10350.  
    10351. 

  10351.  	write_c0_entryhi(old_ctx);
    10352. 

  10352.  	BARRIER;
    10353. 

  10353. @@ -355,17 +317,15 @@ __init int add_temporary_entry(unsigned 
    10354. 

  10354.  	}
    10355. 

  10355.  
    10356. 

  10356.  	write_c0_index(temp_tlb_entry);
    10357. 

  10357. -	BARRIER;
    10358. 

  10358.  	write_c0_pagemask(pagemask);
    10359. 

  10359.  	write_c0_entryhi(entryhi);
    10360. 

  10360.  	write_c0_entrylo0(entrylo0);
    10361. 

  10361.  	write_c0_entrylo1(entrylo1);
    10362. 

  10362. -	BARRIER;
    10363. 

  10363. +	mtc0_tlbw_hazard();
    10364. 

  10364.  	tlb_write_indexed();
    10365. 

  10365. -	BARRIER;
    10366. 

  10366. +	tlbw_use_hazard();
    10367. 

  10367.  
    10368. 

  10368.  	write_c0_entryhi(old_ctx);
    10369. 

  10369. -	BARRIER;
    10370. 

  10370.  	write_c0_pagemask(old_pagemask);
    10371. 

  10371.  out:
    10372. 

  10372.  	local_irq_restore(flags);
    10373. 

  10373. @@ -375,7 +335,7 @@ out:
    10374. 

  10374.  static void __init probe_tlb(unsigned long config)
    10375. 

  10375.  {
    10376. 

  10376.  	struct cpuinfo_mips *c = &current_cpu_data;
    10377. 

  10377. -	unsigned int reg;
    10378. 

  10378. +	unsigned int config1;
    10379. 

  10379.  
    10380. 

  10380.  	/*
    10381. 

  10381.  	 * If this isn't a MIPS32 / MIPS64 compliant CPU.  Config 1 register
    10382. 

  10382. @@ -385,16 +345,16 @@ static void __init probe_tlb(unsigned lo
    10383. 

  10383.  	if ((c->processor_id  & 0xff0000) == PRID_COMP_LEGACY)
    10384. 

  10384.  		return;
    10385. 

  10385.  
    10386. 

  10386. -	reg = read_c0_config1();
    10387. 

  10387. +	config1 = read_c0_config1();
    10388. 

  10388.  	if (!((config >> 7) & 3))
    10389. 

  10389.  		panic("No TLB present");
    10390. 

  10390.  
    10391. 

  10391. -	c->tlbsize = ((reg >> 25) & 0x3f) + 1;
    10392. 

  10392. +	c->tlbsize = ((config1 >> 25) & 0x3f) + 1;
    10393. 

  10393.  }
    10394. 

  10394.  
    10395. 

  10395.  void __init r4k_tlb_init(void)
    10396. 

  10396.  {
    10397. 

  10397. -	u32 config = read_c0_config();
    10398. 

  10398. +	unsigned int config = read_c0_config();
    10399. 

  10399.  
    10400. 

  10400.  	/*
    10401. 

  10401.  	 * You should never change this register:
    10402. 

  10402. --- a/arch/mips64/defconfig
    10403. 

  10403. +++ b/arch/mips64/defconfig
    10404. 

  10404. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    10405. 

  10405.  # CONFIG_MIPS_PB1000 is not set
    10406. 

  10406.  # CONFIG_MIPS_PB1100 is not set
    10407. 

  10407.  # CONFIG_MIPS_PB1500 is not set
    10408. 

  10408. -# CONFIG_MIPS_HYDROGEN3 is not set
    10409. 

  10409.  # CONFIG_MIPS_PB1550 is not set
    10410. 

  10410. +# CONFIG_MIPS_HYDROGEN3 is not set
    10411. 

  10411.  # CONFIG_MIPS_XXS1500 is not set
    10412. 

  10412.  # CONFIG_MIPS_MTX1 is not set
    10413. 

  10413.  # CONFIG_COGENT_CSB250 is not set
    10414. 

  10414. @@ -470,9 +470,11 @@ CONFIG_SCSI_LOGGING=y
    10415. 

  10415.  # CONFIG_SCSI_MEGARAID is not set
    10416. 

  10416.  # CONFIG_SCSI_MEGARAID2 is not set
    10417. 

  10417.  # CONFIG_SCSI_SATA is not set
    10418. 

  10418. +# CONFIG_SCSI_SATA_AHCI is not set
    10419. 

  10419.  # CONFIG_SCSI_SATA_SVW is not set
    10420. 

  10420.  # CONFIG_SCSI_ATA_PIIX is not set
    10421. 

  10421.  # CONFIG_SCSI_SATA_NV is not set
    10422. 

  10422. +# CONFIG_SCSI_SATA_QSTOR is not set
    10423. 

  10423.  # CONFIG_SCSI_SATA_PROMISE is not set
    10424. 

  10424.  # CONFIG_SCSI_SATA_SX4 is not set
    10425. 

  10425.  # CONFIG_SCSI_SATA_SIL is not set
    10426. 

  10426. @@ -658,7 +660,6 @@ CONFIG_SERIAL=y
    10427. 

  10427.  CONFIG_SERIAL_CONSOLE=y
    10428. 

  10428.  # CONFIG_SERIAL_EXTENDED is not set
    10429. 

  10429.  # CONFIG_SERIAL_NONSTANDARD is not set
    10430. 

  10430. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    10431. 

  10431.  CONFIG_UNIX98_PTYS=y
    10432. 

  10432.  CONFIG_UNIX98_PTY_COUNT=256
    10433. 

  10433.  
    10434. 

  10434. --- a/arch/mips64/defconfig-atlas
    10435. 

  10435. +++ b/arch/mips64/defconfig-atlas
    10436. 

  10436. @@ -28,8 +28,8 @@ CONFIG_EXPERIMENTAL=y
    10437. 

  10437.  # CONFIG_MIPS_PB1000 is not set
    10438. 

  10438.  # CONFIG_MIPS_PB1100 is not set
    10439. 

  10439.  # CONFIG_MIPS_PB1500 is not set
    10440. 

  10440. -# CONFIG_MIPS_HYDROGEN3 is not set
    10441. 

  10441.  # CONFIG_MIPS_PB1550 is not set
    10442. 

  10442. +# CONFIG_MIPS_HYDROGEN3 is not set
    10443. 

  10443.  # CONFIG_MIPS_XXS1500 is not set
    10444. 

  10444.  # CONFIG_MIPS_MTX1 is not set
    10445. 

  10445.  # CONFIG_COGENT_CSB250 is not set
    10446. 

  10446. @@ -232,11 +232,6 @@ CONFIG_IP_PNP=y
    10447. 

  10447.  #
    10448. 

  10448.  # CONFIG_IPX is not set
    10449. 

  10449.  # CONFIG_ATALK is not set
    10450. 

  10450. -
    10451. 

  10451. -#
    10452. 

  10452. -# Appletalk devices
    10453. 

  10453. -#
    10454. 

  10454. -# CONFIG_DEV_APPLETALK is not set
    10455. 

  10455.  # CONFIG_DECNET is not set
    10456. 

  10456.  # CONFIG_BRIDGE is not set
    10457. 

  10457.  # CONFIG_X25 is not set
    10458. 

  10458. @@ -314,9 +309,11 @@ CONFIG_SD_EXTRA_DEVS=40
    10459. 

  10459.  # CONFIG_SCSI_MEGARAID is not set
    10460. 

  10460.  # CONFIG_SCSI_MEGARAID2 is not set
    10461. 

  10461.  # CONFIG_SCSI_SATA is not set
    10462. 

  10462. +# CONFIG_SCSI_SATA_AHCI is not set
    10463. 

  10463.  # CONFIG_SCSI_SATA_SVW is not set
    10464. 

  10464.  # CONFIG_SCSI_ATA_PIIX is not set
    10465. 

  10465.  # CONFIG_SCSI_SATA_NV is not set
    10466. 

  10466. +# CONFIG_SCSI_SATA_QSTOR is not set
    10467. 

  10467.  # CONFIG_SCSI_SATA_PROMISE is not set
    10468. 

  10468.  # CONFIG_SCSI_SATA_SX4 is not set
    10469. 

  10469.  # CONFIG_SCSI_SATA_SIL is not set
    10470. 

  10470. @@ -474,7 +471,6 @@ CONFIG_SERIAL=y
    10471. 

  10471.  CONFIG_SERIAL_CONSOLE=y
    10472. 

  10472.  # CONFIG_SERIAL_EXTENDED is not set
    10473. 

  10473.  # CONFIG_SERIAL_NONSTANDARD is not set
    10474. 

  10474. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    10475. 

  10475.  CONFIG_UNIX98_PTYS=y
    10476. 

  10476.  CONFIG_UNIX98_PTY_COUNT=256
    10477. 

  10477.  
    10478. 

  10478. --- a/arch/mips64/defconfig-decstation
    10479. 

  10479. +++ b/arch/mips64/defconfig-decstation
    10480. 

  10480. @@ -28,8 +28,8 @@ CONFIG_EXPERIMENTAL=y
    10481. 

  10481.  # CONFIG_MIPS_PB1000 is not set
    10482. 

  10482.  # CONFIG_MIPS_PB1100 is not set
    10483. 

  10483.  # CONFIG_MIPS_PB1500 is not set
    10484. 

  10484. -# CONFIG_MIPS_HYDROGEN3 is not set
    10485. 

  10485.  # CONFIG_MIPS_PB1550 is not set
    10486. 

  10486. +# CONFIG_MIPS_HYDROGEN3 is not set
    10487. 

  10487.  # CONFIG_MIPS_XXS1500 is not set
    10488. 

  10488.  # CONFIG_MIPS_MTX1 is not set
    10489. 

  10489.  # CONFIG_COGENT_CSB250 is not set
    10490. 

  10490. @@ -224,11 +224,6 @@ CONFIG_IP_PNP_BOOTP=y
    10491. 

  10491.  #
    10492. 

  10492.  # CONFIG_IPX is not set
    10493. 

  10493.  # CONFIG_ATALK is not set
    10494. 

  10494. -
    10495. 

  10495. -#
    10496. 

  10496. -# Appletalk devices
    10497. 

  10497. -#
    10498. 

  10498. -# CONFIG_DEV_APPLETALK is not set
    10499. 

  10499.  # CONFIG_DECNET is not set
    10500. 

  10500.  # CONFIG_BRIDGE is not set
    10501. 

  10501.  # CONFIG_X25 is not set
    10502. 

  10502. @@ -307,9 +302,11 @@ CONFIG_SCSI_DECNCR=y
    10503. 

  10503.  # CONFIG_SCSI_MEGARAID is not set
    10504. 

  10504.  # CONFIG_SCSI_MEGARAID2 is not set
    10505. 

  10505.  # CONFIG_SCSI_SATA is not set
    10506. 

  10506. +# CONFIG_SCSI_SATA_AHCI is not set
    10507. 

  10507.  # CONFIG_SCSI_SATA_SVW is not set
    10508. 

  10508.  # CONFIG_SCSI_ATA_PIIX is not set
    10509. 

  10509.  # CONFIG_SCSI_SATA_NV is not set
    10510. 

  10510. +# CONFIG_SCSI_SATA_QSTOR is not set
    10511. 

  10511.  # CONFIG_SCSI_SATA_PROMISE is not set
    10512. 

  10512.  # CONFIG_SCSI_SATA_SX4 is not set
    10513. 

  10513.  # CONFIG_SCSI_SATA_SIL is not set
    10514. 

  10514. @@ -477,7 +474,6 @@ CONFIG_SERIAL_DEC=y
    10515. 

  10515.  CONFIG_SERIAL_DEC_CONSOLE=y
    10516. 

  10516.  # CONFIG_DZ is not set
    10517. 

  10517.  CONFIG_ZS=y
    10518. 

  10518. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    10519. 

  10519.  CONFIG_UNIX98_PTYS=y
    10520. 

  10520.  CONFIG_UNIX98_PTY_COUNT=256
    10521. 

  10521.  
    10522. 

  10522. --- a/arch/mips64/defconfig-ip22
    10523. 

  10523. +++ b/arch/mips64/defconfig-ip22
    10524. 

  10524. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    10525. 

  10525.  # CONFIG_MIPS_PB1000 is not set
    10526. 

  10526.  # CONFIG_MIPS_PB1100 is not set
    10527. 

  10527.  # CONFIG_MIPS_PB1500 is not set
    10528. 

  10528. -# CONFIG_MIPS_HYDROGEN3 is not set
    10529. 

  10529.  # CONFIG_MIPS_PB1550 is not set
    10530. 

  10530. +# CONFIG_MIPS_HYDROGEN3 is not set
    10531. 

  10531.  # CONFIG_MIPS_XXS1500 is not set
    10532. 

  10532.  # CONFIG_MIPS_MTX1 is not set
    10533. 

  10533.  # CONFIG_COGENT_CSB250 is not set
    10534. 

  10534. @@ -235,11 +235,6 @@ CONFIG_IP_PNP_BOOTP=y
    10535. 

  10535.  #
    10536. 

  10536.  # CONFIG_IPX is not set
    10537. 

  10537.  # CONFIG_ATALK is not set
    10538. 

  10538. -
    10539. 

  10539. -#
    10540. 

  10540. -# Appletalk devices
    10541. 

  10541. -#
    10542. 

  10542. -# CONFIG_DEV_APPLETALK is not set
    10543. 

  10543.  # CONFIG_DECNET is not set
    10544. 

  10544.  # CONFIG_BRIDGE is not set
    10545. 

  10545.  # CONFIG_X25 is not set
    10546. 

  10546. @@ -319,9 +314,11 @@ CONFIG_SGIWD93_SCSI=y
    10547. 

  10547.  # CONFIG_SCSI_MEGARAID is not set
    10548. 

  10548.  # CONFIG_SCSI_MEGARAID2 is not set
    10549. 

  10549.  # CONFIG_SCSI_SATA is not set
    10550. 

  10550. +# CONFIG_SCSI_SATA_AHCI is not set
    10551. 

  10551.  # CONFIG_SCSI_SATA_SVW is not set
    10552. 

  10552.  # CONFIG_SCSI_ATA_PIIX is not set
    10553. 

  10553.  # CONFIG_SCSI_SATA_NV is not set
    10554. 

  10554. +# CONFIG_SCSI_SATA_QSTOR is not set
    10555. 

  10555.  # CONFIG_SCSI_SATA_PROMISE is not set
    10556. 

  10556.  # CONFIG_SCSI_SATA_SX4 is not set
    10557. 

  10557.  # CONFIG_SCSI_SATA_SIL is not set
    10558. 

  10558. @@ -488,7 +485,6 @@ CONFIG_SERIAL_NONSTANDARD=y
    10559. 

  10559.  # CONFIG_SERIAL_TXX9_CONSOLE is not set
    10560. 

  10560.  # CONFIG_TXX927_SERIAL is not set
    10561. 

  10561.  CONFIG_IP22_SERIAL=y
    10562. 

  10562. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    10563. 

  10563.  CONFIG_UNIX98_PTYS=y
    10564. 

  10564.  CONFIG_UNIX98_PTY_COUNT=256
    10565. 

  10565.  
    10566. 

  10566. --- a/arch/mips64/defconfig-ip27
    10567. 

  10567. +++ b/arch/mips64/defconfig-ip27
    10568. 

  10568. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    10569. 

  10569.  # CONFIG_MIPS_PB1000 is not set
    10570. 

  10570.  # CONFIG_MIPS_PB1100 is not set
    10571. 

  10571.  # CONFIG_MIPS_PB1500 is not set
    10572. 

  10572. -# CONFIG_MIPS_HYDROGEN3 is not set
    10573. 

  10573.  # CONFIG_MIPS_PB1550 is not set
    10574. 

  10574. +# CONFIG_MIPS_HYDROGEN3 is not set
    10575. 

  10575.  # CONFIG_MIPS_XXS1500 is not set
    10576. 

  10576.  # CONFIG_MIPS_MTX1 is not set
    10577. 

  10577.  # CONFIG_COGENT_CSB250 is not set
    10578. 

  10578. @@ -470,9 +470,11 @@ CONFIG_SCSI_LOGGING=y
    10579. 

  10579.  # CONFIG_SCSI_MEGARAID is not set
    10580. 

  10580.  # CONFIG_SCSI_MEGARAID2 is not set
    10581. 

  10581.  # CONFIG_SCSI_SATA is not set
    10582. 

  10582. +# CONFIG_SCSI_SATA_AHCI is not set
    10583. 

  10583.  # CONFIG_SCSI_SATA_SVW is not set
    10584. 

  10584.  # CONFIG_SCSI_ATA_PIIX is not set
    10585. 

  10585.  # CONFIG_SCSI_SATA_NV is not set
    10586. 

  10586. +# CONFIG_SCSI_SATA_QSTOR is not set
    10587. 

  10587.  # CONFIG_SCSI_SATA_PROMISE is not set
    10588. 

  10588.  # CONFIG_SCSI_SATA_SX4 is not set
    10589. 

  10589.  # CONFIG_SCSI_SATA_SIL is not set
    10590. 

  10590. @@ -658,7 +660,6 @@ CONFIG_SERIAL=y
    10591. 

  10591.  CONFIG_SERIAL_CONSOLE=y
    10592. 

  10592.  # CONFIG_SERIAL_EXTENDED is not set
    10593. 

  10593.  # CONFIG_SERIAL_NONSTANDARD is not set
    10594. 

  10594. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    10595. 

  10595.  CONFIG_UNIX98_PTYS=y
    10596. 

  10596.  CONFIG_UNIX98_PTY_COUNT=256
    10597. 

  10597.  
    10598. 

  10598. --- a/arch/mips64/defconfig-jaguar
    10599. 

  10599. +++ b/arch/mips64/defconfig-jaguar
    10600. 

  10600. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    10601. 

  10601.  # CONFIG_MIPS_PB1000 is not set
    10602. 

  10602.  # CONFIG_MIPS_PB1100 is not set
    10603. 

  10603.  # CONFIG_MIPS_PB1500 is not set
    10604. 

  10604. -# CONFIG_MIPS_HYDROGEN3 is not set
    10605. 

  10605.  # CONFIG_MIPS_PB1550 is not set
    10606. 

  10606. +# CONFIG_MIPS_HYDROGEN3 is not set
    10607. 

  10607.  # CONFIG_MIPS_XXS1500 is not set
    10608. 

  10608.  # CONFIG_MIPS_MTX1 is not set
    10609. 

  10609.  # CONFIG_COGENT_CSB250 is not set
    10610. 

  10610. @@ -227,11 +227,6 @@ CONFIG_IP_PNP_DHCP=y
    10611. 

  10611.  #
    10612. 

  10612.  # CONFIG_IPX is not set
    10613. 

  10613.  # CONFIG_ATALK is not set
    10614. 

  10614. -
    10615. 

  10615. -#
    10616. 

  10616. -# Appletalk devices
    10617. 

  10617. -#
    10618. 

  10618. -# CONFIG_DEV_APPLETALK is not set
    10619. 

  10619.  # CONFIG_DECNET is not set
    10620. 

  10620.  # CONFIG_BRIDGE is not set
    10621. 

  10621.  # CONFIG_X25 is not set
    10622. 

  10622. @@ -403,7 +398,6 @@ CONFIG_SERIAL_NONSTANDARD=y
    10623. 

  10623.  # CONFIG_SERIAL_TXX9 is not set
    10624. 

  10624.  # CONFIG_SERIAL_TXX9_CONSOLE is not set
    10625. 

  10625.  # CONFIG_TXX927_SERIAL is not set
    10626. 

  10626. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    10627. 

  10627.  CONFIG_UNIX98_PTYS=y
    10628. 

  10628.  CONFIG_UNIX98_PTY_COUNT=256
    10629. 

  10629.  
    10630. 

  10630. --- a/arch/mips64/defconfig-malta
    10631. 

  10631. +++ b/arch/mips64/defconfig-malta
    10632. 

  10632. @@ -22,16 +22,19 @@ CONFIG_KMOD=y
    10633. 

  10633.  #
    10634. 

  10634.  # CONFIG_ACER_PICA_61 is not set
    10635. 

  10635.  # CONFIG_MIPS_BOSPORUS is not set
    10636. 

  10636. +# CONFIG_MIPS_FICMMP is not set
    10637. 

  10637.  # CONFIG_MIPS_MIRAGE is not set
    10638. 

  10638.  # CONFIG_MIPS_DB1000 is not set
    10639. 

  10639.  # CONFIG_MIPS_DB1100 is not set
    10640. 

  10640.  # CONFIG_MIPS_DB1500 is not set
    10641. 

  10641.  # CONFIG_MIPS_DB1550 is not set
    10642. 

  10642. +# CONFIG_MIPS_DB1200 is not set
    10643. 

  10643.  # CONFIG_MIPS_PB1000 is not set
    10644. 

  10644.  # CONFIG_MIPS_PB1100 is not set
    10645. 

  10645.  # CONFIG_MIPS_PB1500 is not set
    10646. 

  10646. -# CONFIG_MIPS_HYDROGEN3 is not set
    10647. 

  10647.  # CONFIG_MIPS_PB1550 is not set
    10648. 

  10648. +# CONFIG_MIPS_PB1200 is not set
    10649. 

  10649. +# CONFIG_MIPS_HYDROGEN3 is not set
    10650. 

  10650.  # CONFIG_MIPS_XXS1500 is not set
    10651. 

  10651.  # CONFIG_MIPS_MTX1 is not set
    10652. 

  10652.  # CONFIG_COGENT_CSB250 is not set
    10653. 

  10653. @@ -146,9 +149,9 @@ CONFIG_KCORE_ELF=y
    10654. 

  10654.  CONFIG_BINFMT_ELF=y
    10655. 

  10655.  CONFIG_MIPS32_COMPAT=y
    10656. 

  10656.  CONFIG_MIPS32_O32=y
    10657. 

  10657. -# CONFIG_MIPS32_N32 is not set
    10658. 

  10658. +CONFIG_MIPS32_N32=y
    10659. 

  10659.  CONFIG_BINFMT_ELF32=y
    10660. 

  10660. -# CONFIG_BINFMT_MISC is not set
    10661. 

  10661. +CONFIG_BINFMT_MISC=y
    10662. 

  10662.  # CONFIG_OOM_KILLER is not set
    10663. 

  10663.  # CONFIG_CMDLINE_BOOL is not set
    10664. 

  10664.  
    10665. 

  10665. @@ -235,11 +238,6 @@ CONFIG_IP_PNP_BOOTP=y
    10666. 

  10666.  #
    10667. 

  10667.  # CONFIG_IPX is not set
    10668. 

  10668.  # CONFIG_ATALK is not set
    10669. 

  10669. -
    10670. 

  10670. -#
    10671. 

  10671. -# Appletalk devices
    10672. 

  10672. -#
    10673. 

  10673. -# CONFIG_DEV_APPLETALK is not set
    10674. 

  10674.  # CONFIG_DECNET is not set
    10675. 

  10675.  # CONFIG_BRIDGE is not set
    10676. 

  10676.  # CONFIG_X25 is not set
    10677. 

  10677. @@ -271,8 +269,83 @@ CONFIG_IP_PNP_BOOTP=y
    10678. 

  10678.  #
    10679. 

  10679.  # ATA/IDE/MFM/RLL support
    10680. 

  10680.  #
    10681. 

  10681. -# CONFIG_IDE is not set
    10682. 

  10682. +CONFIG_IDE=y
    10683. 

  10683. +
    10684. 

  10684. +#
    10685. 

  10685. +# IDE, ATA and ATAPI Block devices
    10686. 

  10686. +#
    10687. 

  10687. +CONFIG_BLK_DEV_IDE=y
    10688. 

  10688. +
    10689. 

  10689. +#
    10690. 

  10690. +# Please see Documentation/ide.txt for help/info on IDE drives
    10691. 

  10691. +#
    10692. 

  10692. +# CONFIG_BLK_DEV_HD_IDE is not set
    10693. 

  10693.  # CONFIG_BLK_DEV_HD is not set
    10694. 

  10694. +# CONFIG_BLK_DEV_IDE_SATA is not set
    10695. 

  10695. +CONFIG_BLK_DEV_IDEDISK=y
    10696. 

  10696. +# CONFIG_IDEDISK_MULTI_MODE is not set
    10697. 

  10697. +# CONFIG_IDEDISK_STROKE is not set
    10698. 

  10698. +# CONFIG_BLK_DEV_IDECS is not set
    10699. 

  10699. +# CONFIG_BLK_DEV_DELKIN is not set
    10700. 

  10700. +CONFIG_BLK_DEV_IDECD=y
    10701. 

  10701. +CONFIG_BLK_DEV_IDETAPE=y
    10702. 

  10702. +CONFIG_BLK_DEV_IDEFLOPPY=y
    10703. 

  10703. +# CONFIG_BLK_DEV_IDESCSI is not set
    10704. 

  10704. +# CONFIG_IDE_TASK_IOCTL is not set
    10705. 

  10705. +
    10706. 

  10706. +#
    10707. 

  10707. +# IDE chipset support/bugfixes
    10708. 

  10708. +#
    10709. 

  10709. +# CONFIG_BLK_DEV_CMD640 is not set
    10710. 

  10710. +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
    10711. 

  10711. +# CONFIG_BLK_DEV_ISAPNP is not set
    10712. 

  10712. +CONFIG_BLK_DEV_IDEPCI=y
    10713. 

  10713. +CONFIG_BLK_DEV_GENERIC=y
    10714. 

  10714. +CONFIG_IDEPCI_SHARE_IRQ=y
    10715. 

  10715. +CONFIG_BLK_DEV_IDEDMA_PCI=y
    10716. 

  10716. +# CONFIG_BLK_DEV_OFFBOARD is not set
    10717. 

  10717. +CONFIG_BLK_DEV_IDEDMA_FORCED=y
    10718. 

  10718. +CONFIG_IDEDMA_PCI_AUTO=y
    10719. 

  10719. +# CONFIG_IDEDMA_ONLYDISK is not set
    10720. 

  10720. +CONFIG_BLK_DEV_IDEDMA=y
    10721. 

  10721. +# CONFIG_IDEDMA_PCI_WIP is not set
    10722. 

  10722. +# CONFIG_BLK_DEV_ADMA100 is not set
    10723. 

  10723. +# CONFIG_BLK_DEV_AEC62XX is not set
    10724. 

  10724. +# CONFIG_BLK_DEV_ALI15X3 is not set
    10725. 

  10725. +# CONFIG_WDC_ALI15X3 is not set
    10726. 

  10726. +# CONFIG_BLK_DEV_AMD74XX is not set
    10727. 

  10727. +# CONFIG_AMD74XX_OVERRIDE is not set
    10728. 

  10728. +# CONFIG_BLK_DEV_ATIIXP is not set
    10729. 

  10729. +# CONFIG_BLK_DEV_CMD64X is not set
    10730. 

  10730. +# CONFIG_BLK_DEV_TRIFLEX is not set
    10731. 

  10731. +# CONFIG_BLK_DEV_CY82C693 is not set
    10732. 

  10732. +# CONFIG_BLK_DEV_CS5530 is not set
    10733. 

  10733. +# CONFIG_BLK_DEV_HPT34X is not set
    10734. 

  10734. +# CONFIG_HPT34X_AUTODMA is not set
    10735. 

  10735. +# CONFIG_BLK_DEV_HPT366 is not set
    10736. 

  10736. +CONFIG_BLK_DEV_PIIX=y
    10737. 

  10737. +# CONFIG_BLK_DEV_NS87415 is not set
    10738. 

  10738. +# CONFIG_BLK_DEV_OPTI621 is not set
    10739. 

  10739. +# CONFIG_BLK_DEV_PDC202XX_OLD is not set
    10740. 

  10740. +# CONFIG_PDC202XX_BURST is not set
    10741. 

  10741. +# CONFIG_BLK_DEV_PDC202XX_NEW is not set
    10742. 

  10742. +# CONFIG_BLK_DEV_RZ1000 is not set
    10743. 

  10743. +# CONFIG_BLK_DEV_SC1200 is not set
    10744. 

  10744. +# CONFIG_BLK_DEV_SVWKS is not set
    10745. 

  10745. +# CONFIG_BLK_DEV_SIIMAGE is not set
    10746. 

  10746. +# CONFIG_BLK_DEV_SIS5513 is not set
    10747. 

  10747. +# CONFIG_BLK_DEV_SLC90E66 is not set
    10748. 

  10748. +# CONFIG_BLK_DEV_TRM290 is not set
    10749. 

  10749. +# CONFIG_BLK_DEV_VIA82CXXX is not set
    10750. 

  10750. +# CONFIG_IDE_CHIPSETS is not set
    10751. 

  10751. +CONFIG_IDEDMA_AUTO=y
    10752. 

  10752. +# CONFIG_IDEDMA_IVB is not set
    10753. 

  10753. +# CONFIG_DMA_NONPCI is not set
    10754. 

  10754. +# CONFIG_BLK_DEV_ATARAID is not set
    10755. 

  10755. +# CONFIG_BLK_DEV_ATARAID_PDC is not set
    10756. 

  10756. +# CONFIG_BLK_DEV_ATARAID_HPT is not set
    10757. 

  10757. +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
    10758. 

  10758. +# CONFIG_BLK_DEV_ATARAID_SII is not set
    10759. 

  10759.  
    10760. 

  10760.  #
    10761. 

  10761.  # SCSI support
    10762. 

  10762. @@ -317,9 +390,11 @@ CONFIG_SD_EXTRA_DEVS=40
    10763. 

  10763.  # CONFIG_SCSI_MEGARAID is not set
    10764. 

  10764.  # CONFIG_SCSI_MEGARAID2 is not set
    10765. 

  10765.  # CONFIG_SCSI_SATA is not set
    10766. 

  10766. +# CONFIG_SCSI_SATA_AHCI is not set
    10767. 

  10767.  # CONFIG_SCSI_SATA_SVW is not set
    10768. 

  10768.  # CONFIG_SCSI_ATA_PIIX is not set
    10769. 

  10769.  # CONFIG_SCSI_SATA_NV is not set
    10770. 

  10770. +# CONFIG_SCSI_SATA_QSTOR is not set
    10771. 

  10771.  # CONFIG_SCSI_SATA_PROMISE is not set
    10772. 

  10772.  # CONFIG_SCSI_SATA_SX4 is not set
    10773. 

  10773.  # CONFIG_SCSI_SATA_SIL is not set
    10774. 

  10774. @@ -477,7 +552,6 @@ CONFIG_SERIAL=y
    10775. 

  10775.  CONFIG_SERIAL_CONSOLE=y
    10776. 

  10776.  # CONFIG_SERIAL_EXTENDED is not set
    10777. 

  10777.  # CONFIG_SERIAL_NONSTANDARD is not set
    10778. 

  10778. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    10779. 

  10779.  CONFIG_UNIX98_PTYS=y
    10780. 

  10780.  CONFIG_UNIX98_PTY_COUNT=256
    10781. 

  10781.  
    10782. 

  10782. --- a/arch/mips64/defconfig-ocelotc
    10783. 

  10783. +++ b/arch/mips64/defconfig-ocelotc
    10784. 

  10784. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    10785. 

  10785.  # CONFIG_MIPS_PB1000 is not set
    10786. 

  10786.  # CONFIG_MIPS_PB1100 is not set
    10787. 

  10787.  # CONFIG_MIPS_PB1500 is not set
    10788. 

  10788. -# CONFIG_MIPS_HYDROGEN3 is not set
    10789. 

  10789.  # CONFIG_MIPS_PB1550 is not set
    10790. 

  10790. +# CONFIG_MIPS_HYDROGEN3 is not set
    10791. 

  10791.  # CONFIG_MIPS_XXS1500 is not set
    10792. 

  10792.  # CONFIG_MIPS_MTX1 is not set
    10793. 

  10793.  # CONFIG_COGENT_CSB250 is not set
    10794. 

  10794. @@ -231,11 +231,6 @@ CONFIG_IP_PNP_DHCP=y
    10795. 

  10795.  #
    10796. 

  10796.  # CONFIG_IPX is not set
    10797. 

  10797.  # CONFIG_ATALK is not set
    10798. 

  10798. -
    10799. 

  10799. -#
    10800. 

  10800. -# Appletalk devices
    10801. 

  10801. -#
    10802. 

  10802. -# CONFIG_DEV_APPLETALK is not set
    10803. 

  10803.  # CONFIG_DECNET is not set
    10804. 

  10804.  # CONFIG_BRIDGE is not set
    10805. 

  10805.  # CONFIG_X25 is not set
    10806. 

  10806. @@ -453,7 +448,6 @@ CONFIG_SERIAL_NONSTANDARD=y
    10807. 

  10807.  # CONFIG_SERIAL_TXX9 is not set
    10808. 

  10808.  # CONFIG_SERIAL_TXX9_CONSOLE is not set
    10809. 

  10809.  # CONFIG_TXX927_SERIAL is not set
    10810. 

  10810. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    10811. 

  10811.  CONFIG_UNIX98_PTYS=y
    10812. 

  10812.  CONFIG_UNIX98_PTY_COUNT=256
    10813. 

  10813.  
    10814. 

  10814. --- a/arch/mips64/defconfig-sb1250-swarm
    10815. 

  10815. +++ b/arch/mips64/defconfig-sb1250-swarm
    10816. 

  10816. @@ -30,8 +30,8 @@ CONFIG_KMOD=y
    10817. 

  10817.  # CONFIG_MIPS_PB1000 is not set
    10818. 

  10818.  # CONFIG_MIPS_PB1100 is not set
    10819. 

  10819.  # CONFIG_MIPS_PB1500 is not set
    10820. 

  10820. -# CONFIG_MIPS_HYDROGEN3 is not set
    10821. 

  10821.  # CONFIG_MIPS_PB1550 is not set
    10822. 

  10822. +# CONFIG_MIPS_HYDROGEN3 is not set
    10823. 

  10823.  # CONFIG_MIPS_XXS1500 is not set
    10824. 

  10824.  # CONFIG_MIPS_MTX1 is not set
    10825. 

  10825.  # CONFIG_COGENT_CSB250 is not set
    10826. 

  10826. @@ -90,6 +90,7 @@ CONFIG_SIBYTE_CFE=y
    10827. 

  10827.  # CONFIG_SIBYTE_TBPROF is not set
    10828. 

  10828.  CONFIG_SIBYTE_GENBUS_IDE=y
    10829. 

  10829.  CONFIG_SMP_CAPABLE=y
    10830. 

  10830. +CONFIG_MIPS_RTC=y
    10831. 

  10831.  # CONFIG_SNI_RM200_PCI is not set
    10832. 

  10832.  # CONFIG_TANBAC_TB0226 is not set
    10833. 

  10833.  # CONFIG_TANBAC_TB0229 is not set
    10834. 

  10834. @@ -253,11 +254,6 @@ CONFIG_INET=y
    10835. 

  10835.  #
    10836. 

  10836.  # CONFIG_IPX is not set
    10837. 

  10837.  # CONFIG_ATALK is not set
    10838. 

  10838. -
    10839. 

  10839. -#
    10840. 

  10840. -# Appletalk devices
    10841. 

  10841. -#
    10842. 

  10842. -# CONFIG_DEV_APPLETALK is not set
    10843. 

  10843.  # CONFIG_DECNET is not set
    10844. 

  10844.  # CONFIG_BRIDGE is not set
    10845. 

  10845.  # CONFIG_X25 is not set
    10846. 

  10846. @@ -432,7 +428,6 @@ CONFIG_SERIAL_NONSTANDARD=y
    10847. 

  10847.  CONFIG_SIBYTE_SB1250_DUART=y
    10848. 

  10848.  CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y
    10849. 

  10849.  CONFIG_SERIAL_CONSOLE=y
    10850. 

  10850. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    10851. 

  10851.  CONFIG_UNIX98_PTYS=y
    10852. 

  10852.  CONFIG_UNIX98_PTY_COUNT=256
    10853. 

  10853.  
    10854. 

  10854. --- a/arch/mips64/defconfig-sead
    10855. 

  10855. +++ b/arch/mips64/defconfig-sead
    10856. 

  10856. @@ -28,8 +28,8 @@ CONFIG_EXPERIMENTAL=y
    10857. 

  10857.  # CONFIG_MIPS_PB1000 is not set
    10858. 

  10858.  # CONFIG_MIPS_PB1100 is not set
    10859. 

  10859.  # CONFIG_MIPS_PB1500 is not set
    10860. 

  10860. -# CONFIG_MIPS_HYDROGEN3 is not set
    10861. 

  10861.  # CONFIG_MIPS_PB1550 is not set
    10862. 

  10862. +# CONFIG_MIPS_HYDROGEN3 is not set
    10863. 

  10863.  # CONFIG_MIPS_XXS1500 is not set
    10864. 

  10864.  # CONFIG_MIPS_MTX1 is not set
    10865. 

  10865.  # CONFIG_COGENT_CSB250 is not set
    10866. 

  10866. @@ -242,7 +242,6 @@ CONFIG_SERIAL=y
    10867. 

  10867.  CONFIG_SERIAL_CONSOLE=y
    10868. 

  10868.  # CONFIG_SERIAL_EXTENDED is not set
    10869. 

  10869.  # CONFIG_SERIAL_NONSTANDARD is not set
    10870. 

  10870. -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
    10871. 

  10871.  # CONFIG_UNIX98_PTYS is not set
    10872. 

  10872.  
    10873. 

  10873.  #
    10874. 

  10874. --- a/arch/mips64/kernel/binfmt_elfn32.c
    10875. 

  10875. +++ b/arch/mips64/kernel/binfmt_elfn32.c
    10876. 

  10876. @@ -116,4 +116,7 @@ MODULE_AUTHOR("Ralf Baechle (ralf@linux-
    10877. 

  10877.  #undef MODULE_DESCRIPTION
    10878. 

  10878.  #undef MODULE_AUTHOR
    10879. 

  10879.  
    10880. 

  10880. +#undef TASK_SIZE
    10881. 

  10881. +#define TASK_SIZE TASK_SIZE32
    10882. 

  10882. +
    10883. 

  10883.  #include "../../../fs/binfmt_elf.c"
    10884. 

  10884. --- a/arch/mips64/kernel/binfmt_elfo32.c
    10885. 

  10885. +++ b/arch/mips64/kernel/binfmt_elfo32.c
    10886. 

  10886. @@ -137,4 +137,7 @@ MODULE_AUTHOR("Ralf Baechle (ralf@linux-
    10887. 

  10887.  #undef MODULE_DESCRIPTION
    10888. 

  10888.  #undef MODULE_AUTHOR
    10889. 

  10889.  
    10890. 

  10890. +#undef TASK_SIZE
    10891. 

  10891. +#define TASK_SIZE TASK_SIZE32
    10892. 

  10892. +
    10893. 

  10893.  #include "../../../fs/binfmt_elf.c"
    10894. 

  10894. --- a/arch/mips64/kernel/head.S
    10895. 

  10895. +++ b/arch/mips64/kernel/head.S
    10896. 

  10896. @@ -91,6 +91,21 @@ EXPORT(_stext)
    10897. 

  10897.  	__INIT
    10898. 

  10898.  
    10899. 

  10899.  NESTED(kernel_entry, 16, sp)			# kernel entry point
    10900. 

  10900. +	.set	push
    10901. 

  10901. +	/*
    10902. 

  10902. +	 * For the moment disable interrupts, mark the kernel mode and
    10903. 

  10903. +	 * set ST0_KX so that the CPU does not spit fire when using
    10904. 

  10904. +	 * 64-bit addresses.  A full initialization of the CPU's status
    10905. 

  10905. +	 * register is done later in per_cpu_trap_init().
    10906. 

  10906. +	 */
    10907. 

  10907. +	mfc0	t0, CP0_STATUS
    10908. 

  10908. +	or	t0, ST0_CU0|ST0_KX|0x1f
    10909. 

  10909. +	xor	t0, 0x1f
    10910. 

  10910. +	mtc0	t0, CP0_STATUS
    10911. 

  10911. +
    10912. 

  10912. +	.set	noreorder
    10913. 

  10913. +	sll	zero,3				# ehb
    10914. 

  10914. +	.set	reorder
    10915. 

  10915.  
    10916. 

  10916.  	ori	sp, 0xf				# align stack on 16 byte.
    10917. 

  10917.  	xori	sp, 0xf
    10918. 

  10918. @@ -103,8 +118,6 @@ NESTED(kernel_entry, 16, sp)			# kernel 
    10919. 

  10919.  
    10920. 

  10920.  	ARC64_TWIDDLE_PC
    10921. 

  10921.  
    10922. 

  10922. -	CLI					# disable interrupts
    10923. 

  10923. -
    10924. 

  10924.  	/*
    10925. 

  10925.  	 * The firmware/bootloader passes argc/argp/envp
    10926. 

  10926.  	 * to us as arguments.  But clear bss first because
    10927. 

  10927. @@ -125,6 +138,7 @@ NESTED(kernel_entry, 16, sp)			# kernel 
    10928. 

  10928.  	dsubu	sp, 4*SZREG			# init stack pointer
    10929. 

  10929.  
    10930. 

  10930.  	j	init_arch
    10931. 

  10931. +	.set	pop
    10932. 

  10932.  	END(kernel_entry)
    10933. 

  10933.  
    10934. 

  10934.  #ifdef CONFIG_SMP
    10935. 

  10935. @@ -133,6 +147,23 @@ NESTED(kernel_entry, 16, sp)			# kernel 
    10936. 

  10936.   * function after setting up the stack and gp registers.
    10937. 

  10937.   */
    10938. 

  10938.  NESTED(smp_bootstrap, 16, sp)
    10939. 

  10939. +	.set	push
    10940. 

  10940. +	/*
    10941. 

  10941. +	 * For the moment disable interrupts and bootstrap exception
    10942. 

  10942. +	 * vectors, mark the kernel mode and set ST0_KX so that the CPU
    10943. 

  10943. +	 * does not spit fire when using 64-bit addresses.  A full
    10944. 

  10944. +	 * initialization of the CPU's status register is done later in
    10945. 

  10945. +	 * per_cpu_trap_init().
    10946. 

  10946. +	 */
    10947. 

  10947. +	mfc0	t0, CP0_STATUS
    10948. 

  10948. +	or	t0, ST0_CU0|ST0_BEV|ST0_KX|0x1f
    10949. 

  10949. +	xor	t0, ST0_BEV|0x1f
    10950. 

  10950. +	mtc0	t0, CP0_STATUS
    10951. 

  10951. +
    10952. 

  10952. +	.set	noreorder
    10953. 

  10953. +	sll	zero,3				# ehb
    10954. 

  10954. +	.set	reorder
    10955. 

  10955. +
    10956. 

  10956.  #ifdef CONFIG_SGI_IP27
    10957. 

  10957.  	GET_NASID_ASM	t1
    10958. 

  10958.  	dli	t0, KLDIR_OFFSET + (KLI_KERN_VARS * KLDIR_ENT_SIZE) + \
    10959. 

  10959. @@ -146,19 +177,8 @@ NESTED(smp_bootstrap, 16, sp)
    10960. 

  10960.  	ARC64_TWIDDLE_PC
    10961. 

  10961.  #endif /* CONFIG_SGI_IP27 */
    10962. 

  10962.  
    10963. 

  10963. -	CLI
    10964. 

  10964. -
    10965. 

  10965. -	/*
    10966. 

  10966. -	 * For the moment set ST0_KU so the CPU will not spit fire when
    10967. 

  10967. -	 * executing 64-bit instructions.  The full initialization of the
    10968. 

  10968. -	 * CPU's status register is done later in per_cpu_trap_init().
    10969. 

  10969. -	 */
    10970. 

  10970. -        mfc0	t0, CP0_STATUS
    10971. 

  10971. -        or	t0, ST0_KX
    10972. 

  10972. -	mtc0	t0, CP0_STATUS
    10973. 

  10973. -
    10974. 

  10974.  	jal	start_secondary			# XXX: IP27: cboot
    10975. 

  10975. -
    10976. 

  10976. +	.set	pop
    10977. 

  10977.  	END(smp_bootstrap)
    10978. 

  10978.  #endif /* CONFIG_SMP */
    10979. 

  10979.  
    10980. 

  10980. --- a/arch/mips64/kernel/ioctl32.c
    10981. 

  10981. +++ b/arch/mips64/kernel/ioctl32.c
    10982. 

  10982. @@ -2352,7 +2352,7 @@ static struct ioctl32_list ioctl32_handl
    10983. 

  10983.  	IOCTL32_HANDLER(AUTOFS_IOC_SETTIMEOUT32, ioc_settimeout),
    10984. 

  10984.  	IOCTL32_DEFAULT(AUTOFS_IOC_EXPIRE),
    10985. 

  10985.  	IOCTL32_DEFAULT(AUTOFS_IOC_EXPIRE_MULTI),
    10986. 

  10986. -	IOCTL32_DEFAULT(AUTOFS_IOC_PROTSUBVER),
    10987. 

  10987. +	IOCTL32_DEFAULT(AUTOFS_IOC_PROTOSUBVER),
    10988. 

  10988.  	IOCTL32_DEFAULT(AUTOFS_IOC_ASKREGHOST),
    10989. 

  10989.  	IOCTL32_DEFAULT(AUTOFS_IOC_TOGGLEREGHOST),
    10990. 

  10990.  	IOCTL32_DEFAULT(AUTOFS_IOC_ASKUMOUNT),
    10991. 

  10991. --- a/arch/mips64/kernel/linux32.c
    10992. 

  10992. +++ b/arch/mips64/kernel/linux32.c
    10993. 

  10993. @@ -1101,6 +1101,7 @@ do_readv_writev32(int type, struct file 
    10994. 

  10994.  	 * specially as they have atomicity guarantees and can handle
    10995. 

  10995.  	 * iovec's natively
    10996. 

  10996.  	 */
    10997. 

  10997. +	inode = file->f_dentry->d_inode;
    10998. 

  10998.  	if (inode->i_sock) {
    10999. 

  10999.  		int err;
    11000. 

  11000.  		err = sock_readv_writev(type, inode, file, iov, count, tot_len);
    11001. 

  11001. @@ -1187,72 +1188,19 @@ bad_file:
    11002. 

  11002.     lseek back to original location.  They fail just like lseek does on
    11003. 

  11003.     non-seekable files.  */
    11004. 

  11004.  
    11005. 

  11005. -asmlinkage ssize_t sys32_pread(unsigned int fd, char * buf,
    11006. 

  11006. -			       size_t count, u32 unused, u64 a4, u64 a5)
    11007. 

  11007. +asmlinkage ssize_t sys32_pread(unsigned int fd, char *buf,
    11008. 

  11008. +                                 size_t count, u32 unused, u64 a4, u64 a5)
    11009. 

  11009.  {
    11010. 

  11010. -	ssize_t ret;
    11011. 

  11011. -	struct file * file;
    11012. 

  11012. -	ssize_t (*read)(struct file *, char *, size_t, loff_t *);
    11013. 

  11013. -	loff_t pos;
    11014. 

  11014. -
    11015. 

  11015. -	ret = -EBADF;
    11016. 

  11016. -	file = fget(fd);
    11017. 

  11017. -	if (!file)
    11018. 

  11018. -		goto bad_file;
    11019. 

  11019. -	if (!(file->f_mode & FMODE_READ))
    11020. 

  11020. -		goto out;
    11021. 

  11021. -	pos = merge_64(a4, a5);
    11022. 

  11022. -	ret = locks_verify_area(FLOCK_VERIFY_READ, file->f_dentry->d_inode,
    11023. 

  11023. -				file, pos, count);
    11024. 

  11024. -	if (ret)
    11025. 

  11025. -		goto out;
    11026. 

  11026. -	ret = -EINVAL;
    11027. 

  11027. -	if (!file->f_op || !(read = file->f_op->read))
    11028. 

  11028. -		goto out;
    11029. 

  11029. -	if (pos < 0)
    11030. 

  11030. -		goto out;
    11031. 

  11031. -	ret = read(file, buf, count, &pos);
    11032. 

  11032. -	if (ret > 0)
    11033. 

  11033. -		dnotify_parent(file->f_dentry, DN_ACCESS);
    11034. 

  11034. -out:
    11035. 

  11035. -	fput(file);
    11036. 

  11036. -bad_file:
    11037. 

  11037. -	return ret;
    11038. 

  11038. +	return sys_pread(fd, buf, count, merge_64(a4, a5));
    11039. 

  11039.  }
    11040. 

  11040.  
    11041. 

  11041.  asmlinkage ssize_t sys32_pwrite(unsigned int fd, const char * buf,
    11042. 

  11042.  			        size_t count, u32 unused, u64 a4, u64 a5)
    11043. 

  11043.  {
    11044. 

  11044. -	ssize_t ret;
    11045. 

  11045. -	struct file * file;
    11046. 

  11046. -	ssize_t (*write)(struct file *, const char *, size_t, loff_t *);
    11047. 

  11047. -	loff_t pos;
    11048. 

  11048. +	return sys_pwrite(fd, buf, count, merge_64(a4, a5));
    11049. 

  11049. +}
    11050. 

  11050.  
    11051. 

  11051. -	ret = -EBADF;
    11052. 

  11052. -	file = fget(fd);
    11053. 

  11053. -	if (!file)
    11054. 

  11054. -		goto bad_file;
    11055. 

  11055. -	if (!(file->f_mode & FMODE_WRITE))
    11056. 

  11056. -		goto out;
    11057. 

  11057. -	pos = merge_64(a4, a5);
    11058. 

  11058. -	ret = locks_verify_area(FLOCK_VERIFY_WRITE, file->f_dentry->d_inode,
    11059. 

  11059. -				file, pos, count);
    11060. 

  11060. -	if (ret)
    11061. 

  11061. -		goto out;
    11062. 

  11062. -	ret = -EINVAL;
    11063. 

  11063. -	if (!file->f_op || !(write = file->f_op->write))
    11064. 

  11064. -		goto out;
    11065. 

  11065. -	if (pos < 0)
    11066. 

  11066. -		goto out;
    11067. 

  11067.  
    11068. 

  11068. -	ret = write(file, buf, count, &pos);
    11069. 

  11069. -	if (ret > 0)
    11070. 

  11070. -		dnotify_parent(file->f_dentry, DN_MODIFY);
    11071. 

  11071. -out:
    11072. 

  11072. -	fput(file);
    11073. 

  11073. -bad_file:
    11074. 

  11074. -	return ret;
    11075. 

  11075. -}
    11076. 

  11076.  /*
    11077. 

  11077.   * Ooo, nasty.  We need here to frob 32-bit unsigned longs to
    11078. 

  11078.   * 64-bit unsigned longs.
    11079. 

  11079. --- a/arch/mips64/kernel/process.c
    11080. 

  11080. +++ b/arch/mips64/kernel/process.c
    11081. 

  11081. @@ -125,6 +125,25 @@ int dump_fpu(struct pt_regs *regs, elf_f
    11082. 

  11082.  	return 1;
    11083. 

  11083.  }
    11084. 

  11084.  
    11085. 

  11085. +void dump_regs(elf_greg_t *gp, struct pt_regs *regs)
    11086. 

  11086. +{
    11087. 

  11087. +	int i;
    11088. 

  11088. +
    11089. 

  11089. +	for (i = 0; i < EF_REG0; i++)
    11090. 

  11090. +		gp[i] = 0;
    11091. 

  11091. +	gp[EF_REG0] = 0;
    11092. 

  11092. +	for (i = 1; i <= 31; i++)
    11093. 

  11093. +		gp[EF_REG0 + i] = regs->regs[i];
    11094. 

  11094. +	gp[EF_REG26] = 0;
    11095. 

  11095. +	gp[EF_REG27] = 0;
    11096. 

  11096. +	gp[EF_LO] = regs->lo;
    11097. 

  11097. +	gp[EF_HI] = regs->hi;
    11098. 

  11098. +	gp[EF_CP0_EPC] = regs->cp0_epc;
    11099. 

  11099. +	gp[EF_CP0_BADVADDR] = regs->cp0_badvaddr;
    11100. 

  11100. +	gp[EF_CP0_STATUS] = regs->cp0_status;
    11101. 

  11101. +	gp[EF_CP0_CAUSE] = regs->cp0_cause;
    11102. 

  11102. +}
    11103. 

  11103. +
    11104. 

  11104.  /*
    11105. 

  11105.   * Create a kernel thread
    11106. 

  11106.   */
    11107. 

  11107. --- a/arch/mips64/kernel/scall_64.S
    11108. 

  11108. +++ b/arch/mips64/kernel/scall_64.S
    11109. 

  11109. @@ -102,15 +102,14 @@ _64_reschedule:
    11110. 

  11110.  
    11111. 

  11111.  trace_a_syscall:
    11112. 

  11112.  	SAVE_STATIC
    11113. 

  11113. -	sd	t2,PT_R1(sp)
    11114. 

  11114. +	move	s0, t2
    11115. 

  11115.  	jal	syscall_trace
    11116. 

  11116. -	ld	t2,PT_R1(sp)
    11117. 

  11117.  
    11118. 

  11118.  	ld	a0, PT_R4(sp)		# Restore argument registers
    11119. 

  11119.  	ld	a1, PT_R5(sp)
    11120. 

  11120.  	ld	a2, PT_R6(sp)
    11121. 

  11121.  	ld	a3, PT_R7(sp)
    11122. 

  11122. -	jalr	t2
    11123. 

  11123. +	jalr	s0
    11124. 

  11124.  
    11125. 

  11125.  	li	t0, -EMAXERRNO - 1	# error?
    11126. 

  11126.  	sltu	t0, t0, v0
    11127. 

  11127. --- a/arch/mips64/kernel/scall_n32.S
    11128. 

  11128. +++ b/arch/mips64/kernel/scall_n32.S
    11129. 

  11129. @@ -106,15 +106,14 @@ n32_reschedule:
    11130. 

  11130.  
    11131. 

  11131.  trace_a_syscall:
    11132. 

  11132.  	SAVE_STATIC
    11133. 

  11133. -	sd	t2,PT_R1(sp)
    11134. 

  11134. +	move	s0, t2
    11135. 

  11135.  	jal	syscall_trace
    11136. 

  11136. -	ld	t2,PT_R1(sp)
    11137. 

  11137.  
    11138. 

  11138.  	ld	a0, PT_R4(sp)		# Restore argument registers
    11139. 

  11139.  	ld	a1, PT_R5(sp)
    11140. 

  11140.  	ld	a2, PT_R6(sp)
    11141. 

  11141.  	ld	a3, PT_R7(sp)
    11142. 

  11142. -	jalr	t2
    11143. 

  11143. +	jalr	s0
    11144. 

  11144.  
    11145. 

  11145.  	li	t0, -EMAXERRNO - 1	# error?
    11146. 

  11146.  	sltu	t0, t0, v0
    11147. 

  11147. --- a/arch/mips64/kernel/scall_o32.S
    11148. 

  11148. +++ b/arch/mips64/kernel/scall_o32.S
    11149. 

  11149. @@ -118,9 +118,8 @@ trace_a_syscall:
    11150. 

  11150.  	sd	a6, PT_R10(sp)
    11151. 

  11151.  	sd	a7, PT_R11(sp)
    11152. 

  11152.  
    11153. 

  11153. -	sd	t2,PT_R1(sp)
    11154. 

  11154. +	move	s0, t2
    11155. 

  11155.  	jal	syscall_trace
    11156. 

  11156. -	ld	t2,PT_R1(sp)
    11157. 

  11157.  
    11158. 

  11158.  	ld	a0, PT_R4(sp)		# Restore argument registers
    11159. 

  11159.  	ld	a1, PT_R5(sp)
    11160. 

  11160. @@ -129,7 +128,7 @@ trace_a_syscall:
    11161. 

  11161.  	ld	a4, PT_R8(sp)
    11162. 

  11162.  	ld	a5, PT_R9(sp)
    11163. 

  11163.  
    11164. 

  11164. -	jalr	t2
    11165. 

  11165. +	jalr	s0
    11166. 

  11166.  
    11167. 

  11167.  	li	t0, -EMAXERRNO - 1	# error?
    11168. 

  11168.  	sltu	t0, t0, v0
    11169. 

  11169. @@ -576,6 +575,8 @@ out:	jr	ra
    11170. 

  11170.  sys_call_table:
    11171. 

  11171.  	syscalltable
    11172. 

  11172.  
    11173. 

  11173. +	.purgem	sys
    11174. 

  11174. +
    11175. 

  11175.  	.macro	sys function, nargs
    11176. 

  11176.  	.byte	\nargs
    11177. 

  11177.  	.endm
    11178. 

  11178. --- a/arch/mips64/kernel/setup.c
    11179. 

  11179. +++ b/arch/mips64/kernel/setup.c
    11180. 

  11180. @@ -129,14 +129,6 @@ asmlinkage void __init init_arch(int arg
    11181. 

  11181.  	 */
    11182. 

  11182.  	load_mmu();
    11183. 

  11183.  
    11184. 

  11184. -	/*
    11185. 

  11185. -	 * On IP27, I am seeing the TS bit set when the kernel is loaded.
    11186. 

  11186. -	 * Maybe because the kernel is in ckseg0 and not xkphys? Clear it
    11187. 

  11187. -	 * anyway ...
    11188. 

  11188. -	 */
    11189. 

  11189. -	clear_c0_status(ST0_BEV|ST0_TS|ST0_CU1|ST0_CU2|ST0_CU3);
    11190. 

  11190. -	set_c0_status(ST0_CU0|ST0_KX|ST0_SX|ST0_FR);
    11191. 

  11191. -
    11192. 

  11192.  	start_kernel();
    11193. 

  11193.  }
    11194. 

  11194.  
    11195. 

  11195. --- a/arch/mips64/kernel/signal_n32.c
    11196. 

  11196. +++ b/arch/mips64/kernel/signal_n32.c
    11197. 

  11197. @@ -68,7 +68,7 @@ struct rt_sigframe_n32 {
    11198. 

  11198.  };
    11199. 

  11199.  
    11200. 

  11200.  extern asmlinkage int restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc);
    11201. 

  11201. -extern int inline setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc);
    11202. 

  11202. +extern int setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc);
    11203. 

  11203.  
    11204. 

  11204.  asmlinkage void sysn32_rt_sigreturn(abi64_no_regargs, struct pt_regs regs)
    11205. 

  11205.  {
    11206. 

  11206. --- a/arch/mips64/kernel/traps.c
    11207. 

  11207. +++ b/arch/mips64/kernel/traps.c
    11208. 

  11208. @@ -462,9 +462,10 @@ static inline void simulate_ll(struct pt
    11209. 

  11209.  	}
    11210. 

  11210.  	ll_task = current;
    11211. 

  11211.  
    11212. 

  11212. +	compute_return_epc(regs);
    11213. 

  11213. +
    11214. 

  11214.  	regs->regs[(opcode & RT) >> 16] = value;
    11215. 

  11215.  
    11216. 

  11216. -	compute_return_epc(regs);
    11217. 

  11217.  	return;
    11218. 

  11218.  
    11219. 

  11219.  sig:
    11220. 

  11220. @@ -495,8 +496,8 @@ static inline void simulate_sc(struct pt
    11221. 

  11221.  		goto sig;
    11222. 

  11222.  	}
    11223. 

  11223.  	if (ll_bit == 0 || ll_task != current) {
    11224. 

  11224. -		regs->regs[reg] = 0;
    11225. 

  11225.  		compute_return_epc(regs);
    11226. 

  11226. +		regs->regs[reg] = 0;
    11227. 

  11227.  		return;
    11228. 

  11228.  	}
    11229. 

  11229.  
    11230. 

  11230. @@ -505,9 +506,9 @@ static inline void simulate_sc(struct pt
    11231. 

  11231.  		goto sig;
    11232. 

  11232.  	}
    11233. 

  11233.  
    11234. 

  11234. +	compute_return_epc(regs);
    11235. 

  11235.  	regs->regs[reg] = 1;
    11236. 

  11236.  
    11237. 

  11237. -	compute_return_epc(regs);
    11238. 

  11238.  	return;
    11239. 

  11239.  
    11240. 

  11240.  sig:
    11241. 

  11241. @@ -809,13 +810,18 @@ extern asmlinkage int fpu_emulator_resto
    11242. 

  11242.  void __init per_cpu_trap_init(void)
    11243. 

  11243.  {
    11244. 

  11244.  	unsigned int cpu = smp_processor_id();
    11245. 

  11245. +	unsigned int status_set = ST0_CU0|ST0_FR|ST0_KX|ST0_SX|ST0_UX;
    11246. 

  11246.  
    11247. 

  11247. -	/* Some firmware leaves the BEV flag set, clear it.  */
    11248. 

  11248. -	clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_BEV);
    11249. 

  11249. -	set_c0_status(ST0_CU0|ST0_FR|ST0_KX|ST0_SX|ST0_UX);
    11250. 

  11250. -
    11251. 

  11251. +	/*
    11252. 

  11252. +	 * Disable coprocessors, enable 64-bit addressing and set FPU
    11253. 

  11253. +	 * for the 32/32 FPR register model.  Reset the BEV flag that
    11254. 

  11254. +	 * some firmware may have left set and the TS bit (for IP27).
    11255. 

  11255. +	 * Set XX for ISA IV code to work.
    11256. 

  11256. +	 */
    11257. 

  11257.  	if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
    11258. 

  11258. -		set_c0_status(ST0_XX);
    11259. 

  11259. +		status_set |= ST0_XX;
    11260. 

  11260. +	change_c0_status(ST0_CU|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
    11261. 

  11261. +			 status_set);
    11262. 

  11262.  
    11263. 

  11263.  	/*
    11264. 

  11264.  	 * Some MIPS CPUs have a dedicated interrupt vector which reduces the
    11265. 

  11265. @@ -825,13 +831,11 @@ void __init per_cpu_trap_init(void)
    11266. 

  11266.  		set_c0_cause(CAUSEF_IV);
    11267. 

  11267.  
    11268. 

  11268.  	cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
    11269. 

  11269. -	write_c0_context(((long)(&pgd_current[cpu])) << 23);
    11270. 

  11270. -	write_c0_wired(0);
    11271. 

  11271. +	TLBMISS_HANDLER_SETUP();
    11272. 

  11272.  
    11273. 

  11273.  	atomic_inc(&init_mm.mm_count);
    11274. 

  11274.  	current->active_mm = &init_mm;
    11275. 

  11275. -	if (current->mm)
    11276. 

  11276. -		BUG();
    11277. 

  11277. +	BUG_ON(current->mm);
    11278. 

  11278.  	enter_lazy_tlb(&init_mm, current, cpu);
    11279. 

  11279.  }
    11280. 

  11280.  
    11281. 

  11281. @@ -842,8 +846,6 @@ void __init trap_init(void)
    11282. 

  11282.  	extern char except_vec4;
    11283. 

  11283.  	unsigned long i;
    11284. 

  11284.  
    11285. 

  11285. -	per_cpu_trap_init();
    11286. 

  11286. -
    11287. 

  11287.  	/* Copy the generic exception handlers to their final destination. */
    11288. 

  11288.  	memcpy((void *) KSEG0         , &except_vec0_generic, 0x80);
    11289. 

  11289.  	memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic, 0x80);
    11290. 

  11290. @@ -933,6 +935,5 @@ void __init trap_init(void)
    11291. 

  11291.  
    11292. 

  11292.  	flush_icache_range(KSEG0, KSEG0 + 0x400);
    11293. 

  11293.  
    11294. 

  11294. -	atomic_inc(&init_mm.mm_count);	/* XXX UP?  */
    11295. 

  11295. -	current->active_mm = &init_mm;
    11296. 

  11296. +	per_cpu_trap_init();
    11297. 

  11297.  }
    11298. 

  11298. --- a/arch/mips64/mm/cerr-sb1.c
    11299. 

  11299. +++ b/arch/mips64/mm/cerr-sb1.c
    11300. 

  11300. @@ -252,14 +252,14 @@ static const uint8_t parity[256] = {
    11301. 

  11301.  
    11302. 

  11302.  /* Masks to select bits for Hamming parity, mask_72_64[i] for bit[i] */
    11303. 

  11303.  static const uint64_t mask_72_64[8] = {
    11304. 

  11304. -	0x0738C808099264FFL,
    11305. 

  11305. -	0x38C808099264FF07L,
    11306. 

  11306. -	0xC808099264FF0738L,
    11307. 

  11307. -	0x08099264FF0738C8L,
    11308. 

  11308. -	0x099264FF0738C808L,
    11309. 

  11309. -	0x9264FF0738C80809L,
    11310. 

  11310. -	0x64FF0738C8080992L,
    11311. 

  11311. -	0xFF0738C808099264L
    11312. 

  11312. +	0x0738C808099264FFULL,
    11313. 

  11313. +	0x38C808099264FF07ULL,
    11314. 

  11314. +	0xC808099264FF0738ULL,
    11315. 

  11315. +	0x08099264FF0738C8ULL,
    11316. 

  11316. +	0x099264FF0738C808ULL,
    11317. 

  11317. +	0x9264FF0738C80809ULL,
    11318. 

  11318. +	0x64FF0738C8080992ULL,
    11319. 

  11319. +	0xFF0738C808099264ULL
    11320. 

  11320.  };
    11321. 

  11321.  
    11322. 

  11322.  /* Calculate the parity on a range of bits */
    11323. 

  11323. @@ -331,9 +331,9 @@ static uint32_t extract_ic(unsigned shor
    11324. 

  11324.  				    ((lru >> 4) & 0x3),
    11325. 

  11325.  				    ((lru >> 6) & 0x3));
    11326. 

  11326.  		}
    11327. 

  11327. -		va = (taglo & 0xC0000FFFFFFFE000) | addr;
    11328. 

  11328. +		va = (taglo & 0xC0000FFFFFFFE000ULL) | addr;
    11329. 

  11329.  		if ((taglo & (1 << 31)) && (((taglo >> 62) & 0x3) == 3))
    11330. 

  11330. -			va |= 0x3FFFF00000000000;
    11331. 

  11331. +			va |= 0x3FFFF00000000000ULL;
    11332. 

  11332.  		valid = ((taghi >> 29) & 1);
    11333. 

  11333.  		if (valid) {
    11334. 

  11334.  			tlo_tmp = taglo & 0xfff3ff;
    11335. 

  11335. @@ -474,7 +474,7 @@ static uint32_t extract_dc(unsigned shor
    11336. 

  11336.  		: "r" ((way << 13) | addr));
    11337. 

  11337.  
    11338. 

  11338.  		taglo = ((unsigned long long)taglohi << 32) | taglolo;
    11339. 

  11339. -		pa = (taglo & 0xFFFFFFE000) | addr;
    11340. 

  11340. +		pa = (taglo & 0xFFFFFFE000ULL) | addr;
    11341. 

  11341.  		if (way == 0) {
    11342. 

  11342.  			lru = (taghi >> 14) & 0xff;
    11343. 

  11343.  			prom_printf("[Bank %d Set 0x%02x]  LRU > %d %d %d %d > MRU\n",
    11344. 

  11344. --- a/arch/mips64/mm/c-r4k.c
    11345. 

  11345. +++ b/arch/mips64/mm/c-r4k.c
    11346. 

  11346. @@ -867,9 +867,16 @@ static void __init probe_pcache(void)
    11347. 

  11347.  	 * normally they'd suffer from aliases but magic in the hardware deals
    11348. 

  11348.  	 * with that for us so we don't need to take care ourselves.
    11349. 

  11349.  	 */
    11350. 

  11350. -	if (c->cputype != CPU_R10000 && c->cputype != CPU_R12000)
    11351. 

  11351. -		if (c->dcache.waysize > PAGE_SIZE)
    11352. 

  11352. -		        c->dcache.flags |= MIPS_CACHE_ALIASES;
    11353. 

  11353. +	switch (c->cputype) {
    11354. 

  11354. +	case CPU_R10000:
    11355. 

  11355. +	case CPU_R12000:
    11356. 

  11356. +		break;
    11357. 

  11357. +	case CPU_24K:
    11358. 

  11358. +		if (!(read_c0_config7() & (1 << 16)))
    11359. 

  11359. +	default:
    11360. 

  11360. +			if (c->dcache.waysize > PAGE_SIZE)
    11361. 

  11361. +				c->dcache.flags |= MIPS_CACHE_ALIASES;
    11362. 

  11362. +	}
    11363. 

  11363.  
    11364. 

  11364.  	switch (c->cputype) {
    11365. 

  11365.  	case CPU_20KC:
    11366. 

  11366. @@ -1070,9 +1077,6 @@ void __init ld_mmu_r4xx0(void)
    11367. 

  11367.  	setup_scache();
    11368. 

  11368.  	coherency_setup();
    11369. 

  11369.  
    11370. 

  11370. -	if (c->dcache.sets * c->dcache.ways > PAGE_SIZE)
    11371. 

  11371. -		c->dcache.flags |= MIPS_CACHE_ALIASES;
    11372. 

  11372. -
    11373. 

  11373.  	r4k_blast_dcache_page_setup();
    11374. 

  11374.  	r4k_blast_dcache_page_indexed_setup();
    11375. 

  11375.  	r4k_blast_dcache_setup();
    11376. 

  11376. --- a/arch/mips64/mm/tlbex-r4k.S
    11377. 

  11377. +++ b/arch/mips64/mm/tlbex-r4k.S
    11378. 

  11378. @@ -125,6 +125,33 @@ LEAF(except_vec1_r4k)
    11379. 

  11379.  	 nop
    11380. 

  11380.  END(except_vec1_r4k)
    11381. 

  11381.  
    11382. 

  11382. +	__FINIT
    11383. 

  11383. +
    11384. 

  11384. +	.align  5
    11385. 

  11385. +LEAF(handle_vec1_r4k)
    11386. 

  11386. +	.set    noat
    11387. 

  11387. +	LOAD_PTE2 k1 k0 9f
    11388. 

  11388. +	ld	k0, 0(k1)			# get even pte
    11389. 

  11389. +	ld	k1, 8(k1)			# get odd pte
    11390. 

  11390. +	PTE_RELOAD k0 k1
    11391. 

  11391. +	mtc0_tlbw_hazard
    11392. 

  11392. +	tlbwr
    11393. 

  11393. +	tlbw_eret_hazard
    11394. 

  11394. +	eret
    11395. 

  11395. +
    11396. 

  11396. +9:						# handle the vmalloc range
    11397. 

  11397. +	LOAD_KPTE2 k1 k0 invalid_vmalloc_address
    11398. 

  11398. +	ld	k0, 0(k1)			# get even pte
    11399. 

  11399. +	ld	k1, 8(k1)			# get odd pte
    11400. 

  11400. +	PTE_RELOAD k0 k1
    11401. 

  11401. +	mtc0_tlbw_hazard
    11402. 

  11402. +	tlbwr
    11403. 

  11403. +	tlbw_eret_hazard
    11404. 

  11404. +	eret
    11405. 

  11405. +END(handle_vec1_r4k)
    11406. 

  11406. +
    11407. 

  11407. +	__INIT
    11408. 

  11408. +
    11409. 

  11409.  LEAF(except_vec1_sb1)
    11410. 

  11410.  #if BCM1250_M3_WAR
    11411. 

  11411.  	dmfc0	k0, CP0_BADVADDR
    11412. 

  11412. @@ -134,28 +161,24 @@ LEAF(except_vec1_sb1)
    11413. 

  11413.  	bnez	k0, 1f
    11414. 

  11414.  #endif
    11415. 

  11415.  	.set    noat
    11416. 

  11416. -	dla     k0, handle_vec1_r4k
    11417. 

  11417. +	dla     k0, handle_vec1_sb1
    11418. 

  11418.  	jr      k0
    11419. 

  11419.  	 nop
    11420. 

  11420.  
    11421. 

  11421.  1:	eret
    11422. 

  11422. -	nop
    11423. 

  11423.  END(except_vec1_sb1)
    11424. 

  11424.  
    11425. 

  11425.  	__FINIT
    11426. 

  11426.  
    11427. 

  11427.  	.align  5
    11428. 

  11428. -LEAF(handle_vec1_r4k)
    11429. 

  11429. +LEAF(handle_vec1_sb1)
    11430. 

  11430.  	.set    noat
    11431. 

  11431.  	LOAD_PTE2 k1 k0 9f
    11432. 

  11432.  	ld	k0, 0(k1)			# get even pte
    11433. 

  11433.  	ld	k1, 8(k1)			# get odd pte
    11434. 

  11434.  	PTE_RELOAD k0 k1
    11435. 

  11435. -	rm9000_tlb_hazard
    11436. 

  11436. -	b	1f
    11437. 

  11437. -	 tlbwr
    11438. 

  11438. -1:	nop
    11439. 

  11439. -	rm9000_tlb_hazard
    11440. 

  11440. +	mtc0_tlbw_hazard
    11441. 

  11441. +	tlbwr
    11442. 

  11442.  	eret
    11443. 

  11443.  
    11444. 

  11444.  9:						# handle the vmalloc range
    11445. 

  11445. @@ -163,13 +186,10 @@ LEAF(handle_vec1_r4k)
    11446. 

  11446.  	ld	k0, 0(k1)			# get even pte
    11447. 

  11447.  	ld	k1, 8(k1)			# get odd pte
    11448. 

  11448.  	PTE_RELOAD k0 k1
    11449. 

  11449. -	rm9000_tlb_hazard
    11450. 

  11450. -	b	1f
    11451. 

  11451. -	 tlbwr
    11452. 

  11452. -1:	nop
    11453. 

  11453. -	rm9000_tlb_hazard
    11454. 

  11454. +	mtc0_tlbw_hazard
    11455. 

  11455. +	tlbwr
    11456. 

  11456.  	eret
    11457. 

  11457. -END(handle_vec1_r4k)
    11458. 

  11458. +END(handle_vec1_sb1)
    11459. 

  11459.  
    11460. 

  11460.  
    11461. 

  11461.  	__INIT
    11462. 

  11462. @@ -195,10 +215,8 @@ LEAF(handle_vec1_r10k)
    11463. 

  11463.  	ld	k0, 0(k1)			# get even pte
    11464. 

  11464.  	ld	k1, 8(k1)			# get odd pte
    11465. 

  11465.  	PTE_RELOAD k0 k1
    11466. 

  11466. -	rm9000_tlb_hazard
    11467. 

  11467. -	nop
    11468. 

  11468. +	mtc0_tlbw_hazard
    11469. 

  11469.  	tlbwr
    11470. 

  11470. -	rm9000_tlb_hazard
    11471. 

  11471.  	eret
    11472. 

  11472.  
    11473. 

  11473.  9:						# handle the vmalloc range
    11474. 

  11474. @@ -206,10 +224,8 @@ LEAF(handle_vec1_r10k)
    11475. 

  11475.  	ld	k0, 0(k1)			# get even pte
    11476. 

  11476.  	ld	k1, 8(k1)			# get odd pte
    11477. 

  11477.  	PTE_RELOAD k0 k1
    11478. 

  11478. -	rm9000_tlb_hazard
    11479. 

  11479. -	nop
    11480. 

  11480. +	mtc0_tlbw_hazard
    11481. 

  11481.  	tlbwr
    11482. 

  11482. -	rm9000_tlb_hazard
    11483. 

  11483.  	eret
    11484. 

  11484.  END(handle_vec1_r10k)
    11485. 

  11485.  
    11486. 

  11486. --- a/arch/mips64/mm/tlb-r4k.c
    11487. 

  11487. +++ b/arch/mips64/mm/tlb-r4k.c
    11488. 

  11488. @@ -1,24 +1,12 @@
    11489. 

  11489.  /*
    11490. 

  11490. - * Carsten Langgaard, carstenl@mips.com
    11491. 

  11491. - * Copyright (C) 2002 MIPS Technologies, Inc.  All rights reserved.
    11492. 

  11492. - *
    11493. 

  11493. - * This program is free software; you can distribute it and/or modify it
    11494. 

  11494. - * under the terms of the GNU General Public License (Version 2) as
    11495. 

  11495. - * published by the Free Software Foundation.
    11496. 

  11496. - *
    11497. 

  11497. - * This program is distributed in the hope it will be useful, but WITHOUT
    11498. 

  11498. - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    11499. 

  11499. - * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
    11500. 

  11500. + * This file is subject to the terms and conditions of the GNU General Public
    11501. 

  11501. + * License.  See the file "COPYING" in the main directory of this archive
    11502. 

  11502.   * for more details.
    11503. 

  11503.   *
    11504. 

  11504. - * You should have received a copy of the GNU General Public License along
    11505. 

  11505. - * with this program; if not, write to the Free Software Foundation, Inc.,
    11506. 

  11506. - * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
    11507. 

  11507. - *
    11508. 

  11508. - * MIPS64 CPU variant specific MMU routines.
    11509. 

  11509. - * These routine are not optimized in any way, they are done in a generic way
    11510. 

  11510. - * so they can be used on all MIPS64 compliant CPUs, and also done in an
    11511. 

  11511. - * attempt not to break anything for the R4xx0 style CPUs.
    11512. 

  11512. + * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
    11513. 

  11513. + * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle ralf@gnu.org
    11514. 

  11514. + * Carsten Langgaard, carstenl@mips.com
    11515. 

  11515. + * Copyright (C) 2002 MIPS Technologies, Inc.  All rights reserved.
    11516. 

  11516.   */
    11517. 

  11517.  #include <linux/init.h>
    11518. 

  11518.  #include <linux/sched.h>
    11519. 

  11519. @@ -30,9 +18,6 @@
    11520. 

  11520.  #include <asm/pgtable.h>
    11521. 

  11521.  #include <asm/system.h>
    11522. 

  11522.  
    11523. 

  11523. -#undef DEBUG_TLB
    11524. 

  11524. -#undef DEBUG_TLBUPDATE
    11525. 

  11525. -
    11526. 

  11526.  extern void except_vec1_r4k(void);
    11527. 

  11527.  
    11528. 

  11528.  /* CP0 hazard avoidance. */
    11529. 

  11529. @@ -46,31 +31,23 @@ void local_flush_tlb_all(void)
    11530. 

  11530.  	unsigned long old_ctx;
    11531. 

  11531.  	int entry;
    11532. 

  11532.  
    11533. 

  11533. -#ifdef DEBUG_TLB
    11534. 

  11534. -	printk("[tlball]");
    11535. 

  11535. -#endif
    11536. 

  11536. -
    11537. 

  11537.  	local_irq_save(flags);
    11538. 

  11538.  	/* Save old context and create impossible VPN2 value */
    11539. 

  11539.  	old_ctx = read_c0_entryhi();
    11540. 

  11540. -	write_c0_entryhi(XKPHYS);
    11541. 

  11541.  	write_c0_entrylo0(0);
    11542. 

  11542.  	write_c0_entrylo1(0);
    11543. 

  11543. -	BARRIER;
    11544. 

  11544.  
    11545. 

  11545.  	entry = read_c0_wired();
    11546. 

  11546.  
    11547. 

  11547.  	/* Blast 'em all away. */
    11548. 

  11548. -	while(entry < current_cpu_data.tlbsize) {
    11549. 

  11549. -	        /* Make sure all entries differ. */
    11550. 

  11550. -	        write_c0_entryhi(XKPHYS+entry*0x2000);
    11551. 

  11551. +	while (entry < current_cpu_data.tlbsize) {
    11552. 

  11552. +	        write_c0_entryhi(XKPHYS + entry*0x2000);
    11553. 

  11553.  		write_c0_index(entry);
    11554. 

  11554. -		BARRIER;
    11555. 

  11555. +		mtc0_tlbw_hazard();
    11556. 

  11556.  		tlb_write_indexed();
    11557. 

  11557. -		BARRIER;
    11558. 

  11558.  		entry++;
    11559. 

  11559.  	}
    11560. 

  11560. -	BARRIER;
    11561. 

  11561. +	tlbw_use_hazard();
    11562. 

  11562.  	write_c0_entryhi(old_ctx);
    11563. 

  11563.  	local_irq_restore(flags);
    11564. 

  11564.  }
    11565. 

  11565. @@ -79,12 +56,8 @@ void local_flush_tlb_mm(struct mm_struct
    11566. 

  11566.  {
    11567. 

  11567.  	int cpu = smp_processor_id();
    11568. 

  11568.  
    11569. 

  11569. -	if (cpu_context(cpu, mm) != 0) {
    11570. 

  11570. -#ifdef DEBUG_TLB
    11571. 

  11571. -		printk("[tlbmm<%d>]", mm->context);
    11572. 

  11572. -#endif
    11573. 

  11573. +	if (cpu_context(cpu, mm) != 0)
    11574. 

  11574.  		drop_mmu_context(mm,cpu);
    11575. 

  11575. -	}
    11576. 

  11576.  }
    11577. 

  11577.  
    11578. 

  11578.  void local_flush_tlb_range(struct mm_struct *mm, unsigned long start,
    11579. 

  11579. @@ -96,10 +69,6 @@ void local_flush_tlb_range(struct mm_str
    11580. 

  11580.  		unsigned long flags;
    11581. 

  11581.  		int size;
    11582. 

  11582.  
    11583. 

  11583. -#ifdef DEBUG_TLB
    11584. 

  11584. -		printk("[tlbrange<%02x,%08lx,%08lx>]", (mm->context & ASID_MASK),
    11585. 

  11585. -		       start, end);
    11586. 

  11586. -#endif
    11587. 

  11587.  		local_irq_save(flags);
    11588. 

  11588.  		size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
    11589. 

  11589.  		size = (size + 1) >> 1;
    11590. 

  11590. @@ -110,25 +79,25 @@ void local_flush_tlb_range(struct mm_str
    11591. 

  11591.  			start &= (PAGE_MASK << 1);
    11592. 

  11592.  			end += ((PAGE_SIZE << 1) - 1);
    11593. 

  11593.  			end &= (PAGE_MASK << 1);
    11594. 

  11594. -			while(start < end) {
    11595. 

  11595. +			while (start < end) {
    11596. 

  11596.  				int idx;
    11597. 

  11597.  
    11598. 

  11598.  				write_c0_entryhi(start | newpid);
    11599. 

  11599.  				start += (PAGE_SIZE << 1);
    11600. 

  11600. -				BARRIER;
    11601. 

  11601. +				mtc0_tlbw_hazard();
    11602. 

  11602.  				tlb_probe();
    11603. 

  11603.  				BARRIER;
    11604. 

  11604.  				idx = read_c0_index();
    11605. 

  11605.  				write_c0_entrylo0(0);
    11606. 

  11606.  				write_c0_entrylo1(0);
    11607. 

  11607. -				if(idx < 0)
    11608. 

  11608. +				if (idx < 0)
    11609. 

  11609.  					continue;
    11610. 

  11610.  				/* Make sure all entries differ. */
    11611. 

  11611.  				write_c0_entryhi(XKPHYS+idx*0x2000);
    11612. 

  11612. -				BARRIER;
    11613. 

  11613. +				mtc0_tlbw_hazard();
    11614. 

  11614.  				tlb_write_indexed();
    11615. 

  11615. -				BARRIER;
    11616. 

  11616.  			}
    11617. 

  11617. +			tlbw_use_hazard();
    11618. 

  11618.  			write_c0_entryhi(oldpid);
    11619. 

  11619.  		} else {
    11620. 

  11620.  			drop_mmu_context(mm, cpu);
    11621. 

  11621. @@ -145,28 +114,26 @@ void local_flush_tlb_page(struct vm_area
    11622. 

  11622.  		unsigned long flags;
    11623. 

  11623.  		unsigned long oldpid, newpid, idx;
    11624. 

  11624.  
    11625. 

  11625. -#ifdef DEBUG_TLB
    11626. 

  11626. -		printk("[tlbpage<%d,%08lx>]", vma->vm_mm->context, page);
    11627. 

  11627. -#endif
    11628. 

  11628.  		newpid = cpu_asid(cpu, vma->vm_mm);
    11629. 

  11629.  		page &= (PAGE_MASK << 1);
    11630. 

  11630.  		local_irq_save(flags);
    11631. 

  11631.  		oldpid = read_c0_entryhi();
    11632. 

  11632.  		write_c0_entryhi(page | newpid);
    11633. 

  11633. -		BARRIER;
    11634. 

  11634. +		mtc0_tlbw_hazard();
    11635. 

  11635.  		tlb_probe();
    11636. 

  11636.  		BARRIER;
    11637. 

  11637.  		idx = read_c0_index();
    11638. 

  11638.  		write_c0_entrylo0(0);
    11639. 

  11639.  		write_c0_entrylo1(0);
    11640. 

  11640. -		if(idx < 0)
    11641. 

  11641. +		if (idx < 0)
    11642. 

  11642.  			goto finish;
    11643. 

  11643.  		/* Make sure all entries differ. */
    11644. 

  11644.  		write_c0_entryhi(XKPHYS+idx*0x2000);
    11645. 

  11645. -		BARRIER;
    11646. 

  11646. +		mtc0_tlbw_hazard();
    11647. 

  11647.  		tlb_write_indexed();
    11648. 

  11648. +		tlbw_use_hazard();
    11649. 

  11649. +
    11650. 

  11650.  	finish:
    11651. 

  11651. -		BARRIER;
    11652. 

  11652.  		write_c0_entryhi(oldpid);
    11653. 

  11653.  		local_irq_restore(flags);
    11654. 

  11654.  	}
    11655. 

  11655. @@ -186,7 +153,7 @@ void local_flush_tlb_one(unsigned long p
    11656. 

  11656.  
    11657. 

  11657.  	local_irq_save(flags);
    11658. 

  11658.  	write_c0_entryhi(page);
    11659. 

  11659. -	BARRIER;
    11660. 

  11660. +	mtc0_tlbw_hazard();
    11661. 

  11661.  	tlb_probe();
    11662. 

  11662.  	BARRIER;
    11663. 

  11663.  	idx = read_c0_index();
    11664. 

  11664. @@ -195,10 +162,12 @@ void local_flush_tlb_one(unsigned long p
    11665. 

  11665.  	if (idx >= 0) {
    11666. 

  11666.  		/* Make sure all entries differ. */
    11667. 

  11667.  		write_c0_entryhi(KSEG0+idx*0x2000);
    11668. 

  11668. +		mtc0_tlbw_hazard();
    11669. 

  11669.  		tlb_write_indexed();
    11670. 

  11670. +		tlbw_use_hazard();
    11671. 

  11671.  	}
    11672. 

  11672. -	BARRIER;
    11673. 

  11673.  	write_c0_entryhi(oldpid);
    11674. 

  11674. +
    11675. 

  11675.  	local_irq_restore(flags);
    11676. 

  11676.  }
    11677. 

  11677.  
    11678. 

  11678. @@ -208,7 +177,6 @@ void local_flush_tlb_one(unsigned long p
    11679. 

  11679.  void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
    11680. 

  11680.  {
    11681. 

  11681.  	unsigned long flags;
    11682. 

  11682. -	unsigned int asid;
    11683. 

  11683.  	pgd_t *pgdp;
    11684. 

  11684.  	pmd_t *pmdp;
    11685. 

  11685.  	pte_t *ptep;
    11686. 

  11686. @@ -222,70 +190,58 @@ void __update_tlb(struct vm_area_struct 
    11687. 

  11687.  
    11688. 

  11688.  	pid = read_c0_entryhi() & ASID_MASK;
    11689. 

  11689.  
    11690. 

  11690. -#ifdef DEBUG_TLB
    11691. 

  11691. -	if ((pid != (cpu_asid(smp_processor_id(), vma->vm_mm))) ||
    11692. 

  11692. -	   (cpu_context(smp_processor_id(), vma->vm_mm) == 0)) {
    11693. 

  11693. -		printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d"
    11694. 

  11694. -		       "tlbpid=%d\n", (int) (cpu_context(smp_processor_id(),
    11695. 

  11695. -		       vma->vm_mm) & ASID_MASK), pid);
    11696. 

  11696. -	}
    11697. 

  11697. -#endif
    11698. 

  11698. -
    11699. 

  11699.  	local_irq_save(flags);
    11700. 

  11700.  	address &= (PAGE_MASK << 1);
    11701. 

  11701. -	write_c0_entryhi(address | (pid));
    11702. 

  11702. +	write_c0_entryhi(address | pid);
    11703. 

  11703.  	pgdp = pgd_offset(vma->vm_mm, address);
    11704. 

  11704. -	BARRIER;
    11705. 

  11705. +	mtc0_tlbw_hazard();
    11706. 

  11706.  	tlb_probe();
    11707. 

  11707.  	BARRIER;
    11708. 

  11708.  	pmdp = pmd_offset(pgdp, address);
    11709. 

  11709.  	idx = read_c0_index();
    11710. 

  11710.  	ptep = pte_offset(pmdp, address);
    11711. 

  11711. -	BARRIER;
    11712. 

  11712.  	write_c0_entrylo0(pte_val(*ptep++) >> 6);
    11713. 

  11713.  	write_c0_entrylo1(pte_val(*ptep) >> 6);
    11714. 

  11714. -	write_c0_entryhi(address | (pid));
    11715. 

  11715. -	BARRIER;
    11716. 

  11716. -	if(idx < 0) {
    11717. 

  11717. +	write_c0_entryhi(address | pid);
    11718. 

  11718. +	mtc0_tlbw_hazard();
    11719. 

  11719. +	if (idx < 0)
    11720. 

  11720.  		tlb_write_random();
    11721. 

  11721. -	} else {
    11722. 

  11722. +	else
    11723. 

  11723.  		tlb_write_indexed();
    11724. 

  11724. -	}
    11725. 

  11725. -	BARRIER;
    11726. 

  11726. +	tlbw_use_hazard();
    11727. 

  11727.  	write_c0_entryhi(pid);
    11728. 

  11728. -	BARRIER;
    11729. 

  11729.  	local_irq_restore(flags);
    11730. 

  11730.  }
    11731. 

  11731.  
    11732. 

  11732. -void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
    11733. 

  11733. -				      unsigned long entryhi, unsigned long pagemask)
    11734. 

  11734. +void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
    11735. 

  11735. +			    unsigned long entryhi, unsigned long pagemask)
    11736. 

  11736.  {
    11737. 

  11737. -        unsigned long flags;
    11738. 

  11738. -        unsigned long wired;
    11739. 

  11739. -        unsigned long old_pagemask;
    11740. 

  11740. -        unsigned long old_ctx;
    11741. 

  11741. -
    11742. 

  11742. -        local_irq_save(flags);
    11743. 

  11743. -        /* Save old context and create impossible VPN2 value */
    11744. 

  11744. -        old_ctx = (read_c0_entryhi() & ASID_MASK);
    11745. 

  11745. -        old_pagemask = read_c0_pagemask();
    11746. 

  11746. -        wired = read_c0_wired();
    11747. 

  11747. -        write_c0_wired(wired + 1);
    11748. 

  11748. -        write_c0_index(wired);
    11749. 

  11749. -        BARRIER;
    11750. 

  11750. -        write_c0_pagemask(pagemask);
    11751. 

  11751. -        write_c0_entryhi(entryhi);
    11752. 

  11752. -        write_c0_entrylo0(entrylo0);
    11753. 

  11753. -        write_c0_entrylo1(entrylo1);
    11754. 

  11754. -        BARRIER;
    11755. 

  11755. -        tlb_write_indexed();
    11756. 

  11756. -        BARRIER;
    11757. 

  11757. -
    11758. 

  11758. -        write_c0_entryhi(old_ctx);
    11759. 

  11759. -        BARRIER;
    11760. 

  11760. -        write_c0_pagemask(old_pagemask);
    11761. 

  11761. -        local_flush_tlb_all();
    11762. 

  11762. -        local_irq_restore(flags);
    11763. 

  11763. +	unsigned long flags;
    11764. 

  11764. +	unsigned long wired;
    11765. 

  11765. +	unsigned long old_pagemask;
    11766. 

  11766. +	unsigned long old_ctx;
    11767. 

  11767. +
    11768. 

  11768. +	local_irq_save(flags);
    11769. 

  11769. +	/* Save old context and create impossible VPN2 value */
    11770. 

  11770. +	old_ctx = read_c0_entryhi() & ASID_MASK;
    11771. 

  11771. +	old_pagemask = read_c0_pagemask();
    11772. 

  11772. +	wired = read_c0_wired();
    11773. 

  11773. +	write_c0_wired(wired + 1);
    11774. 

  11774. +	write_c0_index(wired);
    11775. 

  11775. +	BARRIER;
    11776. 

  11776. +	write_c0_pagemask(pagemask);
    11777. 

  11777. +	write_c0_entryhi(entryhi);
    11778. 

  11778. +	write_c0_entrylo0(entrylo0);
    11779. 

  11779. +	write_c0_entrylo1(entrylo1);
    11780. 

  11780. +	mtc0_tlbw_hazard();
    11781. 

  11781. +	tlb_write_indexed();
    11782. 

  11782. +	tlbw_use_hazard();
    11783. 

  11783. +
    11784. 

  11784. +	write_c0_entryhi(old_ctx);
    11785. 

  11785. +	BARRIER;
    11786. 

  11786. +	write_c0_pagemask(old_pagemask);
    11787. 

  11787. +	local_flush_tlb_all();
    11788. 

  11788. +	local_irq_restore(flags);
    11789. 

  11789.  }
    11790. 

  11790.  
    11791. 

  11791.  /*
    11792. 

  11792. @@ -317,17 +273,15 @@ __init int add_temporary_entry(unsigned 
    11793. 

  11793.  	}
    11794. 

  11794.  
    11795. 

  11795.  	write_c0_index(temp_tlb_entry);
    11796. 

  11796. -	BARRIER;
    11797. 

  11797.  	write_c0_pagemask(pagemask);
    11798. 

  11798.  	write_c0_entryhi(entryhi);
    11799. 

  11799.  	write_c0_entrylo0(entrylo0);
    11800. 

  11800.  	write_c0_entrylo1(entrylo1);
    11801. 

  11801. -	BARRIER;
    11802. 

  11802. +	mtc0_tlbw_hazard();
    11803. 

  11803.  	tlb_write_indexed();
    11804. 

  11804. -	BARRIER;
    11805. 

  11805. +	tlbw_use_hazard();
    11806. 

  11806.  
    11807. 

  11807.  	write_c0_entryhi(old_ctx);
    11808. 

  11808. -	BARRIER;
    11809. 

  11809.  	write_c0_pagemask(old_pagemask);
    11810. 

  11810.  out:
    11811. 

  11811.  	local_irq_restore(flags);
    11812. 

  11812. @@ -348,15 +302,23 @@ static void __init probe_tlb(unsigned lo
    11813. 

  11813.  		return;
    11814. 

  11814.  
    11815. 

  11815.  	config1 = read_c0_config1();
    11816. 

  11816. -	if (!((config1 >> 7) & 3))
    11817. 

  11817. -		panic("No MMU present");
    11818. 

  11818. +	if (!((config >> 7) & 3))
    11819. 

  11819. +		panic("No TLB present");
    11820. 

  11820.  
    11821. 

  11821.  	c->tlbsize = ((config1 >> 25) & 0x3f) + 1;
    11822. 

  11822.  }
    11823. 

  11823.  
    11824. 

  11824.  void __init r4k_tlb_init(void)
    11825. 

  11825.  {
    11826. 

  11826. -	unsigned long config = read_c0_config();
    11827. 

  11827. +	unsigned int config = read_c0_config();
    11828. 

  11828. +
    11829. 

  11829. +	/*
    11830. 

  11830. +	 * You should never change this register:
    11831. 

  11831. +	 *   - On R4600 1.7 the tlbp never hits for pages smaller than
    11832. 

  11832. +	 *     the value in the c0_pagemask register.
    11833. 

  11833. +	 *   - The entire mm handling assumes the c0_pagemask register to
    11834. 

  11834. +	 *     be set for 4kb pages.
    11835. 

  11835. +	 */
    11836. 

  11836.  	probe_tlb(config);
    11837. 

  11837.  	write_c0_pagemask(PM_DEFAULT_MASK);
    11838. 

  11838.  	write_c0_wired(0);
    11839. 

  11839. --- a/drivers/char/au1000_gpio.c
    11840. 

  11840. +++ b/drivers/char/au1000_gpio.c
    11841. 

  11841. @@ -246,7 +246,7 @@ static struct file_operations au1000gpio
    11842. 

  11842.  
    11843. 

  11843.  static struct miscdevice au1000gpio_miscdev =
    11844. 

  11844.  {
    11845. 

  11845. -	GPIO_MINOR,
    11846. 

  11846. +	MISC_DYNAMIC_MINOR,
    11847. 

  11847.  	"au1000_gpio",
    11848. 

  11848.  	&au1000gpio_fops
    11849. 

  11849.  };
    11850. 

  11850. --- /dev/null
    11851. 

  11851. +++ b/drivers/char/au1550_psc_spi.c
    11852. 

  11852. @@ -0,0 +1,466 @@
    11853. 

  11853. +/*
    11854. 

  11854. + *  Driver for Alchemy Au1550 SPI on the PSC.
    11855. 

  11855. + *
    11856. 

  11856. + * Copyright 2004 Embedded Edge, LLC.
    11857. 

  11857. + *	dan@embeddededge.com
    11858. 

  11858. + *
    11859. 

  11859. + *  This program is free software; you can redistribute  it and/or modify it
    11860. 

  11860. + *  under  the terms of  the GNU General  Public License as published by the
    11861. 

  11861. + *  Free Software Foundation;  either version 2 of the  License, or (at your
    11862. 

  11862. + *  option) any later version.
    11863. 

  11863. + *
    11864. 

  11864. + *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
    11865. 

  11865. + *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
    11866. 

  11866. + *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
    11867. 

  11867. + *  NO  EVENT  SHALL   THE AUTHOR  BE	LIABLE FOR ANY   DIRECT, INDIRECT,
    11868. 

  11868. + *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
    11869. 

  11869. + *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
    11870. 

  11870. + *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
    11871. 

  11871. + *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
    11872. 

  11872. + *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
    11873. 

  11873. + *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    11874. 

  11874. + *
    11875. 

  11875. + *  You should have received a copy of the  GNU General Public License along
    11876. 

  11876. + *  with this program; if not, write  to the Free Software Foundation, Inc.,
    11877. 

  11877. + *  675 Mass Ave, Cambridge, MA 02139, USA.
    11878. 

  11878. + */
    11879. 

  11879. +
    11880. 

  11880. +#include <linux/module.h>
    11881. 

  11881. +#include <linux/config.h>
    11882. 

  11882. +#include <linux/types.h>
    11883. 

  11883. +#include <linux/kernel.h>
    11884. 

  11884. +#include <linux/miscdevice.h>
    11885. 

  11885. +#include <linux/init.h>
    11886. 

  11886. +#include <asm/uaccess.h>
    11887. 

  11887. +#include <asm/io.h>
    11888. 

  11888. +#include <asm/au1000.h>
    11889. 

  11889. +#include <asm/au1550_spi.h>
    11890. 

  11890. +#include <asm/au1xxx_psc.h>
    11891. 

  11891. +
    11892. 

  11892. +#ifdef CONFIG_MIPS_PB1550
    11893. 

  11893. +#include <asm/pb1550.h>
    11894. 

  11894. +#endif
    11895. 

  11895. +
    11896. 

  11896. +#ifdef CONFIG_MIPS_DB1550
    11897. 

  11897. +#include <asm/db1x00.h>
    11898. 

  11898. +#endif
    11899. 

  11899. +
    11900. 

  11900. +#ifdef CONFIG_MIPS_PB1200
    11901. 

  11901. +#include <asm/pb1200.h>
    11902. 

  11902. +#endif
    11903. 

  11903. +
    11904. 

  11904. +/* This is just a simple programmed I/O SPI interface on the PSC of the 1550.
    11905. 

  11905. + * We support open, close, write, and ioctl.  The SPI is a full duplex
    11906. 

  11906. + * interface, you can't read without writing.  So, the write system call
    11907. 

  11907. + * copies the bytes out to the SPI, and whatever is returned is placed
    11908. 

  11908. + * in the same buffer.  Kinda weird, maybe we'll change it, but for now
    11909. 

  11909. + * it works OK.
    11910. 

  11910. + * I didn't implement any DMA yet, and it's a debate about the necessity.
    11911. 

  11911. + * The SPI clocks are usually quite fast, so data is sent/received as
    11912. 

  11912. + * quickly as you can stuff the FIFO.  The overhead of DMA and interrupts
    11913. 

  11913. + * are usually far greater than the data transfer itself.  If, however,
    11914. 

  11914. + * we find applications that move large amounts of data, we may choose
    11915. 

  11915. + * use the overhead of buffering and DMA to do the work.
    11916. 

  11916. + */
    11917. 

  11917. +
    11918. 

  11918. +/* The maximum clock rate specified in the manual is 2mHz.
    11919. 

  11919. +*/
    11920. 

  11920. +#define MAX_BAUD_RATE	(2 * 1000000)
    11921. 

  11921. +#define PSC_INTCLK_RATE (32 * 1000000)
    11922. 

  11922. +
    11923. 

  11923. +static	int	inuse;
    11924. 

  11924. +
    11925. 

  11925. +/* We have to know what the user requested for the data length
    11926. 

  11926. + * so we know how to stuff the fifo.  The FIFO is 32 bits wide,
    11927. 

  11927. + * and we have to load it with the bits to go in a single transfer.
    11928. 

  11928. + */
    11929. 

  11929. +static	uint	spi_datalen;
    11930. 

  11930. +
    11931. 

  11931. +static int
    11932. 

  11932. +au1550spi_master_done( int ms )
    11933. 

  11933. +{
    11934. 

  11934. +	int timeout=ms;
    11935. 

  11935. +	volatile psc_spi_t *sp;
    11936. 

  11936. +
    11937. 

  11937. +	sp = (volatile psc_spi_t *)SPI_PSC_BASE;
    11938. 

  11938. +
    11939. 

  11939. +	/* Loop until MD is set or timeout has expired */
    11940. 

  11940. +	while(!(sp->psc_spievent & PSC_SPIEVNT_MD) &&  timeout--) udelay(1000);
    11941. 

  11941. +
    11942. 

  11942. +	if ( !timeout )
    11943. 

  11943. +		return 0;
    11944. 

  11944. +	else
    11945. 

  11945. +		sp->psc_spievent |= PSC_SPIEVNT_MD;
    11946. 

  11946. +
    11947. 

  11947. +	return 1;
    11948. 

  11948. +}
    11949. 

  11949. +
    11950. 

  11950. +static int
    11951. 

  11951. +au1550spi_open(struct inode *inode, struct file *file)
    11952. 

  11952. +{
    11953. 

  11953. +	if (inuse)
    11954. 

  11954. +		return -EBUSY;
    11955. 

  11955. +
    11956. 

  11956. +	inuse = 1;
    11957. 

  11957. +
    11958. 

  11958. +	MOD_INC_USE_COUNT;
    11959. 

  11959. +
    11960. 

  11960. +	return 0;
    11961. 

  11961. +}
    11962. 

  11962. +
    11963. 

  11963. +static ssize_t
    11964. 

  11964. +au1550spi_write(struct file *fp, const char *bp, size_t count, loff_t *ppos)
    11965. 

  11965. +{
    11966. 

  11966. +	int	bytelen, i;
    11967. 

  11967. +	size_t	rcount, retval;
    11968. 

  11968. +	unsigned char	sb, *rp, *wp;
    11969. 

  11969. +	uint	fifoword, pcr, stat;
    11970. 

  11970. +	volatile psc_spi_t *sp;
    11971. 

  11971. +
    11972. 

  11972. +	/* Get the number of bytes per transfer.
    11973. 

  11973. +	*/
    11974. 

  11974. +	bytelen = ((spi_datalen - 1) / 8) + 1;
    11975. 

  11975. +
    11976. 

  11976. +	/* User needs to send us multiple of this count.
    11977. 

  11977. +	*/
    11978. 

  11978. +	if ((count % bytelen) != 0)
    11979. 

  11979. +		return -EINVAL;
    11980. 

  11980. +
    11981. 

  11981. +	rp = wp = (unsigned char *)bp;
    11982. 

  11982. +	retval = rcount = count;
    11983. 

  11983. +
    11984. 

  11984. +	/* Reset the FIFO.
    11985. 

  11985. +	*/
    11986. 

  11986. +	sp = (volatile psc_spi_t *)SPI_PSC_BASE;
    11987. 

  11987. +	sp->psc_spipcr = (PSC_SPIPCR_RC | PSC_SPIPCR_TC);
    11988. 

  11988. +	au_sync();
    11989. 

  11989. +	do {
    11990. 

  11990. +		pcr = sp->psc_spipcr;
    11991. 

  11991. +		au_sync();
    11992. 

  11992. +	} while (pcr != 0);
    11993. 

  11993. +
    11994. 

  11994. +	/* Prime the transmit FIFO.
    11995. 

  11995. +	*/
    11996. 

  11996. +	while (count > 0) {
    11997. 

  11997. +		fifoword = 0;
    11998. 

  11998. +		for (i=0; i<bytelen; i++) {
    11999. 

  11999. +			fifoword <<= 8;
    12000. 

  12000. +			if (get_user(sb, wp) < 0)
    12001. 

  12001. +				return -EFAULT;
    12002. 

  12002. +			fifoword |= sb;
    12003. 

  12003. +			wp++;
    12004. 

  12004. +		}
    12005. 

  12005. +		count -= bytelen;
    12006. 

  12006. +		if (count <= 0)
    12007. 

  12007. +			fifoword |= PSC_SPITXRX_LC;
    12008. 

  12008. +		sp->psc_spitxrx = fifoword;
    12009. 

  12009. +		au_sync();
    12010. 

  12010. +		stat = sp->psc_spistat;
    12011. 

  12011. +		au_sync();
    12012. 

  12012. +		if (stat & PSC_SPISTAT_TF)
    12013. 

  12013. +			break;
    12014. 

  12014. +	}
    12015. 

  12015. +
    12016. 

  12016. +	/* Start the transfer.
    12017. 

  12017. +	*/
    12018. 

  12018. +	sp->psc_spipcr = PSC_SPIPCR_MS;
    12019. 

  12019. +	au_sync();
    12020. 

  12020. +
    12021. 

  12021. +	/* Now, just keep the transmit fifo full and empty the receive.
    12022. 

  12022. +	*/
    12023. 

  12023. +	while (count > 0) {
    12024. 

  12024. +		stat = sp->psc_spistat;
    12025. 

  12025. +		au_sync();
    12026. 

  12026. +		while ((stat & PSC_SPISTAT_RE) == 0) {
    12027. 

  12027. +			fifoword = sp->psc_spitxrx;
    12028. 

  12028. +			au_sync();
    12029. 

  12029. +			for (i=0; i<bytelen; i++) {
    12030. 

  12030. +				sb = fifoword & 0xff;
    12031. 

  12031. +				if (put_user(sb, rp) < 0)
    12032. 

  12032. +					return -EFAULT;
    12033. 

  12033. +				fifoword >>= 8;
    12034. 

  12034. +				rp++;
    12035. 

  12035. +			}
    12036. 

  12036. +			rcount -= bytelen;
    12037. 

  12037. +			stat = sp->psc_spistat;
    12038. 

  12038. +			au_sync();
    12039. 

  12039. +		}
    12040. 

  12040. +		if ((stat & PSC_SPISTAT_TF) == 0) {
    12041. 

  12041. +			fifoword = 0;
    12042. 

  12042. +			for (i=0; i<bytelen; i++) {
    12043. 

  12043. +				fifoword <<= 8;
    12044. 

  12044. +				if (get_user(sb, wp) < 0)
    12045. 

  12045. +					return -EFAULT;
    12046. 

  12046. +				fifoword |= sb;
    12047. 

  12047. +				wp++;
    12048. 

  12048. +			}
    12049. 

  12049. +			count -= bytelen;
    12050. 

  12050. +			if (count <= 0)
    12051. 

  12051. +				fifoword |= PSC_SPITXRX_LC;
    12052. 

  12052. +			sp->psc_spitxrx = fifoword;
    12053. 

  12053. +			au_sync();
    12054. 

  12054. +		}
    12055. 

  12055. +	}
    12056. 

  12056. +
    12057. 

  12057. +	/* All of the bytes for transmit have been written.  Hang
    12058. 

  12058. +	 * out waiting for any residual bytes that are yet to be
    12059. 

  12059. +	 * read from the fifo.
    12060. 

  12060. +	 */
    12061. 

  12061. +	while (rcount > 0) {
    12062. 

  12062. +		stat = sp->psc_spistat;
    12063. 

  12063. +		au_sync();
    12064. 

  12064. +		if ((stat & PSC_SPISTAT_RE) == 0) {
    12065. 

  12065. +			fifoword = sp->psc_spitxrx;
    12066. 

  12066. +			au_sync();
    12067. 

  12067. +			for (i=0; i<bytelen; i++) {
    12068. 

  12068. +				sb = fifoword & 0xff;
    12069. 

  12069. +				if (put_user(sb, rp) < 0)
    12070. 

  12070. +					return -EFAULT;
    12071. 

  12071. +				fifoword >>= 8;
    12072. 

  12072. +				rp++;
    12073. 

  12073. +			}
    12074. 

  12074. +			rcount -= bytelen;
    12075. 

  12075. +		}
    12076. 

  12076. +	}
    12077. 

  12077. +
    12078. 

  12078. +	/* Wait for MasterDone event. 30ms timeout */
    12079. 

  12079. +	if (!au1550spi_master_done(30) ) retval = -EFAULT;
    12080. 

  12080. +	return retval;
    12081. 

  12081. +}
    12082. 

  12082. +
    12083. 

  12083. +static int
    12084. 

  12084. +au1550spi_release(struct inode *inode, struct file *file)
    12085. 

  12085. +{
    12086. 

  12086. +	MOD_DEC_USE_COUNT;
    12087. 

  12087. +
    12088. 

  12088. +	inuse = 0;
    12089. 

  12089. +
    12090. 

  12090. +	return 0;
    12091. 

  12091. +}
    12092. 

  12092. +
    12093. 

  12093. +/* Set the baud rate closest to the request, then return the actual
    12094. 

  12094. + * value we are using.
    12095. 

  12095. + */
    12096. 

  12096. +static uint
    12097. 

  12097. +set_baud_rate(uint baud)
    12098. 

  12098. +{
    12099. 

  12099. +	uint	rate, tmpclk, brg, ctl, stat;
    12100. 

  12100. +	volatile psc_spi_t *sp;
    12101. 

  12101. +
    12102. 

  12102. +	/* For starters, the input clock is divided by two.
    12103. 

  12103. +	*/
    12104. 

  12104. +	tmpclk = PSC_INTCLK_RATE/2;
    12105. 

  12105. +
    12106. 

  12106. +	rate = tmpclk / baud;
    12107. 

  12107. +
    12108. 

  12108. +	/* The dividers work as follows:
    12109. 

  12109. +	 *	baud = tmpclk / (2 * (brg + 1))
    12110. 

  12110. +	 */
    12111. 

  12111. +	 brg = (rate/2) - 1;
    12112. 

  12112. +
    12113. 

  12113. +	 /* Test BRG to ensure it will fit into the 6 bits allocated.
    12114. 

  12114. +	 */
    12115. 

  12115. +
    12116. 

  12116. +	 /* Make sure the device is disabled while we make the change.
    12117. 

  12117. +	 */
    12118. 

  12118. +	sp = (volatile psc_spi_t *)SPI_PSC_BASE;
    12119. 

  12119. +	ctl = sp->psc_spicfg;
    12120. 

  12120. +	au_sync();
    12121. 

  12121. +	sp->psc_spicfg = ctl & ~PSC_SPICFG_DE_ENABLE;
    12122. 

  12122. +	au_sync();
    12123. 

  12123. +	ctl = PSC_SPICFG_CLR_BAUD(ctl);
    12124. 

  12124. +	ctl |= PSC_SPICFG_SET_BAUD(brg);
    12125. 

  12125. +	sp->psc_spicfg = ctl;
    12126. 

  12126. +	au_sync();
    12127. 

  12127. +
    12128. 

  12128. +	/* If the device was running prior to getting here, wait for
    12129. 

  12129. +	 * it to restart.
    12130. 

  12130. +	 */
    12131. 

  12131. +	if (ctl & PSC_SPICFG_DE_ENABLE) {
    12132. 

  12132. +		do {
    12133. 

  12133. +			stat = sp->psc_spistat;
    12134. 

  12134. +			au_sync();
    12135. 

  12135. +		} while ((stat & PSC_SPISTAT_DR) == 0);
    12136. 

  12136. +	}
    12137. 

  12137. +
    12138. 

  12138. +	/* Return the actual value.
    12139. 

  12139. +	*/
    12140. 

  12140. +	rate = tmpclk / (2 * (brg + 1));
    12141. 

  12141. +
    12142. 

  12142. +	return(rate);
    12143. 

  12143. +}
    12144. 

  12144. +
    12145. 

  12145. +static uint
    12146. 

  12146. +set_word_len(uint len)
    12147. 

  12147. +{
    12148. 

  12148. +	uint	ctl, stat;
    12149. 

  12149. +	volatile psc_spi_t *sp;
    12150. 

  12150. +
    12151. 

  12151. +	if ((len < 4) || (len > 24))
    12152. 

  12152. +		return -EINVAL;
    12153. 

  12153. +
    12154. 

  12154. +	 /* Make sure the device is disabled while we make the change.
    12155. 

  12155. +	 */
    12156. 

  12156. +	sp = (volatile psc_spi_t *)SPI_PSC_BASE;
    12157. 

  12157. +	ctl = sp->psc_spicfg;
    12158. 

  12158. +	au_sync();
    12159. 

  12159. +	sp->psc_spicfg = ctl & ~PSC_SPICFG_DE_ENABLE;
    12160. 

  12160. +	au_sync();
    12161. 

  12161. +	ctl = PSC_SPICFG_CLR_LEN(ctl);
    12162. 

  12162. +	ctl |= PSC_SPICFG_SET_LEN(len);
    12163. 

  12163. +	sp->psc_spicfg = ctl;
    12164. 

  12164. +	au_sync();
    12165. 

  12165. +
    12166. 

  12166. +	/* If the device was running prior to getting here, wait for
    12167. 

  12167. +	 * it to restart.
    12168. 

  12168. +	 */
    12169. 

  12169. +	if (ctl & PSC_SPICFG_DE_ENABLE) {
    12170. 

  12170. +		do {
    12171. 

  12171. +			stat = sp->psc_spistat;
    12172. 

  12172. +			au_sync();
    12173. 

  12173. +		} while ((stat & PSC_SPISTAT_DR) == 0);
    12174. 

  12174. +	}
    12175. 

  12175. +
    12176. 

  12176. +	return 0;
    12177. 

  12177. +}
    12178. 

  12178. +
    12179. 

  12179. +static int
    12180. 

  12180. +au1550spi_ioctl(struct inode *inode, struct file *file,
    12181. 

  12181. +			    unsigned int cmd, unsigned long arg)
    12182. 

  12182. +{
    12183. 

  12183. +	int status;
    12184. 

  12184. +	u32 val;
    12185. 

  12185. +
    12186. 

  12186. +	status = 0;
    12187. 

  12187. +
    12188. 

  12188. +	switch(cmd) {
    12189. 

  12189. +	case AU1550SPI_WORD_LEN:
    12190. 

  12190. +		status = set_word_len(arg);
    12191. 

  12191. +		break;
    12192. 

  12192. +
    12193. 

  12193. +	case AU1550SPI_SET_BAUD:
    12194. 

  12194. +		if (get_user(val, (u32 *)arg)) 
    12195. 

  12195. +			return -EFAULT;
    12196. 

  12196. +
    12197. 

  12197. +		val = set_baud_rate(val);
    12198. 

  12198. +		if (put_user(val, (u32 *)arg)) 
    12199. 

  12199. +			return -EFAULT;
    12200. 

  12200. +		break;
    12201. 

  12201. +
    12202. 

  12202. +	default:
    12203. 

  12203. +		status = -ENOIOCTLCMD;
    12204. 

  12204. +
    12205. 

  12205. +	}
    12206. 

  12206. +
    12207. 

  12207. +	return status;
    12208. 

  12208. +}
    12209. 

  12209. +
    12210. 

  12210. +
    12211. 

  12211. +static struct file_operations au1550spi_fops =
    12212. 

  12212. +{
    12213. 

  12213. +	owner:		THIS_MODULE,
    12214. 

  12214. +	write:		au1550spi_write,
    12215. 

  12215. +	ioctl:		au1550spi_ioctl,
    12216. 

  12216. +	open:		au1550spi_open,
    12217. 

  12217. +	release:	au1550spi_release,
    12218. 

  12218. +};
    12219. 

  12219. +
    12220. 

  12220. +
    12221. 

  12221. +static struct miscdevice au1550spi_miscdev =
    12222. 

  12222. +{
    12223. 

  12223. +	MISC_DYNAMIC_MINOR,
    12224. 

  12224. +	"au1550_spi",
    12225. 

  12225. +	&au1550spi_fops
    12226. 

  12226. +};
    12227. 

  12227. +
    12228. 

  12228. +
    12229. 

  12229. +int __init
    12230. 

  12230. +au1550spi_init(void)
    12231. 

  12231. +{
    12232. 

  12232. +	uint	clk, rate, stat;
    12233. 

  12233. +	volatile psc_spi_t *sp;
    12234. 

  12234. +
    12235. 

  12235. +	/* Wire up Freq3 as a clock for the SPI.  The PSC does
    12236. 

  12236. +	 * factor of 2 divisor, so run a higher rate so we can
    12237. 

  12237. +	 * get some granularity to the clock speeds.
    12238. 

  12238. +	 * We can't do this in board set up because the frequency
    12239. 

  12239. +	 * is computed too late.
    12240. 

  12240. +	 */
    12241. 

  12241. +	rate = get_au1x00_speed();
    12242. 

  12242. +	rate /= PSC_INTCLK_RATE;
    12243. 

  12243. +
    12244. 

  12244. +	/* The FRDIV in the frequency control is (FRDIV + 1) * 2
    12245. 

  12245. +	*/
    12246. 

  12246. +	rate /=2;
    12247. 

  12247. +	rate--;
    12248. 

  12248. +	clk = au_readl(SYS_FREQCTRL1);
    12249. 

  12249. +	au_sync();
    12250. 

  12250. +	clk &= ~SYS_FC_FRDIV3_MASK;
    12251. 

  12251. +	clk |= (rate << SYS_FC_FRDIV3_BIT);
    12252. 

  12252. +	clk |= SYS_FC_FE3;
    12253. 

  12253. +	au_writel(clk, SYS_FREQCTRL1);
    12254. 

  12254. +	au_sync();
    12255. 

  12255. +
    12256. 

  12256. +	/* Set up the clock source routing to get Freq3 to PSC0_intclk.
    12257. 

  12257. +	*/
    12258. 

  12258. +	clk = au_readl(SYS_CLKSRC);
    12259. 

  12259. +	au_sync();
    12260. 

  12260. +	clk &= ~0x03e0;
    12261. 

  12261. +	clk |= (5 << 7);
    12262. 

  12262. +	au_writel(clk, SYS_CLKSRC);
    12263. 

  12263. +	au_sync();
    12264. 

  12264. +
    12265. 

  12265. +	/* Set up GPIO pin function to drive PSC0_SYNC1, which is
    12266. 

  12266. +	 * the SPI Select.
    12267. 

  12267. +	 */
    12268. 

  12268. +	clk = au_readl(SYS_PINFUNC);
    12269. 

  12269. +	au_sync();
    12270. 

  12270. +	clk |= 1;
    12271. 

  12271. +	au_writel(clk, SYS_PINFUNC);
    12272. 

  12272. +	au_sync();
    12273. 

  12273. +
    12274. 

  12274. +	/* Now, set up the PSC for SPI PIO mode.
    12275. 

  12275. +	*/
    12276. 

  12276. +	sp = (volatile psc_spi_t *)SPI_PSC_BASE;
    12277. 

  12277. +	sp->psc_ctrl = PSC_CTRL_DISABLE;
    12278. 

  12278. +	au_sync();
    12279. 

  12279. +	sp->psc_sel = PSC_SEL_PS_SPIMODE;
    12280. 

  12280. +	sp->psc_spicfg = 0;
    12281. 

  12281. +	au_sync();
    12282. 

  12282. +	sp->psc_ctrl = PSC_CTRL_ENABLE;
    12283. 

  12283. +	au_sync();
    12284. 

  12284. +	do {
    12285. 

  12285. +		stat = sp->psc_spistat;
    12286. 

  12286. +		au_sync();
    12287. 

  12287. +	} while ((stat & PSC_SPISTAT_SR) == 0);
    12288. 

  12288. +
    12289. 

  12289. +	sp->psc_spicfg = (PSC_SPICFG_RT_FIFO8 | PSC_SPICFG_TT_FIFO8 |
    12290. 

  12290. +				PSC_SPICFG_DD_DISABLE | PSC_SPICFG_MO);
    12291. 

  12291. +	sp->psc_spicfg |= PSC_SPICFG_SET_LEN(8);
    12292. 

  12292. +	spi_datalen = 8;
    12293. 

  12293. +	sp->psc_spimsk = PSC_SPIMSK_ALLMASK;
    12294. 

  12294. +	au_sync();
    12295. 

  12295. +
    12296. 

  12296. +	set_baud_rate(1000000);
    12297. 

  12297. +
    12298. 

  12298. +	sp->psc_spicfg |= PSC_SPICFG_DE_ENABLE;
    12299. 

  12299. +	do {
    12300. 

  12300. +		stat = sp->psc_spistat;
    12301. 

  12301. +		au_sync();
    12302. 

  12302. +	} while ((stat & PSC_SPISTAT_DR) == 0);
    12303. 

  12303. +
    12304. 

  12304. +	misc_register(&au1550spi_miscdev);
    12305. 

  12305. +	printk("Au1550 SPI driver\n");
    12306. 

  12306. +	return 0;
    12307. 

  12307. +}	
    12308. 

  12308. +
    12309. 

  12309. +
    12310. 

  12310. +void __exit
    12311. 

  12311. +au1550spi_exit(void)
    12312. 

  12312. +{
    12313. 

  12313. +	misc_deregister(&au1550spi_miscdev);
    12314. 

  12314. +}
    12315. 

  12315. +
    12316. 

  12316. +
    12317. 

  12317. +module_init(au1550spi_init);
    12318. 

  12318. +module_exit(au1550spi_exit);
    12319. 

  12319. --- a/drivers/char/Config.in
    12320. 

  12320. +++ b/drivers/char/Config.in
    12321. 

  12321. @@ -320,14 +320,11 @@ fi
    12322. 

  12322.  if [ "$CONFIG_OBSOLETE" = "y" -a "$CONFIG_ALPHA_BOOK1" = "y" ]; then
    12323. 

  12323.     bool 'Tadpole ANA H8 Support (OBSOLETE)'  CONFIG_H8
    12324. 

  12324.  fi
    12325. 

  12325. -if [ "$CONFIG_MIPS" = "y" -a "$CONFIG_NEW_TIME_C" = "y" ]; then
    12326. 

  12326. -   tristate 'Generic MIPS RTC Support' CONFIG_MIPS_RTC
    12327. 

  12327. -fi
    12328. 

  12328.  if [ "$CONFIG_SGI_IP22" = "y" ]; then
    12329. 

  12329. -   bool 'SGI DS1286 RTC support' CONFIG_SGI_DS1286
    12330. 

  12330. +   tristate 'Dallas DS1286 RTC support' CONFIG_DS1286
    12331. 

  12331.  fi
    12332. 

  12332.  if [ "$CONFIG_SGI_IP27" = "y" ]; then
    12333. 

  12333. -   bool 'SGI M48T35 RTC support' CONFIG_SGI_IP27_RTC
    12334. 

  12334. +   tristate 'SGI M48T35 RTC support' CONFIG_SGI_IP27_RTC
    12335. 

  12335.  fi
    12336. 

  12336.  if [ "$CONFIG_TOSHIBA_RBTX4927" = "y" -o "$CONFIG_TOSHIBA_JMR3927" = "y" ]; then
    12337. 

  12337.     tristate 'Dallas DS1742 RTC support' CONFIG_DS1742
    12338. 

  12338. @@ -390,6 +387,11 @@ if [ "$CONFIG_DRM" = "y" ]; then
    12339. 

  12339.        source drivers/char/drm/Config.in
    12340. 

  12340.     fi
    12341. 

  12341.  fi
    12342. 

  12342. +
    12343. 

  12343. +if [ "$CONFIG_X86" = "y" ]; then
    12344. 

  12344. +   tristate 'ACP Modem (Mwave) support' CONFIG_MWAVE
    12345. 

  12345. +fi
    12346. 

  12346. +
    12347. 

  12347.  endmenu
    12348. 

  12348.  
    12349. 

  12349.  if [ "$CONFIG_HOTPLUG" = "y" -a "$CONFIG_PCMCIA" != "n" ]; then
    12350. 

  12350. @@ -398,6 +400,7 @@ fi
    12351. 

  12351.  if [ "$CONFIG_SOC_AU1X00" = "y" ]; then
    12352. 

  12352.     tristate ' Alchemy Au1x00 GPIO device support' CONFIG_AU1X00_GPIO
    12353. 

  12353.     tristate ' Au1000/ADS7846 touchscreen support' CONFIG_TS_AU1X00_ADS7846
    12354. 

  12354. +   #tristate ' Alchemy Au1550 PSC SPI support' CONFIG_AU1550_PSC_SPI
    12355. 

  12355.  fi
    12356. 

  12356.  if [ "$CONFIG_MIPS_ITE8172" = "y" ]; then
    12357. 

  12357.    tristate ' ITE GPIO' CONFIG_ITE_GPIO
    12358. 

  12358. --- a/drivers/char/decserial.c
    12359. 

  12359. +++ b/drivers/char/decserial.c
    12360. 

  12360. @@ -3,95 +3,105 @@
    12361. 

  12361.   *      choose the right serial device at boot time
    12362. 

  12362.   *
    12363. 

  12363.   * triemer 6-SEP-1998
    12364. 

  12364. - *      sercons.c is designed to allow the three different kinds 
    12365. 

  12365. + *      sercons.c is designed to allow the three different kinds
    12366. 

  12366.   *      of serial devices under the decstation world to co-exist
    12367. 

  12367. - *      in the same kernel.  The idea here is to abstract 
    12368. 

  12368. + *      in the same kernel.  The idea here is to abstract
    12369. 

  12369.   *      the pieces of the drivers that are common to this file
    12370. 

  12370.   *      so that they do not clash at compile time and runtime.
    12371. 

  12371.   *
    12372. 

  12372.   * HK 16-SEP-1998 v0.002
    12373. 

  12373.   *      removed the PROM console as this is not a real serial
    12374. 

  12374.   *      device. Added support for PROM console in drivers/char/tty_io.c
    12375. 

  12375. - *      instead. Although it may work to enable more than one 
    12376. 

  12376. + *      instead. Although it may work to enable more than one
    12377. 

  12377.   *      console device I strongly recommend to use only one.
    12378. 

  12378. + *
    12379. 

  12379. + *	Copyright (C) 2004  Maciej W. Rozycki
    12380. 

  12380.   */
    12381. 

  12381.  
    12382. 

  12382.  #include <linux/config.h>
    12383. 

  12383. +#include <linux/errno.h>
    12384. 

  12384.  #include <linux/init.h>
    12385. 

  12385. +
    12386. 

  12386.  #include <asm/dec/machtype.h>
    12387. 

  12387. +#include <asm/dec/serial.h>
    12388. 

  12388. +
    12389. 

  12389. +extern int register_zs_hook(unsigned int channel,
    12390. 

  12390. +			    struct dec_serial_hook *hook);
    12391. 

  12391. +extern int unregister_zs_hook(unsigned int channel);
    12392. 

  12392. +
    12393. 

  12393. +extern int register_dz_hook(unsigned int channel,
    12394. 

  12394. +			    struct dec_serial_hook *hook);
    12395. 

  12395. +extern int unregister_dz_hook(unsigned int channel);
    12396. 

  12396.  
    12397. 

  12397. +int register_dec_serial_hook(unsigned int channel,
    12398. 

  12398. +			     struct dec_serial_hook *hook)
    12399. 

  12399. +{
    12400. 

  12400.  #ifdef CONFIG_ZS
    12401. 

  12401. -extern int zs_init(void);
    12402. 

  12402. +	if (IOASIC)
    12403. 

  12403. +		return register_zs_hook(channel, hook);
    12404. 

  12404.  #endif
    12405. 

  12405. -
    12406. 

  12406.  #ifdef CONFIG_DZ
    12407. 

  12407. -extern int dz_init(void);
    12408. 

  12408. +	if (!IOASIC)
    12409. 

  12409. +		return register_dz_hook(channel, hook);
    12410. 

  12410.  #endif
    12411. 

  12411. +	return 0;
    12412. 

  12412. +}
    12413. 

  12413.  
    12414. 

  12414. -#ifdef CONFIG_SERIAL_DEC_CONSOLE
    12415. 

  12415. -
    12416. 

  12416. +int unregister_dec_serial_hook(unsigned int channel)
    12417. 

  12417. +{
    12418. 

  12418.  #ifdef CONFIG_ZS
    12419. 

  12419. -extern void zs_serial_console_init(void);
    12420. 

  12420. +	if (IOASIC)
    12421. 

  12421. +		return unregister_zs_hook(channel);
    12422. 

  12422.  #endif
    12423. 

  12423. -
    12424. 

  12424.  #ifdef CONFIG_DZ
    12425. 

  12425. -extern void dz_serial_console_init(void);
    12426. 

  12426. -#endif
    12427. 

  12427. -
    12428. 

  12428. +	if (!IOASIC)
    12429. 

  12429. +		return unregister_dz_hook(channel);
    12430. 

  12430.  #endif
    12431. 

  12431. +	return 0;
    12432. 

  12432. +}
    12433. 

  12433.  
    12434. 

  12434. -/* rs_init - starts up the serial interface -
    12435. 

  12435. -   handle normal case of starting up the serial interface */
    12436. 

  12436.  
    12437. 

  12437. -#ifdef CONFIG_SERIAL_DEC
    12438. 

  12438. +extern int zs_init(void);
    12439. 

  12439. +extern int dz_init(void);
    12440. 

  12440.  
    12441. 

  12441. +/*
    12442. 

  12442. + * rs_init - starts up the serial interface -
    12443. 

  12443. + * handle normal case of starting up the serial interface
    12444. 

  12444. + */
    12445. 

  12445.  int __init rs_init(void)
    12446. 

  12446.  {
    12447. 

  12447. -
    12448. 

  12448. -#if defined(CONFIG_ZS) && defined(CONFIG_DZ)
    12449. 

  12449. -    if (IOASIC)
    12450. 

  12450. -	return zs_init();
    12451. 

  12451. -    else
    12452. 

  12452. -	return dz_init();
    12453. 

  12453. -#else
    12454. 

  12454. -
    12455. 

  12455.  #ifdef CONFIG_ZS
    12456. 

  12456. -    return zs_init();
    12457. 

  12457. +	if (IOASIC)
    12458. 

  12458. +		return zs_init();
    12459. 

  12459.  #endif
    12460. 

  12460. -
    12461. 

  12461.  #ifdef CONFIG_DZ
    12462. 

  12462. -    return dz_init();
    12463. 

  12463. -#endif
    12464. 

  12464. -
    12465. 

  12465. +	if (!IOASIC)
    12466. 

  12466. +		return dz_init();
    12467. 

  12467.  #endif
    12468. 

  12468. +	return -ENXIO;
    12469. 

  12469.  }
    12470. 

  12470.  
    12471. 

  12471.  __initcall(rs_init);
    12472. 

  12472.  
    12473. 

  12473. -#endif
    12474. 

  12474.  
    12475. 

  12475.  #ifdef CONFIG_SERIAL_DEC_CONSOLE
    12476. 

  12476.  
    12477. 

  12477. -/* dec_serial_console_init handles the special case of starting
    12478. 

  12478. - *   up the console on the serial port
    12479. 

  12479. +extern void zs_serial_console_init(void);
    12480. 

  12480. +extern void dz_serial_console_init(void);
    12481. 

  12481. +
    12482. 

  12482. +/*
    12483. 

  12483. + * dec_serial_console_init handles the special case of starting
    12484. 

  12484. + * up the console on the serial port
    12485. 

  12485.   */
    12486. 

  12486.  void __init dec_serial_console_init(void)
    12487. 

  12487.  {
    12488. 

  12488. -#if defined(CONFIG_ZS) && defined(CONFIG_DZ)
    12489. 

  12489. -    if (IOASIC)
    12490. 

  12490. -	zs_serial_console_init();
    12491. 

  12491. -    else
    12492. 

  12492. -	dz_serial_console_init();
    12493. 

  12493. -#else
    12494. 

  12494. -
    12495. 

  12495.  #ifdef CONFIG_ZS
    12496. 

  12496. -    zs_serial_console_init();
    12497. 

  12497. +	if (IOASIC)
    12498. 

  12498. +		zs_serial_console_init();
    12499. 

  12499.  #endif
    12500. 

  12500. -
    12501. 

  12501.  #ifdef CONFIG_DZ
    12502. 

  12502. -    dz_serial_console_init();
    12503. 

  12503. -#endif
    12504. 

  12504. -
    12505. 

  12505. +	if (!IOASIC)
    12506. 

  12506. +		dz_serial_console_init();
    12507. 

  12507.  #endif
    12508. 

  12508.  }
    12509. 

  12509.  
    12510. 

  12510. --- a/drivers/char/ds1286.c
    12511. 

  12511. +++ b/drivers/char/ds1286.c
    12512. 

  12512. @@ -1,6 +1,10 @@
    12513. 

  12513.  /*
    12514. 

  12514.   * DS1286 Real Time Clock interface for Linux
    12515. 

  12515.   *
    12516. 

  12516. + * Copyright (C) 2003 TimeSys Corp.
    12517. 

  12517. + *                    S. James Hill (James.Hill@timesys.com)
    12518. 

  12518. + *                                  (sjhill@realitydiluted.com)
    12519. 

  12519. + *
    12520. 

  12520.   * Copyright (C) 1998, 1999, 2000 Ralf Baechle
    12521. 

  12521.   *
    12522. 

  12522.   * Based on code written by Paul Gortmaker.
    12523. 

  12523. @@ -29,6 +33,7 @@
    12524. 

  12524.  #include <linux/types.h>
    12525. 

  12525.  #include <linux/errno.h>
    12526. 

  12526.  #include <linux/miscdevice.h>
    12527. 

  12527. +#include <linux/module.h>
    12528. 

  12528.  #include <linux/slab.h>
    12529. 

  12529.  #include <linux/ioport.h>
    12530. 

  12530.  #include <linux/fcntl.h>
    12531. 

  12531. @@ -95,6 +100,12 @@ static ssize_t ds1286_read(struct file *
    12532. 

  12532.  	return -EIO;
    12533. 

  12533.  }
    12534. 

  12534.  
    12535. 

  12535. +void rtc_ds1286_wait(void)
    12536. 

  12536. +{
    12537. 

  12537. +	unsigned char sec = CMOS_READ(RTC_SECONDS);
    12538. 

  12538. +	while (sec == CMOS_READ(RTC_SECONDS));
    12539. 

  12539. +}
    12540. 

  12540. +
    12541. 

  12541.  static int ds1286_ioctl(struct inode *inode, struct file *file,
    12542. 

  12542.                          unsigned int cmd, unsigned long arg)
    12543. 

  12543.  {
    12544. 

  12544. @@ -249,23 +260,22 @@ static int ds1286_open(struct inode *ino
    12545. 

  12545.  {
    12546. 

  12546.  	spin_lock_irq(&ds1286_lock);
    12547. 

  12547.  
    12548. 

  12548. -	if (ds1286_status & RTC_IS_OPEN)
    12549. 

  12549. -		goto out_busy;
    12550. 

  12550. +	if (ds1286_status & RTC_IS_OPEN) {
    12551. 

  12551. +		spin_unlock_irq(&ds1286_lock);
    12552. 

  12552. +		return -EBUSY;
    12553. 

  12553. +	}
    12554. 

  12554.  
    12555. 

  12555.  	ds1286_status |= RTC_IS_OPEN;
    12556. 

  12556.  
    12557. 

  12557. -	spin_lock_irq(&ds1286_lock);
    12558. 

  12558. +	spin_unlock_irq(&ds1286_lock);
    12559. 

  12559.  	return 0;
    12560. 

  12560. -
    12561. 

  12561. -out_busy:
    12562. 

  12562. -	spin_lock_irq(&ds1286_lock);
    12563. 

  12563. -	return -EBUSY;
    12564. 

  12564.  }
    12565. 

  12565.  
    12566. 

  12566.  static int ds1286_release(struct inode *inode, struct file *file)
    12567. 

  12567.  {
    12568. 

  12568. +	spin_lock_irq(&ds1286_lock);
    12569. 

  12569.  	ds1286_status &= ~RTC_IS_OPEN;
    12570. 

  12570. -
    12571. 

  12571. +	spin_unlock_irq(&ds1286_lock);
    12572. 

  12572.  	return 0;
    12573. 

  12573.  }
    12574. 

  12574.  
    12575. 

  12575. @@ -276,32 +286,6 @@ static unsigned int ds1286_poll(struct f
    12576. 

  12576.  	return 0;
    12577. 

  12577.  }
    12578. 

  12578.  
    12579. 

  12579. -/*
    12580. 

  12580. - *	The various file operations we support.
    12581. 

  12581. - */
    12582. 

  12582. -
    12583. 

  12583. -static struct file_operations ds1286_fops = {
    12584. 

  12584. -	.llseek		= no_llseek,
    12585. 

  12585. -	.read		= ds1286_read,
    12586. 

  12586. -	.poll		= ds1286_poll,
    12587. 

  12587. -	.ioctl		= ds1286_ioctl,
    12588. 

  12588. -	.open		= ds1286_open,
    12589. 

  12589. -	.release	= ds1286_release,
    12590. 

  12590. -};
    12591. 

  12591. -
    12592. 

  12592. -static struct miscdevice ds1286_dev=
    12593. 

  12593. -{
    12594. 

  12594. -	.minor	= RTC_MINOR,
    12595. 

  12595. -	.name	= "rtc",
    12596. 

  12596. -	.fops	= &ds1286_fops,
    12597. 

  12597. -};
    12598. 

  12598. -
    12599. 

  12599. -int __init ds1286_init(void)
    12600. 

  12600. -{
    12601. 

  12601. -	printk(KERN_INFO "DS1286 Real Time Clock Driver v%s\n", DS1286_VERSION);
    12602. 

  12602. -	return misc_register(&ds1286_dev);
    12603. 

  12603. -}
    12604. 

  12604. -
    12605. 

  12605.  static char *days[] = {
    12606. 

  12606.  	"***", "Sun", "Mon", "Tue", "Wed", "Thu", "Fri", "Sat"
    12607. 

  12607.  };
    12608. 

  12608. @@ -528,3 +512,38 @@ void ds1286_get_alm_time(struct rtc_time
    12609. 

  12609.  	BCD_TO_BIN(alm_tm->tm_hour);
    12610. 

  12610.  	alm_tm->tm_sec = 0;
    12611. 

  12611.  }
    12612. 

  12612. +
    12613. 

  12613. +static struct file_operations ds1286_fops = {
    12614. 

  12614. +	.owner		= THIS_MODULE,
    12615. 

  12615. +	.llseek		= no_llseek,
    12616. 

  12616. +	.read		= ds1286_read,
    12617. 

  12617. +	.poll		= ds1286_poll,
    12618. 

  12618. +	.ioctl		= ds1286_ioctl,
    12619. 

  12619. +	.open		= ds1286_open,
    12620. 

  12620. +	.release	= ds1286_release,
    12621. 

  12621. +};
    12622. 

  12622. +
    12623. 

  12623. +static struct miscdevice ds1286_dev =
    12624. 

  12624. +{
    12625. 

  12625. +	.minor	= RTC_MINOR,
    12626. 

  12626. +	.name	= "rtc",
    12627. 

  12627. +	.fops	= &ds1286_fops,
    12628. 

  12628. +};
    12629. 

  12629. +
    12630. 

  12630. +static int __init ds1286_init(void)
    12631. 

  12631. +{
    12632. 

  12632. +	printk(KERN_INFO "DS1286 Real Time Clock Driver v%s\n", DS1286_VERSION);
    12633. 

  12633. +	return misc_register(&ds1286_dev);
    12634. 

  12634. +}
    12635. 

  12635. +
    12636. 

  12636. +static void __exit ds1286_exit(void)
    12637. 

  12637. +{
    12638. 

  12638. +	misc_deregister(&ds1286_dev);
    12639. 

  12639. +}
    12640. 

  12640. +
    12641. 

  12641. +module_init(ds1286_init);
    12642. 

  12642. +module_exit(ds1286_exit);
    12643. 

  12643. +EXPORT_NO_SYMBOLS;
    12644. 

  12644. +
    12645. 

  12645. +MODULE_AUTHOR("Ralf Baechle");
    12646. 

  12646. +MODULE_LICENSE("GPL");
    12647. 

  12647. --- a/drivers/char/ds1742.c
    12648. 

  12648. +++ b/drivers/char/ds1742.c
    12649. 

  12649. @@ -142,6 +142,7 @@ static int rtc_ds1742_set_time(unsigned 
    12650. 

  12650.  	CMOS_WRITE(RTC_WRITE, RTC_CONTROL);
    12651. 

  12651.  
    12652. 

  12652.  	/* convert */
    12653. 

  12653. +	memset(&tm, 0, sizeof(struct rtc_time));
    12654. 

  12654.  	to_tm(t, &tm);
    12655. 

  12655.  
    12656. 

  12656.  	/* check each field one by one */
    12657. 

  12657. @@ -216,6 +217,7 @@ static int get_ds1742_status(char *buf)
    12658. 

  12658.  	unsigned long curr_time;
    12659. 

  12659.  
    12660. 

  12660.  	curr_time = rtc_ds1742_get_time();
    12661. 

  12661. +	memset(&tm, 0, sizeof(struct rtc_time));
    12662. 

  12662.  	to_tm(curr_time, &tm);
    12663. 

  12663.  
    12664. 

  12664.  	p = buf;
    12665. 

  12665. @@ -251,8 +253,8 @@ static int ds1742_read_proc(char *page, 
    12666. 

  12666.  
    12667. 

  12667.  void rtc_ds1742_wait(void)
    12668. 

  12668.  {
    12669. 

  12669. -	while (CMOS_READ(RTC_SECONDS) & 1);
    12670. 

  12670. -	while (!(CMOS_READ(RTC_SECONDS) & 1));
    12671. 

  12671. +	unsigned char sec = CMOS_READ(RTC_SECONDS);
    12672. 

  12672. +	while (sec == CMOS_READ(RTC_SECONDS));
    12673. 

  12673.  }
    12674. 

  12674.  
    12675. 

  12675.  static int ds1742_ioctl(struct inode *inode, struct file *file,
    12676. 

  12676. @@ -264,6 +266,7 @@ static int ds1742_ioctl(struct inode *in
    12677. 

  12677.  	switch (cmd) {
    12678. 

  12678.  	case RTC_RD_TIME:	/* Read the time/date from RTC  */
    12679. 

  12679.  		curr_time = rtc_ds1742_get_time();
    12680. 

  12680. +		memset(&rtc_tm, 0, sizeof(struct rtc_time));
    12681. 

  12681.  		to_tm(curr_time, &rtc_tm);
    12682. 

  12682.  		rtc_tm.tm_year -= 1900;
    12683. 

  12683.  		return copy_to_user((void *) arg, &rtc_tm, sizeof(rtc_tm)) ? 
    12684. 

  12684. --- a/drivers/char/dummy_keyb.c
    12685. 

  12685. +++ b/drivers/char/dummy_keyb.c
    12686. 

  12686. @@ -141,3 +141,7 @@ void __init kbd_init_hw(void)
    12687. 

  12687.  {
    12688. 

  12688.  	printk("Dummy keyboard driver installed.\n");
    12689. 

  12689.  }
    12690. 

  12690. +#ifdef CONFIG_MAGIC_SYSRQ
    12691. 

  12691. +unsigned char kbd_sysrq_key;
    12692. 

  12692. +unsigned char kbd_sysrq_xlate[128];
    12693. 

  12693. +#endif
    12694. 

  12694. --- a/drivers/char/dz.c
    12695. 

  12695. +++ b/drivers/char/dz.c
    12696. 

  12696. @@ -1,11 +1,13 @@
    12697. 

  12697.  /*
    12698. 

  12698. - * dz.c: Serial port driver for DECStations equiped 
    12699. 

  12699. + * dz.c: Serial port driver for DECstations equipped 
    12700. 

  12700.   *       with the DZ chipset.
    12701. 

  12701.   *
    12702. 

  12702.   * Copyright (C) 1998 Olivier A. D. Lebaillif 
    12703. 

  12703.   *             
    12704. 

  12704.   * Email: olivier.lebaillif@ifrsys.com
    12705. 

  12705.   *
    12706. 

  12706. + * Copyright (C) 2004  Maciej W. Rozycki
    12707. 

  12707. + *
    12708. 

  12708.   * [31-AUG-98] triemer
    12709. 

  12709.   * Changed IRQ to use Harald's dec internals interrupts.h
    12710. 

  12710.   * removed base_addr code - moving address assignment to setup.c
    12711. 

  12711. @@ -24,6 +26,7 @@
    12712. 

  12712.  #undef DEBUG_DZ
    12713. 

  12713.  
    12714. 

  12714.  #include <linux/config.h>
    12715. 

  12715. +#include <linux/delay.h>
    12716. 

  12716.  #include <linux/version.h>
    12717. 

  12717.  #include <linux/kernel.h>
    12718. 

  12718.  #include <linux/sched.h>
    12719. 

  12719. @@ -54,33 +57,56 @@
    12720. 

  12720.  #include <asm/system.h>
    12721. 

  12721.  #include <asm/uaccess.h>
    12722. 

  12722.  
    12723. 

  12723. -#define CONSOLE_LINE (3)	/* for definition of struct console */
    12724. 

  12724. +#ifdef CONFIG_MAGIC_SYSRQ
    12725. 

  12725. +#include <linux/sysrq.h>
    12726. 

  12726. +#endif
    12727. 

  12727.  
    12728. 

  12728.  #include "dz.h"
    12729. 

  12729.  
    12730. 

  12730. -#define DZ_INTR_DEBUG 1
    12731. 

  12731. -
    12732. 

  12732.  DECLARE_TASK_QUEUE(tq_serial);
    12733. 

  12733.  
    12734. 

  12734. -static struct dz_serial *lines[4];
    12735. 

  12735. -static unsigned char tmp_buffer[256];
    12736. 

  12736. +static struct dz_serial multi[DZ_NB_PORT];    /* Four serial lines in the DZ chip */
    12737. 

  12737. +static struct tty_driver serial_driver, callout_driver;
    12738. 

  12738. +
    12739. 

  12739. +static struct tty_struct *serial_table[DZ_NB_PORT];
    12740. 

  12740. +static struct termios *serial_termios[DZ_NB_PORT];
    12741. 

  12741. +static struct termios *serial_termios_locked[DZ_NB_PORT];
    12742. 

  12742. +
    12743. 

  12743. +static int serial_refcount;
    12744. 

  12744.  
    12745. 

  12745. -#ifdef DEBUG_DZ
    12746. 

  12746.  /*
    12747. 

  12747. - * debugging code to send out chars via prom 
    12748. 

  12748. + * tmp_buf is used as a temporary buffer by serial_write.  We need to
    12749. 

  12749. + * lock it in case the copy_from_user blocks while swapping in a page,
    12750. 

  12750. + * and some other program tries to do a serial write at the same time.
    12751. 

  12751. + * Since the lock will only come under contention when the system is
    12752. 

  12752. + * swapping and available memory is low, it makes sense to share one
    12753. 

  12753. + * buffer across all the serial ports, since it significantly saves
    12754. 

  12754. + * memory if large numbers of serial ports are open.
    12755. 

  12755.   */
    12756. 

  12756. -static void debug_console(const char *s, int count)
    12757. 

  12757. -{
    12758. 

  12758. -	unsigned i;
    12759. 

  12759. +static unsigned char *tmp_buf;
    12760. 

  12760. +static DECLARE_MUTEX(tmp_buf_sem);
    12761. 

  12761.  
    12762. 

  12762. -	for (i = 0; i < count; i++) {
    12763. 

  12763. -		if (*s == 10)
    12764. 

  12764. -			prom_printf("%c", 13);
    12765. 

  12765. -		prom_printf("%c", *s++);
    12766. 

  12766. -	}
    12767. 

  12767. -}
    12768. 

  12768. +static char *dz_name __initdata = "DECstation DZ serial driver version ";
    12769. 

  12769. +static char *dz_version __initdata = "1.03";
    12770. 

  12770. +
    12771. 

  12771. +static struct dz_serial *lines[DZ_NB_PORT];
    12772. 

  12772. +static unsigned char tmp_buffer[256];
    12773. 

  12773. +
    12774. 

  12774. +#ifdef CONFIG_SERIAL_DEC_CONSOLE
    12775. 

  12775. +static struct console dz_sercons;
    12776. 

  12776. +#endif
    12777. 

  12777. +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
    12778. 

  12778. +   !defined(MODULE)
    12779. 

  12779. +static unsigned long break_pressed; /* break, really ... */
    12780. 

  12780.  #endif
    12781. 

  12781.  
    12782. 

  12782. +static void change_speed (struct dz_serial *);
    12783. 

  12783. +
    12784. 

  12784. +static int baud_table[] = {
    12785. 

  12785. +        0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
    12786. 

  12786. +        9600, 0
    12787. 

  12787. +};
    12788. 

  12788. +
    12789. 

  12789.  /*
    12790. 

  12790.   * ------------------------------------------------------------
    12791. 

  12791.   * dz_in () and dz_out ()
    12792. 

  12792. @@ -94,15 +120,16 @@ static inline unsigned short dz_in(struc
    12793. 

  12793.  {
    12794. 

  12794.  	volatile unsigned short *addr =
    12795. 

  12795.  		(volatile unsigned short *) (info->port + offset);
    12796. 

  12796. +
    12797. 

  12797.  	return *addr;
    12798. 

  12798.  }
    12799. 

  12799.  
    12800. 

  12800.  static inline void dz_out(struct dz_serial *info, unsigned offset,
    12801. 

  12801.                            unsigned short value)
    12802. 

  12802.  {
    12803. 

  12803. -
    12804. 

  12804.  	volatile unsigned short *addr =
    12805. 

  12805.  		(volatile unsigned short *) (info->port + offset);
    12806. 

  12806. +
    12807. 

  12807.  	*addr = value;
    12808. 

  12808.  }
    12809. 

  12809.  
    12810. 

  12810. @@ -143,25 +170,24 @@ static void dz_start(struct tty_struct *
    12811. 

  12811.  
    12812. 

  12812.  	tmp |= mask;		/* set the TX flag */
    12813. 

  12813.  	dz_out(info, DZ_TCR, tmp);
    12814. 

  12814. -
    12815. 

  12815.  }
    12816. 

  12816.  
    12817. 

  12817.  /*
    12818. 

  12818.   * ------------------------------------------------------------
    12819. 

  12819. - * Here starts the interrupt handling routines.  All of the 
    12820. 

  12820. - * following subroutines are declared as inline and are folded 
    12821. 

  12821. - * into dz_interrupt.  They were separated out for readability's 
    12822. 

  12822. - * sake. 
    12823. 

  12823.   *
    12824. 

  12824. - * Note: rs_interrupt() is a "fast" interrupt, which means that it
    12825. 

  12825. + * Here starts the interrupt handling routines.  All of the following
    12826. 

  12826. + * subroutines are declared as inline and are folded into
    12827. 

  12827. + * dz_interrupt().  They were separated out for readability's sake.
    12828. 

  12828. + *
    12829. 

  12829. + * Note: dz_interrupt() is a "fast" interrupt, which means that it
    12830. 

  12830.   * runs with interrupts turned off.  People who may want to modify
    12831. 

  12831. - * rs_interrupt() should try to keep the interrupt handler as fast as
    12832. 

  12832. + * dz_interrupt() should try to keep the interrupt handler as fast as
    12833. 

  12833.   * possible.  After you are done making modifications, it is not a bad
    12834. 

  12834.   * idea to do:
    12835. 

  12835.   * 
    12836. 

  12836.   * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer dz.c
    12837. 

  12837.   *
    12838. 

  12838. - * and look at the resulting assemble code in serial.s.
    12839. 

  12839. + * and look at the resulting assemble code in dz.s.
    12840. 

  12840.   *
    12841. 

  12841.   * ------------------------------------------------------------
    12842. 

  12842.   */
    12843. 

  12843. @@ -188,101 +214,97 @@ static inline void dz_sched_event(struct
    12844. 

  12844.   * This routine deals with inputs from any lines.
    12845. 

  12845.   * ------------------------------------------------------------
    12846. 

  12846.   */
    12847. 

  12847. -static inline void receive_chars(struct dz_serial *info_in)
    12848. 

  12848. +static inline void receive_chars(struct dz_serial *info_in,
    12849. 

  12849. +				 struct pt_regs *regs)
    12850. 

  12850.  {
    12851. 

  12851. -
    12852. 

  12852.  	struct dz_serial *info;
    12853. 

  12853. -	struct tty_struct *tty = 0;
    12854. 

  12854. +	struct tty_struct *tty;
    12855. 

  12855.  	struct async_icount *icount;
    12856. 

  12856. -	int ignore = 0;
    12857. 

  12857. -	unsigned short status, tmp;
    12858. 

  12858. -	unsigned char ch;
    12859. 

  12859. -
    12860. 

  12860. -	/* this code is going to be a problem...
    12861. 

  12861. -	   the call to tty_flip_buffer is going to need
    12862. 

  12862. -	   to be rethought...
    12863. 

  12863. -	 */
    12864. 

  12864. -	do {
    12865. 

  12865. -		status = dz_in(info_in, DZ_RBUF);
    12866. 

  12866. -		info = lines[LINE(status)];
    12867. 

  12867. +	int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
    12868. 

  12868. +	unsigned short status;
    12869. 

  12869. +	unsigned char ch, flag;
    12870. 

  12870. +	int i;
    12871. 

  12871.  
    12872. 

  12872. -		/* punt so we don't get duplicate characters */
    12873. 

  12873. -		if (!(status & DZ_DVAL))
    12874. 

  12874. -			goto ignore_char;
    12875. 

  12875. -
    12876. 

  12876. -		ch = UCHAR(status);	/* grab the char */
    12877. 

  12877. -
    12878. 

  12878. -#if 0
    12879. 

  12879. -		if (info->is_console) {
    12880. 

  12880. -			if (ch == 0)
    12881. 

  12881. -				return;	/* it's a break ... */
    12882. 

  12882. -		}
    12883. 

  12883. -#endif
    12884. 

  12884. +	while ((status = dz_in(info_in, DZ_RBUF)) & DZ_DVAL) {
    12885. 

  12885. +		info = lines[LINE(status)];
    12886. 

  12886. +		tty = info->tty;		/* point to the proper dev */
    12887. 

  12887.  
    12888. 

  12888. -		tty = info->tty;	/* now tty points to the proper dev */
    12889. 

  12889. -		icount = &info->icount;
    12890. 

  12890. +		ch = UCHAR(status);		/* grab the char */
    12891. 

  12891.  
    12892. 

  12892. -		if (!tty)
    12893. 

  12893. -			break;
    12894. 

  12894. -		if (tty->flip.count >= TTY_FLIPBUF_SIZE)
    12895. 

  12895. -			break;
    12896. 

  12896. +		if (!tty && (!info->hook || !info->hook->rx_char))
    12897. 

  12897. +			continue;
    12898. 

  12898.  
    12899. 

  12899. -		*tty->flip.char_buf_ptr = ch;
    12900. 

  12900. -		*tty->flip.flag_buf_ptr = 0;
    12901. 

  12901. +		icount = &info->icount;
    12902. 

  12902.  		icount->rx++;
    12903. 

  12903.  
    12904. 

  12904. -		/* keep track of the statistics */
    12905. 

  12905. -		if (status & (DZ_OERR | DZ_FERR | DZ_PERR)) {
    12906. 

  12906. -			if (status & DZ_PERR)	/* parity error */
    12907. 

  12907. -				icount->parity++;
    12908. 

  12908. -			else if (status & DZ_FERR)	/* frame error */
    12909. 

  12909. -				icount->frame++;
    12910. 

  12910. -			if (status & DZ_OERR)	/* overrun error */
    12911. 

  12911. -				icount->overrun++;
    12912. 

  12912. -
    12913. 

  12913. -			/*  check to see if we should ignore the character
    12914. 

  12914. -			   and mask off conditions that should be ignored
    12915. 

  12915. +		flag = 0;
    12916. 

  12916. +		if (status & DZ_FERR) {		/* frame error */
    12917. 

  12917. +			/*
    12918. 

  12918. +			 * There is no separate BREAK status bit, so
    12919. 

  12919. +			 * treat framing errors as BREAKs for Magic SysRq
    12920. 

  12920. +			 * and SAK; normally, otherwise.
    12921. 

  12921.  			 */
    12922. 

  12922. -
    12923. 

  12923. -			if (status & info->ignore_status_mask) {
    12924. 

  12924. -				if (++ignore > 100)
    12925. 

  12925. -					break;
    12926. 

  12926. -				goto ignore_char;
    12927. 

  12927. +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
    12928. 

  12928. +   !defined(MODULE)
    12929. 

  12929. +			if (info->line == dz_sercons.index) {
    12930. 

  12930. +				if (!break_pressed)
    12931. 

  12931. +					break_pressed = jiffies;
    12932. 

  12932. +				continue;
    12933. 

  12933.  			}
    12934. 

  12934. -			/* mask off the error conditions we want to ignore */
    12935. 

  12935. -			tmp = status & info->read_status_mask;
    12936. 

  12936. -
    12937. 

  12937. -			if (tmp & DZ_PERR) {
    12938. 

  12938. -				*tty->flip.flag_buf_ptr = TTY_PARITY;
    12939. 

  12939. -#ifdef DEBUG_DZ
    12940. 

  12940. -				debug_console("PERR\n", 5);
    12941. 

  12941. -#endif
    12942. 

  12942. -			} else if (tmp & DZ_FERR) {
    12943. 

  12943. -				*tty->flip.flag_buf_ptr = TTY_FRAME;
    12944. 

  12944. -#ifdef DEBUG_DZ
    12945. 

  12945. -				debug_console("FERR\n", 5);
    12946. 

  12946.  #endif
    12947. 

  12947. +			flag = TTY_BREAK;
    12948. 

  12948. +			if (info->flags & DZ_SAK)
    12949. 

  12949. +				do_SAK(tty);
    12950. 

  12950. +			else
    12951. 

  12951. +				flag = TTY_FRAME;
    12952. 

  12952. +		} else if (status & DZ_OERR)	/* overrun error */
    12953. 

  12953. +			flag = TTY_OVERRUN;
    12954. 

  12954. +		else if (status & DZ_PERR)	/* parity error */
    12955. 

  12955. +			flag = TTY_PARITY;
    12956. 

  12956. +
    12957. 

  12957. +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
    12958. 

  12958. +   !defined(MODULE)
    12959. 

  12959. +		if (break_pressed && info->line == dz_sercons.index) {
    12960. 

  12960. +			if (time_before(jiffies, break_pressed + HZ * 5)) {
    12961. 

  12961. +				handle_sysrq(ch, regs, NULL, NULL);
    12962. 

  12962. +				break_pressed = 0;
    12963. 

  12963. +				continue;
    12964. 

  12964.  			}
    12965. 

  12965. -			if (tmp & DZ_OERR) {
    12966. 

  12966. -#ifdef DEBUG_DZ
    12967. 

  12967. -				debug_console("OERR\n", 5);
    12968. 

  12968. +			break_pressed = 0;
    12969. 

  12969. +		}
    12970. 

  12970.  #endif
    12971. 

  12971. -				if (tty->flip.count < TTY_FLIPBUF_SIZE) {
    12972. 

  12972. -					tty->flip.count++;
    12973. 

  12973. -					tty->flip.flag_buf_ptr++;
    12974. 

  12974. -					tty->flip.char_buf_ptr++;
    12975. 

  12975. -					*tty->flip.flag_buf_ptr = TTY_OVERRUN;
    12976. 

  12976. -				}
    12977. 

  12977. -			}
    12978. 

  12978. +
    12979. 

  12979. +		if (info->hook && info->hook->rx_char) {
    12980. 

  12980. +			(*info->hook->rx_char)(ch, flag);
    12981. 

  12981. +			return;
    12982. 

  12982.  		}
    12983. 

  12983. -		tty->flip.flag_buf_ptr++;
    12984. 

  12984. -		tty->flip.char_buf_ptr++;
    12985. 

  12985. -		tty->flip.count++;
    12986. 

  12986. -	      ignore_char:
    12987. 

  12987. -	} while (status & DZ_DVAL);
    12988. 

  12988.  
    12989. 

  12989. -	if (tty)
    12990. 

  12990. -		tty_flip_buffer_push(tty);
    12991. 

  12991. +		/* keep track of the statistics */
    12992. 

  12992. +		switch (flag) {
    12993. 

  12993. +		case TTY_FRAME:
    12994. 

  12994. +			icount->frame++;
    12995. 

  12995. +			break;
    12996. 

  12996. +		case TTY_PARITY:
    12997. 

  12997. +			icount->parity++;
    12998. 

  12998. +			break;
    12999. 

  12999. +		case TTY_OVERRUN:
    13000. 

  13000. +			icount->overrun++;
    13001. 

  13001. +			break;
    13002. 

  13002. +		case TTY_BREAK:
    13003. 

  13003. +			icount->brk++;
    13004. 

  13004. +			break;
    13005. 

  13005. +		default:
    13006. 

  13006. +			break;
    13007. 

  13007. +		}
    13008. 

  13008. +
    13009. 

  13009. +		if ((status & info->ignore_status_mask) == 0) {
    13010. 

  13010. +			tty_insert_flip_char(tty, ch, flag);
    13011. 

  13011. +			lines_rx[LINE(status)] = 1;
    13012. 

  13012. +		}
    13013. 

  13013. +	}
    13014. 

  13014. +	for (i = 0; i < DZ_NB_PORT; i++)
    13015. 

  13015. +		if (lines_rx[i])
    13016. 

  13016. +			tty_flip_buffer_push(lines[i]->tty);
    13017. 

  13017.  }
    13018. 

  13018.  
    13019. 

  13019.  /*
    13020. 

  13020. @@ -292,20 +314,34 @@ static inline void receive_chars(struct 
    13021. 

  13021.   * This routine deals with outputs to any lines.
    13022. 

  13022.   * ------------------------------------------------------------
    13023. 

  13023.   */
    13024. 

  13024. -static inline void transmit_chars(struct dz_serial *info)
    13025. 

  13025. +static inline void transmit_chars(struct dz_serial *info_in)
    13026. 

  13026.  {
    13027. 

  13027. +	struct dz_serial *info;
    13028. 

  13028. +	unsigned short status;
    13029. 

  13029.  	unsigned char tmp;
    13030. 

  13030.  
    13031. 

  13031. +	status = dz_in(info_in, DZ_CSR);
    13032. 

  13032. +	info = lines[LINE(status)];
    13033. 

  13033.  
    13034. 

  13034. +	if (info->hook || !info->tty) {
    13035. 

  13035. +		unsigned short mask, tmp;
    13036. 

  13036.  
    13037. 

  13037. -	if (info->x_char) {	/* XON/XOFF chars */
    13038. 

  13038. +		mask = 1 << info->line;
    13039. 

  13039. +		tmp = dz_in(info, DZ_TCR);	/* read the TX flag */
    13040. 

  13040. +		tmp &= ~mask;			/* clear the TX flag */
    13041. 

  13041. +		dz_out(info, DZ_TCR, tmp);
    13042. 

  13042. +		return;
    13043. 

  13043. +	}
    13044. 

  13044. +
    13045. 

  13045. +	if (info->x_char) {			/* XON/XOFF chars */
    13046. 

  13046.  		dz_out(info, DZ_TDR, info->x_char);
    13047. 

  13047.  		info->icount.tx++;
    13048. 

  13048.  		info->x_char = 0;
    13049. 

  13049.  		return;
    13050. 

  13050.  	}
    13051. 

  13051.  	/* if nothing to do or stopped or hardware stopped */
    13052. 

  13052. -	if ((info->xmit_cnt <= 0) || info->tty->stopped || info->tty->hw_stopped) {
    13053. 

  13053. +	if (info->xmit_cnt <= 0 ||
    13054. 

  13054. +	    info->tty->stopped || info->tty->hw_stopped) {
    13055. 

  13055.  		dz_stop(info->tty);
    13056. 

  13056.  		return;
    13057. 

  13057.  	}
    13058. 

  13058. @@ -359,15 +395,14 @@ static inline void check_modem_status(st
    13059. 

  13059.   */
    13060. 

  13060.  static void dz_interrupt(int irq, void *dev, struct pt_regs *regs)
    13061. 

  13061.  {
    13062. 

  13062. -	struct dz_serial *info;
    13063. 

  13063. +	struct dz_serial *info = (struct dz_serial *)dev;
    13064. 

  13064.  	unsigned short status;
    13065. 

  13065.  
    13066. 

  13066.  	/* get the reason why we just got an irq */
    13067. 

  13067. -	status = dz_in((struct dz_serial *) dev, DZ_CSR);
    13068. 

  13068. -	info = lines[LINE(status)];	/* re-arrange info the proper port */
    13069. 

  13069. +	status = dz_in(info, DZ_CSR);
    13070. 

  13070.  
    13071. 

  13071.  	if (status & DZ_RDONE)
    13072. 

  13072. -		receive_chars(info);	/* the receive function */
    13073. 

  13073. +		receive_chars(info, regs);
    13074. 

  13074.  
    13075. 

  13075.  	if (status & DZ_TRDY)
    13076. 

  13076.  		transmit_chars(info);
    13077. 

  13077. @@ -514,7 +549,7 @@ static void shutdown(struct dz_serial *i
    13078. 

  13078.  
    13079. 

  13079.  
    13080. 

  13080.  	info->cflags &= ~DZ_CREAD;	/* turn off receive enable flag */
    13081. 

  13081. -	dz_out(info, DZ_LPR, info->cflags);
    13082. 

  13082. +	dz_out(info, DZ_LPR, info->cflags | info->line);
    13083. 

  13083.  
    13084. 

  13084.  	if (info->xmit_buf) {	/* free Tx buffer */
    13085. 

  13085.  		free_page((unsigned long) info->xmit_buf);
    13086. 

  13086. @@ -545,18 +580,21 @@ static void change_speed(struct dz_seria
    13087. 

  13087.  {
    13088. 

  13088.  	unsigned long flags;
    13089. 

  13089.  	unsigned cflag;
    13090. 

  13090. -	int baud;
    13091. 

  13091. +	int baud, i;
    13092. 

  13092.  
    13093. 

  13093. -	if (!info->tty || !info->tty->termios)
    13094. 

  13094. -		return;
    13095. 

  13095. +	if (!info->hook) {
    13096. 

  13096. +		if (!info->tty || !info->tty->termios)
    13097. 

  13097. +			return;
    13098. 

  13098. +		cflag = info->tty->termios->c_cflag;
    13099. 

  13099. +	} else {
    13100. 

  13100. +		cflag = info->hook->cflags;
    13101. 

  13101. +	}
    13102. 

  13102.  
    13103. 

  13103.  	save_flags(flags);
    13104. 

  13104.  	cli();
    13105. 

  13105.  
    13106. 

  13106.  	info->cflags = info->line;
    13107. 

  13107.  
    13108. 

  13108. -	cflag = info->tty->termios->c_cflag;
    13109. 

  13109. -
    13110. 

  13110.  	switch (cflag & CSIZE) {
    13111. 

  13111.  	case CS5:
    13112. 

  13112.  		info->cflags |= DZ_CS5;
    13113. 

  13113. @@ -579,7 +617,16 @@ static void change_speed(struct dz_seria
    13114. 

  13114.  	if (cflag & PARODD)
    13115. 

  13115.  		info->cflags |= DZ_PARODD;
    13116. 

  13116.  
    13117. 

  13117. -	baud = tty_get_baud_rate(info->tty);
    13118. 

  13118. +	i = cflag & CBAUD;
    13119. 

  13119. +	if (i & CBAUDEX) {
    13120. 

  13120. +		i &= ~CBAUDEX;
    13121. 

  13121. +		if (!info->hook)
    13122. 

  13122. +			info->tty->termios->c_cflag &= ~CBAUDEX;
    13123. 

  13123. +		else
    13124. 

  13124. +			info->hook->cflags &= ~CBAUDEX;
    13125. 

  13125. +	}
    13126. 

  13126. +        baud = baud_table[i];
    13127. 

  13127. +
    13128. 

  13128.  	switch (baud) {
    13129. 

  13129.  	case 50:
    13130. 

  13130.  		info->cflags |= DZ_B50;
    13131. 

  13131. @@ -629,16 +676,16 @@ static void change_speed(struct dz_seria
    13132. 

  13132.  	}
    13133. 

  13133.  
    13134. 

  13134.  	info->cflags |= DZ_RXENAB;
    13135. 

  13135. -	dz_out(info, DZ_LPR, info->cflags);
    13136. 

  13136. +	dz_out(info, DZ_LPR, info->cflags | info->line);
    13137. 

  13137.  
    13138. 

  13138.  	/* setup accept flag */
    13139. 

  13139.  	info->read_status_mask = DZ_OERR;
    13140. 

  13140. -	if (I_INPCK(info->tty))
    13141. 

  13141. +	if (info->tty && I_INPCK(info->tty))
    13142. 

  13142.  		info->read_status_mask |= (DZ_FERR | DZ_PERR);
    13143. 

  13143.  
    13144. 

  13144.  	/* characters to ignore */
    13145. 

  13145.  	info->ignore_status_mask = 0;
    13146. 

  13146. -	if (I_IGNPAR(info->tty))
    13147. 

  13147. +	if (info->tty && I_IGNPAR(info->tty))
    13148. 

  13148.  		info->ignore_status_mask |= (DZ_FERR | DZ_PERR);
    13149. 

  13149.  
    13150. 

  13150.  	restore_flags(flags);
    13151. 

  13151. @@ -694,7 +741,7 @@ static int dz_write(struct tty_struct *t
    13152. 

  13152.  
    13153. 

  13153.  		down(&tmp_buf_sem);
    13154. 

  13154.  		while (1) {
    13155. 

  13155. -			c = MIN(count, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
    13156. 

  13156. +			c = min(count, min(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
    13157. 

  13157.  			if (c <= 0)
    13158. 

  13158.  				break;
    13159. 

  13159.  
    13160. 

  13160. @@ -707,7 +754,7 @@ static int dz_write(struct tty_struct *t
    13161. 

  13161.  			save_flags(flags);
    13162. 

  13162.  			cli();
    13163. 

  13163.  
    13164. 

  13164. -			c = MIN(c, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
    13165. 

  13165. +			c = min(c, min(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
    13166. 

  13166.  			memcpy(info->xmit_buf + info->xmit_head, tmp_buf, c);
    13167. 

  13167.  			info->xmit_head = ((info->xmit_head + c) & (DZ_XMIT_SIZE - 1));
    13168. 

  13168.  			info->xmit_cnt += c;
    13169. 

  13169. @@ -727,7 +774,7 @@ static int dz_write(struct tty_struct *t
    13170. 

  13170.  			save_flags(flags);
    13171. 

  13171.  			cli();
    13172. 

  13172.  
    13173. 

  13173. -			c = MIN(count, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
    13174. 

  13174. +			c = min(count, min(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
    13175. 

  13175.  			if (c <= 0) {
    13176. 

  13176.  				restore_flags(flags);
    13177. 

  13177.  				break;
    13178. 

  13178. @@ -845,7 +892,7 @@ static void dz_send_xchar(struct tty_str
    13179. 

  13179.  
    13180. 

  13180.  /*
    13181. 

  13181.   * ------------------------------------------------------------
    13182. 

  13182. - * rs_ioctl () and friends
    13183. 

  13183. + * dz_ioctl () and friends
    13184. 

  13184.   * ------------------------------------------------------------
    13185. 

  13185.   */
    13186. 

  13186.  static int get_serial_info(struct dz_serial *info,
    13187. 

  13187. @@ -958,6 +1005,9 @@ static int dz_ioctl(struct tty_struct *t
    13188. 

  13188.  	struct dz_serial *info = (struct dz_serial *) tty->driver_data;
    13189. 

  13189.  	int retval;
    13190. 

  13190.  
    13191. 

  13191. +	if (info->hook)
    13192. 

  13192. +		return -ENODEV;
    13193. 

  13193. +
    13194. 

  13194.  	if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
    13195. 

  13195.  	    (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
    13196. 

  13196.  	    (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
    13197. 

  13197. @@ -1252,19 +1302,14 @@ static int dz_open(struct tty_struct *tt
    13198. 

  13198.  	int retval, line;
    13199. 

  13199.  
    13200. 

  13200.  	line = MINOR(tty->device) - tty->driver.minor_start;
    13201. 

  13201. -
    13202. 

  13202. -	/* The dz lines for the mouse/keyboard must be
    13203. 

  13203. -	 * opened using their respective drivers.
    13204. 

  13204. -	 */
    13205. 

  13205.  	if ((line < 0) || (line >= DZ_NB_PORT))
    13206. 

  13206.  		return -ENODEV;
    13207. 

  13207. +	info = lines[line];
    13208. 

  13208.  
    13209. 

  13209. -	if ((line == DZ_KEYBOARD) || (line == DZ_MOUSE))
    13210. 

  13210. +	if (info->hook)
    13211. 

  13211.  		return -ENODEV;
    13212. 

  13212.  
    13213. 

  13213. -	info = lines[line];
    13214. 

  13214.  	info->count++;
    13215. 

  13215. -
    13216. 

  13216.  	tty->driver_data = info;
    13217. 

  13217.  	info->tty = tty;
    13218. 

  13218.  
    13219. 

  13219. @@ -1285,14 +1330,21 @@ static int dz_open(struct tty_struct *tt
    13220. 

  13220.  		else
    13221. 

  13221.  			*tty->termios = info->callout_termios;
    13222. 

  13222.  		change_speed(info);
    13223. 

  13223. -
    13224. 

  13224.  	}
    13225. 

  13225. +#ifdef CONFIG_SERIAL_DEC_CONSOLE
    13226. 

  13226. +	if (dz_sercons.cflag && dz_sercons.index == line) {
    13227. 

  13227. +		tty->termios->c_cflag = dz_sercons.cflag;
    13228. 

  13228. +		dz_sercons.cflag = 0;
    13229. 

  13229. +		change_speed(info);
    13230. 

  13230. +        }
    13231. 

  13231. +#endif
    13232. 

  13232. +
    13233. 

  13233.  	info->session = current->session;
    13234. 

  13234.  	info->pgrp = current->pgrp;
    13235. 

  13235.  	return 0;
    13236. 

  13236.  }
    13237. 

  13237.  
    13238. 

  13238. -static void show_serial_version(void)
    13239. 

  13239. +static void __init show_serial_version(void)
    13240. 

  13240.  {
    13241. 

  13241.  	printk("%s%s\n", dz_name, dz_version);
    13242. 

  13242.  }
    13243. 

  13243. @@ -1300,7 +1352,6 @@ static void show_serial_version(void)
    13244. 

  13244.  int __init dz_init(void)
    13245. 

  13245.  {
    13246. 

  13246.  	int i;
    13247. 

  13247. -	long flags;
    13248. 

  13248.  	struct dz_serial *info;
    13249. 

  13249.  
    13250. 

  13250.  	/* Setup base handler, and timer table. */
    13251. 

  13251. @@ -1311,9 +1362,9 @@ int __init dz_init(void)
    13252. 

  13252.  	memset(&serial_driver, 0, sizeof(struct tty_driver));
    13253. 

  13253.  	serial_driver.magic = TTY_DRIVER_MAGIC;
    13254. 

  13254.  #if (LINUX_VERSION_CODE > 0x2032D && defined(CONFIG_DEVFS_FS))
    13255. 

  13255. -	serial_driver.name = "ttyS";
    13256. 

  13256. -#else
    13257. 

  13257.  	serial_driver.name = "tts/%d";
    13258. 

  13258. +#else
    13259. 

  13259. +	serial_driver.name = "ttyS";
    13260. 

  13260.  #endif
    13261. 

  13261.  	serial_driver.major = TTY_MAJOR;
    13262. 

  13262.  	serial_driver.minor_start = 64;
    13263. 

  13263. @@ -1352,9 +1403,9 @@ int __init dz_init(void)
    13264. 

  13264.  	 */
    13265. 

  13265.  	callout_driver = serial_driver;
    13266. 

  13266.  #if (LINUX_VERSION_CODE > 0x2032D && defined(CONFIG_DEVFS_FS))
    13267. 

  13267. -	callout_driver.name = "cua";
    13268. 

  13268. -#else
    13269. 

  13269.  	callout_driver.name = "cua/%d";
    13270. 

  13270. +#else
    13271. 

  13271. +	callout_driver.name = "cua";
    13272. 

  13272.  #endif
    13273. 

  13273.  	callout_driver.major = TTYAUX_MAJOR;
    13274. 

  13274.  	callout_driver.subtype = SERIAL_TYPE_CALLOUT;
    13275. 

  13275. @@ -1363,25 +1414,27 @@ int __init dz_init(void)
    13276. 

  13276.  		panic("Couldn't register serial driver");
    13277. 

  13277.  	if (tty_register_driver(&callout_driver))
    13278. 

  13278.  		panic("Couldn't register callout driver");
    13279. 

  13279. -	save_flags(flags);
    13280. 

  13280. -	cli();
    13281. 

  13281.  
    13282. 

  13282.  	for (i = 0; i < DZ_NB_PORT; i++) {
    13283. 

  13283.  		info = &multi[i];
    13284. 

  13284.  		lines[i] = info;
    13285. 

  13285. -		info->magic = SERIAL_MAGIC;
    13286. 

  13286. -
    13287. 

  13287. +		info->tty = 0;
    13288. 

  13288. +		info->x_char = 0;
    13289. 

  13289.  		if (mips_machtype == MACH_DS23100 ||
    13290. 

  13290.  		    mips_machtype == MACH_DS5100)
    13291. 

  13291.  			info->port = (unsigned long) KN01_DZ11_BASE;
    13292. 

  13292.  		else
    13293. 

  13293.  			info->port = (unsigned long) KN02_DZ11_BASE;
    13294. 

  13294. -
    13295. 

  13295.  		info->line = i;
    13296. 

  13296. -		info->tty = 0;
    13297. 

  13297. +
    13298. 

  13298. +		if (info->hook && info->hook->init_info) {
    13299. 

  13299. +			(*info->hook->init_info)(info);
    13300. 

  13300. +			continue;
    13301. 

  13301. +		}
    13302. 

  13302. +
    13303. 

  13303. +		info->magic = SERIAL_MAGIC;
    13304. 

  13304.  		info->close_delay = 50;
    13305. 

  13305.  		info->closing_wait = 3000;
    13306. 

  13306. -		info->x_char = 0;
    13307. 

  13307.  		info->event = 0;
    13308. 

  13308.  		info->count = 0;
    13309. 

  13309.  		info->blocked_open = 0;
    13310. 

  13310. @@ -1393,25 +1446,16 @@ int __init dz_init(void)
    13311. 

  13311.  		info->normal_termios = serial_driver.init_termios;
    13312. 

  13312.  		init_waitqueue_head(&info->open_wait);
    13313. 

  13313.  		init_waitqueue_head(&info->close_wait);
    13314. 

  13314. -
    13315. 

  13315. -		/*
    13316. 

  13316. -		 * If we are pointing to address zero then punt - not correctly
    13317. 

  13317. -		 * set up in setup.c to handle this.
    13318. 

  13318. -		 */
    13319. 

  13319. -		if (!info->port)
    13320. 

  13320. -			return 0;
    13321. 

  13321. -
    13322. 

  13322. -		printk("ttyS%02d at 0x%08x (irq = %d)\n", info->line,
    13323. 

  13323. -		       info->port, dec_interrupt[DEC_IRQ_DZ11]);
    13324. 

  13324. -
    13325. 

  13325. +		printk("ttyS%02d at 0x%08x (irq = %d) is a DC7085 DZ\n",
    13326. 

  13326. +		       info->line, info->port, dec_interrupt[DEC_IRQ_DZ11]);
    13327. 

  13327.  		tty_register_devfs(&serial_driver, 0,
    13328. 

  13328. -				 serial_driver.minor_start + info->line);
    13329. 

  13329. +				   serial_driver.minor_start + info->line);
    13330. 

  13330.  		tty_register_devfs(&callout_driver, 0,
    13331. 

  13331. -				callout_driver.minor_start + info->line);
    13332. 

  13332. +				   callout_driver.minor_start + info->line);
    13333. 

  13333.  	}
    13334. 

  13334.  
    13335. 

  13335. -	/* reset the chip */
    13336. 

  13336.  #ifndef CONFIG_SERIAL_DEC_CONSOLE
    13337. 

  13337. +	/* reset the chip */
    13338. 

  13338.  	dz_out(info, DZ_CSR, DZ_CLR);
    13339. 

  13339.  	while (dz_in(info, DZ_CSR) & DZ_CLR);
    13340. 

  13340.  	iob();
    13341. 

  13341. @@ -1420,43 +1464,104 @@ int __init dz_init(void)
    13342. 

  13342.  	dz_out(info, DZ_CSR, DZ_MSE);
    13343. 

  13343.  #endif
    13344. 

  13344.  
    13345. 

  13345. -	/* order matters here... the trick is that flags
    13346. 

  13346. -	   is updated... in request_irq - to immediatedly obliterate
    13347. 

  13347. -	   it is unwise. */
    13348. 

  13348. -	restore_flags(flags);
    13349. 

  13349. -
    13350. 

  13350. -
    13351. 

  13351.  	if (request_irq(dec_interrupt[DEC_IRQ_DZ11], dz_interrupt,
    13352. 

  13352. -			SA_INTERRUPT, "DZ", lines[0]))
    13353. 

  13353. +			0, "DZ", lines[0]))
    13354. 

  13354.  		panic("Unable to register DZ interrupt");
    13355. 

  13355.  
    13356. 

  13356. +	for (i = 0; i < DZ_NB_PORT; i++)
    13357. 

  13357. +		if (lines[i]->hook) {
    13358. 

  13358. +			startup(lines[i]);
    13359. 

  13359. +			if (lines[i]->hook->init_channel)
    13360. 

  13360. +				(*lines[i]->hook->init_channel)(lines[i]);
    13361. 

  13361. +		}
    13362. 

  13362. +
    13363. 

  13363.  	return 0;
    13364. 

  13364.  }
    13365. 

  13365.  
    13366. 

  13366. -#ifdef CONFIG_SERIAL_DEC_CONSOLE
    13367. 

  13367. -static void dz_console_put_char(unsigned char ch)
    13368. 

  13368. +/*
    13369. 

  13369. + * polling I/O routines
    13370. 

  13370. + */
    13371. 

  13371. +static int dz_poll_tx_char(void *handle, unsigned char ch)
    13372. 

  13372.  {
    13373. 

  13373.  	unsigned long flags;
    13374. 

  13374. -	int loops = 2500;
    13375. 

  13375. -	unsigned short tmp = ch;
    13376. 

  13376. -	/* this code sends stuff out to serial device - spinning its
    13377. 

  13377. -	   wheels and waiting. */
    13378. 

  13378. +	struct dz_serial *info = handle;
    13379. 

  13379. +	unsigned short csr, tcr, trdy, mask;
    13380. 

  13380. +	int loops = 10000;
    13381. 

  13381. +	int ret;
    13382. 

  13382.  
    13383. 

  13383. -	/* force the issue - point it at lines[3] */
    13384. 

  13384. -	dz_console = &multi[CONSOLE_LINE];
    13385. 

  13385. +	local_irq_save(flags);
    13386. 

  13386. +	csr = dz_in(info, DZ_CSR);
    13387. 

  13387. +	dz_out(info, DZ_CSR, csr & ~DZ_TIE);
    13388. 

  13388. +	tcr = dz_in(info, DZ_TCR);
    13389. 

  13389. +	tcr |= 1 << info->line;
    13390. 

  13390. +	mask = tcr;
    13391. 

  13391. +	dz_out(info, DZ_TCR, mask);
    13392. 

  13392. +	iob();
    13393. 

  13393. +	local_irq_restore(flags);
    13394. 

  13394.  
    13395. 

  13395. -	save_flags(flags);
    13396. 

  13396. -	cli();
    13397. 

  13397. +	while (loops--) {
    13398. 

  13398. +		trdy = dz_in(info, DZ_CSR);
    13399. 

  13399. +		if (!(trdy & DZ_TRDY))
    13400. 

  13400. +			continue;
    13401. 

  13401. +		trdy = (trdy & DZ_TLINE) >> 8;
    13402. 

  13402. +		if (trdy == info->line)
    13403. 

  13403. +			break;
    13404. 

  13404. +		mask &= ~(1 << trdy);
    13405. 

  13405. +		dz_out(info, DZ_TCR, mask);
    13406. 

  13406. +		iob();
    13407. 

  13407. +		udelay(2);
    13408. 

  13408. +	}
    13409. 

  13409.  
    13410. 

  13410. +	if (loops) {
    13411. 

  13411. +		dz_out(info, DZ_TDR, ch);
    13412. 

  13412. +		ret = 0;
    13413. 

  13413. +	} else
    13414. 

  13414. +		ret = -EAGAIN;
    13415. 

  13415.  
    13416. 

  13416. -	/* spin our wheels */
    13417. 

  13417. -	while (((dz_in(dz_console, DZ_CSR) & DZ_TRDY) != DZ_TRDY) && loops--);
    13418. 

  13418. +	dz_out(info, DZ_TCR, tcr);
    13419. 

  13419. +	dz_out(info, DZ_CSR, csr);
    13420. 

  13420.  
    13421. 

  13421. -	/* Actually transmit the character. */
    13422. 

  13422. -	dz_out(dz_console, DZ_TDR, tmp);
    13423. 

  13423. +	return ret;
    13424. 

  13424. +}
    13425. 

  13425.  
    13426. 

  13426. -	restore_flags(flags);
    13427. 

  13427. +static int dz_poll_rx_char(void *handle)
    13428. 

  13428. +{
    13429. 

  13429. +	return -ENODEV;
    13430. 

  13430. +}
    13431. 

  13431. +
    13432. 

  13432. +int register_dz_hook(unsigned int channel, struct dec_serial_hook *hook)
    13433. 

  13433. +{
    13434. 

  13434. +	struct dz_serial *info = multi + channel;
    13435. 

  13435. +
    13436. 

  13436. +	if (info->hook) {
    13437. 

  13437. +		printk("%s: line %d has already a hook registered\n",
    13438. 

  13438. +		       __FUNCTION__, channel);
    13439. 

  13439. +
    13440. 

  13440. +		return 0;
    13441. 

  13441. +	} else {
    13442. 

  13442. +		hook->poll_rx_char = dz_poll_rx_char;
    13443. 

  13443. +		hook->poll_tx_char = dz_poll_tx_char;
    13444. 

  13444. +		info->hook = hook;
    13445. 

  13445. +
    13446. 

  13446. +		return 1;
    13447. 

  13447. +	}
    13448. 

  13448. +}
    13449. 

  13449. +
    13450. 

  13450. +int unregister_dz_hook(unsigned int channel)
    13451. 

  13451. +{
    13452. 

  13452. +	struct dz_serial *info = &multi[channel];
    13453. 

  13453. +
    13454. 

  13454. +	if (info->hook) {
    13455. 

  13455. +		info->hook = NULL;
    13456. 

  13456. +		return 1;
    13457. 

  13457. +	} else {
    13458. 

  13458. +		printk("%s: trying to unregister hook on line %d,"
    13459. 

  13459. +		       " but none is registered\n", __FUNCTION__, channel);
    13460. 

  13460. +		return 0;
    13461. 

  13461. +	}
    13462. 

  13462.  }
    13463. 

  13463. +
    13464. 

  13464. +#ifdef CONFIG_SERIAL_DEC_CONSOLE
    13465. 

  13465.  /* 
    13466. 

  13466.   * -------------------------------------------------------------------
    13467. 

  13467.   * dz_console_print ()
    13468. 

  13468. @@ -1465,17 +1570,19 @@ static void dz_console_put_char(unsigned
    13469. 

  13469.   * The console must be locked when we get here.
    13470. 

  13470.   * ------------------------------------------------------------------- 
    13471. 

  13471.   */
    13472. 

  13472. -static void dz_console_print(struct console *cons,
    13473. 

  13473. +static void dz_console_print(struct console *co,
    13474. 

  13474.  			     const char *str,
    13475. 

  13475.  			     unsigned int count)
    13476. 

  13476.  {
    13477. 

  13477. +	struct dz_serial *info = multi + co->index;
    13478. 

  13478. +
    13479. 

  13479.  #ifdef DEBUG_DZ
    13480. 

  13480.  	prom_printf((char *) str);
    13481. 

  13481.  #endif
    13482. 

  13482.  	while (count--) {
    13483. 

  13483.  		if (*str == '\n')
    13484. 

  13484. -			dz_console_put_char('\r');
    13485. 

  13485. -		dz_console_put_char(*str++);
    13486. 

  13486. +			dz_poll_tx_char(info, '\r');
    13487. 

  13487. +		dz_poll_tx_char(info, *str++);
    13488. 

  13488.  	}
    13489. 

  13489.  }
    13490. 

  13490.  
    13491. 

  13491. @@ -1486,12 +1593,12 @@ static kdev_t dz_console_device(struct c
    13492. 

  13492.  
    13493. 

  13493.  static int __init dz_console_setup(struct console *co, char *options)
    13494. 

  13494.  {
    13495. 

  13495. +	struct dz_serial *info = multi + co->index;
    13496. 

  13496.  	int baud = 9600;
    13497. 

  13497.  	int bits = 8;
    13498. 

  13498.  	int parity = 'n';
    13499. 

  13499.  	int cflag = CREAD | HUPCL | CLOCAL;
    13500. 

  13500.  	char *s;
    13501. 

  13501. -	unsigned short mask, tmp;
    13502. 

  13502.  
    13503. 

  13503.  	if (options) {
    13504. 

  13504.  		baud = simple_strtoul(options, NULL, 10);
    13505. 

  13505. @@ -1542,44 +1649,31 @@ static int __init dz_console_setup(struc
    13506. 

  13506.  	}
    13507. 

  13507.  	co->cflag = cflag;
    13508. 

  13508.  
    13509. 

  13509. -	/* TOFIX: force to console line */
    13510. 

  13510. -	dz_console = &multi[CONSOLE_LINE];
    13511. 

  13511.  	if ((mips_machtype == MACH_DS23100) || (mips_machtype == MACH_DS5100))
    13512. 

  13512. -		dz_console->port = KN01_DZ11_BASE;
    13513. 

  13513. +		info->port = KN01_DZ11_BASE;
    13514. 

  13514.  	else
    13515. 

  13515. -		dz_console->port = KN02_DZ11_BASE;
    13516. 

  13516. -	dz_console->line = CONSOLE_LINE;
    13517. 

  13517. +		info->port = KN02_DZ11_BASE;
    13518. 

  13518. +	info->line = co->index;
    13519. 

  13519.  
    13520. 

  13520. -	dz_out(dz_console, DZ_CSR, DZ_CLR);
    13521. 

  13521. -	while ((tmp = dz_in(dz_console, DZ_CSR)) & DZ_CLR);
    13522. 

  13522. +	dz_out(info, DZ_CSR, DZ_CLR);
    13523. 

  13523. +	while (dz_in(info, DZ_CSR) & DZ_CLR);
    13524. 

  13524.  
    13525. 

  13525.  	/* enable scanning */
    13526. 

  13526. -	dz_out(dz_console, DZ_CSR, DZ_MSE);
    13527. 

  13527. +	dz_out(info, DZ_CSR, DZ_MSE);
    13528. 

  13528.  
    13529. 

  13529.  	/*  Set up flags... */
    13530. 

  13530. -	dz_console->cflags = 0;
    13531. 

  13531. -	dz_console->cflags |= DZ_B9600;
    13532. 

  13532. -	dz_console->cflags |= DZ_CS8;
    13533. 

  13533. -	dz_console->cflags |= DZ_PARENB;
    13534. 

  13534. -	dz_out(dz_console, DZ_LPR, dz_console->cflags);
    13535. 

  13535. -
    13536. 

  13536. -	mask = 1 << dz_console->line;
    13537. 

  13537. -	tmp = dz_in(dz_console, DZ_TCR);	/* read the TX flag */
    13538. 

  13538. -	if (!(tmp & mask)) {
    13539. 

  13539. -		tmp |= mask;	/* set the TX flag */
    13540. 

  13540. -		dz_out(dz_console, DZ_TCR, tmp);
    13541. 

  13541. -	}
    13542. 

  13542. +	dz_out(info, DZ_LPR, cflag | info->line);
    13543. 

  13543. +
    13544. 

  13544.  	return 0;
    13545. 

  13545.  }
    13546. 

  13546.  
    13547. 

  13547. -static struct console dz_sercons =
    13548. 

  13548. -{
    13549. 

  13549. -    .name	= "ttyS",
    13550. 

  13550. -    .write	= dz_console_print,
    13551. 

  13551. -    .device	= dz_console_device,
    13552. 

  13552. -    .setup	= dz_console_setup,
    13553. 

  13553. -    .flags	= CON_CONSDEV | CON_PRINTBUFFER,
    13554. 

  13554. -    .index	= CONSOLE_LINE,
    13555. 

  13555. +static struct console dz_sercons = {
    13556. 

  13556. +	.name	= "ttyS",
    13557. 

  13557. +	.write	= dz_console_print,
    13558. 

  13558. +	.device	= dz_console_device,
    13559. 

  13559. +	.setup	= dz_console_setup,
    13560. 

  13560. +	.flags	= CON_PRINTBUFFER,
    13561. 

  13561. +	.index	= -1,
    13562. 

  13562.  };
    13563. 

  13563.  
    13564. 

  13564.  void __init dz_serial_console_init(void)
    13565. 

  13565. --- a/drivers/char/dz.h
    13566. 

  13566. +++ b/drivers/char/dz.h
    13567. 

  13567. @@ -10,6 +10,8 @@
    13568. 

  13568.  #ifndef DZ_SERIAL_H
    13569. 

  13569.  #define DZ_SERIAL_H
    13570. 

  13570.  
    13571. 

  13571. +#include <asm/dec/serial.h>
    13572. 

  13572. +
    13573. 

  13573.  #define SERIAL_MAGIC 0x5301
    13574. 

  13574.  
    13575. 

  13575.  /*
    13576. 

  13576. @@ -17,6 +19,7 @@
    13577. 

  13577.   */
    13578. 

  13578.  #define DZ_TRDY        0x8000                 /* Transmitter empty */
    13579. 

  13579.  #define DZ_TIE         0x4000                 /* Transmitter Interrupt Enable */
    13580. 

  13580. +#define DZ_TLINE       0x0300                 /* Transmitter Line Number */
    13581. 

  13581.  #define DZ_RDONE       0x0080                 /* Receiver data ready */
    13582. 

  13582.  #define DZ_RIE         0x0040                 /* Receive Interrupt Enable */
    13583. 

  13583.  #define DZ_MSE         0x0020                 /* Master Scan Enable */
    13584. 

  13584. @@ -37,19 +40,30 @@
    13585. 

  13585.  #define UCHAR(x) (unsigned char)(x & DZ_RBUF_MASK)
    13586. 

  13586.  
    13587. 

  13587.  /*
    13588. 

  13588. - * Definitions for the Transmit Register.
    13589. 

  13589. + * Definitions for the Transmit Control Register.
    13590. 

  13590.   */
    13591. 

  13591.  #define DZ_LINE_KEYBOARD 0x0001
    13592. 

  13592.  #define DZ_LINE_MOUSE    0x0002
    13593. 

  13593.  #define DZ_LINE_MODEM    0x0004
    13594. 

  13594.  #define DZ_LINE_PRINTER  0x0008
    13595. 

  13595.  
    13596. 

  13596. +#define DZ_MODEM_RTS     0x0800               /* RTS for the modem line (2) */
    13597. 

  13597.  #define DZ_MODEM_DTR     0x0400               /* DTR for the modem line (2) */
    13598. 

  13598. +#define DZ_PRINT_RTS     0x0200               /* RTS for the printer line (3) */
    13599. 

  13599. +#define DZ_PRINT_DTR     0x0100               /* DTR for the printer line (3) */
    13600. 

  13600. +#define DZ_LNENB         0x000f               /* Transmitter Line Enable */
    13601. 

  13601.  
    13602. 

  13602.  /*
    13603. 

  13603.   * Definitions for the Modem Status Register.
    13604. 

  13604.   */
    13605. 

  13605. +#define DZ_MODEM_RI      0x0800               /* RI for the modem line (2) */
    13606. 

  13606. +#define DZ_MODEM_CD      0x0400               /* CD for the modem line (2) */
    13607. 

  13607.  #define DZ_MODEM_DSR     0x0200               /* DSR for the modem line (2) */
    13608. 

  13608. +#define DZ_MODEM_CTS     0x0100               /* CTS for the modem line (2) */
    13609. 

  13609. +#define DZ_PRINT_RI      0x0008               /* RI for the printer line (2) */
    13610. 

  13610. +#define DZ_PRINT_CD      0x0004               /* CD for the printer line (2) */
    13611. 

  13611. +#define DZ_PRINT_DSR     0x0002               /* DSR for the printer line (2) */
    13612. 

  13612. +#define DZ_PRINT_CTS     0x0001               /* CTS for the printer line (2) */
    13613. 

  13613.  
    13614. 

  13614.  /*
    13615. 

  13615.   * Definitions for the Transmit Data Register.
    13616. 

  13616. @@ -115,9 +129,6 @@
    13617. 

  13617.  
    13618. 

  13618.  #define DZ_EVENT_WRITE_WAKEUP   0
    13619. 

  13619.  
    13620. 

  13620. -#ifndef MIN
    13621. 

  13621. -#define MIN(a,b)        ((a) < (b) ? (a) : (b))
    13622. 

  13622. -
    13623. 

  13623.  #define DZ_INITIALIZED       0x80000000 /* Serial port was initialized */
    13624. 

  13624.  #define DZ_CALLOUT_ACTIVE    0x40000000 /* Call out device is active */
    13625. 

  13625.  #define DZ_NORMAL_ACTIVE     0x20000000 /* Normal device is active */
    13626. 

  13626. @@ -129,6 +140,7 @@
    13627. 

  13627.  #define DZ_CLOSING_WAIT_INF  0
    13628. 

  13628.  #define DZ_CLOSING_WAIT_NONE 65535
    13629. 

  13629.  
    13630. 

  13630. +#define DZ_SAK             0x0004 /* Secure Attention Key (Orange book) */
    13631. 

  13631.  #define DZ_SPLIT_TERMIOS   0x0008 /* Separate termios for dialin/callout */
    13632. 

  13632.  #define DZ_SESSION_LOCKOUT 0x0100 /* Lock out cua opens based on session */
    13633. 

  13633.  #define DZ_PGRP_LOCKOUT    0x0200 /* Lock out cua opens based on pgrp */
    13634. 

  13634. @@ -166,79 +178,9 @@ struct dz_serial {
    13635. 

  13635.    long                    session;             /* Session of opening process */
    13636. 

  13636.    long                    pgrp;                /* pgrp of opening process */
    13637. 

  13637.  
    13638. 

  13638. +  struct dec_serial_hook  *hook;               /* Hook on this channel.  */
    13639. 

  13639.    unsigned char           is_console;          /* flag indicating a serial console */
    13640. 

  13640.    unsigned char           is_initialized;
    13641. 

  13641.  };
    13642. 

  13642.  
    13643. 

  13643. -static struct dz_serial multi[DZ_NB_PORT];    /* Four serial lines in the DZ chip */
    13644. 

  13644. -static struct dz_serial *dz_console;
    13645. 

  13645. -static struct tty_driver serial_driver, callout_driver;
    13646. 

  13646. -
    13647. 

  13647. -static struct tty_struct *serial_table[DZ_NB_PORT];
    13648. 

  13648. -static struct termios *serial_termios[DZ_NB_PORT];
    13649. 

  13649. -static struct termios *serial_termios_locked[DZ_NB_PORT];
    13650. 

  13650. -
    13651. 

  13651. -static int serial_refcount;
    13652. 

  13652. -
    13653. 

  13653. -/*
    13654. 

  13654. - * tmp_buf is used as a temporary buffer by serial_write.  We need to
    13655. 

  13655. - * lock it in case the copy_from_user blocks while swapping in a page,
    13656. 

  13656. - * and some other program tries to do a serial write at the same time.
    13657. 

  13657. - * Since the lock will only come under contention when the system is
    13658. 

  13658. - * swapping and available memory is low, it makes sense to share one
    13659. 

  13659. - * buffer across all the serial ports, since it significantly saves
    13660. 

  13660. - * memory if large numbers of serial ports are open.
    13661. 

  13661. - */
    13662. 

  13662. -static unsigned char *tmp_buf;
    13663. 

  13663. -static DECLARE_MUTEX(tmp_buf_sem);
    13664. 

  13664. -
    13665. 

  13665. -static char *dz_name = "DECstation DZ serial driver version ";
    13666. 

  13666. -static char *dz_version = "1.02";
    13667. 

  13667. -
    13668. 

  13668. -static inline unsigned short dz_in (struct dz_serial *, unsigned);
    13669. 

  13669. -static inline void dz_out (struct dz_serial *, unsigned, unsigned short);
    13670. 

  13670. -
    13671. 

  13671. -static inline void dz_sched_event (struct dz_serial *, int);
    13672. 

  13672. -static inline void receive_chars (struct dz_serial *);
    13673. 

  13673. -static inline void transmit_chars (struct dz_serial *);
    13674. 

  13674. -static inline void check_modem_status (struct dz_serial *);
    13675. 

  13675. -
    13676. 

  13676. -static void dz_stop (struct tty_struct *);
    13677. 

  13677. -static void dz_start (struct tty_struct *);
    13678. 

  13678. -static void dz_interrupt (int, void *, struct pt_regs *);
    13679. 

  13679. -static void do_serial_bh (void);
    13680. 

  13680. -static void do_softint (void *);
    13681. 

  13681. -static void do_serial_hangup (void *);
    13682. 

  13682. -static void change_speed (struct dz_serial *);
    13683. 

  13683. -static void dz_flush_chars (struct tty_struct *);
    13684. 

  13684. -static void dz_console_print (struct console *, const char *, unsigned int);
    13685. 

  13685. -static void dz_flush_buffer (struct tty_struct *);
    13686. 

  13686. -static void dz_throttle (struct tty_struct *);
    13687. 

  13687. -static void dz_unthrottle (struct tty_struct *);
    13688. 

  13688. -static void dz_send_xchar (struct tty_struct *, char);
    13689. 

  13689. -static void shutdown (struct dz_serial *);
    13690. 

  13690. -static void send_break (struct dz_serial *, int);
    13691. 

  13691. -static void dz_set_termios (struct tty_struct *, struct termios *);
    13692. 

  13692. -static void dz_close (struct tty_struct *, struct file *);
    13693. 

  13693. -static void dz_hangup (struct tty_struct *);
    13694. 

  13694. -static void show_serial_version (void);
    13695. 

  13695. -
    13696. 

  13696. -static int dz_write (struct tty_struct *, int, const unsigned char *, int);
    13697. 

  13697. -static int dz_write_room (struct tty_struct *);
    13698. 

  13698. -static int dz_chars_in_buffer (struct tty_struct *);
    13699. 

  13699. -static int startup (struct dz_serial *);
    13700. 

  13700. -static int get_serial_info (struct dz_serial *, struct serial_struct *);
    13701. 

  13701. -static int set_serial_info (struct dz_serial *, struct serial_struct *);
    13702. 

  13702. -static int get_lsr_info (struct dz_serial *, unsigned int *);
    13703. 

  13703. -static int dz_ioctl (struct tty_struct *, struct file *, unsigned int, unsigned long);
    13704. 

  13704. -static int block_til_ready (struct tty_struct *, struct file *, struct dz_serial *);
    13705. 

  13705. -static int dz_open (struct tty_struct *, struct file *);
    13706. 

  13706. -
    13707. 

  13707. -#ifdef MODULE
    13708. 

  13708. -int init_module (void)
    13709. 

  13709. -void cleanup_module (void)
    13710. 

  13710. -#endif
    13711. 

  13711. -
    13712. 

  13712. -#endif
    13713. 

  13713. -
    13714. 

  13714.  #endif /* DZ_SERIAL_H */
    13715. 

  13715. --- /dev/null
    13716. 

  13716. +++ b/drivers/char/ibm_workpad_keymap.map
    13717. 

  13717. @@ -0,0 +1,343 @@
    13718. 

  13718. +# Keymap for IBM Workpad z50
    13719. 

  13719. +# US Mapping
    13720. 

  13720. +#
    13721. 

  13721. +# by Michael Klar <wyldfier@iname.com>
    13722. 

  13722. +#
    13723. 

  13723. +# This is a great big mess on account of how the Caps Lock key is handled as
    13724. 

  13724. +# LeftShift-RightShift.  Right shift key had to be broken out, so don't use
    13725. 

  13725. +# use this map file as a basis for other keyboards that don't do the same
    13726. 

  13726. +# thing with Caps Lock.
    13727. 

  13727. +#
    13728. 

  13728. +# This file is subject to the terms and conditions of the GNU General Public
    13729. 

  13729. +# License.  See the file "COPYING" in the main directory of this archive
    13730. 

  13730. +# for more details.
    13731. 

  13731. +
    13732. 

  13732. +keymaps 0-2,4-5,8,12,32-33,36-37
    13733. 

  13733. +strings as usual
    13734. 

  13734. +
    13735. 

  13735. +keycode 0 = F1 F11 Console_13
    13736. 

  13736. +	shiftr keycode 0 = F11
    13737. 

  13737. +	shift shiftr keycode 0 = F11
    13738. 

  13738. +	control keycode 0 = F1
    13739. 

  13739. +	alt keycode 0 = Console_1
    13740. 

  13740. +	control alt keycode 0 = Console_1
    13741. 

  13741. +keycode 1 = F3 F13 Console_15
    13742. 

  13742. +	shiftr keycode 1 = F13
    13743. 

  13743. +	shift shiftr keycode 1 = F13
    13744. 

  13744. +	control keycode 1 = F3
    13745. 

  13745. +	alt keycode 1 = Console_3
    13746. 

  13746. +	control alt keycode 1 = Console_3
    13747. 

  13747. +keycode 2 = F5 F15 Console_17
    13748. 

  13748. +	shiftr keycode 2 = F15
    13749. 

  13749. +	shift shiftr keycode 2 = F15
    13750. 

  13750. +	control keycode 2 = F5
    13751. 

  13751. +	alt keycode 2 = Console_5
    13752. 

  13752. +	control alt keycode 2 = Console_5
    13753. 

  13753. +keycode 3 = F7 F17 Console_19
    13754. 

  13754. +	shiftr keycode 3 = F17
    13755. 

  13755. +	shift shiftr keycode 3 = F17
    13756. 

  13756. +	control keycode 3 = F7
    13757. 

  13757. +	alt keycode 3 = Console_7
    13758. 

  13758. +	control alt keycode 3 = Console_7
    13759. 

  13759. +keycode 4 = F9 F19 Console_21
    13760. 

  13760. +	shiftr keycode 4 = F19
    13761. 

  13761. +	shift shiftr keycode 4 = F19
    13762. 

  13762. +	control keycode 4 = F9
    13763. 

  13763. +	alt keycode 4 = Console_9
    13764. 

  13764. +	control alt keycode 4 = Console_9
    13765. 

  13765. +#keycode 5 is contrast down
    13766. 

  13766. +#keycode 6 is contrast up
    13767. 

  13767. +keycode 7 = F11 F11 Console_23
    13768. 

  13768. +	shiftr keycode 7 = F11
    13769. 

  13769. +	shift shiftr keycode 7 = F11
    13770. 

  13770. +	control keycode 7 = F11
    13771. 

  13771. +	alt keycode 7 = Console_11
    13772. 

  13772. +	control alt keycode 7 = Console_11
    13773. 

  13773. +keycode 8 = F2 F12 Console_14
    13774. 

  13774. +	shiftr keycode 8 = F12
    13775. 

  13775. +	shift shiftr keycode 8 = F12
    13776. 

  13776. +	control keycode 8 = F2
    13777. 

  13777. +	alt keycode 8 = Console_2
    13778. 

  13778. +	control alt keycode 8 = Console_2
    13779. 

  13779. +keycode 9 = F4 F14 Console_16
    13780. 

  13780. +	shiftr keycode 9 = F14
    13781. 

  13781. +	shift shiftr keycode 9 = F14
    13782. 

  13782. +	control keycode 9 = F4
    13783. 

  13783. +	alt keycode 9 = Console_4
    13784. 

  13784. +	control alt keycode 9 = Console_4
    13785. 

  13785. +keycode 10 = F6 F16 Console_18
    13786. 

  13786. +	shiftr keycode 10 = F16
    13787. 

  13787. +	shift shiftr keycode 10 = F16
    13788. 

  13788. +	control keycode 10 = F6
    13789. 

  13789. +	alt keycode 10 = Console_6
    13790. 

  13790. +	control alt keycode 10 = Console_6
    13791. 

  13791. +keycode 11 = F8 F18 Console_20
    13792. 

  13792. +	shiftr keycode 11 = F18
    13793. 

  13793. +	shift shiftr keycode 11 = F18
    13794. 

  13794. +	control keycode 11 = F8
    13795. 

  13795. +	alt keycode 11 = Console_8
    13796. 

  13796. +	control alt keycode 11 = Console_8
    13797. 

  13797. +keycode 12 = F10 F20 Console_22
    13798. 

  13798. +	shiftr keycode 12 = F20
    13799. 

  13799. +	shift shiftr keycode 12 = F20
    13800. 

  13800. +	control keycode 12 = F10
    13801. 

  13801. +	alt keycode 12 = Console_10
    13802. 

  13802. +	control alt keycode 12 = Console_10
    13803. 

  13803. +#keycode 13 is brightness down
    13804. 

  13804. +#keycode 14 is brightness up
    13805. 

  13805. +keycode 15 = F12 F12 Console_24
    13806. 

  13806. +	shiftr keycode 15 = F12
    13807. 

  13807. +	shift shiftr keycode 15 = F12
    13808. 

  13808. +	control keycode 15 = F12
    13809. 

  13809. +	alt keycode 15 = Console_12
    13810. 

  13810. +	control alt keycode 15 = Console_12
    13811. 

  13811. +keycode 16 = apostrophe quotedbl
    13812. 

  13812. +	shiftr keycode 16 = quotedbl
    13813. 

  13813. +	shift shiftr keycode 16 = quotedbl
    13814. 

  13814. +	control keycode 16 = Control_g
    13815. 

  13815. +	alt keycode 16 = Meta_apostrophe
    13816. 

  13816. +keycode 17 = bracketleft braceleft
    13817. 

  13817. +	shiftr keycode 17 = braceleft
    13818. 

  13818. +	shift shiftr keycode 17 = braceleft
    13819. 

  13819. +	control keycode 17 = Escape
    13820. 

  13820. +	alt keycode 17 = Meta_bracketleft
    13821. 

  13821. +keycode 18 = minus underscore backslash       
    13822. 

  13822. +	shiftr keycode 18 = underscore
    13823. 

  13823. +	shift shiftr keycode 18 = underscore
    13824. 

  13824. +	control keycode 18 = Control_underscore
    13825. 

  13825. +	shift control keycode 18 = Control_underscore
    13826. 

  13826. +	shiftr control keycode 18 = Control_underscore
    13827. 

  13827. +	shift shiftr control keycode 18 = Control_underscore
    13828. 

  13828. +	alt keycode 18 = Meta_minus
    13829. 

  13829. +keycode 19 = zero parenright braceright
    13830. 

  13830. +	shiftr keycode 19 = parenright
    13831. 

  13831. +	shift shiftr keycode 19 = parenright
    13832. 

  13832. +	alt keycode 19 = Meta_zero
    13833. 

  13833. +keycode 20 = p
    13834. 

  13834. +	shiftr keycode 20 = +P
    13835. 

  13835. +	shift shiftr keycode 20 = +p
    13836. 

  13836. +keycode 21 = semicolon colon
    13837. 

  13837. +	shiftr keycode 21 = colon
    13838. 

  13838. +	shift shiftr keycode 21 = colon
    13839. 

  13839. +	alt keycode 21 = Meta_semicolon
    13840. 

  13840. +keycode 22 = Up Scroll_Backward
    13841. 

  13841. +	shiftr keycode 22 = Scroll_Backward
    13842. 

  13842. +	shift shiftr keycode 22 = Scroll_Backward
    13843. 

  13843. +	alt keycode 22 = Prior
    13844. 

  13844. +keycode 23 = slash question
    13845. 

  13845. +	shiftr keycode 23 = question
    13846. 

  13846. +	shift shiftr keycode 23 = question
    13847. 

  13847. +	control keycode 23 = Delete
    13848. 

  13848. +	alt keycode 23 = Meta_slash
    13849. 

  13849. +
    13850. 

  13850. +keycode 27 = nine parenleft bracketright
    13851. 

  13851. +	shiftr keycode 27 = parenleft
    13852. 

  13852. +	shift shiftr keycode 27 = parenleft
    13853. 

  13853. +	alt keycode 27 = Meta_nine
    13854. 

  13854. +keycode 28 = o
    13855. 

  13855. +	shiftr keycode 28 = +O
    13856. 

  13856. +	shift shiftr keycode 28 = +o
    13857. 

  13857. +keycode 29 = l
    13858. 

  13858. +	shiftr keycode 29 = +L
    13859. 

  13859. +	shift shiftr keycode 29 = +l
    13860. 

  13860. +keycode 30 = period greater
    13861. 

  13861. +	shiftr keycode 30 = greater
    13862. 

  13862. +	shift shiftr keycode 30 = greater
    13863. 

  13863. +	control keycode 30 = Compose
    13864. 

  13864. +	alt keycode 30 = Meta_period
    13865. 

  13865. +
    13866. 

  13866. +keycode 32 = Left Decr_Console
    13867. 

  13867. +	shiftr keycode 32 = Decr_Console
    13868. 

  13868. +	shift shiftr keycode 32 = Decr_Console
    13869. 

  13869. +	alt keycode 32 = Home
    13870. 

  13870. +keycode 33 = bracketright braceright asciitilde      
    13871. 

  13871. +	shiftr keycode 33 = braceright
    13872. 

  13872. +	shift shiftr keycode 33 = braceright
    13873. 

  13873. +	control keycode 33 = Control_bracketright
    13874. 

  13874. +	alt keycode 33 = Meta_bracketright
    13875. 

  13875. +keycode 34 = equal plus
    13876. 

  13876. +	shiftr keycode 34 = plus
    13877. 

  13877. +	shift shiftr keycode 34 = plus
    13878. 

  13878. +	alt keycode 34 = Meta_equal
    13879. 

  13879. +keycode 35 = eight asterisk bracketleft
    13880. 

  13880. +	shiftr keycode 35 = asterisk
    13881. 

  13881. +	shift shiftr keycode 35 = asterisk
    13882. 

  13882. +	control keycode 35 = Delete
    13883. 

  13883. +	alt keycode 35 = Meta_eight
    13884. 

  13884. +keycode 36 = i
    13885. 

  13885. +	shiftr keycode 36 = +I
    13886. 

  13886. +	shift shiftr keycode 36 = +i
    13887. 

  13887. +keycode 37 = k
    13888. 

  13888. +	shiftr keycode 37 = +K
    13889. 

  13889. +	shift shiftr keycode 37 = +k
    13890. 

  13890. +keycode 38 = comma less
    13891. 

  13891. +	shiftr keycode 38 = less
    13892. 

  13892. +	shift shiftr keycode 38 = less
    13893. 

  13893. +	alt keycode 38 = Meta_comma
    13894. 

  13894. +
    13895. 

  13895. +keycode 40 = h
    13896. 

  13896. +	shiftr keycode 40 = +H
    13897. 

  13897. +	shift shiftr keycode 40 = +h
    13898. 

  13898. +keycode 41 = y
    13899. 

  13899. +	shiftr keycode 41 = +Y
    13900. 

  13900. +	shift shiftr keycode 41 = +y
    13901. 

  13901. +keycode 42 = six asciicircum
    13902. 

  13902. +	shiftr keycode 42 = asciicircum
    13903. 

  13903. +	shift shiftr keycode 42 = asciicircum
    13904. 

  13904. +	control keycode 42 = Control_asciicircum
    13905. 

  13905. +	alt keycode 42 = Meta_six
    13906. 

  13906. +keycode 43 = seven ampersand braceleft
    13907. 

  13907. +	shiftr keycode 43 = ampersand
    13908. 

  13908. +	shift shiftr keycode 43 = ampersand
    13909. 

  13909. +	control keycode 43 = Control_underscore
    13910. 

  13910. +	alt keycode 43 = Meta_seven
    13911. 

  13911. +keycode 44 = u
    13912. 

  13912. +	shiftr keycode 44 = +U
    13913. 

  13913. +	shift shiftr keycode 44 = +u
    13914. 

  13914. +keycode 45 = j
    13915. 

  13915. +	shiftr keycode 45 = +J
    13916. 

  13916. +	shift shiftr keycode 45 = +j
    13917. 

  13917. +keycode 46 = m
    13918. 

  13918. +	shiftr keycode 46 = +M
    13919. 

  13919. +	shift shiftr keycode 46 = +m
    13920. 

  13920. +keycode 47 = n
    13921. 

  13921. +	shiftr keycode 47 = +N
    13922. 

  13922. +	shift shiftr keycode 47 = +n
    13923. 

  13923. +
    13924. 

  13924. +# This is the "Backspace" key:
    13925. 

  13925. +keycode 49 = Delete Delete
    13926. 

  13926. +	shiftr keycode 49 = Delete
    13927. 

  13927. +	shift shiftr keycode 49 = Delete
    13928. 

  13928. +	control keycode 49 = BackSpace
    13929. 

  13929. +	alt keycode 49 = Meta_Delete
    13930. 

  13930. +keycode 50 = Num_Lock
    13931. 

  13931. +	shift keycode 50 = Bare_Num_Lock
    13932. 

  13932. +	shiftr keycode 50 = Bare_Num_Lock
    13933. 

  13933. +	shift shiftr keycode 50 = Bare_Num_Lock
    13934. 

  13934. +# This is the "Delete" key:
    13935. 

  13935. +keycode 51 = Remove
    13936. 

  13936. +	control alt keycode 51 = Boot
    13937. 

  13937. +
    13938. 

  13938. +keycode 53 = backslash bar
    13939. 

  13939. +	shiftr keycode 53 = bar
    13940. 

  13940. +	shift shiftr keycode 53 = bar
    13941. 

  13941. +	control keycode 53 = Control_backslash
    13942. 

  13942. +	alt keycode 53 = Meta_backslash
    13943. 

  13943. +keycode 54 = Return
    13944. 

  13944. +	alt keycode 54 = Meta_Control_m
    13945. 

  13945. +keycode 55 = space space           
    13946. 

  13946. +	shiftr keycode 55 = space
    13947. 

  13947. +	shift shiftr keycode 55 = space
    13948. 

  13948. +	control keycode 55 = nul
    13949. 

  13949. +	alt keycode 55 = Meta_space
    13950. 

  13950. +keycode 56 = g
    13951. 

  13951. +	shiftr keycode 56 = +G
    13952. 

  13952. +	shift shiftr keycode 56 = +g
    13953. 

  13953. +keycode 57 = t
    13954. 

  13954. +	shiftr keycode 57 = +T
    13955. 

  13955. +	shift shiftr keycode 57 = +t
    13956. 

  13956. +keycode 58 = five percent
    13957. 

  13957. +	shiftr keycode 58 = percent
    13958. 

  13958. +	shift shiftr keycode 58 = percent
    13959. 

  13959. +	control keycode 58 = Control_bracketright
    13960. 

  13960. +	alt keycode 58 = Meta_five
    13961. 

  13961. +keycode 59 = four dollar dollar
    13962. 

  13962. +	shiftr keycode 59 = dollar
    13963. 

  13963. +	shift shiftr keycode 59 = dollar
    13964. 

  13964. +	control keycode 59 = Control_backslash
    13965. 

  13965. +	alt keycode 59 = Meta_four
    13966. 

  13966. +keycode 60 = r
    13967. 

  13967. +	shiftr keycode 60 = +R
    13968. 

  13968. +	shift shiftr keycode 60 = +r
    13969. 

  13969. +keycode 61 = f
    13970. 

  13970. +	shiftr keycode 61 = +F
    13971. 

  13971. +	shift shiftr keycode 61 = +f
    13972. 

  13972. +	altgr keycode 61 = Hex_F
    13973. 

  13973. +keycode 62 = v
    13974. 

  13974. +	shiftr keycode 62 = +V
    13975. 

  13975. +	shift shiftr keycode 62 = +v
    13976. 

  13976. +keycode 63 = b
    13977. 

  13977. +	shiftr keycode 63 = +B
    13978. 

  13978. +	shift shiftr keycode 63 = +b
    13979. 

  13979. +	altgr keycode 63 = Hex_B
    13980. 

  13980. +
    13981. 

  13981. +keycode 67 = three numbersign
    13982. 

  13982. +	shiftr keycode 67 = numbersign
    13983. 

  13983. +	shift shiftr keycode 67 = numbersign
    13984. 

  13984. +	control keycode 67 = Escape
    13985. 

  13985. +	alt keycode 67 = Meta_three
    13986. 

  13986. +keycode 68 = e
    13987. 

  13987. +	shiftr keycode 68 = +E
    13988. 

  13988. +	shift shiftr keycode 68 = +e
    13989. 

  13989. +	altgr keycode 68 = Hex_E
    13990. 

  13990. +keycode 69 = d
    13991. 

  13991. +	shiftr keycode 69 = +D
    13992. 

  13992. +	shift shiftr keycode 69 = +d
    13993. 

  13993. +	altgr keycode 69 = Hex_D
    13994. 

  13994. +keycode 70 = c
    13995. 

  13995. +	shiftr keycode 70 = +C
    13996. 

  13996. +	shift shiftr keycode 70 = +c
    13997. 

  13997. +	altgr keycode 70 = Hex_C
    13998. 

  13998. +keycode 71 = Right Incr_Console
    13999. 

  13999. +	shiftr keycode 71 = Incr_Console
    14000. 

  14000. +	shift shiftr keycode 71 = Incr_Console
    14001. 

  14001. +	alt keycode 71 = End
    14002. 

  14002. +
    14003. 

  14003. +keycode 75 = two at at
    14004. 

  14004. +	shiftr keycode 75 = at
    14005. 

  14005. +	shift shiftr keycode 75 = at
    14006. 

  14006. +	control keycode 75 = nul
    14007. 

  14007. +	shift control keycode 75 = nul
    14008. 

  14008. +	shiftr control keycode 75 = nul
    14009. 

  14009. +	shift shiftr control keycode 75 = nul
    14010. 

  14010. +	alt keycode 75 = Meta_two
    14011. 

  14011. +keycode 76 = w
    14012. 

  14012. +	shiftr keycode 76 = +W
    14013. 

  14013. +	shift shiftr keycode 76 = +w
    14014. 

  14014. +keycode 77 = s
    14015. 

  14015. +	shiftr keycode 77 = +S
    14016. 

  14016. +	shift shiftr keycode 77 = +s
    14017. 

  14017. +keycode 78 = x
    14018. 

  14018. +	shiftr keycode 78 = +X
    14019. 

  14019. +	shift shiftr keycode 78 = +x
    14020. 

  14020. +keycode 79 = Down Scroll_Forward
    14021. 

  14021. +	shiftr keycode 79 = Scroll_Forward
    14022. 

  14022. +	shift shiftr keycode 79 = Scroll_Forward
    14023. 

  14023. +	alt keycode 79 = Next
    14024. 

  14024. +keycode 80 = Escape Escape
    14025. 

  14025. +	shiftr keycode 80 = Escape
    14026. 

  14026. +	shift shiftr keycode 80 = Escape
    14027. 

  14027. +	alt keycode 80 = Meta_Escape
    14028. 

  14028. +keycode 81 = Tab Tab             
    14029. 

  14029. +	shiftr keycode 81 = Tab
    14030. 

  14030. +	shift shiftr keycode 81 = Tab
    14031. 

  14031. +	alt keycode 81 = Meta_Tab
    14032. 

  14032. +keycode 82 = grave asciitilde
    14033. 

  14033. +	shiftr keycode 82 = asciitilde
    14034. 

  14034. +	shift shiftr keycode 82 = asciitilde
    14035. 

  14035. +	control keycode 82 = nul
    14036. 

  14036. +	alt keycode 82 = Meta_grave
    14037. 

  14037. +keycode 83 = one exclam
    14038. 

  14038. +	shiftr keycode 83 = exclam
    14039. 

  14039. +	shift shiftr keycode 83 = exclam
    14040. 

  14040. +	alt keycode 83 = Meta_one
    14041. 

  14041. +keycode 84 = q
    14042. 

  14042. +	shiftr keycode 84 = +Q
    14043. 

  14043. +	shift shiftr keycode 84 = +q
    14044. 

  14044. +keycode 85 = a
    14045. 

  14045. +	shiftr keycode 85 = +A
    14046. 

  14046. +	shift shiftr keycode 85 = +a
    14047. 

  14047. +	altgr keycode 85 = Hex_A
    14048. 

  14048. +keycode 86 = z
    14049. 

  14049. +	shiftr keycode 86 = +Z
    14050. 

  14050. +	shift shiftr keycode 86 = +z
    14051. 

  14051. +
    14052. 

  14052. +# This is the windows key:
    14053. 

  14053. +keycode 88 = Decr_Console
    14054. 

  14054. +keycode 89 = Shift
    14055. 

  14055. +keycode 90 = Control
    14056. 

  14056. +keycode 91 = Control
    14057. 

  14057. +keycode 92 = Alt
    14058. 

  14058. +keycode 93 = AltGr
    14059. 

  14059. +keycode 94 = ShiftR
    14060. 

  14060. +	shift keycode 94 = Caps_Lock
    14061. 

  14061. --- a/drivers/char/indydog.c
    14062. 

  14062. +++ b/drivers/char/indydog.c
    14063. 

  14063. @@ -1,5 +1,5 @@
    14064. 

  14064.  /*
    14065. 

  14065. - *	IndyDog	0.2	A Hardware Watchdog Device for SGI IP22
    14066. 

  14066. + *	IndyDog	0.3	A Hardware Watchdog Device for SGI IP22
    14067. 

  14067.   *
    14068. 

  14068.   *	(c) Copyright 2002 Guido Guenther <agx@sigxcpu.org>, All Rights Reserved.
    14069. 

  14069.   *
    14070. 

  14070. @@ -7,10 +7,10 @@
    14071. 

  14071.   *	modify it under the terms of the GNU General Public License
    14072. 

  14072.   *	as published by the Free Software Foundation; either version
    14073. 

  14073.   *	2 of the License, or (at your option) any later version.
    14074. 

  14074. - *	
    14075. 

  14075. + *
    14076. 

  14076.   *	based on softdog.c by Alan Cox <alan@redhat.com>
    14077. 

  14077.   */
    14078. 

  14078. - 
    14079. 

  14079. +
    14080. 

  14080.  #include <linux/module.h>
    14081. 

  14081.  #include <linux/config.h>
    14082. 

  14082.  #include <linux/types.h>
    14083. 

  14083. @@ -19,13 +19,12 @@
    14084. 

  14084.  #include <linux/mm.h>
    14085. 

  14085.  #include <linux/miscdevice.h>
    14086. 

  14086.  #include <linux/watchdog.h>
    14087. 

  14087. -#include <linux/smp_lock.h>
    14088. 

  14088.  #include <linux/init.h>
    14089. 

  14089.  #include <asm/uaccess.h>
    14090. 

  14090.  #include <asm/sgi/mc.h>
    14091. 

  14091.  
    14092. 

  14092. -static unsigned long indydog_alive;
    14093. 

  14093. -static int expect_close = 0;
    14094. 

  14094. +#define PFX "indydog: "
    14095. 

  14095. +static int indydog_alive;
    14096. 

  14096.  
    14097. 

  14097.  #ifdef CONFIG_WATCHDOG_NOWAYOUT
    14098. 

  14098.  static int nowayout = 1;
    14099. 

  14099. @@ -33,10 +32,30 @@ static int nowayout = 1;
    14100. 

  14100.  static int nowayout = 0;
    14101. 

  14101.  #endif
    14102. 

  14102.  
    14103. 

  14103. +#define WATCHDOG_TIMEOUT 30		/* 30 sec default timeout */
    14104. 

  14104. +
    14105. 

  14105.  MODULE_PARM(nowayout,"i");
    14106. 

  14106.  MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
    14107. 

  14107.  
    14108. 

  14108. -static inline void indydog_ping(void)
    14109. 

  14109. +static void indydog_start(void)
    14110. 

  14110. +{
    14111. 

  14111. +	u32 mc_ctrl0 = sgimc->cpuctrl0;
    14112. 

  14112. +
    14113. 

  14113. +	mc_ctrl0 = sgimc->cpuctrl0 | SGIMC_CCTRL0_WDOG;
    14114. 

  14114. +	sgimc->cpuctrl0 = mc_ctrl0;
    14115. 

  14115. +}
    14116. 

  14116. +
    14117. 

  14117. +static void indydog_stop(void)
    14118. 

  14118. +{
    14119. 

  14119. +	u32 mc_ctrl0 = sgimc->cpuctrl0;
    14120. 

  14120. +
    14121. 

  14121. +	mc_ctrl0 &= ~SGIMC_CCTRL0_WDOG;
    14122. 

  14122. +	sgimc->cpuctrl0 = mc_ctrl0;
    14123. 

  14123. +
    14124. 

  14124. +	printk(KERN_INFO PFX "Stopped watchdog timer.\n");
    14125. 

  14125. +}
    14126. 

  14126. +
    14127. 

  14127. +static void indydog_ping(void)
    14128. 

  14128.  {
    14129. 

  14129.  	sgimc->watchdogt = 0;
    14130. 

  14130.  }
    14131. 

  14131. @@ -46,18 +65,14 @@ static inline void indydog_ping(void)
    14132. 

  14132.   */
    14133. 

  14133.  static int indydog_open(struct inode *inode, struct file *file)
    14134. 

  14134.  {
    14135. 

  14135. -	u32 mc_ctrl0;
    14136. 

  14136. -	
    14137. 

  14137. -	if (test_and_set_bit(0,&indydog_alive))
    14138. 

  14138. +	if (indydog_alive)
    14139. 

  14139.  		return -EBUSY;
    14140. 

  14140.  
    14141. 

  14141. -	if (nowayout) {
    14142. 

  14142. +	if (nowayout)
    14143. 

  14143.  		MOD_INC_USE_COUNT;
    14144. 

  14144. -	}
    14145. 

  14145.  
    14146. 

  14146.  	/* Activate timer */
    14147. 

  14147. -	mc_ctrl0 = sgimc->cpuctrl0 | SGIMC_CCTRL0_WDOG;
    14148. 

  14148. -	sgimc->cpuctrl0 = mc_ctrl0;
    14149. 

  14149. +	indydog_start();
    14150. 

  14150.  	indydog_ping();
    14151. 

  14151.  			
    14152. 

  14152.  	indydog_alive = 1;
    14153. 

  14153. @@ -69,63 +84,48 @@ static int indydog_open(struct inode *in
    14154. 

  14154.  static int indydog_release(struct inode *inode, struct file *file)
    14155. 

  14155.  {
    14156. 

  14156.  	/* Shut off the timer.
    14157. 

  14157. -	 * Lock it in if it's a module and we set nowayout. */
    14158. 

  14158. -	lock_kernel();
    14159. 

  14159. -	if (expect_close) {
    14160. 

  14160. -		u32 mc_ctrl0 = sgimc->cpuctrl0;
    14161. 

  14161. +	 * Lock it in if it's a module and we defined ...NOWAYOUT */
    14162. 

  14162. +	if (!nowayout) {
    14163. 

  14163. +		u32 mc_ctrl0 = sgimc->cpuctrl0; 
    14164. 

  14164.  		mc_ctrl0 &= ~SGIMC_CCTRL0_WDOG;
    14165. 

  14165.  		sgimc->cpuctrl0 = mc_ctrl0;
    14166. 

  14166.  		printk(KERN_INFO "Stopped watchdog timer.\n");
    14167. 

  14167. -	} else
    14168. 

  14168. -		printk(KERN_CRIT "WDT device closed unexpectedly.  WDT will not stop!\n");
    14169. 

  14169. -	clear_bit(0, &indydog_alive);
    14170. 

  14170. -	unlock_kernel();
    14171. 

  14171. +	}
    14172. 

  14172. +	indydog_alive = 0;
    14173. 

  14173.  
    14174. 

  14174.  	return 0;
    14175. 

  14175.  }
    14176. 

  14176.  
    14177. 

  14177.  static ssize_t indydog_write(struct file *file, const char *data, size_t len, loff_t *ppos)
    14178. 

  14178.  {
    14179. 

  14179. -	/*  Can't seek (pwrite) on this device  */
    14180. 

  14180. +	/* Can't seek (pwrite) on this device */
    14181. 

  14181.  	if (ppos != &file->f_pos)
    14182. 

  14182.  		return -ESPIPE;
    14183. 

  14183.  
    14184. 

  14184. -	/*
    14185. 

  14185. -	 *	Refresh the timer.
    14186. 

  14186. -	 */
    14187. 

  14187. +	/* Refresh the timer. */
    14188. 

  14188.  	if (len) {
    14189. 

  14189. -		if (!nowayout) {
    14190. 

  14190. -			size_t i;
    14191. 

  14191. -
    14192. 

  14192. -			/* In case it was set long ago */
    14193. 

  14193. -			expect_close = 0;
    14194. 

  14194. - 
    14195. 

  14195. -			for (i = 0; i != len; i++) {
    14196. 

  14196. -				char c;
    14197. 

  14197. -				if (get_user(c, data + i))
    14198. 

  14198. -					return -EFAULT;
    14199. 

  14199. -				if (c == 'V')
    14200. 

  14200. -					expect_close = 1;
    14201. 

  14201. -			}
    14202. 

  14202. -		}
    14203. 

  14203.  		indydog_ping();
    14204. 

  14204. -		return 1;
    14205. 

  14205.  	}
    14206. 

  14206. -	return 0;
    14207. 

  14207. +	return len;
    14208. 

  14208.  }
    14209. 

  14209.  
    14210. 

  14210.  static int indydog_ioctl(struct inode *inode, struct file *file,
    14211. 

  14211.  	unsigned int cmd, unsigned long arg)
    14212. 

  14212.  {
    14213. 

  14213. +	int options, retval = -EINVAL;
    14214. 

  14214.  	static struct watchdog_info ident = {
    14215. 

  14215. -		options: WDIOF_MAGICCLOSE,
    14216. 

  14216. -		identity: "Hardware Watchdog for SGI IP22",
    14217. 

  14217. +		.options		= WDIOF_KEEPALIVEPING |
    14218. 

  14218. +					  WDIOF_MAGICCLOSE,
    14219. 

  14219. +		.firmware_version	= 0,
    14220. 

  14220. +		.identity		= "Hardware Watchdog for SGI IP22",
    14221. 

  14221.  	};
    14222. 

  14222. +
    14223. 

  14223.  	switch (cmd) {
    14224. 

  14224.  		default:
    14225. 

  14225.  			return -ENOIOCTLCMD;
    14226. 

  14226.  		case WDIOC_GETSUPPORT:
    14227. 

  14227. -			if(copy_to_user((struct watchdog_info *)arg, &ident, sizeof(ident)))
    14228. 

  14228. +			if (copy_to_user((struct watchdog_info *)arg,
    14229. 

  14229. +					 &ident, sizeof(ident)))
    14230. 

  14230.  				return -EFAULT;
    14231. 

  14231.  			return 0;
    14232. 

  14232.  		case WDIOC_GETSTATUS:
    14233. 

  14233. @@ -134,31 +134,53 @@ static int indydog_ioctl(struct inode *i
    14234. 

  14234.  		case WDIOC_KEEPALIVE:
    14235. 

  14235.  			indydog_ping();
    14236. 

  14236.  			return 0;
    14237. 

  14237. +		case WDIOC_GETTIMEOUT:
    14238. 

  14238. +			return put_user(WATCHDOG_TIMEOUT,(int *)arg);
    14239. 

  14239. +		case WDIOC_SETOPTIONS:
    14240. 

  14240. +		{
    14241. 

  14241. +			if (get_user(options, (int *)arg))
    14242. 

  14242. +				return -EFAULT;
    14243. 

  14243. +
    14244. 

  14244. +			if (options & WDIOS_DISABLECARD) {
    14245. 

  14245. +				indydog_stop();
    14246. 

  14246. +				retval = 0;
    14247. 

  14247. +			}
    14248. 

  14248. +
    14249. 

  14249. +			if (options & WDIOS_ENABLECARD) {
    14250. 

  14250. +				indydog_start();
    14251. 

  14251. +				retval = 0;
    14252. 

  14252. +			}
    14253. 

  14253. +
    14254. 

  14254. +			return retval;
    14255. 

  14255. +		}
    14256. 

  14256.  	}
    14257. 

  14257.  }
    14258. 

  14258.  
    14259. 

  14259.  static struct file_operations indydog_fops = {
    14260. 

  14260. -	owner:		THIS_MODULE,
    14261. 

  14261. -	write:		indydog_write,
    14262. 

  14262. -	ioctl:		indydog_ioctl,
    14263. 

  14263. -	open:		indydog_open,
    14264. 

  14264. -	release:	indydog_release,
    14265. 

  14265. +	.owner		= THIS_MODULE,
    14266. 

  14266. +	.write		= indydog_write,
    14267. 

  14267. +	.ioctl		= indydog_ioctl,
    14268. 

  14268. +	.open		= indydog_open,
    14269. 

  14269. +	.release	= indydog_release,
    14270. 

  14270.  };
    14271. 

  14271.  
    14272. 

  14272.  static struct miscdevice indydog_miscdev = {
    14273. 

  14273. -	minor:		WATCHDOG_MINOR,
    14274. 

  14274. -	name:		"watchdog",
    14275. 

  14275. -	fops:		&indydog_fops,
    14276. 

  14276. +	.minor		= WATCHDOG_MINOR,
    14277. 

  14277. +	.name		= "watchdog",
    14278. 

  14278. +	.fops		= &indydog_fops,
    14279. 

  14279.  };
    14280. 

  14280.  
    14281. 

  14281. -static const char banner[] __initdata = KERN_INFO "Hardware Watchdog Timer for SGI IP22: 0.2\n";
    14282. 

  14282. +static char banner[] __initdata =
    14283. 

  14283. +	KERN_INFO PFX "Hardware Watchdog Timer for SGI IP22: 0.3\n";
    14284. 

  14284.  
    14285. 

  14285.  static int __init watchdog_init(void)
    14286. 

  14286.  {
    14287. 

  14287.  	int ret = misc_register(&indydog_miscdev);
    14288. 

  14288. -
    14289. 

  14289. -	if (ret)
    14290. 

  14290. +	if (ret) {
    14291. 

  14291. +		printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
    14292. 

  14292. +			WATCHDOG_MINOR, ret);
    14293. 

  14293.  		return ret;
    14294. 

  14294. +	}
    14295. 

  14295.  
    14296. 

  14296.  	printk(banner);
    14297. 

  14297.  
    14298. 

  14298. @@ -172,4 +194,7 @@ static void __exit watchdog_exit(void)
    14299. 

  14299.  
    14300. 

  14300.  module_init(watchdog_init);
    14301. 

  14301.  module_exit(watchdog_exit);
    14302. 

  14302. +
    14303. 

  14303. +MODULE_AUTHOR("Guido Guenther <agx@sigxcpu.org>");
    14304. 

  14304. +MODULE_DESCRIPTION("Hardware Watchdog Device for SGI IP22");
    14305. 

  14305.  MODULE_LICENSE("GPL");
    14306. 

  14306. --- a/drivers/char/ip27-rtc.c
    14307. 

  14307. +++ b/drivers/char/ip27-rtc.c
    14308. 

  14308. @@ -44,6 +44,7 @@
    14309. 

  14309.  #include <asm/sn/klconfig.h>
    14310. 

  14310.  #include <asm/sn/sn0/ip27.h>
    14311. 

  14311.  #include <asm/sn/sn0/hub.h>
    14312. 

  14312. +#include <asm/sn/sn_private.h>
    14313. 

  14313.  
    14314. 

  14314.  static int rtc_ioctl(struct inode *inode, struct file *file,
    14315. 

  14315.  		     unsigned int cmd, unsigned long arg);
    14316. 

  14316. @@ -209,11 +210,8 @@ static struct miscdevice rtc_dev=
    14317. 

  14317.  
    14318. 

  14318.  static int __init rtc_init(void)
    14319. 

  14319.  {
    14320. 

  14320. -	nasid_t nid;
    14321. 

  14321. -
    14322. 

  14322. -	nid = get_nasid();
    14323. 

  14323.  	rtc = (struct m48t35_rtc *)
    14324. 

  14324. -	    (KL_CONFIG_CH_CONS_INFO(nid)->memory_base + IOC3_BYTEBUS_DEV0);
    14325. 

  14325. +	(KL_CONFIG_CH_CONS_INFO(master_nasid)->memory_base + IOC3_BYTEBUS_DEV0);
    14326. 

  14326.  
    14327. 

  14327.  	printk(KERN_INFO "Real Time Clock Driver v%s\n", RTC_VERSION);
    14328. 

  14328.  	if (misc_register(&rtc_dev)) {
    14329. 

  14329. @@ -325,3 +323,7 @@ static void get_rtc_time(struct rtc_time
    14330. 

  14330.  
    14331. 

  14331.  	rtc_tm->tm_mon--;
    14332. 

  14332.  }
    14333. 

  14333. +
    14334. 

  14334. +MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
    14335. 

  14335. +MODULE_DESCRIPTION("SGI IP27 M48T35 RTC driver");
    14336. 

  14336. +MODULE_LICENSE("GPL");
    14337. 

  14337. --- a/drivers/char/Makefile
    14338. 

  14338. +++ b/drivers/char/Makefile
    14339. 

  14339. @@ -48,7 +48,12 @@ ifeq ($(ARCH),mips)
    14340. 

  14340.      KEYBD    =
    14341. 

  14341.    endif
    14342. 

  14342.    ifeq ($(CONFIG_VR41XX_KIU),y)
    14343. 

  14343. -    KEYMAP   =
    14344. 

  14344. +    ifeq ($(CONFIG_IBM_WORKPAD),y)
    14345. 

  14345. +      KEYMAP = ibm_workpad_keymap.o
    14346. 

  14346. +    endif
    14347. 

  14347. +    ifeq ($(CONFIG_VICTOR_MPC30X),y)
    14348. 

  14348. +      KEYMAP = victor_mpc30x_keymap.o
    14349. 

  14349. +    endif
    14350. 

  14350.      KEYBD    = vr41xx_keyb.o
    14351. 

  14351.    endif
    14352. 

  14352.  endif
    14353. 

  14353. @@ -251,7 +256,6 @@ obj-$(CONFIG_MK712_MOUSE) += mk712.o
    14354. 

  14354.  obj-$(CONFIG_RTC) += rtc.o
    14355. 

  14355.  obj-$(CONFIG_GEN_RTC) += genrtc.o
    14356. 

  14356.  obj-$(CONFIG_EFI_RTC) += efirtc.o
    14357. 

  14357. -obj-$(CONFIG_SGI_DS1286) += ds1286.o
    14358. 

  14358.  obj-$(CONFIG_MIPS_RTC) += mips_rtc.o
    14359. 

  14359.  obj-$(CONFIG_SGI_IP27_RTC) += ip27-rtc.o
    14360. 

  14360.  ifeq ($(CONFIG_PPC),)
    14361. 

  14361. @@ -259,6 +263,7 @@ ifeq ($(CONFIG_PPC),)
    14362. 

  14362.  endif
    14363. 

  14363.  obj-$(CONFIG_TOSHIBA) += toshiba.o
    14364. 

  14364.  obj-$(CONFIG_I8K) += i8k.o
    14365. 

  14365. +obj-$(CONFIG_DS1286) += ds1286.o
    14366. 

  14366.  obj-$(CONFIG_DS1620) += ds1620.o
    14367. 

  14367.  obj-$(CONFIG_DS1742) += ds1742.o
    14368. 

  14368.  obj-$(CONFIG_INTEL_RNG) += i810_rng.o
    14369. 

  14369. @@ -270,6 +275,7 @@ obj-$(CONFIG_BRIQ_PANEL) += briq_panel.o
    14370. 

  14370.  
    14371. 

  14371.  obj-$(CONFIG_ITE_GPIO) += ite_gpio.o
    14372. 

  14372.  obj-$(CONFIG_AU1X00_GPIO) += au1000_gpio.o
    14373. 

  14373. +obj-$(CONFIG_AU1550_PSC_SPI) += au1550_psc_spi.o
    14374. 

  14374.  obj-$(CONFIG_AU1X00_USB_TTY) += au1000_usbtty.o
    14375. 

  14375.  obj-$(CONFIG_AU1X00_USB_RAW) += au1000_usbraw.o
    14376. 

  14376.  obj-$(CONFIG_COBALT_LCD) += lcd.o
    14377. 

  14377. @@ -357,3 +363,9 @@ defkeymap.c: defkeymap.map
    14378. 

  14378.  
    14379. 

  14379.  qtronixmap.c: qtronixmap.map
    14380. 

  14380.  	set -e ; loadkeys --mktable $< | sed -e 's/^static *//' > $@
    14381. 

  14381. +
    14382. 

  14382. +ibm_workpad_keymap.c: ibm_workpad_keymap.map
    14383. 

  14383. +	set -e ; loadkeys --mktable $< | sed -e 's/^static *//' > $@
    14384. 

  14384. +
    14385. 

  14385. +victor_mpc30x_keymap.c: victor_mpc30x_keymap.map
    14386. 

  14386. +	set -e ; loadkeys --mktable $< | sed -e 's/^static *//' > $@
    14387. 

  14387. --- a/drivers/char/mips_rtc.c
    14388. 

  14388. +++ b/drivers/char/mips_rtc.c
    14389. 

  14389. @@ -53,14 +53,6 @@
    14390. 

  14390.  #include <asm/io.h>
    14391. 

  14391.  #include <asm/uaccess.h>
    14392. 

  14392.  #include <asm/system.h>
    14393. 

  14393. -
    14394. 

  14394. -/*
    14395. 

  14395. - * Check machine
    14396. 

  14396. - */
    14397. 

  14397. -#if !defined(CONFIG_MIPS) || !defined(CONFIG_NEW_TIME_C)
    14398. 

  14398. -#error "This driver is for MIPS machines with CONFIG_NEW_TIME_C defined"
    14399. 

  14399. -#endif
    14400. 

  14400. -
    14401. 

  14401.  #include <asm/time.h>
    14402. 

  14402.  
    14403. 

  14403.  static unsigned long rtc_status = 0;	/* bitmapped status byte.       */
    14404. 

  14404. --- a/drivers/char/sb1250_duart.c
    14405. 

  14405. +++ b/drivers/char/sb1250_duart.c
    14406. 

  14406. @@ -328,10 +328,11 @@ static int duart_write(struct tty_struct
    14407. 

  14407.  		if (c <= 0) break;
    14408. 

  14408.  
    14409. 

  14409.  		if (from_user) {
    14410. 

  14410. +			spin_unlock_irqrestore(&us->outp_lock, flags);
    14411. 

  14411.  			if (copy_from_user(us->outp_buf + us->outp_tail, buf, c)) {
    14412. 

  14412. -				spin_unlock_irqrestore(&us->outp_lock, flags);
    14413. 

  14413.  				return -EFAULT;
    14414. 

  14414.  			}
    14415. 

  14415. +			spin_lock_irqsave(&us->outp_lock, flags);
    14416. 

  14416.  		} else {
    14417. 

  14417.  			memcpy(us->outp_buf + us->outp_tail, buf, c);
    14418. 

  14418.  		}
    14419. 

  14419. @@ -498,9 +499,31 @@ static void duart_set_termios(struct tty
    14420. 

  14420.  	duart_set_cflag(us->line, tty->termios->c_cflag);
    14421. 

  14421.  }
    14422. 

  14422.  
    14423. 

  14423. +static int get_serial_info(uart_state_t *us, struct serial_struct * retinfo) {
    14424. 

  14424. +
    14425. 

  14425. +	struct serial_struct tmp;
    14426. 

  14426. +
    14427. 

  14427. +	memset(&tmp, 0, sizeof(tmp));
    14428. 

  14428. +
    14429. 

  14429. +	tmp.type=PORT_SB1250;
    14430. 

  14430. +	tmp.line=us->line;
    14431. 

  14431. +	tmp.port=A_DUART_CHANREG(tmp.line,0);
    14432. 

  14432. +	tmp.irq=K_INT_UART_0 + tmp.line;
    14433. 

  14433. +	tmp.xmit_fifo_size=16; /* fixed by hw */
    14434. 

  14434. +	tmp.baud_base=5000000;
    14435. 

  14435. +	tmp.io_type=SERIAL_IO_MEM;
    14436. 

  14436. +
    14437. 

  14437. +	if (copy_to_user(retinfo,&tmp,sizeof(*retinfo)))
    14438. 

  14438. +		return -EFAULT;
    14439. 

  14439. +
    14440. 

  14440. +	return 0;
    14441. 

  14441. +}
    14442. 

  14442. +
    14443. 

  14443.  static int duart_ioctl(struct tty_struct *tty, struct file * file,
    14444. 

  14444.  		       unsigned int cmd, unsigned long arg)
    14445. 

  14445.  {
    14446. 

  14446. +	uart_state_t *us = (uart_state_t *) tty->driver_data;
    14447. 

  14447. +
    14448. 

  14448.  /*	if (serial_paranoia_check(info, tty->device, "rs_ioctl"))
    14449. 

  14449.  	return -ENODEV;*/
    14450. 

  14450.  	switch (cmd) {
    14451. 

  14451. @@ -517,7 +540,7 @@ static int duart_ioctl(struct tty_struct
    14452. 

  14452.  		printk("Ignoring TIOCMSET\n");
    14453. 

  14453.  		break;
    14454. 

  14454.  	case TIOCGSERIAL:
    14455. 

  14455. -		printk("Ignoring TIOCGSERIAL\n");
    14456. 

  14456. +		return get_serial_info(us,(struct serial_struct *) arg);
    14457. 

  14457.  		break;
    14458. 

  14458.  	case TIOCSSERIAL:
    14459. 

  14459.  		printk("Ignoring TIOCSSERIAL\n");
    14460. 

  14460. --- a/drivers/char/serial.c
    14461. 

  14461. +++ b/drivers/char/serial.c
    14462. 

  14462. @@ -62,6 +62,12 @@
    14463. 

  14463.   *        Robert Schwebel <robert@schwebel.de>,
    14464. 

  14464.   *        Juergen Beisert <jbeisert@eurodsn.de>,
    14465. 

  14465.   *        Theodore Ts'o <tytso@mit.edu>
    14466. 

  14466. + *
    14467. 

  14467. + * 10/00: Added suport for MIPS Atlas board.
    14468. 

  14468. + * 11/00: Hooks for serial kernel debug port support added.
    14469. 

  14469. + *        Kevin D. Kissell, kevink@mips.com and Carsten Langgaard,
    14470. 

  14470. + *        carstenl@mips.com
    14471. 

  14471. + *        Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
    14472. 

  14472.   */
    14473. 

  14473.  
    14474. 

  14474.  static char *serial_version = "5.05c";
    14475. 

  14475. @@ -413,6 +419,22 @@ static inline int serial_paranoia_check(
    14476. 

  14476.  	return 0;
    14477. 

  14477.  }
    14478. 

  14478.  
    14479. 

  14479. +#if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_SEAD)
    14480. 

  14480. +
    14481. 

  14481. +#include <asm/mips-boards/atlas.h>
    14482. 

  14482. +
    14483. 

  14483. +static _INLINE_ unsigned int serial_in(struct async_struct *info, int offset)
    14484. 

  14484. +{
    14485. 

  14485. +        return (*(volatile unsigned int *)(mips_io_port_base + ATLAS_UART_REGS_BASE + offset*8) & 0xff);
    14486. 

  14486. +}
    14487. 

  14487. +
    14488. 

  14488. +static _INLINE_ void serial_out(struct async_struct *info, int offset, int value)
    14489. 

  14489. +{
    14490. 

  14490. +        *(volatile unsigned int *)(mips_io_port_base + ATLAS_UART_REGS_BASE + offset*8) = value;
    14491. 

  14491. +}
    14492. 

  14492. +
    14493. 

  14493. +#else
    14494. 

  14494. +
    14495. 

  14495.  static _INLINE_ unsigned int serial_in(struct async_struct *info, int offset)
    14496. 

  14496.  {
    14497. 

  14497.  	switch (info->io_type) {
    14498. 

  14498. @@ -447,6 +469,8 @@ static _INLINE_ void serial_out(struct a
    14499. 

  14499.  		outb(value, info->port+offset);
    14500. 

  14500.  	}
    14501. 

  14501.  }
    14502. 

  14502. +#endif
    14503. 

  14503. +
    14504. 

  14504.  
    14505. 

  14505.  /*
    14506. 

  14506.   * We used to support using pause I/O for certain machines.  We
    14507. 

  14507. --- /dev/null
    14508. 

  14508. +++ b/drivers/char/victor_mpc30x_keymap.map
    14509. 

  14509. @@ -0,0 +1,102 @@
    14510. 

  14510. +# Victor Interlink MP-C303/304 keyboard keymap
    14511. 

  14511. +#
    14512. 

  14512. +# Copyright (C) 2003  Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
    14513. 

  14513. +#
    14514. 

  14514. +# This file is subject to the terms and conditions of the GNU General Public
    14515. 

  14515. +# License.  See the file "COPYING" in the main directory of this archive
    14516. 

  14516. +# for more details.
    14517. 

  14517. +keymaps 0-1,4-5,8-9,12
    14518. 

  14518. +alt_is_meta
    14519. 

  14519. +strings as usual
    14520. 

  14520. +compose as usual for "iso-8859-1"
    14521. 

  14521. +
    14522. 

  14522. +# First line
    14523. 

  14523. +keycode 89 = Escape
    14524. 

  14524. +keycode  9 = Delete
    14525. 

  14525. +
    14526. 

  14526. +# 2nd line
    14527. 

  14527. +keycode 73 = one              exclam
    14528. 

  14528. +keycode 18 = two              quotedbl
    14529. 

  14529. +keycode 92 = three            numbersign
    14530. 

  14530. +	control	keycode 92 = Escape
    14531. 

  14531. +keycode 53 = four             dollar
    14532. 

  14532. +	control	keycode 53 = Control_backslash
    14533. 

  14533. +keycode 21 = five             percent
    14534. 

  14534. +	control	keycode 21 = Control_bracketright
    14535. 

  14535. +keycode 50 = six              ampersand
    14536. 

  14536. +	control	keycode 50 = Control_underscore
    14537. 

  14537. +keycode 48 = seven            apostrophe
    14538. 

  14538. +keycode 51 = eight            parenleft
    14539. 

  14539. +keycode 16 = nine             parenright
    14540. 

  14540. +keycode 80 = zero             asciitilde
    14541. 

  14541. +	control	keycode 80 = nul
    14542. 

  14542. +keycode 49 = minus            equal
    14543. 

  14543. +keycode 30 = asciicircum      asciitilde
    14544. 

  14544. +	control	keycode 30 = Control_asciicircum
    14545. 

  14545. +keycode  5 = backslash        bar
    14546. 

  14546. +	control	keycode  5 = Control_backslash
    14547. 

  14547. +keycode 13 = BackSpace
    14548. 

  14548. +# 3rd line
    14549. 

  14549. +keycode 57 = Tab
    14550. 

  14550. +keycode 74 = q
    14551. 

  14551. +keycode 26 = w
    14552. 

  14552. +keycode 81 = e
    14553. 

  14553. +keycode 29 = r
    14554. 

  14554. +keycode 37 = t
    14555. 

  14555. +keycode 45 = y
    14556. 

  14556. +keycode 72 = u
    14557. 

  14557. +keycode 24 = i
    14558. 

  14558. +keycode 32 = o
    14559. 

  14559. +keycode 41 = p
    14560. 

  14560. +keycode  1 = at               grave
    14561. 

  14561. +	control	keycode  1 = nul
    14562. 

  14562. +keycode 54 = bracketleft      braceleft
    14563. 

  14563. +keycode 63 = Return
    14564. 

  14564. +	alt	keycode 63 = Meta_Control_m
    14565. 

  14565. +# 4th line
    14566. 

  14566. +keycode 23 = Caps_Lock
    14567. 

  14567. +keycode 34 = a
    14568. 

  14568. +keycode 66 = s
    14569. 

  14569. +keycode 52 = d
    14570. 

  14570. +keycode 20 = f
    14571. 

  14571. +keycode 84 = g
    14572. 

  14572. +keycode 67 = h
    14573. 

  14573. +keycode 64 = j
    14574. 

  14574. +keycode 17 = k
    14575. 

  14575. +keycode 83 = l
    14576. 

  14576. +keycode 22 = semicolon        plus
    14577. 

  14577. +keycode 61 = colon            asterisk
    14578. 

  14578. +	control keycode 61 = Control_g
    14579. 

  14579. +keycode 65 = bracketright     braceright
    14580. 

  14580. +	control	keycode 65 = Control_bracketright
    14581. 

  14581. +# 5th line
    14582. 

  14582. +keycode 91 = Shift
    14583. 

  14583. +keycode 76 = z
    14584. 

  14584. +keycode 68 = x
    14585. 

  14585. +keycode 28 = c
    14586. 

  14586. +keycode 36 = v
    14587. 

  14587. +keycode 44 = b
    14588. 

  14588. +keycode 19 = n
    14589. 

  14589. +keycode 27 = m
    14590. 

  14590. +keycode 35 = comma            less
    14591. 

  14591. +keycode  3 = period           greater
    14592. 

  14592. +	control	keycode  3 = Compose
    14593. 

  14593. +keycode 38 = slash            question
    14594. 

  14594. +	control	keycode 38 = Delete
    14595. 

  14595. +	shift	control	keycode 38 = Delete
    14596. 

  14596. +keycode  6 = backslash        underscore
    14597. 

  14597. +	control	keycode  6 = Control_backslash
    14598. 

  14598. +keycode 55 = Up
    14599. 

  14599. +	alt keycode 55 = PageUp
    14600. 

  14600. +keycode 14 = Shift
    14601. 

  14601. +# 6th line
    14602. 

  14602. +keycode 56 = Control
    14603. 

  14603. +keycode 42 = Alt
    14604. 

  14604. +keycode 33 = space
    14605. 

  14605. +	control	keycode 33 = nul
    14606. 

  14606. +keycode  7 = Left
    14607. 

  14607. +	alt keycode  7 = Home
    14608. 

  14608. +keycode 31 = Down
    14609. 

  14609. +	alt keycode 31 = PageDown
    14610. 

  14610. +keycode 47 = Right
    14611. 

  14611. +	alt keycode 47 = End
    14612. 

  14612. --- a/drivers/char/vr41xx_keyb.c
    14613. 

  14613. +++ b/drivers/char/vr41xx_keyb.c
    14614. 

  14614. @@ -308,7 +308,7 @@ void __devinit kbd_init_hw(void)
    14615. 

  14615.  			if (found != 0) {
    14616. 

  14616.  				kiu_base = VRC4173_KIU_OFFSET;
    14617. 

  14617.  				mkiuintreg = VRC4173_MKIUINTREG_OFFSET;
    14618. 

  14618. -				vrc4173_clock_supply(VRC4173_KIU_CLOCK);
    14619. 

  14619. +				vrc4173_supply_clock(VRC4173_KIU_CLOCK);
    14620. 

  14620.  			}
    14621. 

  14621.  		}
    14622. 

  14622.  #endif
    14623. 

  14623. @@ -325,7 +325,7 @@ void __devinit kbd_init_hw(void)
    14624. 

  14624.  
    14625. 

  14625.  	if (current_cpu_data.cputype == CPU_VR4111 ||
    14626. 

  14626.  	    current_cpu_data.cputype == CPU_VR4121)
    14627. 

  14627. -		vr41xx_clock_supply(KIU_CLOCK);
    14628. 

  14628. +		vr41xx_supply_clock(KIU_CLOCK);
    14629. 

  14629.  
    14630. 

  14630.  	kiu_writew(KIURST_KIURST, KIURST);
    14631. 

  14631.  
    14632. 

  14632. --- a/drivers/i2c/Config.in
    14633. 

  14633. +++ b/drivers/i2c/Config.in
    14634. 

  14634. @@ -57,6 +57,10 @@ if [ "$CONFIG_I2C" != "n" ]; then
    14635. 

  14635.     if [ "$CONFIG_SGI_IP22" = "y" ]; then
    14636. 

  14636.        dep_tristate 'I2C SGI interfaces' CONFIG_I2C_ALGO_SGI $CONFIG_I2C
    14637. 

  14637.     fi
    14638. 

  14638. +
    14639. 

  14639. +   if [ "$CONFIG_SOC_AU1550" = "y" -o "$CONFIG_SOC_AU1200" ]; then
    14640. 

  14640. +      dep_tristate 'Au1550/Au1200 SMBus interface' CONFIG_I2C_ALGO_AU1550 $CONFIG_I2C
    14641. 

  14641. +   fi
    14642. 

  14642.   
    14643. 

  14643.  # This is needed for automatic patch generation: sensors code starts here
    14644. 

  14644.  # This is needed for automatic patch generation: sensors code ends here
    14645. 

  14645. --- /dev/null
    14646. 

  14646. +++ b/drivers/i2c/i2c-algo-au1550.c
    14647. 

  14647. @@ -0,0 +1,340 @@
    14648. 

  14648. +/*
    14649. 

  14649. + * i2c-algo-au1550.c: SMBus (i2c) driver algorithms for Alchemy PSC interface
    14650. 

  14650. + * Copyright (C) 2004 Embedded Edge, LLC <dan@embeddededge.com>
    14651. 

  14651. + *
    14652. 

  14652. + * The documentation describes this as an SMBus controller, but it doesn't
    14653. 

  14653. + * understand any of the SMBus protocol in hardware.  It's really an I2C
    14654. 

  14654. + * controller that could emulate most of the SMBus in software.
    14655. 

  14655. + */
    14656. 

  14656. +
    14657. 

  14657. +#include <linux/kernel.h>
    14658. 

  14658. +#include <linux/module.h>
    14659. 

  14659. +#include <linux/init.h>
    14660. 

  14660. +#include <linux/errno.h>
    14661. 

  14661. +#include <linux/delay.h>
    14662. 

  14662. +
    14663. 

  14663. +#include <asm/au1000.h>
    14664. 

  14664. +#include <asm/au1xxx_psc.h>
    14665. 

  14665. +
    14666. 

  14666. +#include <linux/i2c.h>
    14667. 

  14667. +#include <linux/i2c-algo-au1550.h>
    14668. 

  14668. +
    14669. 

  14669. +static int
    14670. 

  14670. +wait_xfer_done(struct i2c_algo_au1550_data *adap)
    14671. 

  14671. +{
    14672. 

  14672. +	u32	stat;
    14673. 

  14673. +	int	i;
    14674. 

  14674. +	volatile psc_smb_t	*sp;
    14675. 

  14675. +
    14676. 

  14676. +	sp = (volatile psc_smb_t *)(adap->psc_base);
    14677. 

  14677. +
    14678. 

  14678. +	/* Wait for Tx FIFO Underflow.
    14679. 

  14679. +	*/
    14680. 

  14680. +	for (i = 0; i < adap->xfer_timeout; i++) {
    14681. 

  14681. +		stat = sp->psc_smbevnt;
    14682. 

  14682. +		au_sync();
    14683. 

  14683. +		if ((stat & PSC_SMBEVNT_TU) != 0) {
    14684. 

  14684. +			/* Clear it.  */
    14685. 

  14685. +			sp->psc_smbevnt = PSC_SMBEVNT_TU;
    14686. 

  14686. +			au_sync();
    14687. 

  14687. +			return 0;
    14688. 

  14688. +		}
    14689. 

  14689. +		udelay(1);
    14690. 

  14690. +	}
    14691. 

  14691. +
    14692. 

  14692. +	return -ETIMEDOUT;
    14693. 

  14693. +}
    14694. 

  14694. +
    14695. 

  14695. +static int
    14696. 

  14696. +wait_ack(struct i2c_algo_au1550_data *adap)
    14697. 

  14697. +{
    14698. 

  14698. +	u32	stat;
    14699. 

  14699. +	volatile psc_smb_t	*sp;
    14700. 

  14700. +
    14701. 

  14701. +	if (wait_xfer_done(adap))
    14702. 

  14702. +		return -ETIMEDOUT;
    14703. 

  14703. +
    14704. 

  14704. +	sp = (volatile psc_smb_t *)(adap->psc_base);
    14705. 

  14705. +
    14706. 

  14706. +	stat = sp->psc_smbevnt;
    14707. 

  14707. +	au_sync();
    14708. 

  14708. +
    14709. 

  14709. +	if ((stat & (PSC_SMBEVNT_DN | PSC_SMBEVNT_AN | PSC_SMBEVNT_AL)) != 0)
    14710. 

  14710. +		return -ETIMEDOUT;
    14711. 

  14711. +
    14712. 

  14712. +	return 0;
    14713. 

  14713. +}
    14714. 

  14714. +
    14715. 

  14715. +static int
    14716. 

  14716. +wait_master_done(struct i2c_algo_au1550_data *adap)
    14717. 

  14717. +{
    14718. 

  14718. +	u32	stat;
    14719. 

  14719. +	int	i;
    14720. 

  14720. +	volatile psc_smb_t	*sp;
    14721. 

  14721. +
    14722. 

  14722. +	sp = (volatile psc_smb_t *)(adap->psc_base);
    14723. 

  14723. +
    14724. 

  14724. +	/* Wait for Master Done.
    14725. 

  14725. +	*/
    14726. 

  14726. +	for (i = 0; i < adap->xfer_timeout; i++) {
    14727. 

  14727. +		stat = sp->psc_smbevnt;
    14728. 

  14728. +		au_sync();
    14729. 

  14729. +		if ((stat & PSC_SMBEVNT_MD) != 0)
    14730. 

  14730. +			return 0;
    14731. 

  14731. +		udelay(1);
    14732. 

  14732. +	}
    14733. 

  14733. +
    14734. 

  14734. +	return -ETIMEDOUT;
    14735. 

  14735. +}
    14736. 

  14736. +
    14737. 

  14737. +static int
    14738. 

  14738. +do_address(struct i2c_algo_au1550_data *adap, unsigned int addr, int rd)
    14739. 

  14739. +{
    14740. 

  14740. +	volatile psc_smb_t	*sp;
    14741. 

  14741. +	u32			stat;
    14742. 

  14742. +
    14743. 

  14743. +	sp = (volatile psc_smb_t *)(adap->psc_base);
    14744. 

  14744. +
    14745. 

  14745. +	/* Reset the FIFOs, clear events.
    14746. 

  14746. +	*/
    14747. 

  14747. +	sp->psc_smbpcr = PSC_SMBPCR_DC;
    14748. 

  14748. +	sp->psc_smbevnt = PSC_SMBEVNT_ALLCLR;
    14749. 

  14749. +	au_sync();
    14750. 

  14750. +	do {
    14751. 

  14751. +		stat = sp->psc_smbpcr;
    14752. 

  14752. +		au_sync();
    14753. 

  14753. +	} while ((stat & PSC_SMBPCR_DC) != 0);
    14754. 

  14754. +
    14755. 

  14755. +	/* Write out the i2c chip address and specify operation
    14756. 

  14756. +	*/
    14757. 

  14757. +	addr <<= 1;
    14758. 

  14758. +	if (rd)
    14759. 

  14759. +		addr |= 1;
    14760. 

  14760. +
    14761. 

  14761. +	/* Put byte into fifo, start up master.
    14762. 

  14762. +	*/
    14763. 

  14763. +	sp->psc_smbtxrx = addr;
    14764. 

  14764. +	au_sync();
    14765. 

  14765. +	sp->psc_smbpcr = PSC_SMBPCR_MS;
    14766. 

  14766. +	au_sync();
    14767. 

  14767. +	if (wait_ack(adap))
    14768. 

  14768. +		return -EIO;
    14769. 

  14769. +	return 0;
    14770. 

  14770. +}
    14771. 

  14771. +
    14772. 

  14772. +static u32
    14773. 

  14773. +wait_for_rx_byte(struct i2c_algo_au1550_data *adap, u32 *ret_data)
    14774. 

  14774. +{
    14775. 

  14775. +	int	j;
    14776. 

  14776. +	u32	data, stat;
    14777. 

  14777. +	volatile psc_smb_t	*sp;
    14778. 

  14778. +
    14779. 

  14779. +	if (wait_xfer_done(adap))
    14780. 

  14780. +		return -EIO;
    14781. 

  14781. +
    14782. 

  14782. +	sp = (volatile psc_smb_t *)(adap->psc_base);
    14783. 

  14783. +
    14784. 

  14784. +	j =  adap->xfer_timeout * 100;
    14785. 

  14785. +	do {
    14786. 

  14786. +		j--;
    14787. 

  14787. +		if (j <= 0)
    14788. 

  14788. +			return -EIO;
    14789. 

  14789. +
    14790. 

  14790. +		stat = sp->psc_smbstat;
    14791. 

  14791. +		au_sync();
    14792. 

  14792. +		if ((stat & PSC_SMBSTAT_RE) == 0)
    14793. 

  14793. +			j = 0;
    14794. 

  14794. +		else
    14795. 

  14795. +			udelay(1);
    14796. 

  14796. +	} while (j > 0);
    14797. 

  14797. +	data = sp->psc_smbtxrx;
    14798. 

  14798. +	au_sync();
    14799. 

  14799. +	*ret_data = data;
    14800. 

  14800. +
    14801. 

  14801. +	return 0;
    14802. 

  14802. +}
    14803. 

  14803. +
    14804. 

  14804. +static int
    14805. 

  14805. +i2c_read(struct i2c_algo_au1550_data *adap, unsigned char *buf,
    14806. 

  14806. +		    unsigned int len)
    14807. 

  14807. +{
    14808. 

  14808. +	int	i;
    14809. 

  14809. +	u32	data;
    14810. 

  14810. +	volatile psc_smb_t	*sp;
    14811. 

  14811. +
    14812. 

  14812. +	if (len == 0)
    14813. 

  14813. +		return 0;
    14814. 

  14814. +
    14815. 

  14815. +	/* A read is performed by stuffing the transmit fifo with
    14816. 

  14816. +	 * zero bytes for timing, waiting for bytes to appear in the
    14817. 

  14817. +	 * receive fifo, then reading the bytes.
    14818. 

  14818. +	 */
    14819. 

  14819. +
    14820. 

  14820. +	sp = (volatile psc_smb_t *)(adap->psc_base);
    14821. 

  14821. +
    14822. 

  14822. +	i = 0;
    14823. 

  14823. +	while (i < (len-1)) {
    14824. 

  14824. +		sp->psc_smbtxrx = 0;
    14825. 

  14825. +		au_sync();
    14826. 

  14826. +		if (wait_for_rx_byte(adap, &data))
    14827. 

  14827. +			return -EIO;
    14828. 

  14828. +
    14829. 

  14829. +		buf[i] = data;
    14830. 

  14830. +		i++;
    14831. 

  14831. +	}
    14832. 

  14832. +
    14833. 

  14833. +	/* The last byte has to indicate transfer done.
    14834. 

  14834. +	*/
    14835. 

  14835. +	sp->psc_smbtxrx = PSC_SMBTXRX_STP;
    14836. 

  14836. +	au_sync();
    14837. 

  14837. +	if (wait_master_done(adap))
    14838. 

  14838. +		return -EIO;
    14839. 

  14839. +
    14840. 

  14840. +	data = sp->psc_smbtxrx;
    14841. 

  14841. +	au_sync();
    14842. 

  14842. +	buf[i] = data;
    14843. 

  14843. +	return 0;
    14844. 

  14844. +}
    14845. 

  14845. +
    14846. 

  14846. +static int
    14847. 

  14847. +i2c_write(struct i2c_algo_au1550_data *adap, unsigned char *buf,
    14848. 

  14848. +		     unsigned int len)
    14849. 

  14849. +{
    14850. 

  14850. +	int	i;
    14851. 

  14851. +	u32	data;
    14852. 

  14852. +	volatile psc_smb_t	*sp;
    14853. 

  14853. +
    14854. 

  14854. +	if (len == 0)
    14855. 

  14855. +		return 0;
    14856. 

  14856. +
    14857. 

  14857. +	sp = (volatile psc_smb_t *)(adap->psc_base);
    14858. 

  14858. +
    14859. 

  14859. +	i = 0;
    14860. 

  14860. +	while (i < (len-1)) {
    14861. 

  14861. +		data = buf[i];
    14862. 

  14862. +		sp->psc_smbtxrx = data;
    14863. 

  14863. +		au_sync();
    14864. 

  14864. +		if (wait_ack(adap))
    14865. 

  14865. +			return -EIO;
    14866. 

  14866. +		i++;
    14867. 

  14867. +	}
    14868. 

  14868. +
    14869. 

  14869. +	/* The last byte has to indicate transfer done.
    14870. 

  14870. +	*/
    14871. 

  14871. +	data = buf[i];
    14872. 

  14872. +	data |= PSC_SMBTXRX_STP;
    14873. 

  14873. +	sp->psc_smbtxrx = data;
    14874. 

  14874. +	au_sync();
    14875. 

  14875. +	if (wait_master_done(adap))
    14876. 

  14876. +		return -EIO;
    14877. 

  14877. +	return 0;
    14878. 

  14878. +}
    14879. 

  14879. +
    14880. 

  14880. +static int
    14881. 

  14881. +au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[], int num)
    14882. 

  14882. +{
    14883. 

  14883. +	struct i2c_algo_au1550_data *adap = i2c_adap->algo_data;
    14884. 

  14884. +	struct i2c_msg *p;
    14885. 

  14885. +	int i, err = 0;
    14886. 

  14886. +
    14887. 

  14887. +	for (i = 0; !err && i < num; i++) {
    14888. 

  14888. +		p = &msgs[i];
    14889. 

  14889. +		err = do_address(adap, p->addr, p->flags & I2C_M_RD);
    14890. 

  14890. +		if (err || !p->len)
    14891. 

  14891. +			continue;
    14892. 

  14892. +		if (p->flags & I2C_M_RD)
    14893. 

  14893. +			err = i2c_read(adap, p->buf, p->len);
    14894. 

  14894. +		else
    14895. 

  14895. +			err = i2c_write(adap, p->buf, p->len);
    14896. 

  14896. +	}
    14897. 

  14897. +
    14898. 

  14898. +	/* Return the number of messages processed, or the error code.
    14899. 

  14899. +	*/
    14900. 

  14900. +	if (err == 0)
    14901. 

  14901. +		err = num;
    14902. 

  14902. +	return err;
    14903. 

  14903. +}
    14904. 

  14904. +
    14905. 

  14905. +static u32
    14906. 

  14906. +au1550_func(struct i2c_adapter *adap)
    14907. 

  14907. +{
    14908. 

  14908. +	return I2C_FUNC_I2C;
    14909. 

  14909. +}
    14910. 

  14910. +
    14911. 

  14911. +static struct i2c_algorithm au1550_algo = {
    14912. 

  14912. +	.name		= "Au1550 algorithm",
    14913. 

  14913. +	.id		= I2C_ALGO_AU1550,
    14914. 

  14914. +	.master_xfer	= au1550_xfer,
    14915. 

  14915. +	.functionality	= au1550_func,
    14916. 

  14916. +};
    14917. 

  14917. +
    14918. 

  14918. +/* 
    14919. 

  14919. + * registering functions to load algorithms at runtime 
    14920. 

  14920. + * Prior to calling us, the 50MHz clock frequency and routing
    14921. 

  14921. + * must have been set up for the PSC indicated by the adapter.
    14922. 

  14922. + */
    14923. 

  14923. +int
    14924. 

  14924. +i2c_au1550_add_bus(struct i2c_adapter *i2c_adap)
    14925. 

  14925. +{
    14926. 

  14926. +	struct i2c_algo_au1550_data *adap = i2c_adap->algo_data;
    14927. 

  14927. +	volatile psc_smb_t	*sp;
    14928. 

  14928. +	u32	stat;
    14929. 

  14929. +
    14930. 

  14930. +	i2c_adap->algo = &au1550_algo;
    14931. 

  14931. +
    14932. 

  14932. +	/* Now, set up the PSC for SMBus PIO mode.
    14933. 

  14933. +	*/
    14934. 

  14934. +	sp = (volatile psc_smb_t *)(adap->psc_base);
    14935. 

  14935. +	sp->psc_ctrl = PSC_CTRL_DISABLE;
    14936. 

  14936. +	au_sync();
    14937. 

  14937. +	sp->psc_sel = PSC_SEL_PS_SMBUSMODE;
    14938. 

  14938. +	sp->psc_smbcfg = 0;
    14939. 

  14939. +	au_sync();
    14940. 

  14940. +	sp->psc_ctrl = PSC_CTRL_ENABLE;
    14941. 

  14941. +	au_sync();
    14942. 

  14942. +	do {
    14943. 

  14943. +		stat = sp->psc_smbstat;
    14944. 

  14944. +		au_sync();
    14945. 

  14945. +	} while ((stat & PSC_SMBSTAT_SR) == 0);
    14946. 

  14946. +
    14947. 

  14947. +	sp->psc_smbcfg = (PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 |
    14948. 

  14948. +				PSC_SMBCFG_DD_DISABLE);
    14949. 

  14949. +
    14950. 

  14950. +	/* Divide by 8 to get a 6.25 MHz clock.  The later protocol
    14951. 

  14951. +	 * timings are based on this clock.
    14952. 

  14952. +	 */
    14953. 

  14953. +	sp->psc_smbcfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV2);
    14954. 

  14954. +	sp->psc_smbmsk = PSC_SMBMSK_ALLMASK;
    14955. 

  14955. +	au_sync();
    14956. 

  14956. +
    14957. 

  14957. +	/* Set the protocol timer values.  See Table 71 in the
    14958. 

  14958. +	 * Au1550 Data Book for standard timing values.
    14959. 

  14959. +	 */
    14960. 

  14960. +	sp->psc_smbtmr = PSC_SMBTMR_SET_TH(2) | PSC_SMBTMR_SET_PS(15) | \
    14961. 

  14961. +		PSC_SMBTMR_SET_PU(11) | PSC_SMBTMR_SET_SH(11) | \
    14962. 

  14962. +		PSC_SMBTMR_SET_SU(11) | PSC_SMBTMR_SET_CL(15) | \
    14963. 

  14963. +		PSC_SMBTMR_SET_CH(11);
    14964. 

  14964. +	au_sync();
    14965. 

  14965. +
    14966. 

  14966. +	sp->psc_smbcfg |= PSC_SMBCFG_DE_ENABLE;
    14967. 

  14967. +	do {
    14968. 

  14968. +		stat = sp->psc_smbstat;
    14969. 

  14969. +		au_sync();
    14970. 

  14970. +	} while ((stat & PSC_SMBSTAT_DR) == 0);
    14971. 

  14971. +
    14972. 

  14972. +	return i2c_add_adapter(i2c_adap);
    14973. 

  14973. +}
    14974. 

  14974. +
    14975. 

  14975. +
    14976. 

  14976. +int
    14977. 

  14977. +i2c_au1550_del_bus(struct i2c_adapter *adap)
    14978. 

  14978. +{
    14979. 

  14979. +	return i2c_del_adapter(adap);
    14980. 

  14980. +}
    14981. 

  14981. +
    14982. 

  14982. +EXPORT_SYMBOL(i2c_au1550_add_bus);
    14983. 

  14983. +EXPORT_SYMBOL(i2c_au1550_del_bus);
    14984. 

  14984. +
    14985. 

  14985. +MODULE_AUTHOR("Dan Malek <dan@embeddededge.com>");
    14986. 

  14986. +MODULE_DESCRIPTION("SMBus Au1550 algorithm");
    14987. 

  14987. +MODULE_LICENSE("GPL");
    14988. 

  14988. --- /dev/null
    14989. 

  14989. +++ b/drivers/i2c/i2c-au1550.c
    14990. 

  14990. @@ -0,0 +1,154 @@
    14991. 

  14991. +/*
    14992. 

  14992. + * i2c-au1550.c: SMBus (i2c) adapter for Alchemy PSC interface
    14993. 

  14993. + * Copyright (C) 2004 Embedded Edge, LLC <dan@embeddededge.com>
    14994. 

  14994. + *
    14995. 

  14995. + * This is just a skeleton adapter to use with the Au1550 PSC
    14996. 

  14996. + * algorithm.  It was developed for the Pb1550, but will work with
    14997. 

  14997. + * any Au1550 board that has a similar PSC configuration.
    14998. 

  14998. + *
    14999. 

  14999. + * This program is free software; you can redistribute it and/or
    15000. 

  15000. + * modify it under the terms of the GNU General Public License
    15001. 

  15001. + * as published by the Free Software Foundation; either version 2
    15002. 

  15002. + * of the License, or (at your option) any later version.
    15003. 

  15003. + *
    15004. 

  15004. + * This program is distributed in the hope that it will be useful,
    15005. 

  15005. + * but WITHOUT ANY WARRANTY; without even the implied warranty of
    15006. 

  15006. + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    15007. 

  15007. + * GNU General Public License for more details.
    15008. 

  15008. + * 
    15009. 

  15009. + * You should have received a copy of the GNU General Public License
    15010. 

  15010. + * along with this program; if not, write to the Free Software
    15011. 

  15011. + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
    15012. 

  15012. + */
    15013. 

  15013. +
    15014. 

  15014. +#include <linux/config.h>
    15015. 

  15015. +#include <linux/kernel.h>
    15016. 

  15016. +#include <linux/module.h>
    15017. 

  15017. +#include <linux/init.h>
    15018. 

  15018. +#include <linux/errno.h>
    15019. 

  15019. +
    15020. 

  15020. +#include <asm/au1000.h>
    15021. 

  15021. +#include <asm/au1xxx_psc.h>
    15022. 

  15022. +#if defined( CONFIG_MIPS_PB1550 )
    15023. 

  15023. +	#include <asm/pb1550.h>
    15024. 

  15024. +#endif
    15025. 

  15025. +#if defined( CONFIG_MIPS_PB1200 )
    15026. 

  15026. +	#include <asm/pb1200.h>
    15027. 

  15027. +#endif
    15028. 

  15028. +#if defined( CONFIG_MIPS_DB1200 )
    15029. 

  15029. +	#include <asm/db1200.h>
    15030. 

  15030. +#endif
    15031. 

  15031. +#if defined( CONFIG_MIPS_FICMMP )
    15032. 

  15032. +	#include <asm/ficmmp.h>
    15033. 

  15033. +#endif
    15034. 

  15034. +
    15035. 

  15035. +#include <linux/i2c.h>
    15036. 

  15036. +#include <linux/i2c-algo-au1550.h>
    15037. 

  15037. +
    15038. 

  15038. +
    15039. 

  15039. +
    15040. 

  15040. +static int
    15041. 

  15041. +pb1550_reg(struct i2c_client *client)
    15042. 

  15042. +{
    15043. 

  15043. +	return 0;
    15044. 

  15044. +}
    15045. 

  15045. +
    15046. 

  15046. +static int
    15047. 

  15047. +pb1550_unreg(struct i2c_client *client)
    15048. 

  15048. +{
    15049. 

  15049. +	return 0;
    15050. 

  15050. +}
    15051. 

  15051. +
    15052. 

  15052. +static void
    15053. 

  15053. +pb1550_inc_use(struct i2c_adapter *adap)
    15054. 

  15054. +{
    15055. 

  15055. +#ifdef MODULE
    15056. 

  15056. +	MOD_INC_USE_COUNT;
    15057. 

  15057. +#endif
    15058. 

  15058. +}
    15059. 

  15059. +
    15060. 

  15060. +static void
    15061. 

  15061. +pb1550_dec_use(struct i2c_adapter *adap)
    15062. 

  15062. +{
    15063. 

  15063. +#ifdef MODULE
    15064. 

  15064. +	MOD_DEC_USE_COUNT;
    15065. 

  15065. +#endif
    15066. 

  15066. +}
    15067. 

  15067. +
    15068. 

  15068. +static struct i2c_algo_au1550_data pb1550_i2c_info = {
    15069. 

  15069. +	SMBUS_PSC_BASE, 200, 200
    15070. 

  15070. +};
    15071. 

  15071. +
    15072. 

  15072. +static struct i2c_adapter pb1550_board_adapter = {
    15073. 

  15073. +	name:              "pb1550 adapter",
    15074. 

  15074. +	id:                I2C_HW_AU1550_PSC,
    15075. 

  15075. +	algo:              NULL,
    15076. 

  15076. +	algo_data:         &pb1550_i2c_info,
    15077. 

  15077. +	inc_use:           pb1550_inc_use,
    15078. 

  15078. +	dec_use:           pb1550_dec_use,
    15079. 

  15079. +	client_register:   pb1550_reg,
    15080. 

  15080. +	client_unregister: pb1550_unreg,
    15081. 

  15081. +	client_count:      0,
    15082. 

  15082. +};
    15083. 

  15083. +
    15084. 

  15084. +int __init
    15085. 

  15085. +i2c_pb1550_init(void)
    15086. 

  15086. +{
    15087. 

  15087. +	/* This is where we would set up a 50MHz clock source
    15088. 

  15088. +	 * and routing.  On the Pb1550, the SMBus is PSC2, which
    15089. 

  15089. +	 * uses a shared clock with USB.  This has been already
    15090. 

  15090. +	 * configured by Yamon as a 48MHz clock, close enough
    15091. 

  15091. +	 * for our work.
    15092. 

  15092. +	 */
    15093. 

  15093. +        if (i2c_au1550_add_bus(&pb1550_board_adapter) < 0)
    15094. 

  15094. +                return -ENODEV;
    15095. 

  15095. +
    15096. 

  15096. +	return 0;
    15097. 

  15097. +}
    15098. 

  15098. +
    15099. 

  15099. +/* BIG hack to support the control interface on the Wolfson WM8731
    15100. 

  15100. + * audio codec on the Pb1550 board.  We get an address and two data
    15101. 

  15101. + * bytes to write, create an i2c message, and send it across the
    15102. 

  15102. + * i2c transfer function.  We do this here because we have access to
    15103. 

  15103. + * the i2c adapter structure.
    15104. 

  15104. + */
    15105. 

  15105. +static struct i2c_msg wm_i2c_msg;  /* We don't want this stuff on the stack */
    15106. 

  15106. +static	u8 i2cbuf[2];
    15107. 

  15107. +
    15108. 

  15108. +int
    15109. 

  15109. +pb1550_wm_codec_write(u8 addr, u8 reg, u8 val)
    15110. 

  15110. +{
    15111. 

  15111. +	wm_i2c_msg.addr = addr;
    15112. 

  15112. +	wm_i2c_msg.flags = 0;
    15113. 

  15113. +	wm_i2c_msg.buf = i2cbuf;
    15114. 

  15114. +	wm_i2c_msg.len = 2;
    15115. 

  15115. +	i2cbuf[0] = reg;
    15116. 

  15116. +	i2cbuf[1] = val;
    15117. 

  15117. +
    15118. 

  15118. +	return pb1550_board_adapter.algo->master_xfer(&pb1550_board_adapter, &wm_i2c_msg, 1);
    15119. 

  15119. +}
    15120. 

  15120. +
    15121. 

  15121. +/* the next function is needed by DVB driver. */
    15122. 

  15122. +int pb1550_i2c_xfer(struct i2c_msg msgs[], int num)
    15123. 

  15123. +{
    15124. 

  15124. +    return pb1550_board_adapter.algo->master_xfer(&pb1550_board_adapter, msgs, num);
    15125. 

  15125. +}
    15126. 

  15126. +
    15127. 

  15127. +EXPORT_SYMBOL(pb1550_wm_codec_write);
    15128. 

  15128. +EXPORT_SYMBOL(pb1550_i2c_xfer);
    15129. 

  15129. +
    15130. 

  15130. +MODULE_AUTHOR("Dan Malek, Embedded Edge, LLC.");
    15131. 

  15131. +MODULE_DESCRIPTION("SMBus adapter Alchemy pb1550");
    15132. 

  15132. +MODULE_LICENSE("GPL");
    15133. 

  15133. +
    15134. 

  15134. +int
    15135. 

  15135. +init_module(void)
    15136. 

  15136. +{
    15137. 

  15137. +	return i2c_pb1550_init();
    15138. 

  15138. +}
    15139. 

  15139. +
    15140. 

  15140. +void
    15141. 

  15141. +cleanup_module(void)
    15142. 

  15142. +{
    15143. 

  15143. +	i2c_au1550_del_bus(&pb1550_board_adapter);
    15144. 

  15144. +}
    15145. 

  15145. --- a/drivers/i2c/i2c-core.c
    15146. 

  15146. +++ b/drivers/i2c/i2c-core.c
    15147. 

  15147. @@ -1277,6 +1277,9 @@ static int __init i2c_init(void)
    15148. 

  15148.  #ifdef CONFIG_I2C_MAX1617
    15149. 

  15149.  	extern int i2c_max1617_init(void);
    15150. 

  15150.  #endif
    15151. 

  15151. +#ifdef CONFIG_I2C_ALGO_AU1550
    15152. 

  15152. +	extern int i2c_pb1550_init(void);
    15153. 

  15153. +#endif
    15154. 

  15154.  
    15155. 

  15155.  #ifdef CONFIG_I2C_PROC
    15156. 

  15156.  	extern int sensors_init(void);
    15157. 

  15157. @@ -1332,6 +1335,10 @@ int __init i2c_init_all(void)
    15158. 

  15158.  	i2c_max1617_init();
    15159. 

  15159.  #endif
    15160. 

  15160.  
    15161. 

  15161. +#ifdef CONFIG_I2C_ALGO_AU1550
    15162. 

  15162. +	i2c_pb1550_init();
    15163. 

  15163. +#endif
    15164. 

  15164. +
    15165. 

  15165.  	/* -------------- proc interface ---- */
    15166. 

  15166.  #ifdef CONFIG_I2C_PROC
    15167. 

  15167.  	sensors_init();
    15168. 

  15168. --- a/drivers/i2c/Makefile
    15169. 

  15169. +++ b/drivers/i2c/Makefile
    15170. 

  15170. @@ -6,7 +6,7 @@ O_TARGET := i2c.o
    15171. 

  15171.  
    15172. 

  15172.  export-objs	:= i2c-core.o i2c-algo-bit.o i2c-algo-pcf.o \
    15173. 

  15173.  		   i2c-algo-ite.o i2c-algo-sibyte.o i2c-algo-sgi.o \
    15174. 

  15174. -		   i2c-proc.o
    15175. 

  15175. +		   i2c-algo-au1550.o i2c-proc.o i2c-au1550.o
    15176. 

  15176.  
    15177. 

  15177.  obj-$(CONFIG_I2C)		+= i2c-core.o
    15178. 

  15178.  obj-$(CONFIG_I2C_CHARDEV)	+= i2c-dev.o
    15179. 

  15179. @@ -25,6 +25,7 @@ obj-$(CONFIG_I2C_KEYWEST)	+= i2c-keywest
    15180. 

  15180.  obj-$(CONFIG_I2C_ALGO_SIBYTE)	+= i2c-algo-sibyte.o i2c-sibyte.o
    15181. 

  15181.  obj-$(CONFIG_I2C_MAX1617)	+= i2c-max1617.o
    15182. 

  15182.  obj-$(CONFIG_I2C_ALGO_SGI)	+= i2c-algo-sgi.o
    15183. 

  15183. +obj-$(CONFIG_I2C_ALGO_AU1550)	+= i2c-algo-au1550.o i2c-au1550.o
    15184. 

  15184.  
    15185. 

  15185.  # This is needed for automatic patch generation: sensors code starts here
    15186. 

  15186.  # This is needed for automatic patch generation: sensors code ends here
    15187. 

  15187. --- a/drivers/media/video/indycam.c
    15188. 

  15188. +++ b/drivers/media/video/indycam.c
    15189. 

  15189. @@ -50,13 +50,14 @@ static int indycam_attach(struct i2c_ada
    15190. 

  15190.  		0x80,			/* INDYCAM_GAMMA */
    15191. 

  15191.  	};
    15192. 

  15192.  
    15193. 

  15193. -	int err = 0;
    15194. 

  15194.  	struct indycam *camera;
    15195. 

  15195.  	struct i2c_client *client;
    15196. 

  15196. +	int err = 0;
    15197. 

  15197.  
    15198. 

  15198.  	client = kmalloc(sizeof(*client), GFP_KERNEL);
    15199. 

  15199. -	if (!client) 
    15200. 

  15200. +	if (!client)
    15201. 

  15201.  		return -ENOMEM;
    15202. 

  15202. +
    15203. 

  15203.  	camera = kmalloc(sizeof(*camera), GFP_KERNEL);
    15204. 

  15204.  	if (!camera) {
    15205. 

  15205.  		err = -ENOMEM;
    15206. 

  15206. @@ -67,7 +68,7 @@ static int indycam_attach(struct i2c_ada
    15207. 

  15207.  	client->adapter = adap;
    15208. 

  15208.  	client->addr = addr;
    15209. 

  15209.  	client->driver = &i2c_driver_indycam;
    15210. 

  15210. -	strcpy(client->name, "IndyCam client");			
    15211. 

  15211. +	strcpy(client->name, "IndyCam client");
    15212. 

  15212.  	camera->client = client;
    15213. 

  15213.  
    15214. 

  15214.  	err = i2c_attach_client(client);
    15215. 

  15215. @@ -75,18 +76,18 @@ static int indycam_attach(struct i2c_ada
    15216. 

  15216.  		goto out_free_camera;
    15217. 

  15217.  
    15218. 

  15218.  	camera->version = i2c_smbus_read_byte_data(client, INDYCAM_VERSION);
    15219. 

  15219. -	if (camera->version != CAMERA_VERSION_INDY &&
    15220. 

  15220. -	    camera->version != CAMERA_VERSION_MOOSE) {
    15221. 

  15221. +	if ((camera->version != CAMERA_VERSION_INDY) &&
    15222. 

  15222. +	    (camera->version != CAMERA_VERSION_MOOSE)) {
    15223. 

  15223.  		err = -ENODEV;
    15224. 

  15224.  		goto out_detach_client;
    15225. 

  15225.  	}
    15226. 

  15226. -	printk(KERN_INFO "Indycam v%d.%d detected.\n",
    15227. 

  15227. +	printk(KERN_INFO "IndyCam v%d.%d detected.\n",
    15228. 

  15228.  	       INDYCAM_VERSION_MAJOR(camera->version),
    15229. 

  15229.  	       INDYCAM_VERSION_MINOR(camera->version));
    15230. 

  15230.  
    15231. 

  15231.  	err = i2c_master_send(client, initseq, sizeof(initseq));
    15232. 

  15232.  	if (err)
    15233. 

  15233. -		printk(KERN_INFO "IndyCam initalization failed\n");
    15234. 

  15234. +		printk(KERN_ERR "IndyCam initalization failed.\n");
    15235. 

  15235.  
    15236. 

  15236.  	MOD_INC_USE_COUNT;
    15237. 

  15237.  	return 0;
    15238. 

  15238. --- a/drivers/media/video/vino.c
    15239. 

  15239. +++ b/drivers/media/video/vino.c
    15240. 

  15240. @@ -5,6 +5,8 @@
    15241. 

  15241.   * License version 2 as published by the Free Software Foundation.
    15242. 

  15242.   *
    15243. 

  15243.   * Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
    15244. 

  15244. + * Copyright (C) 2004 Mikael Nousiainen <tmnousia@cc.hut.fi>
    15245. 

  15245. + * 
    15246. 

  15246.   */
    15247. 

  15247.  
    15248. 

  15248.  #include <linux/module.h>
    15249. 

  15249. @@ -37,13 +39,23 @@
    15250. 

  15250.  #define DEBUG(x...)
    15251. 

  15251.  #endif
    15252. 

  15252.  
    15253. 

  15253. +/* Channels (who could have guessed) */
    15254. 

  15254. +#define VINO_CHAN_NONE		0
    15255. 

  15255. +#define VINO_CHAN_A		1
    15256. 

  15256. +#define VINO_CHAN_B		2
    15257. 

  15257. +
    15258. 

  15258.  /* VINO video size */
    15259. 

  15259.  #define VINO_PAL_WIDTH		768
    15260. 

  15260.  #define VINO_PAL_HEIGHT		576
    15261. 

  15261.  #define VINO_NTSC_WIDTH		646
    15262. 

  15262.  #define VINO_NTSC_HEIGHT	486
    15263. 

  15263.  
    15264. 

  15264. -/* set this to some sensible values. note: VINO_MIN_WIDTH has to be 8*x */
    15265. 

  15265. +/* Minimum value for Y-clipping (for smaller values the images
    15266. 

  15266. + * will be corrupted) */
    15267. 

  15267. +#define VINO_MIN_Y_CLIPPING	2
    15268. 

  15268. + 
    15269. 

  15269. +/* Set these to some sensible values.
    15270. 

  15270. + * Note: the picture width has to be divisible by 8 */
    15271. 

  15271.  #define VINO_MIN_WIDTH		32
    15272. 

  15272.  #define VINO_MIN_HEIGHT		32
    15273. 

  15273.  
    15274. 

  15274. @@ -64,9 +76,7 @@ static int threshold_b = 512;
    15275. 

  15275.  
    15276. 

  15276.  struct vino_device {
    15277. 

  15277.  	struct video_device vdev;
    15278. 

  15278. -#define VINO_CHAN_A	1
    15279. 

  15279. -#define VINO_CHAN_B	2
    15280. 

  15280. -	int chan;
    15281. 

  15281. +	int chan;	/* VINO_CHAN_NONE, VINO_CHAN_A or VINO_CHAN_B */
    15282. 

  15282.  	int alpha;
    15283. 

  15283.  	/* clipping... */
    15284. 

  15284.  	unsigned int left, right, top, bottom;
    15285. 

  15285. @@ -106,7 +116,7 @@ struct vino_device {
    15286. 

  15286.  
    15287. 

  15287.  struct vino_client {
    15288. 

  15288.  	struct i2c_client *driver;
    15289. 

  15289. -	int owner;
    15290. 

  15290. +	int owner;	/* VINO_CHAN_NONE, VINO_CHAN_A or VINO_CHAN_B */
    15291. 

  15291.  };
    15292. 

  15292.  
    15293. 

  15293.  struct vino_video {
    15294. 

  15294. @@ -362,6 +372,7 @@ static int set_scaling(struct vino_devic
    15295. 

  15295.  static int dma_setup(struct vino_device *v)
    15296. 

  15296.  {
    15297. 

  15297.  	u32 ctrl, intr;
    15298. 

  15298. +	int ofs;
    15299. 

  15299.  	struct sgi_vino_channel *ch;
    15300. 

  15300.  
    15301. 

  15301.  	ch = (v->chan == VINO_CHAN_A) ? &vino->a : &vino->b;
    15302. 

  15302. @@ -377,14 +388,24 @@ static int dma_setup(struct vino_device 
    15303. 

  15303.  	ch->line_size = v->line_size - 8;
    15304. 

  15304.  	/* set the alpha register */
    15305. 

  15305.  	ch->alpha = v->alpha;
    15306. 

  15306. -	/* set cliping registers */
    15307. 

  15307. -	ch->clip_start = VINO_CLIP_ODD(v->top) | VINO_CLIP_EVEN(v->top+1) |
    15308. 

  15308. +	/* Set the clipping registers, this is the constant source of fun :)
    15309. 

  15309. +	 * Y clipping start has to be >= 2 and end has to be start + height/2
    15310. 

  15310. +	 * The values of top and bottom are even so dividing is not a problem
    15311. 

  15311. +	 *
    15312. 

  15312. +	 * The docs say that clipping values for the even field should be
    15313. 

  15313. +	 * odd_end + something_to_skip_vertical_blanking + some_lines and
    15314. 

  15314. +	 * even_start + height/2, though the image is good this way also
    15315. 

  15315. +	 *
    15316. 

  15316. +	 * TODO: for analog sources (SAA7191), the clipping values are a bit
    15317. 

  15317. +	 * different and that case isn't yet handled
    15318. 

  15318. +	 */
    15319. 

  15319. +	ofs = VINO_MIN_Y_CLIPPING;	/* Should depend on input source */
    15320. 

  15320. +	ch->clip_start = VINO_CLIP_ODD(ofs + v->top / 2) |
    15321. 

  15321. +			 VINO_CLIP_EVEN(ofs + v->top / 2 + 1) |
    15322. 

  15322.  			 VINO_CLIP_X(v->left);
    15323. 

  15323. -	ch->clip_end = VINO_CLIP_ODD(v->bottom) | VINO_CLIP_EVEN(v->bottom+1) |
    15324. 

  15324. +	ch->clip_end = VINO_CLIP_ODD(ofs + v->bottom / 2 - 1) |
    15325. 

  15325. +		       VINO_CLIP_EVEN(ofs + v->bottom / 2) |
    15326. 

  15326.  		       VINO_CLIP_X(v->right);
    15327. 

  15327. -	/* FIXME: end-of-field bug workaround
    15328. 

  15328. -		       VINO_CLIP_X(VINO_PAL_WIDTH);
    15329. 

  15329. -	 */
    15330. 

  15330.  	/* init the frame rate and norm (full frame rate only for now...) */
    15331. 

  15331.  	ch->frame_rate = VINO_FRAMERT_RT(0x1fff) |
    15332. 

  15332.  			 (get_capture_norm(v) == VIDEO_MODE_PAL ?
    15333. 

  15333. @@ -510,6 +531,7 @@ static void field_done(struct vino_devic
    15334. 

  15334.  static void vino_interrupt(int irq, void *dev_id, struct pt_regs *regs)
    15335. 

  15335.  {
    15336. 

  15336.  	u32 intr, ctrl;
    15337. 

  15337. +	int a_eof, b_eof;
    15338. 

  15338.  
    15339. 

  15339.  	spin_lock(&Vino->vino_lock);
    15340. 

  15340.  	ctrl = vino->control;
    15341. 

  15341. @@ -525,12 +547,14 @@ static void vino_interrupt(int irq, void
    15342. 

  15342.  		vino->control = ctrl;
    15343. 

  15343.  		clear_eod(&Vino->chB);
    15344. 

  15344.  	}
    15345. 

  15345. +	a_eof = intr & VINO_INTSTAT_A_EOF;
    15346. 

  15346. +	b_eof = intr & VINO_INTSTAT_B_EOF;
    15347. 

  15347.  	vino->intr_status = ~intr;
    15348. 

  15348.  	spin_unlock(&Vino->vino_lock);
    15349. 

  15349. -	/* FIXME: For now we are assuming that interrupt means that frame is
    15350. 

  15350. -	 * done. That's not true, but we can live with such brokeness for
    15351. 

  15351. -	 * a while ;-) */
    15352. 

  15352. -	field_done(&Vino->chA);
    15353. 

  15353. +	if (a_eof)
    15354. 

  15354. +		field_done(&Vino->chA);
    15355. 

  15355. +	if (b_eof)
    15356. 

  15356. +		field_done(&Vino->chB);
    15357. 

  15357.  }
    15358. 

  15358.  
    15359. 

  15359.  static int vino_grab(struct vino_device *v, int frame)
    15360. 

  15360. --- a/drivers/mtd/devices/docprobe.c
    15361. 

  15361. +++ b/drivers/mtd/devices/docprobe.c
    15362. 

  15362. @@ -89,10 +89,10 @@ static unsigned long __initdata doc_loca
    15363. 

  15363.  	0xe4000000,
    15364. 

  15364.  #elif defined(CONFIG_MOMENCO_OCELOT)
    15365. 

  15365.  	0x2f000000,
    15366. 

  15366. -        0xff000000,
    15367. 

  15367. +	0xff000000,
    15368. 

  15368.  #elif defined(CONFIG_MOMENCO_OCELOT_G) || defined (CONFIG_MOMENCO_OCELOT_C)
    15369. 

  15369. -        0xff000000,
    15370. 

  15370. -##else
    15371. 

  15371. +	0xff000000,
    15372. 

  15372. +#else
    15373. 

  15373.  #warning Unknown architecture for DiskOnChip. No default probe locations defined
    15374. 

  15374.  #endif
    15375. 

  15375.  	0 };
    15376. 

  15376. --- a/drivers/mtd/devices/ms02-nv.c
    15377. 

  15377. +++ b/drivers/mtd/devices/ms02-nv.c
    15378. 

  15378. @@ -1,10 +1,10 @@
    15379. 

  15379.  /*
    15380. 

  15380. - *      Copyright (c) 2001 Maciej W. Rozycki
    15381. 

  15381. + *	Copyright (c) 2001 Maciej W. Rozycki
    15382. 

  15382.   *
    15383. 

  15383. - *      This program is free software; you can redistribute it and/or
    15384. 

  15384. - *      modify it under the terms of the GNU General Public License
    15385. 

  15385. - *      as published by the Free Software Foundation; either version
    15386. 

  15386. - *      2 of the License, or (at your option) any later version.
    15387. 

  15387. + *	This program is free software; you can redistribute it and/or
    15388. 

  15388. + *	modify it under the terms of the GNU General Public License
    15389. 

  15389. + *	as published by the Free Software Foundation; either version
    15390. 

  15390. + *	2 of the License, or (at your option) any later version.
    15391. 

  15391.   *
    15392. 

  15392.   *	$Id: ms02-nv.c,v 1.2 2003/01/24 14:05:17 dwmw2 Exp $
    15393. 

  15393.   */
    15394. 

  15394. @@ -29,18 +29,18 @@
    15395. 

  15395.  
    15396. 

  15396.  
    15397. 

  15397.  static char version[] __initdata =
    15398. 

  15398. -        "ms02-nv.c: v.1.0.0  13 Aug 2001  Maciej W. Rozycki.\n";
    15399. 

  15399. +	"ms02-nv.c: v.1.0.0  13 Aug 2001  Maciej W. Rozycki.\n";
    15400. 

  15400.  
    15401. 

  15401. -MODULE_AUTHOR("Maciej W. Rozycki <macro@ds2.pg.gda.pl>");
    15402. 

  15402. +MODULE_AUTHOR("Maciej W. Rozycki <macro@linux-mips.org>");
    15403. 

  15403.  MODULE_DESCRIPTION("DEC MS02-NV NVRAM module driver");
    15404. 

  15404.  MODULE_LICENSE("GPL");
    15405. 

  15405.  
    15406. 

  15406.  
    15407. 

  15407.  /*
    15408. 

  15408.   * Addresses we probe for an MS02-NV at.  Modules may be located
    15409. 

  15409. - * at any 8MB boundary within a 0MB up to 112MB range or at any 32MB
    15410. 

  15410. - * boundary within a 0MB up to 448MB range.  We don't support a module
    15411. 

  15411. - * at 0MB, though.
    15412. 

  15412. + * at any 8MiB boundary within a 0MiB up to 112MiB range or at any 32MiB
    15413. 

  15413. + * boundary within a 0MiB up to 448MiB range.  We don't support a module
    15414. 

  15414. + * at 0MiB, though.
    15415. 

  15415.   */
    15416. 

  15416.  static ulong ms02nv_addrs[] __initdata = {
    15417. 

  15417.  	0x07000000, 0x06800000, 0x06000000, 0x05800000, 0x05000000,
    15418. 

  15418. @@ -130,7 +130,7 @@ static int __init ms02nv_init_one(ulong 
    15419. 

  15419.  
    15420. 

  15420.  	int ret = -ENODEV;
    15421. 

  15421.  
    15422. 

  15422. -	/* The module decodes 8MB of address space. */
    15423. 

  15423. +	/* The module decodes 8MiB of address space. */
    15424. 

  15424.  	mod_res = kmalloc(sizeof(*mod_res), GFP_KERNEL);
    15425. 

  15425.  	if (!mod_res)
    15426. 

  15426.  		return -ENOMEM;
    15427. 

  15427. @@ -233,7 +233,7 @@ static int __init ms02nv_init_one(ulong 
    15428. 

  15428.  		goto err_out_csr_res;
    15429. 

  15429.  	}
    15430. 

  15430.  
    15431. 

  15431. -	printk(KERN_INFO "mtd%d: %s at 0x%08lx, size %uMB.\n",
    15432. 

  15432. +	printk(KERN_INFO "mtd%d: %s at 0x%08lx, size %uMiB.\n",
    15433. 

  15433.  		mtd->index, ms02nv_name, addr, size >> 20);
    15434. 

  15434.  
    15435. 

  15435.  	mp->next = root_ms02nv_mtd;
    15436. 

  15436. @@ -293,12 +293,12 @@ static int __init ms02nv_init(void)
    15437. 

  15437.  
    15438. 

  15438.  	switch (mips_machtype) {
    15439. 

  15439.  	case MACH_DS5000_200:
    15440. 

  15440. -		csr = (volatile u32 *)KN02_CSR_ADDR;
    15441. 

  15441. +		csr = (volatile u32 *)KN02_CSR_BASE;
    15442. 

  15442.  		if (*csr & KN02_CSR_BNK32M)
    15443. 

  15443.  			stride = 2;
    15444. 

  15444.  		break;
    15445. 

  15445.  	case MACH_DS5000_2X0:
    15446. 

  15446. -	case MACH_DS5000:
    15447. 

  15447. +	case MACH_DS5900:
    15448. 

  15448.  		csr = (volatile u32 *)KN03_MCR_BASE;
    15449. 

  15449.  		if (*csr & KN03_MCR_BNK32M)
    15450. 

  15450.  			stride = 2;
    15451. 

  15451. --- a/drivers/mtd/devices/ms02-nv.h
    15452. 

  15452. +++ b/drivers/mtd/devices/ms02-nv.h
    15453. 

  15453. @@ -1,32 +1,96 @@
    15454. 

  15454.  /*
    15455. 

  15455. - *      Copyright (c) 2001 Maciej W. Rozycki
    15456. 

  15456. + *	Copyright (c) 2001, 2003  Maciej W. Rozycki
    15457. 

  15457.   *
    15458. 

  15458. - *      This program is free software; you can redistribute it and/or
    15459. 

  15459. - *      modify it under the terms of the GNU General Public License
    15460. 

  15460. - *      as published by the Free Software Foundation; either version
    15461. 

  15461. - *      2 of the License, or (at your option) any later version.
    15462. 

  15462. + *	DEC MS02-NV (54-20948-01) battery backed-up NVRAM module for
    15463. 

  15463. + *	DECstation/DECsystem 5000/2x0 and DECsystem 5900 and 5900/260
    15464. 

  15464. + *	systems.
    15465. 

  15465. + *
    15466. 

  15466. + *	This program is free software; you can redistribute it and/or
    15467. 

  15467. + *	modify it under the terms of the GNU General Public License
    15468. 

  15468. + *	as published by the Free Software Foundation; either version
    15469. 

  15469. + *	2 of the License, or (at your option) any later version.
    15470. 

  15470. + *
    15471. 

  15471. + *	$Id: ms02-nv.h,v 1.3 2003/08/19 09:25:36 dwmw2 Exp $
    15472. 

  15472.   */
    15473. 

  15473.  
    15474. 

  15474.  #include <linux/ioport.h>
    15475. 

  15475.  #include <linux/mtd/mtd.h>
    15476. 

  15476.  
    15477. 

  15477. +/*
    15478. 

  15478. + * Addresses are decoded as follows:
    15479. 

  15479. + *
    15480. 

  15480. + * 0x000000 - 0x3fffff	SRAM
    15481. 

  15481. + * 0x400000 - 0x7fffff	CSR
    15482. 

  15482. + *
    15483. 

  15483. + * Within the SRAM area the following ranges are forced by the system
    15484. 

  15484. + * firmware:
    15485. 

  15485. + *
    15486. 

  15486. + * 0x000000 - 0x0003ff	diagnostic area, destroyed upon a reboot
    15487. 

  15487. + * 0x000400 - ENDofRAM	storage area, available to operating systems
    15488. 

  15488. + *
    15489. 

  15489. + * but we can't really use the available area right from 0x000400 as
    15490. 

  15490. + * the first word is used by the firmware as a status flag passed
    15491. 

  15491. + * from an operating system.  If anything but the valid data magic
    15492. 

  15492. + * ID value is found, the firmware considers the SRAM clean, i.e.
    15493. 

  15493. + * containing no valid data, and disables the battery resulting in
    15494. 

  15494. + * data being erased as soon as power is switched off.  So the choice
    15495. 

  15495. + * for the start address of the user-available is 0x001000 which is
    15496. 

  15496. + * nicely page aligned.  The area between 0x000404 and 0x000fff may
    15497. 

  15497. + * be used by the driver for own needs.
    15498. 

  15498. + *
    15499. 

  15499. + * The diagnostic area defines two status words to be read by an
    15500. 

  15500. + * operating system, a magic ID to distinguish a MS02-NV board from
    15501. 

  15501. + * anything else and a status information providing results of tests
    15502. 

  15502. + * as well as the size of SRAM available, which can be 1MiB or 2MiB
    15503. 

  15503. + * (that's what the firmware handles; no idea if 2MiB modules ever
    15504. 

  15504. + * existed).
    15505. 

  15505. + *
    15506. 

  15506. + * The firmware only handles the MS02-NV board if installed in the
    15507. 

  15507. + * last (15th) slot, so for any other location the status information
    15508. 

  15508. + * stored in the SRAM cannot be relied upon.  But from the hardware
    15509. 

  15509. + * point of view there is no problem using up to 14 such boards in a
    15510. 

  15510. + * system -- only the 1st slot needs to be filled with a DRAM module.
    15511. 

  15511. + * The MS02-NV board is ECC-protected, like other MS02 memory boards.
    15512. 

  15512. + *
    15513. 

  15513. + * The state of the battery as provided by the CSR is reflected on
    15514. 

  15514. + * the two onboard LEDs.  When facing the battery side of the board,
    15515. 

  15515. + * with the LEDs at the top left and the battery at the bottom right
    15516. 

  15516. + * (i.e. looking from the back side of the system box), their meaning
    15517. 

  15517. + * is as follows (the system has to be powered on):
    15518. 

  15518. + *
    15519. 

  15519. + * left LED		battery disable status: lit = enabled
    15520. 

  15520. + * right LED		battery condition status: lit = OK
    15521. 

  15521. + */
    15522. 

  15522. +
    15523. 

  15523.  /* MS02-NV iomem register offsets. */
    15524. 

  15524.  #define MS02NV_CSR		0x400000	/* control & status register */
    15525. 

  15525.  
    15526. 

  15526. +/* MS02-NV CSR status bits. */
    15527. 

  15527. +#define MS02NV_CSR_BATT_OK	0x01		/* battery OK */
    15528. 

  15528. +#define MS02NV_CSR_BATT_OFF	0x02		/* battery disabled */
    15529. 

  15529. +
    15530. 

  15530. +
    15531. 

  15531.  /* MS02-NV memory offsets. */
    15532. 

  15532.  #define MS02NV_DIAG		0x0003f8	/* diagnostic status */
    15533. 

  15533.  #define MS02NV_MAGIC		0x0003fc	/* MS02-NV magic ID */
    15534. 

  15534. -#define MS02NV_RAM		0x000400	/* general-purpose RAM start */
    15535. 

  15535. +#define MS02NV_VALID		0x000400	/* valid data magic ID */
    15536. 

  15536. +#define MS02NV_RAM		0x001000	/* user-exposed RAM start */
    15537. 

  15537.  
    15538. 

  15538. -/* MS02-NV diagnostic status constants. */
    15539. 

  15539. -#define MS02NV_DIAG_SIZE_MASK	0xf0		/* RAM size mask */
    15540. 

  15540. -#define MS02NV_DIAG_SIZE_SHIFT	0x10		/* RAM size shift (left) */
    15541. 

  15541. +/* MS02-NV diagnostic status bits. */
    15542. 

  15542. +#define MS02NV_DIAG_TEST	0x01		/* SRAM test done (?) */
    15543. 

  15543. +#define MS02NV_DIAG_RO		0x02		/* SRAM r/o test done */
    15544. 

  15544. +#define MS02NV_DIAG_RW		0x04		/* SRAM r/w test done */
    15545. 

  15545. +#define MS02NV_DIAG_FAIL	0x08		/* SRAM test failed */
    15546. 

  15546. +#define MS02NV_DIAG_SIZE_MASK	0xf0		/* SRAM size mask */
    15547. 

  15547. +#define MS02NV_DIAG_SIZE_SHIFT	0x10		/* SRAM size shift (left) */
    15548. 

  15548.  
    15549. 

  15549.  /* MS02-NV general constants. */
    15550. 

  15550.  #define MS02NV_ID		0x03021966	/* MS02-NV magic ID value */
    15551. 

  15551. +#define MS02NV_VALID_ID		0xbd100248	/* valid data magic ID value */
    15552. 

  15552.  #define MS02NV_SLOT_SIZE	0x800000	/* size of the address space
    15553. 

  15553.  						   decoded by the module */
    15554. 

  15554.  
    15555. 

  15555. +
    15556. 

  15556.  typedef volatile u32 ms02nv_uint;
    15557. 

  15557.  
    15558. 

  15558.  struct ms02nv_private {
    15559. 

  15559. --- a/drivers/mtd/maps/Config.in
    15560. 

  15560. +++ b/drivers/mtd/maps/Config.in
    15561. 

  15561. @@ -51,11 +51,26 @@ if [ "$CONFIG_MIPS" = "y" ]; then
    15562. 

  15562.     dep_tristate '  Pb1000 MTD support' CONFIG_MTD_PB1000 $CONFIG_MIPS_PB1000
    15563. 

  15563.     dep_tristate '  Pb1500 MTD support' CONFIG_MTD_PB1500 $CONFIG_MIPS_PB1500
    15564. 

  15564.     dep_tristate '  Pb1100 MTD support' CONFIG_MTD_PB1100 $CONFIG_MIPS_PB1100
    15565. 

  15565. +   dep_tristate '  Bosporus MTD support' CONFIG_MTD_BOSPORUS $CONFIG_MIPS_BOSPORUS
    15566. 

  15566. +   dep_tristate '  XXS1500 boot flash device' CONFIG_MTD_XXS1500 $CONFIG_MIPS_XXS1500
    15567. 

  15567. +   dep_tristate '  MTX-1 flash device' CONFIG_MTD_MTX1 $CONFIG_MIPS_MTX1
    15568. 

  15568.     if [ "$CONFIG_MTD_PB1500" = "y" -o "$CONFIG_MTD_PB1500" = "m" \
    15569. 

  15569.  	-o "$CONFIG_MTD_PB1100" = "y" -o "$CONFIG_MTD_PB1100" = "m" ]; then
    15570. 

  15570.        bool '  Pb[15]00 boot flash device' CONFIG_MTD_PB1500_BOOT 
    15571. 

  15571.        bool '  Pb[15]00 user flash device (2nd 32MiB bank)' CONFIG_MTD_PB1500_USER
    15572. 

  15572.     fi
    15573. 

  15573. +   tristate '  Db1x00 MTD support' CONFIG_MTD_DB1X00
    15574. 

  15574. +   if [ "$CONFIG_MTD_DB1X00" = "y" -o "$CONFIG_MTD_DB1X00" = "m" ]; then
    15575. 

  15575. +      bool '  Db1x00 boot flash device' CONFIG_MTD_DB1X00_BOOT 
    15576. 

  15576. +      bool '  Db1x00 user flash device (2nd bank)' CONFIG_MTD_DB1X00_USER
    15577. 

  15577. +   fi
    15578. 

  15578. +   tristate '  Pb1550 MTD support' CONFIG_MTD_PB1550
    15579. 

  15579. +   if [ "$CONFIG_MTD_PB1550" = "y" -o "$CONFIG_MTD_PB1550" = "m" ]; then
    15580. 

  15580. +      bool '  Pb1550 Boot Flash' CONFIG_MTD_PB1550_BOOT
    15581. 

  15581. +      bool '  Pb1550 User Parameter Flash' CONFIG_MTD_PB1550_USER
    15582. 

  15582. +   fi
    15583. 

  15583. +   dep_tristate '  Hydrogen 3 MTD support' CONFIG_MTD_HYDROGEN3 $CONFIG_MIPS_HYDROGEN3
    15584. 

  15584. +   dep_tristate '  Mirage MTD support' CONFIG_MTD_MIRAGE $CONFIG_MIPS_MIRAGE
    15585. 

  15585.     dep_tristate '  Flash chip mapping on ITE QED-4N-S01B, Globespan IVR or custom board' CONFIG_MTD_CSTM_MIPS_IXX $CONFIG_MTD_CFI $CONFIG_MTD_JEDEC $CONFIG_MTD_PARTITIONS 
    15586. 

  15586.     if [ "$CONFIG_MTD_CSTM_MIPS_IXX" = "y" -o "$CONFIG_MTD_CSTM_MIPS_IXX" = "m" ]; then
    15587. 

  15587.        hex '    Physical start address of flash mapping' CONFIG_MTD_CSTM_MIPS_IXX_START 0x8000000
    15588. 

  15588. --- /dev/null
    15589. 

  15589. +++ b/drivers/mtd/maps/db1x00-flash.c
    15590. 

  15590. @@ -0,0 +1,283 @@
    15591. 

  15591. +/*
    15592. 

  15592. + * Flash memory access on Alchemy Db1xxx boards
    15593. 

  15593. + * 
    15594. 

  15594. + * (C) 2003 Pete Popov <ppopov@pacbell.net>
    15595. 

  15595. + * 
    15596. 

  15596. + */
    15597. 

  15597. +
    15598. 

  15598. +#include <linux/config.h>
    15599. 

  15599. +#include <linux/module.h>
    15600. 

  15600. +#include <linux/types.h>
    15601. 

  15601. +#include <linux/kernel.h>
    15602. 

  15602. +
    15603. 

  15603. +#include <linux/mtd/mtd.h>
    15604. 

  15604. +#include <linux/mtd/map.h>
    15605. 

  15605. +#include <linux/mtd/partitions.h>
    15606. 

  15606. +
    15607. 

  15607. +#include <asm/io.h>
    15608. 

  15608. +#include <asm/au1000.h>
    15609. 

  15609. +#include <asm/db1x00.h>
    15610. 

  15610. +
    15611. 

  15611. +#ifdef 	DEBUG_RW
    15612. 

  15612. +#define	DBG(x...)	printk(x)
    15613. 

  15613. +#else
    15614. 

  15614. +#define	DBG(x...)	
    15615. 

  15615. +#endif
    15616. 

  15616. +
    15617. 

  15617. +static unsigned long window_addr;
    15618. 

  15618. +static unsigned long window_size;
    15619. 

  15619. +static unsigned long flash_size;
    15620. 

  15620. +
    15621. 

  15621. +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
    15622. 

  15622. +{
    15623. 

  15623. +	__u8 ret;
    15624. 

  15624. +	ret = __raw_readb(map->map_priv_1 + ofs);
    15625. 

  15625. +	DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
    15626. 

  15626. +	return ret;
    15627. 

  15627. +}
    15628. 

  15628. +
    15629. 

  15629. +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
    15630. 

  15630. +{
    15631. 

  15631. +	__u16 ret;
    15632. 

  15632. +	ret = __raw_readw(map->map_priv_1 + ofs);
    15633. 

  15633. +	DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
    15634. 

  15634. +	return ret;
    15635. 

  15635. +}
    15636. 

  15636. +
    15637. 

  15637. +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
    15638. 

  15638. +{
    15639. 

  15639. +	__u32 ret;
    15640. 

  15640. +	ret = __raw_readl(map->map_priv_1 + ofs);
    15641. 

  15641. +	DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
    15642. 

  15642. +	return ret;
    15643. 

  15643. +}
    15644. 

  15644. +
    15645. 

  15645. +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
    15646. 

  15646. +{
    15647. 

  15647. +	DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
    15648. 

  15648. +	memcpy_fromio(to, map->map_priv_1 + from, len);
    15649. 

  15649. +}
    15650. 

  15650. +
    15651. 

  15651. +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
    15652. 

  15652. +{
    15653. 

  15653. +	DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
    15654. 

  15654. +	__raw_writeb(d, map->map_priv_1 + adr);
    15655. 

  15655. +	mb();
    15656. 

  15656. +}
    15657. 

  15657. +
    15658. 

  15658. +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
    15659. 

  15659. +{
    15660. 

  15660. +	DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
    15661. 

  15661. +	__raw_writew(d, map->map_priv_1 + adr);
    15662. 

  15662. +	mb();
    15663. 

  15663. +}
    15664. 

  15664. +
    15665. 

  15665. +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
    15666. 

  15666. +{
    15667. 

  15667. +	DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
    15668. 

  15668. +	__raw_writel(d, map->map_priv_1 + adr);
    15669. 

  15669. +	mb();
    15670. 

  15670. +}
    15671. 

  15671. +
    15672. 

  15672. +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
    15673. 

  15673. +{
    15674. 

  15674. +	DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
    15675. 

  15675. +	memcpy_toio(map->map_priv_1 + to, from, len);
    15676. 

  15676. +}
    15677. 

  15677. +
    15678. 

  15678. +static struct map_info db1x00_map = {
    15679. 

  15679. +	name:		"Db1x00 flash",
    15680. 

  15680. +	read8: physmap_read8,
    15681. 

  15681. +	read16: physmap_read16,
    15682. 

  15682. +	read32: physmap_read32,
    15683. 

  15683. +	copy_from: physmap_copy_from,
    15684. 

  15684. +	write8: physmap_write8,
    15685. 

  15685. +	write16: physmap_write16,
    15686. 

  15686. +	write32: physmap_write32,
    15687. 

  15687. +	copy_to: physmap_copy_to,
    15688. 

  15688. +};
    15689. 

  15689. +
    15690. 

  15690. +static unsigned char flash_buswidth = 4;
    15691. 

  15691. +
    15692. 

  15692. +/* 
    15693. 

  15693. + * The Db1x boards support different flash densities. We setup
    15694. 

  15694. + * the mtd_partition structures below for default of 64Mbit 
    15695. 

  15695. + * flash densities, and override the partitions sizes, if
    15696. 

  15696. + * necessary, after we check the board status register.
    15697. 

  15697. + */
    15698. 

  15698. +
    15699. 

  15699. +#ifdef DB1X00_BOTH_BANKS
    15700. 

  15700. +/* both banks will be used. Combine the first bank and the first 
    15701. 

  15701. + * part of the second bank together into a single jffs/jffs2
    15702. 

  15702. + * partition.
    15703. 

  15703. + */
    15704. 

  15704. +static struct mtd_partition db1x00_partitions[] = {
    15705. 

  15705. +        {
    15706. 

  15706. +                name: "User FS",
    15707. 

  15707. +                size:   0x1c00000,
    15708. 

  15708. +                offset: 0x0000000
    15709. 

  15709. +        },{
    15710. 

  15710. +                name: "yamon",
    15711. 

  15711. +                size: 0x0100000,
    15712. 

  15712. +		offset:	MTDPART_OFS_APPEND,
    15713. 

  15713. +                mask_flags: MTD_WRITEABLE
    15714. 

  15714. +        },{
    15715. 

  15715. +                name: "raw kernel",
    15716. 

  15716. +		size: (0x300000-0x40000), /* last 256KB is yamon env */
    15717. 

  15717. +		offset:	MTDPART_OFS_APPEND,
    15718. 

  15718. +        }
    15719. 

  15719. +};
    15720. 

  15720. +#elif defined(DB1X00_BOOT_ONLY)
    15721. 

  15721. +static struct mtd_partition db1x00_partitions[] = {
    15722. 

  15722. +        {
    15723. 

  15723. +                name: "User FS",
    15724. 

  15724. +                size:   0x00c00000,
    15725. 

  15725. +                offset: 0x0000000
    15726. 

  15726. +        },{
    15727. 

  15727. +                name: "yamon",
    15728. 

  15728. +                size: 0x0100000,
    15729. 

  15729. +		offset:	MTDPART_OFS_APPEND,
    15730. 

  15730. +                mask_flags: MTD_WRITEABLE
    15731. 

  15731. +        },{
    15732. 

  15732. +                name: "raw kernel",
    15733. 

  15733. +		size: (0x300000-0x40000), /* last 256KB is yamon env */
    15734. 

  15734. +		offset:	MTDPART_OFS_APPEND,
    15735. 

  15735. +        }
    15736. 

  15736. +};
    15737. 

  15737. +#elif defined(DB1X00_USER_ONLY)
    15738. 

  15738. +static struct mtd_partition db1x00_partitions[] = {
    15739. 

  15739. +        {
    15740. 

  15740. +                name: "User FS",
    15741. 

  15741. +                size:   0x0e00000,
    15742. 

  15742. +                offset: 0x0000000
    15743. 

  15743. +        },{
    15744. 

  15744. +                name: "raw kernel",
    15745. 

  15745. +		size: MTDPART_SIZ_FULL,
    15746. 

  15746. +		offset:	MTDPART_OFS_APPEND,
    15747. 

  15747. +        }
    15748. 

  15748. +};
    15749. 

  15749. +#else
    15750. 

  15750. +#error MTD_DB1X00 define combo error /* should never happen */
    15751. 

  15751. +#endif
    15752. 

  15752. +
    15753. 

  15753. +
    15754. 

  15754. +#define NB_OF(x)  (sizeof(x)/sizeof(x[0]))
    15755. 

  15755. +
    15756. 

  15756. +static struct mtd_partition *parsed_parts;
    15757. 

  15757. +static struct mtd_info *mymtd;
    15758. 

  15758. +
    15759. 

  15759. +/*
    15760. 

  15760. + * Probe the flash density and setup window address and size
    15761. 

  15761. + * based on user CONFIG options. There are times when we don't
    15762. 

  15762. + * want the MTD driver to be probing the boot or user flash,
    15763. 

  15763. + * so having the option to enable only one bank is important.
    15764. 

  15764. + */
    15765. 

  15765. +int setup_flash_params()
    15766. 

  15766. +{
    15767. 

  15767. +	switch ((bcsr->status >> 14) & 0x3) {
    15768. 

  15768. +		case 0: /* 64Mbit devices */
    15769. 

  15769. +			flash_size = 0x800000; /* 8MB per part */
    15770. 

  15770. +#if defined(DB1X00_BOTH_BANKS)
    15771. 

  15771. +			window_addr = 0x1E000000;
    15772. 

  15772. +			window_size = 0x2000000; 
    15773. 

  15773. +#elif defined(DB1X00_BOOT_ONLY)
    15774. 

  15774. +			window_addr = 0x1F000000;
    15775. 

  15775. +			window_size = 0x1000000; 
    15776. 

  15776. +#else /* USER ONLY */
    15777. 

  15777. +			window_addr = 0x1E000000;
    15778. 

  15778. +			window_size = 0x1000000; 
    15779. 

  15779. +#endif
    15780. 

  15780. +			break;
    15781. 

  15781. +		case 1:
    15782. 

  15782. +			/* 128 Mbit devices */
    15783. 

  15783. +			flash_size = 0x1000000; /* 16MB per part */
    15784. 

  15784. +#if defined(DB1X00_BOTH_BANKS)
    15785. 

  15785. +			window_addr = 0x1C000000;
    15786. 

  15786. +			window_size = 0x4000000;
    15787. 

  15787. +			/* USERFS from 0x1C00 0000 to 0x1FC0 0000 */
    15788. 

  15788. +			db1x00_partitions[0].size = 0x3C00000;
    15789. 

  15789. +#elif defined(DB1X00_BOOT_ONLY)
    15790. 

  15790. +			window_addr = 0x1E000000;
    15791. 

  15791. +			window_size = 0x2000000;
    15792. 

  15792. +			/* USERFS from 0x1E00 0000 to 0x1FC0 0000 */
    15793. 

  15793. +			db1x00_partitions[0].size = 0x1C00000;
    15794. 

  15794. +#else /* USER ONLY */
    15795. 

  15795. +			window_addr = 0x1C000000;
    15796. 

  15796. +			window_size = 0x2000000;
    15797. 

  15797. +			/* USERFS from 0x1C00 0000 to 0x1DE00000 */
    15798. 

  15798. +			db1x00_partitions[0].size = 0x1DE0000;
    15799. 

  15799. +#endif
    15800. 

  15800. +			break;
    15801. 

  15801. +		case 2:
    15802. 

  15802. +			/* 256 Mbit devices */
    15803. 

  15803. +			flash_size = 0x4000000; /* 64MB per part */
    15804. 

  15804. +#if defined(DB1X00_BOTH_BANKS)
    15805. 

  15805. +			return 1;
    15806. 

  15806. +#elif defined(DB1X00_BOOT_ONLY)
    15807. 

  15807. +			/* Boot ROM flash bank only; no user bank */
    15808. 

  15808. +			window_addr = 0x1C000000;
    15809. 

  15809. +			window_size = 0x4000000;
    15810. 

  15810. +			/* USERFS from 0x1C00 0000 to 0x1FC00000 */
    15811. 

  15811. +			db1x00_partitions[0].size = 0x3C00000;
    15812. 

  15812. +#else /* USER ONLY */
    15813. 

  15813. +			return 1;
    15814. 

  15814. +#endif
    15815. 

  15815. +			break;
    15816. 

  15816. +		default:
    15817. 

  15817. +			return 1;
    15818. 

  15818. +	}
    15819. 

  15819. +	return 0;
    15820. 

  15820. +}
    15821. 

  15821. +
    15822. 

  15822. +int __init db1x00_mtd_init(void)
    15823. 

  15823. +{
    15824. 

  15824. +	struct mtd_partition *parts;
    15825. 

  15825. +	int nb_parts = 0;
    15826. 

  15826. +	char *part_type;
    15827. 

  15827. +	
    15828. 

  15828. +	/* Default flash buswidth */
    15829. 

  15829. +	db1x00_map.buswidth = flash_buswidth;
    15830. 

  15830. +
    15831. 

  15831. +	if (setup_flash_params()) 
    15832. 

  15832. +		return -ENXIO;
    15833. 

  15833. +
    15834. 

  15834. +	/*
    15835. 

  15835. +	 * Static partition definition selection
    15836. 

  15836. +	 */
    15837. 

  15837. +	part_type = "static";
    15838. 

  15838. +	parts = db1x00_partitions;
    15839. 

  15839. +	nb_parts = NB_OF(db1x00_partitions);
    15840. 

  15840. +	db1x00_map.size = window_size;
    15841. 

  15841. +
    15842. 

  15842. +	/*
    15843. 

  15843. +	 * Now let's probe for the actual flash.  Do it here since
    15844. 

  15844. +	 * specific machine settings might have been set above.
    15845. 

  15845. +	 */
    15846. 

  15846. +	printk(KERN_NOTICE "Db1xxx flash: probing %d-bit flash bus\n", 
    15847. 

  15847. +			db1x00_map.buswidth*8);
    15848. 

  15848. +	db1x00_map.map_priv_1 = 
    15849. 

  15849. +		(unsigned long)ioremap(window_addr, window_size);
    15850. 

  15850. +	mymtd = do_map_probe("cfi_probe", &db1x00_map);
    15851. 

  15851. +	if (!mymtd) return -ENXIO;
    15852. 

  15852. +	mymtd->module = THIS_MODULE;
    15853. 

  15853. +
    15854. 

  15854. +	add_mtd_partitions(mymtd, parts, nb_parts);
    15855. 

  15855. +	return 0;
    15856. 

  15856. +}
    15857. 

  15857. +
    15858. 

  15858. +static void __exit db1x00_mtd_cleanup(void)
    15859. 

  15859. +{
    15860. 

  15860. +	if (mymtd) {
    15861. 

  15861. +		del_mtd_partitions(mymtd);
    15862. 

  15862. +		map_destroy(mymtd);
    15863. 

  15863. +		if (parsed_parts)
    15864. 

  15864. +			kfree(parsed_parts);
    15865. 

  15865. +	}
    15866. 

  15866. +}
    15867. 

  15867. +
    15868. 

  15868. +module_init(db1x00_mtd_init);
    15869. 

  15869. +module_exit(db1x00_mtd_cleanup);
    15870. 

  15870. +
    15871. 

  15871. +MODULE_AUTHOR("Pete Popov");
    15872. 

  15872. +MODULE_DESCRIPTION("Db1x00 mtd map driver");
    15873. 

  15873. +MODULE_LICENSE("GPL");
    15874. 

  15874. --- /dev/null
    15875. 

  15875. +++ b/drivers/mtd/maps/hydrogen3-flash.c
    15876. 

  15876. @@ -0,0 +1,189 @@
    15877. 

  15877. +/*
    15878. 

  15878. + * Flash memory access on Alchemy HydrogenIII boards
    15879. 

  15879. + * 
    15880. 

  15880. + * (C) 2003 Pete Popov <ppopov@pacbell.net>
    15881. 

  15881. + * 
    15882. 

  15882. + */
    15883. 

  15883. +
    15884. 

  15884. +#include <linux/config.h>
    15885. 

  15885. +#include <linux/module.h>
    15886. 

  15886. +#include <linux/types.h>
    15887. 

  15887. +#include <linux/kernel.h>
    15888. 

  15888. +
    15889. 

  15889. +#include <linux/mtd/mtd.h>
    15890. 

  15890. +#include <linux/mtd/map.h>
    15891. 

  15891. +#include <linux/mtd/partitions.h>
    15892. 

  15892. +
    15893. 

  15893. +#include <asm/io.h>
    15894. 

  15894. +#include <asm/au1000.h>
    15895. 

  15895. +
    15896. 

  15896. +#ifdef 	DEBUG_RW
    15897. 

  15897. +#define	DBG(x...)	printk(x)
    15898. 

  15898. +#else
    15899. 

  15899. +#define	DBG(x...)	
    15900. 

  15900. +#endif
    15901. 

  15901. +
    15902. 

  15902. +#define WINDOW_ADDR 0x1E000000
    15903. 

  15903. +#define WINDOW_SIZE 0x02000000
    15904. 

  15904. +
    15905. 

  15905. +
    15906. 

  15906. +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
    15907. 

  15907. +{
    15908. 

  15908. +	__u8 ret;
    15909. 

  15909. +	ret = __raw_readb(map->map_priv_1 + ofs);
    15910. 

  15910. +	DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
    15911. 

  15911. +	return ret;
    15912. 

  15912. +}
    15913. 

  15913. +
    15914. 

  15914. +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
    15915. 

  15915. +{
    15916. 

  15916. +	__u16 ret;
    15917. 

  15917. +	ret = __raw_readw(map->map_priv_1 + ofs);
    15918. 

  15918. +	DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
    15919. 

  15919. +	return ret;
    15920. 

  15920. +}
    15921. 

  15921. +
    15922. 

  15922. +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
    15923. 

  15923. +{
    15924. 

  15924. +	__u32 ret;
    15925. 

  15925. +	ret = __raw_readl(map->map_priv_1 + ofs);
    15926. 

  15926. +	DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
    15927. 

  15927. +	return ret;
    15928. 

  15928. +}
    15929. 

  15929. +
    15930. 

  15930. +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
    15931. 

  15931. +{
    15932. 

  15932. +	DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
    15933. 

  15933. +	memcpy_fromio(to, map->map_priv_1 + from, len);
    15934. 

  15934. +}
    15935. 

  15935. +
    15936. 

  15936. +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
    15937. 

  15937. +{
    15938. 

  15938. +	DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
    15939. 

  15939. +	__raw_writeb(d, map->map_priv_1 + adr);
    15940. 

  15940. +	mb();
    15941. 

  15941. +}
    15942. 

  15942. +
    15943. 

  15943. +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
    15944. 

  15944. +{
    15945. 

  15945. +	DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
    15946. 

  15946. +	__raw_writew(d, map->map_priv_1 + adr);
    15947. 

  15947. +	mb();
    15948. 

  15948. +}
    15949. 

  15949. +
    15950. 

  15950. +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
    15951. 

  15951. +{
    15952. 

  15952. +	DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
    15953. 

  15953. +	__raw_writel(d, map->map_priv_1 + adr);
    15954. 

  15954. +	mb();
    15955. 

  15955. +}
    15956. 

  15956. +
    15957. 

  15957. +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
    15958. 

  15958. +{
    15959. 

  15959. +	DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
    15960. 

  15960. +	memcpy_toio(map->map_priv_1 + to, from, len);
    15961. 

  15961. +}
    15962. 

  15962. +
    15963. 

  15963. +static struct map_info hydrogen3_map = {
    15964. 

  15964. +	name:		"HydrogenIII flash",
    15965. 

  15965. +	read8: physmap_read8,
    15966. 

  15966. +	read16: physmap_read16,
    15967. 

  15967. +	read32: physmap_read32,
    15968. 

  15968. +	copy_from: physmap_copy_from,
    15969. 

  15969. +	write8: physmap_write8,
    15970. 

  15970. +	write16: physmap_write16,
    15971. 

  15971. +	write32: physmap_write32,
    15972. 

  15972. +	copy_to: physmap_copy_to,
    15973. 

  15973. +};
    15974. 

  15974. +
    15975. 

  15975. +static unsigned char flash_buswidth = 4;
    15976. 

  15976. +
    15977. 

  15977. +/* MTDPART_OFS_APPEND is vastly preferred to any attempt at statically lining
    15978. 

  15978. + * up the offsets. */
    15979. 

  15979. +static struct mtd_partition hydrogen3_partitions[] = {
    15980. 

  15980. +        {
    15981. 

  15981. +                name: "User FS",
    15982. 

  15982. +                size:   0x1c00000,
    15983. 

  15983. +                offset: 0x0000000
    15984. 

  15984. +        },{
    15985. 

  15985. +                name: "yamon",
    15986. 

  15986. +                size: 0x0100000,
    15987. 

  15987. +                offset: MTDPART_OFS_APPEND,
    15988. 

  15988. +                mask_flags: MTD_WRITEABLE
    15989. 

  15989. +        },{
    15990. 

  15990. +                name: "raw kernel",
    15991. 

  15991. +                size: 0x02c0000,
    15992. 

  15992. +                offset: MTDPART_OFS_APPEND
    15993. 

  15993. +        }
    15994. 

  15994. +};
    15995. 

  15995. +
    15996. 

  15996. +#define NB_OF(x)  (sizeof(x)/sizeof(x[0]))
    15997. 

  15997. +
    15998. 

  15998. +static struct mtd_partition *parsed_parts;
    15999. 

  15999. +static struct mtd_info *mymtd;
    16000. 

  16000. +
    16001. 

  16001. +int __init hydrogen3_mtd_init(void)
    16002. 

  16002. +{
    16003. 

  16003. +	struct mtd_partition *parts;
    16004. 

  16004. +	int nb_parts = 0;
    16005. 

  16005. +	char *part_type;
    16006. 

  16006. +	
    16007. 

  16007. +	/* Default flash buswidth */
    16008. 

  16008. +	hydrogen3_map.buswidth = flash_buswidth;
    16009. 

  16009. +
    16010. 

  16010. +	/*
    16011. 

  16011. +	 * Static partition definition selection
    16012. 

  16012. +	 */
    16013. 

  16013. +	part_type = "static";
    16014. 

  16014. +	parts = hydrogen3_partitions;
    16015. 

  16015. +	nb_parts = NB_OF(hydrogen3_partitions);
    16016. 

  16016. +	hydrogen3_map.size = WINDOW_SIZE;
    16017. 

  16017. +
    16018. 

  16018. +	/*
    16019. 

  16019. +	 * Now let's probe for the actual flash.  Do it here since
    16020. 

  16020. +	 * specific machine settings might have been set above.
    16021. 

  16021. +	 */
    16022. 

  16022. +	printk(KERN_NOTICE "HydrogenIII flash: probing %d-bit flash bus\n", 
    16023. 

  16023. +			hydrogen3_map.buswidth*8);
    16024. 

  16024. +	hydrogen3_map.map_priv_1 = 
    16025. 

  16025. +		(unsigned long)ioremap(WINDOW_ADDR, WINDOW_SIZE);
    16026. 

  16026. +	mymtd = do_map_probe("cfi_probe", &hydrogen3_map);
    16027. 

  16027. +	if (!mymtd) return -ENXIO;
    16028. 

  16028. +	mymtd->module = THIS_MODULE;
    16029. 

  16029. +
    16030. 

  16030. +	add_mtd_partitions(mymtd, parts, nb_parts);
    16031. 

  16031. +	return 0;
    16032. 

  16032. +}
    16033. 

  16033. +
    16034. 

  16034. +static void __exit hydrogen3_mtd_cleanup(void)
    16035. 

  16035. +{
    16036. 

  16036. +	if (mymtd) {
    16037. 

  16037. +		del_mtd_partitions(mymtd);
    16038. 

  16038. +		map_destroy(mymtd);
    16039. 

  16039. +		if (parsed_parts)
    16040. 

  16040. +			kfree(parsed_parts);
    16041. 

  16041. +	}
    16042. 

  16042. +}
    16043. 

  16043. +
    16044. 

  16044. +/*#ifndef MODULE
    16045. 

  16045. +
    16046. 

  16046. +static int __init _bootflashonly(char *str)
    16047. 

  16047. +{
    16048. 

  16048. +  bootflashonly = simple_strtol(str, NULL, 0);
    16049. 

  16049. +  return 1;
    16050. 

  16050. +}
    16051. 

  16051. +
    16052. 

  16052. +
    16053. 

  16053. +__setup("bootflashonly=", _bootflashonly);
    16054. 

  16054. +
    16055. 

  16055. +#endif*/
    16056. 

  16056. +
    16057. 

  16057. +
    16058. 

  16058. +module_init(hydrogen3_mtd_init);
    16059. 

  16059. +module_exit(hydrogen3_mtd_cleanup);
    16060. 

  16060. +
    16061. 

  16061. +MODULE_PARM(bootflashonly, "i");
    16062. 

  16062. +MODULE_PARM_DESC(bootflashonly, "1=use \"boot flash only\"");
    16063. 

  16063. +MODULE_AUTHOR("Pete Popov");
    16064. 

  16064. +MODULE_DESCRIPTION("HydrogenIII mtd map driver");
    16065. 

  16065. +MODULE_LICENSE("GPL");
    16066. 

  16066. --- a/drivers/mtd/maps/lasat.c
    16067. 

  16067. +++ b/drivers/mtd/maps/lasat.c
    16068. 

  16068. @@ -1,15 +1,6 @@
    16069. 

  16069.  /*
    16070. 

  16070.   * Flash device on lasat 100 and 200 boards
    16071. 

  16071.   *
    16072. 

  16072. - * Presumably (C) 2002 Brian Murphy <brian@murphy.dk> or whoever he
    16073. 

  16073. - * works for.
    16074. 

  16074. - *
    16075. 

  16075. - * This program is free software; you can redistribute it and/or
    16076. 

  16076. - * modify it under the terms of the GNU General Public License version
    16077. 

  16077. - * 2 as published by the Free Software Foundation.
    16078. 

  16078. - *
    16079. 

  16079. - * $Id: lasat.c,v 1.1 2003/01/24 14:26:38 dwmw2 Exp $
    16080. 

  16080. - *
    16081. 

  16081.   */
    16082. 

  16082.  
    16083. 

  16083.  #include <linux/module.h>
    16084. 

  16084. @@ -21,7 +12,6 @@
    16085. 

  16085.  #include <linux/mtd/partitions.h>
    16086. 

  16086.  #include <linux/config.h>
    16087. 

  16087.  #include <asm/lasat/lasat.h>
    16088. 

  16088. -#include <asm/lasat/lasat_mtd.h>
    16089. 

  16089.  
    16090. 

  16090.  static struct mtd_info *mymtd;
    16091. 

  16091.  
    16092. 

  16092. @@ -69,30 +59,33 @@ static void sp_copy_to(struct map_info *
    16093. 

  16093.  }
    16094. 

  16094.  
    16095. 

  16095.  static struct map_info sp_map = {
    16096. 

  16096. -	.name = "SP flash",
    16097. 

  16097. -	.buswidth = 4,
    16098. 

  16098. -	.read8 = sp_read8,
    16099. 

  16099. -	.read16 = sp_read16,
    16100. 

  16100. -	.read32 = sp_read32,
    16101. 

  16101. -	.copy_from = sp_copy_from,
    16102. 

  16102. -	.write8 = sp_write8,
    16103. 

  16103. -	.write16 = sp_write16,
    16104. 

  16104. -	.write32 = sp_write32,
    16105. 

  16105. -	.copy_to = sp_copy_to
    16106. 

  16106. +	name: "SP flash",
    16107. 

  16107. +	buswidth: 4,
    16108. 

  16108. +	read8: sp_read8,
    16109. 

  16109. +	read16: sp_read16,
    16110. 

  16110. +	read32: sp_read32,
    16111. 

  16111. +	copy_from: sp_copy_from,
    16112. 

  16112. +	write8: sp_write8,
    16113. 

  16113. +	write16: sp_write16,
    16114. 

  16114. +	write32: sp_write32,
    16115. 

  16115. +	copy_to: sp_copy_to
    16116. 

  16116.  };
    16117. 

  16117.  
    16118. 

  16118.  static struct mtd_partition partition_info[LASAT_MTD_LAST];
    16119. 

  16119. -static char *lasat_mtd_partnames[] = {"Bootloader", "Service", "Normal", "Filesystem", "Config"};
    16120. 

  16120. +static char *lasat_mtd_partnames[] = {"Bootloader", "Service", "Normal", "Config", "Filesystem"};
    16121. 

  16121.  
    16122. 

  16122.  static int __init init_sp(void)
    16123. 

  16123.  {
    16124. 

  16124.  	int i;
    16125. 

  16125. +	int nparts = 0;
    16126. 

  16126.  	/* this does not play well with the old flash code which 
    16127. 

  16127.  	 * protects and uprotects the flash when necessary */
    16128. 

  16128.         	printk(KERN_NOTICE "Unprotecting flash\n");
    16129. 

  16129.  	*lasat_misc->flash_wp_reg |= 1 << lasat_misc->flash_wp_bit;
    16130. 

  16130.  
    16131. 

  16131. -	sp_map.map_priv_1 = lasat_flash_partition_start(LASAT_MTD_BOOTLOADER);
    16132. 

  16132. +	sp_map.map_priv_1 = ioremap_nocache(
    16133. 

  16133. +		lasat_flash_partition_start(LASAT_MTD_BOOTLOADER),
    16134. 

  16134. +		lasat_board_info.li_flash_size);
    16135. 

  16135.  	sp_map.size = lasat_board_info.li_flash_size;
    16136. 

  16136.  
    16137. 

  16137.         	printk(KERN_NOTICE "sp flash device: %lx at %lx\n", 
    16138. 

  16138. @@ -109,12 +102,15 @@ static int __init init_sp(void)
    16139. 

  16139.  
    16140. 

  16140.  		for (i=0; i < LASAT_MTD_LAST; i++) {
    16141. 

  16141.  			size = lasat_flash_partition_size(i);
    16142. 

  16142. -			partition_info[i].size = size;
    16143. 

  16143. -			partition_info[i].offset = offset;
    16144. 

  16144. -			offset += size;
    16145. 

  16145. +			if (size != 0) {
    16146. 

  16146. +				nparts++;
    16147. 

  16147. +				partition_info[i].size = size;
    16148. 

  16148. +				partition_info[i].offset = offset;
    16149. 

  16149. +				offset += size;
    16150. 

  16150. +			}
    16151. 

  16151.  		}
    16152. 

  16152.  
    16153. 

  16153. -		add_mtd_partitions( mymtd, partition_info, LASAT_MTD_LAST );
    16154. 

  16154. +		add_mtd_partitions( mymtd, partition_info, nparts );
    16155. 

  16155.  		return 0;
    16156. 

  16156.  	}
    16157. 

  16157.  
    16158. 

  16158. @@ -124,11 +120,11 @@ static int __init init_sp(void)
    16159. 

  16159.  static void __exit cleanup_sp(void)
    16160. 

  16160.  {
    16161. 

  16161.  	if (mymtd) {
    16162. 

  16162. -		del_mtd_partitions(mymtd);
    16163. 

  16163. -		map_destroy(mymtd);
    16164. 

  16164. +	  del_mtd_partitions(mymtd);
    16165. 

  16165. +	  map_destroy(mymtd);
    16166. 

  16166.  	}
    16167. 

  16167.  	if (sp_map.map_priv_1) {
    16168. 

  16168. -		sp_map.map_priv_1 = 0;
    16169. 

  16169. +	  sp_map.map_priv_1 = 0;
    16170. 

  16170.  	}
    16171. 

  16171.  }
    16172. 

  16172.  
    16173. 

  16173. --- a/drivers/mtd/maps/Makefile
    16174. 

  16174. +++ b/drivers/mtd/maps/Makefile
    16175. 

  16175. @@ -52,7 +52,13 @@ obj-$(CONFIG_MTD_PCI)		+= pci.o
    16176. 

  16176.  obj-$(CONFIG_MTD_PB1000)	+= pb1xxx-flash.o
    16177. 

  16177.  obj-$(CONFIG_MTD_PB1100)	+= pb1xxx-flash.o
    16178. 

  16178.  obj-$(CONFIG_MTD_PB1500)	+= pb1xxx-flash.o
    16179. 

  16179. +obj-$(CONFIG_MTD_XXS1500)       += xxs1500.o
    16180. 

  16180. +obj-$(CONFIG_MTD_MTX1)		+= mtx-1.o
    16181. 

  16181.  obj-$(CONFIG_MTD_LASAT)		+= lasat.o
    16182. 

  16182. +obj-$(CONFIG_MTD_DB1X00)        += db1x00-flash.o
    16183. 

  16183. +obj-$(CONFIG_MTD_PB1550)        += pb1550-flash.o
    16184. 

  16184. +obj-$(CONFIG_MTD_HYDROGEN3)     += hydrogen3-flash.o
    16185. 

  16185. +obj-$(CONFIG_MTD_BOSPORUS)	+= pb1xxx-flash.o
    16186. 

  16186.  obj-$(CONFIG_MTD_AUTCPU12)	+= autcpu12-nvram.o
    16187. 

  16187.  obj-$(CONFIG_MTD_EDB7312)	+= edb7312.o
    16188. 

  16188.  obj-$(CONFIG_MTD_IMPA7)		+= impa7.o
    16189. 

  16189. @@ -61,5 +67,6 @@ obj-$(CONFIG_MTD_REDWOOD)	+= redwood.o
    16190. 

  16190.  obj-$(CONFIG_MTD_UCLINUX)	+= uclinux.o
    16191. 

  16191.  obj-$(CONFIG_MTD_NETtel)	+= nettel.o
    16192. 

  16192.  obj-$(CONFIG_MTD_SCB2_FLASH)	+= scb2_flash.o
    16193. 

  16193. +obj-$(CONFIG_MTD_MIRAGE)        += mirage-flash.o
    16194. 

  16194.  
    16195. 

  16195.  include $(TOPDIR)/Rules.make
    16196. 

  16196. --- /dev/null
    16197. 

  16197. +++ b/drivers/mtd/maps/mirage-flash.c
    16198. 

  16198. @@ -0,0 +1,194 @@
    16199. 

  16199. +/*
    16200. 

  16200. + * Flash memory access on AMD Mirage board.
    16201. 

  16201. + * 
    16202. 

  16202. + * (C) 2003 Embedded Edge
    16203. 

  16203. + * based on mirage-flash.c:
    16204. 

  16204. + * (C) 2003 Pete Popov <ppopov@pacbell.net>
    16205. 

  16205. + * 
    16206. 

  16206. + */
    16207. 

  16207. +
    16208. 

  16208. +#include <linux/config.h>
    16209. 

  16209. +#include <linux/module.h>
    16210. 

  16210. +#include <linux/types.h>
    16211. 

  16211. +#include <linux/kernel.h>
    16212. 

  16212. +
    16213. 

  16213. +#include <linux/mtd/mtd.h>
    16214. 

  16214. +#include <linux/mtd/map.h>
    16215. 

  16215. +#include <linux/mtd/partitions.h>
    16216. 

  16216. +
    16217. 

  16217. +#include <asm/io.h>
    16218. 

  16218. +#include <asm/au1000.h>
    16219. 

  16219. +//#include <asm/mirage.h>
    16220. 

  16220. +
    16221. 

  16221. +#ifdef 	DEBUG_RW
    16222. 

  16222. +#define	DBG(x...)	printk(x)
    16223. 

  16223. +#else
    16224. 

  16224. +#define	DBG(x...)	
    16225. 

  16225. +#endif
    16226. 

  16226. +
    16227. 

  16227. +static unsigned long window_addr;
    16228. 

  16228. +static unsigned long window_size;
    16229. 

  16229. +static unsigned long flash_size;
    16230. 

  16230. +
    16231. 

  16231. +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
    16232. 

  16232. +{
    16233. 

  16233. +	__u8 ret;
    16234. 

  16234. +	ret = __raw_readb(map->map_priv_1 + ofs);
    16235. 

  16235. +	DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
    16236. 

  16236. +	return ret;
    16237. 

  16237. +}
    16238. 

  16238. +
    16239. 

  16239. +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
    16240. 

  16240. +{
    16241. 

  16241. +	__u16 ret;
    16242. 

  16242. +	ret = __raw_readw(map->map_priv_1 + ofs);
    16243. 

  16243. +	DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
    16244. 

  16244. +	return ret;
    16245. 

  16245. +}
    16246. 

  16246. +
    16247. 

  16247. +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
    16248. 

  16248. +{
    16249. 

  16249. +	__u32 ret;
    16250. 

  16250. +	ret = __raw_readl(map->map_priv_1 + ofs);
    16251. 

  16251. +	DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
    16252. 

  16252. +	return ret;
    16253. 

  16253. +}
    16254. 

  16254. +
    16255. 

  16255. +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
    16256. 

  16256. +{
    16257. 

  16257. +	DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
    16258. 

  16258. +	memcpy_fromio(to, map->map_priv_1 + from, len);
    16259. 

  16259. +}
    16260. 

  16260. +
    16261. 

  16261. +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
    16262. 

  16262. +{
    16263. 

  16263. +	DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
    16264. 

  16264. +	__raw_writeb(d, map->map_priv_1 + adr);
    16265. 

  16265. +	mb();
    16266. 

  16266. +}
    16267. 

  16267. +
    16268. 

  16268. +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
    16269. 

  16269. +{
    16270. 

  16270. +	DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
    16271. 

  16271. +	__raw_writew(d, map->map_priv_1 + adr);
    16272. 

  16272. +	mb();
    16273. 

  16273. +}
    16274. 

  16274. +
    16275. 

  16275. +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
    16276. 

  16276. +{
    16277. 

  16277. +	DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
    16278. 

  16278. +	__raw_writel(d, map->map_priv_1 + adr);
    16279. 

  16279. +	mb();
    16280. 

  16280. +}
    16281. 

  16281. +
    16282. 

  16282. +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
    16283. 

  16283. +{
    16284. 

  16284. +	DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
    16285. 

  16285. +	memcpy_toio(map->map_priv_1 + to, from, len);
    16286. 

  16286. +}
    16287. 

  16287. +
    16288. 

  16288. +static struct map_info mirage_map = {
    16289. 

  16289. +	name:		"Mirage flash",
    16290. 

  16290. +	read8: physmap_read8,
    16291. 

  16291. +	read16: physmap_read16,
    16292. 

  16292. +	read32: physmap_read32,
    16293. 

  16293. +	copy_from: physmap_copy_from,
    16294. 

  16294. +	write8: physmap_write8,
    16295. 

  16295. +	write16: physmap_write16,
    16296. 

  16296. +	write32: physmap_write32,
    16297. 

  16297. +	copy_to: physmap_copy_to,
    16298. 

  16298. +};
    16299. 

  16299. +
    16300. 

  16300. +static unsigned char flash_buswidth = 4;
    16301. 

  16301. +
    16302. 

  16302. +static struct mtd_partition mirage_partitions[] = {
    16303. 

  16303. +        {
    16304. 

  16304. +                name: "User FS",
    16305. 

  16305. +                size:   0x1c00000,
    16306. 

  16306. +                offset: 0x0000000
    16307. 

  16307. +        },{
    16308. 

  16308. +                name: "yamon",
    16309. 

  16309. +                size: 0x0100000,
    16310. 

  16310. +		offset:	MTDPART_OFS_APPEND,
    16311. 

  16311. +                mask_flags: MTD_WRITEABLE
    16312. 

  16312. +        },{
    16313. 

  16313. +                name: "raw kernel",
    16314. 

  16314. +		size: (0x300000-0x40000), /* last 256KB is yamon env */
    16315. 

  16315. +		offset:	MTDPART_OFS_APPEND,
    16316. 

  16316. +        }
    16317. 

  16317. +};
    16318. 

  16318. +
    16319. 

  16319. +#define NB_OF(x)  (sizeof(x)/sizeof(x[0]))
    16320. 

  16320. +
    16321. 

  16321. +static struct mtd_partition *parsed_parts;
    16322. 

  16322. +static struct mtd_info *mymtd;
    16323. 

  16323. +
    16324. 

  16324. +/*
    16325. 

  16325. + * Probe the flash density and setup window address and size
    16326. 

  16326. + * based on user CONFIG options. There are times when we don't
    16327. 

  16327. + * want the MTD driver to be probing the boot or user flash,
    16328. 

  16328. + * so having the option to enable only one bank is important.
    16329. 

  16329. + */
    16330. 

  16330. +int setup_flash_params()
    16331. 

  16331. +{
    16332. 

  16332. +	flash_size = 0x4000000; /* 64MB per part */
    16333. 

  16333. +	/* Boot ROM flash bank only; no user bank */
    16334. 

  16334. +	window_addr = 0x1C000000;
    16335. 

  16335. +	window_size = 0x4000000;
    16336. 

  16336. +	/* USERFS from 0x1C00 0000 to 0x1FC00000 */
    16337. 

  16337. +	mirage_partitions[0].size = 0x3C00000;
    16338. 

  16338. +	return 0;
    16339. 

  16339. +}
    16340. 

  16340. +
    16341. 

  16341. +int __init mirage_mtd_init(void)
    16342. 

  16342. +{
    16343. 

  16343. +	struct mtd_partition *parts;
    16344. 

  16344. +	int nb_parts = 0;
    16345. 

  16345. +	char *part_type;
    16346. 

  16346. +	
    16347. 

  16347. +	/* Default flash buswidth */
    16348. 

  16348. +	mirage_map.buswidth = flash_buswidth;
    16349. 

  16349. +
    16350. 

  16350. +	if (setup_flash_params()) 
    16351. 

  16351. +		return -ENXIO;
    16352. 

  16352. +
    16353. 

  16353. +	/*
    16354. 

  16354. +	 * Static partition definition selection
    16355. 

  16355. +	 */
    16356. 

  16356. +	part_type = "static";
    16357. 

  16357. +	parts = mirage_partitions;
    16358. 

  16358. +	nb_parts = NB_OF(mirage_partitions);
    16359. 

  16359. +	mirage_map.size = window_size;
    16360. 

  16360. +
    16361. 

  16361. +	/*
    16362. 

  16362. +	 * Now let's probe for the actual flash.  Do it here since
    16363. 

  16363. +	 * specific machine settings might have been set above.
    16364. 

  16364. +	 */
    16365. 

  16365. +	printk(KERN_NOTICE "Mirage flash: probing %d-bit flash bus\n", 
    16366. 

  16366. +			mirage_map.buswidth*8);
    16367. 

  16367. +	mirage_map.map_priv_1 = 
    16368. 

  16368. +		(unsigned long)ioremap(window_addr, window_size);
    16369. 

  16369. +	mymtd = do_map_probe("cfi_probe", &mirage_map);
    16370. 

  16370. +	if (!mymtd) return -ENXIO;
    16371. 

  16371. +	mymtd->module = THIS_MODULE;
    16372. 

  16372. +
    16373. 

  16373. +	add_mtd_partitions(mymtd, parts, nb_parts);
    16374. 

  16374. +	return 0;
    16375. 

  16375. +}
    16376. 

  16376. +
    16377. 

  16377. +static void __exit mirage_mtd_cleanup(void)
    16378. 

  16378. +{
    16379. 

  16379. +	if (mymtd) {
    16380. 

  16380. +		del_mtd_partitions(mymtd);
    16381. 

  16381. +		map_destroy(mymtd);
    16382. 

  16382. +		if (parsed_parts)
    16383. 

  16383. +			kfree(parsed_parts);
    16384. 

  16384. +	}
    16385. 

  16385. +}
    16386. 

  16386. +
    16387. 

  16387. +module_init(mirage_mtd_init);
    16388. 

  16388. +module_exit(mirage_mtd_cleanup);
    16389. 

  16389. +
    16390. 

  16390. +MODULE_AUTHOR("Embedded Edge");
    16391. 

  16391. +MODULE_DESCRIPTION("Mirage mtd map driver");
    16392. 

  16392. +MODULE_LICENSE("GPL");
    16393. 

  16393. --- /dev/null
    16394. 

  16394. +++ b/drivers/mtd/maps/mtx-1.c
    16395. 

  16395. @@ -0,0 +1,181 @@
    16396. 

  16396. +/*
    16397. 

  16397. + * Flash memory access on 4G Systems MTX-1 board
    16398. 

  16398. + * 
    16399. 

  16399. + * (C) 2003 Pete Popov <ppopov@mvista.com>
    16400. 

  16400. + *	    Bruno Randolf <bruno.randolf@4g-systems.de>
    16401. 

  16401. + */
    16402. 

  16402. +
    16403. 

  16403. +#include <linux/config.h>
    16404. 

  16404. +#include <linux/module.h>
    16405. 

  16405. +#include <linux/types.h>
    16406. 

  16406. +#include <linux/kernel.h>
    16407. 

  16407. +
    16408. 

  16408. +#include <linux/mtd/mtd.h>
    16409. 

  16409. +#include <linux/mtd/map.h>
    16410. 

  16410. +#include <linux/mtd/partitions.h>
    16411. 

  16411. +
    16412. 

  16412. +#include <asm/io.h>
    16413. 

  16413. +#include <asm/au1000.h>
    16414. 

  16414. +
    16415. 

  16415. +#ifdef 	DEBUG_RW
    16416. 

  16416. +#define	DBG(x...)	printk(x)
    16417. 

  16417. +#else
    16418. 

  16418. +#define	DBG(x...)	
    16419. 

  16419. +#endif
    16420. 

  16420. +
    16421. 

  16421. +#ifdef CONFIG_MIPS_MTX1
    16422. 

  16422. +#define WINDOW_ADDR 0x1E000000
    16423. 

  16423. +#define WINDOW_SIZE 0x2000000
    16424. 

  16424. +#endif
    16425. 

  16425. +
    16426. 

  16426. +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
    16427. 

  16427. +{
    16428. 

  16428. +	__u8 ret;
    16429. 

  16429. +	ret = __raw_readb(map->map_priv_1 + ofs);
    16430. 

  16430. +	DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
    16431. 

  16431. +	return ret;
    16432. 

  16432. +}
    16433. 

  16433. +
    16434. 

  16434. +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
    16435. 

  16435. +{
    16436. 

  16436. +	__u16 ret;
    16437. 

  16437. +	ret = __raw_readw(map->map_priv_1 + ofs);
    16438. 

  16438. +	DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
    16439. 

  16439. +	return ret;
    16440. 

  16440. +}
    16441. 

  16441. +
    16442. 

  16442. +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
    16443. 

  16443. +{
    16444. 

  16444. +	__u32 ret;
    16445. 

  16445. +	ret = __raw_readl(map->map_priv_1 + ofs);
    16446. 

  16446. +	DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
    16447. 

  16447. +	return ret;
    16448. 

  16448. +}
    16449. 

  16449. +
    16450. 

  16450. +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
    16451. 

  16451. +{
    16452. 

  16452. +	DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
    16453. 

  16453. +	memcpy_fromio(to, map->map_priv_1 + from, len);
    16454. 

  16454. +}
    16455. 

  16455. +
    16456. 

  16456. +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
    16457. 

  16457. +{
    16458. 

  16458. +	DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
    16459. 

  16459. +	__raw_writeb(d, map->map_priv_1 + adr);
    16460. 

  16460. +	mb();
    16461. 

  16461. +}
    16462. 

  16462. +
    16463. 

  16463. +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
    16464. 

  16464. +{
    16465. 

  16465. +	DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
    16466. 

  16466. +	__raw_writew(d, map->map_priv_1 + adr);
    16467. 

  16467. +	mb();
    16468. 

  16468. +}
    16469. 

  16469. +
    16470. 

  16470. +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
    16471. 

  16471. +{
    16472. 

  16472. +	DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
    16473. 

  16473. +	__raw_writel(d, map->map_priv_1 + adr);
    16474. 

  16474. +	mb();
    16475. 

  16475. +}
    16476. 

  16476. +
    16477. 

  16477. +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
    16478. 

  16478. +{
    16479. 

  16479. +	DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
    16480. 

  16480. +	memcpy_toio(map->map_priv_1 + to, from, len);
    16481. 

  16481. +}
    16482. 

  16482. +
    16483. 

  16483. +
    16484. 

  16484. +
    16485. 

  16485. +static struct map_info mtx1_map = {
    16486. 

  16486. +	name:		"MTX-1 flash",
    16487. 

  16487. +	read8: physmap_read8,
    16488. 

  16488. +	read16: physmap_read16,
    16489. 

  16489. +	read32: physmap_read32,
    16490. 

  16490. +	copy_from: physmap_copy_from,
    16491. 

  16491. +	write8: physmap_write8,
    16492. 

  16492. +	write16: physmap_write16,
    16493. 

  16493. +	write32: physmap_write32,
    16494. 

  16494. +	copy_to: physmap_copy_to,
    16495. 

  16495. +};
    16496. 

  16496. +
    16497. 

  16497. +
    16498. 

  16498. +static unsigned long flash_size = 0x01000000;
    16499. 

  16499. +static unsigned char flash_buswidth = 4;
    16500. 

  16500. +static struct mtd_partition mtx1_partitions[] = {
    16501. 

  16501. +        {
    16502. 

  16502. +                name: "user fs",
    16503. 

  16503. +                size: 0x1c00000,
    16504. 

  16504. +                offset: 0,
    16505. 

  16505. +        },{
    16506. 

  16506. +                name: "yamon",
    16507. 

  16507. +                size: 0x0100000,
    16508. 

  16508. +                offset: MTDPART_OFS_APPEND,
    16509. 

  16509. +                mask_flags: MTD_WRITEABLE
    16510. 

  16510. +        },{
    16511. 

  16511. +                name: "raw kernel",
    16512. 

  16512. +                size: 0x02c0000,
    16513. 

  16513. +                offset: MTDPART_OFS_APPEND,
    16514. 

  16514. +        },{
    16515. 

  16515. +                name: "yamon env vars",
    16516. 

  16516. +                size: 0x0040000,
    16517. 

  16517. +                offset: MTDPART_OFS_APPEND,
    16518. 

  16518. +                mask_flags: MTD_WRITEABLE
    16519. 

  16519. +        }
    16520. 

  16520. +};
    16521. 

  16521. +
    16522. 

  16522. +
    16523. 

  16523. +#define NB_OF(x)  (sizeof(x)/sizeof(x[0]))
    16524. 

  16524. +
    16525. 

  16525. +static struct mtd_partition *parsed_parts;
    16526. 

  16526. +static struct mtd_info *mymtd;
    16527. 

  16527. +
    16528. 

  16528. +int __init mtx1_mtd_init(void)
    16529. 

  16529. +{
    16530. 

  16530. +	struct mtd_partition *parts;
    16531. 

  16531. +	int nb_parts = 0;
    16532. 

  16532. +	char *part_type;
    16533. 

  16533. +	
    16534. 

  16534. +	/* Default flash buswidth */
    16535. 

  16535. +	mtx1_map.buswidth = flash_buswidth;
    16536. 

  16536. +
    16537. 

  16537. +	/*
    16538. 

  16538. +	 * Static partition definition selection
    16539. 

  16539. +	 */
    16540. 

  16540. +	part_type = "static";
    16541. 

  16541. +	parts = mtx1_partitions;
    16542. 

  16542. +	nb_parts = NB_OF(mtx1_partitions);
    16543. 

  16543. +	mtx1_map.size = flash_size;
    16544. 

  16544. +
    16545. 

  16545. +	/*
    16546. 

  16546. +	 * Now let's probe for the actual flash.  Do it here since
    16547. 

  16547. +	 * specific machine settings might have been set above.
    16548. 

  16548. +	 */
    16549. 

  16549. +	printk(KERN_NOTICE "MTX-1 flash: probing %d-bit flash bus\n",
    16550. 

  16550. +			mtx1_map.buswidth*8);
    16551. 

  16551. +	mtx1_map.map_priv_1 =
    16552. 

  16552. +		(unsigned long)ioremap(WINDOW_ADDR, WINDOW_SIZE);
    16553. 

  16553. +	mymtd = do_map_probe("cfi_probe", &mtx1_map);
    16554. 

  16554. +	if (!mymtd) return -ENXIO;
    16555. 

  16555. +	mymtd->module = THIS_MODULE;
    16556. 

  16556. +
    16557. 

  16557. +	add_mtd_partitions(mymtd, parts, nb_parts);
    16558. 

  16558. +	return 0;
    16559. 

  16559. +}
    16560. 

  16560. +
    16561. 

  16561. +static void __exit mtx1_mtd_cleanup(void)
    16562. 

  16562. +{
    16563. 

  16563. +	if (mymtd) {
    16564. 

  16564. +		del_mtd_partitions(mymtd);
    16565. 

  16565. +		map_destroy(mymtd);
    16566. 

  16566. +		if (parsed_parts)
    16567. 

  16567. +			kfree(parsed_parts);
    16568. 

  16568. +	}
    16569. 

  16569. +}
    16570. 

  16570. +
    16571. 

  16571. +module_init(mtx1_mtd_init);
    16572. 

  16572. +module_exit(mtx1_mtd_cleanup);
    16573. 

  16573. +
    16574. 

  16574. +MODULE_AUTHOR("Pete Popov");
    16575. 

  16575. +MODULE_DESCRIPTION("MTX-1 CFI map driver");
    16576. 

  16576. +MODULE_LICENSE("GPL");
    16577. 

  16577. --- /dev/null
    16578. 

  16578. +++ b/drivers/mtd/maps/pb1550-flash.c
    16579. 

  16579. @@ -0,0 +1,270 @@
    16580. 

  16580. +/*
    16581. 

  16581. + * Flash memory access on Alchemy Pb1550 board
    16582. 

  16582. + * 
    16583. 

  16583. + * (C) 2004 Embedded Edge, LLC, based on pb1550-flash.c:
    16584. 

  16584. + * (C) 2003 Pete Popov <ppopov@pacbell.net>
    16585. 

  16585. + * 
    16586. 

  16586. + */
    16587. 

  16587. +
    16588. 

  16588. +#include <linux/config.h>
    16589. 

  16589. +#include <linux/module.h>
    16590. 

  16590. +#include <linux/types.h>
    16591. 

  16591. +#include <linux/kernel.h>
    16592. 

  16592. +
    16593. 

  16593. +#include <linux/mtd/mtd.h>
    16594. 

  16594. +#include <linux/mtd/map.h>
    16595. 

  16595. +#include <linux/mtd/partitions.h>
    16596. 

  16596. +
    16597. 

  16597. +#include <asm/io.h>
    16598. 

  16598. +#include <asm/au1000.h>
    16599. 

  16599. +#include <asm/pb1550.h>
    16600. 

  16600. +
    16601. 

  16601. +#ifdef 	DEBUG_RW
    16602. 

  16602. +#define	DBG(x...)	printk(x)
    16603. 

  16603. +#else
    16604. 

  16604. +#define	DBG(x...)	
    16605. 

  16605. +#endif
    16606. 

  16606. +
    16607. 

  16607. +static unsigned long window_addr;
    16608. 

  16608. +static unsigned long window_size;
    16609. 

  16609. +
    16610. 

  16610. +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
    16611. 

  16611. +{
    16612. 

  16612. +	__u8 ret;
    16613. 

  16613. +	ret = __raw_readb(map->map_priv_1 + ofs);
    16614. 

  16614. +	DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
    16615. 

  16615. +	return ret;
    16616. 

  16616. +}
    16617. 

  16617. +
    16618. 

  16618. +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
    16619. 

  16619. +{
    16620. 

  16620. +	__u16 ret;
    16621. 

  16621. +	ret = __raw_readw(map->map_priv_1 + ofs);
    16622. 

  16622. +	DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
    16623. 

  16623. +	return ret;
    16624. 

  16624. +}
    16625. 

  16625. +
    16626. 

  16626. +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
    16627. 

  16627. +{
    16628. 

  16628. +	__u32 ret;
    16629. 

  16629. +	ret = __raw_readl(map->map_priv_1 + ofs);
    16630. 

  16630. +	DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
    16631. 

  16631. +	return ret;
    16632. 

  16632. +}
    16633. 

  16633. +
    16634. 

  16634. +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
    16635. 

  16635. +{
    16636. 

  16636. +	DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
    16637. 

  16637. +	memcpy_fromio(to, map->map_priv_1 + from, len);
    16638. 

  16638. +}
    16639. 

  16639. +
    16640. 

  16640. +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
    16641. 

  16641. +{
    16642. 

  16642. +	DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
    16643. 

  16643. +	__raw_writeb(d, map->map_priv_1 + adr);
    16644. 

  16644. +	mb();
    16645. 

  16645. +}
    16646. 

  16646. +
    16647. 

  16647. +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
    16648. 

  16648. +{
    16649. 

  16649. +	DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
    16650. 

  16650. +	__raw_writew(d, map->map_priv_1 + adr);
    16651. 

  16651. +	mb();
    16652. 

  16652. +}
    16653. 

  16653. +
    16654. 

  16654. +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
    16655. 

  16655. +{
    16656. 

  16656. +	DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
    16657. 

  16657. +	__raw_writel(d, map->map_priv_1 + adr);
    16658. 

  16658. +	mb();
    16659. 

  16659. +}
    16660. 

  16660. +
    16661. 

  16661. +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
    16662. 

  16662. +{
    16663. 

  16663. +	DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
    16664. 

  16664. +	memcpy_toio(map->map_priv_1 + to, from, len);
    16665. 

  16665. +}
    16666. 

  16666. +
    16667. 

  16667. +static struct map_info pb1550_map = {
    16668. 

  16668. +	name:		"Pb1550 flash",
    16669. 

  16669. +	read8: physmap_read8,
    16670. 

  16670. +	read16: physmap_read16,
    16671. 

  16671. +	read32: physmap_read32,
    16672. 

  16672. +	copy_from: physmap_copy_from,
    16673. 

  16673. +	write8: physmap_write8,
    16674. 

  16674. +	write16: physmap_write16,
    16675. 

  16675. +	write32: physmap_write32,
    16676. 

  16676. +	copy_to: physmap_copy_to,
    16677. 

  16677. +};
    16678. 

  16678. +
    16679. 

  16679. +static unsigned char flash_buswidth = 4;
    16680. 

  16680. +
    16681. 

  16681. +/* 
    16682. 

  16682. + * Support only 64MB NOR Flash parts
    16683. 

  16683. + */
    16684. 

  16684. +
    16685. 

  16685. +#ifdef PB1550_BOTH_BANKS
    16686. 

  16686. +/* both banks will be used. Combine the first bank and the first 
    16687. 

  16687. + * part of the second bank together into a single jffs/jffs2
    16688. 

  16688. + * partition.
    16689. 

  16689. + */
    16690. 

  16690. +static struct mtd_partition pb1550_partitions[] = {
    16691. 

  16691. +	/* assume boot[2:0]:swap is '0000' or '1000', which translates to:
    16692. 

  16692. +	 * 1C00 0000 1FFF FFFF CE0 64MB Boot NOR Flash
    16693. 

  16693. +	 * 1800 0000 1BFF FFFF CE0 64MB Param NOR Flash
    16694. 

  16694. +	 */
    16695. 

  16695. +        {
    16696. 

  16696. +                name: "User FS",
    16697. 

  16697. +                size:   (0x1FC00000 - 0x18000000),
    16698. 

  16698. +                offset: 0x0000000
    16699. 

  16699. +        },{
    16700. 

  16700. +                name: "yamon",
    16701. 

  16701. +                size: 0x0100000,
    16702. 

  16702. +		offset:	MTDPART_OFS_APPEND,
    16703. 

  16703. +                mask_flags: MTD_WRITEABLE
    16704. 

  16704. +        },{
    16705. 

  16705. +                name: "raw kernel",
    16706. 

  16706. +		size: (0x300000 - 0x40000), /* last 256KB is yamon env */
    16707. 

  16707. +		offset:	MTDPART_OFS_APPEND,
    16708. 

  16708. +        }
    16709. 

  16709. +};
    16710. 

  16710. +#elif defined(PB1550_BOOT_ONLY)
    16711. 

  16711. +static struct mtd_partition pb1550_partitions[] = {
    16712. 

  16712. +	/* assume boot[2:0]:swap is '0000' or '1000', which translates to:
    16713. 

  16713. +	 * 1C00 0000 1FFF FFFF CE0 64MB Boot NOR Flash
    16714. 

  16714. +	 */
    16715. 

  16715. +        {
    16716. 

  16716. +                name: "User FS",
    16717. 

  16717. +                size:   0x03c00000,
    16718. 

  16718. +                offset: 0x0000000
    16719. 

  16719. +        },{
    16720. 

  16720. +                name: "yamon",
    16721. 

  16721. +                size: 0x0100000,
    16722. 

  16722. +		offset:	MTDPART_OFS_APPEND,
    16723. 

  16723. +                mask_flags: MTD_WRITEABLE
    16724. 

  16724. +        },{
    16725. 

  16725. +                name: "raw kernel",
    16726. 

  16726. +		size: (0x300000-0x40000), /* last 256KB is yamon env */
    16727. 

  16727. +		offset:	MTDPART_OFS_APPEND,
    16728. 

  16728. +        }
    16729. 

  16729. +};
    16730. 

  16730. +#elif defined(PB1550_USER_ONLY)
    16731. 

  16731. +static struct mtd_partition pb1550_partitions[] = {
    16732. 

  16732. +	/* assume boot[2:0]:swap is '0000' or '1000', which translates to:
    16733. 

  16733. +	 * 1800 0000 1BFF FFFF CE0 64MB Param NOR Flash
    16734. 

  16734. +	 */
    16735. 

  16735. +        {
    16736. 

  16736. +                name: "User FS",
    16737. 

  16737. +                size:  (0x4000000 - 0x200000), /* reserve 2MB for raw kernel */
    16738. 

  16738. +                offset: 0x0000000
    16739. 

  16739. +        },{
    16740. 

  16740. +                name: "raw kernel",
    16741. 

  16741. +		size: MTDPART_SIZ_FULL,
    16742. 

  16742. +		offset:	MTDPART_OFS_APPEND,
    16743. 

  16743. +        }
    16744. 

  16744. +};
    16745. 

  16745. +#else
    16746. 

  16746. +#error MTD_PB1550 define combo error /* should never happen */
    16747. 

  16747. +#endif
    16748. 

  16748. +
    16749. 

  16749. +#define NB_OF(x)  (sizeof(x)/sizeof(x[0]))
    16750. 

  16750. +
    16751. 

  16751. +static struct mtd_partition *parsed_parts;
    16752. 

  16752. +static struct mtd_info *mymtd;
    16753. 

  16753. +
    16754. 

  16754. +/*
    16755. 

  16755. + * Probe the flash density and setup window address and size
    16756. 

  16756. + * based on user CONFIG options. There are times when we don't
    16757. 

  16757. + * want the MTD driver to be probing the boot or user flash,
    16758. 

  16758. + * so having the option to enable only one bank is important.
    16759. 

  16759. + */
    16760. 

  16760. +int setup_flash_params()
    16761. 

  16761. +{
    16762. 

  16762. +	u16 boot_swapboot;
    16763. 

  16763. +	boot_swapboot = (au_readl(MEM_STSTAT) & (0x7<<1)) | 
    16764. 

  16764. +		((bcsr->status >> 6)  & 0x1);
    16765. 

  16765. +	printk("Pb1550 MTD: boot:swap %d\n", boot_swapboot);
    16766. 

  16766. +
    16767. 

  16767. +	switch (boot_swapboot) {
    16768. 

  16768. +		case 0: /* 512Mbit devices, both enabled */
    16769. 

  16769. +		case 1: 
    16770. 

  16770. +		case 8:
    16771. 

  16771. +		case 9: 
    16772. 

  16772. +#if defined(PB1550_BOTH_BANKS)
    16773. 

  16773. +			window_addr = 0x18000000;
    16774. 

  16774. +			window_size = 0x8000000; 
    16775. 

  16775. +#elif defined(PB1550_BOOT_ONLY)
    16776. 

  16776. +			window_addr = 0x1C000000;
    16777. 

  16777. +			window_size = 0x4000000; 
    16778. 

  16778. +#else /* USER ONLY */
    16779. 

  16779. +			window_addr = 0x1E000000;
    16780. 

  16780. +			window_size = 0x1000000; 
    16781. 

  16781. +#endif
    16782. 

  16782. +			break;
    16783. 

  16783. +		case 0xC:
    16784. 

  16784. +		case 0xD:
    16785. 

  16785. +		case 0xE:
    16786. 

  16786. +		case 0xF: 
    16787. 

  16787. +			/* 64 MB Boot NOR Flash is disabled */
    16788. 

  16788. +			/* and the start address is moved to 0x0C00000 */
    16789. 

  16789. +			window_addr = 0x0C000000;
    16790. 

  16790. +			window_size = 0x4000000; 
    16791. 

  16791. +		default:
    16792. 

  16792. +			printk("Pb1550 MTD: unsupported boot:swap setting\n");
    16793. 

  16793. +			return 1;
    16794. 

  16794. +	}
    16795. 

  16795. +	return 0;
    16796. 

  16796. +}
    16797. 

  16797. +
    16798. 

  16798. +int __init pb1550_mtd_init(void)
    16799. 

  16799. +{
    16800. 

  16800. +	struct mtd_partition *parts;
    16801. 

  16801. +	int nb_parts = 0;
    16802. 

  16802. +	char *part_type;
    16803. 

  16803. +	
    16804. 

  16804. +	/* Default flash buswidth */
    16805. 

  16805. +	pb1550_map.buswidth = flash_buswidth;
    16806. 

  16806. +
    16807. 

  16807. +	if (setup_flash_params()) 
    16808. 

  16808. +		return -ENXIO;
    16809. 

  16809. +
    16810. 

  16810. +	/*
    16811. 

  16811. +	 * Static partition definition selection
    16812. 

  16812. +	 */
    16813. 

  16813. +	part_type = "static";
    16814. 

  16814. +	parts = pb1550_partitions;
    16815. 

  16815. +	nb_parts = NB_OF(pb1550_partitions);
    16816. 

  16816. +	pb1550_map.size = window_size;
    16817. 

  16817. +
    16818. 

  16818. +	/*
    16819. 

  16819. +	 * Now let's probe for the actual flash.  Do it here since
    16820. 

  16820. +	 * specific machine settings might have been set above.
    16821. 

  16821. +	 */
    16822. 

  16822. +	printk(KERN_NOTICE "Pb1550 flash: probing %d-bit flash bus\n", 
    16823. 

  16823. +			pb1550_map.buswidth*8);
    16824. 

  16824. +	pb1550_map.map_priv_1 = 
    16825. 

  16825. +		(unsigned long)ioremap(window_addr, window_size);
    16826. 

  16826. +	mymtd = do_map_probe("cfi_probe", &pb1550_map);
    16827. 

  16827. +	if (!mymtd) return -ENXIO;
    16828. 

  16828. +	mymtd->module = THIS_MODULE;
    16829. 

  16829. +
    16830. 

  16830. +	add_mtd_partitions(mymtd, parts, nb_parts);
    16831. 

  16831. +	return 0;
    16832. 

  16832. +}
    16833. 

  16833. +
    16834. 

  16834. +static void __exit pb1550_mtd_cleanup(void)
    16835. 

  16835. +{
    16836. 

  16836. +	if (mymtd) {
    16837. 

  16837. +		del_mtd_partitions(mymtd);
    16838. 

  16838. +		map_destroy(mymtd);
    16839. 

  16839. +		if (parsed_parts)
    16840. 

  16840. +			kfree(parsed_parts);
    16841. 

  16841. +	}
    16842. 

  16842. +}
    16843. 

  16843. +
    16844. 

  16844. +module_init(pb1550_mtd_init);
    16845. 

  16845. +module_exit(pb1550_mtd_cleanup);
    16846. 

  16846. +
    16847. 

  16847. +MODULE_AUTHOR("Embedded Edge, LLC");
    16848. 

  16848. +MODULE_DESCRIPTION("Pb1550 mtd map driver");
    16849. 

  16849. +MODULE_LICENSE("GPL");
    16850. 

  16850. --- a/drivers/mtd/maps/pb1xxx-flash.c
    16851. 

  16851. +++ b/drivers/mtd/maps/pb1xxx-flash.c
    16852. 

  16852. @@ -192,6 +192,34 @@ static struct mtd_partition pb1xxx_parti
    16853. 

  16853.  #else
    16854. 

  16854.  #error MTD_PB1500 define combo error /* should never happen */
    16855. 

  16855.  #endif
    16856. 

  16856. +#elif defined(CONFIG_MTD_BOSPORUS)
    16857. 

  16857. +static unsigned char flash_buswidth = 2;
    16858. 

  16858. +static unsigned long flash_size 	= 0x02000000;
    16859. 

  16859. +#define WINDOW_ADDR 0x1F000000
    16860. 

  16860. +#define WINDOW_SIZE 0x2000000
    16861. 

  16861. +static struct mtd_partition pb1xxx_partitions[] = {
    16862. 

  16862. +        {
    16863. 

  16863. +                name:   "User FS",
    16864. 

  16864. +                size:   0x00400000,
    16865. 

  16865. +                offset: 0x00000000,
    16866. 

  16866. +        },{
    16867. 

  16867. +                name:   "Yamon-2",
    16868. 

  16868. +                size:   0x00100000,
    16869. 

  16869. +                offset: 0x00400000,
    16870. 

  16870. +        },{
    16871. 

  16871. +                name:   "Root FS",
    16872. 

  16872. +                size:   0x00700000,
    16873. 

  16873. +                offset: 0x00500000,
    16874. 

  16874. +        },{
    16875. 

  16875. +                name:   "Yamon-1",
    16876. 

  16876. +                size:   0x00100000,
    16877. 

  16877. +                offset: 0x00C00000,
    16878. 

  16878. +        },{
    16879. 

  16879. +                name:   "Kernel",
    16880. 

  16880. +                size:   0x00300000,
    16881. 

  16881. +                offset: 0x00D00000,
    16882. 

  16882. +        }
    16883. 

  16883. +};
    16884. 

  16884.  #else
    16885. 

  16885.  #error Unsupported board
    16886. 

  16886.  #endif
    16887. 

  16887. --- /dev/null
    16888. 

  16888. +++ b/drivers/mtd/maps/xxs1500.c
    16889. 

  16889. @@ -0,0 +1,186 @@
    16890. 

  16890. +/*
    16891. 

  16891. + * Flash memory access on MyCable XXS1500 board
    16892. 

  16892. + * 
    16893. 

  16893. + * (C) 2003 Pete Popov <ppopov@mvista.com>
    16894. 

  16894. + * 
    16895. 

  16895. + * $Id: xxs1500.c,v 1.1.2.1 2003/06/13 21:15:46 ppopov Exp $
    16896. 

  16896. + */
    16897. 

  16897. +
    16898. 

  16898. +#include <linux/config.h>
    16899. 

  16899. +#include <linux/module.h>
    16900. 

  16900. +#include <linux/types.h>
    16901. 

  16901. +#include <linux/kernel.h>
    16902. 

  16902. +
    16903. 

  16903. +#include <linux/mtd/mtd.h>
    16904. 

  16904. +#include <linux/mtd/map.h>
    16905. 

  16905. +#include <linux/mtd/partitions.h>
    16906. 

  16906. +
    16907. 

  16907. +#include <asm/io.h>
    16908. 

  16908. +#include <asm/au1000.h>
    16909. 

  16909. +
    16910. 

  16910. +#ifdef 	DEBUG_RW
    16911. 

  16911. +#define	DBG(x...)	printk(x)
    16912. 

  16912. +#else
    16913. 

  16913. +#define	DBG(x...)	
    16914. 

  16914. +#endif
    16915. 

  16915. +
    16916. 

  16916. +#ifdef CONFIG_MIPS_XXS1500
    16917. 

  16917. +#define WINDOW_ADDR 0x1F000000
    16918. 

  16918. +#define WINDOW_SIZE 0x1000000
    16919. 

  16919. +#endif
    16920. 

  16920. +
    16921. 

  16921. +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
    16922. 

  16922. +{
    16923. 

  16923. +	__u8 ret;
    16924. 

  16924. +	ret = __raw_readb(map->map_priv_1 + ofs);
    16925. 

  16925. +	DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
    16926. 

  16926. +	return ret;
    16927. 

  16927. +}
    16928. 

  16928. +
    16929. 

  16929. +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
    16930. 

  16930. +{
    16931. 

  16931. +	__u16 ret;
    16932. 

  16932. +	ret = __raw_readw(map->map_priv_1 + ofs);
    16933. 

  16933. +	DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
    16934. 

  16934. +	return ret;
    16935. 

  16935. +}
    16936. 

  16936. +
    16937. 

  16937. +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
    16938. 

  16938. +{
    16939. 

  16939. +	__u32 ret;
    16940. 

  16940. +	ret = __raw_readl(map->map_priv_1 + ofs);
    16941. 

  16941. +	DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
    16942. 

  16942. +	return ret;
    16943. 

  16943. +}
    16944. 

  16944. +
    16945. 

  16945. +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
    16946. 

  16946. +{
    16947. 

  16947. +	DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
    16948. 

  16948. +	memcpy_fromio(to, map->map_priv_1 + from, len);
    16949. 

  16949. +}
    16950. 

  16950. +
    16951. 

  16951. +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
    16952. 

  16952. +{
    16953. 

  16953. +	DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
    16954. 

  16954. +	__raw_writeb(d, map->map_priv_1 + adr);
    16955. 

  16955. +	mb();
    16956. 

  16956. +}
    16957. 

  16957. +
    16958. 

  16958. +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
    16959. 

  16959. +{
    16960. 

  16960. +	DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
    16961. 

  16961. +	__raw_writew(d, map->map_priv_1 + adr);
    16962. 

  16962. +	mb();
    16963. 

  16963. +}
    16964. 

  16964. +
    16965. 

  16965. +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
    16966. 

  16966. +{
    16967. 

  16967. +	DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
    16968. 

  16968. +	__raw_writel(d, map->map_priv_1 + adr);
    16969. 

  16969. +	mb();
    16970. 

  16970. +}
    16971. 

  16971. +
    16972. 

  16972. +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
    16973. 

  16973. +{
    16974. 

  16974. +	DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
    16975. 

  16975. +	memcpy_toio(map->map_priv_1 + to, from, len);
    16976. 

  16976. +}
    16977. 

  16977. +
    16978. 

  16978. +
    16979. 

  16979. +
    16980. 

  16980. +static struct map_info xxs1500_map = {
    16981. 

  16981. +	name:		"XXS1500 flash",
    16982. 

  16982. +	read8: physmap_read8,
    16983. 

  16983. +	read16: physmap_read16,
    16984. 

  16984. +	read32: physmap_read32,
    16985. 

  16985. +	copy_from: physmap_copy_from,
    16986. 

  16986. +	write8: physmap_write8,
    16987. 

  16987. +	write16: physmap_write16,
    16988. 

  16988. +	write32: physmap_write32,
    16989. 

  16989. +	copy_to: physmap_copy_to,
    16990. 

  16990. +};
    16991. 

  16991. +
    16992. 

  16992. +
    16993. 

  16993. +static unsigned long flash_size = 0x00800000;
    16994. 

  16994. +static unsigned char flash_buswidth = 4;
    16995. 

  16995. +static struct mtd_partition xxs1500_partitions[] = {
    16996. 

  16996. +        {
    16997. 

  16997. +                name: "kernel image",
    16998. 

  16998. +                size: 0x00200000,
    16999. 

  16999. +                offset: 0,
    17000. 

  17000. +        },{
    17001. 

  17001. +                name: "user fs 0",
    17002. 

  17002. +                size: (0x00C00000-0x200000),
    17003. 

  17003. +                offset: MTDPART_OFS_APPEND,
    17004. 

  17004. +        },{
    17005. 

  17005. +                name: "yamon",
    17006. 

  17006. +                size: 0x00100000,
    17007. 

  17007. +                offset: MTDPART_OFS_APPEND,
    17008. 

  17008. +                mask_flags: MTD_WRITEABLE
    17009. 

  17009. +        },{
    17010. 

  17010. +                name: "user fs 1",
    17011. 

  17011. +                size: 0x2c0000,
    17012. 

  17012. +                offset: MTDPART_OFS_APPEND,
    17013. 

  17013. +        },{
    17014. 

  17014. +                name: "yamon env vars",
    17015. 

  17015. +                size: 0x040000,
    17016. 

  17016. +                offset: MTDPART_OFS_APPEND,
    17017. 

  17017. +                mask_flags: MTD_WRITEABLE
    17018. 

  17018. +        }
    17019. 

  17019. +};
    17020. 

  17020. +
    17021. 

  17021. +
    17022. 

  17022. +#define NB_OF(x)  (sizeof(x)/sizeof(x[0]))
    17023. 

  17023. +
    17024. 

  17024. +static struct mtd_partition *parsed_parts;
    17025. 

  17025. +static struct mtd_info *mymtd;
    17026. 

  17026. +
    17027. 

  17027. +int __init xxs1500_mtd_init(void)
    17028. 

  17028. +{
    17029. 

  17029. +	struct mtd_partition *parts;
    17030. 

  17030. +	int nb_parts = 0;
    17031. 

  17031. +	char *part_type;
    17032. 

  17032. +	
    17033. 

  17033. +	/* Default flash buswidth */
    17034. 

  17034. +	xxs1500_map.buswidth = flash_buswidth;
    17035. 

  17035. +
    17036. 

  17036. +	/*
    17037. 

  17037. +	 * Static partition definition selection
    17038. 

  17038. +	 */
    17039. 

  17039. +	part_type = "static";
    17040. 

  17040. +	parts = xxs1500_partitions;
    17041. 

  17041. +	nb_parts = NB_OF(xxs1500_partitions);
    17042. 

  17042. +	xxs1500_map.size = flash_size;
    17043. 

  17043. +
    17044. 

  17044. +	/*
    17045. 

  17045. +	 * Now let's probe for the actual flash.  Do it here since
    17046. 

  17046. +	 * specific machine settings might have been set above.
    17047. 

  17047. +	 */
    17048. 

  17048. +	printk(KERN_NOTICE "XXS1500 flash: probing %d-bit flash bus\n", 
    17049. 

  17049. +			xxs1500_map.buswidth*8);
    17050. 

  17050. +	xxs1500_map.map_priv_1 = 
    17051. 

  17051. +		(unsigned long)ioremap(WINDOW_ADDR, WINDOW_SIZE);
    17052. 

  17052. +	mymtd = do_map_probe("cfi_probe", &xxs1500_map);
    17053. 

  17053. +	if (!mymtd) return -ENXIO;
    17054. 

  17054. +	mymtd->module = THIS_MODULE;
    17055. 

  17055. +
    17056. 

  17056. +	add_mtd_partitions(mymtd, parts, nb_parts);
    17057. 

  17057. +	return 0;
    17058. 

  17058. +}
    17059. 

  17059. +
    17060. 

  17060. +static void __exit xxs1500_mtd_cleanup(void)
    17061. 

  17061. +{
    17062. 

  17062. +	if (mymtd) {
    17063. 

  17063. +		del_mtd_partitions(mymtd);
    17064. 

  17064. +		map_destroy(mymtd);
    17065. 

  17065. +		if (parsed_parts)
    17066. 

  17066. +			kfree(parsed_parts);
    17067. 

  17067. +	}
    17068. 

  17068. +}
    17069. 

  17069. +
    17070. 

  17070. +module_init(xxs1500_mtd_init);
    17071. 

  17071. +module_exit(xxs1500_mtd_cleanup);
    17072. 

  17072. +
    17073. 

  17073. +MODULE_AUTHOR("Pete Popov");
    17074. 

  17074. +MODULE_DESCRIPTION("XXS1500 CFI map driver");
    17075. 

  17075. +MODULE_LICENSE("GPL");
    17076. 

  17076. --- a/drivers/net/defxx.c
    17077. 

  17077. +++ b/drivers/net/defxx.c
    17078. 

  17078. @@ -10,24 +10,18 @@
    17079. 

  17079.   *
    17080. 

  17080.   * Abstract:
    17081. 

  17081.   *   A Linux device driver supporting the Digital Equipment Corporation
    17082. 

  17082. - *   FDDI EISA and PCI controller families.  Supported adapters include:
    17083. 

  17083. + *   FDDI TURBOchannel, EISA and PCI controller families.  Supported
    17084. 

  17084. + *   adapters include:
    17085. 

  17085.   *
    17086. 

  17086. - *		DEC FDDIcontroller/EISA (DEFEA)
    17087. 

  17087. - *		DEC FDDIcontroller/PCI  (DEFPA)
    17088. 

  17088. + *		DEC FDDIcontroller/TURBOchannel (DEFTA)
    17089. 

  17089. + *		DEC FDDIcontroller/EISA         (DEFEA)
    17090. 

  17090. + *		DEC FDDIcontroller/PCI          (DEFPA)
    17091. 

  17091.   *
    17092. 

  17092. - * Maintainers:
    17093. 

  17093. - *   LVS	Lawrence V. Stefani
    17094. 

  17094. - *
    17095. 

  17095. - * Contact:
    17096. 

  17096. - *	 The author may be reached at:
    17097. 

  17097. + * The original author:
    17098. 

  17098. + *   LVS	Lawrence V. Stefani <lstefani@yahoo.com>
    17099. 

  17099.   *
    17100. 

  17100. - *		Inet: stefani@lkg.dec.com
    17101. 

  17101. - *		(NOTE! this address no longer works -jgarzik)
    17102. 

  17102. - *
    17103. 

  17103. - *		Mail: Digital Equipment Corporation
    17104. 

  17104. - *			  550 King Street
    17105. 

  17105. - *			  M/S: LKG1-3/M07
    17106. 

  17106. - *			  Littleton, MA  01460
    17107. 

  17107. + * Maintainers:
    17108. 

  17108. + *   macro	Maciej W. Rozycki <macro@linux-mips.org>
    17109. 

  17109.   *
    17110. 

  17110.   * Credits:
    17111. 

  17111.   *   I'd like to thank Patricia Cross for helping me get started with
    17112. 

  17112. @@ -197,16 +191,16 @@
    17113. 

  17113.   *		Sep 2000	tjeerd		Fix leak on unload, cosmetic code cleanup
    17114. 

  17114.   *		Feb 2001			Skb allocation fixes
    17115. 

  17115.   *		Feb 2001	davej		PCI enable cleanups.
    17116. 

  17116. + *		04 Aug 2003	macro		Converted to the DMA API.
    17117. 

  17117. + *		14 Aug 2004	macro		Fix device names reported.
    17118. 

  17118. + *		26 Sep 2004	macro		TURBOchannel support.
    17119. 

  17119.   */
    17120. 

  17120.  
    17121. 

  17121.  /* Include files */
    17122. 

  17122.  
    17123. 

  17123.  #include <linux/module.h>
    17124. 

  17124. -
    17125. 

  17125.  #include <linux/kernel.h>
    17126. 

  17126. -#include <linux/sched.h>
    17127. 

  17127.  #include <linux/string.h>
    17128. 

  17128. -#include <linux/ptrace.h>
    17129. 

  17129.  #include <linux/errno.h>
    17130. 

  17130.  #include <linux/ioport.h>
    17131. 

  17131.  #include <linux/slab.h>
    17132. 

  17132. @@ -215,19 +209,33 @@
    17133. 

  17133.  #include <linux/delay.h>
    17134. 

  17134.  #include <linux/init.h>
    17135. 

  17135.  #include <linux/netdevice.h>
    17136. 

  17136. +#include <linux/fddidevice.h>
    17137. 

  17137. +#include <linux/skbuff.h>
    17138. 

  17138. +
    17139. 

  17139.  #include <asm/byteorder.h>
    17140. 

  17140.  #include <asm/bitops.h>
    17141. 

  17141.  #include <asm/io.h>
    17142. 

  17142.  
    17143. 

  17143. -#include <linux/fddidevice.h>
    17144. 

  17144. -#include <linux/skbuff.h>
    17145. 

  17145. +#ifdef CONFIG_TC
    17146. 

  17146. +#include <asm/dec/tc.h>
    17147. 

  17147. +#else
    17148. 

  17148. +static int search_tc_card(const char *name) { return -ENODEV; }
    17149. 

  17149. +static void claim_tc_card(int slot) { }
    17150. 

  17150. +static void release_tc_card(int slot) { }
    17151. 

  17151. +static unsigned long get_tc_base_addr(int slot) { return 0; }
    17152. 

  17152. +static unsigned long get_tc_irq_nr(int slot) { return -1; }
    17153. 

  17153. +#endif
    17154. 

  17154.  
    17155. 

  17155.  #include "defxx.h"
    17156. 

  17156.  
    17157. 

  17157. -/* Version information string - should be updated prior to each new release!!! */
    17158. 

  17158. +/* Version information string should be updated prior to each new release!  */
    17159. 

  17159. +#define DRV_NAME "defxx"
    17160. 

  17160. +#define DRV_VERSION "v1.07T"
    17161. 

  17161. +#define DRV_RELDATE "2004/09/26"
    17162. 

  17162.  
    17163. 

  17163.  static char version[] __devinitdata =
    17164. 

  17164. -	"defxx.c:v1.05e 2001/02/03  Lawrence V. Stefani and others\n";
    17165. 

  17165. +	DRV_NAME ": " DRV_VERSION " " DRV_RELDATE
    17166. 

  17166. +	"  Lawrence V. Stefani and others\n";
    17167. 

  17167.  
    17168. 

  17168.  #define DYNAMIC_BUFFERS 1
    17169. 

  17169.  
    17170. 

  17170. @@ -243,7 +251,7 @@ static char version[] __devinitdata =
    17171. 

  17171.  static void		dfx_bus_init(struct net_device *dev);
    17172. 

  17172.  static void		dfx_bus_config_check(DFX_board_t *bp);
    17173. 

  17173.  
    17174. 

  17174. -static int		dfx_driver_init(struct net_device *dev);
    17175. 

  17175. +static int		dfx_driver_init(struct net_device *dev, const char *print_name);
    17176. 

  17176.  static int		dfx_adap_init(DFX_board_t *bp, int get_buffers);
    17177. 

  17177.  
    17178. 

  17178.  static int		dfx_open(struct net_device *dev);
    17179. 

  17179. @@ -337,48 +345,84 @@ static inline void dfx_port_write_byte(
    17180. 

  17180.  	int			offset,
    17181. 

  17181.  	u8			data
    17182. 

  17182.  	)
    17183. 

  17183. +{
    17184. 

  17184. +	if (bp->bus_type == DFX_BUS_TYPE_TC)
    17185. 

  17185. +	{
    17186. 

  17186. +	volatile u8 *addr = (void *)(bp->base_addr + offset);
    17187. 

  17187.  
    17188. 

  17188. +	*addr = data;
    17189. 

  17189. +	mb();
    17190. 

  17190. +	}
    17191. 

  17191. +	else
    17192. 

  17192.  	{
    17193. 

  17193.  	u16 port = bp->base_addr + offset;
    17194. 

  17194.  
    17195. 

  17195.  	outb(data, port);
    17196. 

  17196.  	}
    17197. 

  17197. +}
    17198. 

  17198.  
    17199. 

  17199.  static inline void dfx_port_read_byte(
    17200. 

  17200.  	DFX_board_t	*bp,
    17201. 

  17201.  	int			offset,
    17202. 

  17202.  	u8			*data
    17203. 

  17203.  	)
    17204. 

  17204. +{
    17205. 

  17205. +	if (bp->bus_type == DFX_BUS_TYPE_TC)
    17206. 

  17206. +	{
    17207. 

  17207. +	volatile u8 *addr = (void *)(bp->base_addr + offset);
    17208. 

  17208.  
    17209. 

  17209. +	mb();
    17210. 

  17210. +	*data = *addr;
    17211. 

  17211. +	}
    17212. 

  17212. +	else
    17213. 

  17213.  	{
    17214. 

  17214.  	u16 port = bp->base_addr + offset;
    17215. 

  17215.  
    17216. 

  17216.  	*data = inb(port);
    17217. 

  17217.  	}
    17218. 

  17218. +}
    17219. 

  17219.  
    17220. 

  17220.  static inline void dfx_port_write_long(
    17221. 

  17221.  	DFX_board_t	*bp,
    17222. 

  17222.  	int			offset,
    17223. 

  17223.  	u32			data
    17224. 

  17224.  	)
    17225. 

  17225. +{
    17226. 

  17226. +	if (bp->bus_type == DFX_BUS_TYPE_TC)
    17227. 

  17227. +	{
    17228. 

  17228. +	volatile u32 *addr = (void *)(bp->base_addr + offset);
    17229. 

  17229.  
    17230. 

  17230. +	*addr = data;
    17231. 

  17231. +	mb();
    17232. 

  17232. +	}
    17233. 

  17233. +	else
    17234. 

  17234.  	{
    17235. 

  17235.  	u16 port = bp->base_addr + offset;
    17236. 

  17236.  
    17237. 

  17237.  	outl(data, port);
    17238. 

  17238.  	}
    17239. 

  17239. +}
    17240. 

  17240.  
    17241. 

  17241.  static inline void dfx_port_read_long(
    17242. 

  17242.  	DFX_board_t	*bp,
    17243. 

  17243.  	int			offset,
    17244. 

  17244.  	u32			*data
    17245. 

  17245.  	)
    17246. 

  17246. +{
    17247. 

  17247. +	if (bp->bus_type == DFX_BUS_TYPE_TC)
    17248. 

  17248. +	{
    17249. 

  17249. +	volatile u32 *addr = (void *)(bp->base_addr + offset);
    17250. 

  17250.  
    17251. 

  17251. +	mb();
    17252. 

  17252. +	*data = *addr;
    17253. 

  17253. +	}
    17254. 

  17254. +	else
    17255. 

  17255.  	{
    17256. 

  17256.  	u16 port = bp->base_addr + offset;
    17257. 

  17257.  
    17258. 

  17258.  	*data = inl(port);
    17259. 

  17259.  	}
    17260. 

  17260. +}
    17261. 

  17261.  
    17262. 

  17262.  
    17263. 

  17263.  /*
    17264. 

  17264. @@ -393,8 +437,9 @@ static inline void dfx_port_read_long(
    17265. 

  17265.   *   Condition code
    17266. 

  17266.   *       
    17267. 

  17267.   * Arguments:
    17268. 

  17268. - *   pdev - pointer to pci device information (NULL for EISA)
    17269. 

  17269. - *   ioaddr - pointer to port (NULL for PCI)
    17270. 

  17270. + *   pdev - pointer to pci device information (NULL for EISA or TURBOchannel)
    17271. 

  17271. + *   bus_type - bus type (one of DFX_BUS_TYPE_*)
    17272. 

  17272. + *   handle - bus-specific data: slot (TC), pointer to port (EISA), NULL (PCI)
    17273. 

  17273.   *
    17274. 

  17274.   * Functional Description:
    17275. 

  17275.   *
    17276. 

  17276. @@ -410,54 +455,68 @@ static inline void dfx_port_read_long(
    17277. 

  17277.   *   initialized and the board resources are read and stored in
    17278. 

  17278.   *   the device structure.
    17279. 

  17279.   */
    17280. 

  17280. -static int __devinit dfx_init_one_pci_or_eisa(struct pci_dev *pdev, long ioaddr)
    17281. 

  17281. +static int __devinit dfx_init_one_pci_or_eisa(struct pci_dev *pdev, u32 bus_type, long handle)
    17282. 

  17282.  {
    17283. 

  17283. +	static int version_disp;
    17284. 

  17284. +	char *print_name = DRV_NAME;
    17285. 

  17285.  	struct net_device *dev;
    17286. 

  17286.  	DFX_board_t	  *bp;			/* board pointer */
    17287. 

  17287. +	long ioaddr;				/* pointer to port */
    17288. 

  17288. +	unsigned long len;			/* resource length */
    17289. 

  17289. +	int alloc_size;				/* total buffer size used */
    17290. 

  17290.  	int err;
    17291. 

  17291.  
    17292. 

  17292. -#ifndef MODULE
    17293. 

  17293. -	static int version_disp;
    17294. 

  17294. -
    17295. 

  17295. -	if (!version_disp)	/* display version info if adapter is found */
    17296. 

  17296. -	{
    17297. 

  17297. +	if (!version_disp) {	/* display version info if adapter is found */
    17298. 

  17298.  		version_disp = 1;	/* set display flag to TRUE so that */
    17299. 

  17299.  		printk(version);	/* we only display this string ONCE */
    17300. 

  17300.  	}
    17301. 

  17301. -#endif
    17302. 

  17302.  
    17303. 

  17303. -	/*
    17304. 

  17304. -	 * init_fddidev() allocates a device structure with private data, clears the device structure and private data,
    17305. 

  17305. -	 * and  calls fddi_setup() and register_netdev(). Not much left to do for us here.
    17306. 

  17306. -	 */
    17307. 

  17307. -	dev = init_fddidev(NULL, sizeof(*bp));
    17308. 

  17308. +	if (pdev != NULL)
    17309. 

  17309. +		print_name = pdev->slot_name;
    17310. 

  17310. +
    17311. 

  17311. +	dev = alloc_fddidev(sizeof(*bp));
    17312. 

  17312.  	if (!dev) {
    17313. 

  17313. -		printk (KERN_ERR "defxx: unable to allocate fddidev, aborting\n");
    17314. 

  17314. +		printk(KERN_ERR "%s: unable to allocate fddidev, aborting\n",
    17315. 

  17315. +		       print_name);
    17316. 

  17316.  		return -ENOMEM;
    17317. 

  17317.  	}
    17318. 

  17318.  
    17319. 

  17319.  	/* Enable PCI device. */
    17320. 

  17320. -	if (pdev != NULL) {
    17321. 

  17321. +	if (bus_type == DFX_BUS_TYPE_PCI) {
    17322. 

  17322.  		err = pci_enable_device (pdev);
    17323. 

  17323.  		if (err) goto err_out;
    17324. 

  17324.  		ioaddr = pci_resource_start (pdev, 1);
    17325. 

  17325.  	}
    17326. 

  17326.  
    17327. 

  17327.  	SET_MODULE_OWNER(dev);
    17328. 

  17328. +	SET_NETDEV_DEV(dev, &pdev->dev);
    17329. 

  17329.  
    17330. 

  17330.  	bp = dev->priv;
    17331. 

  17331.  
    17332. 

  17332. -	if (!request_region (ioaddr, pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN, dev->name)) {
    17333. 

  17333. -		printk (KERN_ERR "%s: Cannot reserve I/O resource 0x%x @ 0x%lx, aborting\n",
    17334. 

  17334. -			dev->name, PFI_K_CSR_IO_LEN, ioaddr);
    17335. 

  17335. +	if (bus_type == DFX_BUS_TYPE_TC) {
    17336. 

  17336. +		/* TURBOchannel board */
    17337. 

  17337. +		bp->slot = handle;
    17338. 

  17338. +		claim_tc_card(bp->slot);
    17339. 

  17339. +		ioaddr = get_tc_base_addr(handle) + PI_TC_K_CSR_OFFSET;
    17340. 

  17340. +		len = PI_TC_K_CSR_LEN;
    17341. 

  17341. +	} else if (bus_type == DFX_BUS_TYPE_EISA) {
    17342. 

  17342. +		/* EISA board */
    17343. 

  17343. +		ioaddr = handle;
    17344. 

  17344. +		len = PI_ESIC_K_CSR_IO_LEN;
    17345. 

  17345. +	} else
    17346. 

  17346. +		/* PCI board */
    17347. 

  17347. +		len = PFI_K_CSR_IO_LEN;
    17348. 

  17348. +	dev->base_addr			= ioaddr; /* save port (I/O) base address */
    17349. 

  17349. +
    17350. 

  17350. +	if (!request_region(ioaddr, len, print_name)) {
    17351. 

  17351. +		printk(KERN_ERR "%s: Cannot reserve I/O resource "
    17352. 

  17352. +		       "0x%lx @ 0x%lx, aborting\n", print_name, len, ioaddr);
    17353. 

  17353.  		err = -EBUSY;
    17354. 

  17354.  		goto err_out;
    17355. 

  17355.  	}
    17356. 

  17356.  
    17357. 

  17357.  	/* Initialize new device structure */
    17358. 

  17358.  
    17359. 

  17359. -	dev->base_addr			= ioaddr; /* save port (I/O) base address */
    17360. 

  17360. -
    17361. 

  17361.  	dev->get_stats			= dfx_ctl_get_stats;
    17362. 

  17362.  	dev->open			= dfx_open;
    17363. 

  17363.  	dev->stop			= dfx_close;
    17364. 

  17364. @@ -465,37 +524,54 @@ static int __devinit dfx_init_one_pci_or
    17365. 

  17365.  	dev->set_multicast_list		= dfx_ctl_set_multicast_list;
    17366. 

  17366.  	dev->set_mac_address		= dfx_ctl_set_mac_address;
    17367. 

  17367.  
    17368. 

  17368. -	if (pdev == NULL) {
    17369. 

  17369. -		/* EISA board */
    17370. 

  17370. -		bp->bus_type = DFX_BUS_TYPE_EISA;
    17371. 

  17371. +	bp->bus_type = bus_type;
    17372. 

  17372. +	if (bus_type == DFX_BUS_TYPE_TC || bus_type == DFX_BUS_TYPE_EISA) {
    17373. 

  17373. +		/* TURBOchannel or EISA board */
    17374. 

  17374.  		bp->next = root_dfx_eisa_dev;
    17375. 

  17375.  		root_dfx_eisa_dev = dev;
    17376. 

  17376.  	} else {
    17377. 

  17377.  		/* PCI board */
    17378. 

  17378. -		bp->bus_type = DFX_BUS_TYPE_PCI;
    17379. 

  17379.  		bp->pci_dev = pdev;
    17380. 

  17380.  		pci_set_drvdata (pdev, dev);
    17381. 

  17381.  		pci_set_master (pdev);
    17382. 

  17382.  	}
    17383. 

  17383.  
    17384. 

  17384. -	if (dfx_driver_init(dev) != DFX_K_SUCCESS) {
    17385. 

  17385. +
    17386. 

  17386. +	if (dfx_driver_init(dev, print_name) != DFX_K_SUCCESS) {
    17387. 

  17387.  		err = -ENODEV;
    17388. 

  17388.  		goto err_out_region;
    17389. 

  17389.  	}
    17390. 

  17390.  
    17391. 

  17391. +	err = register_netdev(dev);
    17392. 

  17392. +	if (err)
    17393. 

  17393. +		goto err_out_kfree;
    17394. 

  17394. +
    17395. 

  17395. +	printk("%s: registered as %s\n", print_name, dev->name);
    17396. 

  17396.  	return 0;
    17397. 

  17397.  
    17398. 

  17398. +err_out_kfree:
    17399. 

  17399. +	alloc_size = sizeof(PI_DESCR_BLOCK) +
    17400. 

  17400. +		     PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX +
    17401. 

  17401. +#ifndef DYNAMIC_BUFFERS
    17402. 

  17402. +		     (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
    17403. 

  17403. +#endif
    17404. 

  17404. +		     sizeof(PI_CONSUMER_BLOCK) +
    17405. 

  17405. +		     (PI_ALIGN_K_DESC_BLK - 1);
    17406. 

  17406. +	if (bp->kmalloced)
    17407. 

  17407. +		pci_free_consistent(pdev, alloc_size,
    17408. 

  17408. +				    bp->kmalloced, bp->kmalloced_dma);
    17409. 

  17409.  err_out_region:
    17410. 

  17410. -	release_region(ioaddr, pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN);
    17411. 

  17411. +	release_region(ioaddr, len);
    17412. 

  17412.  err_out:
    17413. 

  17413. -	unregister_netdev(dev);
    17414. 

  17414. -	kfree(dev);
    17415. 

  17415. +	if (bp->bus_type == DFX_BUS_TYPE_TC)
    17416. 

  17416. +		release_tc_card(bp->slot);
    17417. 

  17417. +	free_netdev(dev);
    17418. 

  17418.  	return err;
    17419. 

  17419.  }
    17420. 

  17420.  
    17421. 

  17421.  static int __devinit dfx_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
    17422. 

  17422.  {
    17423. 

  17423. -	return dfx_init_one_pci_or_eisa(pdev, 0);
    17424. 

  17424. +	return dfx_init_one_pci_or_eisa(pdev, DFX_BUS_TYPE_PCI, 0);
    17425. 

  17425.  }
    17426. 

  17426.  
    17427. 

  17427.  static int __init dfx_eisa_init(void)
    17428. 

  17428. @@ -507,6 +583,7 @@ static int __init dfx_eisa_init(void)
    17429. 

  17429.  
    17430. 

  17430.  	DBG_printk("In dfx_eisa_init...\n");
    17431. 

  17431.  
    17432. 

  17432. +#ifdef CONFIG_EISA
    17433. 

  17433.  	/* Scan for FDDI EISA controllers */
    17434. 

  17434.  
    17435. 

  17435.  	for (i=0; i < DFX_MAX_EISA_SLOTS; i++)		/* only scan for up to 16 EISA slots */
    17436. 

  17436. @@ -517,9 +594,27 @@ static int __init dfx_eisa_init(void)
    17437. 

  17437.  		{
    17438. 

  17438.  			port = (i << 12);					/* recalc base addr */
    17439. 

  17439.  
    17440. 

  17440. -			if (dfx_init_one_pci_or_eisa(NULL, port) == 0) rc = 0;
    17441. 

  17441. +			if (dfx_init_one_pci_or_eisa(NULL, DFX_BUS_TYPE_EISA, port) == 0) rc = 0;
    17442. 

  17442.  		}
    17443. 

  17443.  	}
    17444. 

  17444. +#endif
    17445. 

  17445. +	return rc;
    17446. 

  17446. +}
    17447. 

  17447. +
    17448. 

  17448. +static int __init dfx_tc_init(void)
    17449. 

  17449. +{
    17450. 

  17450. +	int rc = -ENODEV;
    17451. 

  17451. +	int slot;		/* TC slot number */
    17452. 

  17452. +
    17453. 

  17453. +	DBG_printk("In dfx_tc_init...\n");
    17454. 

  17454. +
    17455. 

  17455. +	/* Scan for FDDI TC controllers */
    17456. 

  17456. +	while ((slot = search_tc_card("PMAF-F")) >= 0) {
    17457. 

  17457. +		if (dfx_init_one_pci_or_eisa(NULL, DFX_BUS_TYPE_TC, slot) == 0)
    17458. 

  17458. +			rc = 0;
    17459. 

  17459. +		else
    17460. 

  17460. +			break;
    17461. 

  17461. +	}
    17462. 

  17462.  	return rc;
    17463. 

  17463.  }
    17464. 

  17464.  
    17465. 

  17465. @@ -583,8 +678,9 @@ static void __devinit dfx_bus_init(struc
    17466. 

  17466.  
    17467. 

  17467.  	/* Initialize adapter based on bus type */
    17468. 

  17468.  
    17469. 

  17469. -	if (bp->bus_type == DFX_BUS_TYPE_EISA)
    17470. 

  17470. -		{
    17471. 

  17471. +	if (bp->bus_type == DFX_BUS_TYPE_TC) {
    17472. 

  17472. +		dev->irq = get_tc_irq_nr(bp->slot);
    17473. 

  17473. +	} else if (bp->bus_type == DFX_BUS_TYPE_EISA) {
    17474. 

  17474.  		/* Get the interrupt level from the ESIC chip */
    17475. 

  17475.  
    17476. 

  17476.  		dfx_port_read_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, &val);
    17477. 

  17477. @@ -766,6 +862,7 @@ static void __devinit dfx_bus_config_che
    17478. 

  17478.   *       
    17479. 

  17479.   * Arguments:
    17480. 

  17480.   *   dev - pointer to device information
    17481. 

  17481. + *   print_name - printable device name
    17482. 

  17482.   *
    17483. 

  17483.   * Functional Description:
    17484. 

  17484.   *   This function allocates additional resources such as the host memory
    17485. 

  17485. @@ -780,20 +877,21 @@ static void __devinit dfx_bus_config_che
    17486. 

  17486.   *						or read adapter MAC address
    17487. 

  17487.   *
    17488. 

  17488.   * Assumptions:
    17489. 

  17489. - *   Memory allocated from kmalloc() call is physically contiguous, locked
    17490. 

  17490. - *   memory whose physical address equals its virtual address.
    17491. 

  17491. + *   Memory allocated from pci_alloc_consistent() call is physically
    17492. 

  17492. + *   contiguous, locked memory.
    17493. 

  17493.   *
    17494. 

  17494.   * Side Effects:
    17495. 

  17495.   *   Adapter is reset and should be in DMA_UNAVAILABLE state before
    17496. 

  17496.   *   returning from this routine.
    17497. 

  17497.   */
    17498. 

  17498.  
    17499. 

  17499. -static int __devinit dfx_driver_init(struct net_device *dev)
    17500. 

  17500. +static int __devinit dfx_driver_init(struct net_device *dev,
    17501. 

  17501. +				     const char *print_name)
    17502. 

  17502.  {
    17503. 

  17503.  	DFX_board_t *bp = dev->priv;
    17504. 

  17504.  	int			alloc_size;			/* total buffer size needed */
    17505. 

  17505.  	char		*top_v, *curr_v;	/* virtual addrs into memory block */
    17506. 

  17506. -	u32			top_p, curr_p;		/* physical addrs into memory block */
    17507. 

  17507. +	dma_addr_t		top_p, curr_p;		/* physical addrs into memory block */
    17508. 

  17508.  	u32			data;				/* host data register value */
    17509. 

  17509.  
    17510. 

  17510.  	DBG_printk("In dfx_driver_init...\n");
    17511. 

  17511. @@ -837,26 +935,20 @@ static int __devinit dfx_driver_init(str
    17512. 

  17512.  
    17513. 

  17513.  	/*  Read the factory MAC address from the adapter then save it */
    17514. 

  17514.  
    17515. 

  17515. -	if (dfx_hw_port_ctrl_req(bp,
    17516. 

  17516. -							PI_PCTRL_M_MLA,
    17517. 

  17517. -							PI_PDATA_A_MLA_K_LO,
    17518. 

  17518. -							0,
    17519. 

  17519. -							&data) != DFX_K_SUCCESS)
    17520. 

  17520. -		{
    17521. 

  17521. -		printk("%s: Could not read adapter factory MAC address!\n", dev->name);
    17522. 

  17522. +	if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_LO, 0,
    17523. 

  17523. +				 &data) != DFX_K_SUCCESS) {
    17524. 

  17524. +		printk("%s: Could not read adapter factory MAC address!\n",
    17525. 

  17525. +		       print_name);
    17526. 

  17526.  		return(DFX_K_FAILURE);
    17527. 

  17527. -		}
    17528. 

  17528. +	}
    17529. 

  17529.  	memcpy(&bp->factory_mac_addr[0], &data, sizeof(u32));
    17530. 

  17530.  
    17531. 

  17531. -	if (dfx_hw_port_ctrl_req(bp,
    17532. 

  17532. -							PI_PCTRL_M_MLA,
    17533. 

  17533. -							PI_PDATA_A_MLA_K_HI,
    17534. 

  17534. -							0,
    17535. 

  17535. -							&data) != DFX_K_SUCCESS)
    17536. 

  17536. -		{
    17537. 

  17537. -		printk("%s: Could not read adapter factory MAC address!\n", dev->name);
    17538. 

  17538. +	if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_HI, 0,
    17539. 

  17539. +				 &data) != DFX_K_SUCCESS) {
    17540. 

  17540. +		printk("%s: Could not read adapter factory MAC address!\n",
    17541. 

  17541. +		       print_name);
    17542. 

  17542.  		return(DFX_K_FAILURE);
    17543. 

  17543. -		}
    17544. 

  17544. +	}
    17545. 

  17545.  	memcpy(&bp->factory_mac_addr[4], &data, sizeof(u16));
    17546. 

  17546.  
    17547. 

  17547.  	/*
    17548. 

  17548. @@ -867,28 +959,27 @@ static int __devinit dfx_driver_init(str
    17549. 

  17549.  	 */
    17550. 

  17550.  
    17551. 

  17551.  	memcpy(dev->dev_addr, bp->factory_mac_addr, FDDI_K_ALEN);
    17552. 

  17552. -	if (bp->bus_type == DFX_BUS_TYPE_EISA)
    17553. 

  17553. -		printk("%s: DEFEA at I/O addr = 0x%lX, IRQ = %d, Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
    17554. 

  17554. -				dev->name,
    17555. 

  17555. -				dev->base_addr,
    17556. 

  17556. -				dev->irq,
    17557. 

  17557. -				dev->dev_addr[0],
    17558. 

  17558. -				dev->dev_addr[1],
    17559. 

  17559. -				dev->dev_addr[2],
    17560. 

  17560. -				dev->dev_addr[3],
    17561. 

  17561. -				dev->dev_addr[4],
    17562. 

  17562. -				dev->dev_addr[5]);
    17563. 

  17563. +	if (bp->bus_type == DFX_BUS_TYPE_TC)
    17564. 

  17564. +		printk("%s: DEFTA at addr = 0x%lX, IRQ = %d, "
    17565. 

  17565. +		       "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
    17566. 

  17566. +		       print_name, dev->base_addr, dev->irq,
    17567. 

  17567. +		       dev->dev_addr[0], dev->dev_addr[1],
    17568. 

  17568. +		       dev->dev_addr[2], dev->dev_addr[3],
    17569. 

  17569. +		       dev->dev_addr[4], dev->dev_addr[5]);
    17570. 

  17570. +	else if (bp->bus_type == DFX_BUS_TYPE_EISA)
    17571. 

  17571. +		printk("%s: DEFEA at I/O addr = 0x%lX, IRQ = %d, "
    17572. 

  17572. +		       "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
    17573. 

  17573. +		       print_name, dev->base_addr, dev->irq,
    17574. 

  17574. +		       dev->dev_addr[0], dev->dev_addr[1],
    17575. 

  17575. +		       dev->dev_addr[2], dev->dev_addr[3],
    17576. 

  17576. +		       dev->dev_addr[4], dev->dev_addr[5]);
    17577. 

  17577.  	else
    17578. 

  17578. -		printk("%s: DEFPA at I/O addr = 0x%lX, IRQ = %d, Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
    17579. 

  17579. -				dev->name,
    17580. 

  17580. -				dev->base_addr,
    17581. 

  17581. -				dev->irq,
    17582. 

  17582. -				dev->dev_addr[0],
    17583. 

  17583. -				dev->dev_addr[1],
    17584. 

  17584. -				dev->dev_addr[2],
    17585. 

  17585. -				dev->dev_addr[3],
    17586. 

  17586. -				dev->dev_addr[4],
    17587. 

  17587. -				dev->dev_addr[5]);
    17588. 

  17588. +		printk("%s: DEFPA at I/O addr = 0x%lX, IRQ = %d, "
    17589. 

  17589. +		       "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
    17590. 

  17590. +		       print_name, dev->base_addr, dev->irq,
    17591. 

  17591. +		       dev->dev_addr[0], dev->dev_addr[1],
    17592. 

  17592. +		       dev->dev_addr[2], dev->dev_addr[3],
    17593. 

  17593. +		       dev->dev_addr[4], dev->dev_addr[5]);
    17594. 

  17594.  
    17595. 

  17595.  	/*
    17596. 

  17596.  	 * Get memory for descriptor block, consumer block, and other buffers
    17597. 

  17597. @@ -903,14 +994,15 @@ static int __devinit dfx_driver_init(str
    17598. 

  17598.  #endif
    17599. 

  17599.  					sizeof(PI_CONSUMER_BLOCK) +
    17600. 

  17600.  					(PI_ALIGN_K_DESC_BLK - 1);
    17601. 

  17601. -	bp->kmalloced = top_v = (char *) kmalloc(alloc_size, GFP_KERNEL);
    17602. 

  17602. -	if (top_v == NULL)
    17603. 

  17603. -		{
    17604. 

  17604. -		printk("%s: Could not allocate memory for host buffers and structures!\n", dev->name);
    17605. 

  17605. +	bp->kmalloced = top_v = pci_alloc_consistent(bp->pci_dev, alloc_size,
    17606. 

  17606. +						     &bp->kmalloced_dma);
    17607. 

  17607. +	if (top_v == NULL) {
    17608. 

  17608. +		printk("%s: Could not allocate memory for host buffers "
    17609. 

  17609. +		       "and structures!\n", print_name);
    17610. 

  17610.  		return(DFX_K_FAILURE);
    17611. 

  17611. -		}
    17612. 

  17612. +	}
    17613. 

  17613.  	memset(top_v, 0, alloc_size);	/* zero out memory before continuing */
    17614. 

  17614. -	top_p = virt_to_bus(top_v);		/* get physical address of buffer */
    17615. 

  17615. +	top_p = bp->kmalloced_dma;	/* get physical address of buffer */
    17616. 

  17616.  
    17617. 

  17617.  	/*
    17618. 

  17618.  	 *  To guarantee the 8K alignment required for the descriptor block, 8K - 1
    17619. 

  17619. @@ -924,7 +1016,7 @@ static int __devinit dfx_driver_init(str
    17620. 

  17620.  	 *		  for allocating the needed memory.
    17621. 

  17621.  	 */
    17622. 

  17622.  
    17623. 

  17623. -	curr_p = (u32) (ALIGN(top_p, PI_ALIGN_K_DESC_BLK));
    17624. 

  17624. +	curr_p = ALIGN(top_p, PI_ALIGN_K_DESC_BLK);
    17625. 

  17625.  	curr_v = top_v + (curr_p - top_p);
    17626. 

  17626.  
    17627. 

  17627.  	/* Reserve space for descriptor block */
    17628. 

  17628. @@ -965,14 +1057,20 @@ static int __devinit dfx_driver_init(str
    17629. 

  17629.  
    17630. 

  17630.  	/* Display virtual and physical addresses if debug driver */
    17631. 

  17631.  
    17632. 

  17632. -	DBG_printk("%s: Descriptor block virt = %0lX, phys = %0X\n",				dev->name, (long)bp->descr_block_virt,	bp->descr_block_phys);
    17633. 

  17633. -	DBG_printk("%s: Command Request buffer virt = %0lX, phys = %0X\n",			dev->name, (long)bp->cmd_req_virt,		bp->cmd_req_phys);
    17634. 

  17634. -	DBG_printk("%s: Command Response buffer virt = %0lX, phys = %0X\n",			dev->name, (long)bp->cmd_rsp_virt,		bp->cmd_rsp_phys);
    17635. 

  17635. -	DBG_printk("%s: Receive buffer block virt = %0lX, phys = %0X\n",			dev->name, (long)bp->rcv_block_virt,	bp->rcv_block_phys);
    17636. 

  17636. -	DBG_printk("%s: Consumer block virt = %0lX, phys = %0X\n",				dev->name, (long)bp->cons_block_virt,	bp->cons_block_phys);
    17637. 

  17637. +	DBG_printk("%s: Descriptor block virt = %0lX, phys = %0X\n",
    17638. 

  17638. +		   print_name,
    17639. 

  17639. +		   (long)bp->descr_block_virt, bp->descr_block_phys);
    17640. 

  17640. +	DBG_printk("%s: Command Request buffer virt = %0lX, phys = %0X\n",
    17641. 

  17641. +		   print_name, (long)bp->cmd_req_virt, bp->cmd_req_phys);
    17642. 

  17642. +	DBG_printk("%s: Command Response buffer virt = %0lX, phys = %0X\n",
    17643. 

  17643. +		   print_name, (long)bp->cmd_rsp_virt, bp->cmd_rsp_phys);
    17644. 

  17644. +	DBG_printk("%s: Receive buffer block virt = %0lX, phys = %0X\n",
    17645. 

  17645. +		   print_name, (long)bp->rcv_block_virt, bp->rcv_block_phys);
    17646. 

  17646. +	DBG_printk("%s: Consumer block virt = %0lX, phys = %0X\n",
    17647. 

  17647. +		   print_name, (long)bp->cons_block_virt, bp->cons_block_phys);
    17648. 

  17648.  
    17649. 

  17649.  	return(DFX_K_SUCCESS);
    17650. 

  17650. -	}
    17651. 

  17651. +}
    17652. 

  17652.  
    17653. 

  17653.  
    17654. 

  17654.  /*
    17655. 

  17655. @@ -1218,7 +1316,9 @@ static int dfx_open(struct net_device *d
    17656. 

  17656.  	
    17657. 

  17657.  	/* Register IRQ - support shared interrupts by passing device ptr */
    17658. 

  17658.  
    17659. 

  17659. -	ret = request_irq(dev->irq, (void *)dfx_interrupt, SA_SHIRQ, dev->name, dev);
    17660. 

  17660. +	ret = request_irq(dev->irq, (void *)dfx_interrupt,
    17661. 

  17661. +			  (bp->bus_type == DFX_BUS_TYPE_TC) ? 0 : SA_SHIRQ,
    17662. 

  17662. +			  dev->name, dev);
    17663. 

  17663.  	if (ret) {
    17664. 

  17664.  		printk(KERN_ERR "%s: Requested IRQ %d is busy\n", dev->name, dev->irq);
    17665. 

  17665.  		return ret;
    17666. 

  17666. @@ -1737,7 +1837,7 @@ static void dfx_interrupt(int irq, void 
    17667. 

  17667.  		dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL,
    17668. 

  17668.  					(PFI_MODE_M_PDQ_INT_ENB + PFI_MODE_M_DMA_ENB));
    17669. 

  17669.  		}
    17670. 

  17670. -	else
    17671. 

  17671. +	else if (bp->bus_type == DFX_BUS_TYPE_EISA)
    17672. 

  17672.  		{
    17673. 

  17673.  		/* Disable interrupts at the ESIC */
    17674. 

  17674.  
    17675. 

  17675. @@ -1755,6 +1855,13 @@ static void dfx_interrupt(int irq, void 
    17676. 

  17676.  		tmp |= PI_CONFIG_STAT_0_M_INT_ENB;
    17677. 

  17677.  		dfx_port_write_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, tmp);
    17678. 

  17678.  		}
    17679. 

  17679. +	else {
    17680. 

  17680. +		/* TC doesn't share interrupts so no need to disable them */
    17681. 

  17681. +
    17682. 

  17682. +		/* Call interrupt service routine for this adapter */
    17683. 

  17683. +
    17684. 

  17684. +		dfx_int_common(dev);
    17685. 

  17685. +	}
    17686. 

  17686.  
    17687. 

  17687.  	spin_unlock(&bp->lock);
    17688. 

  17688.  	}
    17689. 

  17689. @@ -2663,12 +2770,12 @@ static int dfx_hw_dma_uninit(DFX_board_t
    17690. 

  17690.   
    17691. 

  17691.  static void my_skb_align(struct sk_buff *skb, int n)
    17692. 

  17692.  {
    17693. 

  17693. -	u32 x=(u32)skb->data;	/* We only want the low bits .. */
    17694. 

  17694. -	u32 v;
    17695. 

  17695. +	unsigned long x = (unsigned long)skb->data;
    17696. 

  17696. +	unsigned long v;
    17697. 

  17697.  	
    17698. 

  17698. -	v=(x+n-1)&~(n-1);	/* Where we want to be */
    17699. 

  17699. +	v = ALIGN(x, n);	/* Where we want to be */
    17700. 

  17700.  	
    17701. 

  17701. -	skb_reserve(skb, v-x);
    17702. 

  17702. +	skb_reserve(skb, v - x);
    17703. 

  17703.  }
    17704. 

  17704.  
    17705. 

  17705.  
    17706. 

  17706. @@ -2745,7 +2852,10 @@ static int dfx_rcv_init(DFX_board_t *bp,
    17707. 

  17707.  			 */
    17708. 

  17708.  			 
    17709. 

  17709.  			my_skb_align(newskb, 128);
    17710. 

  17710. -			bp->descr_block_virt->rcv_data[i+j].long_1 = virt_to_bus(newskb->data);
    17711. 

  17711. +			bp->descr_block_virt->rcv_data[i + j].long_1 =
    17712. 

  17712. +				(u32)pci_map_single(bp->pci_dev, newskb->data,
    17713. 

  17713. +						    NEW_SKB_SIZE,
    17714. 

  17714. +						    PCI_DMA_FROMDEVICE);
    17715. 

  17715.  			/*
    17716. 

  17716.  			 * p_rcv_buff_va is only used inside the
    17717. 

  17717.  			 * kernel so we put the skb pointer here.
    17718. 

  17718. @@ -2859,9 +2969,17 @@ static void dfx_rcv_queue_process(
    17719. 

  17719.  						
    17720. 

  17720.  						my_skb_align(newskb, 128);
    17721. 

  17721.  						skb = (struct sk_buff *)bp->p_rcv_buff_va[entry];
    17722. 

  17722. +						pci_unmap_single(bp->pci_dev,
    17723. 

  17723. +							bp->descr_block_virt->rcv_data[entry].long_1,
    17724. 

  17724. +							NEW_SKB_SIZE,
    17725. 

  17725. +							PCI_DMA_FROMDEVICE);
    17726. 

  17726.  						skb_reserve(skb, RCV_BUFF_K_PADDING);
    17727. 

  17727.  						bp->p_rcv_buff_va[entry] = (char *)newskb;
    17728. 

  17728. -						bp->descr_block_virt->rcv_data[entry].long_1 = virt_to_bus(newskb->data);
    17729. 

  17729. +						bp->descr_block_virt->rcv_data[entry].long_1 =
    17730. 

  17730. +							(u32)pci_map_single(bp->pci_dev,
    17731. 

  17731. +								newskb->data,
    17732. 

  17732. +								NEW_SKB_SIZE,
    17733. 

  17733. +								PCI_DMA_FROMDEVICE);
    17734. 

  17734.  					} else
    17735. 

  17735.  						skb = NULL;
    17736. 

  17736.  				} else
    17737. 

  17737. @@ -2934,7 +3052,7 @@ static void dfx_rcv_queue_process(
    17738. 

  17738.   *   is contained in a single physically contiguous buffer
    17739. 

  17739.   *   in which the virtual address of the start of packet
    17740. 

  17740.   *   (skb->data) can be converted to a physical address
    17741. 

  17741. - *   by using virt_to_bus().
    17742. 

  17742. + *   by using pci_map_single().
    17743. 

  17743.   *
    17744. 

  17744.   *   Since the adapter architecture requires a three byte
    17745. 

  17745.   *   packet request header to prepend the start of packet,
    17746. 

  17746. @@ -3082,12 +3200,13 @@ static int dfx_xmt_queue_pkt(
    17747. 

  17747.  	 *			skb->data.
    17748. 

  17748.  	 *		 6. The physical address of the start of packet
    17749. 

  17749.  	 *			can be determined from the virtual address
    17750. 

  17750. -	 *			by using virt_to_bus() and is only 32-bits
    17751. 

  17751. +	 *			by using pci_map_single() and is only 32-bits
    17752. 

  17752.  	 *			wide.
    17753. 

  17753.  	 */
    17754. 

  17754.  
    17755. 

  17755.  	p_xmt_descr->long_0	= (u32) (PI_XMT_DESCR_M_SOP | PI_XMT_DESCR_M_EOP | ((skb->len) << PI_XMT_DESCR_V_SEG_LEN));
    17756. 

  17756. -	p_xmt_descr->long_1 = (u32) virt_to_bus(skb->data);
    17757. 

  17757. +	p_xmt_descr->long_1 = (u32)pci_map_single(bp->pci_dev, skb->data,
    17758. 

  17758. +						  skb->len, PCI_DMA_TODEVICE);
    17759. 

  17759.  
    17760. 

  17760.  	/*
    17761. 

  17761.  	 * Verify that descriptor is actually available
    17762. 

  17762. @@ -3171,6 +3290,7 @@ static int dfx_xmt_done(DFX_board_t *bp)
    17763. 

  17763.  	{
    17764. 

  17764.  	XMT_DRIVER_DESCR	*p_xmt_drv_descr;	/* ptr to transmit driver descriptor */
    17765. 

  17765.  	PI_TYPE_2_CONSUMER	*p_type_2_cons;		/* ptr to rcv/xmt consumer block register */
    17766. 

  17766. +	u8			comp;			/* local transmit completion index */
    17767. 

  17767.  	int 			freed = 0;		/* buffers freed */
    17768. 

  17768.  
    17769. 

  17769.  	/* Service all consumed transmit frames */
    17770. 

  17770. @@ -3188,7 +3308,11 @@ static int dfx_xmt_done(DFX_board_t *bp)
    17771. 

  17771.  		bp->xmt_total_bytes += p_xmt_drv_descr->p_skb->len;
    17772. 

  17772.  
    17773. 

  17773.  		/* Return skb to operating system */
    17774. 

  17774. -
    17775. 

  17775. +		comp = bp->rcv_xmt_reg.index.xmt_comp;
    17776. 

  17776. +		pci_unmap_single(bp->pci_dev,
    17777. 

  17777. +				 bp->descr_block_virt->xmt_data[comp].long_1,
    17778. 

  17778. +				 p_xmt_drv_descr->p_skb->len,
    17779. 

  17779. +				 PCI_DMA_TODEVICE);
    17780. 

  17780.  		dev_kfree_skb_irq(p_xmt_drv_descr->p_skb);
    17781. 

  17781.  
    17782. 

  17782.  		/*
    17783. 

  17783. @@ -3297,6 +3421,7 @@ static void dfx_xmt_flush( DFX_board_t *
    17784. 

  17784.  	{
    17785. 

  17785.  	u32			prod_cons;		/* rcv/xmt consumer block longword */
    17786. 

  17786.  	XMT_DRIVER_DESCR	*p_xmt_drv_descr;	/* ptr to transmit driver descriptor */
    17787. 

  17787. +	u8			comp;			/* local transmit completion index */
    17788. 

  17788.  
    17789. 

  17789.  	/* Flush all outstanding transmit frames */
    17790. 

  17790.  
    17791. 

  17791. @@ -3307,7 +3432,11 @@ static void dfx_xmt_flush( DFX_board_t *
    17792. 

  17792.  		p_xmt_drv_descr = &(bp->xmt_drv_descr_blk[bp->rcv_xmt_reg.index.xmt_comp]);
    17793. 

  17793.  
    17794. 

  17794.  		/* Return skb to operating system */
    17795. 

  17795. -
    17796. 

  17796. +		comp = bp->rcv_xmt_reg.index.xmt_comp;
    17797. 

  17797. +		pci_unmap_single(bp->pci_dev,
    17798. 

  17798. +				 bp->descr_block_virt->xmt_data[comp].long_1,
    17799. 

  17799. +				 p_xmt_drv_descr->p_skb->len,
    17800. 

  17800. +				 PCI_DMA_TODEVICE);
    17801. 

  17801.  		dev_kfree_skb(p_xmt_drv_descr->p_skb);
    17802. 

  17802.  
    17803. 

  17803.  		/* Increment transmit error counter */
    17804. 

  17804. @@ -3337,12 +3466,36 @@ static void dfx_xmt_flush( DFX_board_t *
    17805. 

  17805.  
    17806. 

  17806.  static void __devexit dfx_remove_one_pci_or_eisa(struct pci_dev *pdev, struct net_device *dev)
    17807. 

  17807.  {
    17808. 

  17808. -	DFX_board_t	  *bp = dev->priv;
    17809. 

  17809. +	DFX_board_t	*bp = dev->priv;
    17810. 

  17810. +	unsigned long	len;			/* resource length */
    17811. 

  17811. +	int		alloc_size;		/* total buffer size used */
    17812. 

  17812.  
    17813. 

  17813. +	if (bp->bus_type == DFX_BUS_TYPE_TC) {
    17814. 

  17814. +		/* TURBOchannel board */
    17815. 

  17815. +		len = PI_TC_K_CSR_LEN;
    17816. 

  17816. +	} else if (bp->bus_type == DFX_BUS_TYPE_EISA) {
    17817. 

  17817. +		/* EISA board */
    17818. 

  17818. +		len = PI_ESIC_K_CSR_IO_LEN;
    17819. 

  17819. +	} else {
    17820. 

  17820. +		len = PFI_K_CSR_IO_LEN;
    17821. 

  17821. +	}
    17822. 

  17822.  	unregister_netdev(dev);
    17823. 

  17823. -	release_region(dev->base_addr,  pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN );
    17824. 

  17824. -	if (bp->kmalloced) kfree(bp->kmalloced);
    17825. 

  17825. -	kfree(dev);
    17826. 

  17826. +	release_region(dev->base_addr, len);
    17827. 

  17827. +
    17828. 

  17828. +	if (bp->bus_type == DFX_BUS_TYPE_TC)
    17829. 

  17829. +		release_tc_card(bp->slot);
    17830. 

  17830. +
    17831. 

  17831. +	alloc_size = sizeof(PI_DESCR_BLOCK) +
    17832. 

  17832. +		     PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX +
    17833. 

  17833. +#ifndef DYNAMIC_BUFFERS
    17834. 

  17834. +		     (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
    17835. 

  17835. +#endif
    17836. 

  17836. +		     sizeof(PI_CONSUMER_BLOCK) +
    17837. 

  17837. +		     (PI_ALIGN_K_DESC_BLK - 1);
    17838. 

  17838. +	if (bp->kmalloced)
    17839. 

  17839. +		pci_free_consistent(pdev, alloc_size, bp->kmalloced,
    17840. 

  17840. +				    bp->kmalloced_dma);
    17841. 

  17841. +	free_netdev(dev);
    17842. 

  17842.  }
    17843. 

  17843.  
    17844. 

  17844.  static void __devexit dfx_remove_one (struct pci_dev *pdev)
    17845. 

  17845. @@ -3353,21 +3506,22 @@ static void __devexit dfx_remove_one (st
    17846. 

  17846.  	pci_set_drvdata(pdev, NULL);
    17847. 

  17847.  }
    17848. 

  17848.  
    17849. 

  17849. -static struct pci_device_id dfx_pci_tbl[] __devinitdata = {
    17850. 

  17850. +static struct pci_device_id dfx_pci_tbl[] = {
    17851. 

  17851.  	{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_FDDI, PCI_ANY_ID, PCI_ANY_ID, },
    17852. 

  17852.  	{ 0, }
    17853. 

  17853.  };
    17854. 

  17854.  MODULE_DEVICE_TABLE(pci, dfx_pci_tbl);
    17855. 

  17855.  
    17856. 

  17856.  static struct pci_driver dfx_driver = {
    17857. 

  17857. -	name:		"defxx",
    17858. 

  17858. -	probe:		dfx_init_one,
    17859. 

  17859. -	remove:		__devexit_p(dfx_remove_one),
    17860. 

  17860. -	id_table:	dfx_pci_tbl,
    17861. 

  17861. +	.name		= "defxx",
    17862. 

  17862. +	.probe		= dfx_init_one,
    17863. 

  17863. +	.remove		= __devexit_p(dfx_remove_one),
    17864. 

  17864. +	.id_table	= dfx_pci_tbl,
    17865. 

  17865.  };
    17866. 

  17866.  
    17867. 

  17867.  static int dfx_have_pci;
    17868. 

  17868.  static int dfx_have_eisa;
    17869. 

  17869. +static int dfx_have_tc;
    17870. 

  17870.  
    17871. 

  17871.  
    17872. 

  17872.  static void __exit dfx_eisa_cleanup(void)
    17873. 

  17873. @@ -3388,12 +3542,7 @@ static void __exit dfx_eisa_cleanup(void
    17874. 

  17874.  
    17875. 

  17875.  static int __init dfx_init(void)
    17876. 

  17876.  {
    17877. 

  17877. -	int rc_pci, rc_eisa;
    17878. 

  17878. -
    17879. 

  17879. -/* when a module, this is printed whether or not devices are found in probe */
    17880. 

  17880. -#ifdef MODULE
    17881. 

  17881. -	printk(version);
    17882. 

  17882. -#endif
    17883. 

  17883. +	int rc_pci, rc_eisa, rc_tc;
    17884. 

  17884.  
    17885. 

  17885.  	rc_pci = pci_module_init(&dfx_driver);
    17886. 

  17886.  	if (rc_pci >= 0) dfx_have_pci = 1;
    17887. 

  17887. @@ -3401,20 +3550,27 @@ static int __init dfx_init(void)
    17888. 

  17888.  	rc_eisa = dfx_eisa_init();
    17889. 

  17889.  	if (rc_eisa >= 0) dfx_have_eisa = 1;
    17890. 

  17890.  
    17891. 

  17891. -	return ((rc_eisa < 0) ? 0 : rc_eisa)  + ((rc_pci < 0) ? 0 : rc_pci); 
    17892. 

  17892. +	rc_tc = dfx_tc_init();
    17893. 

  17893. +	if (rc_tc >= 0) dfx_have_tc = 1;
    17894. 

  17894. +
    17895. 

  17895. +	return ((rc_tc < 0) ? 0 : rc_tc) +
    17896. 

  17896. +	       ((rc_eisa < 0) ? 0 : rc_eisa) +
    17897. 

  17897. +	       ((rc_pci < 0) ? 0 : rc_pci); 
    17898. 

  17898.  }
    17899. 

  17899.  
    17900. 

  17900.  static void __exit dfx_cleanup(void)
    17901. 

  17901.  {
    17902. 

  17902.  	if (dfx_have_pci)
    17903. 

  17903.  		pci_unregister_driver(&dfx_driver);
    17904. 

  17904. -	if (dfx_have_eisa)
    17905. 

  17905. +	if (dfx_have_eisa || dfx_have_tc)
    17906. 

  17906.  		dfx_eisa_cleanup();
    17907. 

  17907. -		
    17908. 

  17908.  }	
    17909. 

  17909.  
    17910. 

  17910.  module_init(dfx_init);
    17911. 

  17911.  module_exit(dfx_cleanup);
    17912. 

  17912. +MODULE_AUTHOR("Lawrence V. Stefani");
    17913. 

  17913. +MODULE_DESCRIPTION("DEC FDDIcontroller EISA/PCI (DEFEA/DEFPA) driver "
    17914. 

  17914. +		   DRV_VERSION " " DRV_RELDATE);
    17915. 

  17915.  MODULE_LICENSE("GPL");
    17916. 

  17916.  
    17917. 

  17917.  
    17918. 

  17918. --- a/drivers/net/defxx.h
    17919. 

  17919. +++ b/drivers/net/defxx.h
    17920. 

  17920. @@ -12,17 +12,11 @@
    17921. 

  17921.   *   Contains all definitions specified by port specification and required
    17922. 

  17922.   *   by the defxx.c driver.
    17923. 

  17923.   *
    17924. 

  17924. - * Maintainers:
    17925. 

  17925. - *   LVS	Lawrence V. Stefani
    17926. 

  17926. - *
    17927. 

  17927. - * Contact:
    17928. 

  17928. - *	 The author may be reached at:
    17929. 

  17929. + * The original author:
    17930. 

  17930. + *   LVS	Lawrence V. Stefani <lstefani@yahoo.com>
    17931. 

  17931.   *
    17932. 

  17932. - *		Inet: stefani@lkg.dec.com
    17933. 

  17933. - *		Mail: Digital Equipment Corporation
    17934. 

  17934. - *			  550 King Street
    17935. 

  17935. - *			  M/S: LKG1-3/M07
    17936. 

  17936. - *			  Littleton, MA  01460
    17937. 

  17937. + * Maintainers:
    17938. 

  17938. + *   macro	Maciej W. Rozycki <macro@linux-mips.org>
    17939. 

  17939.   *
    17940. 

  17940.   * Modification History:
    17941. 

  17941.   *		Date		Name	Description
    17942. 

  17942. @@ -30,6 +24,7 @@
    17943. 

  17943.   *		09-Sep-96	LVS		Added group_prom field.  Moved read/write I/O
    17944. 

  17944.   *							macros to DEFXX.C.
    17945. 

  17945.   *		12-Sep-96	LVS		Removed packet request header pointers.
    17946. 

  17946. + *		04 Aug 2003	macro		Converted to the DMA API.
    17947. 

  17947.   */
    17948. 

  17948.  
    17949. 

  17949.  #ifndef _DEFXX_H_
    17950. 

  17950. @@ -1467,6 +1462,11 @@ typedef union
    17951. 

  17951.  
    17952. 

  17952.  #endif	/* #ifndef BIG_ENDIAN */
    17953. 

  17953.  
    17954. 

  17954. +/* Define TC PDQ CSR offset and length */
    17955. 

  17955. +
    17956. 

  17956. +#define PI_TC_K_CSR_OFFSET		0x100000
    17957. 

  17957. +#define PI_TC_K_CSR_LEN			0x80		/* 128 bytes */
    17958. 

  17958. +
    17959. 

  17959.  /* Define EISA controller register offsets */
    17960. 

  17960.  
    17961. 

  17961.  #define PI_ESIC_K_BURST_HOLDOFF		0x040
    17962. 

  17962. @@ -1634,6 +1634,7 @@ typedef union
    17963. 

  17963.  
    17964. 

  17964.  #define DFX_BUS_TYPE_PCI		0			/* type code for DEC FDDIcontroller/PCI */
    17965. 

  17965.  #define DFX_BUS_TYPE_EISA		1			/* type code for DEC FDDIcontroller/EISA */
    17966. 

  17966. +#define DFX_BUS_TYPE_TC			2			/* type code for DEC FDDIcontroller/TURBOchannel */
    17967. 

  17967.  
    17968. 

  17968.  #define DFX_FC_PRH2_PRH1_PRH0		0x54003820	/* Packet Request Header bytes + FC */
    17969. 

  17969.  #define DFX_PRH0_BYTE			0x20		/* Packet Request Header byte 0 */
    17970. 

  17970. @@ -1704,17 +1705,19 @@ typedef struct DFX_board_tag
    17971. 

  17971.  	{
    17972. 

  17972.  	/* Keep virtual and physical pointers to locked, physically contiguous memory */
    17973. 

  17973.  
    17974. 

  17974. -	char				*kmalloced;					/* kfree this on unload */ 
    17975. 

  17975. +	char				*kmalloced;					/* pci_free_consistent this on unload */ 
    17976. 

  17976. +	dma_addr_t			kmalloced_dma;
    17977. 

  17977. +	/* DMA handle for the above */
    17978. 

  17978.  	PI_DESCR_BLOCK			*descr_block_virt;				/* PDQ descriptor block virt address */
    17979. 

  17979. -	u32				descr_block_phys;				/* PDQ descriptor block phys address */
    17980. 

  17980. +	dma_addr_t			descr_block_phys;				/* PDQ descriptor block phys address */
    17981. 

  17981.  	PI_DMA_CMD_REQ			*cmd_req_virt;					/* Command request buffer virt address */
    17982. 

  17982. -	u32				cmd_req_phys;					/* Command request buffer phys address */
    17983. 

  17983. +	dma_addr_t			cmd_req_phys;					/* Command request buffer phys address */
    17984. 

  17984.  	PI_DMA_CMD_RSP			*cmd_rsp_virt;					/* Command response buffer virt address */
    17985. 

  17985. -	u32				cmd_rsp_phys;					/* Command response buffer phys address */
    17986. 

  17986. +	dma_addr_t			cmd_rsp_phys;					/* Command response buffer phys address */
    17987. 

  17987.  	char				*rcv_block_virt;				/* LLC host receive queue buf blk virt */
    17988. 

  17988. -	u32				rcv_block_phys;					/* LLC host receive queue buf blk phys */
    17989. 

  17989. +	dma_addr_t			rcv_block_phys;					/* LLC host receive queue buf blk phys */
    17990. 

  17990.  	PI_CONSUMER_BLOCK		*cons_block_virt;				/* PDQ consumer block virt address */
    17991. 

  17991. -	u32				cons_block_phys;				/* PDQ consumer block phys address */
    17992. 

  17992. +	dma_addr_t			cons_block_phys;				/* PDQ consumer block phys address */
    17993. 

  17993.  
    17994. 

  17994.  	/* Keep local copies of Type 1 and Type 2 register data */
    17995. 

  17995.  
    17996. 

  17996. @@ -1758,8 +1761,9 @@ typedef struct DFX_board_tag
    17997. 

  17997.  
    17998. 

  17998.  	struct net_device		*dev;						/* pointer to device structure */
    17999. 

  17999.  	struct net_device		*next;
    18000. 

  18000. -	u32				bus_type;					/* bus type (0 == PCI, 1 == EISA) */
    18001. 

  18001. -	u16				base_addr;					/* base I/O address (same as dev->base_addr) */
    18002. 

  18002. +	u32				bus_type;					/* bus type (0 == PCI, 1 == EISA, 2 == TC) */
    18003. 

  18003. +	long				base_addr;					/* base I/O address (same as dev->base_addr) */
    18004. 

  18004. +	int				slot;						/* TC slot number */
    18005. 

  18005.  	struct pci_dev *		pci_dev;
    18006. 

  18006.  	u32				full_duplex_enb;				/* FDDI Full Duplex enable (1 == on, 2 == off) */
    18007. 

  18007.  	u32				req_ttrt;					/* requested TTRT value (in 80ns units) */
    18008. 

  18008. --- a/drivers/net/hamradio/hdlcdrv.c
    18009. 

  18009. +++ b/drivers/net/hamradio/hdlcdrv.c
    18010. 

  18010. @@ -587,6 +587,8 @@ static int hdlcdrv_close(struct net_devi
    18011. 

  18011.  		return -EINVAL;
    18012. 

  18012.  	s = (struct hdlcdrv_state *)dev->priv;
    18013. 

  18013.  
    18014. 

  18014. +	netif_stop_queue(dev);
    18015. 

  18015. +
    18016. 

  18016.  	if (s->ops && s->ops->close)
    18017. 

  18017.  		i = s->ops->close(dev);
    18018. 

  18018.  	if (s->skb)
    18019. 

  18019. --- a/drivers/net/irda/au1k_ir.c
    18020. 

  18020. +++ b/drivers/net/irda/au1k_ir.c
    18021. 

  18021. @@ -81,10 +81,6 @@ static char version[] __devinitdata =
    18022. 

  18022.  
    18023. 

  18023.  #define RUN_AT(x) (jiffies + (x))
    18024. 

  18024.  
    18025. 

  18025. -#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
    18026. 

  18026. -static BCSR * const bcsr = (BCSR *)0xAE000000;
    18027. 

  18027. -#endif
    18028. 

  18028. -
    18029. 

  18029.  static spinlock_t ir_lock = SPIN_LOCK_UNLOCKED;
    18030. 

  18030.  
    18031. 

  18031.  /*
    18032. 

  18032. --- a/drivers/net/sgiseeq.c
    18033. 

  18033. +++ b/drivers/net/sgiseeq.c
    18034. 

  18034. @@ -24,16 +24,16 @@
    18035. 

  18035.  #include <asm/io.h>
    18036. 

  18036.  #include <asm/system.h>
    18037. 

  18037.  #include <asm/bitops.h>
    18038. 

  18038. +#include <asm/paccess.h>
    18039. 

  18039.  #include <asm/page.h>
    18040. 

  18040.  #include <asm/pgtable.h>
    18041. 

  18041. +#include <asm/sgi/mc.h>
    18042. 

  18042.  #include <asm/sgi/hpc3.h>
    18043. 

  18043.  #include <asm/sgi/ip22.h>
    18044. 

  18044.  #include <asm/sgialib.h>
    18045. 

  18045.  
    18046. 

  18046.  #include "sgiseeq.h"
    18047. 

  18047.  
    18048. 

  18048. -static char *version = "sgiseeq.c: David S. Miller (dm@engr.sgi.com)\n";
    18049. 

  18049. -
    18050. 

  18050.  static char *sgiseeqstr = "SGI Seeq8003";
    18051. 

  18051.  
    18052. 

  18052.  /*
    18053. 

  18053. @@ -113,9 +113,9 @@ static struct net_device *root_sgiseeq_d
    18054. 

  18054.  
    18055. 

  18055.  static inline void hpc3_eth_reset(struct hpc3_ethregs *hregs)
    18056. 

  18056.  {
    18057. 

  18057. -	hregs->rx_reset = HPC3_ERXRST_CRESET | HPC3_ERXRST_CLRIRQ;
    18058. 

  18058. +	hregs->reset = HPC3_ERST_CRESET | HPC3_ERST_CLRIRQ;
    18059. 

  18059.  	udelay(20);
    18060. 

  18060. -	hregs->rx_reset = 0;
    18061. 

  18061. +	hregs->reset = 0;
    18062. 

  18062.  }
    18063. 

  18063.  
    18064. 

  18064.  static inline void reset_hpc3_and_seeq(struct hpc3_ethregs *hregs,
    18065. 

  18065. @@ -238,7 +238,6 @@ void sgiseeq_dump_rings(void)
    18066. 

  18066.  
    18067. 

  18067.  #define TSTAT_INIT_SEEQ (SEEQ_TCMD_IPT|SEEQ_TCMD_I16|SEEQ_TCMD_IC|SEEQ_TCMD_IUF)
    18068. 

  18068.  #define TSTAT_INIT_EDLC ((TSTAT_INIT_SEEQ) | SEEQ_TCMD_RB2)
    18069. 

  18069. -#define RDMACFG_INIT    (HPC3_ERXDCFG_FRXDC | HPC3_ERXDCFG_FEOP | HPC3_ERXDCFG_FIRQ)
    18070. 

  18070.  
    18071. 

  18071.  static int init_seeq(struct net_device *dev, struct sgiseeq_private *sp,
    18072. 

  18072.  		     struct sgiseeq_regs *sregs)
    18073. 

  18073. @@ -260,8 +259,6 @@ static int init_seeq(struct net_device *
    18074. 

  18074.  		sregs->tstat = TSTAT_INIT_SEEQ;
    18075. 

  18075.  	}
    18076. 

  18076.  
    18077. 

  18077. -	hregs->rx_dconfig |= RDMACFG_INIT;
    18078. 

  18078. -
    18079. 

  18079.  	hregs->rx_ndptr = PHYSADDR(&sp->srings.rx_desc[0]);
    18080. 

  18080.  	hregs->tx_ndptr = PHYSADDR(&sp->srings.tx_desc[0]);
    18081. 

  18081.  
    18082. 

  18082. @@ -432,7 +429,7 @@ static void sgiseeq_interrupt(int irq, v
    18083. 

  18083.  	spin_lock(&sp->tx_lock);
    18084. 

  18084.  
    18085. 

  18085.  	/* Ack the IRQ and set software state. */
    18086. 

  18086. -	hregs->rx_reset = HPC3_ERXRST_CLRIRQ;
    18087. 

  18087. +	hregs->reset = HPC3_ERST_CLRIRQ;
    18088. 

  18088.  
    18089. 

  18089.  	/* Always check for received packets. */
    18090. 

  18090.  	sgiseeq_rx(dev, sp, hregs, sregs);
    18091. 

  18091. @@ -616,7 +613,7 @@ static inline void setup_rx_ring(struct 
    18092. 

  18092.  
    18093. 

  18093.  #define ALIGNED(x)  ((((unsigned long)(x)) + 0xf) & ~(0xf))
    18094. 

  18094.  
    18095. 

  18095. -int sgiseeq_init(struct hpc3_regs* regs, int irq)
    18096. 

  18096. +int sgiseeq_init(struct hpc3_regs* hpcregs, int irq, int has_eeprom)
    18097. 

  18097.  {
    18098. 

  18098.  	struct net_device *dev;
    18099. 

  18099.  	struct sgiseeq_private *sp;
    18100. 

  18100. @@ -629,7 +626,7 @@ int sgiseeq_init(struct hpc3_regs* regs,
    18101. 

  18101.  		goto err_out;
    18102. 

  18102.  	}
    18103. 

  18103.  	/* Make private data page aligned */
    18104. 

  18104. -	sp = (struct sgiseeq_private *) get_zeroed_page(GFP_KERNEL); 	 
    18105. 

  18105. +	sp = (struct sgiseeq_private *) get_zeroed_page(GFP_KERNEL);
    18106. 

  18106.  	if (!sp) {
    18107. 

  18107.  		printk(KERN_ERR "Sgiseeq: Page alloc failed, aborting.\n");
    18108. 

  18108.  		err = -ENOMEM;
    18109. 

  18109. @@ -644,7 +641,9 @@ int sgiseeq_init(struct hpc3_regs* regs,
    18110. 

  18110.  
    18111. 

  18111.  #define EADDR_NVOFS     250
    18112. 

  18112.  	for (i = 0; i < 3; i++) {
    18113. 

  18113. -		unsigned short tmp = ip22_nvram_read(EADDR_NVOFS / 2 + i);
    18114. 

  18114. +		unsigned short tmp = has_eeprom ?
    18115. 

  18115. +			ip22_eeprom_read(&hpcregs->eeprom, EADDR_NVOFS / 2+i) :
    18116. 

  18116. +			ip22_nvram_read(EADDR_NVOFS / 2+i);
    18117. 

  18117.  
    18118. 

  18118.  		dev->dev_addr[2 * i]     = tmp >> 8;
    18119. 

  18119.  		dev->dev_addr[2 * i + 1] = tmp & 0xff;
    18120. 

  18120. @@ -654,8 +653,8 @@ int sgiseeq_init(struct hpc3_regs* regs,
    18121. 

  18121.  	gpriv = sp;
    18122. 

  18122.  	gdev = dev;
    18123. 

  18123.  #endif
    18124. 

  18124. -	sp->sregs = (struct sgiseeq_regs *) &hpc3c0->eth_ext[0];
    18125. 

  18125. -	sp->hregs = &hpc3c0->ethregs;
    18126. 

  18126. +	sp->sregs = (struct sgiseeq_regs *) &hpcregs->eth_ext[0];
    18127. 

  18127. +	sp->hregs = &hpcregs->ethregs;
    18128. 

  18128.  	sp->name = sgiseeqstr;
    18129. 

  18129.  	sp->mode = SEEQ_RCMD_RBCAST;
    18130. 

  18130.  
    18131. 

  18131. @@ -672,6 +671,11 @@ int sgiseeq_init(struct hpc3_regs* regs,
    18132. 

  18132.  	setup_rx_ring(sp->srings.rx_desc, SEEQ_RX_BUFFERS);
    18133. 

  18133.  	setup_tx_ring(sp->srings.tx_desc, SEEQ_TX_BUFFERS);
    18134. 

  18134.  
    18135. 

  18135. +	/* Setup PIO and DMA transfer timing */
    18136. 

  18136. +	sp->hregs->pconfig = 0x161;
    18137. 

  18137. +	sp->hregs->dconfig = HPC3_EDCFG_FIRQ | HPC3_EDCFG_FEOP |
    18138. 

  18138. +			     HPC3_EDCFG_FRXDC | HPC3_EDCFG_PTO | 0x026;
    18139. 

  18139. +
    18140. 

  18140.  	/* Reset the chip. */
    18141. 

  18141.  	hpc3_eth_reset(sp->hregs);
    18142. 

  18142.  
    18143. 

  18143. @@ -699,7 +703,7 @@ int sgiseeq_init(struct hpc3_regs* regs,
    18144. 

  18144.  		goto err_out_free_irq;
    18145. 

  18145.  	}
    18146. 

  18146.  
    18147. 

  18147. -	printk(KERN_INFO "%s: SGI Seeq8003 ", dev->name);
    18148. 

  18148. +	printk(KERN_INFO "%s: %s ", dev->name, sgiseeqstr);
    18149. 

  18149.  	for (i = 0; i < 6; i++)
    18150. 

  18150.  		printk("%2.2x%c", dev->dev_addr[i], i == 5 ? '\n' : ':');
    18151. 

  18151.  
    18152. 

  18152. @@ -721,10 +725,22 @@ err_out:
    18153. 

  18153.  
    18154. 

  18154.  static int __init sgiseeq_probe(void)
    18155. 

  18155.  {
    18156. 

  18156. -	printk(version);
    18157. 

  18157. +	unsigned int tmp, ret1, ret2 = 0;
    18158. 

  18158.  
    18159. 

  18159.  	/* On board adapter on 1st HPC is always present */
    18160. 

  18160. -	return sgiseeq_init(hpc3c0, SGI_ENET_IRQ);
    18161. 

  18161. +	ret1 = sgiseeq_init(hpc3c0, SGI_ENET_IRQ, 0);
    18162. 

  18162. +	/* Let's see if second HPC is there */
    18163. 

  18163. +	if (!(ip22_is_fullhouse()) &&
    18164. 

  18164. +	    get_dbe(tmp, (unsigned int *)&hpc3c1->pbdma[1]) == 0) {
    18165. 

  18165. +		sgimc->giopar |= SGIMC_GIOPAR_MASTEREXP1 |
    18166. 

  18166. +				 SGIMC_GIOPAR_EXP164 |
    18167. 

  18167. +				 SGIMC_GIOPAR_HPC264;
    18168. 

  18168. +		hpc3c1->pbus_piocfg[0][0] = 0x3ffff;
    18169. 

  18169. +		/* interrupt/config register on Challenge S Mezz board */
    18170. 

  18170. +		hpc3c1->pbus_extregs[0][0] = 0x30;
    18171. 

  18171. +		ret2 = sgiseeq_init(hpc3c1, SGI_GIO_0_IRQ, 1);
    18172. 

  18172. +	}
    18173. 

  18173. +	return (ret1 & ret2) ? ret1 : 0;
    18174. 

  18174.  }
    18175. 

  18175.  
    18176. 

  18176.  static void __exit sgiseeq_exit(void)
    18177. 

  18177. @@ -747,4 +763,6 @@ static void __exit sgiseeq_exit(void)
    18178. 

  18178.  module_init(sgiseeq_probe);
    18179. 

  18179.  module_exit(sgiseeq_exit);
    18180. 

  18180.  
    18181. 

  18181. +MODULE_DESCRIPTION("SGI Seeq 8003 driver");
    18182. 

  18182. +MODULE_AUTHOR("David S. Miller");
    18183. 

  18183.  MODULE_LICENSE("GPL");
    18184. 

  18184. --- a/drivers/pci/pci.c
    18185. 

  18185. +++ b/drivers/pci/pci.c
    18186. 

  18186. @@ -1281,11 +1281,17 @@ static int __devinit pci_scan_bridge(str
    18187. 

  18187.  {
    18188. 

  18188.  	unsigned int buses;
    18189. 

  18189.  	unsigned short cr;
    18190. 

  18190. +	unsigned short bctl;
    18191. 

  18191.  	struct pci_bus *child;
    18192. 

  18192.  	int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS);
    18193. 

  18193.  
    18194. 

  18194.  	pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
    18195. 

  18195.  	DBG("Scanning behind PCI bridge %s, config %06x, pass %d\n", dev->slot_name, buses & 0xffffff, pass);
    18196. 

  18196. +	/* Disable MasterAbortMode during probing to avoid reporting
    18197. 

  18197. +           of bus errors (in some architectures) */
    18198. 

  18198. +	pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &bctl);
    18199. 

  18199. +	pci_write_config_word(dev, PCI_BRIDGE_CONTROL, 
    18200. 

  18200. +			      bctl & ~PCI_BRIDGE_CTL_MASTER_ABORT);
    18201. 

  18201.  	if ((buses & 0xffff00) && !pcibios_assign_all_busses()) {
    18202. 

  18202.  		/*
    18203. 

  18203.  		 * Bus already configured by firmware, process it in the first
    18204. 

  18204. @@ -1351,6 +1357,7 @@ static int __devinit pci_scan_bridge(str
    18205. 

  18205.  		pci_write_config_byte(dev, PCI_SUBORDINATE_BUS, max);
    18206. 

  18206.  		pci_write_config_word(dev, PCI_COMMAND, cr);
    18207. 

  18207.  	}
    18208. 

  18208. +	pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bctl);
    18209. 

  18209.  	sprintf(child->name, (is_cardbus ? "PCI CardBus #%02x" : "PCI Bus #%02x"), child->number);
    18210. 

  18210.  	return max;
    18211. 

  18211.  }
    18212. 

  18212. --- a/drivers/pcmcia/au1000_db1x00.c
    18213. 

  18213. +++ b/drivers/pcmcia/au1000_db1x00.c
    18214. 

  18214. @@ -1,6 +1,6 @@
    18215. 

  18215.  /*
    18216. 

  18216.   *
    18217. 

  18217. - * Alchemy Semi Db1x00 boards specific pcmcia routines.
    18218. 

  18218. + * AMD Alchemy DUAL-SLOT Db1x00 boards' specific pcmcia routines.
    18219. 

  18219.   *
    18220. 

  18220.   * Copyright 2002 MontaVista Software Inc.
    18221. 

  18221.   * Author: MontaVista Software, Inc.
    18222. 

  18222. @@ -54,9 +54,20 @@
    18223. 

  18223.  #include <asm/au1000.h>
    18224. 

  18224.  #include <asm/au1000_pcmcia.h>
    18225. 

  18225.  
    18226. 

  18226. +#if defined(CONFIG_MIPS_PB1200)
    18227. 

  18227. +#include <asm/pb1200.h>
    18228. 

  18228. +#elif defined(CONFIG_MIPS_DB1200)
    18229. 

  18229. +#include <asm/db1200.h>
    18230. 

  18230. +#else
    18231. 

  18231.  #include <asm/db1x00.h>
    18232. 

  18232. +#endif
    18233. 

  18233.  
    18234. 

  18234. -static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
    18235. 

  18235. +#define PCMCIA_MAX_SOCK 1
    18236. 

  18236. +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
    18237. 

  18237. +
    18238. 

  18238. +/* VPP/VCC */
    18239. 

  18239. +#define SET_VCC_VPP(VCC, VPP, SLOT)\
    18240. 

  18240. +    ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
    18241. 

  18241.  
    18242. 

  18242.  static int db1x00_pcmcia_init(struct pcmcia_init *init)
    18243. 

  18243.  {
    18244. 

  18244. @@ -76,7 +87,7 @@ static int 
    18245. 

  18245.  db1x00_pcmcia_socket_state(unsigned sock, struct pcmcia_state *state)
    18246. 

  18246.  {
    18247. 

  18247.  	u32 inserted;
    18248. 

  18248. -	unsigned char vs;
    18249. 

  18249. +	u16 vs;
    18250. 

  18250.  
    18251. 

  18251.  	if(sock > PCMCIA_MAX_SOCK) return -1;
    18252. 

  18252.  
    18253. 

  18253. @@ -87,11 +98,11 @@ db1x00_pcmcia_socket_state(unsigned sock
    18254. 

  18254.  
    18255. 

  18255.  	if (sock == 0) {
    18256. 

  18256.  		vs = bcsr->status & 0x3;
    18257. 

  18257. -		inserted = !(bcsr->status & (1<<4));
    18258. 

  18258. +		inserted = BOARD_CARD_INSERTED(0);
    18259. 

  18259.  	}
    18260. 

  18260.  	else {
    18261. 

  18261.  		vs = (bcsr->status & 0xC)>>2;
    18262. 

  18262. -		inserted = !(bcsr->status & (1<<5));
    18263. 

  18263. +		inserted = BOARD_CARD_INSERTED(1);
    18264. 

  18264.  	}
    18265. 

  18265.  
    18266. 

  18266.  	DEBUG(KERN_DEBUG "db1x00 socket %d: inserted %d, vs %d\n", 
    18267. 

  18267. @@ -144,16 +155,9 @@ static int db1x00_pcmcia_get_irq_info(st
    18268. 

  18268.  	if(info->sock > PCMCIA_MAX_SOCK) return -1;
    18269. 

  18269.  
    18270. 

  18270.  	if(info->sock == 0)
    18271. 

  18271. -#ifdef CONFIG_MIPS_DB1550
    18272. 

  18272. -		info->irq = AU1000_GPIO_3;
    18273. 

  18273. +		info->irq = BOARD_PC0_INT;
    18274. 

  18274.  	else 
    18275. 

  18275. -		info->irq = AU1000_GPIO_5;
    18276. 

  18276. -#else
    18277. 

  18277. -		info->irq = AU1000_GPIO_2;
    18278. 

  18278. -	else 
    18279. 

  18279. -		info->irq = AU1000_GPIO_5;
    18280. 

  18280. -#endif
    18281. 

  18281. -
    18282. 

  18282. +		info->irq = BOA
    18283.