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/drivers/scsi/mpt2sas/mpt2sas_base.c

http://github.com/mirrors/linux
C | 4670 lines | 3315 code | 514 blank | 841 comment | 519 complexity | e01d610ed22f16a918a3846895ea6f54 MD5 | raw file
Possible License(s): AGPL-1.0, GPL-2.0, LGPL-2.0
  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2013 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/kernel.h>
  43. #include <linux/module.h>
  44. #include <linux/errno.h>
  45. #include <linux/init.h>
  46. #include <linux/slab.h>
  47. #include <linux/types.h>
  48. #include <linux/pci.h>
  49. #include <linux/kdev_t.h>
  50. #include <linux/blkdev.h>
  51. #include <linux/delay.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/dma-mapping.h>
  54. #include <linux/sort.h>
  55. #include <linux/io.h>
  56. #include <linux/time.h>
  57. #include <linux/kthread.h>
  58. #include <linux/aer.h>
  59. #include "mpt2sas_base.h"
  60. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  61. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  62. #define MAX_HBA_QUEUE_DEPTH 30000
  63. #define MAX_CHAIN_DEPTH 100000
  64. static int max_queue_depth = -1;
  65. module_param(max_queue_depth, int, 0);
  66. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  67. static int max_sgl_entries = -1;
  68. module_param(max_sgl_entries, int, 0);
  69. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  70. static int msix_disable = -1;
  71. module_param(msix_disable, int, 0);
  72. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  73. static int mpt2sas_fwfault_debug;
  74. MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
  75. "and halt firmware - (default=0)");
  76. static int disable_discovery = -1;
  77. module_param(disable_discovery, int, 0);
  78. MODULE_PARM_DESC(disable_discovery, " disable discovery ");
  79. /**
  80. * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
  81. *
  82. */
  83. static int
  84. _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
  85. {
  86. int ret = param_set_int(val, kp);
  87. struct MPT2SAS_ADAPTER *ioc;
  88. if (ret)
  89. return ret;
  90. printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
  91. list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
  92. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  93. return 0;
  94. }
  95. module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
  96. param_get_int, &mpt2sas_fwfault_debug, 0644);
  97. /**
  98. * mpt2sas_remove_dead_ioc_func - kthread context to remove dead ioc
  99. * @arg: input argument, used to derive ioc
  100. *
  101. * Return 0 if controller is removed from pci subsystem.
  102. * Return -1 for other case.
  103. */
  104. static int mpt2sas_remove_dead_ioc_func(void *arg)
  105. {
  106. struct MPT2SAS_ADAPTER *ioc = (struct MPT2SAS_ADAPTER *)arg;
  107. struct pci_dev *pdev;
  108. if ((ioc == NULL))
  109. return -1;
  110. pdev = ioc->pdev;
  111. if ((pdev == NULL))
  112. return -1;
  113. pci_stop_and_remove_bus_device(pdev);
  114. return 0;
  115. }
  116. /**
  117. * _base_fault_reset_work - workq handling ioc fault conditions
  118. * @work: input argument, used to derive ioc
  119. * Context: sleep.
  120. *
  121. * Return nothing.
  122. */
  123. static void
  124. _base_fault_reset_work(struct work_struct *work)
  125. {
  126. struct MPT2SAS_ADAPTER *ioc =
  127. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  128. unsigned long flags;
  129. u32 doorbell;
  130. int rc;
  131. struct task_struct *p;
  132. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  133. if (ioc->shost_recovery || ioc->pci_error_recovery)
  134. goto rearm_timer;
  135. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  136. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  137. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
  138. printk(MPT2SAS_INFO_FMT "%s : SAS host is non-operational !!!!\n",
  139. ioc->name, __func__);
  140. /* It may be possible that EEH recovery can resolve some of
  141. * pci bus failure issues rather removing the dead ioc function
  142. * by considering controller is in a non-operational state. So
  143. * here priority is given to the EEH recovery. If it doesn't
  144. * not resolve this issue, mpt2sas driver will consider this
  145. * controller to non-operational state and remove the dead ioc
  146. * function.
  147. */
  148. if (ioc->non_operational_loop++ < 5) {
  149. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock,
  150. flags);
  151. goto rearm_timer;
  152. }
  153. /*
  154. * Call _scsih_flush_pending_cmds callback so that we flush all
  155. * pending commands back to OS. This call is required to aovid
  156. * deadlock at block layer. Dead IOC will fail to do diag reset,
  157. * and this call is safe since dead ioc will never return any
  158. * command back from HW.
  159. */
  160. ioc->schedule_dead_ioc_flush_running_cmds(ioc);
  161. /*
  162. * Set remove_host flag early since kernel thread will
  163. * take some time to execute.
  164. */
  165. ioc->remove_host = 1;
  166. /*Remove the Dead Host */
  167. p = kthread_run(mpt2sas_remove_dead_ioc_func, ioc,
  168. "mpt2sas_dead_ioc_%d", ioc->id);
  169. if (IS_ERR(p)) {
  170. printk(MPT2SAS_ERR_FMT
  171. "%s: Running mpt2sas_dead_ioc thread failed !!!!\n",
  172. ioc->name, __func__);
  173. } else {
  174. printk(MPT2SAS_ERR_FMT
  175. "%s: Running mpt2sas_dead_ioc thread success !!!!\n",
  176. ioc->name, __func__);
  177. }
  178. return; /* don't rearm timer */
  179. }
  180. ioc->non_operational_loop = 0;
  181. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  182. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  183. FORCE_BIG_HAMMER);
  184. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  185. __func__, (rc == 0) ? "success" : "failed");
  186. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  187. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  188. mpt2sas_base_fault_info(ioc, doorbell &
  189. MPI2_DOORBELL_DATA_MASK);
  190. }
  191. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  192. rearm_timer:
  193. if (ioc->fault_reset_work_q)
  194. queue_delayed_work(ioc->fault_reset_work_q,
  195. &ioc->fault_reset_work,
  196. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  197. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  198. }
  199. /**
  200. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  201. * @ioc: per adapter object
  202. * Context: sleep.
  203. *
  204. * Return nothing.
  205. */
  206. void
  207. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  208. {
  209. unsigned long flags;
  210. if (ioc->fault_reset_work_q)
  211. return;
  212. /* initialize fault polling */
  213. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  214. snprintf(ioc->fault_reset_work_q_name,
  215. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  216. ioc->fault_reset_work_q =
  217. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  218. if (!ioc->fault_reset_work_q) {
  219. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  220. ioc->name, __func__, __LINE__);
  221. return;
  222. }
  223. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  224. if (ioc->fault_reset_work_q)
  225. queue_delayed_work(ioc->fault_reset_work_q,
  226. &ioc->fault_reset_work,
  227. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  228. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  229. }
  230. /**
  231. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  232. * @ioc: per adapter object
  233. * Context: sleep.
  234. *
  235. * Return nothing.
  236. */
  237. void
  238. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  239. {
  240. unsigned long flags;
  241. struct workqueue_struct *wq;
  242. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  243. wq = ioc->fault_reset_work_q;
  244. ioc->fault_reset_work_q = NULL;
  245. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  246. if (wq) {
  247. if (!cancel_delayed_work(&ioc->fault_reset_work))
  248. flush_workqueue(wq);
  249. destroy_workqueue(wq);
  250. }
  251. }
  252. /**
  253. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  254. * @ioc: per adapter object
  255. * @fault_code: fault code
  256. *
  257. * Return nothing.
  258. */
  259. void
  260. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  261. {
  262. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  263. ioc->name, fault_code);
  264. }
  265. /**
  266. * mpt2sas_halt_firmware - halt's mpt controller firmware
  267. * @ioc: per adapter object
  268. *
  269. * For debugging timeout related issues. Writing 0xCOFFEE00
  270. * to the doorbell register will halt controller firmware. With
  271. * the purpose to stop both driver and firmware, the enduser can
  272. * obtain a ring buffer from controller UART.
  273. */
  274. void
  275. mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
  276. {
  277. u32 doorbell;
  278. if (!ioc->fwfault_debug)
  279. return;
  280. dump_stack();
  281. doorbell = readl(&ioc->chip->Doorbell);
  282. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  283. mpt2sas_base_fault_info(ioc , doorbell);
  284. else {
  285. writel(0xC0FFEE00, &ioc->chip->Doorbell);
  286. printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
  287. "timeout\n", ioc->name);
  288. }
  289. panic("panic in %s\n", __func__);
  290. }
  291. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  292. /**
  293. * _base_sas_ioc_info - verbose translation of the ioc status
  294. * @ioc: per adapter object
  295. * @mpi_reply: reply mf payload returned from firmware
  296. * @request_hdr: request mf
  297. *
  298. * Return nothing.
  299. */
  300. static void
  301. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  302. MPI2RequestHeader_t *request_hdr)
  303. {
  304. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  305. MPI2_IOCSTATUS_MASK;
  306. char *desc = NULL;
  307. u16 frame_sz;
  308. char *func_str = NULL;
  309. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  310. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  311. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  312. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  313. return;
  314. if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
  315. return;
  316. switch (ioc_status) {
  317. /****************************************************************************
  318. * Common IOCStatus values for all replies
  319. ****************************************************************************/
  320. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  321. desc = "invalid function";
  322. break;
  323. case MPI2_IOCSTATUS_BUSY:
  324. desc = "busy";
  325. break;
  326. case MPI2_IOCSTATUS_INVALID_SGL:
  327. desc = "invalid sgl";
  328. break;
  329. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  330. desc = "internal error";
  331. break;
  332. case MPI2_IOCSTATUS_INVALID_VPID:
  333. desc = "invalid vpid";
  334. break;
  335. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  336. desc = "insufficient resources";
  337. break;
  338. case MPI2_IOCSTATUS_INVALID_FIELD:
  339. desc = "invalid field";
  340. break;
  341. case MPI2_IOCSTATUS_INVALID_STATE:
  342. desc = "invalid state";
  343. break;
  344. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  345. desc = "op state not supported";
  346. break;
  347. /****************************************************************************
  348. * Config IOCStatus values
  349. ****************************************************************************/
  350. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  351. desc = "config invalid action";
  352. break;
  353. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  354. desc = "config invalid type";
  355. break;
  356. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  357. desc = "config invalid page";
  358. break;
  359. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  360. desc = "config invalid data";
  361. break;
  362. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  363. desc = "config no defaults";
  364. break;
  365. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  366. desc = "config cant commit";
  367. break;
  368. /****************************************************************************
  369. * SCSI IO Reply
  370. ****************************************************************************/
  371. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  372. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  373. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  374. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  375. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  376. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  377. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  378. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  379. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  380. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  381. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  382. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  383. break;
  384. /****************************************************************************
  385. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  386. ****************************************************************************/
  387. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  388. desc = "eedp guard error";
  389. break;
  390. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  391. desc = "eedp ref tag error";
  392. break;
  393. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  394. desc = "eedp app tag error";
  395. break;
  396. /****************************************************************************
  397. * SCSI Target values
  398. ****************************************************************************/
  399. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  400. desc = "target invalid io index";
  401. break;
  402. case MPI2_IOCSTATUS_TARGET_ABORTED:
  403. desc = "target aborted";
  404. break;
  405. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  406. desc = "target no conn retryable";
  407. break;
  408. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  409. desc = "target no connection";
  410. break;
  411. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  412. desc = "target xfer count mismatch";
  413. break;
  414. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  415. desc = "target data offset error";
  416. break;
  417. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  418. desc = "target too much write data";
  419. break;
  420. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  421. desc = "target iu too short";
  422. break;
  423. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  424. desc = "target ack nak timeout";
  425. break;
  426. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  427. desc = "target nak received";
  428. break;
  429. /****************************************************************************
  430. * Serial Attached SCSI values
  431. ****************************************************************************/
  432. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  433. desc = "smp request failed";
  434. break;
  435. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  436. desc = "smp data overrun";
  437. break;
  438. /****************************************************************************
  439. * Diagnostic Buffer Post / Diagnostic Release values
  440. ****************************************************************************/
  441. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  442. desc = "diagnostic released";
  443. break;
  444. default:
  445. break;
  446. }
  447. if (!desc)
  448. return;
  449. switch (request_hdr->Function) {
  450. case MPI2_FUNCTION_CONFIG:
  451. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  452. func_str = "config_page";
  453. break;
  454. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  455. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  456. func_str = "task_mgmt";
  457. break;
  458. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  459. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  460. func_str = "sas_iounit_ctl";
  461. break;
  462. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  463. frame_sz = sizeof(Mpi2SepRequest_t);
  464. func_str = "enclosure";
  465. break;
  466. case MPI2_FUNCTION_IOC_INIT:
  467. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  468. func_str = "ioc_init";
  469. break;
  470. case MPI2_FUNCTION_PORT_ENABLE:
  471. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  472. func_str = "port_enable";
  473. break;
  474. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  475. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  476. func_str = "smp_passthru";
  477. break;
  478. default:
  479. frame_sz = 32;
  480. func_str = "unknown";
  481. break;
  482. }
  483. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  484. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  485. _debug_dump_mf(request_hdr, frame_sz/4);
  486. }
  487. /**
  488. * _base_display_event_data - verbose translation of firmware asyn events
  489. * @ioc: per adapter object
  490. * @mpi_reply: reply mf payload returned from firmware
  491. *
  492. * Return nothing.
  493. */
  494. static void
  495. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  496. Mpi2EventNotificationReply_t *mpi_reply)
  497. {
  498. char *desc = NULL;
  499. u16 event;
  500. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  501. return;
  502. event = le16_to_cpu(mpi_reply->Event);
  503. switch (event) {
  504. case MPI2_EVENT_LOG_DATA:
  505. desc = "Log Data";
  506. break;
  507. case MPI2_EVENT_STATE_CHANGE:
  508. desc = "Status Change";
  509. break;
  510. case MPI2_EVENT_HARD_RESET_RECEIVED:
  511. desc = "Hard Reset Received";
  512. break;
  513. case MPI2_EVENT_EVENT_CHANGE:
  514. desc = "Event Change";
  515. break;
  516. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  517. desc = "Device Status Change";
  518. break;
  519. case MPI2_EVENT_IR_OPERATION_STATUS:
  520. if (!ioc->hide_ir_msg)
  521. desc = "IR Operation Status";
  522. break;
  523. case MPI2_EVENT_SAS_DISCOVERY:
  524. {
  525. Mpi2EventDataSasDiscovery_t *event_data =
  526. (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
  527. printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
  528. (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
  529. "start" : "stop");
  530. if (event_data->DiscoveryStatus)
  531. printk("discovery_status(0x%08x)",
  532. le32_to_cpu(event_data->DiscoveryStatus));
  533. printk("\n");
  534. return;
  535. }
  536. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  537. desc = "SAS Broadcast Primitive";
  538. break;
  539. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  540. desc = "SAS Init Device Status Change";
  541. break;
  542. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  543. desc = "SAS Init Table Overflow";
  544. break;
  545. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  546. desc = "SAS Topology Change List";
  547. break;
  548. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  549. desc = "SAS Enclosure Device Status Change";
  550. break;
  551. case MPI2_EVENT_IR_VOLUME:
  552. if (!ioc->hide_ir_msg)
  553. desc = "IR Volume";
  554. break;
  555. case MPI2_EVENT_IR_PHYSICAL_DISK:
  556. if (!ioc->hide_ir_msg)
  557. desc = "IR Physical Disk";
  558. break;
  559. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  560. if (!ioc->hide_ir_msg)
  561. desc = "IR Configuration Change List";
  562. break;
  563. case MPI2_EVENT_LOG_ENTRY_ADDED:
  564. if (!ioc->hide_ir_msg)
  565. desc = "Log Entry Added";
  566. break;
  567. }
  568. if (!desc)
  569. return;
  570. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  571. }
  572. #endif
  573. /**
  574. * _base_sas_log_info - verbose translation of firmware log info
  575. * @ioc: per adapter object
  576. * @log_info: log info
  577. *
  578. * Return nothing.
  579. */
  580. static void
  581. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  582. {
  583. union loginfo_type {
  584. u32 loginfo;
  585. struct {
  586. u32 subcode:16;
  587. u32 code:8;
  588. u32 originator:4;
  589. u32 bus_type:4;
  590. } dw;
  591. };
  592. union loginfo_type sas_loginfo;
  593. char *originator_str = NULL;
  594. sas_loginfo.loginfo = log_info;
  595. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  596. return;
  597. /* each nexus loss loginfo */
  598. if (log_info == 0x31170000)
  599. return;
  600. /* eat the loginfos associated with task aborts */
  601. if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info ==
  602. 0x31140000 || log_info == 0x31130000))
  603. return;
  604. switch (sas_loginfo.dw.originator) {
  605. case 0:
  606. originator_str = "IOP";
  607. break;
  608. case 1:
  609. originator_str = "PL";
  610. break;
  611. case 2:
  612. if (!ioc->hide_ir_msg)
  613. originator_str = "IR";
  614. else
  615. originator_str = "WarpDrive";
  616. break;
  617. }
  618. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  619. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  620. originator_str, sas_loginfo.dw.code,
  621. sas_loginfo.dw.subcode);
  622. }
  623. /**
  624. * _base_display_reply_info -
  625. * @ioc: per adapter object
  626. * @smid: system request message index
  627. * @msix_index: MSIX table index supplied by the OS
  628. * @reply: reply message frame(lower 32bit addr)
  629. *
  630. * Return nothing.
  631. */
  632. static void
  633. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  634. u32 reply)
  635. {
  636. MPI2DefaultReply_t *mpi_reply;
  637. u16 ioc_status;
  638. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  639. if (unlikely(!mpi_reply)) {
  640. printk(MPT2SAS_ERR_FMT "mpi_reply not valid at %s:%d/%s()!\n",
  641. ioc->name, __FILE__, __LINE__, __func__);
  642. return;
  643. }
  644. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  645. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  646. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  647. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  648. _base_sas_ioc_info(ioc , mpi_reply,
  649. mpt2sas_base_get_msg_frame(ioc, smid));
  650. }
  651. #endif
  652. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  653. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  654. }
  655. /**
  656. * mpt2sas_base_done - base internal command completion routine
  657. * @ioc: per adapter object
  658. * @smid: system request message index
  659. * @msix_index: MSIX table index supplied by the OS
  660. * @reply: reply message frame(lower 32bit addr)
  661. *
  662. * Return 1 meaning mf should be freed from _base_interrupt
  663. * 0 means the mf is freed from this function.
  664. */
  665. u8
  666. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  667. u32 reply)
  668. {
  669. MPI2DefaultReply_t *mpi_reply;
  670. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  671. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  672. return 1;
  673. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  674. return 1;
  675. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  676. if (mpi_reply) {
  677. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  678. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  679. }
  680. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  681. complete(&ioc->base_cmds.done);
  682. return 1;
  683. }
  684. /**
  685. * _base_async_event - main callback handler for firmware asyn events
  686. * @ioc: per adapter object
  687. * @msix_index: MSIX table index supplied by the OS
  688. * @reply: reply message frame(lower 32bit addr)
  689. *
  690. * Returns void.
  691. */
  692. static void
  693. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  694. {
  695. Mpi2EventNotificationReply_t *mpi_reply;
  696. Mpi2EventAckRequest_t *ack_request;
  697. u16 smid;
  698. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  699. if (!mpi_reply)
  700. return;
  701. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  702. return;
  703. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  704. _base_display_event_data(ioc, mpi_reply);
  705. #endif
  706. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  707. goto out;
  708. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  709. if (!smid) {
  710. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  711. ioc->name, __func__);
  712. goto out;
  713. }
  714. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  715. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  716. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  717. ack_request->Event = mpi_reply->Event;
  718. ack_request->EventContext = mpi_reply->EventContext;
  719. ack_request->VF_ID = 0; /* TODO */
  720. ack_request->VP_ID = 0;
  721. mpt2sas_base_put_smid_default(ioc, smid);
  722. out:
  723. /* scsih callback handler */
  724. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  725. /* ctl callback handler */
  726. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  727. return;
  728. }
  729. /**
  730. * _base_get_cb_idx - obtain the callback index
  731. * @ioc: per adapter object
  732. * @smid: system request message index
  733. *
  734. * Return callback index.
  735. */
  736. static u8
  737. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  738. {
  739. int i;
  740. u8 cb_idx;
  741. if (smid < ioc->hi_priority_smid) {
  742. i = smid - 1;
  743. cb_idx = ioc->scsi_lookup[i].cb_idx;
  744. } else if (smid < ioc->internal_smid) {
  745. i = smid - ioc->hi_priority_smid;
  746. cb_idx = ioc->hpr_lookup[i].cb_idx;
  747. } else if (smid <= ioc->hba_queue_depth) {
  748. i = smid - ioc->internal_smid;
  749. cb_idx = ioc->internal_lookup[i].cb_idx;
  750. } else
  751. cb_idx = 0xFF;
  752. return cb_idx;
  753. }
  754. /**
  755. * _base_mask_interrupts - disable interrupts
  756. * @ioc: per adapter object
  757. *
  758. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  759. *
  760. * Return nothing.
  761. */
  762. static void
  763. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  764. {
  765. u32 him_register;
  766. ioc->mask_interrupts = 1;
  767. him_register = readl(&ioc->chip->HostInterruptMask);
  768. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  769. writel(him_register, &ioc->chip->HostInterruptMask);
  770. readl(&ioc->chip->HostInterruptMask);
  771. }
  772. /**
  773. * _base_unmask_interrupts - enable interrupts
  774. * @ioc: per adapter object
  775. *
  776. * Enabling only Reply Interrupts
  777. *
  778. * Return nothing.
  779. */
  780. static void
  781. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  782. {
  783. u32 him_register;
  784. him_register = readl(&ioc->chip->HostInterruptMask);
  785. him_register &= ~MPI2_HIM_RIM;
  786. writel(him_register, &ioc->chip->HostInterruptMask);
  787. ioc->mask_interrupts = 0;
  788. }
  789. union reply_descriptor {
  790. u64 word;
  791. struct {
  792. u32 low;
  793. u32 high;
  794. } u;
  795. };
  796. /**
  797. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  798. * @irq: irq number (not used)
  799. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  800. * @r: pt_regs pointer (not used)
  801. *
  802. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  803. */
  804. static irqreturn_t
  805. _base_interrupt(int irq, void *bus_id)
  806. {
  807. struct adapter_reply_queue *reply_q = bus_id;
  808. union reply_descriptor rd;
  809. u32 completed_cmds;
  810. u8 request_desript_type;
  811. u16 smid;
  812. u8 cb_idx;
  813. u32 reply;
  814. u8 msix_index = reply_q->msix_index;
  815. struct MPT2SAS_ADAPTER *ioc = reply_q->ioc;
  816. Mpi2ReplyDescriptorsUnion_t *rpf;
  817. u8 rc;
  818. if (ioc->mask_interrupts)
  819. return IRQ_NONE;
  820. if (!atomic_add_unless(&reply_q->busy, 1, 1))
  821. return IRQ_NONE;
  822. rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
  823. request_desript_type = rpf->Default.ReplyFlags
  824. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  825. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
  826. atomic_dec(&reply_q->busy);
  827. return IRQ_NONE;
  828. }
  829. completed_cmds = 0;
  830. cb_idx = 0xFF;
  831. do {
  832. rd.word = le64_to_cpu(rpf->Words);
  833. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  834. goto out;
  835. reply = 0;
  836. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  837. if (request_desript_type ==
  838. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  839. reply = le32_to_cpu
  840. (rpf->AddressReply.ReplyFrameAddress);
  841. if (reply > ioc->reply_dma_max_address ||
  842. reply < ioc->reply_dma_min_address)
  843. reply = 0;
  844. } else if (request_desript_type ==
  845. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  846. goto next;
  847. else if (request_desript_type ==
  848. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  849. goto next;
  850. if (smid) {
  851. cb_idx = _base_get_cb_idx(ioc, smid);
  852. if ((likely(cb_idx < MPT_MAX_CALLBACKS))
  853. && (likely(mpt_callbacks[cb_idx] != NULL))) {
  854. rc = mpt_callbacks[cb_idx](ioc, smid,
  855. msix_index, reply);
  856. if (reply)
  857. _base_display_reply_info(ioc, smid,
  858. msix_index, reply);
  859. if (rc)
  860. mpt2sas_base_free_smid(ioc, smid);
  861. }
  862. }
  863. if (!smid)
  864. _base_async_event(ioc, msix_index, reply);
  865. /* reply free queue handling */
  866. if (reply) {
  867. ioc->reply_free_host_index =
  868. (ioc->reply_free_host_index ==
  869. (ioc->reply_free_queue_depth - 1)) ?
  870. 0 : ioc->reply_free_host_index + 1;
  871. ioc->reply_free[ioc->reply_free_host_index] =
  872. cpu_to_le32(reply);
  873. wmb();
  874. writel(ioc->reply_free_host_index,
  875. &ioc->chip->ReplyFreeHostIndex);
  876. }
  877. next:
  878. rpf->Words = cpu_to_le64(ULLONG_MAX);
  879. reply_q->reply_post_host_index =
  880. (reply_q->reply_post_host_index ==
  881. (ioc->reply_post_queue_depth - 1)) ? 0 :
  882. reply_q->reply_post_host_index + 1;
  883. request_desript_type =
  884. reply_q->reply_post_free[reply_q->reply_post_host_index].
  885. Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  886. completed_cmds++;
  887. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  888. goto out;
  889. if (!reply_q->reply_post_host_index)
  890. rpf = reply_q->reply_post_free;
  891. else
  892. rpf++;
  893. } while (1);
  894. out:
  895. if (!completed_cmds) {
  896. atomic_dec(&reply_q->busy);
  897. return IRQ_NONE;
  898. }
  899. wmb();
  900. if (ioc->is_warpdrive) {
  901. writel(reply_q->reply_post_host_index,
  902. ioc->reply_post_host_index[msix_index]);
  903. atomic_dec(&reply_q->busy);
  904. return IRQ_HANDLED;
  905. }
  906. writel(reply_q->reply_post_host_index | (msix_index <<
  907. MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex);
  908. atomic_dec(&reply_q->busy);
  909. return IRQ_HANDLED;
  910. }
  911. /**
  912. * _base_is_controller_msix_enabled - is controller support muli-reply queues
  913. * @ioc: per adapter object
  914. *
  915. */
  916. static inline int
  917. _base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc)
  918. {
  919. return (ioc->facts.IOCCapabilities &
  920. MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
  921. }
  922. /**
  923. * mpt2sas_base_flush_reply_queues - flushing the MSIX reply queues
  924. * @ioc: per adapter object
  925. * Context: ISR conext
  926. *
  927. * Called when a Task Management request has completed. We want
  928. * to flush the other reply queues so all the outstanding IO has been
  929. * completed back to OS before we process the TM completetion.
  930. *
  931. * Return nothing.
  932. */
  933. void
  934. mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  935. {
  936. struct adapter_reply_queue *reply_q;
  937. /* If MSIX capability is turned off
  938. * then multi-queues are not enabled
  939. */
  940. if (!_base_is_controller_msix_enabled(ioc))
  941. return;
  942. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  943. if (ioc->shost_recovery)
  944. return;
  945. /* TMs are on msix_index == 0 */
  946. if (reply_q->msix_index == 0)
  947. continue;
  948. _base_interrupt(reply_q->vector, (void *)reply_q);
  949. }
  950. }
  951. /**
  952. * mpt2sas_base_release_callback_handler - clear interrupt callback handler
  953. * @cb_idx: callback index
  954. *
  955. * Return nothing.
  956. */
  957. void
  958. mpt2sas_base_release_callback_handler(u8 cb_idx)
  959. {
  960. mpt_callbacks[cb_idx] = NULL;
  961. }
  962. /**
  963. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  964. * @cb_func: callback function
  965. *
  966. * Returns cb_func.
  967. */
  968. u8
  969. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  970. {
  971. u8 cb_idx;
  972. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  973. if (mpt_callbacks[cb_idx] == NULL)
  974. break;
  975. mpt_callbacks[cb_idx] = cb_func;
  976. return cb_idx;
  977. }
  978. /**
  979. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  980. *
  981. * Return nothing.
  982. */
  983. void
  984. mpt2sas_base_initialize_callback_handler(void)
  985. {
  986. u8 cb_idx;
  987. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  988. mpt2sas_base_release_callback_handler(cb_idx);
  989. }
  990. /**
  991. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  992. * @ioc: per adapter object
  993. * @paddr: virtual address for SGE
  994. *
  995. * Create a zero length scatter gather entry to insure the IOCs hardware has
  996. * something to use if the target device goes brain dead and tries
  997. * to send data even when none is asked for.
  998. *
  999. * Return nothing.
  1000. */
  1001. void
  1002. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  1003. {
  1004. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  1005. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  1006. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  1007. MPI2_SGE_FLAGS_SHIFT);
  1008. ioc->base_add_sg_single(paddr, flags_length, -1);
  1009. }
  1010. /**
  1011. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  1012. * @paddr: virtual address for SGE
  1013. * @flags_length: SGE flags and data transfer length
  1014. * @dma_addr: Physical address
  1015. *
  1016. * Return nothing.
  1017. */
  1018. static void
  1019. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1020. {
  1021. Mpi2SGESimple32_t *sgel = paddr;
  1022. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  1023. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1024. sgel->FlagsLength = cpu_to_le32(flags_length);
  1025. sgel->Address = cpu_to_le32(dma_addr);
  1026. }
  1027. /**
  1028. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  1029. * @paddr: virtual address for SGE
  1030. * @flags_length: SGE flags and data transfer length
  1031. * @dma_addr: Physical address
  1032. *
  1033. * Return nothing.
  1034. */
  1035. static void
  1036. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1037. {
  1038. Mpi2SGESimple64_t *sgel = paddr;
  1039. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  1040. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1041. sgel->FlagsLength = cpu_to_le32(flags_length);
  1042. sgel->Address = cpu_to_le64(dma_addr);
  1043. }
  1044. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  1045. /**
  1046. * _base_config_dma_addressing - set dma addressing
  1047. * @ioc: per adapter object
  1048. * @pdev: PCI device struct
  1049. *
  1050. * Returns 0 for success, non-zero for failure.
  1051. */
  1052. static int
  1053. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  1054. {
  1055. struct sysinfo s;
  1056. char *desc = NULL;
  1057. if (sizeof(dma_addr_t) > 4) {
  1058. const uint64_t required_mask =
  1059. dma_get_required_mask(&pdev->dev);
  1060. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  1061. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  1062. DMA_BIT_MASK(64))) {
  1063. ioc->base_add_sg_single = &_base_add_sg_single_64;
  1064. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  1065. desc = "64";
  1066. goto out;
  1067. }
  1068. }
  1069. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  1070. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  1071. ioc->base_add_sg_single = &_base_add_sg_single_32;
  1072. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  1073. desc = "32";
  1074. } else
  1075. return -ENODEV;
  1076. out:
  1077. si_meminfo(&s);
  1078. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  1079. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  1080. return 0;
  1081. }
  1082. /**
  1083. * _base_check_enable_msix - checks MSIX capabable.
  1084. * @ioc: per adapter object
  1085. *
  1086. * Check to see if card is capable of MSIX, and set number
  1087. * of available msix vectors
  1088. */
  1089. static int
  1090. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1091. {
  1092. int base;
  1093. u16 message_control;
  1094. /* Check whether controller SAS2008 B0 controller,
  1095. if it is SAS2008 B0 controller use IO-APIC instead of MSIX */
  1096. if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 &&
  1097. ioc->pdev->revision == 0x01) {
  1098. return -EINVAL;
  1099. }
  1100. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  1101. if (!base) {
  1102. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  1103. "supported\n", ioc->name));
  1104. return -EINVAL;
  1105. }
  1106. /* get msix vector count */
  1107. /* NUMA_IO not supported for older controllers */
  1108. if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
  1109. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
  1110. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
  1111. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
  1112. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
  1113. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
  1114. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
  1115. ioc->msix_vector_count = 1;
  1116. else {
  1117. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  1118. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  1119. }
  1120. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  1121. "vector_count(%d)\n", ioc->name, ioc->msix_vector_count));
  1122. return 0;
  1123. }
  1124. /**
  1125. * _base_free_irq - free irq
  1126. * @ioc: per adapter object
  1127. *
  1128. * Freeing respective reply_queue from the list.
  1129. */
  1130. static void
  1131. _base_free_irq(struct MPT2SAS_ADAPTER *ioc)
  1132. {
  1133. struct adapter_reply_queue *reply_q, *next;
  1134. if (list_empty(&ioc->reply_queue_list))
  1135. return;
  1136. list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
  1137. list_del(&reply_q->list);
  1138. synchronize_irq(reply_q->vector);
  1139. free_irq(reply_q->vector, reply_q);
  1140. kfree(reply_q);
  1141. }
  1142. }
  1143. /**
  1144. * _base_request_irq - request irq
  1145. * @ioc: per adapter object
  1146. * @index: msix index into vector table
  1147. * @vector: irq vector
  1148. *
  1149. * Inserting respective reply_queue into the list.
  1150. */
  1151. static int
  1152. _base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector)
  1153. {
  1154. struct adapter_reply_queue *reply_q;
  1155. int r;
  1156. reply_q = kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
  1157. if (!reply_q) {
  1158. printk(MPT2SAS_ERR_FMT "unable to allocate memory %d!\n",
  1159. ioc->name, (int)sizeof(struct adapter_reply_queue));
  1160. return -ENOMEM;
  1161. }
  1162. reply_q->ioc = ioc;
  1163. reply_q->msix_index = index;
  1164. reply_q->vector = vector;
  1165. atomic_set(&reply_q->busy, 0);
  1166. if (ioc->msix_enable)
  1167. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
  1168. MPT2SAS_DRIVER_NAME, ioc->id, index);
  1169. else
  1170. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
  1171. MPT2SAS_DRIVER_NAME, ioc->id);
  1172. r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
  1173. reply_q);
  1174. if (r) {
  1175. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1176. reply_q->name, vector);
  1177. kfree(reply_q);
  1178. return -EBUSY;
  1179. }
  1180. INIT_LIST_HEAD(&reply_q->list);
  1181. list_add_tail(&reply_q->list, &ioc->reply_queue_list);
  1182. return 0;
  1183. }
  1184. /**
  1185. * _base_assign_reply_queues - assigning msix index for each cpu
  1186. * @ioc: per adapter object
  1187. *
  1188. * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
  1189. *
  1190. * It would nice if we could call irq_set_affinity, however it is not
  1191. * an exported symbol
  1192. */
  1193. static void
  1194. _base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  1195. {
  1196. struct adapter_reply_queue *reply_q;
  1197. int cpu_id;
  1198. int cpu_grouping, loop, grouping, grouping_mod;
  1199. if (!_base_is_controller_msix_enabled(ioc))
  1200. return;
  1201. memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
  1202. /* when there are more cpus than available msix vectors,
  1203. * then group cpus togeather on same irq
  1204. */
  1205. if (ioc->cpu_count > ioc->msix_vector_count) {
  1206. grouping = ioc->cpu_count / ioc->msix_vector_count;
  1207. grouping_mod = ioc->cpu_count % ioc->msix_vector_count;
  1208. if (grouping < 2 || (grouping == 2 && !grouping_mod))
  1209. cpu_grouping = 2;
  1210. else if (grouping < 4 || (grouping == 4 && !grouping_mod))
  1211. cpu_grouping = 4;
  1212. else if (grouping < 8 || (grouping == 8 && !grouping_mod))
  1213. cpu_grouping = 8;
  1214. else
  1215. cpu_grouping = 16;
  1216. } else
  1217. cpu_grouping = 0;
  1218. loop = 0;
  1219. reply_q = list_entry(ioc->reply_queue_list.next,
  1220. struct adapter_reply_queue, list);
  1221. for_each_online_cpu(cpu_id) {
  1222. if (!cpu_grouping) {
  1223. ioc->cpu_msix_table[cpu_id] = reply_q->msix_index;
  1224. reply_q = list_entry(reply_q->list.next,
  1225. struct adapter_reply_queue, list);
  1226. } else {
  1227. if (loop < cpu_grouping) {
  1228. ioc->cpu_msix_table[cpu_id] =
  1229. reply_q->msix_index;
  1230. loop++;
  1231. } else {
  1232. reply_q = list_entry(reply_q->list.next,
  1233. struct adapter_reply_queue, list);
  1234. ioc->cpu_msix_table[cpu_id] =
  1235. reply_q->msix_index;
  1236. loop = 1;
  1237. }
  1238. }
  1239. }
  1240. }
  1241. /**
  1242. * _base_disable_msix - disables msix
  1243. * @ioc: per adapter object
  1244. *
  1245. */
  1246. static void
  1247. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  1248. {
  1249. if (ioc->msix_enable) {
  1250. pci_disable_msix(ioc->pdev);
  1251. ioc->msix_enable = 0;
  1252. }
  1253. }
  1254. /**
  1255. * _base_enable_msix - enables msix, failback to io_apic
  1256. * @ioc: per adapter object
  1257. *
  1258. */
  1259. static int
  1260. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1261. {
  1262. struct msix_entry *entries, *a;
  1263. int r;
  1264. int i;
  1265. u8 try_msix = 0;
  1266. if (msix_disable == -1 || msix_disable == 0)
  1267. try_msix = 1;
  1268. if (!try_msix)
  1269. goto try_ioapic;
  1270. if (_base_check_enable_msix(ioc) != 0)
  1271. goto try_ioapic;
  1272. ioc->reply_queue_count = min_t(int, ioc->cpu_count,
  1273. ioc->msix_vector_count);
  1274. entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
  1275. GFP_KERNEL);
  1276. if (!entries) {
  1277. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc "
  1278. "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__,
  1279. __LINE__, __func__));
  1280. goto try_ioapic;
  1281. }
  1282. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
  1283. a->entry = i;
  1284. r = pci_enable_msix(ioc->pdev, entries, ioc->reply_queue_count);
  1285. if (r) {
  1286. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  1287. "failed (r=%d) !!!\n", ioc->name, r));
  1288. kfree(entries);
  1289. goto try_ioapic;
  1290. }
  1291. ioc->msix_enable = 1;
  1292. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
  1293. r = _base_request_irq(ioc, i, a->vector);
  1294. if (r) {
  1295. _base_free_irq(ioc);
  1296. _base_disable_msix(ioc);
  1297. kfree(entries);
  1298. goto try_ioapic;
  1299. }
  1300. }
  1301. kfree(entries);
  1302. return 0;
  1303. /* failback to io_apic interrupt routing */
  1304. try_ioapic:
  1305. r = _base_request_irq(ioc, 0, ioc->pdev->irq);
  1306. return r;
  1307. }
  1308. /**
  1309. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1310. * @ioc: per adapter object
  1311. *
  1312. * Returns 0 for success, non-zero for failure.
  1313. */
  1314. int
  1315. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1316. {
  1317. struct pci_dev *pdev = ioc->pdev;
  1318. u32 memap_sz;
  1319. u32 pio_sz;
  1320. int i, r = 0;
  1321. u64 pio_chip = 0;
  1322. u64 chip_phys = 0;
  1323. struct adapter_reply_queue *reply_q;
  1324. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
  1325. ioc->name, __func__));
  1326. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1327. if (pci_enable_device_mem(pdev)) {
  1328. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1329. "failed\n", ioc->name);
  1330. ioc->bars = 0;
  1331. return -ENODEV;
  1332. }
  1333. if (pci_request_selected_regions(pdev, ioc->bars,
  1334. MPT2SAS_DRIVER_NAME)) {
  1335. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1336. "failed\n", ioc->name);
  1337. ioc->bars = 0;
  1338. r = -ENODEV;
  1339. goto out_fail;
  1340. }
  1341. /* AER (Advanced Error Reporting) hooks */
  1342. pci_enable_pcie_error_reporting(pdev);
  1343. pci_set_master(pdev);
  1344. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1345. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1346. ioc->name, pci_name(pdev));
  1347. r = -ENODEV;
  1348. goto out_fail;
  1349. }
  1350. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1351. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  1352. if (pio_sz)
  1353. continue;
  1354. pio_chip = (u64)pci_resource_start(pdev, i);
  1355. pio_sz = pci_resource_len(pdev, i);
  1356. } else {
  1357. if (memap_sz)
  1358. continue;
  1359. /* verify memory resource is valid before using */
  1360. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  1361. ioc->chip_phys = pci_resource_start(pdev, i);
  1362. chip_phys = (u64)ioc->chip_phys;
  1363. memap_sz = pci_resource_len(pdev, i);
  1364. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1365. if (ioc->chip == NULL) {
  1366. printk(MPT2SAS_ERR_FMT "unable to map "
  1367. "adapter memory!\n", ioc->name);
  1368. r = -EINVAL;
  1369. goto out_fail;
  1370. }
  1371. }
  1372. }
  1373. }
  1374. _base_mask_interrupts(ioc);
  1375. r = _base_enable_msix(ioc);
  1376. if (r)
  1377. goto out_fail;
  1378. list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
  1379. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1380. reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1381. "IO-APIC enabled"), reply_q->vector);
  1382. printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
  1383. ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
  1384. printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
  1385. ioc->name, (unsigned long long)pio_chip, pio_sz);
  1386. /* Save PCI configuration state for recovery from PCI AER/EEH errors */
  1387. pci_save_state(pdev);
  1388. return 0;
  1389. out_fail:
  1390. if (ioc->chip_phys)
  1391. iounmap(ioc->chip);
  1392. ioc->chip_phys = 0;
  1393. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1394. pci_disable_pcie_error_reporting(pdev);
  1395. pci_disable_device(pdev);
  1396. return r;
  1397. }
  1398. /**
  1399. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1400. * @ioc: per adapter object
  1401. * @smid: system request message index(smid zero is invalid)
  1402. *
  1403. * Returns virt pointer to message frame.
  1404. */
  1405. void *
  1406. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1407. {
  1408. return (void *)(ioc->request + (smid * ioc->request_sz));
  1409. }
  1410. /**
  1411. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1412. * @ioc: per adapter object
  1413. * @smid: system request message index
  1414. *
  1415. * Returns virt pointer to sense buffer.
  1416. */
  1417. void *
  1418. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1419. {
  1420. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1421. }
  1422. /**
  1423. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1424. * @ioc: per adapter object
  1425. * @smid: system request message index
  1426. *
  1427. * Returns phys pointer to the low 32bit address of the sense buffer.
  1428. */
  1429. __le32
  1430. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1431. {
  1432. return cpu_to_le32(ioc->sense_dma +
  1433. ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1434. }
  1435. /**
  1436. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1437. * @ioc: per adapter object
  1438. * @phys_addr: lower 32 physical addr of the reply
  1439. *
  1440. * Converts 32bit lower physical addr into a virt address.
  1441. */
  1442. void *
  1443. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1444. {
  1445. if (!phys_addr)
  1446. return NULL;
  1447. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1448. }
  1449. /**
  1450. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1451. * @ioc: per adapter object
  1452. * @cb_idx: callback index
  1453. *
  1454. * Returns smid (zero is invalid)
  1455. */
  1456. u16
  1457. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1458. {
  1459. unsigned long flags;
  1460. struct request_tracker *request;
  1461. u16 smid;
  1462. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1463. if (list_empty(&ioc->internal_free_list)) {
  1464. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1465. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1466. ioc->name, __func__);
  1467. return 0;
  1468. }
  1469. request = list_entry(ioc->internal_free_list.next,
  1470. struct request_tracker, tracker_list);
  1471. request->cb_idx = cb_idx;
  1472. smid = request->smid;
  1473. list_del(&request->tracker_list);
  1474. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1475. return smid;
  1476. }
  1477. /**
  1478. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1479. * @ioc: per adapter object
  1480. * @cb_idx: callback index
  1481. * @scmd: pointer to scsi command object
  1482. *
  1483. * Returns smid (zero is invalid)
  1484. */
  1485. u16
  1486. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1487. struct scsi_cmnd *scmd)
  1488. {
  1489. unsigned long flags;
  1490. struct scsiio_tracker *request;
  1491. u16 smid;
  1492. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1493. if (list_empty(&ioc->free_list)) {
  1494. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1495. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1496. ioc->name, __func__);
  1497. return 0;
  1498. }
  1499. request = list_entry(ioc->free_list.next,
  1500. struct scsiio_tracker, tracker_list);
  1501. request->scmd = scmd;
  1502. request->cb_idx = cb_idx;
  1503. smid = request->smid;
  1504. list_del(&request->tracker_list);
  1505. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1506. return smid;
  1507. }
  1508. /**
  1509. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1510. * @ioc: per adapter object
  1511. * @cb_idx: callback index
  1512. *
  1513. * Returns smid (zero is invalid)
  1514. */
  1515. u16
  1516. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1517. {
  1518. unsigned long flags;
  1519. struct request_tracker *request;
  1520. u16 smid;
  1521. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1522. if (list_empty(&ioc->hpr_free_list)) {
  1523. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1524. return 0;
  1525. }
  1526. request = list_entry(ioc->hpr_free_list.next,
  1527. struct request_tracker, tracker_list);
  1528. request->cb_idx = cb_idx;
  1529. smid = request->smid;
  1530. list_del(&request->tracker_list);
  1531. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1532. return smid;
  1533. }
  1534. /**
  1535. * mpt2sas_base_free_smid - put smid back on free_list
  1536. * @ioc: per adapter object
  1537. * @smid: system request message index
  1538. *
  1539. * Return nothing.
  1540. */
  1541. void
  1542. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1543. {
  1544. unsigned long flags;
  1545. int i;
  1546. struct chain_tracker *chain_req, *next;
  1547. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1548. if (smid < ioc->hi_priority_smid) {
  1549. /* scsiio queue */
  1550. i = smid - 1;
  1551. if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
  1552. list_for_each_entry_safe(chain_req, next,
  1553. &ioc->scsi_lookup[i].chain_list, tracker_list) {
  1554. list_del_init(&chain_req->tracker_list);
  1555. list_add_tail(&chain_req->tracker_list,
  1556. &ioc->free_chain_list);
  1557. }
  1558. }
  1559. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1560. ioc->scsi_lookup[i].scmd = NULL;
  1561. ioc->scsi_lookup[i].direct_io = 0;
  1562. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  1563. &ioc->free_list);
  1564. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1565. /*
  1566. * See _wait_for_commands_to_complete() call with regards
  1567. * to this code.
  1568. */
  1569. if (ioc->shost_recovery && ioc->pending_io_count) {
  1570. if (ioc->pending_io_count == 1)
  1571. wake_up(&ioc->reset_wq);
  1572. ioc->pending_io_count--;
  1573. }
  1574. return;
  1575. } else if (smid < ioc->internal_smid) {
  1576. /* hi-priority */
  1577. i = smid - ioc->hi_priority_smid;
  1578. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1579. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  1580. &ioc->hpr_free_list);
  1581. } else if (smid <= ioc->hba_queue_depth) {
  1582. /* internal queue */
  1583. i = smid - ioc->internal_smid;
  1584. ioc->internal_lookup[i].cb_idx = 0xFF;
  1585. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  1586. &ioc->internal_free_list);
  1587. }
  1588. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1589. }
  1590. /**
  1591. * _base_writeq - 64 bit write to MMIO
  1592. * @ioc: per adapter object
  1593. * @b: data payload
  1594. * @addr: address in MMIO space
  1595. * @writeq_lock: spin lock
  1596. *
  1597. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1598. * care of 32 bit environment where its not quarenteed to send the entire word
  1599. * in one transfer.
  1600. */
  1601. #ifndef writeq
  1602. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1603. spinlock_t *writeq_lock)
  1604. {
  1605. unsigned long flags;
  1606. __u64 data_out = cpu_to_le64(b);
  1607. spin_lock_irqsave(writeq_lock, flags);
  1608. writel((u32)(data_out), addr);
  1609. writel((u32)(data_out >> 32), (addr + 4));
  1610. spin_unlock_irqrestore(writeq_lock, flags);
  1611. }
  1612. #else
  1613. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1614. spinlock_t *writeq_lock)
  1615. {
  1616. writeq(cpu_to_le64(b), addr);
  1617. }
  1618. #endif
  1619. static inline u8
  1620. _base_get_msix_index(struct MPT2SAS_ADAPTER *ioc)
  1621. {
  1622. return ioc->cpu_msix_table[raw_smp_processor_id()];
  1623. }
  1624. /**
  1625. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1626. * @ioc: per adapter object
  1627. * @smid: system request message index
  1628. * @handle: device handle
  1629. *
  1630. * Return nothing.
  1631. */
  1632. void
  1633. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1634. {
  1635. Mpi2RequestDescriptorUnion_t descriptor;
  1636. u64 *request = (u64 *)&descriptor;
  1637. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1638. descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
  1639. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1640. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1641. descriptor.SCSIIO.LMID = 0;
  1642. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1643. &ioc->scsi_lookup_lock);
  1644. }
  1645. /**
  1646. * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
  1647. * @ioc: per adapter object
  1648. * @smid: system request message index
  1649. *
  1650. * Return nothing.
  1651. */
  1652. void
  1653. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1654. {
  1655. Mpi2RequestDescriptorUnion_t descriptor;
  1656. u64 *request = (u64 *)&descriptor;
  1657. descriptor.HighPriority.RequestFlags =
  1658. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1659. descriptor.HighPriority.MSIxIndex = 0;
  1660. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1661. descriptor.HighPriority.LMID = 0;
  1662. descriptor.HighPriority.Reserved1 = 0;
  1663. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1664. &ioc->scsi_lookup_lock);
  1665. }
  1666. /**
  1667. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1668. * @ioc: per adapter object
  1669. * @smid: system request message index
  1670. *
  1671. * Return nothing.
  1672. */
  1673. void
  1674. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1675. {
  1676. Mpi2RequestDescriptorUnion_t descriptor;
  1677. u64 *request = (u64 *)&descriptor;
  1678. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1679. descriptor.Default.MSIxIndex = _base_get_msix_index(ioc);
  1680. descriptor.Default.SMID = cpu_to_le16(smid);
  1681. descriptor.Default.LMID = 0;
  1682. descriptor.Default.DescriptorTypeDependent = 0;
  1683. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1684. &ioc->scsi_lookup_lock);
  1685. }
  1686. /**
  1687. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1688. * @ioc: per adapter object
  1689. * @smid: system request message index
  1690. * @io_index: value used to track the IO
  1691. *
  1692. * Return nothing.
  1693. */
  1694. void
  1695. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1696. u16 io_index)
  1697. {
  1698. Mpi2RequestDescriptorUnion_t descriptor;
  1699. u64 *request = (u64 *)&descriptor;
  1700. descriptor.SCSITarget.RequestFlags =
  1701. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1702. descriptor.SCSITarget.MSIxIndex = _base_get_msix_index(ioc);
  1703. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1704. descriptor.SCSITarget.LMID = 0;
  1705. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1706. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1707. &ioc->scsi_lookup_lock);
  1708. }
  1709. /**
  1710. * _base_display_dell_branding - Disply branding string
  1711. * @ioc: per adapter object
  1712. *
  1713. * Return nothing.
  1714. */
  1715. static void
  1716. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1717. {
  1718. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1719. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1720. return;
  1721. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1722. switch (ioc->pdev->subsystem_device) {
  1723. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1724. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1725. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1726. break;
  1727. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1728. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1729. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1730. break;
  1731. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1732. strncpy(dell_branding,
  1733. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1734. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1735. break;
  1736. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1737. strncpy(dell_branding,
  1738. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1739. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1740. break;
  1741. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1742. strncpy(dell_branding,
  1743. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1744. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1745. break;
  1746. case MPT2SAS_DELL_PERC_H200_SSDID:
  1747. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1748. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1749. break;
  1750. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1751. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1752. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1753. break;
  1754. default:
  1755. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1756. break;
  1757. }
  1758. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1759. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1760. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1761. ioc->pdev->subsystem_device);
  1762. }
  1763. /**
  1764. * _base_display_intel_branding - Display branding string
  1765. * @ioc: per adapter object
  1766. *
  1767. * Return nothing.
  1768. */
  1769. static void
  1770. _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
  1771. {
  1772. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
  1773. return;
  1774. switch (ioc->pdev->device) {
  1775. case MPI2_MFGPAGE_DEVID_SAS2008:
  1776. switch (ioc->pdev->subsystem_device) {
  1777. case MPT2SAS_INTEL_RMS2LL080_SSDID:
  1778. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1779. MPT2SAS_INTEL_RMS2LL080_BRANDING);
  1780. break;
  1781. case MPT2SAS_INTEL_RMS2LL040_SSDID:
  1782. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1783. MPT2SAS_INTEL_RMS2LL040_BRANDING);
  1784. break;
  1785. case MPT2SAS_INTEL_SSD910_SSDID:
  1786. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1787. MPT2SAS_INTEL_SSD910_BRANDING);
  1788. break;
  1789. default:
  1790. break;
  1791. }
  1792. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1793. switch (ioc->pdev->subsystem_device) {
  1794. case MPT2SAS_INTEL_RS25GB008_SSDID:
  1795. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1796. MPT2SAS_INTEL_RS25GB008_BRANDING);
  1797. break;
  1798. case MPT2SAS_INTEL_RMS25JB080_SSDID:
  1799. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1800. MPT2SAS_INTEL_RMS25JB080_BRANDING);
  1801. break;
  1802. case MPT2SAS_INTEL_RMS25JB040_SSDID:
  1803. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1804. MPT2SAS_INTEL_RMS25JB040_BRANDING);
  1805. break;
  1806. case MPT2SAS_INTEL_RMS25KB080_SSDID:
  1807. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1808. MPT2SAS_INTEL_RMS25KB080_BRANDING);
  1809. break;
  1810. case MPT2SAS_INTEL_RMS25KB040_SSDID:
  1811. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1812. MPT2SAS_INTEL_RMS25KB040_BRANDING);
  1813. break;
  1814. case MPT2SAS_INTEL_RMS25LB040_SSDID:
  1815. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1816. MPT2SAS_INTEL_RMS25LB040_BRANDING);
  1817. break;
  1818. case MPT2SAS_INTEL_RMS25LB080_SSDID:
  1819. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1820. MPT2SAS_INTEL_RMS25LB080_BRANDING);
  1821. break;
  1822. default:
  1823. break;
  1824. }
  1825. default:
  1826. break;
  1827. }
  1828. }
  1829. /**
  1830. * _base_display_hp_branding - Display branding string
  1831. * @ioc: per adapter object
  1832. *
  1833. * Return nothing.
  1834. */
  1835. static void
  1836. _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
  1837. {
  1838. if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
  1839. return;
  1840. switch (ioc->pdev->device) {
  1841. case MPI2_MFGPAGE_DEVID_SAS2004:
  1842. switch (ioc->pdev->subsystem_device) {
  1843. case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
  1844. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1845. MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
  1846. break;
  1847. default:
  1848. break;
  1849. }
  1850. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1851. switch (ioc->pdev->subsystem_device) {
  1852. case MPT2SAS_HP_2_4_INTERNAL_SSDID:
  1853. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1854. MPT2SAS_HP_2_4_INTERNAL_BRANDING);
  1855. break;
  1856. case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
  1857. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1858. MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
  1859. break;
  1860. case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
  1861. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1862. MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
  1863. break;
  1864. case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
  1865. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1866. MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
  1867. break;
  1868. default:
  1869. break;
  1870. }
  1871. default:
  1872. break;
  1873. }
  1874. }
  1875. /**
  1876. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1877. * @ioc: per adapter object
  1878. *
  1879. * Return nothing.
  1880. */
  1881. static void
  1882. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1883. {
  1884. int i = 0;
  1885. char desc[16];
  1886. u32 iounit_pg1_flags;
  1887. u32 bios_version;
  1888. bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
  1889. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1890. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1891. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1892. ioc->name, desc,
  1893. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1894. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1895. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1896. ioc->facts.FWVersion.Word & 0x000000FF,
  1897. ioc->pdev->revision,
  1898. (bios_version & 0xFF000000) >> 24,
  1899. (bios_version & 0x00FF0000) >> 16,
  1900. (bios_version & 0x0000FF00) >> 8,
  1901. bios_version & 0x000000FF);
  1902. _base_display_dell_branding(ioc);
  1903. _base_display_intel_branding(ioc);
  1904. _base_display_hp_branding(ioc);
  1905. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1906. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1907. printk("Initiator");
  1908. i++;
  1909. }
  1910. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1911. printk("%sTarget", i ? "," : "");
  1912. i++;
  1913. }
  1914. i = 0;
  1915. printk("), ");
  1916. printk("Capabilities=(");
  1917. if (!ioc->hide_ir_msg) {
  1918. if (ioc->facts.IOCCapabilities &
  1919. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1920. printk("Raid");
  1921. i++;
  1922. }
  1923. }
  1924. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1925. printk("%sTLR", i ? "," : "");
  1926. i++;
  1927. }
  1928. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1929. printk("%sMulticast", i ? "," : "");
  1930. i++;
  1931. }
  1932. if (ioc->facts.IOCCapabilities &
  1933. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1934. printk("%sBIDI Target", i ? "," : "");
  1935. i++;
  1936. }
  1937. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1938. printk("%sEEDP", i ? "," : "");
  1939. i++;
  1940. }
  1941. if (ioc->facts.IOCCapabilities &
  1942. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1943. printk("%sSnapshot Buffer", i ? "," : "");
  1944. i++;
  1945. }
  1946. if (ioc->facts.IOCCapabilities &
  1947. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1948. printk("%sDiag Trace Buffer", i ? "," : "");
  1949. i++;
  1950. }
  1951. if (ioc->facts.IOCCapabilities &
  1952. MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
  1953. printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
  1954. i++;
  1955. }
  1956. if (ioc->facts.IOCCapabilities &
  1957. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1958. printk("%sTask Set Full", i ? "," : "");
  1959. i++;
  1960. }
  1961. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1962. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1963. printk("%sNCQ", i ? "," : "");
  1964. i++;
  1965. }
  1966. printk(")\n");
  1967. }
  1968. /**
  1969. * mpt2sas_base_update_missing_delay - change the missing delay timers
  1970. * @ioc: per adapter object
  1971. * @device_missing_delay: amount of time till device is reported missing
  1972. * @io_missing_delay: interval IO is returned when there is a missing device
  1973. *
  1974. * Return nothing.
  1975. *
  1976. * Passed on the command line, this function will modify the device missing
  1977. * delay, as well as the io missing delay. This should be called at driver
  1978. * load time.
  1979. */
  1980. void
  1981. mpt2sas_base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
  1982. u16 device_missing_delay, u8 io_missing_delay)
  1983. {
  1984. u16 dmd, dmd_new, dmd_orignal;
  1985. u8 io_missing_delay_original;
  1986. u16 sz;
  1987. Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
  1988. Mpi2ConfigReply_t mpi_reply;
  1989. u8 num_phys = 0;
  1990. u16 ioc_status;
  1991. mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
  1992. if (!num_phys)
  1993. return;
  1994. sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
  1995. sizeof(Mpi2SasIOUnit1PhyData_t));
  1996. sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
  1997. if (!sas_iounit_pg1) {
  1998. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1999. ioc->name, __FILE__, __LINE__, __func__);
  2000. goto out;
  2001. }
  2002. if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
  2003. sas_iounit_pg1, sz))) {
  2004. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  2005. ioc->name, __FILE__, __LINE__, __func__);
  2006. goto out;
  2007. }
  2008. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
  2009. MPI2_IOCSTATUS_MASK;
  2010. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  2011. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  2012. ioc->name, __FILE__, __LINE__, __func__);
  2013. goto out;
  2014. }
  2015. /* device missing delay */
  2016. dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
  2017. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  2018. dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  2019. else
  2020. dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  2021. dmd_orignal = dmd;
  2022. if (device_missing_delay > 0x7F) {
  2023. dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
  2024. device_missing_delay;
  2025. dmd = dmd / 16;
  2026. dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
  2027. } else
  2028. dmd = device_missing_delay;
  2029. sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
  2030. /* io missing delay */
  2031. io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
  2032. sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
  2033. if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
  2034. sz)) {
  2035. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  2036. dmd_new = (dmd &
  2037. MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  2038. else
  2039. dmd_new =
  2040. dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  2041. printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
  2042. "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
  2043. printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
  2044. "new(%d)\n", ioc->name, io_missing_delay_original,
  2045. io_missing_delay);
  2046. ioc->device_missing_delay = dmd_new;
  2047. ioc->io_missing_delay = io_missing_delay;
  2048. }
  2049. out:
  2050. kfree(sas_iounit_pg1);
  2051. }
  2052. /**
  2053. * _base_static_config_pages - static start of day config pages
  2054. * @ioc: per adapter object
  2055. *
  2056. * Return nothing.
  2057. */
  2058. static void
  2059. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  2060. {
  2061. Mpi2ConfigReply_t mpi_reply;
  2062. u32 iounit_pg1_flags;
  2063. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  2064. if (ioc->ir_firmware)
  2065. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  2066. &ioc->manu_pg10);
  2067. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  2068. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  2069. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  2070. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  2071. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2072. _base_display_ioc_capabilities(ioc);
  2073. /*
  2074. * Enable task_set_full handling in iounit_pg1 when the
  2075. * facts capabilities indicate that its supported.
  2076. */
  2077. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  2078. if ((ioc->facts.IOCCapabilities &
  2079. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  2080. iounit_pg1_flags &=
  2081. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2082. else
  2083. iounit_pg1_flags |=
  2084. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2085. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  2086. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2087. }
  2088. /**
  2089. * _base_release_memory_pools - release memory
  2090. * @ioc: per adapter object
  2091. *
  2092. * Free memory allocated from _base_allocate_memory_pools.
  2093. *
  2094. * Return nothing.
  2095. */
  2096. static void
  2097. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  2098. {
  2099. int i;
  2100. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2101. __func__));
  2102. if (ioc->request) {
  2103. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  2104. ioc->request, ioc->request_dma);
  2105. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  2106. ": free\n", ioc->name, ioc->request));
  2107. ioc->request = NULL;
  2108. }
  2109. if (ioc->sense) {
  2110. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  2111. if (ioc->sense_dma_pool)
  2112. pci_pool_destroy(ioc->sense_dma_pool);
  2113. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  2114. ": free\n", ioc->name, ioc->sense));
  2115. ioc->sense = NULL;
  2116. }
  2117. if (ioc->reply) {
  2118. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  2119. if (ioc->reply_dma_pool)
  2120. pci_pool_destroy(ioc->reply_dma_pool);
  2121. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  2122. ": free\n", ioc->name, ioc->reply));
  2123. ioc->reply = NULL;
  2124. }
  2125. if (ioc->reply_free) {
  2126. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  2127. ioc->reply_free_dma);
  2128. if (ioc->reply_free_dma_pool)
  2129. pci_pool_destroy(ioc->reply_free_dma_pool);
  2130. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  2131. "(0x%p): free\n", ioc->name, ioc->reply_free));
  2132. ioc->reply_free = NULL;
  2133. }
  2134. if (ioc->reply_post_free) {
  2135. pci_pool_free(ioc->reply_post_free_dma_pool,
  2136. ioc->reply_post_free, ioc->reply_post_free_dma);
  2137. if (ioc->reply_post_free_dma_pool)
  2138. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  2139. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2140. "reply_post_free_pool(0x%p): free\n", ioc->name,
  2141. ioc->reply_post_free));
  2142. ioc->reply_post_free = NULL;
  2143. }
  2144. if (ioc->config_page) {
  2145. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2146. "config_page(0x%p): free\n", ioc->name,
  2147. ioc->config_page));
  2148. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  2149. ioc->config_page, ioc->config_page_dma);
  2150. }
  2151. if (ioc->scsi_lookup) {
  2152. free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
  2153. ioc->scsi_lookup = NULL;
  2154. }
  2155. kfree(ioc->hpr_lookup);
  2156. kfree(ioc->internal_lookup);
  2157. if (ioc->chain_lookup) {
  2158. for (i = 0; i < ioc->chain_depth; i++) {
  2159. if (ioc->chain_lookup[i].chain_buffer)
  2160. pci_pool_free(ioc->chain_dma_pool,
  2161. ioc->chain_lookup[i].chain_buffer,
  2162. ioc->chain_lookup[i].chain_buffer_dma);
  2163. }
  2164. if (ioc->chain_dma_pool)
  2165. pci_pool_destroy(ioc->chain_dma_pool);
  2166. free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
  2167. ioc->chain_lookup = NULL;
  2168. }
  2169. }
  2170. /**
  2171. * _base_allocate_memory_pools - allocate start of day memory pools
  2172. * @ioc: per adapter object
  2173. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2174. *
  2175. * Returns 0 success, anything else error
  2176. */
  2177. static int
  2178. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2179. {
  2180. struct mpt2sas_facts *facts;
  2181. u16 max_sge_elements;
  2182. u16 chains_needed_per_io;
  2183. u32 sz, total_sz, reply_post_free_sz;
  2184. u32 retry_sz;
  2185. u16 max_request_credit;
  2186. int i;
  2187. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2188. __func__));
  2189. retry_sz = 0;
  2190. facts = &ioc->facts;
  2191. /* command line tunables for max sgl entries */
  2192. if (max_sgl_entries != -1) {
  2193. ioc->shost->sg_tablesize = (max_sgl_entries <
  2194. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  2195. MPT2SAS_SG_DEPTH;
  2196. } else {
  2197. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  2198. }
  2199. /* command line tunables for max controller queue depth */
  2200. if (max_queue_depth != -1 && max_queue_depth != 0) {
  2201. max_request_credit = min_t(u16, max_queue_depth +
  2202. ioc->hi_priority_depth + ioc->internal_depth,
  2203. facts->RequestCredit);
  2204. if (max_request_credit > MAX_HBA_QUEUE_DEPTH)
  2205. max_request_credit = MAX_HBA_QUEUE_DEPTH;
  2206. } else
  2207. max_request_credit = min_t(u16, facts->RequestCredit,
  2208. MAX_HBA_QUEUE_DEPTH);
  2209. ioc->hba_queue_depth = max_request_credit;
  2210. ioc->hi_priority_depth = facts->HighPriorityCredit;
  2211. ioc->internal_depth = ioc->hi_priority_depth + 5;
  2212. /* request frame size */
  2213. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  2214. /* reply frame size */
  2215. ioc->reply_sz = facts->ReplyFrameSize * 4;
  2216. retry_allocation:
  2217. total_sz = 0;
  2218. /* calculate number of sg elements left over in the 1st frame */
  2219. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  2220. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  2221. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  2222. /* now do the same for a chain buffer */
  2223. max_sge_elements = ioc->request_sz - ioc->sge_size;
  2224. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  2225. ioc->chain_offset_value_for_main_message =
  2226. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  2227. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  2228. /*
  2229. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  2230. */
  2231. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  2232. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  2233. + 1;
  2234. if (chains_needed_per_io > facts->MaxChainDepth) {
  2235. chains_needed_per_io = facts->MaxChainDepth;
  2236. ioc->shost->sg_tablesize = min_t(u16,
  2237. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  2238. * chains_needed_per_io), ioc->shost->sg_tablesize);
  2239. }
  2240. ioc->chains_needed_per_io = chains_needed_per_io;
  2241. /* reply free queue sizing - taking into account for 64 FW events */
  2242. ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
  2243. /* calculate reply descriptor post queue depth */
  2244. ioc->reply_post_queue_depth = ioc->hba_queue_depth +
  2245. ioc->reply_free_queue_depth + 1;
  2246. /* align the reply post queue on the next 16 count boundary */
  2247. if (ioc->reply_post_queue_depth % 16)
  2248. ioc->reply_post_queue_depth += 16 -
  2249. (ioc->reply_post_queue_depth % 16);
  2250. if (ioc->reply_post_queue_depth >
  2251. facts->MaxReplyDescriptorPostQueueDepth) {
  2252. ioc->reply_post_queue_depth =
  2253. facts->MaxReplyDescriptorPostQueueDepth -
  2254. (facts->MaxReplyDescriptorPostQueueDepth % 16);
  2255. ioc->hba_queue_depth =
  2256. ((ioc->reply_post_queue_depth - 64) / 2) - 1;
  2257. ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
  2258. }
  2259. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  2260. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  2261. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  2262. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  2263. ioc->chains_needed_per_io));
  2264. ioc->scsiio_depth = ioc->hba_queue_depth -
  2265. ioc->hi_priority_depth - ioc->internal_depth;
  2266. /* set the scsi host can_queue depth
  2267. * with some internal commands that could be outstanding
  2268. */
  2269. ioc->shost->can_queue = ioc->scsiio_depth;
  2270. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
  2271. "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
  2272. /* contiguous pool for request and chains, 16 byte align, one extra "
  2273. * "frame for smid=0
  2274. */
  2275. ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
  2276. sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
  2277. /* hi-priority queue */
  2278. sz += (ioc->hi_priority_depth * ioc->request_sz);
  2279. /* internal queue */
  2280. sz += (ioc->internal_depth * ioc->request_sz);
  2281. ioc->request_dma_sz = sz;
  2282. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  2283. if (!ioc->request) {
  2284. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2285. "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2286. "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
  2287. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2288. if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  2289. goto out;
  2290. retry_sz += 64;
  2291. ioc->hba_queue_depth = max_request_credit - retry_sz;
  2292. goto retry_allocation;
  2293. }
  2294. if (retry_sz)
  2295. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2296. "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2297. "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
  2298. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2299. /* hi-priority queue */
  2300. ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
  2301. ioc->request_sz);
  2302. ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
  2303. ioc->request_sz);
  2304. /* internal queue */
  2305. ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
  2306. ioc->request_sz);
  2307. ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
  2308. ioc->request_sz);
  2309. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  2310. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2311. ioc->request, ioc->hba_queue_depth, ioc->request_sz,
  2312. (ioc->hba_queue_depth * ioc->request_sz)/1024));
  2313. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  2314. ioc->name, (unsigned long long) ioc->request_dma));
  2315. total_sz += sz;
  2316. sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
  2317. ioc->scsi_lookup_pages = get_order(sz);
  2318. ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
  2319. GFP_KERNEL, ioc->scsi_lookup_pages);
  2320. if (!ioc->scsi_lookup) {
  2321. printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
  2322. "sz(%d)\n", ioc->name, (int)sz);
  2323. goto out;
  2324. }
  2325. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
  2326. "depth(%d)\n", ioc->name, ioc->request,
  2327. ioc->scsiio_depth));
  2328. ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH);
  2329. sz = ioc->chain_depth * sizeof(struct chain_tracker);
  2330. ioc->chain_pages = get_order(sz);
  2331. ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
  2332. GFP_KERNEL, ioc->chain_pages);
  2333. if (!ioc->chain_lookup) {
  2334. printk(MPT2SAS_ERR_FMT "chain_lookup: get_free_pages failed, "
  2335. "sz(%d)\n", ioc->name, (int)sz);
  2336. goto out;
  2337. }
  2338. ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
  2339. ioc->request_sz, 16, 0);
  2340. if (!ioc->chain_dma_pool) {
  2341. printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
  2342. "failed\n", ioc->name);
  2343. goto out;
  2344. }
  2345. for (i = 0; i < ioc->chain_depth; i++) {
  2346. ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
  2347. ioc->chain_dma_pool , GFP_KERNEL,
  2348. &ioc->chain_lookup[i].chain_buffer_dma);
  2349. if (!ioc->chain_lookup[i].chain_buffer) {
  2350. ioc->chain_depth = i;
  2351. goto chain_done;
  2352. }
  2353. total_sz += ioc->request_sz;
  2354. }
  2355. chain_done:
  2356. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
  2357. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2358. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  2359. ioc->request_sz))/1024));
  2360. /* initialize hi-priority queue smid's */
  2361. ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
  2362. sizeof(struct request_tracker), GFP_KERNEL);
  2363. if (!ioc->hpr_lookup) {
  2364. printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
  2365. ioc->name);
  2366. goto out;
  2367. }
  2368. ioc->hi_priority_smid = ioc->scsiio_depth + 1;
  2369. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
  2370. "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
  2371. ioc->hi_priority_depth, ioc->hi_priority_smid));
  2372. /* initialize internal queue smid's */
  2373. ioc->internal_lookup = kcalloc(ioc->internal_depth,
  2374. sizeof(struct request_tracker), GFP_KERNEL);
  2375. if (!ioc->internal_lookup) {
  2376. printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
  2377. ioc->name);
  2378. goto out;
  2379. }
  2380. ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
  2381. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
  2382. "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
  2383. ioc->internal_depth, ioc->internal_smid));
  2384. /* sense buffers, 4 byte align */
  2385. sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
  2386. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  2387. 0);
  2388. if (!ioc->sense_dma_pool) {
  2389. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  2390. ioc->name);
  2391. goto out;
  2392. }
  2393. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  2394. &ioc->sense_dma);
  2395. if (!ioc->sense) {
  2396. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  2397. ioc->name);
  2398. goto out;
  2399. }
  2400. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2401. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  2402. "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
  2403. SCSI_SENSE_BUFFERSIZE, sz/1024));
  2404. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  2405. ioc->name, (unsigned long long)ioc->sense_dma));
  2406. total_sz += sz;
  2407. /* reply pool, 4 byte align */
  2408. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  2409. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  2410. 0);
  2411. if (!ioc->reply_dma_pool) {
  2412. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  2413. ioc->name);
  2414. goto out;
  2415. }
  2416. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  2417. &ioc->reply_dma);
  2418. if (!ioc->reply) {
  2419. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  2420. ioc->name);
  2421. goto out;
  2422. }
  2423. ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
  2424. ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
  2425. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  2426. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  2427. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  2428. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  2429. ioc->name, (unsigned long long)ioc->reply_dma));
  2430. total_sz += sz;
  2431. /* reply free queue, 16 byte align */
  2432. sz = ioc->reply_free_queue_depth * 4;
  2433. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  2434. ioc->pdev, sz, 16, 0);
  2435. if (!ioc->reply_free_dma_pool) {
  2436. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  2437. "failed\n", ioc->name);
  2438. goto out;
  2439. }
  2440. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  2441. &ioc->reply_free_dma);
  2442. if (!ioc->reply_free) {
  2443. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  2444. "failed\n", ioc->name);
  2445. goto out;
  2446. }
  2447. memset(ioc->reply_free, 0, sz);
  2448. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  2449. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  2450. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  2451. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  2452. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  2453. total_sz += sz;
  2454. /* reply post queue, 16 byte align */
  2455. reply_post_free_sz = ioc->reply_post_queue_depth *
  2456. sizeof(Mpi2DefaultReplyDescriptor_t);
  2457. if (_base_is_controller_msix_enabled(ioc))
  2458. sz = reply_post_free_sz * ioc->reply_queue_count;
  2459. else
  2460. sz = reply_post_free_sz;
  2461. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  2462. ioc->pdev, sz, 16, 0);
  2463. if (!ioc->reply_post_free_dma_pool) {
  2464. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  2465. "failed\n", ioc->name);
  2466. goto out;
  2467. }
  2468. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  2469. GFP_KERNEL, &ioc->reply_post_free_dma);
  2470. if (!ioc->reply_post_free) {
  2471. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  2472. "failed\n", ioc->name);
  2473. goto out;
  2474. }
  2475. memset(ioc->reply_post_free, 0, sz);
  2476. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  2477. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  2478. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  2479. sz/1024));
  2480. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  2481. "(0x%llx)\n", ioc->name, (unsigned long long)
  2482. ioc->reply_post_free_dma));
  2483. total_sz += sz;
  2484. ioc->config_page_sz = 512;
  2485. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  2486. ioc->config_page_sz, &ioc->config_page_dma);
  2487. if (!ioc->config_page) {
  2488. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  2489. "failed\n", ioc->name);
  2490. goto out;
  2491. }
  2492. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  2493. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  2494. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  2495. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  2496. total_sz += ioc->config_page_sz;
  2497. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  2498. ioc->name, total_sz/1024);
  2499. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  2500. "Max Controller Queue Depth(%d)\n",
  2501. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  2502. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  2503. ioc->name, ioc->shost->sg_tablesize);
  2504. return 0;
  2505. out:
  2506. return -ENOMEM;
  2507. }
  2508. /**
  2509. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  2510. * @ioc: Pointer to MPT_ADAPTER structure
  2511. * @cooked: Request raw or cooked IOC state
  2512. *
  2513. * Returns all IOC Doorbell register bits if cooked==0, else just the
  2514. * Doorbell bits in MPI_IOC_STATE_MASK.
  2515. */
  2516. u32
  2517. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  2518. {
  2519. u32 s, sc;
  2520. s = readl(&ioc->chip->Doorbell);
  2521. sc = s & MPI2_IOC_STATE_MASK;
  2522. return cooked ? sc : s;
  2523. }
  2524. /**
  2525. * _base_wait_on_iocstate - waiting on a particular ioc state
  2526. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  2527. * @timeout: timeout in second
  2528. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2529. *
  2530. * Returns 0 for success, non-zero for failure.
  2531. */
  2532. static int
  2533. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  2534. int sleep_flag)
  2535. {
  2536. u32 count, cntdn;
  2537. u32 current_state;
  2538. count = 0;
  2539. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2540. do {
  2541. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  2542. if (current_state == ioc_state)
  2543. return 0;
  2544. if (count && current_state == MPI2_IOC_STATE_FAULT)
  2545. break;
  2546. if (sleep_flag == CAN_SLEEP)
  2547. msleep(1);
  2548. else
  2549. udelay(500);
  2550. count++;
  2551. } while (--cntdn);
  2552. return current_state;
  2553. }
  2554. /**
  2555. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  2556. * a write to the doorbell)
  2557. * @ioc: per adapter object
  2558. * @timeout: timeout in second
  2559. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2560. *
  2561. * Returns 0 for success, non-zero for failure.
  2562. *
  2563. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  2564. */
  2565. static int
  2566. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2567. int sleep_flag)
  2568. {
  2569. u32 cntdn, count;
  2570. u32 int_status;
  2571. count = 0;
  2572. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2573. do {
  2574. int_status = readl(&ioc->chip->HostInterruptStatus);
  2575. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2576. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2577. "successful count(%d), timeout(%d)\n", ioc->name,
  2578. __func__, count, timeout));
  2579. return 0;
  2580. }
  2581. if (sleep_flag == CAN_SLEEP)
  2582. msleep(1);
  2583. else
  2584. udelay(500);
  2585. count++;
  2586. } while (--cntdn);
  2587. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2588. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2589. return -EFAULT;
  2590. }
  2591. /**
  2592. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  2593. * @ioc: per adapter object
  2594. * @timeout: timeout in second
  2595. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2596. *
  2597. * Returns 0 for success, non-zero for failure.
  2598. *
  2599. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  2600. * doorbell.
  2601. */
  2602. static int
  2603. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2604. int sleep_flag)
  2605. {
  2606. u32 cntdn, count;
  2607. u32 int_status;
  2608. u32 doorbell;
  2609. count = 0;
  2610. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2611. do {
  2612. int_status = readl(&ioc->chip->HostInterruptStatus);
  2613. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  2614. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2615. "successful count(%d), timeout(%d)\n", ioc->name,
  2616. __func__, count, timeout));
  2617. return 0;
  2618. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2619. doorbell = readl(&ioc->chip->Doorbell);
  2620. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  2621. MPI2_IOC_STATE_FAULT) {
  2622. mpt2sas_base_fault_info(ioc , doorbell);
  2623. return -EFAULT;
  2624. }
  2625. } else if (int_status == 0xFFFFFFFF)
  2626. goto out;
  2627. if (sleep_flag == CAN_SLEEP)
  2628. msleep(1);
  2629. else
  2630. udelay(500);
  2631. count++;
  2632. } while (--cntdn);
  2633. out:
  2634. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2635. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2636. return -EFAULT;
  2637. }
  2638. /**
  2639. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  2640. * @ioc: per adapter object
  2641. * @timeout: timeout in second
  2642. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2643. *
  2644. * Returns 0 for success, non-zero for failure.
  2645. *
  2646. */
  2647. static int
  2648. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2649. int sleep_flag)
  2650. {
  2651. u32 cntdn, count;
  2652. u32 doorbell_reg;
  2653. count = 0;
  2654. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2655. do {
  2656. doorbell_reg = readl(&ioc->chip->Doorbell);
  2657. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  2658. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2659. "successful count(%d), timeout(%d)\n", ioc->name,
  2660. __func__, count, timeout));
  2661. return 0;
  2662. }
  2663. if (sleep_flag == CAN_SLEEP)
  2664. msleep(1);
  2665. else
  2666. udelay(500);
  2667. count++;
  2668. } while (--cntdn);
  2669. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2670. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  2671. return -EFAULT;
  2672. }
  2673. /**
  2674. * _base_send_ioc_reset - send doorbell reset
  2675. * @ioc: per adapter object
  2676. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  2677. * @timeout: timeout in second
  2678. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2679. *
  2680. * Returns 0 for success, non-zero for failure.
  2681. */
  2682. static int
  2683. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  2684. int sleep_flag)
  2685. {
  2686. u32 ioc_state;
  2687. int r = 0;
  2688. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2689. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2690. ioc->name, __func__);
  2691. return -EFAULT;
  2692. }
  2693. if (!(ioc->facts.IOCCapabilities &
  2694. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2695. return -EFAULT;
  2696. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2697. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2698. &ioc->chip->Doorbell);
  2699. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2700. r = -EFAULT;
  2701. goto out;
  2702. }
  2703. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2704. timeout, sleep_flag);
  2705. if (ioc_state) {
  2706. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2707. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2708. r = -EFAULT;
  2709. goto out;
  2710. }
  2711. out:
  2712. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2713. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2714. return r;
  2715. }
  2716. /**
  2717. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2718. * @ioc: per adapter object
  2719. * @request_bytes: request length
  2720. * @request: pointer having request payload
  2721. * @reply_bytes: reply length
  2722. * @reply: pointer to reply payload
  2723. * @timeout: timeout in second
  2724. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2725. *
  2726. * Returns 0 for success, non-zero for failure.
  2727. */
  2728. static int
  2729. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2730. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2731. {
  2732. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2733. int i;
  2734. u8 failed;
  2735. u16 dummy;
  2736. __le32 *mfp;
  2737. /* make sure doorbell is not in use */
  2738. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2739. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2740. " (line=%d)\n", ioc->name, __LINE__);
  2741. return -EFAULT;
  2742. }
  2743. /* clear pending doorbell interrupts from previous state changes */
  2744. if (readl(&ioc->chip->HostInterruptStatus) &
  2745. MPI2_HIS_IOC2SYS_DB_STATUS)
  2746. writel(0, &ioc->chip->HostInterruptStatus);
  2747. /* send message to ioc */
  2748. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2749. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2750. &ioc->chip->Doorbell);
  2751. if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
  2752. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2753. "int failed (line=%d)\n", ioc->name, __LINE__);
  2754. return -EFAULT;
  2755. }
  2756. writel(0, &ioc->chip->HostInterruptStatus);
  2757. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2758. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2759. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2760. return -EFAULT;
  2761. }
  2762. /* send message 32-bits at a time */
  2763. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2764. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2765. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2766. failed = 1;
  2767. }
  2768. if (failed) {
  2769. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2770. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2771. return -EFAULT;
  2772. }
  2773. /* now wait for the reply */
  2774. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2775. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2776. "int failed (line=%d)\n", ioc->name, __LINE__);
  2777. return -EFAULT;
  2778. }
  2779. /* read the first two 16-bits, it gives the total length of the reply */
  2780. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2781. & MPI2_DOORBELL_DATA_MASK);
  2782. writel(0, &ioc->chip->HostInterruptStatus);
  2783. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2784. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2785. "int failed (line=%d)\n", ioc->name, __LINE__);
  2786. return -EFAULT;
  2787. }
  2788. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2789. & MPI2_DOORBELL_DATA_MASK);
  2790. writel(0, &ioc->chip->HostInterruptStatus);
  2791. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2792. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2793. printk(MPT2SAS_ERR_FMT "doorbell "
  2794. "handshake int failed (line=%d)\n", ioc->name,
  2795. __LINE__);
  2796. return -EFAULT;
  2797. }
  2798. if (i >= reply_bytes/2) /* overflow case */
  2799. dummy = readl(&ioc->chip->Doorbell);
  2800. else
  2801. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2802. & MPI2_DOORBELL_DATA_MASK);
  2803. writel(0, &ioc->chip->HostInterruptStatus);
  2804. }
  2805. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2806. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2807. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2808. " (line=%d)\n", ioc->name, __LINE__));
  2809. }
  2810. writel(0, &ioc->chip->HostInterruptStatus);
  2811. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2812. mfp = (__le32 *)reply;
  2813. printk(KERN_INFO "\toffset:data\n");
  2814. for (i = 0; i < reply_bytes/4; i++)
  2815. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2816. le32_to_cpu(mfp[i]));
  2817. }
  2818. return 0;
  2819. }
  2820. /**
  2821. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2822. * @ioc: per adapter object
  2823. * @mpi_reply: the reply payload from FW
  2824. * @mpi_request: the request payload sent to FW
  2825. *
  2826. * The SAS IO Unit Control Request message allows the host to perform low-level
  2827. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2828. * to obtain the IOC assigned device handles for a device if it has other
  2829. * identifying information about the device, in addition allows the host to
  2830. * remove IOC resources associated with the device.
  2831. *
  2832. * Returns 0 for success, non-zero for failure.
  2833. */
  2834. int
  2835. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2836. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2837. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2838. {
  2839. u16 smid;
  2840. u32 ioc_state;
  2841. unsigned long timeleft;
  2842. u8 issue_reset;
  2843. int rc;
  2844. void *request;
  2845. u16 wait_state_count;
  2846. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2847. __func__));
  2848. mutex_lock(&ioc->base_cmds.mutex);
  2849. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2850. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2851. ioc->name, __func__);
  2852. rc = -EAGAIN;
  2853. goto out;
  2854. }
  2855. wait_state_count = 0;
  2856. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2857. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2858. if (wait_state_count++ == 10) {
  2859. printk(MPT2SAS_ERR_FMT
  2860. "%s: failed due to ioc not operational\n",
  2861. ioc->name, __func__);
  2862. rc = -EFAULT;
  2863. goto out;
  2864. }
  2865. ssleep(1);
  2866. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2867. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2868. "operational state(count=%d)\n", ioc->name,
  2869. __func__, wait_state_count);
  2870. }
  2871. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2872. if (!smid) {
  2873. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2874. ioc->name, __func__);
  2875. rc = -EAGAIN;
  2876. goto out;
  2877. }
  2878. rc = 0;
  2879. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2880. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2881. ioc->base_cmds.smid = smid;
  2882. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2883. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2884. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2885. ioc->ioc_link_reset_in_progress = 1;
  2886. init_completion(&ioc->base_cmds.done);
  2887. mpt2sas_base_put_smid_default(ioc, smid);
  2888. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2889. msecs_to_jiffies(10000));
  2890. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2891. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2892. ioc->ioc_link_reset_in_progress)
  2893. ioc->ioc_link_reset_in_progress = 0;
  2894. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2895. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2896. ioc->name, __func__);
  2897. _debug_dump_mf(mpi_request,
  2898. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2899. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2900. issue_reset = 1;
  2901. goto issue_host_reset;
  2902. }
  2903. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2904. memcpy(mpi_reply, ioc->base_cmds.reply,
  2905. sizeof(Mpi2SasIoUnitControlReply_t));
  2906. else
  2907. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2908. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2909. goto out;
  2910. issue_host_reset:
  2911. if (issue_reset)
  2912. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2913. FORCE_BIG_HAMMER);
  2914. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2915. rc = -EFAULT;
  2916. out:
  2917. mutex_unlock(&ioc->base_cmds.mutex);
  2918. return rc;
  2919. }
  2920. /**
  2921. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2922. * @ioc: per adapter object
  2923. * @mpi_reply: the reply payload from FW
  2924. * @mpi_request: the request payload sent to FW
  2925. *
  2926. * The SCSI Enclosure Processor request message causes the IOC to
  2927. * communicate with SES devices to control LED status signals.
  2928. *
  2929. * Returns 0 for success, non-zero for failure.
  2930. */
  2931. int
  2932. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2933. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2934. {
  2935. u16 smid;
  2936. u32 ioc_state;
  2937. unsigned long timeleft;
  2938. u8 issue_reset;
  2939. int rc;
  2940. void *request;
  2941. u16 wait_state_count;
  2942. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2943. __func__));
  2944. mutex_lock(&ioc->base_cmds.mutex);
  2945. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2946. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2947. ioc->name, __func__);
  2948. rc = -EAGAIN;
  2949. goto out;
  2950. }
  2951. wait_state_count = 0;
  2952. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2953. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2954. if (wait_state_count++ == 10) {
  2955. printk(MPT2SAS_ERR_FMT
  2956. "%s: failed due to ioc not operational\n",
  2957. ioc->name, __func__);
  2958. rc = -EFAULT;
  2959. goto out;
  2960. }
  2961. ssleep(1);
  2962. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2963. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2964. "operational state(count=%d)\n", ioc->name,
  2965. __func__, wait_state_count);
  2966. }
  2967. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2968. if (!smid) {
  2969. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2970. ioc->name, __func__);
  2971. rc = -EAGAIN;
  2972. goto out;
  2973. }
  2974. rc = 0;
  2975. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2976. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2977. ioc->base_cmds.smid = smid;
  2978. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2979. init_completion(&ioc->base_cmds.done);
  2980. mpt2sas_base_put_smid_default(ioc, smid);
  2981. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2982. msecs_to_jiffies(10000));
  2983. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2984. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2985. ioc->name, __func__);
  2986. _debug_dump_mf(mpi_request,
  2987. sizeof(Mpi2SepRequest_t)/4);
  2988. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2989. issue_reset = 1;
  2990. goto issue_host_reset;
  2991. }
  2992. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2993. memcpy(mpi_reply, ioc->base_cmds.reply,
  2994. sizeof(Mpi2SepReply_t));
  2995. else
  2996. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2997. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2998. goto out;
  2999. issue_host_reset:
  3000. if (issue_reset)
  3001. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  3002. FORCE_BIG_HAMMER);
  3003. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3004. rc = -EFAULT;
  3005. out:
  3006. mutex_unlock(&ioc->base_cmds.mutex);
  3007. return rc;
  3008. }
  3009. /**
  3010. * _base_get_port_facts - obtain port facts reply and save in ioc
  3011. * @ioc: per adapter object
  3012. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3013. *
  3014. * Returns 0 for success, non-zero for failure.
  3015. */
  3016. static int
  3017. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  3018. {
  3019. Mpi2PortFactsRequest_t mpi_request;
  3020. Mpi2PortFactsReply_t mpi_reply;
  3021. struct mpt2sas_port_facts *pfacts;
  3022. int mpi_reply_sz, mpi_request_sz, r;
  3023. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3024. __func__));
  3025. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  3026. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  3027. memset(&mpi_request, 0, mpi_request_sz);
  3028. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  3029. mpi_request.PortNumber = port;
  3030. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  3031. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  3032. if (r != 0) {
  3033. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3034. ioc->name, __func__, r);
  3035. return r;
  3036. }
  3037. pfacts = &ioc->pfacts[port];
  3038. memset(pfacts, 0, sizeof(struct mpt2sas_port_facts));
  3039. pfacts->PortNumber = mpi_reply.PortNumber;
  3040. pfacts->VP_ID = mpi_reply.VP_ID;
  3041. pfacts->VF_ID = mpi_reply.VF_ID;
  3042. pfacts->MaxPostedCmdBuffers =
  3043. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  3044. return 0;
  3045. }
  3046. /**
  3047. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  3048. * @ioc: per adapter object
  3049. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3050. *
  3051. * Returns 0 for success, non-zero for failure.
  3052. */
  3053. static int
  3054. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3055. {
  3056. Mpi2IOCFactsRequest_t mpi_request;
  3057. Mpi2IOCFactsReply_t mpi_reply;
  3058. struct mpt2sas_facts *facts;
  3059. int mpi_reply_sz, mpi_request_sz, r;
  3060. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3061. __func__));
  3062. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  3063. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  3064. memset(&mpi_request, 0, mpi_request_sz);
  3065. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  3066. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  3067. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  3068. if (r != 0) {
  3069. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3070. ioc->name, __func__, r);
  3071. return r;
  3072. }
  3073. facts = &ioc->facts;
  3074. memset(facts, 0, sizeof(struct mpt2sas_facts));
  3075. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  3076. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  3077. facts->VP_ID = mpi_reply.VP_ID;
  3078. facts->VF_ID = mpi_reply.VF_ID;
  3079. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  3080. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  3081. facts->WhoInit = mpi_reply.WhoInit;
  3082. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  3083. facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
  3084. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  3085. facts->MaxReplyDescriptorPostQueueDepth =
  3086. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  3087. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  3088. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  3089. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  3090. ioc->ir_firmware = 1;
  3091. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  3092. facts->IOCRequestFrameSize =
  3093. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  3094. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  3095. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  3096. ioc->shost->max_id = -1;
  3097. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  3098. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  3099. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  3100. facts->HighPriorityCredit =
  3101. le16_to_cpu(mpi_reply.HighPriorityCredit);
  3102. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  3103. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  3104. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  3105. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  3106. facts->MaxChainDepth));
  3107. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  3108. "reply frame size(%d)\n", ioc->name,
  3109. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  3110. return 0;
  3111. }
  3112. /**
  3113. * _base_send_ioc_init - send ioc_init to firmware
  3114. * @ioc: per adapter object
  3115. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3116. *
  3117. * Returns 0 for success, non-zero for failure.
  3118. */
  3119. static int
  3120. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3121. {
  3122. Mpi2IOCInitRequest_t mpi_request;
  3123. Mpi2IOCInitReply_t mpi_reply;
  3124. int r;
  3125. struct timeval current_time;
  3126. u16 ioc_status;
  3127. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3128. __func__));
  3129. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  3130. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  3131. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  3132. mpi_request.VF_ID = 0; /* TODO */
  3133. mpi_request.VP_ID = 0;
  3134. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  3135. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  3136. if (_base_is_controller_msix_enabled(ioc))
  3137. mpi_request.HostMSIxVectors = ioc->reply_queue_count;
  3138. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  3139. mpi_request.ReplyDescriptorPostQueueDepth =
  3140. cpu_to_le16(ioc->reply_post_queue_depth);
  3141. mpi_request.ReplyFreeQueueDepth =
  3142. cpu_to_le16(ioc->reply_free_queue_depth);
  3143. mpi_request.SenseBufferAddressHigh =
  3144. cpu_to_le32((u64)ioc->sense_dma >> 32);
  3145. mpi_request.SystemReplyAddressHigh =
  3146. cpu_to_le32((u64)ioc->reply_dma >> 32);
  3147. mpi_request.SystemRequestFrameBaseAddress =
  3148. cpu_to_le64((u64)ioc->request_dma);
  3149. mpi_request.ReplyFreeQueueAddress =
  3150. cpu_to_le64((u64)ioc->reply_free_dma);
  3151. mpi_request.ReplyDescriptorPostQueueAddress =
  3152. cpu_to_le64((u64)ioc->reply_post_free_dma);
  3153. /* This time stamp specifies number of milliseconds
  3154. * since epoch ~ midnight January 1, 1970.
  3155. */
  3156. do_gettimeofday(&current_time);
  3157. mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
  3158. (current_time.tv_usec / 1000));
  3159. if (ioc->logging_level & MPT_DEBUG_INIT) {
  3160. __le32 *mfp;
  3161. int i;
  3162. mfp = (__le32 *)&mpi_request;
  3163. printk(KERN_INFO "\toffset:data\n");
  3164. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  3165. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  3166. le32_to_cpu(mfp[i]));
  3167. }
  3168. r = _base_handshake_req_reply_wait(ioc,
  3169. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  3170. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  3171. sleep_flag);
  3172. if (r != 0) {
  3173. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3174. ioc->name, __func__, r);
  3175. return r;
  3176. }
  3177. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
  3178. if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
  3179. mpi_reply.IOCLogInfo) {
  3180. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  3181. r = -EIO;
  3182. }
  3183. return 0;
  3184. }
  3185. /**
  3186. * mpt2sas_port_enable_done - command completion routine for port enable
  3187. * @ioc: per adapter object
  3188. * @smid: system request message index
  3189. * @msix_index: MSIX table index supplied by the OS
  3190. * @reply: reply message frame(lower 32bit addr)
  3191. *
  3192. * Return 1 meaning mf should be freed from _base_interrupt
  3193. * 0 means the mf is freed from this function.
  3194. */
  3195. u8
  3196. mpt2sas_port_enable_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  3197. u32 reply)
  3198. {
  3199. MPI2DefaultReply_t *mpi_reply;
  3200. u16 ioc_status;
  3201. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  3202. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  3203. return 1;
  3204. if (ioc->port_enable_cmds.status == MPT2_CMD_NOT_USED)
  3205. return 1;
  3206. ioc->port_enable_cmds.status |= MPT2_CMD_COMPLETE;
  3207. if (mpi_reply) {
  3208. ioc->port_enable_cmds.status |= MPT2_CMD_REPLY_VALID;
  3209. memcpy(ioc->port_enable_cmds.reply, mpi_reply,
  3210. mpi_reply->MsgLength*4);
  3211. }
  3212. ioc->port_enable_cmds.status &= ~MPT2_CMD_PENDING;
  3213. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3214. if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
  3215. ioc->port_enable_failed = 1;
  3216. if (ioc->is_driver_loading) {
  3217. if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
  3218. mpt2sas_port_enable_complete(ioc);
  3219. return 1;
  3220. } else {
  3221. ioc->start_scan_failed = ioc_status;
  3222. ioc->start_scan = 0;
  3223. return 1;
  3224. }
  3225. }
  3226. complete(&ioc->port_enable_cmds.done);
  3227. return 1;
  3228. }
  3229. /**
  3230. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  3231. * @ioc: per adapter object
  3232. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3233. *
  3234. * Returns 0 for success, non-zero for failure.
  3235. */
  3236. static int
  3237. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3238. {
  3239. Mpi2PortEnableRequest_t *mpi_request;
  3240. Mpi2PortEnableReply_t *mpi_reply;
  3241. unsigned long timeleft;
  3242. int r = 0;
  3243. u16 smid;
  3244. u16 ioc_status;
  3245. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3246. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3247. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3248. ioc->name, __func__);
  3249. return -EAGAIN;
  3250. }
  3251. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3252. if (!smid) {
  3253. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3254. ioc->name, __func__);
  3255. return -EAGAIN;
  3256. }
  3257. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3258. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3259. ioc->port_enable_cmds.smid = smid;
  3260. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3261. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3262. init_completion(&ioc->port_enable_cmds.done);
  3263. mpt2sas_base_put_smid_default(ioc, smid);
  3264. timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
  3265. 300*HZ);
  3266. if (!(ioc->port_enable_cmds.status & MPT2_CMD_COMPLETE)) {
  3267. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3268. ioc->name, __func__);
  3269. _debug_dump_mf(mpi_request,
  3270. sizeof(Mpi2PortEnableRequest_t)/4);
  3271. if (ioc->port_enable_cmds.status & MPT2_CMD_RESET)
  3272. r = -EFAULT;
  3273. else
  3274. r = -ETIME;
  3275. goto out;
  3276. }
  3277. mpi_reply = ioc->port_enable_cmds.reply;
  3278. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3279. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  3280. printk(MPT2SAS_ERR_FMT "%s: failed with (ioc_status=0x%08x)\n",
  3281. ioc->name, __func__, ioc_status);
  3282. r = -EFAULT;
  3283. goto out;
  3284. }
  3285. out:
  3286. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3287. printk(MPT2SAS_INFO_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
  3288. "SUCCESS" : "FAILED"));
  3289. return r;
  3290. }
  3291. /**
  3292. * mpt2sas_port_enable - initiate firmware discovery (don't wait for reply)
  3293. * @ioc: per adapter object
  3294. *
  3295. * Returns 0 for success, non-zero for failure.
  3296. */
  3297. int
  3298. mpt2sas_port_enable(struct MPT2SAS_ADAPTER *ioc)
  3299. {
  3300. Mpi2PortEnableRequest_t *mpi_request;
  3301. u16 smid;
  3302. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3303. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3304. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3305. ioc->name, __func__);
  3306. return -EAGAIN;
  3307. }
  3308. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3309. if (!smid) {
  3310. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3311. ioc->name, __func__);
  3312. return -EAGAIN;
  3313. }
  3314. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3315. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3316. ioc->port_enable_cmds.smid = smid;
  3317. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3318. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3319. mpt2sas_base_put_smid_default(ioc, smid);
  3320. return 0;
  3321. }
  3322. /**
  3323. * _base_determine_wait_on_discovery - desposition
  3324. * @ioc: per adapter object
  3325. *
  3326. * Decide whether to wait on discovery to complete. Used to either
  3327. * locate boot device, or report volumes ahead of physical devices.
  3328. *
  3329. * Returns 1 for wait, 0 for don't wait
  3330. */
  3331. static int
  3332. _base_determine_wait_on_discovery(struct MPT2SAS_ADAPTER *ioc)
  3333. {
  3334. /* We wait for discovery to complete if IR firmware is loaded.
  3335. * The sas topology events arrive before PD events, so we need time to
  3336. * turn on the bit in ioc->pd_handles to indicate PD
  3337. * Also, it maybe required to report Volumes ahead of physical
  3338. * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
  3339. */
  3340. if (ioc->ir_firmware)
  3341. return 1;
  3342. /* if no Bios, then we don't need to wait */
  3343. if (!ioc->bios_pg3.BiosVersion)
  3344. return 0;
  3345. /* Bios is present, then we drop down here.
  3346. *
  3347. * If there any entries in the Bios Page 2, then we wait
  3348. * for discovery to complete.
  3349. */
  3350. /* Current Boot Device */
  3351. if ((ioc->bios_pg2.CurrentBootDeviceForm &
  3352. MPI2_BIOSPAGE2_FORM_MASK) ==
  3353. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3354. /* Request Boot Device */
  3355. (ioc->bios_pg2.ReqBootDeviceForm &
  3356. MPI2_BIOSPAGE2_FORM_MASK) ==
  3357. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3358. /* Alternate Request Boot Device */
  3359. (ioc->bios_pg2.ReqAltBootDeviceForm &
  3360. MPI2_BIOSPAGE2_FORM_MASK) ==
  3361. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
  3362. return 0;
  3363. return 1;
  3364. }
  3365. /**
  3366. * _base_unmask_events - turn on notification for this event
  3367. * @ioc: per adapter object
  3368. * @event: firmware event
  3369. *
  3370. * The mask is stored in ioc->event_masks.
  3371. */
  3372. static void
  3373. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  3374. {
  3375. u32 desired_event;
  3376. if (event >= 128)
  3377. return;
  3378. desired_event = (1 << (event % 32));
  3379. if (event < 32)
  3380. ioc->event_masks[0] &= ~desired_event;
  3381. else if (event < 64)
  3382. ioc->event_masks[1] &= ~desired_event;
  3383. else if (event < 96)
  3384. ioc->event_masks[2] &= ~desired_event;
  3385. else if (event < 128)
  3386. ioc->event_masks[3] &= ~desired_event;
  3387. }
  3388. /**
  3389. * _base_event_notification - send event notification
  3390. * @ioc: per adapter object
  3391. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3392. *
  3393. * Returns 0 for success, non-zero for failure.
  3394. */
  3395. static int
  3396. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3397. {
  3398. Mpi2EventNotificationRequest_t *mpi_request;
  3399. unsigned long timeleft;
  3400. u16 smid;
  3401. int r = 0;
  3402. int i;
  3403. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3404. __func__));
  3405. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3406. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3407. ioc->name, __func__);
  3408. return -EAGAIN;
  3409. }
  3410. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  3411. if (!smid) {
  3412. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3413. ioc->name, __func__);
  3414. return -EAGAIN;
  3415. }
  3416. ioc->base_cmds.status = MPT2_CMD_PENDING;
  3417. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3418. ioc->base_cmds.smid = smid;
  3419. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  3420. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  3421. mpi_request->VF_ID = 0; /* TODO */
  3422. mpi_request->VP_ID = 0;
  3423. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3424. mpi_request->EventMasks[i] =
  3425. cpu_to_le32(ioc->event_masks[i]);
  3426. init_completion(&ioc->base_cmds.done);
  3427. mpt2sas_base_put_smid_default(ioc, smid);
  3428. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  3429. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  3430. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3431. ioc->name, __func__);
  3432. _debug_dump_mf(mpi_request,
  3433. sizeof(Mpi2EventNotificationRequest_t)/4);
  3434. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  3435. r = -EFAULT;
  3436. else
  3437. r = -ETIME;
  3438. } else
  3439. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  3440. ioc->name, __func__));
  3441. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3442. return r;
  3443. }
  3444. /**
  3445. * mpt2sas_base_validate_event_type - validating event types
  3446. * @ioc: per adapter object
  3447. * @event: firmware event
  3448. *
  3449. * This will turn on firmware event notification when application
  3450. * ask for that event. We don't mask events that are already enabled.
  3451. */
  3452. void
  3453. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  3454. {
  3455. int i, j;
  3456. u32 event_mask, desired_event;
  3457. u8 send_update_to_fw;
  3458. for (i = 0, send_update_to_fw = 0; i <
  3459. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  3460. event_mask = ~event_type[i];
  3461. desired_event = 1;
  3462. for (j = 0; j < 32; j++) {
  3463. if (!(event_mask & desired_event) &&
  3464. (ioc->event_masks[i] & desired_event)) {
  3465. ioc->event_masks[i] &= ~desired_event;
  3466. send_update_to_fw = 1;
  3467. }
  3468. desired_event = (desired_event << 1);
  3469. }
  3470. }
  3471. if (!send_update_to_fw)
  3472. return;
  3473. mutex_lock(&ioc->base_cmds.mutex);
  3474. _base_event_notification(ioc, CAN_SLEEP);
  3475. mutex_unlock(&ioc->base_cmds.mutex);
  3476. }
  3477. /**
  3478. * _base_diag_reset - the "big hammer" start of day reset
  3479. * @ioc: per adapter object
  3480. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3481. *
  3482. * Returns 0 for success, non-zero for failure.
  3483. */
  3484. static int
  3485. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3486. {
  3487. u32 host_diagnostic;
  3488. u32 ioc_state;
  3489. u32 count;
  3490. u32 hcb_size;
  3491. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  3492. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
  3493. ioc->name));
  3494. count = 0;
  3495. do {
  3496. /* Write magic sequence to WriteSequence register
  3497. * Loop until in diagnostic mode
  3498. */
  3499. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
  3500. "sequence\n", ioc->name));
  3501. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3502. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  3503. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  3504. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  3505. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3506. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3507. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3508. /* wait 100 msec */
  3509. if (sleep_flag == CAN_SLEEP)
  3510. msleep(100);
  3511. else
  3512. mdelay(100);
  3513. if (count++ > 20)
  3514. goto out;
  3515. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3516. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
  3517. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  3518. ioc->name, count, host_diagnostic));
  3519. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  3520. hcb_size = readl(&ioc->chip->HCBSize);
  3521. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
  3522. ioc->name));
  3523. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  3524. &ioc->chip->HostDiagnostic);
  3525. /* This delay allows the chip PCIe hardware time to finish reset tasks*/
  3526. if (sleep_flag == CAN_SLEEP)
  3527. msleep(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
  3528. else
  3529. mdelay(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
  3530. /* Approximately 300 second max wait */
  3531. for (count = 0; count < (300000000 /
  3532. MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC); count++) {
  3533. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3534. if (host_diagnostic == 0xFFFFFFFF)
  3535. goto out;
  3536. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  3537. break;
  3538. /* Wait to pass the second read delay window */
  3539. if (sleep_flag == CAN_SLEEP)
  3540. msleep(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
  3541. /1000);
  3542. else
  3543. mdelay(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
  3544. /1000);
  3545. }
  3546. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  3547. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
  3548. "assuming the HCB Address points to good F/W\n",
  3549. ioc->name));
  3550. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  3551. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  3552. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  3553. drsprintk(ioc, printk(MPT2SAS_INFO_FMT
  3554. "re-enable the HCDW\n", ioc->name));
  3555. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  3556. &ioc->chip->HCBSize);
  3557. }
  3558. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
  3559. ioc->name));
  3560. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  3561. &ioc->chip->HostDiagnostic);
  3562. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
  3563. "diagnostic register\n", ioc->name));
  3564. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3565. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
  3566. "READY state\n", ioc->name));
  3567. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  3568. sleep_flag);
  3569. if (ioc_state) {
  3570. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  3571. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  3572. goto out;
  3573. }
  3574. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  3575. return 0;
  3576. out:
  3577. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  3578. return -EFAULT;
  3579. }
  3580. /**
  3581. * _base_make_ioc_ready - put controller in READY state
  3582. * @ioc: per adapter object
  3583. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3584. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3585. *
  3586. * Returns 0 for success, non-zero for failure.
  3587. */
  3588. static int
  3589. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3590. enum reset_type type)
  3591. {
  3592. u32 ioc_state;
  3593. int rc;
  3594. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3595. __func__));
  3596. if (ioc->pci_error_recovery)
  3597. return 0;
  3598. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3599. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
  3600. ioc->name, __func__, ioc_state));
  3601. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  3602. return 0;
  3603. if (ioc_state & MPI2_DOORBELL_USED) {
  3604. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
  3605. "active!\n", ioc->name));
  3606. goto issue_diag_reset;
  3607. }
  3608. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  3609. mpt2sas_base_fault_info(ioc, ioc_state &
  3610. MPI2_DOORBELL_DATA_MASK);
  3611. goto issue_diag_reset;
  3612. }
  3613. if (type == FORCE_BIG_HAMMER)
  3614. goto issue_diag_reset;
  3615. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  3616. if (!(_base_send_ioc_reset(ioc,
  3617. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
  3618. ioc->ioc_reset_count++;
  3619. return 0;
  3620. }
  3621. issue_diag_reset:
  3622. rc = _base_diag_reset(ioc, CAN_SLEEP);
  3623. ioc->ioc_reset_count++;
  3624. return rc;
  3625. }
  3626. /**
  3627. * _base_make_ioc_operational - put controller in OPERATIONAL state
  3628. * @ioc: per adapter object
  3629. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3630. *
  3631. * Returns 0 for success, non-zero for failure.
  3632. */
  3633. static int
  3634. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3635. {
  3636. int r, i;
  3637. unsigned long flags;
  3638. u32 reply_address;
  3639. u16 smid;
  3640. struct _tr_list *delayed_tr, *delayed_tr_next;
  3641. u8 hide_flag;
  3642. struct adapter_reply_queue *reply_q;
  3643. long reply_post_free;
  3644. u32 reply_post_free_sz;
  3645. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3646. __func__));
  3647. /* clean the delayed target reset list */
  3648. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3649. &ioc->delayed_tr_list, list) {
  3650. list_del(&delayed_tr->list);
  3651. kfree(delayed_tr);
  3652. }
  3653. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3654. &ioc->delayed_tr_volume_list, list) {
  3655. list_del(&delayed_tr->list);
  3656. kfree(delayed_tr);
  3657. }
  3658. /* initialize the scsi lookup free list */
  3659. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3660. INIT_LIST_HEAD(&ioc->free_list);
  3661. smid = 1;
  3662. for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
  3663. INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
  3664. ioc->scsi_lookup[i].cb_idx = 0xFF;
  3665. ioc->scsi_lookup[i].smid = smid;
  3666. ioc->scsi_lookup[i].scmd = NULL;
  3667. ioc->scsi_lookup[i].direct_io = 0;
  3668. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  3669. &ioc->free_list);
  3670. }
  3671. /* hi-priority queue */
  3672. INIT_LIST_HEAD(&ioc->hpr_free_list);
  3673. smid = ioc->hi_priority_smid;
  3674. for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
  3675. ioc->hpr_lookup[i].cb_idx = 0xFF;
  3676. ioc->hpr_lookup[i].smid = smid;
  3677. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  3678. &ioc->hpr_free_list);
  3679. }
  3680. /* internal queue */
  3681. INIT_LIST_HEAD(&ioc->internal_free_list);
  3682. smid = ioc->internal_smid;
  3683. for (i = 0; i < ioc->internal_depth; i++, smid++) {
  3684. ioc->internal_lookup[i].cb_idx = 0xFF;
  3685. ioc->internal_lookup[i].smid = smid;
  3686. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  3687. &ioc->internal_free_list);
  3688. }
  3689. /* chain pool */
  3690. INIT_LIST_HEAD(&ioc->free_chain_list);
  3691. for (i = 0; i < ioc->chain_depth; i++)
  3692. list_add_tail(&ioc->chain_lookup[i].tracker_list,
  3693. &ioc->free_chain_list);
  3694. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3695. /* initialize Reply Free Queue */
  3696. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  3697. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  3698. ioc->reply_sz)
  3699. ioc->reply_free[i] = cpu_to_le32(reply_address);
  3700. /* initialize reply queues */
  3701. if (ioc->is_driver_loading)
  3702. _base_assign_reply_queues(ioc);
  3703. /* initialize Reply Post Free Queue */
  3704. reply_post_free = (long)ioc->reply_post_free;
  3705. reply_post_free_sz = ioc->reply_post_queue_depth *
  3706. sizeof(Mpi2DefaultReplyDescriptor_t);
  3707. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3708. reply_q->reply_post_host_index = 0;
  3709. reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *)
  3710. reply_post_free;
  3711. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  3712. reply_q->reply_post_free[i].Words =
  3713. cpu_to_le64(ULLONG_MAX);
  3714. if (!_base_is_controller_msix_enabled(ioc))
  3715. goto skip_init_reply_post_free_queue;
  3716. reply_post_free += reply_post_free_sz;
  3717. }
  3718. skip_init_reply_post_free_queue:
  3719. r = _base_send_ioc_init(ioc, sleep_flag);
  3720. if (r)
  3721. return r;
  3722. /* initialize reply free host index */
  3723. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  3724. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  3725. /* initialize reply post host index */
  3726. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3727. writel(reply_q->msix_index << MPI2_RPHI_MSIX_INDEX_SHIFT,
  3728. &ioc->chip->ReplyPostHostIndex);
  3729. if (!_base_is_controller_msix_enabled(ioc))
  3730. goto skip_init_reply_post_host_index;
  3731. }
  3732. skip_init_reply_post_host_index:
  3733. _base_unmask_interrupts(ioc);
  3734. r = _base_event_notification(ioc, sleep_flag);
  3735. if (r)
  3736. return r;
  3737. if (sleep_flag == CAN_SLEEP)
  3738. _base_static_config_pages(ioc);
  3739. if (ioc->is_driver_loading) {
  3740. if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier
  3741. == 0x80) {
  3742. hide_flag = (u8) (
  3743. le32_to_cpu(ioc->manu_pg10.OEMSpecificFlags0) &
  3744. MFG_PAGE10_HIDE_SSDS_MASK);
  3745. if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
  3746. ioc->mfg_pg10_hide_flag = hide_flag;
  3747. }
  3748. ioc->wait_for_discovery_to_complete =
  3749. _base_determine_wait_on_discovery(ioc);
  3750. return r; /* scan_start and scan_finished support */
  3751. }
  3752. r = _base_send_port_enable(ioc, sleep_flag);
  3753. if (r)
  3754. return r;
  3755. return r;
  3756. }
  3757. /**
  3758. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  3759. * @ioc: per adapter object
  3760. *
  3761. * Return nothing.
  3762. */
  3763. void
  3764. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  3765. {
  3766. struct pci_dev *pdev = ioc->pdev;
  3767. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3768. __func__));
  3769. if (ioc->chip_phys && ioc->chip) {
  3770. _base_mask_interrupts(ioc);
  3771. ioc->shost_recovery = 1;
  3772. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3773. ioc->shost_recovery = 0;
  3774. }
  3775. _base_free_irq(ioc);
  3776. _base_disable_msix(ioc);
  3777. if (ioc->chip_phys && ioc->chip)
  3778. iounmap(ioc->chip);
  3779. ioc->chip_phys = 0;
  3780. if (pci_is_enabled(pdev)) {
  3781. pci_release_selected_regions(ioc->pdev, ioc->bars);
  3782. pci_disable_pcie_error_reporting(pdev);
  3783. pci_disable_device(pdev);
  3784. }
  3785. return;
  3786. }
  3787. /**
  3788. * mpt2sas_base_attach - attach controller instance
  3789. * @ioc: per adapter object
  3790. *
  3791. * Returns 0 for success, non-zero for failure.
  3792. */
  3793. int
  3794. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  3795. {
  3796. int r, i;
  3797. int cpu_id, last_cpu_id = 0;
  3798. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3799. __func__));
  3800. /* setup cpu_msix_table */
  3801. ioc->cpu_count = num_online_cpus();
  3802. for_each_online_cpu(cpu_id)
  3803. last_cpu_id = cpu_id;
  3804. ioc->cpu_msix_table_sz = last_cpu_id + 1;
  3805. ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
  3806. ioc->reply_queue_count = 1;
  3807. if (!ioc->cpu_msix_table) {
  3808. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  3809. "cpu_msix_table failed!!!\n", ioc->name));
  3810. r = -ENOMEM;
  3811. goto out_free_resources;
  3812. }
  3813. if (ioc->is_warpdrive) {
  3814. ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
  3815. sizeof(resource_size_t *), GFP_KERNEL);
  3816. if (!ioc->reply_post_host_index) {
  3817. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation "
  3818. "for cpu_msix_table failed!!!\n", ioc->name));
  3819. r = -ENOMEM;
  3820. goto out_free_resources;
  3821. }
  3822. }
  3823. r = mpt2sas_base_map_resources(ioc);
  3824. if (r)
  3825. goto out_free_resources;
  3826. if (ioc->is_warpdrive) {
  3827. ioc->reply_post_host_index[0] =
  3828. (resource_size_t *)&ioc->chip->ReplyPostHostIndex;
  3829. for (i = 1; i < ioc->cpu_msix_table_sz; i++)
  3830. ioc->reply_post_host_index[i] = (resource_size_t *)
  3831. ((u8 *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
  3832. * 4)));
  3833. }
  3834. pci_set_drvdata(ioc->pdev, ioc->shost);
  3835. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  3836. if (r)
  3837. goto out_free_resources;
  3838. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3839. if (r)
  3840. goto out_free_resources;
  3841. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  3842. sizeof(struct mpt2sas_port_facts), GFP_KERNEL);
  3843. if (!ioc->pfacts) {
  3844. r = -ENOMEM;
  3845. goto out_free_resources;
  3846. }
  3847. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  3848. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  3849. if (r)
  3850. goto out_free_resources;
  3851. }
  3852. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  3853. if (r)
  3854. goto out_free_resources;
  3855. init_waitqueue_head(&ioc->reset_wq);
  3856. /* allocate memory pd handle bitmask list */
  3857. ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
  3858. if (ioc->facts.MaxDevHandle % 8)
  3859. ioc->pd_handles_sz++;
  3860. ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
  3861. GFP_KERNEL);
  3862. if (!ioc->pd_handles) {
  3863. r = -ENOMEM;
  3864. goto out_free_resources;
  3865. }
  3866. ioc->blocking_handles = kzalloc(ioc->pd_handles_sz,
  3867. GFP_KERNEL);
  3868. if (!ioc->blocking_handles) {
  3869. r = -ENOMEM;
  3870. goto out_free_resources;
  3871. }
  3872. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  3873. /* base internal command bits */
  3874. mutex_init(&ioc->base_cmds.mutex);
  3875. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3876. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3877. /* port_enable command bits */
  3878. ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3879. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3880. /* transport internal command bits */
  3881. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3882. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  3883. mutex_init(&ioc->transport_cmds.mutex);
  3884. /* scsih internal command bits */
  3885. ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3886. ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
  3887. mutex_init(&ioc->scsih_cmds.mutex);
  3888. /* task management internal command bits */
  3889. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3890. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  3891. mutex_init(&ioc->tm_cmds.mutex);
  3892. /* config page internal command bits */
  3893. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3894. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  3895. mutex_init(&ioc->config_cmds.mutex);
  3896. /* ctl module internal command bits */
  3897. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3898. ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
  3899. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  3900. mutex_init(&ioc->ctl_cmds.mutex);
  3901. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3902. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3903. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
  3904. !ioc->ctl_cmds.sense) {
  3905. r = -ENOMEM;
  3906. goto out_free_resources;
  3907. }
  3908. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3909. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3910. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
  3911. r = -ENOMEM;
  3912. goto out_free_resources;
  3913. }
  3914. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3915. ioc->event_masks[i] = -1;
  3916. /* here we enable the events we care about */
  3917. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  3918. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  3919. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  3920. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  3921. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  3922. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  3923. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  3924. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  3925. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  3926. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  3927. r = _base_make_ioc_operational(ioc, CAN_SLEEP);
  3928. if (r)
  3929. goto out_free_resources;
  3930. ioc->non_operational_loop = 0;
  3931. return 0;
  3932. out_free_resources:
  3933. ioc->remove_host = 1;
  3934. mpt2sas_base_free_resources(ioc);
  3935. _base_release_memory_pools(ioc);
  3936. pci_set_drvdata(ioc->pdev, NULL);
  3937. kfree(ioc->cpu_msix_table);
  3938. if (ioc->is_warpdrive)
  3939. kfree(ioc->reply_post_host_index);
  3940. kfree(ioc->pd_handles);
  3941. kfree(ioc->blocking_handles);
  3942. kfree(ioc->tm_cmds.reply);
  3943. kfree(ioc->transport_cmds.reply);
  3944. kfree(ioc->scsih_cmds.reply);
  3945. kfree(ioc->config_cmds.reply);
  3946. kfree(ioc->base_cmds.reply);
  3947. kfree(ioc->port_enable_cmds.reply);
  3948. kfree(ioc->ctl_cmds.reply);
  3949. kfree(ioc->ctl_cmds.sense);
  3950. kfree(ioc->pfacts);
  3951. ioc->ctl_cmds.reply = NULL;
  3952. ioc->base_cmds.reply = NULL;
  3953. ioc->tm_cmds.reply = NULL;
  3954. ioc->scsih_cmds.reply = NULL;
  3955. ioc->transport_cmds.reply = NULL;
  3956. ioc->config_cmds.reply = NULL;
  3957. ioc->pfacts = NULL;
  3958. return r;
  3959. }
  3960. /**
  3961. * mpt2sas_base_detach - remove controller instance
  3962. * @ioc: per adapter object
  3963. *
  3964. * Return nothing.
  3965. */
  3966. void
  3967. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  3968. {
  3969. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3970. __func__));
  3971. mpt2sas_base_stop_watchdog(ioc);
  3972. mpt2sas_base_free_resources(ioc);
  3973. _base_release_memory_pools(ioc);
  3974. pci_set_drvdata(ioc->pdev, NULL);
  3975. kfree(ioc->cpu_msix_table);
  3976. if (ioc->is_warpdrive)
  3977. kfree(ioc->reply_post_host_index);
  3978. kfree(ioc->pd_handles);
  3979. kfree(ioc->blocking_handles);
  3980. kfree(ioc->pfacts);
  3981. kfree(ioc->ctl_cmds.reply);
  3982. kfree(ioc->ctl_cmds.sense);
  3983. kfree(ioc->base_cmds.reply);
  3984. kfree(ioc->port_enable_cmds.reply);
  3985. kfree(ioc->tm_cmds.reply);
  3986. kfree(ioc->transport_cmds.reply);
  3987. kfree(ioc->scsih_cmds.reply);
  3988. kfree(ioc->config_cmds.reply);
  3989. }
  3990. /**
  3991. * _base_reset_handler - reset callback handler (for base)
  3992. * @ioc: per adapter object
  3993. * @reset_phase: phase
  3994. *
  3995. * The handler for doing any required cleanup or initialization.
  3996. *
  3997. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3998. * MPT2_IOC_DONE_RESET
  3999. *
  4000. * Return nothing.
  4001. */
  4002. static void
  4003. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  4004. {
  4005. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  4006. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  4007. switch (reset_phase) {
  4008. case MPT2_IOC_PRE_RESET:
  4009. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  4010. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  4011. break;
  4012. case MPT2_IOC_AFTER_RESET:
  4013. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  4014. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  4015. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  4016. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  4017. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  4018. complete(&ioc->transport_cmds.done);
  4019. }
  4020. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  4021. ioc->base_cmds.status |= MPT2_CMD_RESET;
  4022. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  4023. complete(&ioc->base_cmds.done);
  4024. }
  4025. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  4026. ioc->port_enable_failed = 1;
  4027. ioc->port_enable_cmds.status |= MPT2_CMD_RESET;
  4028. mpt2sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
  4029. if (ioc->is_driver_loading) {
  4030. ioc->start_scan_failed =
  4031. MPI2_IOCSTATUS_INTERNAL_ERROR;
  4032. ioc->start_scan = 0;
  4033. ioc->port_enable_cmds.status =
  4034. MPT2_CMD_NOT_USED;
  4035. } else
  4036. complete(&ioc->port_enable_cmds.done);
  4037. }
  4038. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  4039. ioc->config_cmds.status |= MPT2_CMD_RESET;
  4040. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  4041. ioc->config_cmds.smid = USHRT_MAX;
  4042. complete(&ioc->config_cmds.done);
  4043. }
  4044. break;
  4045. case MPT2_IOC_DONE_RESET:
  4046. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  4047. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  4048. break;
  4049. }
  4050. }
  4051. /**
  4052. * _wait_for_commands_to_complete - reset controller
  4053. * @ioc: Pointer to MPT_ADAPTER structure
  4054. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  4055. *
  4056. * This function waiting(3s) for all pending commands to complete
  4057. * prior to putting controller in reset.
  4058. */
  4059. static void
  4060. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  4061. {
  4062. u32 ioc_state;
  4063. unsigned long flags;
  4064. u16 i;
  4065. ioc->pending_io_count = 0;
  4066. if (sleep_flag != CAN_SLEEP)
  4067. return;
  4068. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  4069. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  4070. return;
  4071. /* pending command count */
  4072. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  4073. for (i = 0; i < ioc->scsiio_depth; i++)
  4074. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  4075. ioc->pending_io_count++;
  4076. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  4077. if (!ioc->pending_io_count)
  4078. return;
  4079. /* wait for pending commands to complete */
  4080. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
  4081. }
  4082. /**
  4083. * mpt2sas_base_hard_reset_handler - reset controller
  4084. * @ioc: Pointer to MPT_ADAPTER structure
  4085. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  4086. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  4087. *
  4088. * Returns 0 for success, non-zero for failure.
  4089. */
  4090. int
  4091. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  4092. enum reset_type type)
  4093. {
  4094. int r;
  4095. unsigned long flags;
  4096. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
  4097. __func__));
  4098. if (ioc->pci_error_recovery) {
  4099. printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
  4100. ioc->name, __func__);
  4101. r = 0;
  4102. goto out_unlocked;
  4103. }
  4104. if (mpt2sas_fwfault_debug)
  4105. mpt2sas_halt_firmware(ioc);
  4106. /* TODO - What we really should be doing is pulling
  4107. * out all the code associated with NO_SLEEP; its never used.
  4108. * That is legacy code from mpt fusion driver, ported over.
  4109. * I will leave this BUG_ON here for now till its been resolved.
  4110. */
  4111. BUG_ON(sleep_flag == NO_SLEEP);
  4112. /* wait for an active reset in progress to complete */
  4113. if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
  4114. do {
  4115. ssleep(1);
  4116. } while (ioc->shost_recovery == 1);
  4117. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4118. __func__));
  4119. return ioc->ioc_reset_in_progress_status;
  4120. }
  4121. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4122. ioc->shost_recovery = 1;
  4123. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4124. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  4125. _wait_for_commands_to_complete(ioc, sleep_flag);
  4126. _base_mask_interrupts(ioc);
  4127. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  4128. if (r)
  4129. goto out;
  4130. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  4131. /* If this hard reset is called while port enable is active, then
  4132. * there is no reason to call make_ioc_operational
  4133. */
  4134. if (ioc->is_driver_loading && ioc->port_enable_failed) {
  4135. ioc->remove_host = 1;
  4136. r = -EFAULT;
  4137. goto out;
  4138. }
  4139. r = _base_make_ioc_operational(ioc, sleep_flag);
  4140. if (!r)
  4141. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  4142. out:
  4143. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
  4144. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  4145. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4146. ioc->ioc_reset_in_progress_status = r;
  4147. ioc->shost_recovery = 0;
  4148. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4149. mutex_unlock(&ioc->reset_in_progress_mutex);
  4150. out_unlocked:
  4151. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4152. __func__));
  4153. return r;
  4154. }