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/drivers/hwmon/f71882fg.c

http://github.com/mirrors/linux
C | 2798 lines | 2413 code | 292 blank | 93 comment | 192 complexity | 704a96931ed4f77e68ef954b2f9e51d6 MD5 | raw file
Possible License(s): AGPL-1.0, GPL-2.0, LGPL-2.0
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /***************************************************************************
  3. * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
  4. * Copyright (C) 2007-2011 Hans de Goede <hdegoede@redhat.com> *
  5. * *
  6. ***************************************************************************/
  7. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  8. #include <linux/module.h>
  9. #include <linux/init.h>
  10. #include <linux/slab.h>
  11. #include <linux/jiffies.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/hwmon.h>
  14. #include <linux/hwmon-sysfs.h>
  15. #include <linux/err.h>
  16. #include <linux/mutex.h>
  17. #include <linux/io.h>
  18. #include <linux/acpi.h>
  19. #define DRVNAME "f71882fg"
  20. #define SIO_F71858FG_LD_HWM 0x02 /* Hardware monitor logical device */
  21. #define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */
  22. #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
  23. #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
  24. #define SIO_REG_LDSEL 0x07 /* Logical device select */
  25. #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
  26. #define SIO_REG_DEVREV 0x22 /* Device revision */
  27. #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
  28. #define SIO_REG_ENABLE 0x30 /* Logical device enable */
  29. #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
  30. #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
  31. #define SIO_F71808E_ID 0x0901 /* Chipset ID */
  32. #define SIO_F71808A_ID 0x1001 /* Chipset ID */
  33. #define SIO_F71858_ID 0x0507 /* Chipset ID */
  34. #define SIO_F71862_ID 0x0601 /* Chipset ID */
  35. #define SIO_F71868_ID 0x1106 /* Chipset ID */
  36. #define SIO_F71869_ID 0x0814 /* Chipset ID */
  37. #define SIO_F71869A_ID 0x1007 /* Chipset ID */
  38. #define SIO_F71882_ID 0x0541 /* Chipset ID */
  39. #define SIO_F71889_ID 0x0723 /* Chipset ID */
  40. #define SIO_F71889E_ID 0x0909 /* Chipset ID */
  41. #define SIO_F71889A_ID 0x1005 /* Chipset ID */
  42. #define SIO_F8000_ID 0x0581 /* Chipset ID */
  43. #define SIO_F81768D_ID 0x1210 /* Chipset ID */
  44. #define SIO_F81865_ID 0x0704 /* Chipset ID */
  45. #define SIO_F81866_ID 0x1010 /* Chipset ID */
  46. #define REGION_LENGTH 8
  47. #define ADDR_REG_OFFSET 5
  48. #define DATA_REG_OFFSET 6
  49. #define F71882FG_REG_IN_STATUS 0x12 /* f7188x only */
  50. #define F71882FG_REG_IN_BEEP 0x13 /* f7188x only */
  51. #define F71882FG_REG_IN(nr) (0x20 + (nr))
  52. #define F71882FG_REG_IN1_HIGH 0x32 /* f7188x only */
  53. #define F81866_REG_IN_STATUS 0x16 /* F81866 only */
  54. #define F81866_REG_IN_BEEP 0x17 /* F81866 only */
  55. #define F81866_REG_IN1_HIGH 0x3a /* F81866 only */
  56. #define F71882FG_REG_FAN(nr) (0xA0 + (16 * (nr)))
  57. #define F71882FG_REG_FAN_TARGET(nr) (0xA2 + (16 * (nr)))
  58. #define F71882FG_REG_FAN_FULL_SPEED(nr) (0xA4 + (16 * (nr)))
  59. #define F71882FG_REG_FAN_STATUS 0x92
  60. #define F71882FG_REG_FAN_BEEP 0x93
  61. #define F71882FG_REG_TEMP(nr) (0x70 + 2 * (nr))
  62. #define F71882FG_REG_TEMP_OVT(nr) (0x80 + 2 * (nr))
  63. #define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr))
  64. #define F71882FG_REG_TEMP_STATUS 0x62
  65. #define F71882FG_REG_TEMP_BEEP 0x63
  66. #define F71882FG_REG_TEMP_CONFIG 0x69
  67. #define F71882FG_REG_TEMP_HYST(nr) (0x6C + (nr))
  68. #define F71882FG_REG_TEMP_TYPE 0x6B
  69. #define F71882FG_REG_TEMP_DIODE_OPEN 0x6F
  70. #define F71882FG_REG_PWM(nr) (0xA3 + (16 * (nr)))
  71. #define F71882FG_REG_PWM_TYPE 0x94
  72. #define F71882FG_REG_PWM_ENABLE 0x96
  73. #define F71882FG_REG_FAN_HYST(nr) (0x98 + (nr))
  74. #define F71882FG_REG_FAN_FAULT_T 0x9F
  75. #define F71882FG_FAN_NEG_TEMP_EN 0x20
  76. #define F71882FG_FAN_PROG_SEL 0x80
  77. #define F71882FG_REG_POINT_PWM(pwm, point) (0xAA + (point) + (16 * (pwm)))
  78. #define F71882FG_REG_POINT_TEMP(pwm, point) (0xA6 + (point) + (16 * (pwm)))
  79. #define F71882FG_REG_POINT_MAPPING(nr) (0xAF + 16 * (nr))
  80. #define F71882FG_REG_START 0x01
  81. #define F71882FG_MAX_INS 11
  82. #define FAN_MIN_DETECT 366 /* Lowest detectable fanspeed */
  83. static unsigned short force_id;
  84. module_param(force_id, ushort, 0);
  85. MODULE_PARM_DESC(force_id, "Override the detected device ID");
  86. enum chips { f71808e, f71808a, f71858fg, f71862fg, f71868a, f71869, f71869a,
  87. f71882fg, f71889fg, f71889ed, f71889a, f8000, f81768d, f81865f,
  88. f81866a};
  89. static const char *const f71882fg_names[] = {
  90. "f71808e",
  91. "f71808a",
  92. "f71858fg",
  93. "f71862fg",
  94. "f71868a",
  95. "f71869", /* Both f71869f and f71869e, reg. compatible and same id */
  96. "f71869a",
  97. "f71882fg",
  98. "f71889fg", /* f81801u too, same id */
  99. "f71889ed",
  100. "f71889a",
  101. "f8000",
  102. "f81768d",
  103. "f81865f",
  104. "f81866a",
  105. };
  106. static const char f71882fg_has_in[][F71882FG_MAX_INS] = {
  107. [f71808e] = { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0 },
  108. [f71808a] = { 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 0 },
  109. [f71858fg] = { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 },
  110. [f71862fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  111. [f71868a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0 },
  112. [f71869] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  113. [f71869a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  114. [f71882fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  115. [f71889fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  116. [f71889ed] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  117. [f71889a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0 },
  118. [f8000] = { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 },
  119. [f81768d] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 },
  120. [f81865f] = { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 },
  121. [f81866a] = { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0 },
  122. };
  123. static const char f71882fg_has_in1_alarm[] = {
  124. [f71808e] = 0,
  125. [f71808a] = 0,
  126. [f71858fg] = 0,
  127. [f71862fg] = 0,
  128. [f71868a] = 0,
  129. [f71869] = 0,
  130. [f71869a] = 0,
  131. [f71882fg] = 1,
  132. [f71889fg] = 1,
  133. [f71889ed] = 1,
  134. [f71889a] = 1,
  135. [f8000] = 0,
  136. [f81768d] = 1,
  137. [f81865f] = 1,
  138. [f81866a] = 1,
  139. };
  140. static const char f71882fg_fan_has_beep[] = {
  141. [f71808e] = 0,
  142. [f71808a] = 0,
  143. [f71858fg] = 0,
  144. [f71862fg] = 1,
  145. [f71868a] = 1,
  146. [f71869] = 1,
  147. [f71869a] = 1,
  148. [f71882fg] = 1,
  149. [f71889fg] = 1,
  150. [f71889ed] = 1,
  151. [f71889a] = 1,
  152. [f8000] = 0,
  153. [f81768d] = 1,
  154. [f81865f] = 1,
  155. [f81866a] = 1,
  156. };
  157. static const char f71882fg_nr_fans[] = {
  158. [f71808e] = 3,
  159. [f71808a] = 2, /* +1 fan which is monitor + simple pwm only */
  160. [f71858fg] = 3,
  161. [f71862fg] = 3,
  162. [f71868a] = 3,
  163. [f71869] = 3,
  164. [f71869a] = 3,
  165. [f71882fg] = 4,
  166. [f71889fg] = 3,
  167. [f71889ed] = 3,
  168. [f71889a] = 3,
  169. [f8000] = 3, /* +1 fan which is monitor only */
  170. [f81768d] = 3,
  171. [f81865f] = 2,
  172. [f81866a] = 3,
  173. };
  174. static const char f71882fg_temp_has_beep[] = {
  175. [f71808e] = 0,
  176. [f71808a] = 1,
  177. [f71858fg] = 0,
  178. [f71862fg] = 1,
  179. [f71868a] = 1,
  180. [f71869] = 1,
  181. [f71869a] = 1,
  182. [f71882fg] = 1,
  183. [f71889fg] = 1,
  184. [f71889ed] = 1,
  185. [f71889a] = 1,
  186. [f8000] = 0,
  187. [f81768d] = 1,
  188. [f81865f] = 1,
  189. [f81866a] = 1,
  190. };
  191. static const char f71882fg_nr_temps[] = {
  192. [f71808e] = 2,
  193. [f71808a] = 2,
  194. [f71858fg] = 3,
  195. [f71862fg] = 3,
  196. [f71868a] = 3,
  197. [f71869] = 3,
  198. [f71869a] = 3,
  199. [f71882fg] = 3,
  200. [f71889fg] = 3,
  201. [f71889ed] = 3,
  202. [f71889a] = 3,
  203. [f8000] = 3,
  204. [f81768d] = 3,
  205. [f81865f] = 2,
  206. [f81866a] = 3,
  207. };
  208. static struct platform_device *f71882fg_pdev;
  209. /* Super-I/O Function prototypes */
  210. static inline int superio_inb(int base, int reg);
  211. static inline int superio_inw(int base, int reg);
  212. static inline int superio_enter(int base);
  213. static inline void superio_select(int base, int ld);
  214. static inline void superio_exit(int base);
  215. struct f71882fg_sio_data {
  216. enum chips type;
  217. };
  218. struct f71882fg_data {
  219. unsigned short addr;
  220. enum chips type;
  221. struct device *hwmon_dev;
  222. struct mutex update_lock;
  223. int temp_start; /* temp numbering start (0 or 1) */
  224. char valid; /* !=0 if following fields are valid */
  225. char auto_point_temp_signed;
  226. unsigned long last_updated; /* In jiffies */
  227. unsigned long last_limits; /* In jiffies */
  228. /* Register Values */
  229. u8 in[F71882FG_MAX_INS];
  230. u8 in1_max;
  231. u8 in_status;
  232. u8 in_beep;
  233. u16 fan[4];
  234. u16 fan_target[4];
  235. u16 fan_full_speed[4];
  236. u8 fan_status;
  237. u8 fan_beep;
  238. /*
  239. * Note: all models have max 3 temperature channels, but on some
  240. * they are addressed as 0-2 and on others as 1-3, so for coding
  241. * convenience we reserve space for 4 channels
  242. */
  243. u16 temp[4];
  244. u8 temp_ovt[4];
  245. u8 temp_high[4];
  246. u8 temp_hyst[2]; /* 2 hysts stored per reg */
  247. u8 temp_type[4];
  248. u8 temp_status;
  249. u8 temp_beep;
  250. u8 temp_diode_open;
  251. u8 temp_config;
  252. u8 pwm[4];
  253. u8 pwm_enable;
  254. u8 pwm_auto_point_hyst[2];
  255. u8 pwm_auto_point_mapping[4];
  256. u8 pwm_auto_point_pwm[4][5];
  257. s8 pwm_auto_point_temp[4][4];
  258. };
  259. /* Sysfs in */
  260. static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
  261. char *buf);
  262. static ssize_t show_in_max(struct device *dev, struct device_attribute
  263. *devattr, char *buf);
  264. static ssize_t store_in_max(struct device *dev, struct device_attribute
  265. *devattr, const char *buf, size_t count);
  266. static ssize_t show_in_beep(struct device *dev, struct device_attribute
  267. *devattr, char *buf);
  268. static ssize_t store_in_beep(struct device *dev, struct device_attribute
  269. *devattr, const char *buf, size_t count);
  270. static ssize_t show_in_alarm(struct device *dev, struct device_attribute
  271. *devattr, char *buf);
  272. /* Sysfs Fan */
  273. static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
  274. char *buf);
  275. static ssize_t show_fan_full_speed(struct device *dev,
  276. struct device_attribute *devattr, char *buf);
  277. static ssize_t store_fan_full_speed(struct device *dev,
  278. struct device_attribute *devattr, const char *buf, size_t count);
  279. static ssize_t show_fan_beep(struct device *dev, struct device_attribute
  280. *devattr, char *buf);
  281. static ssize_t store_fan_beep(struct device *dev, struct device_attribute
  282. *devattr, const char *buf, size_t count);
  283. static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
  284. *devattr, char *buf);
  285. /* Sysfs Temp */
  286. static ssize_t show_temp(struct device *dev, struct device_attribute
  287. *devattr, char *buf);
  288. static ssize_t show_temp_max(struct device *dev, struct device_attribute
  289. *devattr, char *buf);
  290. static ssize_t store_temp_max(struct device *dev, struct device_attribute
  291. *devattr, const char *buf, size_t count);
  292. static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
  293. *devattr, char *buf);
  294. static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
  295. *devattr, const char *buf, size_t count);
  296. static ssize_t show_temp_crit(struct device *dev, struct device_attribute
  297. *devattr, char *buf);
  298. static ssize_t store_temp_crit(struct device *dev, struct device_attribute
  299. *devattr, const char *buf, size_t count);
  300. static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
  301. *devattr, char *buf);
  302. static ssize_t show_temp_type(struct device *dev, struct device_attribute
  303. *devattr, char *buf);
  304. static ssize_t show_temp_beep(struct device *dev, struct device_attribute
  305. *devattr, char *buf);
  306. static ssize_t store_temp_beep(struct device *dev, struct device_attribute
  307. *devattr, const char *buf, size_t count);
  308. static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
  309. *devattr, char *buf);
  310. static ssize_t show_temp_fault(struct device *dev, struct device_attribute
  311. *devattr, char *buf);
  312. /* PWM and Auto point control */
  313. static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
  314. char *buf);
  315. static ssize_t store_pwm(struct device *dev, struct device_attribute *devattr,
  316. const char *buf, size_t count);
  317. static ssize_t show_simple_pwm(struct device *dev,
  318. struct device_attribute *devattr, char *buf);
  319. static ssize_t store_simple_pwm(struct device *dev,
  320. struct device_attribute *devattr, const char *buf, size_t count);
  321. static ssize_t show_pwm_enable(struct device *dev,
  322. struct device_attribute *devattr, char *buf);
  323. static ssize_t store_pwm_enable(struct device *dev,
  324. struct device_attribute *devattr, const char *buf, size_t count);
  325. static ssize_t show_pwm_interpolate(struct device *dev,
  326. struct device_attribute *devattr, char *buf);
  327. static ssize_t store_pwm_interpolate(struct device *dev,
  328. struct device_attribute *devattr, const char *buf, size_t count);
  329. static ssize_t show_pwm_auto_point_channel(struct device *dev,
  330. struct device_attribute *devattr, char *buf);
  331. static ssize_t store_pwm_auto_point_channel(struct device *dev,
  332. struct device_attribute *devattr, const char *buf, size_t count);
  333. static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
  334. struct device_attribute *devattr, char *buf);
  335. static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
  336. struct device_attribute *devattr, const char *buf, size_t count);
  337. static ssize_t show_pwm_auto_point_pwm(struct device *dev,
  338. struct device_attribute *devattr, char *buf);
  339. static ssize_t store_pwm_auto_point_pwm(struct device *dev,
  340. struct device_attribute *devattr, const char *buf, size_t count);
  341. static ssize_t show_pwm_auto_point_temp(struct device *dev,
  342. struct device_attribute *devattr, char *buf);
  343. static ssize_t store_pwm_auto_point_temp(struct device *dev,
  344. struct device_attribute *devattr, const char *buf, size_t count);
  345. /* Sysfs misc */
  346. static ssize_t name_show(struct device *dev, struct device_attribute *devattr,
  347. char *buf);
  348. static int f71882fg_probe(struct platform_device *pdev);
  349. static int f71882fg_remove(struct platform_device *pdev);
  350. static struct platform_driver f71882fg_driver = {
  351. .driver = {
  352. .name = DRVNAME,
  353. },
  354. .probe = f71882fg_probe,
  355. .remove = f71882fg_remove,
  356. };
  357. static DEVICE_ATTR_RO(name);
  358. /*
  359. * Temp attr for the f71858fg, the f71858fg is special as it has its
  360. * temperature indexes start at 0 (the others start at 1)
  361. */
  362. static struct sensor_device_attribute_2 f71858fg_temp_attr[] = {
  363. SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
  364. SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
  365. store_temp_max, 0, 0),
  366. SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  367. store_temp_max_hyst, 0, 0),
  368. SENSOR_ATTR_2(temp1_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 0),
  369. SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  370. store_temp_crit, 0, 0),
  371. SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  372. 0, 0),
  373. SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
  374. SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
  375. SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
  376. SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
  377. store_temp_max, 0, 1),
  378. SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  379. store_temp_max_hyst, 0, 1),
  380. SENSOR_ATTR_2(temp2_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
  381. SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  382. store_temp_crit, 0, 1),
  383. SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  384. 0, 1),
  385. SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
  386. SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
  387. SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
  388. SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
  389. store_temp_max, 0, 2),
  390. SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  391. store_temp_max_hyst, 0, 2),
  392. SENSOR_ATTR_2(temp3_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
  393. SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  394. store_temp_crit, 0, 2),
  395. SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  396. 0, 2),
  397. SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
  398. SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
  399. };
  400. /* Temp attr for the standard models */
  401. static struct sensor_device_attribute_2 fxxxx_temp_attr[3][9] = { {
  402. SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 1),
  403. SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
  404. store_temp_max, 0, 1),
  405. SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  406. store_temp_max_hyst, 0, 1),
  407. /*
  408. * Should really be temp1_max_alarm, but older versions did not handle
  409. * the max and crit alarms separately and lm_sensors v2 depends on the
  410. * presence of temp#_alarm files. The same goes for temp2/3 _alarm.
  411. */
  412. SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
  413. SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  414. store_temp_crit, 0, 1),
  415. SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  416. 0, 1),
  417. SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
  418. SENSOR_ATTR_2(temp1_type, S_IRUGO, show_temp_type, NULL, 0, 1),
  419. SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
  420. }, {
  421. SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 2),
  422. SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
  423. store_temp_max, 0, 2),
  424. SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  425. store_temp_max_hyst, 0, 2),
  426. /* Should be temp2_max_alarm, see temp1_alarm note */
  427. SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
  428. SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  429. store_temp_crit, 0, 2),
  430. SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  431. 0, 2),
  432. SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
  433. SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 2),
  434. SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
  435. }, {
  436. SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 3),
  437. SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
  438. store_temp_max, 0, 3),
  439. SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
  440. store_temp_max_hyst, 0, 3),
  441. /* Should be temp3_max_alarm, see temp1_alarm note */
  442. SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 3),
  443. SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
  444. store_temp_crit, 0, 3),
  445. SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
  446. 0, 3),
  447. SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 7),
  448. SENSOR_ATTR_2(temp3_type, S_IRUGO, show_temp_type, NULL, 0, 3),
  449. SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 3),
  450. } };
  451. /* Temp attr for models which can beep on temp alarm */
  452. static struct sensor_device_attribute_2 fxxxx_temp_beep_attr[3][2] = { {
  453. SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  454. store_temp_beep, 0, 1),
  455. SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  456. store_temp_beep, 0, 5),
  457. }, {
  458. SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  459. store_temp_beep, 0, 2),
  460. SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  461. store_temp_beep, 0, 6),
  462. }, {
  463. SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  464. store_temp_beep, 0, 3),
  465. SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  466. store_temp_beep, 0, 7),
  467. } };
  468. static struct sensor_device_attribute_2 f81866_temp_beep_attr[3][2] = { {
  469. SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  470. store_temp_beep, 0, 0),
  471. SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  472. store_temp_beep, 0, 4),
  473. }, {
  474. SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  475. store_temp_beep, 0, 1),
  476. SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  477. store_temp_beep, 0, 5),
  478. }, {
  479. SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  480. store_temp_beep, 0, 2),
  481. SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
  482. store_temp_beep, 0, 6),
  483. } };
  484. /*
  485. * Temp attr for the f8000
  486. * Note on the f8000 temp_ovt (crit) is used as max, and temp_high (max)
  487. * is used as hysteresis value to clear alarms
  488. * Also like the f71858fg its temperature indexes start at 0
  489. */
  490. static struct sensor_device_attribute_2 f8000_temp_attr[] = {
  491. SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
  492. SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_crit,
  493. store_temp_crit, 0, 0),
  494. SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
  495. store_temp_max, 0, 0),
  496. SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
  497. SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
  498. SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
  499. SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_crit,
  500. store_temp_crit, 0, 1),
  501. SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
  502. store_temp_max, 0, 1),
  503. SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
  504. SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
  505. SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
  506. SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_crit,
  507. store_temp_crit, 0, 2),
  508. SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
  509. store_temp_max, 0, 2),
  510. SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
  511. SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
  512. };
  513. /* in attr for all models */
  514. static struct sensor_device_attribute_2 fxxxx_in_attr[] = {
  515. SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
  516. SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1),
  517. SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2),
  518. SENSOR_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 0, 3),
  519. SENSOR_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 0, 4),
  520. SENSOR_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 0, 5),
  521. SENSOR_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 0, 6),
  522. SENSOR_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 0, 7),
  523. SENSOR_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 0, 8),
  524. SENSOR_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 0, 9),
  525. SENSOR_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 0, 10),
  526. };
  527. /* For models with in1 alarm capability */
  528. static struct sensor_device_attribute_2 fxxxx_in1_alarm_attr[] = {
  529. SENSOR_ATTR_2(in1_max, S_IRUGO|S_IWUSR, show_in_max, store_in_max,
  530. 0, 1),
  531. SENSOR_ATTR_2(in1_beep, S_IRUGO|S_IWUSR, show_in_beep, store_in_beep,
  532. 0, 1),
  533. SENSOR_ATTR_2(in1_alarm, S_IRUGO, show_in_alarm, NULL, 0, 1),
  534. };
  535. /* Fan / PWM attr common to all models */
  536. static struct sensor_device_attribute_2 fxxxx_fan_attr[4][6] = { {
  537. SENSOR_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0),
  538. SENSOR_ATTR_2(fan1_full_speed, S_IRUGO|S_IWUSR,
  539. show_fan_full_speed,
  540. store_fan_full_speed, 0, 0),
  541. SENSOR_ATTR_2(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 0),
  542. SENSOR_ATTR_2(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 0),
  543. SENSOR_ATTR_2(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  544. store_pwm_enable, 0, 0),
  545. SENSOR_ATTR_2(pwm1_interpolate, S_IRUGO|S_IWUSR,
  546. show_pwm_interpolate, store_pwm_interpolate, 0, 0),
  547. }, {
  548. SENSOR_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 0, 1),
  549. SENSOR_ATTR_2(fan2_full_speed, S_IRUGO|S_IWUSR,
  550. show_fan_full_speed,
  551. store_fan_full_speed, 0, 1),
  552. SENSOR_ATTR_2(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 1),
  553. SENSOR_ATTR_2(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 1),
  554. SENSOR_ATTR_2(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  555. store_pwm_enable, 0, 1),
  556. SENSOR_ATTR_2(pwm2_interpolate, S_IRUGO|S_IWUSR,
  557. show_pwm_interpolate, store_pwm_interpolate, 0, 1),
  558. }, {
  559. SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
  560. SENSOR_ATTR_2(fan3_full_speed, S_IRUGO|S_IWUSR,
  561. show_fan_full_speed,
  562. store_fan_full_speed, 0, 2),
  563. SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
  564. SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 2),
  565. SENSOR_ATTR_2(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  566. store_pwm_enable, 0, 2),
  567. SENSOR_ATTR_2(pwm3_interpolate, S_IRUGO|S_IWUSR,
  568. show_pwm_interpolate, store_pwm_interpolate, 0, 2),
  569. }, {
  570. SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
  571. SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR,
  572. show_fan_full_speed,
  573. store_fan_full_speed, 0, 3),
  574. SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3),
  575. SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3),
  576. SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  577. store_pwm_enable, 0, 3),
  578. SENSOR_ATTR_2(pwm4_interpolate, S_IRUGO|S_IWUSR,
  579. show_pwm_interpolate, store_pwm_interpolate, 0, 3),
  580. } };
  581. /* Attr for the third fan of the f71808a, which only has manual pwm */
  582. static struct sensor_device_attribute_2 f71808a_fan3_attr[] = {
  583. SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
  584. SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
  585. SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR,
  586. show_simple_pwm, store_simple_pwm, 0, 2),
  587. };
  588. /* Attr for models which can beep on Fan alarm */
  589. static struct sensor_device_attribute_2 fxxxx_fan_beep_attr[] = {
  590. SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  591. store_fan_beep, 0, 0),
  592. SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  593. store_fan_beep, 0, 1),
  594. SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  595. store_fan_beep, 0, 2),
  596. SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep,
  597. store_fan_beep, 0, 3),
  598. };
  599. /*
  600. * PWM attr for the f71862fg, fewer pwms and fewer zones per pwm than the
  601. * standard models
  602. */
  603. static struct sensor_device_attribute_2 f71862fg_auto_pwm_attr[3][7] = { {
  604. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  605. show_pwm_auto_point_channel,
  606. store_pwm_auto_point_channel, 0, 0),
  607. SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  608. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  609. 1, 0),
  610. SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  611. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  612. 4, 0),
  613. SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
  614. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  615. 0, 0),
  616. SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
  617. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  618. 3, 0),
  619. SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  620. show_pwm_auto_point_temp_hyst,
  621. store_pwm_auto_point_temp_hyst,
  622. 0, 0),
  623. SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
  624. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  625. }, {
  626. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  627. show_pwm_auto_point_channel,
  628. store_pwm_auto_point_channel, 0, 1),
  629. SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  630. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  631. 1, 1),
  632. SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  633. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  634. 4, 1),
  635. SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
  636. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  637. 0, 1),
  638. SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
  639. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  640. 3, 1),
  641. SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  642. show_pwm_auto_point_temp_hyst,
  643. store_pwm_auto_point_temp_hyst,
  644. 0, 1),
  645. SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
  646. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  647. }, {
  648. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  649. show_pwm_auto_point_channel,
  650. store_pwm_auto_point_channel, 0, 2),
  651. SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  652. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  653. 1, 2),
  654. SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  655. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  656. 4, 2),
  657. SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
  658. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  659. 0, 2),
  660. SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
  661. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  662. 3, 2),
  663. SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  664. show_pwm_auto_point_temp_hyst,
  665. store_pwm_auto_point_temp_hyst,
  666. 0, 2),
  667. SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
  668. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  669. } };
  670. /*
  671. * PWM attr for the f71808e/f71869, almost identical to the f71862fg, but the
  672. * pwm setting when the temperature is above the pwmX_auto_point1_temp can be
  673. * programmed instead of being hardcoded to 0xff
  674. */
  675. static struct sensor_device_attribute_2 f71869_auto_pwm_attr[3][8] = { {
  676. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  677. show_pwm_auto_point_channel,
  678. store_pwm_auto_point_channel, 0, 0),
  679. SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  680. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  681. 0, 0),
  682. SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  683. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  684. 1, 0),
  685. SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
  686. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  687. 4, 0),
  688. SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
  689. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  690. 0, 0),
  691. SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
  692. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  693. 3, 0),
  694. SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  695. show_pwm_auto_point_temp_hyst,
  696. store_pwm_auto_point_temp_hyst,
  697. 0, 0),
  698. SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
  699. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  700. }, {
  701. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  702. show_pwm_auto_point_channel,
  703. store_pwm_auto_point_channel, 0, 1),
  704. SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  705. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  706. 0, 1),
  707. SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  708. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  709. 1, 1),
  710. SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
  711. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  712. 4, 1),
  713. SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
  714. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  715. 0, 1),
  716. SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
  717. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  718. 3, 1),
  719. SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  720. show_pwm_auto_point_temp_hyst,
  721. store_pwm_auto_point_temp_hyst,
  722. 0, 1),
  723. SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
  724. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  725. }, {
  726. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  727. show_pwm_auto_point_channel,
  728. store_pwm_auto_point_channel, 0, 2),
  729. SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  730. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  731. 0, 2),
  732. SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  733. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  734. 1, 2),
  735. SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
  736. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  737. 4, 2),
  738. SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
  739. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  740. 0, 2),
  741. SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
  742. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  743. 3, 2),
  744. SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  745. show_pwm_auto_point_temp_hyst,
  746. store_pwm_auto_point_temp_hyst,
  747. 0, 2),
  748. SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
  749. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  750. } };
  751. /* PWM attr for the standard models */
  752. static struct sensor_device_attribute_2 fxxxx_auto_pwm_attr[4][14] = { {
  753. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  754. show_pwm_auto_point_channel,
  755. store_pwm_auto_point_channel, 0, 0),
  756. SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  757. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  758. 0, 0),
  759. SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  760. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  761. 1, 0),
  762. SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
  763. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  764. 2, 0),
  765. SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO|S_IWUSR,
  766. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  767. 3, 0),
  768. SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IRUGO|S_IWUSR,
  769. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  770. 4, 0),
  771. SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
  772. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  773. 0, 0),
  774. SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
  775. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  776. 1, 0),
  777. SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IRUGO|S_IWUSR,
  778. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  779. 2, 0),
  780. SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IRUGO|S_IWUSR,
  781. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  782. 3, 0),
  783. SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  784. show_pwm_auto_point_temp_hyst,
  785. store_pwm_auto_point_temp_hyst,
  786. 0, 0),
  787. SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
  788. show_pwm_auto_point_temp_hyst, NULL, 1, 0),
  789. SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IRUGO,
  790. show_pwm_auto_point_temp_hyst, NULL, 2, 0),
  791. SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IRUGO,
  792. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  793. }, {
  794. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  795. show_pwm_auto_point_channel,
  796. store_pwm_auto_point_channel, 0, 1),
  797. SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  798. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  799. 0, 1),
  800. SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  801. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  802. 1, 1),
  803. SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
  804. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  805. 2, 1),
  806. SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO|S_IWUSR,
  807. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  808. 3, 1),
  809. SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IRUGO|S_IWUSR,
  810. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  811. 4, 1),
  812. SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
  813. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  814. 0, 1),
  815. SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
  816. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  817. 1, 1),
  818. SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IRUGO|S_IWUSR,
  819. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  820. 2, 1),
  821. SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IRUGO|S_IWUSR,
  822. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  823. 3, 1),
  824. SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  825. show_pwm_auto_point_temp_hyst,
  826. store_pwm_auto_point_temp_hyst,
  827. 0, 1),
  828. SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
  829. show_pwm_auto_point_temp_hyst, NULL, 1, 1),
  830. SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IRUGO,
  831. show_pwm_auto_point_temp_hyst, NULL, 2, 1),
  832. SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IRUGO,
  833. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  834. }, {
  835. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  836. show_pwm_auto_point_channel,
  837. store_pwm_auto_point_channel, 0, 2),
  838. SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  839. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  840. 0, 2),
  841. SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  842. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  843. 1, 2),
  844. SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
  845. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  846. 2, 2),
  847. SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO|S_IWUSR,
  848. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  849. 3, 2),
  850. SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IRUGO|S_IWUSR,
  851. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  852. 4, 2),
  853. SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
  854. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  855. 0, 2),
  856. SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
  857. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  858. 1, 2),
  859. SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IRUGO|S_IWUSR,
  860. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  861. 2, 2),
  862. SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IRUGO|S_IWUSR,
  863. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  864. 3, 2),
  865. SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  866. show_pwm_auto_point_temp_hyst,
  867. store_pwm_auto_point_temp_hyst,
  868. 0, 2),
  869. SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
  870. show_pwm_auto_point_temp_hyst, NULL, 1, 2),
  871. SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IRUGO,
  872. show_pwm_auto_point_temp_hyst, NULL, 2, 2),
  873. SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO,
  874. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  875. }, {
  876. SENSOR_ATTR_2(pwm4_auto_channels_temp, S_IRUGO|S_IWUSR,
  877. show_pwm_auto_point_channel,
  878. store_pwm_auto_point_channel, 0, 3),
  879. SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IRUGO|S_IWUSR,
  880. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  881. 0, 3),
  882. SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IRUGO|S_IWUSR,
  883. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  884. 1, 3),
  885. SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IRUGO|S_IWUSR,
  886. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  887. 2, 3),
  888. SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IRUGO|S_IWUSR,
  889. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  890. 3, 3),
  891. SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IRUGO|S_IWUSR,
  892. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  893. 4, 3),
  894. SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IRUGO|S_IWUSR,
  895. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  896. 0, 3),
  897. SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IRUGO|S_IWUSR,
  898. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  899. 1, 3),
  900. SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IRUGO|S_IWUSR,
  901. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  902. 2, 3),
  903. SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IRUGO|S_IWUSR,
  904. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  905. 3, 3),
  906. SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  907. show_pwm_auto_point_temp_hyst,
  908. store_pwm_auto_point_temp_hyst,
  909. 0, 3),
  910. SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IRUGO,
  911. show_pwm_auto_point_temp_hyst, NULL, 1, 3),
  912. SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IRUGO,
  913. show_pwm_auto_point_temp_hyst, NULL, 2, 3),
  914. SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IRUGO,
  915. show_pwm_auto_point_temp_hyst, NULL, 3, 3),
  916. } };
  917. /* Fan attr specific to the f8000 (4th fan input can only measure speed) */
  918. static struct sensor_device_attribute_2 f8000_fan_attr[] = {
  919. SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
  920. };
  921. /*
  922. * PWM attr for the f8000, zones mapped to temp instead of to pwm!
  923. * Also the register block at offset A0 maps to TEMP1 (so our temp2, as the
  924. * F8000 starts counting temps at 0), B0 maps the TEMP2 and C0 maps to TEMP0
  925. */
  926. static struct sensor_device_attribute_2 f8000_auto_pwm_attr[3][14] = { {
  927. SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
  928. show_pwm_auto_point_channel,
  929. store_pwm_auto_point_channel, 0, 0),
  930. SENSOR_ATTR_2(temp1_auto_point1_pwm, S_IRUGO|S_IWUSR,
  931. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  932. 0, 2),
  933. SENSOR_ATTR_2(temp1_auto_point2_pwm, S_IRUGO|S_IWUSR,
  934. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  935. 1, 2),
  936. SENSOR_ATTR_2(temp1_auto_point3_pwm, S_IRUGO|S_IWUSR,
  937. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  938. 2, 2),
  939. SENSOR_ATTR_2(temp1_auto_point4_pwm, S_IRUGO|S_IWUSR,
  940. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  941. 3, 2),
  942. SENSOR_ATTR_2(temp1_auto_point5_pwm, S_IRUGO|S_IWUSR,
  943. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  944. 4, 2),
  945. SENSOR_ATTR_2(temp1_auto_point1_temp, S_IRUGO|S_IWUSR,
  946. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  947. 0, 2),
  948. SENSOR_ATTR_2(temp1_auto_point2_temp, S_IRUGO|S_IWUSR,
  949. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  950. 1, 2),
  951. SENSOR_ATTR_2(temp1_auto_point3_temp, S_IRUGO|S_IWUSR,
  952. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  953. 2, 2),
  954. SENSOR_ATTR_2(temp1_auto_point4_temp, S_IRUGO|S_IWUSR,
  955. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  956. 3, 2),
  957. SENSOR_ATTR_2(temp1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  958. show_pwm_auto_point_temp_hyst,
  959. store_pwm_auto_point_temp_hyst,
  960. 0, 2),
  961. SENSOR_ATTR_2(temp1_auto_point2_temp_hyst, S_IRUGO,
  962. show_pwm_auto_point_temp_hyst, NULL, 1, 2),
  963. SENSOR_ATTR_2(temp1_auto_point3_temp_hyst, S_IRUGO,
  964. show_pwm_auto_point_temp_hyst, NULL, 2, 2),
  965. SENSOR_ATTR_2(temp1_auto_point4_temp_hyst, S_IRUGO,
  966. show_pwm_auto_point_temp_hyst, NULL, 3, 2),
  967. }, {
  968. SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
  969. show_pwm_auto_point_channel,
  970. store_pwm_auto_point_channel, 0, 1),
  971. SENSOR_ATTR_2(temp2_auto_point1_pwm, S_IRUGO|S_IWUSR,
  972. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  973. 0, 0),
  974. SENSOR_ATTR_2(temp2_auto_point2_pwm, S_IRUGO|S_IWUSR,
  975. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  976. 1, 0),
  977. SENSOR_ATTR_2(temp2_auto_point3_pwm, S_IRUGO|S_IWUSR,
  978. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  979. 2, 0),
  980. SENSOR_ATTR_2(temp2_auto_point4_pwm, S_IRUGO|S_IWUSR,
  981. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  982. 3, 0),
  983. SENSOR_ATTR_2(temp2_auto_point5_pwm, S_IRUGO|S_IWUSR,
  984. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  985. 4, 0),
  986. SENSOR_ATTR_2(temp2_auto_point1_temp, S_IRUGO|S_IWUSR,
  987. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  988. 0, 0),
  989. SENSOR_ATTR_2(temp2_auto_point2_temp, S_IRUGO|S_IWUSR,
  990. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  991. 1, 0),
  992. SENSOR_ATTR_2(temp2_auto_point3_temp, S_IRUGO|S_IWUSR,
  993. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  994. 2, 0),
  995. SENSOR_ATTR_2(temp2_auto_point4_temp, S_IRUGO|S_IWUSR,
  996. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  997. 3, 0),
  998. SENSOR_ATTR_2(temp2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  999. show_pwm_auto_point_temp_hyst,
  1000. store_pwm_auto_point_temp_hyst,
  1001. 0, 0),
  1002. SENSOR_ATTR_2(temp2_auto_point2_temp_hyst, S_IRUGO,
  1003. show_pwm_auto_point_temp_hyst, NULL, 1, 0),
  1004. SENSOR_ATTR_2(temp2_auto_point3_temp_hyst, S_IRUGO,
  1005. show_pwm_auto_point_temp_hyst, NULL, 2, 0),
  1006. SENSOR_ATTR_2(temp2_auto_point4_temp_hyst, S_IRUGO,
  1007. show_pwm_auto_point_temp_hyst, NULL, 3, 0),
  1008. }, {
  1009. SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
  1010. show_pwm_auto_point_channel,
  1011. store_pwm_auto_point_channel, 0, 2),
  1012. SENSOR_ATTR_2(temp3_auto_point1_pwm, S_IRUGO|S_IWUSR,
  1013. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1014. 0, 1),
  1015. SENSOR_ATTR_2(temp3_auto_point2_pwm, S_IRUGO|S_IWUSR,
  1016. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1017. 1, 1),
  1018. SENSOR_ATTR_2(temp3_auto_point3_pwm, S_IRUGO|S_IWUSR,
  1019. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1020. 2, 1),
  1021. SENSOR_ATTR_2(temp3_auto_point4_pwm, S_IRUGO|S_IWUSR,
  1022. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1023. 3, 1),
  1024. SENSOR_ATTR_2(temp3_auto_point5_pwm, S_IRUGO|S_IWUSR,
  1025. show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
  1026. 4, 1),
  1027. SENSOR_ATTR_2(temp3_auto_point1_temp, S_IRUGO|S_IWUSR,
  1028. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1029. 0, 1),
  1030. SENSOR_ATTR_2(temp3_auto_point2_temp, S_IRUGO|S_IWUSR,
  1031. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1032. 1, 1),
  1033. SENSOR_ATTR_2(temp3_auto_point3_temp, S_IRUGO|S_IWUSR,
  1034. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1035. 2, 1),
  1036. SENSOR_ATTR_2(temp3_auto_point4_temp, S_IRUGO|S_IWUSR,
  1037. show_pwm_auto_point_temp, store_pwm_auto_point_temp,
  1038. 3, 1),
  1039. SENSOR_ATTR_2(temp3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
  1040. show_pwm_auto_point_temp_hyst,
  1041. store_pwm_auto_point_temp_hyst,
  1042. 0, 1),
  1043. SENSOR_ATTR_2(temp3_auto_point2_temp_hyst, S_IRUGO,
  1044. show_pwm_auto_point_temp_hyst, NULL, 1, 1),
  1045. SENSOR_ATTR_2(temp3_auto_point3_temp_hyst, S_IRUGO,
  1046. show_pwm_auto_point_temp_hyst, NULL, 2, 1),
  1047. SENSOR_ATTR_2(temp3_auto_point4_temp_hyst, S_IRUGO,
  1048. show_pwm_auto_point_temp_hyst, NULL, 3, 1),
  1049. } };
  1050. /* Super I/O functions */
  1051. static inline int superio_inb(int base, int reg)
  1052. {
  1053. outb(reg, base);
  1054. return inb(base + 1);
  1055. }
  1056. static int superio_inw(int base, int reg)
  1057. {
  1058. int val;
  1059. val = superio_inb(base, reg) << 8;
  1060. val |= superio_inb(base, reg + 1);
  1061. return val;
  1062. }
  1063. static inline int superio_enter(int base)
  1064. {
  1065. /* Don't step on other drivers' I/O space by accident */
  1066. if (!request_muxed_region(base, 2, DRVNAME)) {
  1067. pr_err("I/O address 0x%04x already in use\n", base);
  1068. return -EBUSY;
  1069. }
  1070. /* according to the datasheet the key must be send twice! */
  1071. outb(SIO_UNLOCK_KEY, base);
  1072. outb(SIO_UNLOCK_KEY, base);
  1073. return 0;
  1074. }
  1075. static inline void superio_select(int base, int ld)
  1076. {
  1077. outb(SIO_REG_LDSEL, base);
  1078. outb(ld, base + 1);
  1079. }
  1080. static inline void superio_exit(int base)
  1081. {
  1082. outb(SIO_LOCK_KEY, base);
  1083. release_region(base, 2);
  1084. }
  1085. static inline int fan_from_reg(u16 reg)
  1086. {
  1087. return reg ? (1500000 / reg) : 0;
  1088. }
  1089. static inline u16 fan_to_reg(int fan)
  1090. {
  1091. return fan ? (1500000 / fan) : 0;
  1092. }
  1093. static u8 f71882fg_read8(struct f71882fg_data *data, u8 reg)
  1094. {
  1095. u8 val;
  1096. outb(reg, data->addr + ADDR_REG_OFFSET);
  1097. val = inb(data->addr + DATA_REG_OFFSET);
  1098. return val;
  1099. }
  1100. static u16 f71882fg_read16(struct f71882fg_data *data, u8 reg)
  1101. {
  1102. u16 val;
  1103. val = f71882fg_read8(data, reg) << 8;
  1104. val |= f71882fg_read8(data, reg + 1);
  1105. return val;
  1106. }
  1107. static void f71882fg_write8(struct f71882fg_data *data, u8 reg, u8 val)
  1108. {
  1109. outb(reg, data->addr + ADDR_REG_OFFSET);
  1110. outb(val, data->addr + DATA_REG_OFFSET);
  1111. }
  1112. static void f71882fg_write16(struct f71882fg_data *data, u8 reg, u16 val)
  1113. {
  1114. f71882fg_write8(data, reg, val >> 8);
  1115. f71882fg_write8(data, reg + 1, val & 0xff);
  1116. }
  1117. static u16 f71882fg_read_temp(struct f71882fg_data *data, int nr)
  1118. {
  1119. if (data->type == f71858fg)
  1120. return f71882fg_read16(data, F71882FG_REG_TEMP(nr));
  1121. else
  1122. return f71882fg_read8(data, F71882FG_REG_TEMP(nr));
  1123. }
  1124. static struct f71882fg_data *f71882fg_update_device(struct device *dev)
  1125. {
  1126. struct f71882fg_data *data = dev_get_drvdata(dev);
  1127. int nr_fans = f71882fg_nr_fans[data->type];
  1128. int nr_temps = f71882fg_nr_temps[data->type];
  1129. int nr, reg, point;
  1130. mutex_lock(&data->update_lock);
  1131. /* Update once every 60 seconds */
  1132. if (time_after(jiffies, data->last_limits + 60 * HZ) ||
  1133. !data->valid) {
  1134. if (f71882fg_has_in1_alarm[data->type]) {
  1135. if (data->type == f81866a) {
  1136. data->in1_max =
  1137. f71882fg_read8(data,
  1138. F81866_REG_IN1_HIGH);
  1139. data->in_beep =
  1140. f71882fg_read8(data,
  1141. F81866_REG_IN_BEEP);
  1142. } else {
  1143. data->in1_max =
  1144. f71882fg_read8(data,
  1145. F71882FG_REG_IN1_HIGH);
  1146. data->in_beep =
  1147. f71882fg_read8(data,
  1148. F71882FG_REG_IN_BEEP);
  1149. }
  1150. }
  1151. /* Get High & boundary temps*/
  1152. for (nr = data->temp_start; nr < nr_temps + data->temp_start;
  1153. nr++) {
  1154. data->temp_ovt[nr] = f71882fg_read8(data,
  1155. F71882FG_REG_TEMP_OVT(nr));
  1156. data->temp_high[nr] = f71882fg_read8(data,
  1157. F71882FG_REG_TEMP_HIGH(nr));
  1158. }
  1159. if (data->type != f8000) {
  1160. data->temp_hyst[0] = f71882fg_read8(data,
  1161. F71882FG_REG_TEMP_HYST(0));
  1162. data->temp_hyst[1] = f71882fg_read8(data,
  1163. F71882FG_REG_TEMP_HYST(1));
  1164. }
  1165. /* All but the f71858fg / f8000 have this register */
  1166. if ((data->type != f71858fg) && (data->type != f8000)) {
  1167. reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE);
  1168. data->temp_type[1] = (reg & 0x02) ? 2 : 4;
  1169. data->temp_type[2] = (reg & 0x04) ? 2 : 4;
  1170. data->temp_type[3] = (reg & 0x08) ? 2 : 4;
  1171. }
  1172. if (f71882fg_fan_has_beep[data->type])
  1173. data->fan_beep = f71882fg_read8(data,
  1174. F71882FG_REG_FAN_BEEP);
  1175. if (f71882fg_temp_has_beep[data->type])
  1176. data->temp_beep = f71882fg_read8(data,
  1177. F71882FG_REG_TEMP_BEEP);
  1178. data->pwm_enable = f71882fg_read8(data,
  1179. F71882FG_REG_PWM_ENABLE);
  1180. data->pwm_auto_point_hyst[0] =
  1181. f71882fg_read8(data, F71882FG_REG_FAN_HYST(0));
  1182. data->pwm_auto_point_hyst[1] =
  1183. f71882fg_read8(data, F71882FG_REG_FAN_HYST(1));
  1184. for (nr = 0; nr < nr_fans; nr++) {
  1185. data->pwm_auto_point_mapping[nr] =
  1186. f71882fg_read8(data,
  1187. F71882FG_REG_POINT_MAPPING(nr));
  1188. switch (data->type) {
  1189. default:
  1190. for (point = 0; point < 5; point++) {
  1191. data->pwm_auto_point_pwm[nr][point] =
  1192. f71882fg_read8(data,
  1193. F71882FG_REG_POINT_PWM
  1194. (nr, point));
  1195. }
  1196. for (point = 0; point < 4; point++) {
  1197. data->pwm_auto_point_temp[nr][point] =
  1198. f71882fg_read8(data,
  1199. F71882FG_REG_POINT_TEMP
  1200. (nr, point));
  1201. }
  1202. break;
  1203. case f71808e:
  1204. case f71869:
  1205. data->pwm_auto_point_pwm[nr][0] =
  1206. f71882fg_read8(data,
  1207. F71882FG_REG_POINT_PWM(nr, 0));
  1208. /* Fall through */
  1209. case f71862fg:
  1210. data->pwm_auto_point_pwm[nr][1] =
  1211. f71882fg_read8(data,
  1212. F71882FG_REG_POINT_PWM
  1213. (nr, 1));
  1214. data->pwm_auto_point_pwm[nr][4] =
  1215. f71882fg_read8(data,
  1216. F71882FG_REG_POINT_PWM
  1217. (nr, 4));
  1218. data->pwm_auto_point_temp[nr][0] =
  1219. f71882fg_read8(data,
  1220. F71882FG_REG_POINT_TEMP
  1221. (nr, 0));
  1222. data->pwm_auto_point_temp[nr][3] =
  1223. f71882fg_read8(data,
  1224. F71882FG_REG_POINT_TEMP
  1225. (nr, 3));
  1226. break;
  1227. }
  1228. }
  1229. data->last_limits = jiffies;
  1230. }
  1231. /* Update every second */
  1232. if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
  1233. data->temp_status = f71882fg_read8(data,
  1234. F71882FG_REG_TEMP_STATUS);
  1235. data->temp_diode_open = f71882fg_read8(data,
  1236. F71882FG_REG_TEMP_DIODE_OPEN);
  1237. for (nr = data->temp_start; nr < nr_temps + data->temp_start;
  1238. nr++)
  1239. data->temp[nr] = f71882fg_read_temp(data, nr);
  1240. data->fan_status = f71882fg_read8(data,
  1241. F71882FG_REG_FAN_STATUS);
  1242. for (nr = 0; nr < nr_fans; nr++) {
  1243. data->fan[nr] = f71882fg_read16(data,
  1244. F71882FG_REG_FAN(nr));
  1245. data->fan_target[nr] =
  1246. f71882fg_read16(data, F71882FG_REG_FAN_TARGET(nr));
  1247. data->fan_full_speed[nr] =
  1248. f71882fg_read16(data,
  1249. F71882FG_REG_FAN_FULL_SPEED(nr));
  1250. data->pwm[nr] =
  1251. f71882fg_read8(data, F71882FG_REG_PWM(nr));
  1252. }
  1253. /* Some models have 1 more fan with limited capabilities */
  1254. if (data->type == f71808a) {
  1255. data->fan[2] = f71882fg_read16(data,
  1256. F71882FG_REG_FAN(2));
  1257. data->pwm[2] = f71882fg_read8(data,
  1258. F71882FG_REG_PWM(2));
  1259. }
  1260. if (data->type == f8000)
  1261. data->fan[3] = f71882fg_read16(data,
  1262. F71882FG_REG_FAN(3));
  1263. if (f71882fg_has_in1_alarm[data->type]) {
  1264. if (data->type == f81866a)
  1265. data->in_status = f71882fg_read8(data,
  1266. F81866_REG_IN_STATUS);
  1267. else
  1268. data->in_status = f71882fg_read8(data,
  1269. F71882FG_REG_IN_STATUS);
  1270. }
  1271. for (nr = 0; nr < F71882FG_MAX_INS; nr++)
  1272. if (f71882fg_has_in[data->type][nr])
  1273. data->in[nr] = f71882fg_read8(data,
  1274. F71882FG_REG_IN(nr));
  1275. data->last_updated = jiffies;
  1276. data->valid = 1;
  1277. }
  1278. mutex_unlock(&data->update_lock);
  1279. return data;
  1280. }
  1281. /* Sysfs Interface */
  1282. static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
  1283. char *buf)
  1284. {
  1285. struct f71882fg_data *data = f71882fg_update_device(dev);
  1286. int nr = to_sensor_dev_attr_2(devattr)->index;
  1287. int speed = fan_from_reg(data->fan[nr]);
  1288. if (speed == FAN_MIN_DETECT)
  1289. speed = 0;
  1290. return sprintf(buf, "%d\n", speed);
  1291. }
  1292. static ssize_t show_fan_full_speed(struct device *dev,
  1293. struct device_attribute *devattr, char *buf)
  1294. {
  1295. struct f71882fg_data *data = f71882fg_update_device(dev);
  1296. int nr = to_sensor_dev_attr_2(devattr)->index;
  1297. int speed = fan_from_reg(data->fan_full_speed[nr]);
  1298. return sprintf(buf, "%d\n", speed);
  1299. }
  1300. static ssize_t store_fan_full_speed(struct device *dev,
  1301. struct device_attribute *devattr,
  1302. const char *buf, size_t count)
  1303. {
  1304. struct f71882fg_data *data = dev_get_drvdata(dev);
  1305. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1306. long val;
  1307. err = kstrtol(buf, 10, &val);
  1308. if (err)
  1309. return err;
  1310. val = clamp_val(val, 23, 1500000);
  1311. val = fan_to_reg(val);
  1312. mutex_lock(&data->update_lock);
  1313. f71882fg_write16(data, F71882FG_REG_FAN_FULL_SPEED(nr), val);
  1314. data->fan_full_speed[nr] = val;
  1315. mutex_unlock(&data->update_lock);
  1316. return count;
  1317. }
  1318. static ssize_t show_fan_beep(struct device *dev, struct device_attribute
  1319. *devattr, char *buf)
  1320. {
  1321. struct f71882fg_data *data = f71882fg_update_device(dev);
  1322. int nr = to_sensor_dev_attr_2(devattr)->index;
  1323. if (data->fan_beep & (1 << nr))
  1324. return sprintf(buf, "1\n");
  1325. else
  1326. return sprintf(buf, "0\n");
  1327. }
  1328. static ssize_t store_fan_beep(struct device *dev, struct device_attribute
  1329. *devattr, const char *buf, size_t count)
  1330. {
  1331. struct f71882fg_data *data = dev_get_drvdata(dev);
  1332. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1333. unsigned long val;
  1334. err = kstrtoul(buf, 10, &val);
  1335. if (err)
  1336. return err;
  1337. mutex_lock(&data->update_lock);
  1338. data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP);
  1339. if (val)
  1340. data->fan_beep |= 1 << nr;
  1341. else
  1342. data->fan_beep &= ~(1 << nr);
  1343. f71882fg_write8(data, F71882FG_REG_FAN_BEEP, data->fan_beep);
  1344. mutex_unlock(&data->update_lock);
  1345. return count;
  1346. }
  1347. static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
  1348. *devattr, char *buf)
  1349. {
  1350. struct f71882fg_data *data = f71882fg_update_device(dev);
  1351. int nr = to_sensor_dev_attr_2(devattr)->index;
  1352. if (data->fan_status & (1 << nr))
  1353. return sprintf(buf, "1\n");
  1354. else
  1355. return sprintf(buf, "0\n");
  1356. }
  1357. static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
  1358. char *buf)
  1359. {
  1360. struct f71882fg_data *data = f71882fg_update_device(dev);
  1361. int nr = to_sensor_dev_attr_2(devattr)->index;
  1362. return sprintf(buf, "%d\n", data->in[nr] * 8);
  1363. }
  1364. static ssize_t show_in_max(struct device *dev, struct device_attribute
  1365. *devattr, char *buf)
  1366. {
  1367. struct f71882fg_data *data = f71882fg_update_device(dev);
  1368. return sprintf(buf, "%d\n", data->in1_max * 8);
  1369. }
  1370. static ssize_t store_in_max(struct device *dev, struct device_attribute
  1371. *devattr, const char *buf, size_t count)
  1372. {
  1373. struct f71882fg_data *data = dev_get_drvdata(dev);
  1374. int err;
  1375. long val;
  1376. err = kstrtol(buf, 10, &val);
  1377. if (err)
  1378. return err;
  1379. val /= 8;
  1380. val = clamp_val(val, 0, 255);
  1381. mutex_lock(&data->update_lock);
  1382. if (data->type == f81866a)
  1383. f71882fg_write8(data, F81866_REG_IN1_HIGH, val);
  1384. else
  1385. f71882fg_write8(data, F71882FG_REG_IN1_HIGH, val);
  1386. data->in1_max = val;
  1387. mutex_unlock(&data->update_lock);
  1388. return count;
  1389. }
  1390. static ssize_t show_in_beep(struct device *dev, struct device_attribute
  1391. *devattr, char *buf)
  1392. {
  1393. struct f71882fg_data *data = f71882fg_update_device(dev);
  1394. int nr = to_sensor_dev_attr_2(devattr)->index;
  1395. if (data->in_beep & (1 << nr))
  1396. return sprintf(buf, "1\n");
  1397. else
  1398. return sprintf(buf, "0\n");
  1399. }
  1400. static ssize_t store_in_beep(struct device *dev, struct device_attribute
  1401. *devattr, const char *buf, size_t count)
  1402. {
  1403. struct f71882fg_data *data = dev_get_drvdata(dev);
  1404. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1405. unsigned long val;
  1406. err = kstrtoul(buf, 10, &val);
  1407. if (err)
  1408. return err;
  1409. mutex_lock(&data->update_lock);
  1410. if (data->type == f81866a)
  1411. data->in_beep = f71882fg_read8(data, F81866_REG_IN_BEEP);
  1412. else
  1413. data->in_beep = f71882fg_read8(data, F71882FG_REG_IN_BEEP);
  1414. if (val)
  1415. data->in_beep |= 1 << nr;
  1416. else
  1417. data->in_beep &= ~(1 << nr);
  1418. if (data->type == f81866a)
  1419. f71882fg_write8(data, F81866_REG_IN_BEEP, data->in_beep);
  1420. else
  1421. f71882fg_write8(data, F71882FG_REG_IN_BEEP, data->in_beep);
  1422. mutex_unlock(&data->update_lock);
  1423. return count;
  1424. }
  1425. static ssize_t show_in_alarm(struct device *dev, struct device_attribute
  1426. *devattr, char *buf)
  1427. {
  1428. struct f71882fg_data *data = f71882fg_update_device(dev);
  1429. int nr = to_sensor_dev_attr_2(devattr)->index;
  1430. if (data->in_status & (1 << nr))
  1431. return sprintf(buf, "1\n");
  1432. else
  1433. return sprintf(buf, "0\n");
  1434. }
  1435. static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
  1436. char *buf)
  1437. {
  1438. struct f71882fg_data *data = f71882fg_update_device(dev);
  1439. int nr = to_sensor_dev_attr_2(devattr)->index;
  1440. int sign, temp;
  1441. if (data->type == f71858fg) {
  1442. /* TEMP_TABLE_SEL 1 or 3 ? */
  1443. if (data->temp_config & 1) {
  1444. sign = data->temp[nr] & 0x0001;
  1445. temp = (data->temp[nr] >> 5) & 0x7ff;
  1446. } else {
  1447. sign = data->temp[nr] & 0x8000;
  1448. temp = (data->temp[nr] >> 5) & 0x3ff;
  1449. }
  1450. temp *= 125;
  1451. if (sign)
  1452. temp -= 128000;
  1453. } else
  1454. temp = data->temp[nr] * 1000;
  1455. return sprintf(buf, "%d\n", temp);
  1456. }
  1457. static ssize_t show_temp_max(struct device *dev, struct device_attribute
  1458. *devattr, char *buf)
  1459. {
  1460. struct f71882fg_data *data = f71882fg_update_device(dev);
  1461. int nr = to_sensor_dev_attr_2(devattr)->index;
  1462. return sprintf(buf, "%d\n", data->temp_high[nr] * 1000);
  1463. }
  1464. static ssize_t store_temp_max(struct device *dev, struct device_attribute
  1465. *devattr, const char *buf, size_t count)
  1466. {
  1467. struct f71882fg_data *data = dev_get_drvdata(dev);
  1468. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1469. long val;
  1470. err = kstrtol(buf, 10, &val);
  1471. if (err)
  1472. return err;
  1473. val /= 1000;
  1474. val = clamp_val(val, 0, 255);
  1475. mutex_lock(&data->update_lock);
  1476. f71882fg_write8(data, F71882FG_REG_TEMP_HIGH(nr), val);
  1477. data->temp_high[nr] = val;
  1478. mutex_unlock(&data->update_lock);
  1479. return count;
  1480. }
  1481. static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
  1482. *devattr, char *buf)
  1483. {
  1484. struct f71882fg_data *data = f71882fg_update_device(dev);
  1485. int nr = to_sensor_dev_attr_2(devattr)->index;
  1486. int temp_max_hyst;
  1487. mutex_lock(&data->update_lock);
  1488. if (nr & 1)
  1489. temp_max_hyst = data->temp_hyst[nr / 2] >> 4;
  1490. else
  1491. temp_max_hyst = data->temp_hyst[nr / 2] & 0x0f;
  1492. temp_max_hyst = (data->temp_high[nr] - temp_max_hyst) * 1000;
  1493. mutex_unlock(&data->update_lock);
  1494. return sprintf(buf, "%d\n", temp_max_hyst);
  1495. }
  1496. static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
  1497. *devattr, const char *buf, size_t count)
  1498. {
  1499. struct f71882fg_data *data = dev_get_drvdata(dev);
  1500. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1501. ssize_t ret = count;
  1502. u8 reg;
  1503. long val;
  1504. err = kstrtol(buf, 10, &val);
  1505. if (err)
  1506. return err;
  1507. val /= 1000;
  1508. mutex_lock(&data->update_lock);
  1509. /* convert abs to relative and check */
  1510. data->temp_high[nr] = f71882fg_read8(data, F71882FG_REG_TEMP_HIGH(nr));
  1511. val = clamp_val(val, data->temp_high[nr] - 15, data->temp_high[nr]);
  1512. val = data->temp_high[nr] - val;
  1513. /* convert value to register contents */
  1514. reg = f71882fg_read8(data, F71882FG_REG_TEMP_HYST(nr / 2));
  1515. if (nr & 1)
  1516. reg = (reg & 0x0f) | (val << 4);
  1517. else
  1518. reg = (reg & 0xf0) | val;
  1519. f71882fg_write8(data, F71882FG_REG_TEMP_HYST(nr / 2), reg);
  1520. data->temp_hyst[nr / 2] = reg;
  1521. mutex_unlock(&data->update_lock);
  1522. return ret;
  1523. }
  1524. static ssize_t show_temp_crit(struct device *dev, struct device_attribute
  1525. *devattr, char *buf)
  1526. {
  1527. struct f71882fg_data *data = f71882fg_update_device(dev);
  1528. int nr = to_sensor_dev_attr_2(devattr)->index;
  1529. return sprintf(buf, "%d\n", data->temp_ovt[nr] * 1000);
  1530. }
  1531. static ssize_t store_temp_crit(struct device *dev, struct device_attribute
  1532. *devattr, const char *buf, size_t count)
  1533. {
  1534. struct f71882fg_data *data = dev_get_drvdata(dev);
  1535. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1536. long val;
  1537. err = kstrtol(buf, 10, &val);
  1538. if (err)
  1539. return err;
  1540. val /= 1000;
  1541. val = clamp_val(val, 0, 255);
  1542. mutex_lock(&data->update_lock);
  1543. f71882fg_write8(data, F71882FG_REG_TEMP_OVT(nr), val);
  1544. data->temp_ovt[nr] = val;
  1545. mutex_unlock(&data->update_lock);
  1546. return count;
  1547. }
  1548. static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
  1549. *devattr, char *buf)
  1550. {
  1551. struct f71882fg_data *data = f71882fg_update_device(dev);
  1552. int nr = to_sensor_dev_attr_2(devattr)->index;
  1553. int temp_crit_hyst;
  1554. mutex_lock(&data->update_lock);
  1555. if (nr & 1)
  1556. temp_crit_hyst = data->temp_hyst[nr / 2] >> 4;
  1557. else
  1558. temp_crit_hyst = data->temp_hyst[nr / 2] & 0x0f;
  1559. temp_crit_hyst = (data->temp_ovt[nr] - temp_crit_hyst) * 1000;
  1560. mutex_unlock(&data->update_lock);
  1561. return sprintf(buf, "%d\n", temp_crit_hyst);
  1562. }
  1563. static ssize_t show_temp_type(struct device *dev, struct device_attribute
  1564. *devattr, char *buf)
  1565. {
  1566. struct f71882fg_data *data = f71882fg_update_device(dev);
  1567. int nr = to_sensor_dev_attr_2(devattr)->index;
  1568. return sprintf(buf, "%d\n", data->temp_type[nr]);
  1569. }
  1570. static ssize_t show_temp_beep(struct device *dev, struct device_attribute
  1571. *devattr, char *buf)
  1572. {
  1573. struct f71882fg_data *data = f71882fg_update_device(dev);
  1574. int nr = to_sensor_dev_attr_2(devattr)->index;
  1575. if (data->temp_beep & (1 << nr))
  1576. return sprintf(buf, "1\n");
  1577. else
  1578. return sprintf(buf, "0\n");
  1579. }
  1580. static ssize_t store_temp_beep(struct device *dev, struct device_attribute
  1581. *devattr, const char *buf, size_t count)
  1582. {
  1583. struct f71882fg_data *data = dev_get_drvdata(dev);
  1584. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1585. unsigned long val;
  1586. err = kstrtoul(buf, 10, &val);
  1587. if (err)
  1588. return err;
  1589. mutex_lock(&data->update_lock);
  1590. data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP);
  1591. if (val)
  1592. data->temp_beep |= 1 << nr;
  1593. else
  1594. data->temp_beep &= ~(1 << nr);
  1595. f71882fg_write8(data, F71882FG_REG_TEMP_BEEP, data->temp_beep);
  1596. mutex_unlock(&data->update_lock);
  1597. return count;
  1598. }
  1599. static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
  1600. *devattr, char *buf)
  1601. {
  1602. struct f71882fg_data *data = f71882fg_update_device(dev);
  1603. int nr = to_sensor_dev_attr_2(devattr)->index;
  1604. if (data->temp_status & (1 << nr))
  1605. return sprintf(buf, "1\n");
  1606. else
  1607. return sprintf(buf, "0\n");
  1608. }
  1609. static ssize_t show_temp_fault(struct device *dev, struct device_attribute
  1610. *devattr, char *buf)
  1611. {
  1612. struct f71882fg_data *data = f71882fg_update_device(dev);
  1613. int nr = to_sensor_dev_attr_2(devattr)->index;
  1614. if (data->temp_diode_open & (1 << nr))
  1615. return sprintf(buf, "1\n");
  1616. else
  1617. return sprintf(buf, "0\n");
  1618. }
  1619. static ssize_t show_pwm(struct device *dev,
  1620. struct device_attribute *devattr, char *buf)
  1621. {
  1622. struct f71882fg_data *data = f71882fg_update_device(dev);
  1623. int val, nr = to_sensor_dev_attr_2(devattr)->index;
  1624. mutex_lock(&data->update_lock);
  1625. if (data->pwm_enable & (1 << (2 * nr)))
  1626. /* PWM mode */
  1627. val = data->pwm[nr];
  1628. else {
  1629. /* RPM mode */
  1630. val = 255 * fan_from_reg(data->fan_target[nr])
  1631. / fan_from_reg(data->fan_full_speed[nr]);
  1632. }
  1633. mutex_unlock(&data->update_lock);
  1634. return sprintf(buf, "%d\n", val);
  1635. }
  1636. static ssize_t store_pwm(struct device *dev,
  1637. struct device_attribute *devattr, const char *buf,
  1638. size_t count)
  1639. {
  1640. struct f71882fg_data *data = dev_get_drvdata(dev);
  1641. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1642. long val;
  1643. err = kstrtol(buf, 10, &val);
  1644. if (err)
  1645. return err;
  1646. val = clamp_val(val, 0, 255);
  1647. mutex_lock(&data->update_lock);
  1648. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  1649. if ((data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 3) != 2) ||
  1650. (data->type != f8000 && !((data->pwm_enable >> 2 * nr) & 2))) {
  1651. count = -EROFS;
  1652. goto leave;
  1653. }
  1654. if (data->pwm_enable & (1 << (2 * nr))) {
  1655. /* PWM mode */
  1656. f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
  1657. data->pwm[nr] = val;
  1658. } else {
  1659. /* RPM mode */
  1660. int target, full_speed;
  1661. full_speed = f71882fg_read16(data,
  1662. F71882FG_REG_FAN_FULL_SPEED(nr));
  1663. target = fan_to_reg(val * fan_from_reg(full_speed) / 255);
  1664. f71882fg_write16(data, F71882FG_REG_FAN_TARGET(nr), target);
  1665. data->fan_target[nr] = target;
  1666. data->fan_full_speed[nr] = full_speed;
  1667. }
  1668. leave:
  1669. mutex_unlock(&data->update_lock);
  1670. return count;
  1671. }
  1672. static ssize_t show_simple_pwm(struct device *dev,
  1673. struct device_attribute *devattr, char *buf)
  1674. {
  1675. struct f71882fg_data *data = f71882fg_update_device(dev);
  1676. int val, nr = to_sensor_dev_attr_2(devattr)->index;
  1677. val = data->pwm[nr];
  1678. return sprintf(buf, "%d\n", val);
  1679. }
  1680. static ssize_t store_simple_pwm(struct device *dev,
  1681. struct device_attribute *devattr,
  1682. const char *buf, size_t count)
  1683. {
  1684. struct f71882fg_data *data = dev_get_drvdata(dev);
  1685. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1686. long val;
  1687. err = kstrtol(buf, 10, &val);
  1688. if (err)
  1689. return err;
  1690. val = clamp_val(val, 0, 255);
  1691. mutex_lock(&data->update_lock);
  1692. f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
  1693. data->pwm[nr] = val;
  1694. mutex_unlock(&data->update_lock);
  1695. return count;
  1696. }
  1697. static ssize_t show_pwm_enable(struct device *dev,
  1698. struct device_attribute *devattr, char *buf)
  1699. {
  1700. int result = 0;
  1701. struct f71882fg_data *data = f71882fg_update_device(dev);
  1702. int nr = to_sensor_dev_attr_2(devattr)->index;
  1703. switch ((data->pwm_enable >> 2 * nr) & 3) {
  1704. case 0:
  1705. case 1:
  1706. result = 2; /* Normal auto mode */
  1707. break;
  1708. case 2:
  1709. result = 1; /* Manual mode */
  1710. break;
  1711. case 3:
  1712. if (data->type == f8000)
  1713. result = 3; /* Thermostat mode */
  1714. else
  1715. result = 1; /* Manual mode */
  1716. break;
  1717. }
  1718. return sprintf(buf, "%d\n", result);
  1719. }
  1720. static ssize_t store_pwm_enable(struct device *dev, struct device_attribute
  1721. *devattr, const char *buf, size_t count)
  1722. {
  1723. struct f71882fg_data *data = dev_get_drvdata(dev);
  1724. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1725. long val;
  1726. err = kstrtol(buf, 10, &val);
  1727. if (err)
  1728. return err;
  1729. /* Special case for F8000 pwm channel 3 which only does auto mode */
  1730. if (data->type == f8000 && nr == 2 && val != 2)
  1731. return -EINVAL;
  1732. mutex_lock(&data->update_lock);
  1733. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  1734. /* Special case for F8000 auto PWM mode / Thermostat mode */
  1735. if (data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 1)) {
  1736. switch (val) {
  1737. case 2:
  1738. data->pwm_enable &= ~(2 << (2 * nr));
  1739. break; /* Normal auto mode */
  1740. case 3:
  1741. data->pwm_enable |= 2 << (2 * nr);
  1742. break; /* Thermostat mode */
  1743. default:
  1744. count = -EINVAL;
  1745. goto leave;
  1746. }
  1747. } else {
  1748. switch (val) {
  1749. case 1:
  1750. /* The f71858fg does not support manual RPM mode */
  1751. if (data->type == f71858fg &&
  1752. ((data->pwm_enable >> (2 * nr)) & 1)) {
  1753. count = -EINVAL;
  1754. goto leave;
  1755. }
  1756. data->pwm_enable |= 2 << (2 * nr);
  1757. break; /* Manual */
  1758. case 2:
  1759. data->pwm_enable &= ~(2 << (2 * nr));
  1760. break; /* Normal auto mode */
  1761. default:
  1762. count = -EINVAL;
  1763. goto leave;
  1764. }
  1765. }
  1766. f71882fg_write8(data, F71882FG_REG_PWM_ENABLE, data->pwm_enable);
  1767. leave:
  1768. mutex_unlock(&data->update_lock);
  1769. return count;
  1770. }
  1771. static ssize_t show_pwm_auto_point_pwm(struct device *dev,
  1772. struct device_attribute *devattr,
  1773. char *buf)
  1774. {
  1775. int result;
  1776. struct f71882fg_data *data = f71882fg_update_device(dev);
  1777. int pwm = to_sensor_dev_attr_2(devattr)->index;
  1778. int point = to_sensor_dev_attr_2(devattr)->nr;
  1779. mutex_lock(&data->update_lock);
  1780. if (data->pwm_enable & (1 << (2 * pwm))) {
  1781. /* PWM mode */
  1782. result = data->pwm_auto_point_pwm[pwm][point];
  1783. } else {
  1784. /* RPM mode */
  1785. result = 32 * 255 / (32 + data->pwm_auto_point_pwm[pwm][point]);
  1786. }
  1787. mutex_unlock(&data->update_lock);
  1788. return sprintf(buf, "%d\n", result);
  1789. }
  1790. static ssize_t store_pwm_auto_point_pwm(struct device *dev,
  1791. struct device_attribute *devattr,
  1792. const char *buf, size_t count)
  1793. {
  1794. struct f71882fg_data *data = dev_get_drvdata(dev);
  1795. int err, pwm = to_sensor_dev_attr_2(devattr)->index;
  1796. int point = to_sensor_dev_attr_2(devattr)->nr;
  1797. long val;
  1798. err = kstrtol(buf, 10, &val);
  1799. if (err)
  1800. return err;
  1801. val = clamp_val(val, 0, 255);
  1802. mutex_lock(&data->update_lock);
  1803. data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  1804. if (data->pwm_enable & (1 << (2 * pwm))) {
  1805. /* PWM mode */
  1806. } else {
  1807. /* RPM mode */
  1808. if (val < 29) /* Prevent negative numbers */
  1809. val = 255;
  1810. else
  1811. val = (255 - val) * 32 / val;
  1812. }
  1813. f71882fg_write8(data, F71882FG_REG_POINT_PWM(pwm, point), val);
  1814. data->pwm_auto_point_pwm[pwm][point] = val;
  1815. mutex_unlock(&data->update_lock);
  1816. return count;
  1817. }
  1818. static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
  1819. struct device_attribute *devattr,
  1820. char *buf)
  1821. {
  1822. int result = 0;
  1823. struct f71882fg_data *data = f71882fg_update_device(dev);
  1824. int nr = to_sensor_dev_attr_2(devattr)->index;
  1825. int point = to_sensor_dev_attr_2(devattr)->nr;
  1826. mutex_lock(&data->update_lock);
  1827. if (nr & 1)
  1828. result = data->pwm_auto_point_hyst[nr / 2] >> 4;
  1829. else
  1830. result = data->pwm_auto_point_hyst[nr / 2] & 0x0f;
  1831. result = 1000 * (data->pwm_auto_point_temp[nr][point] - result);
  1832. mutex_unlock(&data->update_lock);
  1833. return sprintf(buf, "%d\n", result);
  1834. }
  1835. static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
  1836. struct device_attribute *devattr,
  1837. const char *buf, size_t count)
  1838. {
  1839. struct f71882fg_data *data = dev_get_drvdata(dev);
  1840. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1841. int point = to_sensor_dev_attr_2(devattr)->nr;
  1842. u8 reg;
  1843. long val;
  1844. err = kstrtol(buf, 10, &val);
  1845. if (err)
  1846. return err;
  1847. val /= 1000;
  1848. mutex_lock(&data->update_lock);
  1849. data->pwm_auto_point_temp[nr][point] =
  1850. f71882fg_read8(data, F71882FG_REG_POINT_TEMP(nr, point));
  1851. val = clamp_val(val, data->pwm_auto_point_temp[nr][point] - 15,
  1852. data->pwm_auto_point_temp[nr][point]);
  1853. val = data->pwm_auto_point_temp[nr][point] - val;
  1854. reg = f71882fg_read8(data, F71882FG_REG_FAN_HYST(nr / 2));
  1855. if (nr & 1)
  1856. reg = (reg & 0x0f) | (val << 4);
  1857. else
  1858. reg = (reg & 0xf0) | val;
  1859. f71882fg_write8(data, F71882FG_REG_FAN_HYST(nr / 2), reg);
  1860. data->pwm_auto_point_hyst[nr / 2] = reg;
  1861. mutex_unlock(&data->update_lock);
  1862. return count;
  1863. }
  1864. static ssize_t show_pwm_interpolate(struct device *dev,
  1865. struct device_attribute *devattr, char *buf)
  1866. {
  1867. int result;
  1868. struct f71882fg_data *data = f71882fg_update_device(dev);
  1869. int nr = to_sensor_dev_attr_2(devattr)->index;
  1870. result = (data->pwm_auto_point_mapping[nr] >> 4) & 1;
  1871. return sprintf(buf, "%d\n", result);
  1872. }
  1873. static ssize_t store_pwm_interpolate(struct device *dev,
  1874. struct device_attribute *devattr,
  1875. const char *buf, size_t count)
  1876. {
  1877. struct f71882fg_data *data = dev_get_drvdata(dev);
  1878. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1879. unsigned long val;
  1880. err = kstrtoul(buf, 10, &val);
  1881. if (err)
  1882. return err;
  1883. mutex_lock(&data->update_lock);
  1884. data->pwm_auto_point_mapping[nr] =
  1885. f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
  1886. if (val)
  1887. val = data->pwm_auto_point_mapping[nr] | (1 << 4);
  1888. else
  1889. val = data->pwm_auto_point_mapping[nr] & (~(1 << 4));
  1890. f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
  1891. data->pwm_auto_point_mapping[nr] = val;
  1892. mutex_unlock(&data->update_lock);
  1893. return count;
  1894. }
  1895. static ssize_t show_pwm_auto_point_channel(struct device *dev,
  1896. struct device_attribute *devattr,
  1897. char *buf)
  1898. {
  1899. int result;
  1900. struct f71882fg_data *data = f71882fg_update_device(dev);
  1901. int nr = to_sensor_dev_attr_2(devattr)->index;
  1902. result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) -
  1903. data->temp_start);
  1904. return sprintf(buf, "%d\n", result);
  1905. }
  1906. static ssize_t store_pwm_auto_point_channel(struct device *dev,
  1907. struct device_attribute *devattr,
  1908. const char *buf, size_t count)
  1909. {
  1910. struct f71882fg_data *data = dev_get_drvdata(dev);
  1911. int err, nr = to_sensor_dev_attr_2(devattr)->index;
  1912. long val;
  1913. err = kstrtol(buf, 10, &val);
  1914. if (err)
  1915. return err;
  1916. switch (val) {
  1917. case 1:
  1918. val = 0;
  1919. break;
  1920. case 2:
  1921. val = 1;
  1922. break;
  1923. case 4:
  1924. val = 2;
  1925. break;
  1926. default:
  1927. return -EINVAL;
  1928. }
  1929. val += data->temp_start;
  1930. mutex_lock(&data->update_lock);
  1931. data->pwm_auto_point_mapping[nr] =
  1932. f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
  1933. val = (data->pwm_auto_point_mapping[nr] & 0xfc) | val;
  1934. f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
  1935. data->pwm_auto_point_mapping[nr] = val;
  1936. mutex_unlock(&data->update_lock);
  1937. return count;
  1938. }
  1939. static ssize_t show_pwm_auto_point_temp(struct device *dev,
  1940. struct device_attribute *devattr,
  1941. char *buf)
  1942. {
  1943. int result;
  1944. struct f71882fg_data *data = f71882fg_update_device(dev);
  1945. int pwm = to_sensor_dev_attr_2(devattr)->index;
  1946. int point = to_sensor_dev_attr_2(devattr)->nr;
  1947. result = data->pwm_auto_point_temp[pwm][point];
  1948. return sprintf(buf, "%d\n", 1000 * result);
  1949. }
  1950. static ssize_t store_pwm_auto_point_temp(struct device *dev,
  1951. struct device_attribute *devattr,
  1952. const char *buf, size_t count)
  1953. {
  1954. struct f71882fg_data *data = dev_get_drvdata(dev);
  1955. int err, pwm = to_sensor_dev_attr_2(devattr)->index;
  1956. int point = to_sensor_dev_attr_2(devattr)->nr;
  1957. long val;
  1958. err = kstrtol(buf, 10, &val);
  1959. if (err)
  1960. return err;
  1961. val /= 1000;
  1962. if (data->auto_point_temp_signed)
  1963. val = clamp_val(val, -128, 127);
  1964. else
  1965. val = clamp_val(val, 0, 127);
  1966. mutex_lock(&data->update_lock);
  1967. f71882fg_write8(data, F71882FG_REG_POINT_TEMP(pwm, point), val);
  1968. data->pwm_auto_point_temp[pwm][point] = val;
  1969. mutex_unlock(&data->update_lock);
  1970. return count;
  1971. }
  1972. static ssize_t name_show(struct device *dev, struct device_attribute *devattr,
  1973. char *buf)
  1974. {
  1975. struct f71882fg_data *data = dev_get_drvdata(dev);
  1976. return sprintf(buf, "%s\n", f71882fg_names[data->type]);
  1977. }
  1978. static int f71882fg_create_sysfs_files(struct platform_device *pdev,
  1979. struct sensor_device_attribute_2 *attr, int count)
  1980. {
  1981. int err, i;
  1982. for (i = 0; i < count; i++) {
  1983. err = device_create_file(&pdev->dev, &attr[i].dev_attr);
  1984. if (err)
  1985. return err;
  1986. }
  1987. return 0;
  1988. }
  1989. static void f71882fg_remove_sysfs_files(struct platform_device *pdev,
  1990. struct sensor_device_attribute_2 *attr, int count)
  1991. {
  1992. int i;
  1993. for (i = 0; i < count; i++)
  1994. device_remove_file(&pdev->dev, &attr[i].dev_attr);
  1995. }
  1996. static int f71882fg_create_fan_sysfs_files(
  1997. struct platform_device *pdev, int idx)
  1998. {
  1999. struct f71882fg_data *data = platform_get_drvdata(pdev);
  2000. int err;
  2001. /* Sanity check the pwm setting */
  2002. err = 0;
  2003. switch (data->type) {
  2004. case f71858fg:
  2005. if (((data->pwm_enable >> (idx * 2)) & 3) == 3)
  2006. err = 1;
  2007. break;
  2008. case f71862fg:
  2009. if (((data->pwm_enable >> (idx * 2)) & 1) != 1)
  2010. err = 1;
  2011. break;
  2012. case f8000:
  2013. if (idx == 2)
  2014. err = data->pwm_enable & 0x20;
  2015. break;
  2016. default:
  2017. break;
  2018. }
  2019. if (err) {
  2020. dev_err(&pdev->dev,
  2021. "Invalid (reserved) pwm settings: 0x%02x, "
  2022. "skipping fan %d\n",
  2023. (data->pwm_enable >> (idx * 2)) & 3, idx + 1);
  2024. return 0; /* This is a non fatal condition */
  2025. }
  2026. err = f71882fg_create_sysfs_files(pdev, &fxxxx_fan_attr[idx][0],
  2027. ARRAY_SIZE(fxxxx_fan_attr[0]));
  2028. if (err)
  2029. return err;
  2030. if (f71882fg_fan_has_beep[data->type]) {
  2031. err = f71882fg_create_sysfs_files(pdev,
  2032. &fxxxx_fan_beep_attr[idx],
  2033. 1);
  2034. if (err)
  2035. return err;
  2036. }
  2037. dev_info(&pdev->dev, "Fan: %d is in %s mode\n", idx + 1,
  2038. (data->pwm_enable & (1 << (2 * idx))) ? "duty-cycle" : "RPM");
  2039. /* Check for unsupported auto pwm settings */
  2040. switch (data->type) {
  2041. case f71808e:
  2042. case f71808a:
  2043. case f71869:
  2044. case f71869a:
  2045. case f71889fg:
  2046. case f71889ed:
  2047. case f71889a:
  2048. data->pwm_auto_point_mapping[idx] =
  2049. f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(idx));
  2050. if ((data->pwm_auto_point_mapping[idx] & 0x80) ||
  2051. (data->pwm_auto_point_mapping[idx] & 3) == 0) {
  2052. dev_warn(&pdev->dev,
  2053. "Auto pwm controlled by raw digital "
  2054. "data, disabling pwm auto_point "
  2055. "sysfs attributes for fan %d\n", idx + 1);
  2056. return 0; /* This is a non fatal condition */
  2057. }
  2058. break;
  2059. default:
  2060. break;
  2061. }
  2062. switch (data->type) {
  2063. case f71862fg:
  2064. err = f71882fg_create_sysfs_files(pdev,
  2065. &f71862fg_auto_pwm_attr[idx][0],
  2066. ARRAY_SIZE(f71862fg_auto_pwm_attr[0]));
  2067. break;
  2068. case f71808e:
  2069. case f71869:
  2070. err = f71882fg_create_sysfs_files(pdev,
  2071. &f71869_auto_pwm_attr[idx][0],
  2072. ARRAY_SIZE(f71869_auto_pwm_attr[0]));
  2073. break;
  2074. case f8000:
  2075. err = f71882fg_create_sysfs_files(pdev,
  2076. &f8000_auto_pwm_attr[idx][0],
  2077. ARRAY_SIZE(f8000_auto_pwm_attr[0]));
  2078. break;
  2079. default:
  2080. err = f71882fg_create_sysfs_files(pdev,
  2081. &fxxxx_auto_pwm_attr[idx][0],
  2082. ARRAY_SIZE(fxxxx_auto_pwm_attr[0]));
  2083. }
  2084. return err;
  2085. }
  2086. static int f71882fg_probe(struct platform_device *pdev)
  2087. {
  2088. struct f71882fg_data *data;
  2089. struct f71882fg_sio_data *sio_data = dev_get_platdata(&pdev->dev);
  2090. int nr_fans = f71882fg_nr_fans[sio_data->type];
  2091. int nr_temps = f71882fg_nr_temps[sio_data->type];
  2092. int err, i;
  2093. int size;
  2094. u8 start_reg, reg;
  2095. data = devm_kzalloc(&pdev->dev, sizeof(struct f71882fg_data),
  2096. GFP_KERNEL);
  2097. if (!data)
  2098. return -ENOMEM;
  2099. data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start;
  2100. data->type = sio_data->type;
  2101. data->temp_start =
  2102. (data->type == f71858fg || data->type == f8000 ||
  2103. data->type == f81866a) ? 0 : 1;
  2104. mutex_init(&data->update_lock);
  2105. platform_set_drvdata(pdev, data);
  2106. start_reg = f71882fg_read8(data, F71882FG_REG_START);
  2107. if (start_reg & 0x04) {
  2108. dev_warn(&pdev->dev, "Hardware monitor is powered down\n");
  2109. return -ENODEV;
  2110. }
  2111. if (!(start_reg & 0x03)) {
  2112. dev_warn(&pdev->dev, "Hardware monitoring not activated\n");
  2113. return -ENODEV;
  2114. }
  2115. /* Register sysfs interface files */
  2116. err = device_create_file(&pdev->dev, &dev_attr_name);
  2117. if (err)
  2118. goto exit_unregister_sysfs;
  2119. if (start_reg & 0x01) {
  2120. switch (data->type) {
  2121. case f71858fg:
  2122. data->temp_config =
  2123. f71882fg_read8(data, F71882FG_REG_TEMP_CONFIG);
  2124. if (data->temp_config & 0x10)
  2125. /*
  2126. * The f71858fg temperature alarms behave as
  2127. * the f8000 alarms in this mode
  2128. */
  2129. err = f71882fg_create_sysfs_files(pdev,
  2130. f8000_temp_attr,
  2131. ARRAY_SIZE(f8000_temp_attr));
  2132. else
  2133. err = f71882fg_create_sysfs_files(pdev,
  2134. f71858fg_temp_attr,
  2135. ARRAY_SIZE(f71858fg_temp_attr));
  2136. break;
  2137. case f8000:
  2138. err = f71882fg_create_sysfs_files(pdev,
  2139. f8000_temp_attr,
  2140. ARRAY_SIZE(f8000_temp_attr));
  2141. break;
  2142. case f81866a:
  2143. err = f71882fg_create_sysfs_files(pdev,
  2144. f71858fg_temp_attr,
  2145. ARRAY_SIZE(f71858fg_temp_attr));
  2146. break;
  2147. default:
  2148. err = f71882fg_create_sysfs_files(pdev,
  2149. &fxxxx_temp_attr[0][0],
  2150. ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
  2151. }
  2152. if (err)
  2153. goto exit_unregister_sysfs;
  2154. if (f71882fg_temp_has_beep[data->type]) {
  2155. if (data->type == f81866a) {
  2156. size = ARRAY_SIZE(f81866_temp_beep_attr[0]);
  2157. err = f71882fg_create_sysfs_files(pdev,
  2158. &f81866_temp_beep_attr[0][0],
  2159. size * nr_temps);
  2160. } else {
  2161. size = ARRAY_SIZE(fxxxx_temp_beep_attr[0]);
  2162. err = f71882fg_create_sysfs_files(pdev,
  2163. &fxxxx_temp_beep_attr[0][0],
  2164. size * nr_temps);
  2165. }
  2166. if (err)
  2167. goto exit_unregister_sysfs;
  2168. }
  2169. for (i = 0; i < F71882FG_MAX_INS; i++) {
  2170. if (f71882fg_has_in[data->type][i]) {
  2171. err = device_create_file(&pdev->dev,
  2172. &fxxxx_in_attr[i].dev_attr);
  2173. if (err)
  2174. goto exit_unregister_sysfs;
  2175. }
  2176. }
  2177. if (f71882fg_has_in1_alarm[data->type]) {
  2178. err = f71882fg_create_sysfs_files(pdev,
  2179. fxxxx_in1_alarm_attr,
  2180. ARRAY_SIZE(fxxxx_in1_alarm_attr));
  2181. if (err)
  2182. goto exit_unregister_sysfs;
  2183. }
  2184. }
  2185. if (start_reg & 0x02) {
  2186. switch (data->type) {
  2187. case f71808e:
  2188. case f71808a:
  2189. case f71869:
  2190. case f71869a:
  2191. /* These always have signed auto point temps */
  2192. data->auto_point_temp_signed = 1;
  2193. /* Fall through - to select correct fan/pwm reg bank! */
  2194. case f71889fg:
  2195. case f71889ed:
  2196. case f71889a:
  2197. reg = f71882fg_read8(data, F71882FG_REG_FAN_FAULT_T);
  2198. if (reg & F71882FG_FAN_NEG_TEMP_EN)
  2199. data->auto_point_temp_signed = 1;
  2200. /* Ensure banked pwm registers point to right bank */
  2201. reg &= ~F71882FG_FAN_PROG_SEL;
  2202. f71882fg_write8(data, F71882FG_REG_FAN_FAULT_T, reg);
  2203. break;
  2204. default:
  2205. break;
  2206. }
  2207. data->pwm_enable =
  2208. f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
  2209. for (i = 0; i < nr_fans; i++) {
  2210. err = f71882fg_create_fan_sysfs_files(pdev, i);
  2211. if (err)
  2212. goto exit_unregister_sysfs;
  2213. }
  2214. /* Some types have 1 extra fan with limited functionality */
  2215. switch (data->type) {
  2216. case f71808a:
  2217. err = f71882fg_create_sysfs_files(pdev,
  2218. f71808a_fan3_attr,
  2219. ARRAY_SIZE(f71808a_fan3_attr));
  2220. break;
  2221. case f8000:
  2222. err = f71882fg_create_sysfs_files(pdev,
  2223. f8000_fan_attr,
  2224. ARRAY_SIZE(f8000_fan_attr));
  2225. break;
  2226. default:
  2227. break;
  2228. }
  2229. if (err)
  2230. goto exit_unregister_sysfs;
  2231. }
  2232. data->hwmon_dev = hwmon_device_register(&pdev->dev);
  2233. if (IS_ERR(data->hwmon_dev)) {
  2234. err = PTR_ERR(data->hwmon_dev);
  2235. data->hwmon_dev = NULL;
  2236. goto exit_unregister_sysfs;
  2237. }
  2238. return 0;
  2239. exit_unregister_sysfs:
  2240. f71882fg_remove(pdev); /* Will unregister the sysfs files for us */
  2241. return err; /* f71882fg_remove() also frees our data */
  2242. }
  2243. static int f71882fg_remove(struct platform_device *pdev)
  2244. {
  2245. struct f71882fg_data *data = platform_get_drvdata(pdev);
  2246. int nr_fans = f71882fg_nr_fans[data->type];
  2247. int nr_temps = f71882fg_nr_temps[data->type];
  2248. int i;
  2249. u8 start_reg = f71882fg_read8(data, F71882FG_REG_START);
  2250. if (data->hwmon_dev)
  2251. hwmon_device_unregister(data->hwmon_dev);
  2252. device_remove_file(&pdev->dev, &dev_attr_name);
  2253. if (start_reg & 0x01) {
  2254. switch (data->type) {
  2255. case f71858fg:
  2256. if (data->temp_config & 0x10)
  2257. f71882fg_remove_sysfs_files(pdev,
  2258. f8000_temp_attr,
  2259. ARRAY_SIZE(f8000_temp_attr));
  2260. else
  2261. f71882fg_remove_sysfs_files(pdev,
  2262. f71858fg_temp_attr,
  2263. ARRAY_SIZE(f71858fg_temp_attr));
  2264. break;
  2265. case f8000:
  2266. f71882fg_remove_sysfs_files(pdev,
  2267. f8000_temp_attr,
  2268. ARRAY_SIZE(f8000_temp_attr));
  2269. break;
  2270. case f81866a:
  2271. f71882fg_remove_sysfs_files(pdev,
  2272. f71858fg_temp_attr,
  2273. ARRAY_SIZE(f71858fg_temp_attr));
  2274. break;
  2275. default:
  2276. f71882fg_remove_sysfs_files(pdev,
  2277. &fxxxx_temp_attr[0][0],
  2278. ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
  2279. }
  2280. if (f71882fg_temp_has_beep[data->type]) {
  2281. if (data->type == f81866a)
  2282. f71882fg_remove_sysfs_files(pdev,
  2283. &f81866_temp_beep_attr[0][0],
  2284. ARRAY_SIZE(f81866_temp_beep_attr[0])
  2285. * nr_temps);
  2286. else
  2287. f71882fg_remove_sysfs_files(pdev,
  2288. &fxxxx_temp_beep_attr[0][0],
  2289. ARRAY_SIZE(fxxxx_temp_beep_attr[0])
  2290. * nr_temps);
  2291. }
  2292. for (i = 0; i < F71882FG_MAX_INS; i++) {
  2293. if (f71882fg_has_in[data->type][i]) {
  2294. device_remove_file(&pdev->dev,
  2295. &fxxxx_in_attr[i].dev_attr);
  2296. }
  2297. }
  2298. if (f71882fg_has_in1_alarm[data->type]) {
  2299. f71882fg_remove_sysfs_files(pdev,
  2300. fxxxx_in1_alarm_attr,
  2301. ARRAY_SIZE(fxxxx_in1_alarm_attr));
  2302. }
  2303. }
  2304. if (start_reg & 0x02) {
  2305. f71882fg_remove_sysfs_files(pdev, &fxxxx_fan_attr[0][0],
  2306. ARRAY_SIZE(fxxxx_fan_attr[0]) * nr_fans);
  2307. if (f71882fg_fan_has_beep[data->type]) {
  2308. f71882fg_remove_sysfs_files(pdev,
  2309. fxxxx_fan_beep_attr, nr_fans);
  2310. }
  2311. switch (data->type) {
  2312. case f71808a:
  2313. f71882fg_remove_sysfs_files(pdev,
  2314. &fxxxx_auto_pwm_attr[0][0],
  2315. ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
  2316. f71882fg_remove_sysfs_files(pdev,
  2317. f71808a_fan3_attr,
  2318. ARRAY_SIZE(f71808a_fan3_attr));
  2319. break;
  2320. case f71862fg:
  2321. f71882fg_remove_sysfs_files(pdev,
  2322. &f71862fg_auto_pwm_attr[0][0],
  2323. ARRAY_SIZE(f71862fg_auto_pwm_attr[0]) *
  2324. nr_fans);
  2325. break;
  2326. case f71808e:
  2327. case f71869:
  2328. f71882fg_remove_sysfs_files(pdev,
  2329. &f71869_auto_pwm_attr[0][0],
  2330. ARRAY_SIZE(f71869_auto_pwm_attr[0]) * nr_fans);
  2331. break;
  2332. case f8000:
  2333. f71882fg_remove_sysfs_files(pdev,
  2334. f8000_fan_attr,
  2335. ARRAY_SIZE(f8000_fan_attr));
  2336. f71882fg_remove_sysfs_files(pdev,
  2337. &f8000_auto_pwm_attr[0][0],
  2338. ARRAY_SIZE(f8000_auto_pwm_attr[0]) * nr_fans);
  2339. break;
  2340. default:
  2341. f71882fg_remove_sysfs_files(pdev,
  2342. &fxxxx_auto_pwm_attr[0][0],
  2343. ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
  2344. }
  2345. }
  2346. return 0;
  2347. }
  2348. static int __init f71882fg_find(int sioaddr, struct f71882fg_sio_data *sio_data)
  2349. {
  2350. u16 devid;
  2351. unsigned short address;
  2352. int err = superio_enter(sioaddr);
  2353. if (err)
  2354. return err;
  2355. devid = superio_inw(sioaddr, SIO_REG_MANID);
  2356. if (devid != SIO_FINTEK_ID) {
  2357. pr_debug("Not a Fintek device\n");
  2358. err = -ENODEV;
  2359. goto exit;
  2360. }
  2361. devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
  2362. switch (devid) {
  2363. case SIO_F71808E_ID:
  2364. sio_data->type = f71808e;
  2365. break;
  2366. case SIO_F71808A_ID:
  2367. sio_data->type = f71808a;
  2368. break;
  2369. case SIO_F71858_ID:
  2370. sio_data->type = f71858fg;
  2371. break;
  2372. case SIO_F71862_ID:
  2373. sio_data->type = f71862fg;
  2374. break;
  2375. case SIO_F71868_ID:
  2376. sio_data->type = f71868a;
  2377. break;
  2378. case SIO_F71869_ID:
  2379. sio_data->type = f71869;
  2380. break;
  2381. case SIO_F71869A_ID:
  2382. sio_data->type = f71869a;
  2383. break;
  2384. case SIO_F71882_ID:
  2385. sio_data->type = f71882fg;
  2386. break;
  2387. case SIO_F71889_ID:
  2388. sio_data->type = f71889fg;
  2389. break;
  2390. case SIO_F71889E_ID:
  2391. sio_data->type = f71889ed;
  2392. break;
  2393. case SIO_F71889A_ID:
  2394. sio_data->type = f71889a;
  2395. break;
  2396. case SIO_F8000_ID:
  2397. sio_data->type = f8000;
  2398. break;
  2399. case SIO_F81768D_ID:
  2400. sio_data->type = f81768d;
  2401. break;
  2402. case SIO_F81865_ID:
  2403. sio_data->type = f81865f;
  2404. break;
  2405. case SIO_F81866_ID:
  2406. sio_data->type = f81866a;
  2407. break;
  2408. default:
  2409. pr_info("Unsupported Fintek device: %04x\n",
  2410. (unsigned int)devid);
  2411. err = -ENODEV;
  2412. goto exit;
  2413. }
  2414. if (sio_data->type == f71858fg)
  2415. superio_select(sioaddr, SIO_F71858FG_LD_HWM);
  2416. else
  2417. superio_select(sioaddr, SIO_F71882FG_LD_HWM);
  2418. if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
  2419. pr_warn("Device not activated\n");
  2420. err = -ENODEV;
  2421. goto exit;
  2422. }
  2423. address = superio_inw(sioaddr, SIO_REG_ADDR);
  2424. if (address == 0) {
  2425. pr_warn("Base address not set\n");
  2426. err = -ENODEV;
  2427. goto exit;
  2428. }
  2429. address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
  2430. err = address;
  2431. pr_info("Found %s chip at %#x, revision %d\n",
  2432. f71882fg_names[sio_data->type], (unsigned int)address,
  2433. (int)superio_inb(sioaddr, SIO_REG_DEVREV));
  2434. exit:
  2435. superio_exit(sioaddr);
  2436. return err;
  2437. }
  2438. static int __init f71882fg_device_add(int address,
  2439. const struct f71882fg_sio_data *sio_data)
  2440. {
  2441. struct resource res = {
  2442. .start = address,
  2443. .end = address + REGION_LENGTH - 1,
  2444. .flags = IORESOURCE_IO,
  2445. };
  2446. int err;
  2447. f71882fg_pdev = platform_device_alloc(DRVNAME, address);
  2448. if (!f71882fg_pdev)
  2449. return -ENOMEM;
  2450. res.name = f71882fg_pdev->name;
  2451. err = acpi_check_resource_conflict(&res);
  2452. if (err)
  2453. goto exit_device_put;
  2454. err = platform_device_add_resources(f71882fg_pdev, &res, 1);
  2455. if (err) {
  2456. pr_err("Device resource addition failed\n");
  2457. goto exit_device_put;
  2458. }
  2459. err = platform_device_add_data(f71882fg_pdev, sio_data,
  2460. sizeof(struct f71882fg_sio_data));
  2461. if (err) {
  2462. pr_err("Platform data allocation failed\n");
  2463. goto exit_device_put;
  2464. }
  2465. err = platform_device_add(f71882fg_pdev);
  2466. if (err) {
  2467. pr_err("Device addition failed\n");
  2468. goto exit_device_put;
  2469. }
  2470. return 0;
  2471. exit_device_put:
  2472. platform_device_put(f71882fg_pdev);
  2473. return err;
  2474. }
  2475. static int __init f71882fg_init(void)
  2476. {
  2477. int err;
  2478. int address;
  2479. struct f71882fg_sio_data sio_data;
  2480. memset(&sio_data, 0, sizeof(sio_data));
  2481. address = f71882fg_find(0x2e, &sio_data);
  2482. if (address < 0)
  2483. address = f71882fg_find(0x4e, &sio_data);
  2484. if (address < 0)
  2485. return address;
  2486. err = platform_driver_register(&f71882fg_driver);
  2487. if (err)
  2488. return err;
  2489. err = f71882fg_device_add(address, &sio_data);
  2490. if (err)
  2491. goto exit_driver;
  2492. return 0;
  2493. exit_driver:
  2494. platform_driver_unregister(&f71882fg_driver);
  2495. return err;
  2496. }
  2497. static void __exit f71882fg_exit(void)
  2498. {
  2499. platform_device_unregister(f71882fg_pdev);
  2500. platform_driver_unregister(&f71882fg_driver);
  2501. }
  2502. MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver");
  2503. MODULE_AUTHOR("Hans Edgington, Hans de Goede <hdegoede@redhat.com>");
  2504. MODULE_LICENSE("GPL");
  2505. module_init(f71882fg_init);
  2506. module_exit(f71882fg_exit);