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  3. <title>DesignWare USB 2.0 OTG Controller (DWC_otg) Device Driver: dwc_otg_hcd_intr.c Source File</title>
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  20. <h1>dwc_otg_hcd_intr.c</h1><a href="dwc__otg__hcd__intr_8c.html">Go to the documentation of this file.</a><div class="fragment"><pre class="fragment"><a name="l00001"></a>00001 <span class="comment">/* ==========================================================================</span>
    21. 

  21. <a name="l00002"></a>00002 <span class="comment"> * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd_intr.c $</span>
    22. 

  22. <a name="l00003"></a>00003 <span class="comment"> * $Revision: #77 $</span>
    23. 

  23. <a name="l00004"></a>00004 <span class="comment"> * $Date: 2009/04/21 $</span>
    24. 

  24. <a name="l00005"></a>00005 <span class="comment"> * $Change: 1237475 $</span>
    25. 

  25. <a name="l00006"></a>00006 <span class="comment"> *</span>
    26. 

  26. <a name="l00007"></a>00007 <span class="comment"> * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,</span>
    27. 

  27. <a name="l00008"></a>00008 <span class="comment"> * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless</span>
    28. 

  28. <a name="l00009"></a>00009 <span class="comment"> * otherwise expressly agreed to in writing between Synopsys and you.</span>
    29. 

  29. <a name="l00010"></a>00010 <span class="comment"> *</span>
    30. 

  30. <a name="l00011"></a>00011 <span class="comment"> * The Software IS NOT an item of Licensed Software or Licensed Product under</span>
    31. 

  31. <a name="l00012"></a>00012 <span class="comment"> * any End User Software License Agreement or Agreement for Licensed Product</span>
    32. 

  32. <a name="l00013"></a>00013 <span class="comment"> * with Synopsys or any supplement thereto. You are permitted to use and</span>
    33. 

  33. <a name="l00014"></a>00014 <span class="comment"> * redistribute this Software in source and binary forms, with or without</span>
    34. 

  34. <a name="l00015"></a>00015 <span class="comment"> * modification, provided that redistributions of source code must retain this</span>
    35. 

  35. <a name="l00016"></a>00016 <span class="comment"> * notice. You may not view, use, disclose, copy or distribute this file or</span>
    36. 

  36. <a name="l00017"></a>00017 <span class="comment"> * any information contained herein except pursuant to this license grant from</span>
    37. 

  37. <a name="l00018"></a>00018 <span class="comment"> * Synopsys. If you do not agree with this notice, including the disclaimer</span>
    38. 

  38. <a name="l00019"></a>00019 <span class="comment"> * below, then you are not authorized to use the Software.</span>
    39. 

  39. <a name="l00020"></a>00020 <span class="comment"> *</span>
    40. 

  40. <a name="l00021"></a>00021 <span class="comment"> * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS</span>
    41. 

  41. <a name="l00022"></a>00022 <span class="comment"> * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</span>
    42. 

  42. <a name="l00023"></a>00023 <span class="comment"> * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</span>
    43. 

  43. <a name="l00024"></a>00024 <span class="comment"> * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,</span>
    44. 

  44. <a name="l00025"></a>00025 <span class="comment"> * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</span>
    45. 

  45. <a name="l00026"></a>00026 <span class="comment"> * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR</span>
    46. 

  46. <a name="l00027"></a>00027 <span class="comment"> * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER</span>
    47. 

  47. <a name="l00028"></a>00028 <span class="comment"> * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT</span>
    48. 

  48. <a name="l00029"></a>00029 <span class="comment"> * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY</span>
    49. 

  49. <a name="l00030"></a>00030 <span class="comment"> * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH</span>
    50. 

  50. <a name="l00031"></a>00031 <span class="comment"> * DAMAGE.</span>
    51. 

  51. <a name="l00032"></a>00032 <span class="comment"> * ========================================================================== */</span>
    52. 

  52. <a name="l00033"></a>00033 <span class="preprocessor">#ifndef DWC_DEVICE_ONLY</span>
    53. 

  53. <a name="l00034"></a>00034 <span class="preprocessor"></span>
    54. 

  54. <a name="l00035"></a>00035 <span class="preprocessor">#include "<a class="code" href="dwc__otg__hcd_8h.html">dwc_otg_hcd.h</a>"</span>
    55. 

  55. <a name="l00036"></a>00036 <span class="preprocessor">#include "<a class="code" href="dwc__otg__regs_8h.html">dwc_otg_regs.h</a>"</span>
    56. 

  56. <a name="l00037"></a>00037 
    57. 

  57. <a name="l00043"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#b9dde24773f2741b9ff67e2d46760dc0">00043</a> int32_t <a class="code" href="dwc__otg__hcd_8h.html#b9dde24773f2741b9ff67e2d46760dc0">dwc_otg_hcd_handle_intr</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * <a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd</a>)
    58. 

  58. <a name="l00044"></a>00044 {
    59. 

  59. <a name="l00045"></a>00045         <span class="keywordtype">int</span> retval = 0;
    60. 

  60. <a name="l00046"></a>00046 
    61. 

  61. <a name="l00047"></a>00047         <a class="code" href="structdwc__otg__core__if.html">dwc_otg_core_if_t</a> *core_if = dwc_otg_hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>;
    62. 

  62. <a name="l00048"></a>00048         <a class="code" href="uniongintsts__data.html">gintsts_data_t</a> gintsts;
    63. 

  63. <a name="l00049"></a>00049 <span class="preprocessor">#ifdef DEBUG</span>
    64. 

  64. <a name="l00050"></a>00050 <span class="preprocessor"></span>        <a class="code" href="structdwc__otg__core__global__regs.html">dwc_otg_core_global_regs_t</a> *global_regs = core_if-&gt;<a class="code" href="structdwc__otg__core__if.html#909eae7e3b9432ca1e278b99f7811f52">core_global_regs</a>;
    65. 

  65. <a name="l00051"></a>00051 <span class="preprocessor">#endif</span>
    66. 

  66. <a name="l00052"></a>00052 <span class="preprocessor"></span>
    67. 

  67. <a name="l00053"></a>00053         <span class="comment">/* Check if HOST Mode */</span>
    68. 

  68. <a name="l00054"></a>00054         <span class="keywordflow">if</span> (<a class="code" href="dwc__otg__cil_8c.html#f0bfe5f933e21a94ea06c96ffc086e72">dwc_otg_is_host_mode</a>(core_if)) {
    69. 

  69. <a name="l00055"></a>00055                 gintsts.<a class="code" href="uniongintsts__data.html#379f34f5a95628b735e3a965f9cea12d">d32</a> = <a class="code" href="dwc__otg__cil_8h.html#639809e3c27026b8f956c2a133b1d433">dwc_otg_read_core_intr</a>(core_if);
    70. 

  70. <a name="l00056"></a>00056                 <span class="keywordflow">if</span> (!gintsts.<a class="code" href="uniongintsts__data.html#379f34f5a95628b735e3a965f9cea12d">d32</a>) {
    71. 

  71. <a name="l00057"></a>00057                         <span class="keywordflow">return</span> 0;
    72. 

  72. <a name="l00058"></a>00058                 }
    73. 

  73. <a name="l00059"></a>00059 <span class="preprocessor">#ifdef DEBUG</span>
    74. 

  74. <a name="l00060"></a>00060 <span class="preprocessor"></span>                <span class="comment">/* Don't print debug message in the interrupt handler on SOF */</span>
    75. 

  75. <a name="l00061"></a>00061 <span class="preprocessor">#ifndef DEBUG_SOF</span>
    76. 

  76. <a name="l00062"></a>00062 <span class="preprocessor"></span>                <span class="keywordflow">if</span> (gintsts.<a class="code" href="uniongintsts__data.html#379f34f5a95628b735e3a965f9cea12d">d32</a> != <a class="code" href="dwc__otg__regs_8h.html#8cd1d59e0700e5b528deebdea7a7ac76">DWC_SOF_INTR_MASK</a>)
    77. 

  77. <a name="l00063"></a>00063 <span class="preprocessor">#endif</span>
    78. 

  78. <a name="l00064"></a>00064 <span class="preprocessor"></span>                        <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#e4a050e176c1c4f556da2b276a8c2b37">DBG_HCD</a>, <span class="stringliteral">"\n"</span>);
    79. 

  79. <a name="l00065"></a>00065 <span class="preprocessor">#endif</span>
    80. 

  80. <a name="l00066"></a>00066 <span class="preprocessor"></span>
    81. 

  81. <a name="l00067"></a>00067 <span class="preprocessor">#ifdef DEBUG</span>
    82. 

  82. <a name="l00068"></a>00068 <span class="preprocessor"></span><span class="preprocessor">#ifndef DEBUG_SOF</span>
    83. 

  83. <a name="l00069"></a>00069 <span class="preprocessor"></span>                <span class="keywordflow">if</span> (gintsts.<a class="code" href="uniongintsts__data.html#379f34f5a95628b735e3a965f9cea12d">d32</a> != <a class="code" href="dwc__otg__regs_8h.html#8cd1d59e0700e5b528deebdea7a7ac76">DWC_SOF_INTR_MASK</a>)
    84. 

  84. <a name="l00070"></a>00070 <span class="preprocessor">#endif</span>
    85. 

  85. <a name="l00071"></a>00071 <span class="preprocessor"></span>                        <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(DBG_HCD,
    86. 

  86. <a name="l00072"></a>00072                                     <span class="stringliteral">"DWC OTG HCD Interrupt Detected gintsts&amp;gintmsk=0x%08x\n"</span>,
    87. 

  87. <a name="l00073"></a>00073                                     gintsts.<a class="code" href="uniongintsts__data.html#379f34f5a95628b735e3a965f9cea12d">d32</a>);
    88. 

  88. <a name="l00074"></a>00074 <span class="preprocessor">#endif</span>
    89. 

  89. <a name="l00075"></a>00075 <span class="preprocessor"></span>
    90. 

  90. <a name="l00076"></a>00076                 <span class="keywordflow">if</span> (gintsts.<a class="code" href="uniongintsts__data.html#781da5558468e5dbdc93ae95e4cb872e">b</a>.<a class="code" href="uniongintsts__data.html#3f6ba377d6b1449884bb4da1b155c61b">sofintr</a>) {
    91. 

  91. <a name="l00077"></a>00077                         retval |= <a class="code" href="dwc__otg__hcd_8h.html#0eea8527657802e9cf0a62a00bd44a1d">dwc_otg_hcd_handle_sof_intr</a>(dwc_otg_hcd);
    92. 

  92. <a name="l00078"></a>00078                 }
    93. 

  93. <a name="l00079"></a>00079                 <span class="keywordflow">if</span> (gintsts.<a class="code" href="uniongintsts__data.html#781da5558468e5dbdc93ae95e4cb872e">b</a>.<a class="code" href="uniongintsts__data.html#7595576956c3a0ced9ea387880943012">rxstsqlvl</a>) {
    94. 

  94. <a name="l00080"></a>00080                         retval |=
    95. 

  95. <a name="l00081"></a>00081                             <a class="code" href="dwc__otg__hcd_8h.html#9d979e33e04fc694a72242dec63aeb89">dwc_otg_hcd_handle_rx_status_q_level_intr</a>
    96. 

  96. <a name="l00082"></a>00082                             (dwc_otg_hcd);
    97. 

  97. <a name="l00083"></a>00083                 }
    98. 

  98. <a name="l00084"></a>00084                 <span class="keywordflow">if</span> (gintsts.<a class="code" href="uniongintsts__data.html#781da5558468e5dbdc93ae95e4cb872e">b</a>.<a class="code" href="uniongintsts__data.html#adebf5ff5bdf69a2bcf0bd4b2ba55ef4">nptxfempty</a>) {
    99. 

  99. <a name="l00085"></a>00085                         retval |=
    100. 

  100. <a name="l00086"></a>00086                             <a class="code" href="dwc__otg__hcd_8h.html#51c953aefbc2382adee9f585fdb26f35">dwc_otg_hcd_handle_np_tx_fifo_empty_intr</a>
    101. 

  101. <a name="l00087"></a>00087                             (dwc_otg_hcd);
    102. 

  102. <a name="l00088"></a>00088                 }
    103. 

  103. <a name="l00089"></a>00089                 <span class="keywordflow">if</span> (gintsts.<a class="code" href="uniongintsts__data.html#781da5558468e5dbdc93ae95e4cb872e">b</a>.<a class="code" href="uniongintsts__data.html#2e8bd51ad285fd46db48f9fb5bbb7993">i2cintr</a>) {
    104. 

  104. <a name="l00091"></a>00091                 }
    105. 

  105. <a name="l00092"></a>00092                 <span class="keywordflow">if</span> (gintsts.<a class="code" href="uniongintsts__data.html#781da5558468e5dbdc93ae95e4cb872e">b</a>.<a class="code" href="uniongintsts__data.html#7490e48c2c93d20c182f00161f18b8e5">portintr</a>) {
    106. 

  106. <a name="l00093"></a>00093                         retval |= <a class="code" href="dwc__otg__hcd_8h.html#18bb807c86935a45f5fe5940e5ded70c">dwc_otg_hcd_handle_port_intr</a>(dwc_otg_hcd);
    107. 

  107. <a name="l00094"></a>00094                 }
    108. 

  108. <a name="l00095"></a>00095                 <span class="keywordflow">if</span> (gintsts.<a class="code" href="uniongintsts__data.html#781da5558468e5dbdc93ae95e4cb872e">b</a>.<a class="code" href="uniongintsts__data.html#e02f1a50b20ed1c4248fd76e155147e8">hcintr</a>) {
    109. 

  109. <a name="l00096"></a>00096                         retval |= <a class="code" href="dwc__otg__hcd_8h.html#1f28e296c0bc4146da309385d95b5d7e">dwc_otg_hcd_handle_hc_intr</a>(dwc_otg_hcd);
    110. 

  110. <a name="l00097"></a>00097                 }
    111. 

  111. <a name="l00098"></a>00098                 <span class="keywordflow">if</span> (gintsts.<a class="code" href="uniongintsts__data.html#781da5558468e5dbdc93ae95e4cb872e">b</a>.<a class="code" href="uniongintsts__data.html#54ed752629e9b8916507beca28d76162">ptxfempty</a>) {
    112. 

  112. <a name="l00099"></a>00099                         retval |=
    113. 

  113. <a name="l00100"></a>00100                             <a class="code" href="dwc__otg__hcd_8h.html#dcfa21f80c7732df9aaf3db59a86eb1d">dwc_otg_hcd_handle_perio_tx_fifo_empty_intr</a>
    114. 

  114. <a name="l00101"></a>00101                             (dwc_otg_hcd);
    115. 

  115. <a name="l00102"></a>00102                 }
    116. 

  116. <a name="l00103"></a>00103 <span class="preprocessor">#ifdef DEBUG</span>
    117. 

  117. <a name="l00104"></a>00104 <span class="preprocessor"></span><span class="preprocessor">#ifndef DEBUG_SOF</span>
    118. 

  118. <a name="l00105"></a>00105 <span class="preprocessor"></span>                <span class="keywordflow">if</span> (gintsts.<a class="code" href="uniongintsts__data.html#379f34f5a95628b735e3a965f9cea12d">d32</a> != <a class="code" href="dwc__otg__regs_8h.html#8cd1d59e0700e5b528deebdea7a7ac76">DWC_SOF_INTR_MASK</a>)
    119. 

  119. <a name="l00106"></a>00106 <span class="preprocessor">#endif</span>
    120. 

  120. <a name="l00107"></a>00107 <span class="preprocessor"></span>                {
    121. 

  121. <a name="l00108"></a>00108                         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(DBG_HCD,
    122. 

  122. <a name="l00109"></a>00109                                     <span class="stringliteral">"DWC OTG HCD Finished Servicing Interrupts\n"</span>);
    123. 

  123. <a name="l00110"></a>00110                         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"DWC OTG HCD gintsts=0x%08x\n"</span>,
    124. 

  124. <a name="l00111"></a>00111                                     dwc_read_reg32(&amp;global_regs-&gt;<a class="code" href="structdwc__otg__core__global__regs.html#aa1d909e3b0a60a56bf612968ff09019">gintsts</a>));
    125. 

  125. <a name="l00112"></a>00112                         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"DWC OTG HCD gintmsk=0x%08x\n"</span>,
    126. 

  126. <a name="l00113"></a>00113                                     dwc_read_reg32(&amp;global_regs-&gt;<a class="code" href="structdwc__otg__core__global__regs.html#48827c76da2c6b18f369e2f2483cc4b6">gintmsk</a>));
    127. 

  127. <a name="l00114"></a>00114                 }
    128. 

  128. <a name="l00115"></a>00115 <span class="preprocessor">#endif</span>
    129. 

  129. <a name="l00116"></a>00116 <span class="preprocessor"></span>
    130. 

  130. <a name="l00117"></a>00117 <span class="preprocessor">#ifdef DEBUG</span>
    131. 

  131. <a name="l00118"></a>00118 <span class="preprocessor"></span><span class="preprocessor">#ifndef DEBUG_SOF</span>
    132. 

  132. <a name="l00119"></a>00119 <span class="preprocessor"></span>                <span class="keywordflow">if</span> (gintsts.<a class="code" href="uniongintsts__data.html#379f34f5a95628b735e3a965f9cea12d">d32</a> != <a class="code" href="dwc__otg__regs_8h.html#8cd1d59e0700e5b528deebdea7a7ac76">DWC_SOF_INTR_MASK</a>)
    133. 

  133. <a name="l00120"></a>00120 <span class="preprocessor">#endif</span>
    134. 

  134. <a name="l00121"></a>00121 <span class="preprocessor"></span>                        <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(DBG_HCD, <span class="stringliteral">"\n"</span>);
    135. 

  135. <a name="l00122"></a>00122 <span class="preprocessor">#endif</span>
    136. 

  136. <a name="l00123"></a>00123 <span class="preprocessor"></span>
    137. 

  137. <a name="l00124"></a>00124         }
    138. 

  138. <a name="l00125"></a>00125 
    139. 

  139. <a name="l00126"></a>00126         <span class="keywordflow">return</span> retval;
    140. 

  140. <a name="l00127"></a>00127 }
    141. 

  141. <a name="l00128"></a>00128 
    142. 

  142. <a name="l00129"></a>00129 <span class="preprocessor">#ifdef DWC_TRACK_MISSED_SOFS</span>
    143. 

  143. <a name="l00130"></a>00130 <span class="preprocessor"></span><span class="preprocessor">#warning Compiling code to track missed SOFs</span>
    144. 

  144. <a name="l00131"></a>00131 <span class="preprocessor"></span><span class="preprocessor">#define FRAME_NUM_ARRAY_SIZE 1000</span>
    145. 

  145. <a name="l00132"></a>00132 <span class="preprocessor"></span>
    146. 

  146. <a name="l00135"></a>00135 <span class="keyword">static</span> <span class="keyword">inline</span> <span class="keywordtype">void</span> track_missed_sofs(uint16_t curr_frame_number)
    147. 

  147. <a name="l00136"></a>00136 {
    148. 

  148. <a name="l00137"></a>00137         <span class="keyword">static</span> uint16_t frame_num_array[FRAME_NUM_ARRAY_SIZE];
    149. 

  149. <a name="l00138"></a>00138         <span class="keyword">static</span> uint16_t last_frame_num_array[FRAME_NUM_ARRAY_SIZE];
    150. 

  150. <a name="l00139"></a>00139         <span class="keyword">static</span> <span class="keywordtype">int</span> frame_num_idx = 0;
    151. 

  151. <a name="l00140"></a>00140         <span class="keyword">static</span> uint16_t last_frame_num = <a class="code" href="dwc__otg__regs_8h.html#4903938414e67044883b7df5582d6eed">DWC_HFNUM_MAX_FRNUM</a>;
    152. 

  152. <a name="l00141"></a>00141         <span class="keyword">static</span> <span class="keywordtype">int</span> dumped_frame_num_array = 0;
    153. 

  153. <a name="l00142"></a>00142 
    154. 

  154. <a name="l00143"></a>00143         <span class="keywordflow">if</span> (frame_num_idx &lt; FRAME_NUM_ARRAY_SIZE) {
    155. 

  155. <a name="l00144"></a>00144                 <span class="keywordflow">if</span> (((last_frame_num + 1) &amp; <a class="code" href="dwc__otg__regs_8h.html#4903938414e67044883b7df5582d6eed">DWC_HFNUM_MAX_FRNUM</a>) !=
    156. 

  156. <a name="l00145"></a>00145                     curr_frame_number) {
    157. 

  157. <a name="l00146"></a>00146                         frame_num_array[frame_num_idx] = curr_frame_number;
    158. 

  158. <a name="l00147"></a>00147                         last_frame_num_array[frame_num_idx++] = last_frame_num;
    159. 

  159. <a name="l00148"></a>00148                 }
    160. 

  160. <a name="l00149"></a>00149         } <span class="keywordflow">else</span> <span class="keywordflow">if</span> (!dumped_frame_num_array) {
    161. 

  161. <a name="l00150"></a>00150                 <span class="keywordtype">int</span> i;
    162. 

  162. <a name="l00151"></a>00151                 DWC_PRINTF(<span class="stringliteral">"Frame     Last Frame\n"</span>);
    163. 

  163. <a name="l00152"></a>00152                 DWC_PRINTF(<span class="stringliteral">"-----     ----------\n"</span>);
    164. 

  164. <a name="l00153"></a>00153                 <span class="keywordflow">for</span> (i = 0; i &lt; FRAME_NUM_ARRAY_SIZE; i++) {
    165. 

  165. <a name="l00154"></a>00154                         DWC_PRINTF(<span class="stringliteral">"0x%04x    0x%04x\n"</span>,
    166. 

  166. <a name="l00155"></a>00155                                    frame_num_array[i], last_frame_num_array[i]);
    167. 

  167. <a name="l00156"></a>00156                 }
    168. 

  168. <a name="l00157"></a>00157                 dumped_frame_num_array = 1;
    169. 

  169. <a name="l00158"></a>00158         }
    170. 

  170. <a name="l00159"></a>00159         last_frame_num = curr_frame_number;
    171. 

  171. <a name="l00160"></a>00160 }
    172. 

  172. <a name="l00161"></a>00161 <span class="preprocessor">#endif</span>
    173. 

  173. <a name="l00162"></a>00162 <span class="preprocessor"></span>
    174. 

  174. <a name="l00169"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#bbf5740390826d69bba80651ef9bd725">00169</a> int32_t <a class="code" href="dwc__otg__hcd_8h.html#0eea8527657802e9cf0a62a00bd44a1d">dwc_otg_hcd_handle_sof_intr</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * hcd)
    175. 

  175. <a name="l00170"></a>00170 {
    176. 

  176. <a name="l00171"></a>00171         <a class="code" href="unionhfnum__data.html">hfnum_data_t</a> hfnum;
    177. 

  177. <a name="l00172"></a>00172         dwc_list_link_t *qh_entry;
    178. 

  178. <a name="l00173"></a>00173         <a class="code" href="structdwc__otg__qh.html">dwc_otg_qh_t</a> *qh;
    179. 

  179. <a name="l00174"></a>00174         <a class="code" href="dwc__otg__hcd_8h.html#92c49783eebc5bcffa8b8a51c2127be9">dwc_otg_transaction_type_e</a> tr_type;
    180. 

  180. <a name="l00175"></a>00175         <a class="code" href="uniongintsts__data.html">gintsts_data_t</a> gintsts = {.d32 = 0 };
    181. 

  181. <a name="l00176"></a>00176 
    182. 

  182. <a name="l00177"></a>00177         hfnum.<a class="code" href="unionhfnum__data.html#e5ccbed3af86ac88577ded328e6c9932">d32</a> =
    183. 

  183. <a name="l00178"></a>00178             dwc_read_reg32(&amp;hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#51bac71891b5f6f435d7fc4582b974c1">host_if</a>-&gt;<a class="code" href="structdwc__otg__host__if.html#ff9692c2e10ca2bc7e24f981f25179c2">host_global_regs</a>-&gt;<a class="code" href="structdwc__otg__host__global__regs.html#cebb0d86d0776473ef30eeac61e8692c">hfnum</a>);
    184. 

  184. <a name="l00179"></a>00179 
    185. 

  185. <a name="l00180"></a>00180 <span class="preprocessor">#ifdef DEBUG_SOF</span>
    186. 

  186. <a name="l00181"></a>00181 <span class="preprocessor"></span>        <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#e4a050e176c1c4f556da2b276a8c2b37">DBG_HCD</a>, <span class="stringliteral">"--Start of Frame Interrupt--\n"</span>);
    187. 

  187. <a name="l00182"></a>00182 <span class="preprocessor">#endif</span>
    188. 

  188. <a name="l00183"></a>00183 <span class="preprocessor"></span>        hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#f79fefeb7908c0ddf702331253acb292">frame_number</a> = hfnum.<a class="code" href="unionhfnum__data.html#81df6fbd20a454665803eb5790855c66">b</a>.<a class="code" href="unionhfnum__data.html#a64e8b6c4a1cd262dbc30e158f3cb8bc">frnum</a>;
    189. 

  189. <a name="l00184"></a>00184 
    190. 

  190. <a name="l00185"></a>00185 <span class="preprocessor">#ifdef DEBUG</span>
    191. 

  191. <a name="l00186"></a>00186 <span class="preprocessor"></span>        hcd-&gt;frrem_accum += hfnum.<a class="code" href="unionhfnum__data.html#81df6fbd20a454665803eb5790855c66">b</a>.<a class="code" href="unionhfnum__data.html#2a2ce50ebd4c4da5347a2d93c4bbc996">frrem</a>;
    192. 

  192. <a name="l00187"></a>00187         hcd-&gt;frrem_samples++;
    193. 

  193. <a name="l00188"></a>00188 <span class="preprocessor">#endif</span>
    194. 

  194. <a name="l00189"></a>00189 <span class="preprocessor"></span>
    195. 

  195. <a name="l00190"></a>00190 <span class="preprocessor">#ifdef DWC_TRACK_MISSED_SOFS</span>
    196. 

  196. <a name="l00191"></a>00191 <span class="preprocessor"></span>        track_missed_sofs(hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#f79fefeb7908c0ddf702331253acb292">frame_number</a>);
    197. 

  197. <a name="l00192"></a>00192 <span class="preprocessor">#endif</span>
    198. 

  198. <a name="l00193"></a>00193 <span class="preprocessor"></span>        <span class="comment">/* Determine whether any periodic QHs should be executed. */</span>
    199. 

  199. <a name="l00194"></a>00194         qh_entry = DWC_LIST_FIRST(&amp;hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#2a747cacd6bdbacbef86d4157c34a312">periodic_sched_inactive</a>);
    200. 

  200. <a name="l00195"></a>00195         <span class="keywordflow">while</span> (qh_entry != &amp;hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#2a747cacd6bdbacbef86d4157c34a312">periodic_sched_inactive</a>) {
    201. 

  201. <a name="l00196"></a>00196                 qh = DWC_LIST_ENTRY(qh_entry, <a class="code" href="structdwc__otg__qh.html">dwc_otg_qh_t</a>, qh_list_entry);
    202. 

  202. <a name="l00197"></a>00197                 qh_entry = qh_entry-&gt;next;
    203. 

  203. <a name="l00198"></a>00198                 <span class="keywordflow">if</span> (<a class="code" href="dwc__otg__hcd_8h.html#02aa5e9853fcc705b9b5c839a249e2f8">dwc_frame_num_le</a>(qh-&gt;<a class="code" href="structdwc__otg__qh.html#977a8032f08e45a9e9bdcd558a6965d3">sched_frame</a>, hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#f79fefeb7908c0ddf702331253acb292">frame_number</a>)) {
    204. 

  204. <a name="l00199"></a>00199                         <span class="comment">/*</span>
    205. 

  205. <a name="l00200"></a>00200 <span class="comment">                         * Move QH to the ready list to be executed next</span>
    206. 

  206. <a name="l00201"></a>00201 <span class="comment">                         * (micro)frame.</span>
    207. 

  207. <a name="l00202"></a>00202 <span class="comment">                         */</span>
    208. 

  208. <a name="l00203"></a>00203                         DWC_LIST_MOVE_HEAD(&amp;hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#74b089e094911a558f7b5f24681d3242">periodic_sched_ready</a>,
    209. 

  209. <a name="l00204"></a>00204                                            &amp;qh-&gt;<a class="code" href="structdwc__otg__qh.html#3e1cb9863dc72139e1832c04244c25ff">qh_list_entry</a>);
    210. 

  210. <a name="l00205"></a>00205                 }
    211. 

  211. <a name="l00206"></a>00206         }
    212. 

  212. <a name="l00207"></a>00207         tr_type = <a class="code" href="dwc__otg__hcd_8c.html#96cc299f4f0478187ed7ba49b975ffc3">dwc_otg_hcd_select_transactions</a>(hcd);
    213. 

  213. <a name="l00208"></a>00208         <span class="keywordflow">if</span> (tr_type != DWC_OTG_TRANSACTION_NONE) {
    214. 

  214. <a name="l00209"></a>00209                 <a class="code" href="dwc__otg__hcd_8c.html#2f57bf2fc3013d63101f112702b913a0">dwc_otg_hcd_queue_transactions</a>(hcd, tr_type);
    215. 

  215. <a name="l00210"></a>00210         }
    216. 

  216. <a name="l00211"></a>00211 
    217. 

  217. <a name="l00212"></a>00212         <span class="comment">/* Clear interrupt */</span>
    218. 

  218. <a name="l00213"></a>00213         gintsts.<a class="code" href="uniongintsts__data.html#781da5558468e5dbdc93ae95e4cb872e">b</a>.<a class="code" href="uniongintsts__data.html#3f6ba377d6b1449884bb4da1b155c61b">sofintr</a> = 1;
    219. 

  219. <a name="l00214"></a>00214         dwc_write_reg32(&amp;hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#909eae7e3b9432ca1e278b99f7811f52">core_global_regs</a>-&gt;<a class="code" href="structdwc__otg__core__global__regs.html#aa1d909e3b0a60a56bf612968ff09019">gintsts</a>, gintsts.<a class="code" href="uniongintsts__data.html#379f34f5a95628b735e3a965f9cea12d">d32</a>);
    220. 

  220. <a name="l00215"></a>00215 
    221. 

  221. <a name="l00216"></a>00216         <span class="keywordflow">return</span> 1;
    222. 

  222. <a name="l00217"></a>00217 }
    223. 

  223. <a name="l00218"></a>00218 
    224. 

  224. <a name="l00222"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#9d979e33e04fc694a72242dec63aeb89">00222</a> int32_t <a class="code" href="dwc__otg__hcd_8h.html#9d979e33e04fc694a72242dec63aeb89">dwc_otg_hcd_handle_rx_status_q_level_intr</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * <a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd</a>)
    225. 

  225. <a name="l00223"></a>00223 {
    226. 

  226. <a name="l00224"></a>00224         <a class="code" href="unionhost__grxsts__data.html">host_grxsts_data_t</a> grxsts;
    227. 

  227. <a name="l00225"></a>00225         <a class="code" href="structdwc__hc.html">dwc_hc_t</a> *hc = NULL;
    228. 

  228. <a name="l00226"></a>00226 
    229. 

  229. <a name="l00227"></a>00227         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#e4a050e176c1c4f556da2b276a8c2b37">DBG_HCD</a>, <span class="stringliteral">"--RxStsQ Level Interrupt--\n"</span>);
    230. 

  230. <a name="l00228"></a>00228 
    231. 

  231. <a name="l00229"></a>00229         grxsts.<a class="code" href="unionhost__grxsts__data.html#993969735da9c3615652391aae76359a">d32</a> =
    232. 

  232. <a name="l00230"></a>00230             dwc_read_reg32(&amp;dwc_otg_hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#909eae7e3b9432ca1e278b99f7811f52">core_global_regs</a>-&gt;<a class="code" href="structdwc__otg__core__global__regs.html#763b05035799e1c16d34957fb62a2d17">grxstsp</a>);
    233. 

  233. <a name="l00231"></a>00231 
    234. 

  234. <a name="l00232"></a>00232         hc = dwc_otg_hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#cb393f6a676fb106e0e3d35396fb97f9">hc_ptr_array</a>[grxsts.<a class="code" href="unionhost__grxsts__data.html#9d67ba193008dd6afa7fe613c665238d">b</a>.<a class="code" href="unionhost__grxsts__data.html#684095394d11ec74a327f945c9e678bf">chnum</a>];
    235. 

  235. <a name="l00233"></a>00233 
    236. 

  236. <a name="l00234"></a>00234         <span class="comment">/* Packet Status */</span>
    237. 

  237. <a name="l00235"></a>00235         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"    Ch num = %d\n"</span>, grxsts.<a class="code" href="unionhost__grxsts__data.html#9d67ba193008dd6afa7fe613c665238d">b</a>.<a class="code" href="unionhost__grxsts__data.html#684095394d11ec74a327f945c9e678bf">chnum</a>);
    238. 

  238. <a name="l00236"></a>00236         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"    Count = %d\n"</span>, grxsts.<a class="code" href="unionhost__grxsts__data.html#9d67ba193008dd6afa7fe613c665238d">b</a>.<a class="code" href="unionhost__grxsts__data.html#026fd4d8ab68825fab038c083b8e9c60">bcnt</a>);
    239. 

  239. <a name="l00237"></a>00237         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"    DPID = %d, hc.dpid = %d\n"</span>, grxsts.<a class="code" href="unionhost__grxsts__data.html#9d67ba193008dd6afa7fe613c665238d">b</a>.<a class="code" href="unionhost__grxsts__data.html#5c4ca6a6c4a85064dd024095607a634d">dpid</a>,
    240. 

  240. <a name="l00238"></a>00238                     hc-&gt;<a class="code" href="structdwc__hc.html#513427c5e8c4603ba344d4e7f9191064">data_pid_start</a>);
    241. 

  241. <a name="l00239"></a>00239         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"    PStatus = %d\n"</span>, grxsts.<a class="code" href="unionhost__grxsts__data.html#9d67ba193008dd6afa7fe613c665238d">b</a>.<a class="code" href="unionhost__grxsts__data.html#6dc2553475a56a445c6e6f319feffac8">pktsts</a>);
    242. 

  242. <a name="l00240"></a>00240 
    243. 

  243. <a name="l00241"></a>00241         <span class="keywordflow">switch</span> (grxsts.<a class="code" href="unionhost__grxsts__data.html#9d67ba193008dd6afa7fe613c665238d">b</a>.<a class="code" href="unionhost__grxsts__data.html#6dc2553475a56a445c6e6f319feffac8">pktsts</a>) {
    244. 

  244. <a name="l00242"></a>00242         <span class="keywordflow">case</span> <a class="code" href="dwc__otg__regs_8h.html#d81c89ef7c3e40cfffe9ed08b7136e90">DWC_GRXSTS_PKTSTS_IN</a>:
    245. 

  245. <a name="l00243"></a>00243                 <span class="comment">/* Read the data into the host buffer. */</span>
    246. 

  246. <a name="l00244"></a>00244                 <span class="keywordflow">if</span> (grxsts.<a class="code" href="unionhost__grxsts__data.html#9d67ba193008dd6afa7fe613c665238d">b</a>.<a class="code" href="unionhost__grxsts__data.html#026fd4d8ab68825fab038c083b8e9c60">bcnt</a> &gt; 0) {
    247. 

  247. <a name="l00245"></a>00245                         <a class="code" href="dwc__otg__cil_8c.html#68f59dd23ccfffa9aa1dc590e99b7668">dwc_otg_read_packet</a>(dwc_otg_hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>,
    248. 

  248. <a name="l00246"></a>00246                                             hc-&gt;<a class="code" href="structdwc__hc.html#9dc781cb9e4bc639765beee37ce76673">xfer_buff</a>, grxsts.<a class="code" href="unionhost__grxsts__data.html#9d67ba193008dd6afa7fe613c665238d">b</a>.<a class="code" href="unionhost__grxsts__data.html#026fd4d8ab68825fab038c083b8e9c60">bcnt</a>);
    249. 

  249. <a name="l00247"></a>00247 
    250. 

  250. <a name="l00248"></a>00248                         <span class="comment">/* Update the HC fields for the next packet received. */</span>
    251. 

  251. <a name="l00249"></a>00249                         hc-&gt;<a class="code" href="structdwc__hc.html#6199aaeab2d64954311c410b30270293">xfer_count</a> += grxsts.<a class="code" href="unionhost__grxsts__data.html#9d67ba193008dd6afa7fe613c665238d">b</a>.<a class="code" href="unionhost__grxsts__data.html#026fd4d8ab68825fab038c083b8e9c60">bcnt</a>;
    252. 

  252. <a name="l00250"></a>00250                         hc-&gt;<a class="code" href="structdwc__hc.html#9dc781cb9e4bc639765beee37ce76673">xfer_buff</a> += grxsts.<a class="code" href="unionhost__grxsts__data.html#9d67ba193008dd6afa7fe613c665238d">b</a>.<a class="code" href="unionhost__grxsts__data.html#026fd4d8ab68825fab038c083b8e9c60">bcnt</a>;
    253. 

  253. <a name="l00251"></a>00251                 }
    254. 

  254. <a name="l00252"></a>00252 
    255. 

  255. <a name="l00253"></a>00253         <span class="keywordflow">case</span> <a class="code" href="dwc__otg__regs_8h.html#c5c019a36ea5cb66d3cb436292d8c3de">DWC_GRXSTS_PKTSTS_IN_XFER_COMP</a>:
    256. 

  256. <a name="l00254"></a>00254         <span class="keywordflow">case</span> <a class="code" href="dwc__otg__regs_8h.html#63be63fa3258a785d81ded62ab27b30d">DWC_GRXSTS_PKTSTS_DATA_TOGGLE_ERR</a>:
    257. 

  257. <a name="l00255"></a>00255         <span class="keywordflow">case</span> <a class="code" href="dwc__otg__regs_8h.html#a6d1e988dc17e285244c4e587440cbef">DWC_GRXSTS_PKTSTS_CH_HALTED</a>:
    258. 

  258. <a name="l00256"></a>00256                 <span class="comment">/* Handled in interrupt, just ignore data */</span>
    259. 

  259. <a name="l00257"></a>00257                 <span class="keywordflow">break</span>;
    260. 

  260. <a name="l00258"></a>00258         <span class="keywordflow">default</span>:
    261. 

  261. <a name="l00259"></a>00259                 DWC_ERROR(<span class="stringliteral">"RX_STS_Q Interrupt: Unknown status %d\n"</span>,
    262. 

  262. <a name="l00260"></a>00260                           grxsts.<a class="code" href="unionhost__grxsts__data.html#9d67ba193008dd6afa7fe613c665238d">b</a>.<a class="code" href="unionhost__grxsts__data.html#6dc2553475a56a445c6e6f319feffac8">pktsts</a>);
    263. 

  263. <a name="l00261"></a>00261                 <span class="keywordflow">break</span>;
    264. 

  264. <a name="l00262"></a>00262         }
    265. 

  265. <a name="l00263"></a>00263 
    266. 

  266. <a name="l00264"></a>00264         <span class="keywordflow">return</span> 1;
    267. 

  267. <a name="l00265"></a>00265 }
    268. 

  268. <a name="l00266"></a>00266 
    269. 

  269. <a name="l00271"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#51c953aefbc2382adee9f585fdb26f35">00271</a> int32_t <a class="code" href="dwc__otg__hcd_8h.html#51c953aefbc2382adee9f585fdb26f35">dwc_otg_hcd_handle_np_tx_fifo_empty_intr</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * <a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd</a>)
    270. 

  270. <a name="l00272"></a>00272 {
    271. 

  271. <a name="l00273"></a>00273         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#e4a050e176c1c4f556da2b276a8c2b37">DBG_HCD</a>, <span class="stringliteral">"--Non-Periodic TxFIFO Empty Interrupt--\n"</span>);
    272. 

  272. <a name="l00274"></a>00274         <a class="code" href="dwc__otg__hcd_8c.html#2f57bf2fc3013d63101f112702b913a0">dwc_otg_hcd_queue_transactions</a>(dwc_otg_hcd,
    273. 

  273. <a name="l00275"></a>00275                                        DWC_OTG_TRANSACTION_NON_PERIODIC);
    274. 

  274. <a name="l00276"></a>00276         <span class="keywordflow">return</span> 1;
    275. 

  275. <a name="l00277"></a>00277 }
    276. 

  276. <a name="l00278"></a>00278 
    277. 

  277. <a name="l00283"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#dcfa21f80c7732df9aaf3db59a86eb1d">00283</a> int32_t <a class="code" href="dwc__otg__hcd_8h.html#dcfa21f80c7732df9aaf3db59a86eb1d">dwc_otg_hcd_handle_perio_tx_fifo_empty_intr</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * <a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd</a>)
    278. 

  278. <a name="l00284"></a>00284 {
    279. 

  279. <a name="l00285"></a>00285         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#e4a050e176c1c4f556da2b276a8c2b37">DBG_HCD</a>, <span class="stringliteral">"--Periodic TxFIFO Empty Interrupt--\n"</span>);
    280. 

  280. <a name="l00286"></a>00286         <a class="code" href="dwc__otg__hcd_8c.html#2f57bf2fc3013d63101f112702b913a0">dwc_otg_hcd_queue_transactions</a>(dwc_otg_hcd,
    281. 

  281. <a name="l00287"></a>00287                                        DWC_OTG_TRANSACTION_PERIODIC);
    282. 

  282. <a name="l00288"></a>00288         <span class="keywordflow">return</span> 1;
    283. 

  283. <a name="l00289"></a>00289 }
    284. 

  284. <a name="l00290"></a>00290 
    285. 

  285. <a name="l00294"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#18bb807c86935a45f5fe5940e5ded70c">00294</a> int32_t <a class="code" href="dwc__otg__hcd_8h.html#18bb807c86935a45f5fe5940e5ded70c">dwc_otg_hcd_handle_port_intr</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * <a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd</a>)
    286. 

  286. <a name="l00295"></a>00295 {
    287. 

  287. <a name="l00296"></a>00296         <span class="keywordtype">int</span> retval = 0;
    288. 

  288. <a name="l00297"></a>00297         <a class="code" href="unionhprt0__data.html">hprt0_data_t</a> hprt0;
    289. 

  289. <a name="l00298"></a>00298         <a class="code" href="unionhprt0__data.html">hprt0_data_t</a> hprt0_modify;
    290. 

  290. <a name="l00299"></a>00299 
    291. 

  291. <a name="l00300"></a>00300         hprt0.<a class="code" href="unionhprt0__data.html#88e9271f697d2ec209fc6a6da67fe216">d32</a> = dwc_read_reg32(dwc_otg_hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#51bac71891b5f6f435d7fc4582b974c1">host_if</a>-&gt;<a class="code" href="structdwc__otg__host__if.html#dc8fe33e0bb3829cafa884d5fc603c4d">hprt0</a>);
    292. 

  292. <a name="l00301"></a>00301         hprt0_modify.<a class="code" href="unionhprt0__data.html#88e9271f697d2ec209fc6a6da67fe216">d32</a> = dwc_read_reg32(dwc_otg_hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#51bac71891b5f6f435d7fc4582b974c1">host_if</a>-&gt;<a class="code" href="structdwc__otg__host__if.html#dc8fe33e0bb3829cafa884d5fc603c4d">hprt0</a>);
    293. 

  293. <a name="l00302"></a>00302 
    294. 

  294. <a name="l00303"></a>00303         <span class="comment">/* Clear appropriate bits in HPRT0 to clear the interrupt bit in</span>
    295. 

  295. <a name="l00304"></a>00304 <span class="comment">         * GINTSTS */</span>
    296. 

  296. <a name="l00305"></a>00305 
    297. 

  297. <a name="l00306"></a>00306         hprt0_modify.<a class="code" href="unionhprt0__data.html#08cd86ce6da6462fc53601db7e2b73f3">b</a>.<a class="code" href="unionhprt0__data.html#a964274b5d22e89ca4490f66dff3c763">prtena</a> = 0;
    298. 

  298. <a name="l00307"></a>00307         hprt0_modify.<a class="code" href="unionhprt0__data.html#08cd86ce6da6462fc53601db7e2b73f3">b</a>.<a class="code" href="unionhprt0__data.html#5124a40eeafd92c9632c91a2c3132937">prtconndet</a> = 0;
    299. 

  299. <a name="l00308"></a>00308         hprt0_modify.<a class="code" href="unionhprt0__data.html#08cd86ce6da6462fc53601db7e2b73f3">b</a>.<a class="code" href="unionhprt0__data.html#75eae10eb537e49cc1ae2dc01c18aa47">prtenchng</a> = 0;
    300. 

  300. <a name="l00309"></a>00309         hprt0_modify.<a class="code" href="unionhprt0__data.html#08cd86ce6da6462fc53601db7e2b73f3">b</a>.<a class="code" href="unionhprt0__data.html#cc51da1d52cb824d419ef3feb6ba70b6">prtovrcurrchng</a> = 0;
    301. 

  301. <a name="l00310"></a>00310 
    302. 

  302. <a name="l00311"></a>00311         <span class="comment">/* Port Connect Detected</span>
    303. 

  303. <a name="l00312"></a>00312 <span class="comment">         * Set flag and clear if detected */</span>
    304. 

  304. <a name="l00313"></a>00313         <span class="keywordflow">if</span> (hprt0.<a class="code" href="unionhprt0__data.html#08cd86ce6da6462fc53601db7e2b73f3">b</a>.<a class="code" href="unionhprt0__data.html#5124a40eeafd92c9632c91a2c3132937">prtconndet</a>) {
    305. 

  305. <a name="l00314"></a>00314                 <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#e4a050e176c1c4f556da2b276a8c2b37">DBG_HCD</a>, <span class="stringliteral">"--Port Interrupt HPRT0=0x%08x "</span>
    306. 

  306. <a name="l00315"></a>00315                             <span class="stringliteral">"Port Connect Detected--\n"</span>, hprt0.<a class="code" href="unionhprt0__data.html#88e9271f697d2ec209fc6a6da67fe216">d32</a>);
    307. 

  307. <a name="l00316"></a>00316                 dwc_otg_hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#9aaf2a112f5794f92dedd826342bd637">flags</a>.<a class="code" href="uniondwc__otg__hcd_1_1dwc__otg__hcd__internal__flags.html#76f573861d9316238ded198c58c228c7">b</a>.<a class="code" href="uniondwc__otg__hcd_1_1dwc__otg__hcd__internal__flags.html#cd31ac4b9658265e90773448f354f0e1">port_connect_status_change</a> = 1;
    308. 

  308. <a name="l00317"></a>00317                 dwc_otg_hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#9aaf2a112f5794f92dedd826342bd637">flags</a>.<a class="code" href="uniondwc__otg__hcd_1_1dwc__otg__hcd__internal__flags.html#76f573861d9316238ded198c58c228c7">b</a>.<a class="code" href="uniondwc__otg__hcd_1_1dwc__otg__hcd__internal__flags.html#9314ac02ed140807687793b512f78c63">port_connect_status</a> = 1;
    309. 

  309. <a name="l00318"></a>00318                 hprt0_modify.<a class="code" href="unionhprt0__data.html#08cd86ce6da6462fc53601db7e2b73f3">b</a>.<a class="code" href="unionhprt0__data.html#5124a40eeafd92c9632c91a2c3132937">prtconndet</a> = 1;
    310. 

  310. <a name="l00319"></a>00319 
    311. 

  311. <a name="l00320"></a>00320                 <span class="comment">/* B-Device has connected, Delete the connection timer. */</span>
    312. 

  312. <a name="l00321"></a>00321                 DWC_TIMER_CANCEL(dwc_otg_hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#de7796a41bb7d1e45ed9dbc20c995342">conn_timer</a>);
    313. 

  313. <a name="l00322"></a>00322 
    314. 

  314. <a name="l00323"></a>00323                 <span class="comment">/* The Hub driver asserts a reset when it sees port connect</span>
    315. 

  315. <a name="l00324"></a>00324 <span class="comment">                 * status change flag */</span>
    316. 

  316. <a name="l00325"></a>00325                 retval |= 1;
    317. 

  317. <a name="l00326"></a>00326         }
    318. 

  318. <a name="l00327"></a>00327 
    319. 

  319. <a name="l00328"></a>00328         <span class="comment">/* Port Enable Changed</span>
    320. 

  320. <a name="l00329"></a>00329 <span class="comment">         * Clear if detected - Set internal flag if disabled */</span>
    321. 

  321. <a name="l00330"></a>00330         <span class="keywordflow">if</span> (hprt0.<a class="code" href="unionhprt0__data.html#08cd86ce6da6462fc53601db7e2b73f3">b</a>.<a class="code" href="unionhprt0__data.html#75eae10eb537e49cc1ae2dc01c18aa47">prtenchng</a>) {
    322. 

  322. <a name="l00331"></a>00331                 <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#e4a050e176c1c4f556da2b276a8c2b37">DBG_HCD</a>, <span class="stringliteral">"  --Port Interrupt HPRT0=0x%08x "</span>
    323. 

  323. <a name="l00332"></a>00332                             <span class="stringliteral">"Port Enable Changed--\n"</span>, hprt0.<a class="code" href="unionhprt0__data.html#88e9271f697d2ec209fc6a6da67fe216">d32</a>);
    324. 

  324. <a name="l00333"></a>00333                 hprt0_modify.<a class="code" href="unionhprt0__data.html#08cd86ce6da6462fc53601db7e2b73f3">b</a>.<a class="code" href="unionhprt0__data.html#75eae10eb537e49cc1ae2dc01c18aa47">prtenchng</a> = 1;
    325. 

  325. <a name="l00334"></a>00334                 <span class="keywordflow">if</span> (hprt0.<a class="code" href="unionhprt0__data.html#08cd86ce6da6462fc53601db7e2b73f3">b</a>.<a class="code" href="unionhprt0__data.html#a964274b5d22e89ca4490f66dff3c763">prtena</a> == 1) {
    326. 

  326. <a name="l00335"></a>00335                         <span class="keywordtype">int</span> do_reset = 0;
    327. 

  327. <a name="l00336"></a>00336                         <a class="code" href="structdwc__otg__core__params.html">dwc_otg_core_params_t</a> *params =
    328. 

  328. <a name="l00337"></a>00337                             dwc_otg_hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#63ffc9b8e36340bd59bf1fab9ca490ad">core_params</a>;
    329. 

  329. <a name="l00338"></a>00338                         <a class="code" href="structdwc__otg__core__global__regs.html">dwc_otg_core_global_regs_t</a> *global_regs =
    330. 

  330. <a name="l00339"></a>00339                             dwc_otg_hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#909eae7e3b9432ca1e278b99f7811f52">core_global_regs</a>;
    331. 

  331. <a name="l00340"></a>00340                         <a class="code" href="structdwc__otg__host__if.html">dwc_otg_host_if_t</a> *host_if =
    332. 

  332. <a name="l00341"></a>00341                             dwc_otg_hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#51bac71891b5f6f435d7fc4582b974c1">host_if</a>;
    333. 

  333. <a name="l00342"></a>00342 
    334. 

  334. <a name="l00343"></a>00343                         <span class="comment">/* Check if we need to adjust the PHY clock speed for</span>
    335. 

  335. <a name="l00344"></a>00344 <span class="comment">                         * low power and adjust it */</span>
    336. 

  336. <a name="l00345"></a>00345                         <span class="keywordflow">if</span> (params-&gt;<a class="code" href="structdwc__otg__core__params.html#85cad588a450b8497347af9cf166bfde">host_support_fs_ls_low_power</a>) {
    337. 

  337. <a name="l00346"></a>00346                                 <a class="code" href="uniongusbcfg__data.html">gusbcfg_data_t</a> usbcfg;
    338. 

  338. <a name="l00347"></a>00347 
    339. 

  339. <a name="l00348"></a>00348                                 usbcfg.<a class="code" href="uniongusbcfg__data.html#c3d8f2d95fd61a172eb108cb72a85b47">d32</a> =
    340. 

  340. <a name="l00349"></a>00349                                     dwc_read_reg32(&amp;global_regs-&gt;<a class="code" href="structdwc__otg__core__global__regs.html#ef39e181e246447df47c56aa4e37cc42">gusbcfg</a>);
    341. 

  341. <a name="l00350"></a>00350 
    342. 

  342. <a name="l00351"></a>00351                                 <span class="keywordflow">if</span> (hprt0.<a class="code" href="unionhprt0__data.html#08cd86ce6da6462fc53601db7e2b73f3">b</a>.<a class="code" href="unionhprt0__data.html#59f1c27b8c912de0237d2d2974fc2a22">prtspd</a> == <a class="code" href="dwc__otg__regs_8h.html#db9e36d1ab76c334f6e004ee270bd36f">DWC_HPRT0_PRTSPD_LOW_SPEED</a>
    343. 

  343. <a name="l00352"></a>00352                                     || hprt0.<a class="code" href="unionhprt0__data.html#08cd86ce6da6462fc53601db7e2b73f3">b</a>.<a class="code" href="unionhprt0__data.html#59f1c27b8c912de0237d2d2974fc2a22">prtspd</a> ==
    344. 

  344. <a name="l00353"></a>00353                                     <a class="code" href="dwc__otg__regs_8h.html#1d144361f6655bb79e7503e7159e6be5">DWC_HPRT0_PRTSPD_FULL_SPEED</a>) {
    345. 

  345. <a name="l00354"></a>00354                                         <span class="comment">/*</span>
    346. 

  346. <a name="l00355"></a>00355 <span class="comment">                                         * Low power</span>
    347. 

  347. <a name="l00356"></a>00356 <span class="comment">                                         */</span>
    348. 

  348. <a name="l00357"></a>00357                                         <a class="code" href="unionhcfg__data.html">hcfg_data_t</a> hcfg;
    349. 

  349. <a name="l00358"></a>00358                                         <span class="keywordflow">if</span> (usbcfg.<a class="code" href="uniongusbcfg__data.html#1dab81bf7260b1e23f97298c34abea06">b</a>.<a class="code" href="uniongusbcfg__data.html#9e4bac4a0ef0a045f97792f68c5f35df">phylpwrclksel</a> == 0) {
    350. 

  350. <a name="l00359"></a>00359                                                 <span class="comment">/* Set PHY low power clock select for FS/LS devices */</span>
    351. 

  351. <a name="l00360"></a>00360                                                 usbcfg.<a class="code" href="uniongusbcfg__data.html#1dab81bf7260b1e23f97298c34abea06">b</a>.<a class="code" href="uniongusbcfg__data.html#9e4bac4a0ef0a045f97792f68c5f35df">phylpwrclksel</a> = 1;
    352. 

  352. <a name="l00361"></a>00361                                                 dwc_write_reg32(&amp;global_regs-&gt;
    353. 

  353. <a name="l00362"></a>00362                                                                 gusbcfg,
    354. 

  354. <a name="l00363"></a>00363                                                                 usbcfg.<a class="code" href="uniongusbcfg__data.html#c3d8f2d95fd61a172eb108cb72a85b47">d32</a>);
    355. 

  355. <a name="l00364"></a>00364                                                 do_reset = 1;
    356. 

  356. <a name="l00365"></a>00365                                         }
    357. 

  357. <a name="l00366"></a>00366 
    358. 

  358. <a name="l00367"></a>00367                                         hcfg.<a class="code" href="unionhcfg__data.html#381a253b3a38a7f943dcbb42f7bf10be">d32</a> =
    359. 

  359. <a name="l00368"></a>00368                                             dwc_read_reg32(&amp;host_if-&gt;
    360. 

  360. <a name="l00369"></a>00369                                                            host_global_regs-&gt;hcfg);
    361. 

  361. <a name="l00370"></a>00370 
    362. 

  362. <a name="l00371"></a>00371                                         <span class="keywordflow">if</span> (hprt0.<a class="code" href="unionhprt0__data.html#08cd86ce6da6462fc53601db7e2b73f3">b</a>.<a class="code" href="unionhprt0__data.html#59f1c27b8c912de0237d2d2974fc2a22">prtspd</a> ==
    363. 

  363. <a name="l00372"></a>00372                                             <a class="code" href="dwc__otg__regs_8h.html#db9e36d1ab76c334f6e004ee270bd36f">DWC_HPRT0_PRTSPD_LOW_SPEED</a>
    364. 

  364. <a name="l00373"></a>00373                                             &amp;&amp; params-&gt;
    365. 

  365. <a name="l00374"></a>00374                                             host_ls_low_power_phy_clk ==
    366. 

  366. <a name="l00375"></a>00375                                             <a class="code" href="dwc__otg__core__if_8h.html#5037c1f130bf6b40970dbf9a498fb918">DWC_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ</a>)
    367. 

  367. <a name="l00376"></a>00376                                         {
    368. 

  368. <a name="l00377"></a>00377                                                 <span class="comment">/* 6 MHZ */</span>
    369. 

  369. <a name="l00378"></a>00378                                                 <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#57840e6b35e0e469296fd2db46227b13">DBG_CIL</a>,
    370. 

  370. <a name="l00379"></a>00379                                                             <span class="stringliteral">"FS_PHY programming HCFG to 6 MHz (Low Power)\n"</span>);
    371. 

  371. <a name="l00380"></a>00380                                                 <span class="keywordflow">if</span> (hcfg.<a class="code" href="unionhcfg__data.html#45bbb24387d58961dd2b8f2f65689bd7">b</a>.<a class="code" href="unionhcfg__data.html#e048ad3775c6794c3ee07af86079fadf">fslspclksel</a> !=
    372. 

  372. <a name="l00381"></a>00381                                                     <a class="code" href="dwc__otg__regs_8h.html#40a20b71af7ff9f23a2241a2e4c3c819">DWC_HCFG_6_MHZ</a>) {
    373. 

  373. <a name="l00382"></a>00382                                                         hcfg.<a class="code" href="unionhcfg__data.html#45bbb24387d58961dd2b8f2f65689bd7">b</a>.<a class="code" href="unionhcfg__data.html#e048ad3775c6794c3ee07af86079fadf">fslspclksel</a> =
    374. 

  374. <a name="l00383"></a>00383                                                             <a class="code" href="dwc__otg__regs_8h.html#40a20b71af7ff9f23a2241a2e4c3c819">DWC_HCFG_6_MHZ</a>;
    375. 

  375. <a name="l00384"></a>00384                                                         dwc_write_reg32
    376. 

  376. <a name="l00385"></a>00385                                                             (&amp;host_if-&gt;
    377. 

  377. <a name="l00386"></a>00386                                                              host_global_regs-&gt;
    378. 

  378. <a name="l00387"></a>00387                                                              hcfg, hcfg.<a class="code" href="unionhcfg__data.html#381a253b3a38a7f943dcbb42f7bf10be">d32</a>);
    379. 

  379. <a name="l00388"></a>00388                                                         do_reset = 1;
    380. 

  380. <a name="l00389"></a>00389                                                 }
    381. 

  381. <a name="l00390"></a>00390                                         } <span class="keywordflow">else</span> {
    382. 

  382. <a name="l00391"></a>00391                                                 <span class="comment">/* 48 MHZ */</span>
    383. 

  383. <a name="l00392"></a>00392                                                 <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#57840e6b35e0e469296fd2db46227b13">DBG_CIL</a>,
    384. 

  384. <a name="l00393"></a>00393                                                             <span class="stringliteral">"FS_PHY programming HCFG to 48 MHz ()\n"</span>);
    385. 

  385. <a name="l00394"></a>00394                                                 <span class="keywordflow">if</span> (hcfg.<a class="code" href="unionhcfg__data.html#45bbb24387d58961dd2b8f2f65689bd7">b</a>.<a class="code" href="unionhcfg__data.html#e048ad3775c6794c3ee07af86079fadf">fslspclksel</a> !=
    386. 

  386. <a name="l00395"></a>00395                                                     <a class="code" href="dwc__otg__regs_8h.html#556ba73fd9346d666a7c0a28fcf993a7">DWC_HCFG_48_MHZ</a>) {
    387. 

  387. <a name="l00396"></a>00396                                                         hcfg.<a class="code" href="unionhcfg__data.html#45bbb24387d58961dd2b8f2f65689bd7">b</a>.<a class="code" href="unionhcfg__data.html#e048ad3775c6794c3ee07af86079fadf">fslspclksel</a> =
    388. 

  388. <a name="l00397"></a>00397                                                             <a class="code" href="dwc__otg__regs_8h.html#556ba73fd9346d666a7c0a28fcf993a7">DWC_HCFG_48_MHZ</a>;
    389. 

  389. <a name="l00398"></a>00398                                                         dwc_write_reg32
    390. 

  390. <a name="l00399"></a>00399                                                             (&amp;host_if-&gt;
    391. 

  391. <a name="l00400"></a>00400                                                              host_global_regs-&gt;
    392. 

  392. <a name="l00401"></a>00401                                                              hcfg, hcfg.<a class="code" href="unionhcfg__data.html#381a253b3a38a7f943dcbb42f7bf10be">d32</a>);
    393. 

  393. <a name="l00402"></a>00402                                                         do_reset = 1;
    394. 

  394. <a name="l00403"></a>00403                                                 }
    395. 

  395. <a name="l00404"></a>00404                                         }
    396. 

  396. <a name="l00405"></a>00405                                 } <span class="keywordflow">else</span> {
    397. 

  397. <a name="l00406"></a>00406                                         <span class="comment">/*</span>
    398. 

  398. <a name="l00407"></a>00407 <span class="comment">                                         * Not low power</span>
    399. 

  399. <a name="l00408"></a>00408 <span class="comment">                                         */</span>
    400. 

  400. <a name="l00409"></a>00409                                         <span class="keywordflow">if</span> (usbcfg.<a class="code" href="uniongusbcfg__data.html#1dab81bf7260b1e23f97298c34abea06">b</a>.<a class="code" href="uniongusbcfg__data.html#9e4bac4a0ef0a045f97792f68c5f35df">phylpwrclksel</a> == 1) {
    401. 

  401. <a name="l00410"></a>00410                                                 usbcfg.<a class="code" href="uniongusbcfg__data.html#1dab81bf7260b1e23f97298c34abea06">b</a>.<a class="code" href="uniongusbcfg__data.html#9e4bac4a0ef0a045f97792f68c5f35df">phylpwrclksel</a> = 0;
    402. 

  402. <a name="l00411"></a>00411                                                 dwc_write_reg32(&amp;global_regs-&gt;
    403. 

  403. <a name="l00412"></a>00412                                                                 gusbcfg,
    404. 

  404. <a name="l00413"></a>00413                                                                 usbcfg.<a class="code" href="uniongusbcfg__data.html#c3d8f2d95fd61a172eb108cb72a85b47">d32</a>);
    405. 

  405. <a name="l00414"></a>00414                                                 do_reset = 1;
    406. 

  406. <a name="l00415"></a>00415                                         }
    407. 

  407. <a name="l00416"></a>00416                                 }
    408. 

  408. <a name="l00417"></a>00417 
    409. 

  409. <a name="l00418"></a>00418                                 <span class="keywordflow">if</span> (do_reset) {
    410. 

  410. <a name="l00419"></a>00419                                         DWC_TASK_SCHEDULE(dwc_otg_hcd-&gt;
    411. 

  411. <a name="l00420"></a>00420                                                           reset_tasklet);
    412. 

  412. <a name="l00421"></a>00421                                 }
    413. 

  413. <a name="l00422"></a>00422                         }
    414. 

  414. <a name="l00423"></a>00423 
    415. 

  415. <a name="l00424"></a>00424                         <span class="keywordflow">if</span> (!do_reset) {
    416. 

  416. <a name="l00425"></a>00425                                 <span class="comment">/* Port has been enabled set the reset change flag */</span>
    417. 

  417. <a name="l00426"></a>00426                                 dwc_otg_hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#9aaf2a112f5794f92dedd826342bd637">flags</a>.<a class="code" href="uniondwc__otg__hcd_1_1dwc__otg__hcd__internal__flags.html#76f573861d9316238ded198c58c228c7">b</a>.<a class="code" href="uniondwc__otg__hcd_1_1dwc__otg__hcd__internal__flags.html#d0d63f32ed35315e8a02549521fb386e">port_reset_change</a> = 1;
    418. 

  418. <a name="l00427"></a>00427                         }
    419. 

  419. <a name="l00428"></a>00428                 } <span class="keywordflow">else</span> {
    420. 

  420. <a name="l00429"></a>00429                         dwc_otg_hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#9aaf2a112f5794f92dedd826342bd637">flags</a>.<a class="code" href="uniondwc__otg__hcd_1_1dwc__otg__hcd__internal__flags.html#76f573861d9316238ded198c58c228c7">b</a>.<a class="code" href="uniondwc__otg__hcd_1_1dwc__otg__hcd__internal__flags.html#d222ae08372109a312f6649f77b650e8">port_enable_change</a> = 1;
    421. 

  421. <a name="l00430"></a>00430                 }
    422. 

  422. <a name="l00431"></a>00431                 retval |= 1;
    423. 

  423. <a name="l00432"></a>00432         }
    424. 

  424. <a name="l00433"></a>00433 
    425. 

  425. <a name="l00435"></a>00435         <span class="keywordflow">if</span> (hprt0.<a class="code" href="unionhprt0__data.html#08cd86ce6da6462fc53601db7e2b73f3">b</a>.<a class="code" href="unionhprt0__data.html#cc51da1d52cb824d419ef3feb6ba70b6">prtovrcurrchng</a>) {
    426. 

  426. <a name="l00436"></a>00436                 <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#e4a050e176c1c4f556da2b276a8c2b37">DBG_HCD</a>, <span class="stringliteral">"  --Port Interrupt HPRT0=0x%08x "</span>
    427. 

  427. <a name="l00437"></a>00437                             <span class="stringliteral">"Port Overcurrent Changed--\n"</span>, hprt0.<a class="code" href="unionhprt0__data.html#88e9271f697d2ec209fc6a6da67fe216">d32</a>);
    428. 

  428. <a name="l00438"></a>00438                 dwc_otg_hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#9aaf2a112f5794f92dedd826342bd637">flags</a>.<a class="code" href="uniondwc__otg__hcd_1_1dwc__otg__hcd__internal__flags.html#76f573861d9316238ded198c58c228c7">b</a>.<a class="code" href="uniondwc__otg__hcd_1_1dwc__otg__hcd__internal__flags.html#bc96cf12e2bc5b61ce05f15ae3297bd6">port_over_current_change</a> = 1;
    429. 

  429. <a name="l00439"></a>00439                 hprt0_modify.<a class="code" href="unionhprt0__data.html#08cd86ce6da6462fc53601db7e2b73f3">b</a>.<a class="code" href="unionhprt0__data.html#cc51da1d52cb824d419ef3feb6ba70b6">prtovrcurrchng</a> = 1;
    430. 

  430. <a name="l00440"></a>00440                 retval |= 1;
    431. 

  431. <a name="l00441"></a>00441         }
    432. 

  432. <a name="l00442"></a>00442 
    433. 

  433. <a name="l00443"></a>00443         <span class="comment">/* Clear Port Interrupts */</span>
    434. 

  434. <a name="l00444"></a>00444         dwc_write_reg32(dwc_otg_hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#51bac71891b5f6f435d7fc4582b974c1">host_if</a>-&gt;<a class="code" href="structdwc__otg__host__if.html#dc8fe33e0bb3829cafa884d5fc603c4d">hprt0</a>, hprt0_modify.<a class="code" href="unionhprt0__data.html#88e9271f697d2ec209fc6a6da67fe216">d32</a>);
    435. 

  435. <a name="l00445"></a>00445 
    436. 

  436. <a name="l00446"></a>00446         <span class="keywordflow">return</span> retval;
    437. 

  437. <a name="l00447"></a>00447 }
    438. 

  438. <a name="l00448"></a>00448 
    439. 

  439. <a name="l00453"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#1f28e296c0bc4146da309385d95b5d7e">00453</a> int32_t <a class="code" href="dwc__otg__hcd_8h.html#1f28e296c0bc4146da309385d95b5d7e">dwc_otg_hcd_handle_hc_intr</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * <a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd</a>)
    440. 

  440. <a name="l00454"></a>00454 {
    441. 

  441. <a name="l00455"></a>00455         <span class="keywordtype">int</span> i;
    442. 

  442. <a name="l00456"></a>00456         <span class="keywordtype">int</span> retval = 0;
    443. 

  443. <a name="l00457"></a>00457         <a class="code" href="unionhaint__data.html">haint_data_t</a> haint;
    444. 

  444. <a name="l00458"></a>00458 
    445. 

  445. <a name="l00459"></a>00459         <span class="comment">/* Clear appropriate bits in HCINTn to clear the interrupt bit in</span>
    446. 

  446. <a name="l00460"></a>00460 <span class="comment">         * GINTSTS */</span>
    447. 

  447. <a name="l00461"></a>00461 
    448. 

  448. <a name="l00462"></a>00462         haint.<a class="code" href="unionhaint__data.html#c83834650d2981b44274a89dda63a0f5">d32</a> = <a class="code" href="dwc__otg__cil_8h.html#ddc68d442228b5b0600e7ee26c641700">dwc_otg_read_host_all_channels_intr</a>(dwc_otg_hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>);
    449. 

  449. <a name="l00463"></a>00463 
    450. 

  450. <a name="l00464"></a>00464         <span class="keywordflow">for</span> (i = 0; i &lt; dwc_otg_hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#63ffc9b8e36340bd59bf1fab9ca490ad">core_params</a>-&gt;<a class="code" href="structdwc__otg__core__params.html#c1b433c6965aa7d48f6ca6818c592039">host_channels</a>; i++) {
    451. 

  451. <a name="l00465"></a>00465                 <span class="keywordflow">if</span> (haint.<a class="code" href="unionhaint__data.html#9317187b895abebbca64c364b6c3c322">b2</a>.<a class="code" href="unionhaint__data.html#6824b5b98c861cbc8efe3ba9f70cfea0">chint</a> &amp; (1 &lt;&lt; i)) {
    452. 

  452. <a name="l00466"></a>00466                         retval |= <a class="code" href="dwc__otg__hcd_8h.html#019c9cc38ec85275a7ef0b0d38bf53ab">dwc_otg_hcd_handle_hc_n_intr</a>(dwc_otg_hcd, i);
    453. 

  453. <a name="l00467"></a>00467                 }
    454. 

  454. <a name="l00468"></a>00468         }
    455. 

  455. <a name="l00469"></a>00469 
    456. 

  456. <a name="l00470"></a>00470         <span class="keywordflow">return</span> retval;
    457. 

  457. <a name="l00471"></a>00471 }
    458. 

  458. <a name="l00472"></a>00472 
    459. 

  459. <a name="l00473"></a>00473 
    460. 

  460. <a name="l00474"></a>00474 
    461. 

  461. <a name="l00485"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#6cdb134cbb3cdf3501ca39761137baf0">00485</a> <span class="keyword">static</span> uint32_t <a class="code" href="dwc__otg__hcd__intr_8c.html#6cdb134cbb3cdf3501ca39761137baf0">get_actual_xfer_length</a>(<a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    462. 

  462. <a name="l00486"></a>00486                                        <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> * hc_regs,
    463. 

  463. <a name="l00487"></a>00487                                        <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd,
    464. 

  464. <a name="l00488"></a>00488                                        dwc_otg_halt_status_e halt_status,
    465. 

  465. <a name="l00489"></a>00489                                        <span class="keywordtype">int</span> *short_read)
    466. 

  466. <a name="l00490"></a>00490 {
    467. 

  467. <a name="l00491"></a>00491         <a class="code" href="unionhctsiz__data.html">hctsiz_data_t</a> hctsiz;
    468. 

  468. <a name="l00492"></a>00492         uint32_t length;
    469. 

  469. <a name="l00493"></a>00493 
    470. 

  470. <a name="l00494"></a>00494         <span class="keywordflow">if</span> (short_read != NULL) {
    471. 

  471. <a name="l00495"></a>00495                 *short_read = 0;
    472. 

  472. <a name="l00496"></a>00496         }
    473. 

  473. <a name="l00497"></a>00497         hctsiz.<a class="code" href="unionhctsiz__data.html#fb41950555c60c6015294bdefe9cd39d">d32</a> = dwc_read_reg32(&amp;hc_regs-&gt;<a class="code" href="structdwc__otg__hc__regs.html#c6173f823ba754d9f9549422b6380ca2">hctsiz</a>);
    474. 

  474. <a name="l00498"></a>00498 
    475. 

  475. <a name="l00499"></a>00499         <span class="keywordflow">if</span> (halt_status == DWC_OTG_HC_XFER_COMPLETE) {
    476. 

  476. <a name="l00500"></a>00500                 <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#c5088d431f5efc382121f201f5d571aa">ep_is_in</a>) {
    477. 

  477. <a name="l00501"></a>00501                         length = hc-&gt;<a class="code" href="structdwc__hc.html#ce32fe93214f1686896e924fbf61cac7">xfer_len</a> - hctsiz.<a class="code" href="unionhctsiz__data.html#8967fa90c651bce44a3cbe90c44cf638">b</a>.<a class="code" href="unionhctsiz__data.html#6ad01d874d77aa4382f71fa68eaec12d">xfersize</a>;
    478. 

  478. <a name="l00502"></a>00502                         <span class="keywordflow">if</span> (short_read != NULL) {
    479. 

  479. <a name="l00503"></a>00503                                 *short_read = (hctsiz.<a class="code" href="unionhctsiz__data.html#8967fa90c651bce44a3cbe90c44cf638">b</a>.<a class="code" href="unionhctsiz__data.html#6ad01d874d77aa4382f71fa68eaec12d">xfersize</a> != 0);
    480. 

  480. <a name="l00504"></a>00504                         }
    481. 

  481. <a name="l00505"></a>00505                 } <span class="keywordflow">else</span> <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>-&gt;<a class="code" href="structdwc__otg__qh.html#8708dd009988ce20b8a8d52a4a96c5a3">do_split</a>) {
    482. 

  482. <a name="l00506"></a>00506                         length = qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#badffe465e850133c62c8f7e539f3fca">ssplit_out_xfer_count</a>;
    483. 

  483. <a name="l00507"></a>00507                 } <span class="keywordflow">else</span> {
    484. 

  484. <a name="l00508"></a>00508                         length = hc-&gt;<a class="code" href="structdwc__hc.html#ce32fe93214f1686896e924fbf61cac7">xfer_len</a>;
    485. 

  485. <a name="l00509"></a>00509                 }
    486. 

  486. <a name="l00510"></a>00510         } <span class="keywordflow">else</span> {
    487. 

  487. <a name="l00511"></a>00511                 <span class="comment">/*</span>
    488. 

  488. <a name="l00512"></a>00512 <span class="comment">                 * Must use the hctsiz.pktcnt field to determine how much data</span>
    489. 

  489. <a name="l00513"></a>00513 <span class="comment">                 * has been transferred. This field reflects the number of</span>
    490. 

  490. <a name="l00514"></a>00514 <span class="comment">                 * packets that have been transferred via the USB. This is</span>
    491. 

  491. <a name="l00515"></a>00515 <span class="comment">                 * always an integral number of packets if the transfer was</span>
    492. 

  492. <a name="l00516"></a>00516 <span class="comment">                 * halted before its normal completion. (Can't use the</span>
    493. 

  493. <a name="l00517"></a>00517 <span class="comment">                 * hctsiz.xfersize field because that reflects the number of</span>
    494. 

  494. <a name="l00518"></a>00518 <span class="comment">                 * bytes transferred via the AHB, not the USB).</span>
    495. 

  495. <a name="l00519"></a>00519 <span class="comment">                 */</span>
    496. 

  496. <a name="l00520"></a>00520                 length =
    497. 

  497. <a name="l00521"></a>00521                     (hc-&gt;<a class="code" href="structdwc__hc.html#6c030bc725f43025d3046d17b4fbee4e">start_pkt_count</a> - hctsiz.<a class="code" href="unionhctsiz__data.html#8967fa90c651bce44a3cbe90c44cf638">b</a>.<a class="code" href="unionhctsiz__data.html#3ea18df5a98d33a6f8fa786252a0205b">pktcnt</a>) * hc-&gt;<a class="code" href="structdwc__hc.html#bd88f02eb286ba01d8d1b049e8975ccb">max_packet</a>;
    498. 

  498. <a name="l00522"></a>00522         }
    499. 

  499. <a name="l00523"></a>00523 
    500. 

  500. <a name="l00524"></a>00524         <span class="keywordflow">return</span> length;
    501. 

  501. <a name="l00525"></a>00525 }
    502. 

  502. <a name="l00526"></a>00526 
    503. 

  503. <a name="l00536"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#ecb30a961e8d4831e8691d45a77162e3">00536</a> <span class="keyword">static</span> <span class="keywordtype">int</span> <a class="code" href="dwc__otg__hcd__intr_8c.html#ecb30a961e8d4831e8691d45a77162e3">update_urb_state_xfer_comp</a>(<a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    504. 

  504. <a name="l00537"></a>00537                                       <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> * hc_regs,
    505. 

  505. <a name="l00538"></a>00538                                       <a class="code" href="structdwc__otg__hcd__urb.html">dwc_otg_hcd_urb_t</a> * urb,
    506. 

  506. <a name="l00539"></a>00539                                       <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd)
    507. 

  507. <a name="l00540"></a>00540 {
    508. 

  508. <a name="l00541"></a>00541         <span class="keywordtype">int</span> xfer_done = 0;
    509. 

  509. <a name="l00542"></a>00542         <span class="keywordtype">int</span> short_read = 0;
    510. 

  510. <a name="l00543"></a>00543 
    511. 

  511. <a name="l00544"></a>00544         <span class="keywordtype">int</span> xfer_length;
    512. 

  512. <a name="l00545"></a>00545 
    513. 

  513. <a name="l00546"></a>00546         xfer_length = <a class="code" href="dwc__otg__hcd__intr_8c.html#6cdb134cbb3cdf3501ca39761137baf0">get_actual_xfer_length</a>(hc, hc_regs, qtd,                                               
    514. 

  514. <a name="l00547"></a>00547                                                      DWC_OTG_HC_XFER_COMPLETE,
    515. 

  515. <a name="l00548"></a>00548                                                      &amp;short_read);
    516. 

  516. <a name="l00549"></a>00549 
    517. 

  517. <a name="l00550"></a>00550 
    518. 

  518. <a name="l00551"></a>00551         <span class="comment">/* non DWORD-aligned buffer case handling. */</span>
    519. 

  519. <a name="l00552"></a>00552         <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#e0c3ba51a04b36656baa4e70fc63cf77">align_buff</a> &amp;&amp; xfer_length &amp;&amp; hc-&gt;<a class="code" href="structdwc__hc.html#c5088d431f5efc382121f201f5d571aa">ep_is_in</a>) {
    520. 

  520. <a name="l00553"></a>00553                 dwc_memcpy(urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#99ae35ffcd6147ddb93b361ab3bcfe95">buf</a> + urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#742c8a97d3867ab89148eae34e0c73a6">actual_length</a>, hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>-&gt;<a class="code" href="structdwc__otg__qh.html#aac9f90a6afd9056dce79d013dd2168b">dw_align_buf</a>, xfer_length);
    521. 

  521. <a name="l00554"></a>00554         }
    522. 

  522. <a name="l00555"></a>00555 
    523. 

  523. <a name="l00556"></a>00556         urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#742c8a97d3867ab89148eae34e0c73a6">actual_length</a> += xfer_length;
    524. 

  524. <a name="l00557"></a>00557 
    525. 

  525. <a name="l00558"></a>00558         <span class="keywordflow">if</span>(xfer_length &amp;&amp; (hc-&gt;<a class="code" href="structdwc__hc.html#e6169fbc92e4d79686097742ad646f5c">ep_type</a> == <a class="code" href="dwc__otg__cil_8h.html#9b079858cda0b917316ad9161b3881e0">DWC_OTG_EP_TYPE_BULK</a>) &amp;&amp;
    526. 

  526. <a name="l00559"></a>00559            (urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#2f1d90765496d78d297b3e57ef4d781c">flags</a> &amp; <a class="code" href="dwc__otg__hcd__if_8h.html#14e576ea3b30c038f925e3e6c80c64fe">URB_SEND_ZERO_PACKET</a>) &amp;&amp; (urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#742c8a97d3867ab89148eae34e0c73a6">actual_length</a> == urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#dca57de4fdecd894241ce24167206a45">length</a>) &amp;&amp;
    527. 

  527. <a name="l00560"></a>00560            !(urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#dca57de4fdecd894241ce24167206a45">length</a> % hc-&gt;<a class="code" href="structdwc__hc.html#bd88f02eb286ba01d8d1b049e8975ccb">max_packet</a>)) {
    528. 

  528. <a name="l00561"></a>00561                 xfer_done = 0;
    529. 

  529. <a name="l00562"></a>00562         } <span class="keywordflow">else</span> <span class="keywordflow">if</span> (short_read || urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#742c8a97d3867ab89148eae34e0c73a6">actual_length</a> == urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#dca57de4fdecd894241ce24167206a45">length</a>) {
    530. 

  530. <a name="l00563"></a>00563                 xfer_done = 1;
    531. 

  531. <a name="l00564"></a>00564                 urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#101e4a6762b9911cdb85768890fa1210">status</a> = 0;
    532. 

  532. <a name="l00565"></a>00565         }
    533. 

  533. <a name="l00566"></a>00566         
    534. 

  534. <a name="l00567"></a>00567 <span class="preprocessor">#ifdef DEBUG</span>
    535. 

  535. <a name="l00568"></a>00568 <span class="preprocessor"></span>        {
    536. 

  536. <a name="l00569"></a>00569                 <a class="code" href="unionhctsiz__data.html">hctsiz_data_t</a> hctsiz;
    537. 

  537. <a name="l00570"></a>00570                 hctsiz.<a class="code" href="unionhctsiz__data.html#fb41950555c60c6015294bdefe9cd39d">d32</a> = dwc_read_reg32(&amp;hc_regs-&gt;<a class="code" href="structdwc__otg__hc__regs.html#c6173f823ba754d9f9549422b6380ca2">hctsiz</a>);
    538. 

  538. <a name="l00571"></a>00571                 <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"DWC_otg: %s: %s, channel %d\n"</span>,
    539. 

  539. <a name="l00572"></a>00572                             __func__, (hc-&gt;<a class="code" href="structdwc__hc.html#c5088d431f5efc382121f201f5d571aa">ep_is_in</a> ? <span class="stringliteral">"IN"</span> : <span class="stringliteral">"OUT"</span>),
    540. 

  540. <a name="l00573"></a>00573                             hc-&gt;<a class="code" href="structdwc__hc.html#df0c2b93e5c84cfaba6f06eaeaece5a1">hc_num</a>);
    541. 

  541. <a name="l00574"></a>00574                 <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"  hc-&gt;xfer_len %d\n"</span>, hc-&gt;<a class="code" href="structdwc__hc.html#ce32fe93214f1686896e924fbf61cac7">xfer_len</a>);
    542. 

  542. <a name="l00575"></a>00575                 <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"  hctsiz.xfersize %d\n"</span>,
    543. 

  543. <a name="l00576"></a>00576                             hctsiz.<a class="code" href="unionhctsiz__data.html#8967fa90c651bce44a3cbe90c44cf638">b</a>.<a class="code" href="unionhctsiz__data.html#6ad01d874d77aa4382f71fa68eaec12d">xfersize</a>);
    544. 

  544. <a name="l00577"></a>00577                 <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"  urb-&gt;transfer_buffer_length %d\n"</span>,
    545. 

  545. <a name="l00578"></a>00578                             urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#dca57de4fdecd894241ce24167206a45">length</a>);
    546. 

  546. <a name="l00579"></a>00579                 <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"  urb-&gt;actual_length %d\n"</span>,
    547. 

  547. <a name="l00580"></a>00580                             urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#742c8a97d3867ab89148eae34e0c73a6">actual_length</a>);
    548. 

  548. <a name="l00581"></a>00581                 <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"  short_read %d, xfer_done %d\n"</span>,
    549. 

  549. <a name="l00582"></a>00582                             short_read, xfer_done);
    550. 

  550. <a name="l00583"></a>00583         }
    551. 

  551. <a name="l00584"></a>00584 <span class="preprocessor">#endif</span>
    552. 

  552. <a name="l00585"></a>00585 <span class="preprocessor"></span>
    553. 

  553. <a name="l00586"></a>00586         <span class="keywordflow">return</span> xfer_done;
    554. 

  554. <a name="l00587"></a>00587 }
    555. 

  555. <a name="l00588"></a>00588 
    556. 

  556. <a name="l00589"></a>00589 <span class="comment">/*</span>
    557. 

  557. <a name="l00590"></a>00590 <span class="comment"> * Save the starting data toggle for the next transfer. The data toggle is</span>
    558. 

  558. <a name="l00591"></a>00591 <span class="comment"> * saved in the QH for non-control transfers and it's saved in the QTD for</span>
    559. 

  559. <a name="l00592"></a>00592 <span class="comment"> * control transfers.</span>
    560. 

  560. <a name="l00593"></a>00593 <span class="comment"> */</span>
    561. 

  561. <a name="l00594"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#8bce109004d7869bfdd9aa1075c6bd2c">00594</a> <span class="keywordtype">void</span> <a class="code" href="dwc__otg__hcd_8h.html#8bce109004d7869bfdd9aa1075c6bd2c">dwc_otg_hcd_save_data_toggle</a>(<a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    562. 

  562. <a name="l00595"></a>00595                              <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> * hc_regs, <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd)
    563. 

  563. <a name="l00596"></a>00596 {
    564. 

  564. <a name="l00597"></a>00597         <a class="code" href="unionhctsiz__data.html">hctsiz_data_t</a> hctsiz;
    565. 

  565. <a name="l00598"></a>00598         hctsiz.<a class="code" href="unionhctsiz__data.html#fb41950555c60c6015294bdefe9cd39d">d32</a> = dwc_read_reg32(&amp;hc_regs-&gt;<a class="code" href="structdwc__otg__hc__regs.html#c6173f823ba754d9f9549422b6380ca2">hctsiz</a>);
    566. 

  566. <a name="l00599"></a>00599 
    567. 

  567. <a name="l00600"></a>00600         <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#e6169fbc92e4d79686097742ad646f5c">ep_type</a> != <a class="code" href="dwc__otg__cil_8h.html#64e5cd756330f5adab79b25cc8067bdc">DWC_OTG_EP_TYPE_CONTROL</a>) {
    568. 

  568. <a name="l00601"></a>00601                 <a class="code" href="structdwc__otg__qh.html">dwc_otg_qh_t</a> *qh = hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>;
    569. 

  569. <a name="l00602"></a>00602                 <span class="keywordflow">if</span> (hctsiz.<a class="code" href="unionhctsiz__data.html#8967fa90c651bce44a3cbe90c44cf638">b</a>.<a class="code" href="unionhctsiz__data.html#d8b17af02c244e47ca0c38f933a6b3f0">pid</a> == <a class="code" href="dwc__otg__regs_8h.html#ab429f705d8fb6db88a206968e438217">DWC_HCTSIZ_DATA0</a>) {
    570. 

  570. <a name="l00603"></a>00603                         qh-&gt;<a class="code" href="structdwc__otg__qh.html#b0e001bfd76f5781926795ac47ef2c25">data_toggle</a> = <a class="code" href="dwc__otg__cil_8h.html#0e843d08e80c29e82962ce9170a02a52">DWC_OTG_HC_PID_DATA0</a>;
    571. 

  571. <a name="l00604"></a>00604                 } <span class="keywordflow">else</span> {
    572. 

  572. <a name="l00605"></a>00605                         qh-&gt;<a class="code" href="structdwc__otg__qh.html#b0e001bfd76f5781926795ac47ef2c25">data_toggle</a> = <a class="code" href="dwc__otg__cil_8h.html#e623eb446c55928b324e9636111315e1">DWC_OTG_HC_PID_DATA1</a>;
    573. 

  573. <a name="l00606"></a>00606                 }
    574. 

  574. <a name="l00607"></a>00607         } <span class="keywordflow">else</span> {
    575. 

  575. <a name="l00608"></a>00608                 <span class="keywordflow">if</span> (hctsiz.<a class="code" href="unionhctsiz__data.html#8967fa90c651bce44a3cbe90c44cf638">b</a>.<a class="code" href="unionhctsiz__data.html#d8b17af02c244e47ca0c38f933a6b3f0">pid</a> == <a class="code" href="dwc__otg__regs_8h.html#ab429f705d8fb6db88a206968e438217">DWC_HCTSIZ_DATA0</a>) {
    576. 

  576. <a name="l00609"></a>00609                         qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#e912f256e01165b573c26262247a5eff">data_toggle</a> = <a class="code" href="dwc__otg__cil_8h.html#0e843d08e80c29e82962ce9170a02a52">DWC_OTG_HC_PID_DATA0</a>;
    577. 

  577. <a name="l00610"></a>00610                 } <span class="keywordflow">else</span> {
    578. 

  578. <a name="l00611"></a>00611                         qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#e912f256e01165b573c26262247a5eff">data_toggle</a> = <a class="code" href="dwc__otg__cil_8h.html#e623eb446c55928b324e9636111315e1">DWC_OTG_HC_PID_DATA1</a>;
    579. 

  579. <a name="l00612"></a>00612                 }
    580. 

  580. <a name="l00613"></a>00613         }
    581. 

  581. <a name="l00614"></a>00614 }
    582. 

  582. <a name="l00615"></a>00615 
    583. 

  583. <a name="l00625"></a>00625 <span class="keyword">static</span> dwc_otg_halt_status_e
    584. 

  584. <a name="l00626"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#e93d54bdf873c5a31882660c2984458e">00626</a> <a class="code" href="dwc__otg__hcd__intr_8c.html#e93d54bdf873c5a31882660c2984458e">update_isoc_urb_state</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * hcd,
    585. 

  585. <a name="l00627"></a>00627                       <a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    586. 

  586. <a name="l00628"></a>00628                       <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> * hc_regs,
    587. 

  587. <a name="l00629"></a>00629                       <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd, dwc_otg_halt_status_e halt_status)
    588. 

  588. <a name="l00630"></a>00630 {
    589. 

  589. <a name="l00631"></a>00631         <a class="code" href="structdwc__otg__hcd__urb.html">dwc_otg_hcd_urb_t</a> *urb = qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>;
    590. 

  590. <a name="l00632"></a>00632         dwc_otg_halt_status_e ret_val = halt_status;
    591. 

  591. <a name="l00633"></a>00633         <span class="keyword">struct </span><a class="code" href="structdwc__otg__hcd__iso__packet__desc.html">dwc_otg_hcd_iso_packet_desc</a> *frame_desc;
    592. 

  592. <a name="l00634"></a>00634 
    593. 

  593. <a name="l00635"></a>00635         frame_desc = &amp;urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#ed542f6a2d99dba2f6b71b0d8012ec8a">iso_descs</a>[qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#c67d5f885976d0698f20d113d32b4b30">isoc_frame_index</a>];
    594. 

  594. <a name="l00636"></a>00636         <span class="keywordflow">switch</span> (halt_status) {
    595. 

  595. <a name="l00637"></a>00637         <span class="keywordflow">case</span> DWC_OTG_HC_XFER_COMPLETE:
    596. 

  596. <a name="l00638"></a>00638                 frame_desc-&gt;<a class="code" href="structdwc__otg__hcd__iso__packet__desc.html#d070772c24621c47b49ad21c6acadb94">status</a> = 0;
    597. 

  597. <a name="l00639"></a>00639                 frame_desc-&gt;<a class="code" href="structdwc__otg__hcd__iso__packet__desc.html#c00b967f4c613820b99efc0abda5178c">actual_length</a> =
    598. 

  598. <a name="l00640"></a>00640                     <a class="code" href="dwc__otg__hcd__intr_8c.html#6cdb134cbb3cdf3501ca39761137baf0">get_actual_xfer_length</a>(hc, hc_regs, qtd, halt_status, NULL);
    599. 

  599. <a name="l00641"></a>00641                     
    600. 

  600. <a name="l00642"></a>00642                 <span class="comment">/* non DWORD-aligned buffer case handling. */</span>
    601. 

  601. <a name="l00643"></a>00643                 <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#e0c3ba51a04b36656baa4e70fc63cf77">align_buff</a> &amp;&amp; frame_desc-&gt;<a class="code" href="structdwc__otg__hcd__iso__packet__desc.html#c00b967f4c613820b99efc0abda5178c">actual_length</a> &amp;&amp; hc-&gt;<a class="code" href="structdwc__hc.html#c5088d431f5efc382121f201f5d571aa">ep_is_in</a>) {
    602. 

  602. <a name="l00644"></a>00644                         dwc_memcpy(urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#99ae35ffcd6147ddb93b361ab3bcfe95">buf</a> + frame_desc-&gt;<a class="code" href="structdwc__otg__hcd__iso__packet__desc.html#246f3d147a22cd295c534253593dca4a">offset</a> + qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#839371940a7e34365e2272f3214b7e34">isoc_split_offset</a>, 
    603. 

  603. <a name="l00645"></a>00645                                    hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>-&gt;<a class="code" href="structdwc__otg__qh.html#aac9f90a6afd9056dce79d013dd2168b">dw_align_buf</a>, frame_desc-&gt;<a class="code" href="structdwc__otg__hcd__iso__packet__desc.html#c00b967f4c613820b99efc0abda5178c">actual_length</a>);
    604. 

  604. <a name="l00646"></a>00646                 }
    605. 

  605. <a name="l00647"></a>00647                 
    606. 

  606. <a name="l00648"></a>00648                 <span class="keywordflow">break</span>;
    607. 

  607. <a name="l00649"></a>00649         <span class="keywordflow">case</span> DWC_OTG_HC_XFER_FRAME_OVERRUN:
    608. 

  608. <a name="l00650"></a>00650                 urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#58c7018042c94c436637ea80354e7e28">error_count</a>++;
    609. 

  609. <a name="l00651"></a>00651                 <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#c5088d431f5efc382121f201f5d571aa">ep_is_in</a>) {
    610. 

  610. <a name="l00652"></a>00652                         frame_desc-&gt;<a class="code" href="structdwc__otg__hcd__iso__packet__desc.html#d070772c24621c47b49ad21c6acadb94">status</a> = -DWC_E_NO_STREAM_RES;
    611. 

  611. <a name="l00653"></a>00653                 } <span class="keywordflow">else</span> {
    612. 

  612. <a name="l00654"></a>00654                         frame_desc-&gt;<a class="code" href="structdwc__otg__hcd__iso__packet__desc.html#d070772c24621c47b49ad21c6acadb94">status</a> = -DWC_E_COMMUNICATION;
    613. 

  613. <a name="l00655"></a>00655                 }
    614. 

  614. <a name="l00656"></a>00656                 frame_desc-&gt;<a class="code" href="structdwc__otg__hcd__iso__packet__desc.html#c00b967f4c613820b99efc0abda5178c">actual_length</a> = 0;
    615. 

  615. <a name="l00657"></a>00657                 <span class="keywordflow">break</span>;
    616. 

  616. <a name="l00658"></a>00658         <span class="keywordflow">case</span> DWC_OTG_HC_XFER_BABBLE_ERR:
    617. 

  617. <a name="l00659"></a>00659                 urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#58c7018042c94c436637ea80354e7e28">error_count</a>++;
    618. 

  618. <a name="l00660"></a>00660                 frame_desc-&gt;<a class="code" href="structdwc__otg__hcd__iso__packet__desc.html#d070772c24621c47b49ad21c6acadb94">status</a> = -DWC_E_OVERFLOW;
    619. 

  619. <a name="l00661"></a>00661                 <span class="comment">/* Don't need to update actual_length in this case. */</span>
    620. 

  620. <a name="l00662"></a>00662                 <span class="keywordflow">break</span>;
    621. 

  621. <a name="l00663"></a>00663         <span class="keywordflow">case</span> DWC_OTG_HC_XFER_XACT_ERR:
    622. 

  622. <a name="l00664"></a>00664                 urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#58c7018042c94c436637ea80354e7e28">error_count</a>++;
    623. 

  623. <a name="l00665"></a>00665                 frame_desc-&gt;<a class="code" href="structdwc__otg__hcd__iso__packet__desc.html#d070772c24621c47b49ad21c6acadb94">status</a> = -DWC_E_PROTOCOL;
    624. 

  624. <a name="l00666"></a>00666                 frame_desc-&gt;<a class="code" href="structdwc__otg__hcd__iso__packet__desc.html#c00b967f4c613820b99efc0abda5178c">actual_length</a> =
    625. 

  625. <a name="l00667"></a>00667                     <a class="code" href="dwc__otg__hcd__intr_8c.html#6cdb134cbb3cdf3501ca39761137baf0">get_actual_xfer_length</a>(hc, hc_regs, qtd, halt_status, NULL);
    626. 

  626. <a name="l00668"></a>00668                 
    627. 

  627. <a name="l00669"></a>00669                 <span class="comment">/* non DWORD-aligned buffer case handling. */</span>
    628. 

  628. <a name="l00670"></a>00670                 <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#e0c3ba51a04b36656baa4e70fc63cf77">align_buff</a> &amp;&amp; frame_desc-&gt;<a class="code" href="structdwc__otg__hcd__iso__packet__desc.html#c00b967f4c613820b99efc0abda5178c">actual_length</a> &amp;&amp; hc-&gt;<a class="code" href="structdwc__hc.html#c5088d431f5efc382121f201f5d571aa">ep_is_in</a>) {
    629. 

  629. <a name="l00671"></a>00671                         dwc_memcpy(urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#99ae35ffcd6147ddb93b361ab3bcfe95">buf</a> + frame_desc-&gt;<a class="code" href="structdwc__otg__hcd__iso__packet__desc.html#246f3d147a22cd295c534253593dca4a">offset</a> + qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#839371940a7e34365e2272f3214b7e34">isoc_split_offset</a>, 
    630. 

  630. <a name="l00672"></a>00672                                    hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>-&gt;<a class="code" href="structdwc__otg__qh.html#aac9f90a6afd9056dce79d013dd2168b">dw_align_buf</a>, frame_desc-&gt;<a class="code" href="structdwc__otg__hcd__iso__packet__desc.html#c00b967f4c613820b99efc0abda5178c">actual_length</a>);
    631. 

  631. <a name="l00673"></a>00673                 }
    632. 

  632. <a name="l00674"></a>00674                 <span class="comment">/* Skip whole frame */</span>
    633. 

  633. <a name="l00675"></a>00675                 <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>-&gt;<a class="code" href="structdwc__otg__qh.html#8708dd009988ce20b8a8d52a4a96c5a3">do_split</a> &amp;&amp; (hc-&gt;<a class="code" href="structdwc__hc.html#e6169fbc92e4d79686097742ad646f5c">ep_type</a> == <a class="code" href="dwc__otg__cil_8h.html#152a3a5e1433bd2197672f0b5105e7a4">DWC_OTG_EP_TYPE_ISOC</a>) &amp;&amp; 
    634. 

  634. <a name="l00676"></a>00676                                 hc-&gt;<a class="code" href="structdwc__hc.html#c5088d431f5efc382121f201f5d571aa">ep_is_in</a> &amp;&amp; hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#5ade18c62c5101c603247691d3047a19">dma_enable</a>) {
    635. 

  635. <a name="l00677"></a>00677                         qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#6355e968a4d36edce3e22c89ac7b5001">complete_split</a> = 0;
    636. 

  636. <a name="l00678"></a>00678                         qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#839371940a7e34365e2272f3214b7e34">isoc_split_offset</a> = 0;
    637. 

  637. <a name="l00679"></a>00679                 }
    638. 

  638. <a name="l00680"></a>00680                         
    639. 

  639. <a name="l00681"></a>00681                 <span class="keywordflow">break</span>;
    640. 

  640. <a name="l00682"></a>00682         <span class="keywordflow">default</span>:
    641. 

  641. <a name="l00683"></a>00683                 DWC_ASSERT(1, <span class="stringliteral">"Unhandled _halt_status (%d)\n"</span>, halt_status);
    642. 

  642. <a name="l00684"></a>00684                 <span class="keywordflow">break</span>;
    643. 

  643. <a name="l00685"></a>00685         }
    644. 

  644. <a name="l00686"></a>00686         <span class="keywordflow">if</span> (++qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#c67d5f885976d0698f20d113d32b4b30">isoc_frame_index</a> == urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#570583697e8c1e4398969630bc2562f8">packet_count</a>) {
    645. 

  645. <a name="l00687"></a>00687                 <span class="comment">/*</span>
    646. 

  646. <a name="l00688"></a>00688 <span class="comment">                 * urb-&gt;status is not used for isoc transfers.</span>
    647. 

  647. <a name="l00689"></a>00689 <span class="comment">                 * The individual frame_desc statuses are used instead.</span>
    648. 

  648. <a name="l00690"></a>00690 <span class="comment">                 */</span>
    649. 

  649. <a name="l00691"></a>00691                 hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#ffefbd33a59a14b8b46406f5aaeaa2f4">fops</a>-&gt;<a class="code" href="structdwc__otg__hcd__function__ops.html#09a989481103de7468cd46ef61ace0ce">complete</a>(hcd, urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#5ba0e393ef9768275db85c00e68be477">priv</a>, urb, 0);
    650. 

  650. <a name="l00692"></a>00692                 ret_val = DWC_OTG_HC_XFER_URB_COMPLETE;
    651. 

  651. <a name="l00693"></a>00693         } <span class="keywordflow">else</span> {
    652. 

  652. <a name="l00694"></a>00694                 ret_val = DWC_OTG_HC_XFER_COMPLETE;
    653. 

  653. <a name="l00695"></a>00695         }
    654. 

  654. <a name="l00696"></a>00696         <span class="keywordflow">return</span> ret_val;
    655. 

  655. <a name="l00697"></a>00697 }
    656. 

  656. <a name="l00698"></a>00698 
    657. 

  657. <a name="l00706"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#57e9a29ec2dc8cd8d119acade0ae4ff1">00706</a> <span class="keyword">static</span> <span class="keywordtype">void</span> <a class="code" href="dwc__otg__hcd__intr_8c.html#57e9a29ec2dc8cd8d119acade0ae4ff1">deactivate_qh</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * hcd, <a class="code" href="structdwc__otg__qh.html">dwc_otg_qh_t</a> * qh, <span class="keywordtype">int</span> free_qtd)
    658. 

  658. <a name="l00707"></a>00707 {
    659. 

  659. <a name="l00708"></a>00708         <span class="keywordtype">int</span> continue_split = 0;
    660. 

  660. <a name="l00709"></a>00709         <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> *qtd;
    661. 

  661. <a name="l00710"></a>00710 
    662. 

  662. <a name="l00711"></a>00711         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"  %s(%p,%p,%d)\n"</span>, __func__, hcd, qh, free_qtd);
    663. 

  663. <a name="l00712"></a>00712 
    664. 

  664. <a name="l00713"></a>00713         qtd = DWC_CIRCLEQ_FIRST(&amp;qh-&gt;<a class="code" href="structdwc__otg__qh.html#9567d266da8e796d3467fb16ae867f8e">qtd_list</a>);
    665. 

  665. <a name="l00714"></a>00714 
    666. 

  666. <a name="l00715"></a>00715         <span class="keywordflow">if</span> (qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#6355e968a4d36edce3e22c89ac7b5001">complete_split</a>) {
    667. 

  667. <a name="l00716"></a>00716                 continue_split = 1;
    668. 

  668. <a name="l00717"></a>00717         } <span class="keywordflow">else</span> <span class="keywordflow">if</span> (qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#ab224d64d72f2ef4f10e722ebcfa29a6">isoc_split_pos</a> == <a class="code" href="dwc__otg__regs_8h.html#2297a1a33f502bc705e5c450c9864c6c">DWC_HCSPLIT_XACTPOS_MID</a> ||
    669. 

  669. <a name="l00718"></a>00718                    qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#ab224d64d72f2ef4f10e722ebcfa29a6">isoc_split_pos</a> == <a class="code" href="dwc__otg__regs_8h.html#fc237b3dd77c97276aa4bd50947117e2">DWC_HCSPLIT_XACTPOS_END</a>) {
    670. 

  670. <a name="l00719"></a>00719                 continue_split = 1;
    671. 

  671. <a name="l00720"></a>00720         }
    672. 

  672. <a name="l00721"></a>00721 
    673. 

  673. <a name="l00722"></a>00722         <span class="keywordflow">if</span> (free_qtd) {
    674. 

  674. <a name="l00723"></a>00723                 <a class="code" href="dwc__otg__hcd_8h.html#19adb6641f95448a956015b2d69ba96a">dwc_otg_hcd_qtd_remove_and_free</a>(hcd, qtd, qh);
    675. 

  675. <a name="l00724"></a>00724                 continue_split = 0;
    676. 

  676. <a name="l00725"></a>00725         }
    677. 

  677. <a name="l00726"></a>00726 
    678. 

  678. <a name="l00727"></a>00727         qh-&gt;<a class="code" href="structdwc__otg__qh.html#bbdb7d30b60b6c326301f33b35088bb4">channel</a> = NULL;
    679. 

  679. <a name="l00728"></a>00728         <a class="code" href="dwc__otg__hcd_8h.html#f88bc5b6beb674c909d1c09a819ba9d9">dwc_otg_hcd_qh_deactivate</a>(hcd, qh, continue_split);
    680. 

  680. <a name="l00729"></a>00729 }
    681. 

  681. <a name="l00730"></a>00730 
    682. 

  682. <a name="l00742"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#4f6bf01b14a03eeed81d27bffa5e99fc">00742</a> <span class="keyword">static</span> <span class="keywordtype">void</span> <a class="code" href="dwc__otg__hcd__intr_8c.html#4f6bf01b14a03eeed81d27bffa5e99fc">release_channel</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * hcd,
    683. 

  683. <a name="l00743"></a>00743                             <a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    684. 

  684. <a name="l00744"></a>00744                             <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd,
    685. 

  685. <a name="l00745"></a>00745                             dwc_otg_halt_status_e halt_status)
    686. 

  686. <a name="l00746"></a>00746 {
    687. 

  687. <a name="l00747"></a>00747         <a class="code" href="dwc__otg__hcd_8h.html#92c49783eebc5bcffa8b8a51c2127be9">dwc_otg_transaction_type_e</a> tr_type;
    688. 

  688. <a name="l00748"></a>00748         <span class="keywordtype">int</span> free_qtd;
    689. 

  689. <a name="l00749"></a>00749 
    690. 

  690. <a name="l00750"></a>00750         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"  %s: channel %d, halt_status %d\n"</span>,
    691. 

  691. <a name="l00751"></a>00751                     __func__, hc-&gt;<a class="code" href="structdwc__hc.html#df0c2b93e5c84cfaba6f06eaeaece5a1">hc_num</a>, halt_status);
    692. 

  692. <a name="l00752"></a>00752 
    693. 

  693. <a name="l00753"></a>00753         <span class="keywordflow">switch</span> (halt_status) {
    694. 

  694. <a name="l00754"></a>00754         <span class="keywordflow">case</span> DWC_OTG_HC_XFER_URB_COMPLETE:
    695. 

  695. <a name="l00755"></a>00755                 free_qtd = 1;
    696. 

  696. <a name="l00756"></a>00756                 <span class="keywordflow">break</span>;
    697. 

  697. <a name="l00757"></a>00757         <span class="keywordflow">case</span> DWC_OTG_HC_XFER_AHB_ERR:
    698. 

  698. <a name="l00758"></a>00758         <span class="keywordflow">case</span> DWC_OTG_HC_XFER_STALL:
    699. 

  699. <a name="l00759"></a>00759         <span class="keywordflow">case</span> DWC_OTG_HC_XFER_BABBLE_ERR:
    700. 

  700. <a name="l00760"></a>00760                 free_qtd = 1;
    701. 

  701. <a name="l00761"></a>00761                 <span class="keywordflow">break</span>;
    702. 

  702. <a name="l00762"></a>00762         <span class="keywordflow">case</span> DWC_OTG_HC_XFER_XACT_ERR:
    703. 

  703. <a name="l00763"></a>00763                 <span class="keywordflow">if</span> (qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#18eeb9c647049aec468bf9a7861c873f">error_count</a> &gt;= 3) {
    704. 

  704. <a name="l00764"></a>00764                         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>,
    705. 

  705. <a name="l00765"></a>00765                                     <span class="stringliteral">"  Complete URB with transaction error\n"</span>);
    706. 

  706. <a name="l00766"></a>00766                         free_qtd = 1;
    707. 

  707. <a name="l00767"></a>00767                         qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#101e4a6762b9911cdb85768890fa1210">status</a> = -DWC_E_PROTOCOL;
    708. 

  708. <a name="l00768"></a>00768                         hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#ffefbd33a59a14b8b46406f5aaeaa2f4">fops</a>-&gt;<a class="code" href="structdwc__otg__hcd__function__ops.html#09a989481103de7468cd46ef61ace0ce">complete</a>(hcd, qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#5ba0e393ef9768275db85c00e68be477">priv</a>,
    709. 

  709. <a name="l00769"></a>00769                                             qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>, -DWC_E_PROTOCOL);
    710. 

  710. <a name="l00770"></a>00770                 } <span class="keywordflow">else</span> {
    711. 

  711. <a name="l00771"></a>00771                         free_qtd = 0;
    712. 

  712. <a name="l00772"></a>00772                 }
    713. 

  713. <a name="l00773"></a>00773                 <span class="keywordflow">break</span>;
    714. 

  714. <a name="l00774"></a>00774         <span class="keywordflow">case</span> DWC_OTG_HC_XFER_URB_DEQUEUE:
    715. 

  715. <a name="l00775"></a>00775                 <span class="comment">/*</span>
    716. 

  716. <a name="l00776"></a>00776 <span class="comment">                 * The QTD has already been removed and the QH has been</span>
    717. 

  717. <a name="l00777"></a>00777 <span class="comment">                 * deactivated. Don't want to do anything except release the</span>
    718. 

  718. <a name="l00778"></a>00778 <span class="comment">                 * host channel and try to queue more transfers.</span>
    719. 

  719. <a name="l00779"></a>00779 <span class="comment">                 */</span>
    720. 

  720. <a name="l00780"></a>00780                 <span class="keywordflow">goto</span> cleanup;
    721. 

  721. <a name="l00781"></a>00781         <span class="keywordflow">case</span> DWC_OTG_HC_XFER_NO_HALT_STATUS:
    722. 

  722. <a name="l00782"></a>00782                 free_qtd = 0;
    723. 

  723. <a name="l00783"></a>00783                 <span class="keywordflow">break</span>;
    724. 

  724. <a name="l00784"></a>00784         <span class="keywordflow">default</span>:
    725. 

  725. <a name="l00785"></a>00785                 free_qtd = 0;
    726. 

  726. <a name="l00786"></a>00786                 <span class="keywordflow">break</span>;
    727. 

  727. <a name="l00787"></a>00787         }
    728. 

  728. <a name="l00788"></a>00788 
    729. 

  729. <a name="l00789"></a>00789         <a class="code" href="dwc__otg__hcd__intr_8c.html#57e9a29ec2dc8cd8d119acade0ae4ff1">deactivate_qh</a>(hcd, hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>, free_qtd);
    730. 

  730. <a name="l00790"></a>00790 
    731. 

  731. <a name="l00791"></a>00791       cleanup:
    732. 

  732. <a name="l00792"></a>00792         <span class="comment">/*</span>
    733. 

  733. <a name="l00793"></a>00793 <span class="comment">         * Release the host channel for use by other transfers. The cleanup</span>
    734. 

  734. <a name="l00794"></a>00794 <span class="comment">         * function clears the channel interrupt enables and conditions, so</span>
    735. 

  735. <a name="l00795"></a>00795 <span class="comment">         * there's no need to clear the Channel Halted interrupt separately.</span>
    736. 

  736. <a name="l00796"></a>00796 <span class="comment">         */</span>
    737. 

  737. <a name="l00797"></a>00797         <a class="code" href="dwc__otg__cil_8c.html#f05341f811fba7f6183db66faf50a867">dwc_otg_hc_cleanup</a>(hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>, hc);
    738. 

  738. <a name="l00798"></a>00798         DWC_CIRCLEQ_INSERT_TAIL(&amp;hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#1761f2e6b8f6ba82c0e0c4e561813f0f">free_hc_list</a>, hc, hc_list_entry);
    739. 

  739. <a name="l00799"></a>00799 
    740. 

  740. <a name="l00800"></a>00800         <span class="keywordflow">switch</span> (hc-&gt;<a class="code" href="structdwc__hc.html#e6169fbc92e4d79686097742ad646f5c">ep_type</a>) {
    741. 

  741. <a name="l00801"></a>00801         <span class="keywordflow">case</span> <a class="code" href="dwc__otg__cil_8h.html#64e5cd756330f5adab79b25cc8067bdc">DWC_OTG_EP_TYPE_CONTROL</a>:
    742. 

  742. <a name="l00802"></a>00802         <span class="keywordflow">case</span> <a class="code" href="dwc__otg__cil_8h.html#9b079858cda0b917316ad9161b3881e0">DWC_OTG_EP_TYPE_BULK</a>:
    743. 

  743. <a name="l00803"></a>00803                 hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e7fff26b5cce7c6c520c89f9e3c75617">non_periodic_channels</a>--;
    744. 

  744. <a name="l00804"></a>00804                 <span class="keywordflow">break</span>;
    745. 

  745. <a name="l00805"></a>00805 
    746. 

  746. <a name="l00806"></a>00806         <span class="keywordflow">default</span>:
    747. 

  747. <a name="l00807"></a>00807                 <span class="comment">/*</span>
    748. 

  748. <a name="l00808"></a>00808 <span class="comment">                 * Don't release reservations for periodic channels here.</span>
    749. 

  749. <a name="l00809"></a>00809 <span class="comment">                 * That's done when a periodic transfer is descheduled (i.e.</span>
    750. 

  750. <a name="l00810"></a>00810 <span class="comment">                 * when the QH is removed from the periodic schedule).</span>
    751. 

  751. <a name="l00811"></a>00811 <span class="comment">                 */</span>
    752. 

  752. <a name="l00812"></a>00812                 <span class="keywordflow">break</span>;
    753. 

  753. <a name="l00813"></a>00813         }
    754. 

  754. <a name="l00814"></a>00814 
    755. 

  755. <a name="l00815"></a>00815         <span class="comment">/* Try to queue more transfers now that there's a free channel. */</span>
    756. 

  756. <a name="l00816"></a>00816         tr_type = <a class="code" href="dwc__otg__hcd_8c.html#96cc299f4f0478187ed7ba49b975ffc3">dwc_otg_hcd_select_transactions</a>(hcd);
    757. 

  757. <a name="l00817"></a>00817         <span class="keywordflow">if</span> (tr_type != DWC_OTG_TRANSACTION_NONE) {
    758. 

  758. <a name="l00818"></a>00818                 <a class="code" href="dwc__otg__hcd_8c.html#2f57bf2fc3013d63101f112702b913a0">dwc_otg_hcd_queue_transactions</a>(hcd, tr_type);
    759. 

  759. <a name="l00819"></a>00819         }
    760. 

  760. <a name="l00820"></a>00820 }
    761. 

  761. <a name="l00821"></a>00821 
    762. 

  762. <a name="l00822"></a>00822 
    763. 

  763. <a name="l00833"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">00833</a> <span class="keyword">static</span> <span class="keywordtype">void</span> <a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">halt_channel</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * hcd,
    764. 

  764. <a name="l00834"></a>00834                          <a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    765. 

  765. <a name="l00835"></a>00835                          <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd, dwc_otg_halt_status_e halt_status)
    766. 

  766. <a name="l00836"></a>00836 {
    767. 

  767. <a name="l00837"></a>00837         <span class="keywordflow">if</span> (hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#5ade18c62c5101c603247691d3047a19">dma_enable</a>) {
    768. 

  768. <a name="l00838"></a>00838                 <a class="code" href="dwc__otg__hcd__intr_8c.html#4f6bf01b14a03eeed81d27bffa5e99fc">release_channel</a>(hcd, hc, qtd, halt_status);
    769. 

  769. <a name="l00839"></a>00839                 <span class="keywordflow">return</span>;
    770. 

  770. <a name="l00840"></a>00840         }
    771. 

  771. <a name="l00841"></a>00841 
    772. 

  772. <a name="l00842"></a>00842         <span class="comment">/* Slave mode processing... */</span>
    773. 

  773. <a name="l00843"></a>00843         <a class="code" href="dwc__otg__cil_8c.html#de044bf6b96c1bac92259a447ae85c0f">dwc_otg_hc_halt</a>(hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>, hc, halt_status);
    774. 

  774. <a name="l00844"></a>00844 
    775. 

  775. <a name="l00845"></a>00845         <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#c3b27b33fae73aff43a9834a1ed585da">halt_on_queue</a>) {
    776. 

  776. <a name="l00846"></a>00846                 <a class="code" href="uniongintmsk__data.html">gintmsk_data_t</a> gintmsk = {.d32 = 0 };
    777. 

  777. <a name="l00847"></a>00847                 <a class="code" href="structdwc__otg__core__global__regs.html">dwc_otg_core_global_regs_t</a> *global_regs;
    778. 

  778. <a name="l00848"></a>00848                 global_regs = hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#909eae7e3b9432ca1e278b99f7811f52">core_global_regs</a>;
    779. 

  779. <a name="l00849"></a>00849 
    780. 

  780. <a name="l00850"></a>00850                 <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#e6169fbc92e4d79686097742ad646f5c">ep_type</a> == <a class="code" href="dwc__otg__cil_8h.html#64e5cd756330f5adab79b25cc8067bdc">DWC_OTG_EP_TYPE_CONTROL</a> ||
    781. 

  781. <a name="l00851"></a>00851                     hc-&gt;<a class="code" href="structdwc__hc.html#e6169fbc92e4d79686097742ad646f5c">ep_type</a> == <a class="code" href="dwc__otg__cil_8h.html#9b079858cda0b917316ad9161b3881e0">DWC_OTG_EP_TYPE_BULK</a>) {
    782. 

  782. <a name="l00852"></a>00852                         <span class="comment">/*</span>
    783. 

  783. <a name="l00853"></a>00853 <span class="comment">                         * Make sure the Non-periodic Tx FIFO empty interrupt</span>
    784. 

  784. <a name="l00854"></a>00854 <span class="comment">                         * is enabled so that the non-periodic schedule will</span>
    785. 

  785. <a name="l00855"></a>00855 <span class="comment">                         * be processed.</span>
    786. 

  786. <a name="l00856"></a>00856 <span class="comment">                         */</span>
    787. 

  787. <a name="l00857"></a>00857                         gintmsk.<a class="code" href="uniongintmsk__data.html#6f9ac3edb378165675a3203f555aa8d6">b</a>.<a class="code" href="uniongintmsk__data.html#2c395e7bef31a4d9b2d1a3257c601be4">nptxfempty</a> = 1;
    788. 

  788. <a name="l00858"></a>00858                         dwc_modify_reg32(&amp;global_regs-&gt;<a class="code" href="structdwc__otg__core__global__regs.html#48827c76da2c6b18f369e2f2483cc4b6">gintmsk</a>, 0, gintmsk.<a class="code" href="uniongintmsk__data.html#9c007bd53320f30b3cb06eb56b96673d">d32</a>);
    789. 

  789. <a name="l00859"></a>00859                 } <span class="keywordflow">else</span> {
    790. 

  790. <a name="l00860"></a>00860                         <span class="comment">/*</span>
    791. 

  791. <a name="l00861"></a>00861 <span class="comment">                         * Move the QH from the periodic queued schedule to</span>
    792. 

  792. <a name="l00862"></a>00862 <span class="comment">                         * the periodic assigned schedule. This allows the</span>
    793. 

  793. <a name="l00863"></a>00863 <span class="comment">                         * halt to be queued when the periodic schedule is</span>
    794. 

  794. <a name="l00864"></a>00864 <span class="comment">                         * processed.</span>
    795. 

  795. <a name="l00865"></a>00865 <span class="comment">                         */</span>
    796. 

  796. <a name="l00866"></a>00866                         DWC_LIST_MOVE_HEAD(&amp;hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#4b8deae798f771135c4a99693b26873f">periodic_sched_assigned</a>,
    797. 

  797. <a name="l00867"></a>00867                                            &amp;hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>-&gt;<a class="code" href="structdwc__otg__qh.html#3e1cb9863dc72139e1832c04244c25ff">qh_list_entry</a>);
    798. 

  798. <a name="l00868"></a>00868 
    799. 

  799. <a name="l00869"></a>00869                         <span class="comment">/*</span>
    800. 

  800. <a name="l00870"></a>00870 <span class="comment">                         * Make sure the Periodic Tx FIFO Empty interrupt is</span>
    801. 

  801. <a name="l00871"></a>00871 <span class="comment">                         * enabled so that the periodic schedule will be</span>
    802. 

  802. <a name="l00872"></a>00872 <span class="comment">                         * processed.</span>
    803. 

  803. <a name="l00873"></a>00873 <span class="comment">                         */</span>
    804. 

  804. <a name="l00874"></a>00874                         gintmsk.<a class="code" href="uniongintmsk__data.html#6f9ac3edb378165675a3203f555aa8d6">b</a>.<a class="code" href="uniongintmsk__data.html#3b52444894e041c660c146af2178272f">ptxfempty</a> = 1;
    805. 

  805. <a name="l00875"></a>00875                         dwc_modify_reg32(&amp;global_regs-&gt;<a class="code" href="structdwc__otg__core__global__regs.html#48827c76da2c6b18f369e2f2483cc4b6">gintmsk</a>, 0, gintmsk.<a class="code" href="uniongintmsk__data.html#9c007bd53320f30b3cb06eb56b96673d">d32</a>);
    806. 

  806. <a name="l00876"></a>00876                 }
    807. 

  807. <a name="l00877"></a>00877         }
    808. 

  808. <a name="l00878"></a>00878 }
    809. 

  809. <a name="l00879"></a>00879 
    810. 

  810. <a name="l00885"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#2fa47944efef508dddcab00b0050ef0a">00885</a> <span class="keyword">static</span> <span class="keywordtype">void</span> <a class="code" href="dwc__otg__hcd__intr_8c.html#2fa47944efef508dddcab00b0050ef0a">complete_non_periodic_xfer</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * hcd,
    811. 

  811. <a name="l00886"></a>00886                                        <a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    812. 

  812. <a name="l00887"></a>00887                                        <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> * hc_regs,
    813. 

  813. <a name="l00888"></a>00888                                        <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd,
    814. 

  814. <a name="l00889"></a>00889                                        dwc_otg_halt_status_e halt_status)
    815. 

  815. <a name="l00890"></a>00890 {
    816. 

  816. <a name="l00891"></a>00891         <a class="code" href="unionhcint__data.html">hcint_data_t</a> hcint;
    817. 

  817. <a name="l00892"></a>00892 
    818. 

  818. <a name="l00893"></a>00893         qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#18eeb9c647049aec468bf9a7861c873f">error_count</a> = 0;
    819. 

  819. <a name="l00894"></a>00894 
    820. 

  820. <a name="l00895"></a>00895         hcint.<a class="code" href="unionhcint__data.html#05a82fa7693f875622db744716d7f73e">d32</a> = dwc_read_reg32(&amp;hc_regs-&gt;<a class="code" href="structdwc__otg__hc__regs.html#0dfd5bae537d58e13788508dc719480d">hcint</a>);
    821. 

  821. <a name="l00896"></a>00896         <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#755e54c3dfded3653447dfdd63fd8b6a">nyet</a>) {
    822. 

  822. <a name="l00897"></a>00897                 <span class="comment">/*</span>
    823. 

  823. <a name="l00898"></a>00898 <span class="comment">                 * Got a NYET on the last transaction of the transfer. This</span>
    824. 

  824. <a name="l00899"></a>00899 <span class="comment">                 * means that the endpoint should be in the PING state at the</span>
    825. 

  825. <a name="l00900"></a>00900 <span class="comment">                 * beginning of the next transfer.</span>
    826. 

  826. <a name="l00901"></a>00901 <span class="comment">                 */</span>
    827. 

  827. <a name="l00902"></a>00902                 hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>-&gt;<a class="code" href="structdwc__otg__qh.html#2c115474978a808c797c8975d72e419d">ping_state</a> = 1;
    828. 

  828. <a name="l00903"></a>00903                 <a class="code" href="dwc__otg__cil_8h.html#071cb1f3f29f9a52775e9fff270b1c7c">clear_hc_int</a>(hc_regs, nyet);
    829. 

  829. <a name="l00904"></a>00904         }
    830. 

  830. <a name="l00905"></a>00905 
    831. 

  831. <a name="l00906"></a>00906         <span class="comment">/*</span>
    832. 

  832. <a name="l00907"></a>00907 <span class="comment">         * Always halt and release the host channel to make it available for</span>
    833. 

  833. <a name="l00908"></a>00908 <span class="comment">         * more transfers. There may still be more phases for a control</span>
    834. 

  834. <a name="l00909"></a>00909 <span class="comment">         * transfer or more data packets for a bulk transfer at this point,</span>
    835. 

  835. <a name="l00910"></a>00910 <span class="comment">         * but the host channel is still halted. A channel will be reassigned</span>
    836. 

  836. <a name="l00911"></a>00911 <span class="comment">         * to the transfer when the non-periodic schedule is processed after</span>
    837. 

  837. <a name="l00912"></a>00912 <span class="comment">         * the channel is released. This allows transactions to be queued</span>
    838. 

  838. <a name="l00913"></a>00913 <span class="comment">         * properly via dwc_otg_hcd_queue_transactions, which also enables the</span>
    839. 

  839. <a name="l00914"></a>00914 <span class="comment">         * Tx FIFO Empty interrupt if necessary.</span>
    840. 

  840. <a name="l00915"></a>00915 <span class="comment">         */</span>
    841. 

  841. <a name="l00916"></a>00916         <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#c5088d431f5efc382121f201f5d571aa">ep_is_in</a>) {
    842. 

  842. <a name="l00917"></a>00917                 <span class="comment">/*</span>
    843. 

  843. <a name="l00918"></a>00918 <span class="comment">                 * IN transfers in Slave mode require an explicit disable to</span>
    844. 

  844. <a name="l00919"></a>00919 <span class="comment">                 * halt the channel. (In DMA mode, this call simply releases</span>
    845. 

  845. <a name="l00920"></a>00920 <span class="comment">                 * the channel.)</span>
    846. 

  846. <a name="l00921"></a>00921 <span class="comment">                 */</span>
    847. 

  847. <a name="l00922"></a>00922                 <a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">halt_channel</a>(hcd, hc, qtd, halt_status);
    848. 

  848. <a name="l00923"></a>00923         } <span class="keywordflow">else</span> {
    849. 

  849. <a name="l00924"></a>00924                 <span class="comment">/*</span>
    850. 

  850. <a name="l00925"></a>00925 <span class="comment">                 * The channel is automatically disabled by the core for OUT</span>
    851. 

  851. <a name="l00926"></a>00926 <span class="comment">                 * transfers in Slave mode.</span>
    852. 

  852. <a name="l00927"></a>00927 <span class="comment">                 */</span>
    853. 

  853. <a name="l00928"></a>00928                 <a class="code" href="dwc__otg__hcd__intr_8c.html#4f6bf01b14a03eeed81d27bffa5e99fc">release_channel</a>(hcd, hc, qtd, halt_status);
    854. 

  854. <a name="l00929"></a>00929         }
    855. 

  855. <a name="l00930"></a>00930 }
    856. 

  856. <a name="l00931"></a>00931 
    857. 

  857. <a name="l00937"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#a0fa0d4fa5f0af15860d685bb8fe3e50">00937</a> <span class="keyword">static</span> <span class="keywordtype">void</span> <a class="code" href="dwc__otg__hcd__intr_8c.html#a0fa0d4fa5f0af15860d685bb8fe3e50">complete_periodic_xfer</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * hcd,
    858. 

  858. <a name="l00938"></a>00938                                    <a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    859. 

  859. <a name="l00939"></a>00939                                    <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> * hc_regs,
    860. 

  860. <a name="l00940"></a>00940                                    <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd,
    861. 

  861. <a name="l00941"></a>00941                                    dwc_otg_halt_status_e halt_status)
    862. 

  862. <a name="l00942"></a>00942 {
    863. 

  863. <a name="l00943"></a>00943         <a class="code" href="unionhctsiz__data.html">hctsiz_data_t</a> hctsiz;
    864. 

  864. <a name="l00944"></a>00944         qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#18eeb9c647049aec468bf9a7861c873f">error_count</a> = 0;
    865. 

  865. <a name="l00945"></a>00945 
    866. 

  866. <a name="l00946"></a>00946         hctsiz.<a class="code" href="unionhctsiz__data.html#fb41950555c60c6015294bdefe9cd39d">d32</a> = dwc_read_reg32(&amp;hc_regs-&gt;<a class="code" href="structdwc__otg__hc__regs.html#c6173f823ba754d9f9549422b6380ca2">hctsiz</a>);
    867. 

  867. <a name="l00947"></a>00947         <span class="keywordflow">if</span> (!hc-&gt;<a class="code" href="structdwc__hc.html#c5088d431f5efc382121f201f5d571aa">ep_is_in</a> || hctsiz.<a class="code" href="unionhctsiz__data.html#8967fa90c651bce44a3cbe90c44cf638">b</a>.<a class="code" href="unionhctsiz__data.html#3ea18df5a98d33a6f8fa786252a0205b">pktcnt</a> == 0) {
    868. 

  868. <a name="l00948"></a>00948                 <span class="comment">/* Core halts channel in these cases. */</span>
    869. 

  869. <a name="l00949"></a>00949                 <a class="code" href="dwc__otg__hcd__intr_8c.html#4f6bf01b14a03eeed81d27bffa5e99fc">release_channel</a>(hcd, hc, qtd, halt_status);
    870. 

  870. <a name="l00950"></a>00950         } <span class="keywordflow">else</span> {
    871. 

  871. <a name="l00951"></a>00951                 <span class="comment">/* Flush any outstanding requests from the Tx queue. */</span>
    872. 

  872. <a name="l00952"></a>00952                 <a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">halt_channel</a>(hcd, hc, qtd, halt_status);
    873. 

  873. <a name="l00953"></a>00953         }
    874. 

  874. <a name="l00954"></a>00954 }
    875. 

  875. <a name="l00955"></a>00955 
    876. 

  876. <a name="l00956"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#a56eb0602c101ab380581b164973fb33">00956</a> <span class="keyword">static</span> int32_t <a class="code" href="dwc__otg__hcd__intr_8c.html#a56eb0602c101ab380581b164973fb33">handle_xfercomp_isoc_split_in</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * hcd,
    877. 

  877. <a name="l00957"></a>00957                                              <a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    878. 

  878. <a name="l00958"></a>00958                                              <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> * hc_regs,
    879. 

  879. <a name="l00959"></a>00959                                              <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd)
    880. 

  880. <a name="l00960"></a>00960 {
    881. 

  881. <a name="l00961"></a>00961         uint32_t len;   
    882. 

  882. <a name="l00962"></a>00962         <span class="keyword">struct </span><a class="code" href="structdwc__otg__hcd__iso__packet__desc.html">dwc_otg_hcd_iso_packet_desc</a> *frame_desc;
    883. 

  883. <a name="l00963"></a>00963         frame_desc = &amp;qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#ed542f6a2d99dba2f6b71b0d8012ec8a">iso_descs</a>[qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#c67d5f885976d0698f20d113d32b4b30">isoc_frame_index</a>];
    884. 

  884. <a name="l00964"></a>00964                                 
    885. 

  885. <a name="l00965"></a>00965         len = <a class="code" href="dwc__otg__hcd__intr_8c.html#6cdb134cbb3cdf3501ca39761137baf0">get_actual_xfer_length</a>(hc, hc_regs, qtd,
    886. 

  886. <a name="l00966"></a>00966                                      DWC_OTG_HC_XFER_COMPLETE,
    887. 

  887. <a name="l00967"></a>00967                                      NULL);
    888. 

  888. <a name="l00968"></a>00968                      
    889. 

  889. <a name="l00969"></a>00969         <span class="keywordflow">if</span> (!len) {
    890. 

  890. <a name="l00970"></a>00970                 qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#6355e968a4d36edce3e22c89ac7b5001">complete_split</a> = 0;
    891. 

  891. <a name="l00971"></a>00971                 qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#839371940a7e34365e2272f3214b7e34">isoc_split_offset</a> = 0;
    892. 

  892. <a name="l00972"></a>00972                 <span class="keywordflow">return</span> 0;
    893. 

  893. <a name="l00973"></a>00973         }
    894. 

  894. <a name="l00974"></a>00974         frame_desc-&gt;<a class="code" href="structdwc__otg__hcd__iso__packet__desc.html#c00b967f4c613820b99efc0abda5178c">actual_length</a> += len;
    895. 

  895. <a name="l00975"></a>00975         
    896. 

  896. <a name="l00976"></a>00976         <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#e0c3ba51a04b36656baa4e70fc63cf77">align_buff</a> &amp;&amp; len)
    897. 

  897. <a name="l00977"></a>00977                 dwc_memcpy(qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#99ae35ffcd6147ddb93b361ab3bcfe95">buf</a> + frame_desc-&gt;<a class="code" href="structdwc__otg__hcd__iso__packet__desc.html#246f3d147a22cd295c534253593dca4a">offset</a> + qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#839371940a7e34365e2272f3214b7e34">isoc_split_offset</a>, 
    898. 

  898. <a name="l00978"></a>00978                                                                 hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>-&gt;<a class="code" href="structdwc__otg__qh.html#aac9f90a6afd9056dce79d013dd2168b">dw_align_buf</a>, 
    899. 

  899. <a name="l00979"></a>00979                                                                 len);
    900. 

  900. <a name="l00980"></a>00980         qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#839371940a7e34365e2272f3214b7e34">isoc_split_offset</a> += len;
    901. 

  901. <a name="l00981"></a>00981         
    902. 

  902. <a name="l00982"></a>00982         <span class="keywordflow">if</span> (frame_desc-&gt;<a class="code" href="structdwc__otg__hcd__iso__packet__desc.html#8392d21b820df0181f4e6dca91234543">length</a> == frame_desc-&gt;<a class="code" href="structdwc__otg__hcd__iso__packet__desc.html#c00b967f4c613820b99efc0abda5178c">actual_length</a>) {
    903. 

  903. <a name="l00983"></a>00983                 frame_desc-&gt;<a class="code" href="structdwc__otg__hcd__iso__packet__desc.html#d070772c24621c47b49ad21c6acadb94">status</a> = 0;
    904. 

  904. <a name="l00984"></a>00984                 qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#c67d5f885976d0698f20d113d32b4b30">isoc_frame_index</a>++;
    905. 

  905. <a name="l00985"></a>00985                 qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#6355e968a4d36edce3e22c89ac7b5001">complete_split</a> = 0;
    906. 

  906. <a name="l00986"></a>00986                 qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#839371940a7e34365e2272f3214b7e34">isoc_split_offset</a> = 0;
    907. 

  907. <a name="l00987"></a>00987         }
    908. 

  908. <a name="l00988"></a>00988                         
    909. 

  909. <a name="l00989"></a>00989         <span class="keywordflow">if</span> (qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#c67d5f885976d0698f20d113d32b4b30">isoc_frame_index</a> == qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#570583697e8c1e4398969630bc2562f8">packet_count</a>) {
    910. 

  910. <a name="l00990"></a>00990                 hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#ffefbd33a59a14b8b46406f5aaeaa2f4">fops</a>-&gt;<a class="code" href="structdwc__otg__hcd__function__ops.html#09a989481103de7468cd46ef61ace0ce">complete</a>(hcd, qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#5ba0e393ef9768275db85c00e68be477">priv</a>, qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>, 0);
    911. 

  911. <a name="l00991"></a>00991                 <a class="code" href="dwc__otg__hcd__intr_8c.html#4f6bf01b14a03eeed81d27bffa5e99fc">release_channel</a>(hcd, hc, qtd, DWC_OTG_HC_XFER_URB_COMPLETE);
    912. 

  912. <a name="l00992"></a>00992         } <span class="keywordflow">else</span> {
    913. 

  913. <a name="l00993"></a>00993                 <a class="code" href="dwc__otg__hcd__intr_8c.html#4f6bf01b14a03eeed81d27bffa5e99fc">release_channel</a>(hcd, hc, qtd, DWC_OTG_HC_XFER_NO_HALT_STATUS);
    914. 

  914. <a name="l00994"></a>00994         }
    915. 

  915. <a name="l00995"></a>00995         
    916. 

  916. <a name="l00996"></a>00996         <span class="keywordflow">return</span> 1; <span class="comment">/* Indicates that channel released */</span>
    917. 

  917. <a name="l00997"></a>00997 }
    918. 

  918. <a name="l01002"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#e8bfcabff910322ef19eec9fc99fd097">01002</a> <span class="keyword">static</span> int32_t <a class="code" href="dwc__otg__hcd__intr_8c.html#e8bfcabff910322ef19eec9fc99fd097">handle_hc_xfercomp_intr</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * hcd,
    919. 

  919. <a name="l01003"></a>01003                                        <a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    920. 

  920. <a name="l01004"></a>01004                                        <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> * hc_regs,
    921. 

  921. <a name="l01005"></a>01005                                        <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd)
    922. 

  922. <a name="l01006"></a>01006 {
    923. 

  923. <a name="l01007"></a>01007         <span class="keywordtype">int</span> urb_xfer_done;
    924. 

  924. <a name="l01008"></a>01008         dwc_otg_halt_status_e halt_status = DWC_OTG_HC_XFER_COMPLETE;
    925. 

  925. <a name="l01009"></a>01009         <a class="code" href="structdwc__otg__hcd__urb.html">dwc_otg_hcd_urb_t</a> *urb = qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>;
    926. 

  926. <a name="l01010"></a>01010         <span class="keywordtype">int</span> pipe_type = <a class="code" href="dwc__otg__hcd_8h.html#b97cea598797e69d011ffef89989a739">dwc_otg_hcd_get_pipe_type</a>(&amp;urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#34ee3ac5931687b41dd726f00c558369">pipe_info</a>);
    927. 

  927. <a name="l01011"></a>01011 
    928. 

  928. <a name="l01012"></a>01012         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#e4a050e176c1c4f556da2b276a8c2b37">DBG_HCD</a>, <span class="stringliteral">"--Host Channel %d Interrupt: "</span>
    929. 

  929. <a name="l01013"></a>01013                     <span class="stringliteral">"Transfer Complete--\n"</span>, hc-&gt;<a class="code" href="structdwc__hc.html#df0c2b93e5c84cfaba6f06eaeaece5a1">hc_num</a>);
    930. 

  930. <a name="l01014"></a>01014 
    931. 

  931. <a name="l01015"></a>01015         <span class="keywordflow">if</span> (hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#7e3b96c6167eceeeb1090798f8297f1f">dma_desc_enable</a>) {
    932. 

  932. <a name="l01016"></a>01016                 <a class="code" href="dwc__otg__hcd_8h.html#ca94cde3142ff1121bb0ff9bd44fa762">dwc_otg_hcd_complete_xfer_ddma</a>(hcd, hc, hc_regs, halt_status);
    933. 

  933. <a name="l01017"></a>01017                 <span class="keywordflow">if</span> (pipe_type == UE_ISOCHRONOUS) {
    934. 

  934. <a name="l01018"></a>01018                         <span class="comment">/* Do not disable the interrupt, just clear it */</span>       
    935. 

  935. <a name="l01019"></a>01019                         <a class="code" href="dwc__otg__cil_8h.html#071cb1f3f29f9a52775e9fff270b1c7c">clear_hc_int</a>(hc_regs, xfercomp);
    936. 

  936. <a name="l01020"></a>01020                         <span class="keywordflow">return</span> 1;
    937. 

  937. <a name="l01021"></a>01021                 }
    938. 

  938. <a name="l01022"></a>01022                 <span class="keywordflow">goto</span> handle_xfercomp_done;
    939. 

  939. <a name="l01023"></a>01023         }
    940. 

  940. <a name="l01024"></a>01024 
    941. 

  941. <a name="l01025"></a>01025         <span class="comment">/*</span>
    942. 

  942. <a name="l01026"></a>01026 <span class="comment">         * Handle xfer complete on CSPLIT.</span>
    943. 

  943. <a name="l01027"></a>01027 <span class="comment">         */</span>
    944. 

  944. <a name="l01028"></a>01028 
    945. 

  945. <a name="l01029"></a>01029         <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>-&gt;<a class="code" href="structdwc__otg__qh.html#8708dd009988ce20b8a8d52a4a96c5a3">do_split</a>) {
    946. 

  946. <a name="l01030"></a>01030                 <span class="keywordflow">if</span> ((hc-&gt;<a class="code" href="structdwc__hc.html#e6169fbc92e4d79686097742ad646f5c">ep_type</a> == <a class="code" href="dwc__otg__cil_8h.html#152a3a5e1433bd2197672f0b5105e7a4">DWC_OTG_EP_TYPE_ISOC</a>) &amp;&amp; hc-&gt;<a class="code" href="structdwc__hc.html#c5088d431f5efc382121f201f5d571aa">ep_is_in</a> &amp;&amp; hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#5ade18c62c5101c603247691d3047a19">dma_enable</a>) {
    947. 

  947. <a name="l01031"></a>01031                         <span class="keywordflow">if</span> (qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#6355e968a4d36edce3e22c89ac7b5001">complete_split</a> &amp;&amp; <a class="code" href="dwc__otg__hcd__intr_8c.html#a56eb0602c101ab380581b164973fb33">handle_xfercomp_isoc_split_in</a>(hcd, hc, hc_regs, qtd))
    948. 

  948. <a name="l01032"></a>01032                                 <span class="keywordflow">goto</span> handle_xfercomp_done;
    949. 

  949. <a name="l01033"></a>01033                 }
    950. 

  950. <a name="l01034"></a>01034                 <span class="keywordflow">else</span> {
    951. 

  951. <a name="l01035"></a>01035                 qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#6355e968a4d36edce3e22c89ac7b5001">complete_split</a> = 0;
    952. 

  952. <a name="l01036"></a>01036         }
    953. 

  953. <a name="l01037"></a>01037         }       
    954. 

  954. <a name="l01038"></a>01038 
    955. 

  955. <a name="l01039"></a>01039         <span class="comment">/* Update the QTD and URB states. */</span>
    956. 

  956. <a name="l01040"></a>01040         <span class="keywordflow">switch</span> (pipe_type) {
    957. 

  957. <a name="l01041"></a>01041         <span class="keywordflow">case</span> UE_CONTROL:
    958. 

  958. <a name="l01042"></a>01042                 <span class="keywordflow">switch</span> (qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#5189ec9c992974d20477481eaf96d0bb">control_phase</a>) {
    959. 

  959. <a name="l01043"></a>01043                 <span class="keywordflow">case</span> DWC_OTG_CONTROL_SETUP:
    960. 

  960. <a name="l01044"></a>01044                         <span class="keywordflow">if</span> (urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#dca57de4fdecd894241ce24167206a45">length</a> &gt; 0) {
    961. 

  961. <a name="l01045"></a>01045                                 qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#5189ec9c992974d20477481eaf96d0bb">control_phase</a> = DWC_OTG_CONTROL_DATA;
    962. 

  962. <a name="l01046"></a>01046                         } <span class="keywordflow">else</span> {
    963. 

  963. <a name="l01047"></a>01047                                 qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#5189ec9c992974d20477481eaf96d0bb">control_phase</a> = DWC_OTG_CONTROL_STATUS;
    964. 

  964. <a name="l01048"></a>01048                         }
    965. 

  965. <a name="l01049"></a>01049                         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>,
    966. 

  966. <a name="l01050"></a>01050                                     <span class="stringliteral">"  Control setup transaction done\n"</span>);
    967. 

  967. <a name="l01051"></a>01051                         halt_status = DWC_OTG_HC_XFER_COMPLETE;
    968. 

  968. <a name="l01052"></a>01052                         <span class="keywordflow">break</span>;
    969. 

  969. <a name="l01053"></a>01053                 <span class="keywordflow">case</span> DWC_OTG_CONTROL_DATA:{
    970. 

  970. <a name="l01054"></a>01054                                 urb_xfer_done =
    971. 

  971. <a name="l01055"></a>01055                                     <a class="code" href="dwc__otg__hcd__intr_8c.html#ecb30a961e8d4831e8691d45a77162e3">update_urb_state_xfer_comp</a>(hc, hc_regs, urb,
    972. 

  972. <a name="l01056"></a>01056                                                                qtd);
    973. 

  973. <a name="l01057"></a>01057                                 <span class="keywordflow">if</span> (urb_xfer_done) {
    974. 

  974. <a name="l01058"></a>01058                                         qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#5189ec9c992974d20477481eaf96d0bb">control_phase</a> =
    975. 

  975. <a name="l01059"></a>01059                                             DWC_OTG_CONTROL_STATUS;
    976. 

  976. <a name="l01060"></a>01060                                         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>,
    977. 

  977. <a name="l01061"></a>01061                                                     <span class="stringliteral">"  Control data transfer done\n"</span>);
    978. 

  978. <a name="l01062"></a>01062                                 } <span class="keywordflow">else</span> {
    979. 

  979. <a name="l01063"></a>01063                                         <a class="code" href="dwc__otg__hcd_8h.html#8bce109004d7869bfdd9aa1075c6bd2c">dwc_otg_hcd_save_data_toggle</a>(hc, hc_regs, qtd);
    980. 

  980. <a name="l01064"></a>01064                                 }
    981. 

  981. <a name="l01065"></a>01065                                 halt_status = DWC_OTG_HC_XFER_COMPLETE;
    982. 

  982. <a name="l01066"></a>01066                                 <span class="keywordflow">break</span>;
    983. 

  983. <a name="l01067"></a>01067                         }
    984. 

  984. <a name="l01068"></a>01068                 <span class="keywordflow">case</span> DWC_OTG_CONTROL_STATUS:
    985. 

  985. <a name="l01069"></a>01069                         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"  Control transfer complete\n"</span>);
    986. 

  986. <a name="l01070"></a>01070                         <span class="keywordflow">if</span> (urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#101e4a6762b9911cdb85768890fa1210">status</a> == -DWC_E_IN_PROGRESS) {
    987. 

  987. <a name="l01071"></a>01071                                 urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#101e4a6762b9911cdb85768890fa1210">status</a> = 0;
    988. 

  988. <a name="l01072"></a>01072                         }
    989. 

  989. <a name="l01073"></a>01073                         hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#ffefbd33a59a14b8b46406f5aaeaa2f4">fops</a>-&gt;<a class="code" href="structdwc__otg__hcd__function__ops.html#09a989481103de7468cd46ef61ace0ce">complete</a>(hcd, urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#5ba0e393ef9768275db85c00e68be477">priv</a>, urb, urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#101e4a6762b9911cdb85768890fa1210">status</a>);
    990. 

  990. <a name="l01074"></a>01074                         halt_status = DWC_OTG_HC_XFER_URB_COMPLETE;
    991. 

  991. <a name="l01075"></a>01075                         <span class="keywordflow">break</span>;
    992. 

  992. <a name="l01076"></a>01076                 }
    993. 

  993. <a name="l01077"></a>01077 
    994. 

  994. <a name="l01078"></a>01078                 <a class="code" href="dwc__otg__hcd__intr_8c.html#2fa47944efef508dddcab00b0050ef0a">complete_non_periodic_xfer</a>(hcd, hc, hc_regs, qtd, halt_status);
    995. 

  995. <a name="l01079"></a>01079                 <span class="keywordflow">break</span>;
    996. 

  996. <a name="l01080"></a>01080         <span class="keywordflow">case</span> UE_BULK:
    997. 

  997. <a name="l01081"></a>01081                 <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"  Bulk transfer complete\n"</span>);
    998. 

  998. <a name="l01082"></a>01082                 urb_xfer_done =
    999. 

  999. <a name="l01083"></a>01083                     <a class="code" href="dwc__otg__hcd__intr_8c.html#ecb30a961e8d4831e8691d45a77162e3">update_urb_state_xfer_comp</a>(hc, hc_regs, urb, qtd);
    1000. 

  1000. <a name="l01084"></a>01084                 <span class="keywordflow">if</span> (urb_xfer_done) {
    1001. 

  1001. <a name="l01085"></a>01085                         hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#ffefbd33a59a14b8b46406f5aaeaa2f4">fops</a>-&gt;<a class="code" href="structdwc__otg__hcd__function__ops.html#09a989481103de7468cd46ef61ace0ce">complete</a>(hcd, urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#5ba0e393ef9768275db85c00e68be477">priv</a>, urb, urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#101e4a6762b9911cdb85768890fa1210">status</a>);
    1002. 

  1002. <a name="l01086"></a>01086                         halt_status = DWC_OTG_HC_XFER_URB_COMPLETE;
    1003. 

  1003. <a name="l01087"></a>01087                 } <span class="keywordflow">else</span> {
    1004. 

  1004. <a name="l01088"></a>01088                         halt_status = DWC_OTG_HC_XFER_COMPLETE;
    1005. 

  1005. <a name="l01089"></a>01089                 }
    1006. 

  1006. <a name="l01090"></a>01090 
    1007. 

  1007. <a name="l01091"></a>01091                 <a class="code" href="dwc__otg__hcd_8h.html#8bce109004d7869bfdd9aa1075c6bd2c">dwc_otg_hcd_save_data_toggle</a>(hc, hc_regs, qtd);
    1008. 

  1008. <a name="l01092"></a>01092                 <a class="code" href="dwc__otg__hcd__intr_8c.html#2fa47944efef508dddcab00b0050ef0a">complete_non_periodic_xfer</a>(hcd, hc, hc_regs, qtd, halt_status);
    1009. 

  1009. <a name="l01093"></a>01093                 <span class="keywordflow">break</span>;
    1010. 

  1010. <a name="l01094"></a>01094         <span class="keywordflow">case</span> UE_INTERRUPT:
    1011. 

  1011. <a name="l01095"></a>01095                 <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"  Interrupt transfer complete\n"</span>);
    1012. 

  1012. <a name="l01096"></a>01096                 <a class="code" href="dwc__otg__hcd__intr_8c.html#ecb30a961e8d4831e8691d45a77162e3">update_urb_state_xfer_comp</a>(hc, hc_regs, urb, qtd);
    1013. 

  1013. <a name="l01097"></a>01097 
    1014. 

  1014. <a name="l01098"></a>01098                 <span class="comment">/*</span>
    1015. 

  1015. <a name="l01099"></a>01099 <span class="comment">                 * Interrupt URB is done on the first transfer complete</span>
    1016. 

  1016. <a name="l01100"></a>01100 <span class="comment">                 * interrupt.</span>
    1017. 

  1017. <a name="l01101"></a>01101 <span class="comment">                 */</span>
    1018. 

  1018. <a name="l01102"></a>01102                 hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#ffefbd33a59a14b8b46406f5aaeaa2f4">fops</a>-&gt;<a class="code" href="structdwc__otg__hcd__function__ops.html#09a989481103de7468cd46ef61ace0ce">complete</a>(hcd, urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#5ba0e393ef9768275db85c00e68be477">priv</a>, urb, urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#101e4a6762b9911cdb85768890fa1210">status</a>);
    1019. 

  1019. <a name="l01103"></a>01103                 <a class="code" href="dwc__otg__hcd_8h.html#8bce109004d7869bfdd9aa1075c6bd2c">dwc_otg_hcd_save_data_toggle</a>(hc, hc_regs, qtd);
    1020. 

  1020. <a name="l01104"></a>01104                 <a class="code" href="dwc__otg__hcd__intr_8c.html#a0fa0d4fa5f0af15860d685bb8fe3e50">complete_periodic_xfer</a>(hcd, hc, hc_regs, qtd,
    1021. 

  1021. <a name="l01105"></a>01105                                        DWC_OTG_HC_XFER_URB_COMPLETE);
    1022. 

  1022. <a name="l01106"></a>01106                 <span class="keywordflow">break</span>;
    1023. 

  1023. <a name="l01107"></a>01107         <span class="keywordflow">case</span> UE_ISOCHRONOUS:
    1024. 

  1024. <a name="l01108"></a>01108                 <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"  Isochronous transfer complete\n"</span>);
    1025. 

  1025. <a name="l01109"></a>01109                 <span class="keywordflow">if</span> (qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#ab224d64d72f2ef4f10e722ebcfa29a6">isoc_split_pos</a> == <a class="code" href="dwc__otg__regs_8h.html#b8a8f35d8fd73c955cc0403e87cea0c6">DWC_HCSPLIT_XACTPOS_ALL</a>) {
    1026. 

  1026. <a name="l01110"></a>01110                         halt_status =
    1027. 

  1027. <a name="l01111"></a>01111                             <a class="code" href="dwc__otg__hcd__intr_8c.html#e93d54bdf873c5a31882660c2984458e">update_isoc_urb_state</a>(hcd, hc, hc_regs, qtd,
    1028. 

  1028. <a name="l01112"></a>01112                                                   DWC_OTG_HC_XFER_COMPLETE);
    1029. 

  1029. <a name="l01113"></a>01113                 }
    1030. 

  1030. <a name="l01114"></a>01114                 <a class="code" href="dwc__otg__hcd__intr_8c.html#a0fa0d4fa5f0af15860d685bb8fe3e50">complete_periodic_xfer</a>(hcd, hc, hc_regs, qtd, halt_status);
    1031. 

  1031. <a name="l01115"></a>01115                 <span class="keywordflow">break</span>;
    1032. 

  1032. <a name="l01116"></a>01116         }
    1033. 

  1033. <a name="l01117"></a>01117 
    1034. 

  1034. <a name="l01118"></a>01118 handle_xfercomp_done:
    1035. 

  1035. <a name="l01119"></a>01119         <a class="code" href="dwc__otg__cil_8h.html#e530fa4a6ed31f67cad65969355651ef">disable_hc_int</a>(hc_regs, xfercompl);
    1036. 

  1036. <a name="l01120"></a>01120 
    1037. 

  1037. <a name="l01121"></a>01121         <span class="keywordflow">return</span> 1;
    1038. 

  1038. <a name="l01122"></a>01122 }
    1039. 

  1039. <a name="l01123"></a>01123 
    1040. 

  1040. <a name="l01128"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#e89fabf3023fa4f0279f312e5e9d4223">01128</a> <span class="keyword">static</span> int32_t <a class="code" href="dwc__otg__hcd__intr_8c.html#e89fabf3023fa4f0279f312e5e9d4223">handle_hc_stall_intr</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * hcd,
    1041. 

  1041. <a name="l01129"></a>01129                                     <a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    1042. 

  1042. <a name="l01130"></a>01130                                     <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> * hc_regs,
    1043. 

  1043. <a name="l01131"></a>01131                                     <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd)
    1044. 

  1044. <a name="l01132"></a>01132 {
    1045. 

  1045. <a name="l01133"></a>01133         <a class="code" href="structdwc__otg__hcd__urb.html">dwc_otg_hcd_urb_t</a> *urb = qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>;
    1046. 

  1046. <a name="l01134"></a>01134         <span class="keywordtype">int</span> pipe_type = <a class="code" href="dwc__otg__hcd_8h.html#b97cea598797e69d011ffef89989a739">dwc_otg_hcd_get_pipe_type</a>(&amp;urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#34ee3ac5931687b41dd726f00c558369">pipe_info</a>);
    1047. 

  1047. <a name="l01135"></a>01135 
    1048. 

  1048. <a name="l01136"></a>01136         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#e4a050e176c1c4f556da2b276a8c2b37">DBG_HCD</a>, <span class="stringliteral">"--Host Channel %d Interrupt: "</span>
    1049. 

  1049. <a name="l01137"></a>01137                     <span class="stringliteral">"STALL Received--\n"</span>, hc-&gt;<a class="code" href="structdwc__hc.html#df0c2b93e5c84cfaba6f06eaeaece5a1">hc_num</a>);
    1050. 

  1050. <a name="l01138"></a>01138 
    1051. 

  1051. <a name="l01139"></a>01139         <span class="keywordflow">if</span> (hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#7e3b96c6167eceeeb1090798f8297f1f">dma_desc_enable</a>) {
    1052. 

  1052. <a name="l01140"></a>01140                 <a class="code" href="dwc__otg__hcd_8h.html#ca94cde3142ff1121bb0ff9bd44fa762">dwc_otg_hcd_complete_xfer_ddma</a>(hcd, hc, hc_regs, DWC_OTG_HC_XFER_STALL);
    1053. 

  1053. <a name="l01141"></a>01141                 <span class="keywordflow">goto</span> handle_stall_done;
    1054. 

  1054. <a name="l01142"></a>01142         }
    1055. 

  1055. <a name="l01143"></a>01143 
    1056. 

  1056. <a name="l01144"></a>01144         <span class="keywordflow">if</span> (pipe_type == UE_CONTROL) {
    1057. 

  1057. <a name="l01145"></a>01145                 hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#ffefbd33a59a14b8b46406f5aaeaa2f4">fops</a>-&gt;<a class="code" href="structdwc__otg__hcd__function__ops.html#09a989481103de7468cd46ef61ace0ce">complete</a>(hcd, urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#5ba0e393ef9768275db85c00e68be477">priv</a>, urb, -DWC_E_PIPE);
    1058. 

  1058. <a name="l01146"></a>01146         }
    1059. 

  1059. <a name="l01147"></a>01147 
    1060. 

  1060. <a name="l01148"></a>01148         <span class="keywordflow">if</span> (pipe_type == UE_BULK || pipe_type == UE_INTERRUPT) {
    1061. 

  1061. <a name="l01149"></a>01149                 hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#ffefbd33a59a14b8b46406f5aaeaa2f4">fops</a>-&gt;<a class="code" href="structdwc__otg__hcd__function__ops.html#09a989481103de7468cd46ef61ace0ce">complete</a>(hcd, urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#5ba0e393ef9768275db85c00e68be477">priv</a>, urb, -DWC_E_PIPE);
    1062. 

  1062. <a name="l01150"></a>01150                 <span class="comment">/*</span>
    1063. 

  1063. <a name="l01151"></a>01151 <span class="comment">                 * USB protocol requires resetting the data toggle for bulk</span>
    1064. 

  1064. <a name="l01152"></a>01152 <span class="comment">                 * and interrupt endpoints when a CLEAR_FEATURE(ENDPOINT_HALT)</span>
    1065. 

  1065. <a name="l01153"></a>01153 <span class="comment">                 * setup command is issued to the endpoint. Anticipate the</span>
    1066. 

  1066. <a name="l01154"></a>01154 <span class="comment">                 * CLEAR_FEATURE command since a STALL has occurred and reset</span>
    1067. 

  1067. <a name="l01155"></a>01155 <span class="comment">                 * the data toggle now.</span>
    1068. 

  1068. <a name="l01156"></a>01156 <span class="comment">                 */</span>
    1069. 

  1069. <a name="l01157"></a>01157                 hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>-&gt;<a class="code" href="structdwc__otg__qh.html#b0e001bfd76f5781926795ac47ef2c25">data_toggle</a> = 0;
    1070. 

  1070. <a name="l01158"></a>01158         }
    1071. 

  1071. <a name="l01159"></a>01159 
    1072. 

  1072. <a name="l01160"></a>01160         <a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">halt_channel</a>(hcd, hc, qtd, DWC_OTG_HC_XFER_STALL);
    1073. 

  1073. <a name="l01161"></a>01161 
    1074. 

  1074. <a name="l01162"></a>01162 handle_stall_done:
    1075. 

  1075. <a name="l01163"></a>01163         <a class="code" href="dwc__otg__cil_8h.html#e530fa4a6ed31f67cad65969355651ef">disable_hc_int</a>(hc_regs, stall);
    1076. 

  1076. <a name="l01164"></a>01164 
    1077. 

  1077. <a name="l01165"></a>01165         <span class="keywordflow">return</span> 1;
    1078. 

  1078. <a name="l01166"></a>01166 }
    1079. 

  1079. <a name="l01167"></a>01167 
    1080. 

  1080. <a name="l01168"></a>01168 <span class="comment">/*</span>
    1081. 

  1081. <a name="l01169"></a>01169 <span class="comment"> * Updates the state of the URB when a transfer has been stopped due to an</span>
    1082. 

  1082. <a name="l01170"></a>01170 <span class="comment"> * abnormal condition before the transfer completes. Modifies the</span>
    1083. 

  1083. <a name="l01171"></a>01171 <span class="comment"> * actual_length field of the URB to reflect the number of bytes that have</span>
    1084. 

  1084. <a name="l01172"></a>01172 <span class="comment"> * actually been transferred via the host channel.</span>
    1085. 

  1085. <a name="l01173"></a>01173 <span class="comment"> */</span>
    1086. 

  1086. <a name="l01174"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#0640c3606be7a8700ea4813e590ebf43">01174</a> <span class="keyword">static</span> <span class="keywordtype">void</span> <a class="code" href="dwc__otg__hcd__intr_8c.html#0640c3606be7a8700ea4813e590ebf43">update_urb_state_xfer_intr</a>(<a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    1087. 

  1087. <a name="l01175"></a>01175                                        <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> * hc_regs,
    1088. 

  1088. <a name="l01176"></a>01176                                        <a class="code" href="structdwc__otg__hcd__urb.html">dwc_otg_hcd_urb_t</a> * urb,
    1089. 

  1089. <a name="l01177"></a>01177                                        <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd,
    1090. 

  1090. <a name="l01178"></a>01178                                        dwc_otg_halt_status_e halt_status)
    1091. 

  1091. <a name="l01179"></a>01179 {
    1092. 

  1092. <a name="l01180"></a>01180         uint32_t bytes_transferred = <a class="code" href="dwc__otg__hcd__intr_8c.html#6cdb134cbb3cdf3501ca39761137baf0">get_actual_xfer_length</a>(hc, hc_regs, qtd,
    1093. 

  1093. <a name="l01181"></a>01181                                                             halt_status, NULL);
    1094. 

  1094. <a name="l01182"></a>01182         <span class="comment">/* non DWORD-aligned buffer case handling. */</span>
    1095. 

  1095. <a name="l01183"></a>01183         <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#e0c3ba51a04b36656baa4e70fc63cf77">align_buff</a> &amp;&amp; bytes_transferred &amp;&amp; hc-&gt;<a class="code" href="structdwc__hc.html#c5088d431f5efc382121f201f5d571aa">ep_is_in</a>) {
    1096. 

  1096. <a name="l01184"></a>01184                 dwc_memcpy(urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#99ae35ffcd6147ddb93b361ab3bcfe95">buf</a> + urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#742c8a97d3867ab89148eae34e0c73a6">actual_length</a>, hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>-&gt;<a class="code" href="structdwc__otg__qh.html#aac9f90a6afd9056dce79d013dd2168b">dw_align_buf</a>, bytes_transferred);
    1097. 

  1097. <a name="l01185"></a>01185         }
    1098. 

  1098. <a name="l01186"></a>01186         
    1099. 

  1099. <a name="l01187"></a>01187         urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#742c8a97d3867ab89148eae34e0c73a6">actual_length</a> += bytes_transferred;
    1100. 

  1100. <a name="l01188"></a>01188 
    1101. 

  1101. <a name="l01189"></a>01189 <span class="preprocessor">#ifdef DEBUG</span>
    1102. 

  1102. <a name="l01190"></a>01190 <span class="preprocessor"></span>        {
    1103. 

  1103. <a name="l01191"></a>01191                 <a class="code" href="unionhctsiz__data.html">hctsiz_data_t</a> hctsiz;
    1104. 

  1104. <a name="l01192"></a>01192                 hctsiz.<a class="code" href="unionhctsiz__data.html#fb41950555c60c6015294bdefe9cd39d">d32</a> = dwc_read_reg32(&amp;hc_regs-&gt;<a class="code" href="structdwc__otg__hc__regs.html#c6173f823ba754d9f9549422b6380ca2">hctsiz</a>);
    1105. 

  1105. <a name="l01193"></a>01193                 <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"DWC_otg: %s: %s, channel %d\n"</span>,
    1106. 

  1106. <a name="l01194"></a>01194                             __func__, (hc-&gt;<a class="code" href="structdwc__hc.html#c5088d431f5efc382121f201f5d571aa">ep_is_in</a> ? <span class="stringliteral">"IN"</span> : <span class="stringliteral">"OUT"</span>),
    1107. 

  1107. <a name="l01195"></a>01195                             hc-&gt;<a class="code" href="structdwc__hc.html#df0c2b93e5c84cfaba6f06eaeaece5a1">hc_num</a>);
    1108. 

  1108. <a name="l01196"></a>01196                 <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"  hc-&gt;start_pkt_count %d\n"</span>,
    1109. 

  1109. <a name="l01197"></a>01197                             hc-&gt;<a class="code" href="structdwc__hc.html#6c030bc725f43025d3046d17b4fbee4e">start_pkt_count</a>);
    1110. 

  1110. <a name="l01198"></a>01198                 <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"  hctsiz.pktcnt %d\n"</span>, hctsiz.<a class="code" href="unionhctsiz__data.html#8967fa90c651bce44a3cbe90c44cf638">b</a>.<a class="code" href="unionhctsiz__data.html#3ea18df5a98d33a6f8fa786252a0205b">pktcnt</a>);
    1111. 

  1111. <a name="l01199"></a>01199                 <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"  hc-&gt;max_packet %d\n"</span>, hc-&gt;<a class="code" href="structdwc__hc.html#bd88f02eb286ba01d8d1b049e8975ccb">max_packet</a>);
    1112. 

  1112. <a name="l01200"></a>01200                 <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"  bytes_transferred %d\n"</span>,
    1113. 

  1113. <a name="l01201"></a>01201                             bytes_transferred);
    1114. 

  1114. <a name="l01202"></a>01202                 <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"  urb-&gt;actual_length %d\n"</span>,
    1115. 

  1115. <a name="l01203"></a>01203                             urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#742c8a97d3867ab89148eae34e0c73a6">actual_length</a>);
    1116. 

  1116. <a name="l01204"></a>01204                 <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"  urb-&gt;transfer_buffer_length %d\n"</span>,
    1117. 

  1117. <a name="l01205"></a>01205                             urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#dca57de4fdecd894241ce24167206a45">length</a>);
    1118. 

  1118. <a name="l01206"></a>01206         }
    1119. 

  1119. <a name="l01207"></a>01207 <span class="preprocessor">#endif</span>
    1120. 

  1120. <a name="l01208"></a>01208 <span class="preprocessor"></span>}
    1121. 

  1121. <a name="l01209"></a>01209 
    1122. 

  1122. <a name="l01214"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#19f718e1e8f7cded3bb7431008ee0309">01214</a> <span class="keyword">static</span> int32_t <a class="code" href="dwc__otg__hcd__intr_8c.html#19f718e1e8f7cded3bb7431008ee0309">handle_hc_nak_intr</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * hcd,
    1123. 

  1123. <a name="l01215"></a>01215                                   <a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    1124. 

  1124. <a name="l01216"></a>01216                                   <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> * hc_regs,
    1125. 

  1125. <a name="l01217"></a>01217                                   <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd)
    1126. 

  1126. <a name="l01218"></a>01218 {
    1127. 

  1127. <a name="l01219"></a>01219         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#e4a050e176c1c4f556da2b276a8c2b37">DBG_HCD</a>, <span class="stringliteral">"--Host Channel %d Interrupt: "</span>
    1128. 

  1128. <a name="l01220"></a>01220                     <span class="stringliteral">"NAK Received--\n"</span>, hc-&gt;<a class="code" href="structdwc__hc.html#df0c2b93e5c84cfaba6f06eaeaece5a1">hc_num</a>);
    1129. 

  1129. <a name="l01221"></a>01221 
    1130. 

  1130. <a name="l01222"></a>01222         <span class="comment">/*</span>
    1131. 

  1131. <a name="l01223"></a>01223 <span class="comment">         * Handle NAK for IN/OUT SSPLIT/CSPLIT transfers, bulk, control, and</span>
    1132. 

  1132. <a name="l01224"></a>01224 <span class="comment">         * interrupt.  Re-start the SSPLIT transfer.</span>
    1133. 

  1133. <a name="l01225"></a>01225 <span class="comment">         */</span>
    1134. 

  1134. <a name="l01226"></a>01226         <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#4365ef67d517a621a626ac5392545c6d">do_split</a>) {
    1135. 

  1135. <a name="l01227"></a>01227                 <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#21e00df6fb9a555975879526118d599e">complete_split</a>) {
    1136. 

  1136. <a name="l01228"></a>01228                         qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#18eeb9c647049aec468bf9a7861c873f">error_count</a> = 0;
    1137. 

  1137. <a name="l01229"></a>01229                 }
    1138. 

  1138. <a name="l01230"></a>01230                 qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#6355e968a4d36edce3e22c89ac7b5001">complete_split</a> = 0;
    1139. 

  1139. <a name="l01231"></a>01231                 <a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">halt_channel</a>(hcd, hc, qtd, DWC_OTG_HC_XFER_NAK);
    1140. 

  1140. <a name="l01232"></a>01232                 <span class="keywordflow">goto</span> handle_nak_done;
    1141. 

  1141. <a name="l01233"></a>01233         }
    1142. 

  1142. <a name="l01234"></a>01234 
    1143. 

  1143. <a name="l01235"></a>01235         <span class="keywordflow">switch</span> (<a class="code" href="dwc__otg__hcd_8h.html#b97cea598797e69d011ffef89989a739">dwc_otg_hcd_get_pipe_type</a>(&amp;qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#34ee3ac5931687b41dd726f00c558369">pipe_info</a>)) {
    1144. 

  1144. <a name="l01236"></a>01236         <span class="keywordflow">case</span> UE_CONTROL:
    1145. 

  1145. <a name="l01237"></a>01237         <span class="keywordflow">case</span> UE_BULK:
    1146. 

  1146. <a name="l01238"></a>01238                 <span class="keywordflow">if</span> (hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#5ade18c62c5101c603247691d3047a19">dma_enable</a> &amp;&amp; hc-&gt;<a class="code" href="structdwc__hc.html#c5088d431f5efc382121f201f5d571aa">ep_is_in</a>) {
    1147. 

  1147. <a name="l01239"></a>01239                         <span class="comment">/*</span>
    1148. 

  1148. <a name="l01240"></a>01240 <span class="comment">                         * NAK interrupts are enabled on bulk/control IN</span>
    1149. 

  1149. <a name="l01241"></a>01241 <span class="comment">                         * transfers in DMA mode for the sole purpose of</span>
    1150. 

  1150. <a name="l01242"></a>01242 <span class="comment">                         * resetting the error count after a transaction error</span>
    1151. 

  1151. <a name="l01243"></a>01243 <span class="comment">                         * occurs. The core will continue transferring data.</span>
    1152. 

  1152. <a name="l01244"></a>01244 <span class="comment">                         */</span>
    1153. 

  1153. <a name="l01245"></a>01245                         qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#18eeb9c647049aec468bf9a7861c873f">error_count</a> = 0;
    1154. 

  1154. <a name="l01246"></a>01246                         <span class="keywordflow">goto</span> handle_nak_done;
    1155. 

  1155. <a name="l01247"></a>01247                 }
    1156. 

  1156. <a name="l01248"></a>01248 
    1157. 

  1157. <a name="l01249"></a>01249                 <span class="comment">/*</span>
    1158. 

  1158. <a name="l01250"></a>01250 <span class="comment">                 * NAK interrupts normally occur during OUT transfers in DMA</span>
    1159. 

  1159. <a name="l01251"></a>01251 <span class="comment">                 * or Slave mode. For IN transfers, more requests will be</span>
    1160. 

  1160. <a name="l01252"></a>01252 <span class="comment">                 * queued as request queue space is available.</span>
    1161. 

  1161. <a name="l01253"></a>01253 <span class="comment">                 */</span>
    1162. 

  1162. <a name="l01254"></a>01254                 qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#18eeb9c647049aec468bf9a7861c873f">error_count</a> = 0;
    1163. 

  1163. <a name="l01255"></a>01255 
    1164. 

  1164. <a name="l01256"></a>01256                 <span class="keywordflow">if</span> (!hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>-&gt;<a class="code" href="structdwc__otg__qh.html#2c115474978a808c797c8975d72e419d">ping_state</a>) {
    1165. 

  1165. <a name="l01257"></a>01257                         <a class="code" href="dwc__otg__hcd__intr_8c.html#0640c3606be7a8700ea4813e590ebf43">update_urb_state_xfer_intr</a>(hc, hc_regs,
    1166. 

  1166. <a name="l01258"></a>01258                                                    qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>, qtd,
    1167. 

  1167. <a name="l01259"></a>01259                                                    DWC_OTG_HC_XFER_NAK);
    1168. 

  1168. <a name="l01260"></a>01260                         <a class="code" href="dwc__otg__hcd_8h.html#8bce109004d7869bfdd9aa1075c6bd2c">dwc_otg_hcd_save_data_toggle</a>(hc, hc_regs, qtd);
    1169. 

  1169. <a name="l01261"></a>01261 
    1170. 

  1170. <a name="l01262"></a>01262                         <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#570b78178975193edb921af1ef36d37b">speed</a> == <a class="code" href="dwc__otg__cil_8h.html#b9dc03c6bc3c1113a935a73cf7021fbe">DWC_OTG_EP_SPEED_HIGH</a>)
    1171. 

  1171. <a name="l01263"></a>01263                                 hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>-&gt;<a class="code" href="structdwc__otg__qh.html#2c115474978a808c797c8975d72e419d">ping_state</a> = 1;
    1172. 

  1172. <a name="l01264"></a>01264                         }
    1173. 

  1173. <a name="l01265"></a>01265 
    1174. 

  1174. <a name="l01266"></a>01266                 <span class="comment">/*</span>
    1175. 

  1175. <a name="l01267"></a>01267 <span class="comment">                 * Halt the channel so the transfer can be re-started from</span>
    1176. 

  1176. <a name="l01268"></a>01268 <span class="comment">                 * the appropriate point or the PING protocol will</span>
    1177. 

  1177. <a name="l01269"></a>01269 <span class="comment">                 * start/continue.</span>
    1178. 

  1178. <a name="l01270"></a>01270 <span class="comment">                 */</span>
    1179. 

  1179. <a name="l01271"></a>01271                 <a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">halt_channel</a>(hcd, hc, qtd, DWC_OTG_HC_XFER_NAK);
    1180. 

  1180. <a name="l01272"></a>01272                 <span class="keywordflow">break</span>;
    1181. 

  1181. <a name="l01273"></a>01273         <span class="keywordflow">case</span> UE_INTERRUPT:
    1182. 

  1182. <a name="l01274"></a>01274                 qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#18eeb9c647049aec468bf9a7861c873f">error_count</a> = 0;
    1183. 

  1183. <a name="l01275"></a>01275                 <a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">halt_channel</a>(hcd, hc, qtd, DWC_OTG_HC_XFER_NAK);
    1184. 

  1184. <a name="l01276"></a>01276                 <span class="keywordflow">break</span>;
    1185. 

  1185. <a name="l01277"></a>01277         <span class="keywordflow">case</span> UE_ISOCHRONOUS:
    1186. 

  1186. <a name="l01278"></a>01278                 <span class="comment">/* Should never get called for isochronous transfers. */</span>
    1187. 

  1187. <a name="l01279"></a>01279                 DWC_ASSERT(1, <span class="stringliteral">"NACK interrupt for ISOC transfer\n"</span>);
    1188. 

  1188. <a name="l01280"></a>01280                 <span class="keywordflow">break</span>;
    1189. 

  1189. <a name="l01281"></a>01281         }
    1190. 

  1190. <a name="l01282"></a>01282 
    1191. 

  1191. <a name="l01283"></a>01283       handle_nak_done:
    1192. 

  1192. <a name="l01284"></a>01284         <a class="code" href="dwc__otg__cil_8h.html#e530fa4a6ed31f67cad65969355651ef">disable_hc_int</a>(hc_regs, nak);
    1193. 

  1193. <a name="l01285"></a>01285 
    1194. 

  1194. <a name="l01286"></a>01286         <span class="keywordflow">return</span> 1;
    1195. 

  1195. <a name="l01287"></a>01287 }
    1196. 

  1196. <a name="l01288"></a>01288 
    1197. 

  1197. <a name="l01294"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#243b0fb4191e46127a6823c0b5e970bb">01294</a> <span class="keyword">static</span> int32_t <a class="code" href="dwc__otg__hcd__intr_8c.html#243b0fb4191e46127a6823c0b5e970bb">handle_hc_ack_intr</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * hcd,
    1198. 

  1198. <a name="l01295"></a>01295                                   <a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    1199. 

  1199. <a name="l01296"></a>01296                                   <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> * hc_regs,
    1200. 

  1200. <a name="l01297"></a>01297                                   <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd)
    1201. 

  1201. <a name="l01298"></a>01298 {
    1202. 

  1202. <a name="l01299"></a>01299         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#e4a050e176c1c4f556da2b276a8c2b37">DBG_HCD</a>, <span class="stringliteral">"--Host Channel %d Interrupt: "</span>
    1203. 

  1203. <a name="l01300"></a>01300                     <span class="stringliteral">"ACK Received--\n"</span>, hc-&gt;<a class="code" href="structdwc__hc.html#df0c2b93e5c84cfaba6f06eaeaece5a1">hc_num</a>);
    1204. 

  1204. <a name="l01301"></a>01301 
    1205. 

  1205. <a name="l01302"></a>01302         <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#4365ef67d517a621a626ac5392545c6d">do_split</a>) {
    1206. 

  1206. <a name="l01303"></a>01303                 <span class="comment">/*</span>
    1207. 

  1207. <a name="l01304"></a>01304 <span class="comment">                 * Handle ACK on SSPLIT.</span>
    1208. 

  1208. <a name="l01305"></a>01305 <span class="comment">                 * ACK should not occur in CSPLIT.</span>
    1209. 

  1209. <a name="l01306"></a>01306 <span class="comment">                 */</span>
    1210. 

  1210. <a name="l01307"></a>01307                 <span class="keywordflow">if</span> (!hc-&gt;<a class="code" href="structdwc__hc.html#c5088d431f5efc382121f201f5d571aa">ep_is_in</a> &amp;&amp; hc-&gt;<a class="code" href="structdwc__hc.html#513427c5e8c4603ba344d4e7f9191064">data_pid_start</a> != <a class="code" href="dwc__otg__cil_8h.html#8d329f92a5ff6f9a72fc755b6b1a4e17">DWC_OTG_HC_PID_SETUP</a>) {
    1211. 

  1211. <a name="l01308"></a>01308                         qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#badffe465e850133c62c8f7e539f3fca">ssplit_out_xfer_count</a> = hc-&gt;<a class="code" href="structdwc__hc.html#ce32fe93214f1686896e924fbf61cac7">xfer_len</a>;
    1212. 

  1212. <a name="l01309"></a>01309                 }
    1213. 

  1213. <a name="l01310"></a>01310                 <span class="keywordflow">if</span> (!(hc-&gt;<a class="code" href="structdwc__hc.html#e6169fbc92e4d79686097742ad646f5c">ep_type</a> == <a class="code" href="dwc__otg__cil_8h.html#152a3a5e1433bd2197672f0b5105e7a4">DWC_OTG_EP_TYPE_ISOC</a> &amp;&amp; !hc-&gt;<a class="code" href="structdwc__hc.html#c5088d431f5efc382121f201f5d571aa">ep_is_in</a>)) {
    1214. 

  1214. <a name="l01311"></a>01311                         <span class="comment">/* Don't need complete for isochronous out transfers. */</span>
    1215. 

  1215. <a name="l01312"></a>01312                         qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#6355e968a4d36edce3e22c89ac7b5001">complete_split</a> = 1;
    1216. 

  1216. <a name="l01313"></a>01313                 }
    1217. 

  1217. <a name="l01314"></a>01314 
    1218. 

  1218. <a name="l01315"></a>01315                 <span class="comment">/* ISOC OUT */</span>
    1219. 

  1219. <a name="l01316"></a>01316                 <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#e6169fbc92e4d79686097742ad646f5c">ep_type</a> == <a class="code" href="dwc__otg__cil_8h.html#152a3a5e1433bd2197672f0b5105e7a4">DWC_OTG_EP_TYPE_ISOC</a> &amp;&amp; !hc-&gt;<a class="code" href="structdwc__hc.html#c5088d431f5efc382121f201f5d571aa">ep_is_in</a>) {
    1220. 

  1220. <a name="l01317"></a>01317                         <span class="keywordflow">switch</span> (hc-&gt;<a class="code" href="structdwc__hc.html#3cde49a724756e16eb11a027360b2d4b">xact_pos</a>) {
    1221. 

  1221. <a name="l01318"></a>01318                         <span class="keywordflow">case</span> <a class="code" href="dwc__otg__regs_8h.html#b8a8f35d8fd73c955cc0403e87cea0c6">DWC_HCSPLIT_XACTPOS_ALL</a>:
    1222. 

  1222. <a name="l01319"></a>01319                                 <span class="keywordflow">break</span>;
    1223. 

  1223. <a name="l01320"></a>01320                         <span class="keywordflow">case</span> <a class="code" href="dwc__otg__regs_8h.html#fc237b3dd77c97276aa4bd50947117e2">DWC_HCSPLIT_XACTPOS_END</a>:
    1224. 

  1224. <a name="l01321"></a>01321                                 qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#ab224d64d72f2ef4f10e722ebcfa29a6">isoc_split_pos</a> = <a class="code" href="dwc__otg__regs_8h.html#b8a8f35d8fd73c955cc0403e87cea0c6">DWC_HCSPLIT_XACTPOS_ALL</a>;
    1225. 

  1225. <a name="l01322"></a>01322                                 qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#839371940a7e34365e2272f3214b7e34">isoc_split_offset</a> = 0;
    1226. 

  1226. <a name="l01323"></a>01323                                 <span class="keywordflow">break</span>;
    1227. 

  1227. <a name="l01324"></a>01324                         <span class="keywordflow">case</span> <a class="code" href="dwc__otg__regs_8h.html#c0b856e1a71e0373153d986a3cb5b135">DWC_HCSPLIT_XACTPOS_BEGIN</a>:
    1228. 

  1228. <a name="l01325"></a>01325                         <span class="keywordflow">case</span> <a class="code" href="dwc__otg__regs_8h.html#2297a1a33f502bc705e5c450c9864c6c">DWC_HCSPLIT_XACTPOS_MID</a>:
    1229. 

  1229. <a name="l01326"></a>01326                                 <span class="comment">/*</span>
    1230. 

  1230. <a name="l01327"></a>01327 <span class="comment">                                 * For BEGIN or MID, calculate the length for</span>
    1231. 

  1231. <a name="l01328"></a>01328 <span class="comment">                                 * the next microframe to determine the correct</span>
    1232. 

  1232. <a name="l01329"></a>01329 <span class="comment">                                 * SSPLIT token, either MID or END.</span>
    1233. 

  1233. <a name="l01330"></a>01330 <span class="comment">                                 */</span>
    1234. 

  1234. <a name="l01331"></a>01331                                 {
    1235. 

  1235. <a name="l01332"></a>01332                                         <span class="keyword">struct </span><a class="code" href="structdwc__otg__hcd__iso__packet__desc.html">dwc_otg_hcd_iso_packet_desc</a>
    1236. 

  1236. <a name="l01333"></a>01333                                             *frame_desc;
    1237. 

  1237. <a name="l01334"></a>01334 
    1238. 

  1238. <a name="l01335"></a>01335                                         frame_desc =
    1239. 

  1239. <a name="l01336"></a>01336                                             &amp;qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#ed542f6a2d99dba2f6b71b0d8012ec8a">iso_descs</a>[qtd-&gt;
    1240. 

  1240. <a name="l01337"></a>01337                                                                          isoc_frame_index];
    1241. 

  1241. <a name="l01338"></a>01338                                         qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#839371940a7e34365e2272f3214b7e34">isoc_split_offset</a> += 188;
    1242. 

  1242. <a name="l01339"></a>01339 
    1243. 

  1243. <a name="l01340"></a>01340                                         <span class="keywordflow">if</span> ((frame_desc-&gt;<a class="code" href="structdwc__otg__hcd__iso__packet__desc.html#8392d21b820df0181f4e6dca91234543">length</a> -
    1244. 

  1244. <a name="l01341"></a>01341                                              qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#839371940a7e34365e2272f3214b7e34">isoc_split_offset</a>) &lt;= 188) {
    1245. 

  1245. <a name="l01342"></a>01342                                                 qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#ab224d64d72f2ef4f10e722ebcfa29a6">isoc_split_pos</a> =
    1246. 

  1246. <a name="l01343"></a>01343                                                     <a class="code" href="dwc__otg__regs_8h.html#fc237b3dd77c97276aa4bd50947117e2">DWC_HCSPLIT_XACTPOS_END</a>;
    1247. 

  1247. <a name="l01344"></a>01344                                         } <span class="keywordflow">else</span> {
    1248. 

  1248. <a name="l01345"></a>01345                                                 qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#ab224d64d72f2ef4f10e722ebcfa29a6">isoc_split_pos</a> =
    1249. 

  1249. <a name="l01346"></a>01346                                                     <a class="code" href="dwc__otg__regs_8h.html#2297a1a33f502bc705e5c450c9864c6c">DWC_HCSPLIT_XACTPOS_MID</a>;
    1250. 

  1250. <a name="l01347"></a>01347                                         }
    1251. 

  1251. <a name="l01348"></a>01348 
    1252. 

  1252. <a name="l01349"></a>01349                                 }
    1253. 

  1253. <a name="l01350"></a>01350                                 <span class="keywordflow">break</span>;
    1254. 

  1254. <a name="l01351"></a>01351                         }
    1255. 

  1255. <a name="l01352"></a>01352                 } <span class="keywordflow">else</span> {
    1256. 

  1256. <a name="l01353"></a>01353                         <a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">halt_channel</a>(hcd, hc, qtd, DWC_OTG_HC_XFER_ACK);
    1257. 

  1257. <a name="l01354"></a>01354                 }
    1258. 

  1258. <a name="l01355"></a>01355         } <span class="keywordflow">else</span> {
    1259. 

  1259. <a name="l01356"></a>01356                 qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#18eeb9c647049aec468bf9a7861c873f">error_count</a> = 0;
    1260. 

  1260. <a name="l01357"></a>01357 
    1261. 

  1261. <a name="l01358"></a>01358                 <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>-&gt;<a class="code" href="structdwc__otg__qh.html#2c115474978a808c797c8975d72e419d">ping_state</a>) {
    1262. 

  1262. <a name="l01359"></a>01359                         hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>-&gt;<a class="code" href="structdwc__otg__qh.html#2c115474978a808c797c8975d72e419d">ping_state</a> = 0;
    1263. 

  1263. <a name="l01360"></a>01360                         <span class="comment">/*</span>
    1264. 

  1264. <a name="l01361"></a>01361 <span class="comment">                         * Halt the channel so the transfer can be re-started</span>
    1265. 

  1265. <a name="l01362"></a>01362 <span class="comment">                         * from the appropriate point. This only happens in</span>
    1266. 

  1266. <a name="l01363"></a>01363 <span class="comment">                         * Slave mode. In DMA mode, the ping_state is cleared</span>
    1267. 

  1267. <a name="l01364"></a>01364 <span class="comment">                         * when the transfer is started because the core</span>
    1268. 

  1268. <a name="l01365"></a>01365 <span class="comment">                         * automatically executes the PING, then the transfer.</span>
    1269. 

  1269. <a name="l01366"></a>01366 <span class="comment">                         */</span>
    1270. 

  1270. <a name="l01367"></a>01367                         <a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">halt_channel</a>(hcd, hc, qtd, DWC_OTG_HC_XFER_ACK);
    1271. 

  1271. <a name="l01368"></a>01368                 }
    1272. 

  1272. <a name="l01369"></a>01369         }
    1273. 

  1273. <a name="l01370"></a>01370 
    1274. 

  1274. <a name="l01371"></a>01371         <span class="comment">/*</span>
    1275. 

  1275. <a name="l01372"></a>01372 <span class="comment">         * If the ACK occurred when _not_ in the PING state, let the channel</span>
    1276. 

  1276. <a name="l01373"></a>01373 <span class="comment">         * continue transferring data after clearing the error count.</span>
    1277. 

  1277. <a name="l01374"></a>01374 <span class="comment">         */</span>
    1278. 

  1278. <a name="l01375"></a>01375 
    1279. 

  1279. <a name="l01376"></a>01376         <a class="code" href="dwc__otg__cil_8h.html#e530fa4a6ed31f67cad65969355651ef">disable_hc_int</a>(hc_regs, ack);
    1280. 

  1280. <a name="l01377"></a>01377 
    1281. 

  1281. <a name="l01378"></a>01378         <span class="keywordflow">return</span> 1;
    1282. 

  1282. <a name="l01379"></a>01379 }
    1283. 

  1283. <a name="l01380"></a>01380 
    1284. 

  1284. <a name="l01388"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#5093a2b94c1d5cd1988eb93d9def298f">01388</a> <span class="keyword">static</span> int32_t <a class="code" href="dwc__otg__hcd__intr_8c.html#5093a2b94c1d5cd1988eb93d9def298f">handle_hc_nyet_intr</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * hcd,
    1285. 

  1285. <a name="l01389"></a>01389                                    <a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    1286. 

  1286. <a name="l01390"></a>01390                                    <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> * hc_regs,
    1287. 

  1287. <a name="l01391"></a>01391                                    <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd)
    1288. 

  1288. <a name="l01392"></a>01392 {
    1289. 

  1289. <a name="l01393"></a>01393         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#e4a050e176c1c4f556da2b276a8c2b37">DBG_HCD</a>, <span class="stringliteral">"--Host Channel %d Interrupt: "</span>
    1290. 

  1290. <a name="l01394"></a>01394                     <span class="stringliteral">"NYET Received--\n"</span>, hc-&gt;<a class="code" href="structdwc__hc.html#df0c2b93e5c84cfaba6f06eaeaece5a1">hc_num</a>);
    1291. 

  1291. <a name="l01395"></a>01395 
    1292. 

  1292. <a name="l01396"></a>01396         <span class="comment">/*</span>
    1293. 

  1293. <a name="l01397"></a>01397 <span class="comment">         * NYET on CSPLIT</span>
    1294. 

  1294. <a name="l01398"></a>01398 <span class="comment">         * re-do the CSPLIT immediately on non-periodic</span>
    1295. 

  1295. <a name="l01399"></a>01399 <span class="comment">         */</span>
    1296. 

  1296. <a name="l01400"></a>01400         <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#4365ef67d517a621a626ac5392545c6d">do_split</a> &amp;&amp; hc-&gt;<a class="code" href="structdwc__hc.html#21e00df6fb9a555975879526118d599e">complete_split</a>) {
    1297. 

  1297. <a name="l01401"></a>01401                 <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#c5088d431f5efc382121f201f5d571aa">ep_is_in</a> &amp;&amp; (hc-&gt;<a class="code" href="structdwc__hc.html#e6169fbc92e4d79686097742ad646f5c">ep_type</a> == <a class="code" href="dwc__otg__cil_8h.html#152a3a5e1433bd2197672f0b5105e7a4">DWC_OTG_EP_TYPE_ISOC</a>) &amp;&amp; hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#5ade18c62c5101c603247691d3047a19">dma_enable</a>) {        
    1298. 

  1298. <a name="l01402"></a>01402                         qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#6355e968a4d36edce3e22c89ac7b5001">complete_split</a> = 0;
    1299. 

  1299. <a name="l01403"></a>01403                         qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#839371940a7e34365e2272f3214b7e34">isoc_split_offset</a> = 0;
    1300. 

  1300. <a name="l01404"></a>01404                         <span class="keywordflow">if</span> (++qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#c67d5f885976d0698f20d113d32b4b30">isoc_frame_index</a> == qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#570583697e8c1e4398969630bc2562f8">packet_count</a>) {
    1301. 

  1301. <a name="l01405"></a>01405                                 hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#ffefbd33a59a14b8b46406f5aaeaa2f4">fops</a>-&gt;<a class="code" href="structdwc__otg__hcd__function__ops.html#09a989481103de7468cd46ef61ace0ce">complete</a>(hcd, qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#5ba0e393ef9768275db85c00e68be477">priv</a>, qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>, 0);
    1302. 

  1302. <a name="l01406"></a>01406                                 <a class="code" href="dwc__otg__hcd__intr_8c.html#4f6bf01b14a03eeed81d27bffa5e99fc">release_channel</a>(hcd, hc, qtd, DWC_OTG_HC_XFER_URB_COMPLETE);    
    1303. 

  1303. <a name="l01407"></a>01407                         }
    1304. 

  1304. <a name="l01408"></a>01408                         <span class="keywordflow">else</span>
    1305. 

  1305. <a name="l01409"></a>01409                                 <a class="code" href="dwc__otg__hcd__intr_8c.html#4f6bf01b14a03eeed81d27bffa5e99fc">release_channel</a>(hcd, hc, qtd, DWC_OTG_HC_XFER_NO_HALT_STATUS);  
    1306. 

  1306. <a name="l01410"></a>01410                         <span class="keywordflow">goto</span> handle_nyet_done;
    1307. 

  1307. <a name="l01411"></a>01411                 }
    1308. 

  1308. <a name="l01412"></a>01412                 
    1309. 

  1309. <a name="l01413"></a>01413                 <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#e6169fbc92e4d79686097742ad646f5c">ep_type</a> == <a class="code" href="dwc__otg__cil_8h.html#1401d1264f88530232cf51ab31cc5347">DWC_OTG_EP_TYPE_INTR</a> ||
    1310. 

  1310. <a name="l01414"></a>01414                     hc-&gt;<a class="code" href="structdwc__hc.html#e6169fbc92e4d79686097742ad646f5c">ep_type</a> == <a class="code" href="dwc__otg__cil_8h.html#152a3a5e1433bd2197672f0b5105e7a4">DWC_OTG_EP_TYPE_ISOC</a>) {
    1311. 

  1311. <a name="l01415"></a>01415                         <span class="keywordtype">int</span> frnum = <a class="code" href="dwc__otg__hcd_8c.html#f06514bd6f8c219cc72d1f467a82c056">dwc_otg_hcd_get_frame_number</a>(hcd);
    1312. 

  1312. <a name="l01416"></a>01416 
    1313. 

  1313. <a name="l01417"></a>01417                         <span class="keywordflow">if</span> (<a class="code" href="dwc__otg__hcd_8h.html#d6248403619d099d04320cb1b7c7ee99">dwc_full_frame_num</a>(frnum) !=
    1314. 

  1314. <a name="l01418"></a>01418                             <a class="code" href="dwc__otg__hcd_8h.html#d6248403619d099d04320cb1b7c7ee99">dwc_full_frame_num</a>(hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>-&gt;<a class="code" href="structdwc__otg__qh.html#977a8032f08e45a9e9bdcd558a6965d3">sched_frame</a>)) {
    1315. 

  1315. <a name="l01419"></a>01419                                 <span class="comment">/*</span>
    1316. 

  1316. <a name="l01420"></a>01420 <span class="comment">                                 * No longer in the same full speed frame.</span>
    1317. 

  1317. <a name="l01421"></a>01421 <span class="comment">                                 * Treat this as a transaction error.</span>
    1318. 

  1318. <a name="l01422"></a>01422 <span class="comment">                                 */</span>
    1319. 

  1319. <a name="l01423"></a>01423 <span class="preprocessor">#if 0</span>
    1320. 

  1320. <a name="l01424"></a>01424 <span class="preprocessor"></span>
    1321. 

  1321. <a name="l01430"></a>01430                                 qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#18eeb9c647049aec468bf9a7861c873f">error_count</a>++;
    1322. 

  1322. <a name="l01431"></a>01431 <span class="preprocessor">#endif</span>
    1323. 

  1323. <a name="l01432"></a>01432 <span class="preprocessor"></span>                                qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#6355e968a4d36edce3e22c89ac7b5001">complete_split</a> = 0;
    1324. 

  1324. <a name="l01433"></a>01433                                 <a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">halt_channel</a>(hcd, hc, qtd,
    1325. 

  1325. <a name="l01434"></a>01434                                              DWC_OTG_HC_XFER_XACT_ERR);
    1326. 

  1326. <a name="l01436"></a>01436                                 <span class="keywordflow">goto</span> handle_nyet_done;
    1327. 

  1327. <a name="l01437"></a>01437                         }
    1328. 

  1328. <a name="l01438"></a>01438                 }
    1329. 

  1329. <a name="l01439"></a>01439 
    1330. 

  1330. <a name="l01440"></a>01440                 <a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">halt_channel</a>(hcd, hc, qtd, DWC_OTG_HC_XFER_NYET);
    1331. 

  1331. <a name="l01441"></a>01441                 <span class="keywordflow">goto</span> handle_nyet_done;
    1332. 

  1332. <a name="l01442"></a>01442         }
    1333. 

  1333. <a name="l01443"></a>01443 
    1334. 

  1334. <a name="l01444"></a>01444         hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>-&gt;<a class="code" href="structdwc__otg__qh.html#2c115474978a808c797c8975d72e419d">ping_state</a> = 1;
    1335. 

  1335. <a name="l01445"></a>01445         qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#18eeb9c647049aec468bf9a7861c873f">error_count</a> = 0;
    1336. 

  1336. <a name="l01446"></a>01446 
    1337. 

  1337. <a name="l01447"></a>01447         <a class="code" href="dwc__otg__hcd__intr_8c.html#0640c3606be7a8700ea4813e590ebf43">update_urb_state_xfer_intr</a>(hc, hc_regs, qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>, qtd,
    1338. 

  1338. <a name="l01448"></a>01448                                    DWC_OTG_HC_XFER_NYET);
    1339. 

  1339. <a name="l01449"></a>01449         <a class="code" href="dwc__otg__hcd_8h.html#8bce109004d7869bfdd9aa1075c6bd2c">dwc_otg_hcd_save_data_toggle</a>(hc, hc_regs, qtd);
    1340. 

  1340. <a name="l01450"></a>01450 
    1341. 

  1341. <a name="l01451"></a>01451         <span class="comment">/*</span>
    1342. 

  1342. <a name="l01452"></a>01452 <span class="comment">         * Halt the channel and re-start the transfer so the PING</span>
    1343. 

  1343. <a name="l01453"></a>01453 <span class="comment">         * protocol will start.</span>
    1344. 

  1344. <a name="l01454"></a>01454 <span class="comment">         */</span>
    1345. 

  1345. <a name="l01455"></a>01455         <a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">halt_channel</a>(hcd, hc, qtd, DWC_OTG_HC_XFER_NYET);
    1346. 

  1346. <a name="l01456"></a>01456 
    1347. 

  1347. <a name="l01457"></a>01457       handle_nyet_done:
    1348. 

  1348. <a name="l01458"></a>01458         <a class="code" href="dwc__otg__cil_8h.html#e530fa4a6ed31f67cad65969355651ef">disable_hc_int</a>(hc_regs, nyet);
    1349. 

  1349. <a name="l01459"></a>01459         <span class="keywordflow">return</span> 1;
    1350. 

  1350. <a name="l01460"></a>01460 }
    1351. 

  1351. <a name="l01461"></a>01461 
    1352. 

  1352. <a name="l01466"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#ab5348f52aac4081a9c35d529c1fcd79">01466</a> <span class="keyword">static</span> int32_t <a class="code" href="dwc__otg__hcd__intr_8c.html#ab5348f52aac4081a9c35d529c1fcd79">handle_hc_babble_intr</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * hcd,
    1353. 

  1353. <a name="l01467"></a>01467                                      <a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    1354. 

  1354. <a name="l01468"></a>01468                                      <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> * hc_regs,
    1355. 

  1355. <a name="l01469"></a>01469                                      <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd)
    1356. 

  1356. <a name="l01470"></a>01470 {
    1357. 

  1357. <a name="l01471"></a>01471         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#e4a050e176c1c4f556da2b276a8c2b37">DBG_HCD</a>, <span class="stringliteral">"--Host Channel %d Interrupt: "</span>
    1358. 

  1358. <a name="l01472"></a>01472                     <span class="stringliteral">"Babble Error--\n"</span>, hc-&gt;<a class="code" href="structdwc__hc.html#df0c2b93e5c84cfaba6f06eaeaece5a1">hc_num</a>);
    1359. 

  1359. <a name="l01473"></a>01473         
    1360. 

  1360. <a name="l01474"></a>01474         <span class="keywordflow">if</span> (hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#7e3b96c6167eceeeb1090798f8297f1f">dma_desc_enable</a>) {
    1361. 

  1361. <a name="l01475"></a>01475                 <a class="code" href="dwc__otg__hcd_8h.html#ca94cde3142ff1121bb0ff9bd44fa762">dwc_otg_hcd_complete_xfer_ddma</a>(hcd, hc, hc_regs, DWC_OTG_HC_XFER_BABBLE_ERR);
    1362. 

  1362. <a name="l01476"></a>01476                 <span class="keywordflow">goto</span> handle_babble_done;
    1363. 

  1363. <a name="l01477"></a>01477         }
    1364. 

  1364. <a name="l01478"></a>01478 
    1365. 

  1365. <a name="l01479"></a>01479         <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#e6169fbc92e4d79686097742ad646f5c">ep_type</a> != <a class="code" href="dwc__otg__cil_8h.html#152a3a5e1433bd2197672f0b5105e7a4">DWC_OTG_EP_TYPE_ISOC</a>) {
    1366. 

  1366. <a name="l01480"></a>01480                 hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#ffefbd33a59a14b8b46406f5aaeaa2f4">fops</a>-&gt;<a class="code" href="structdwc__otg__hcd__function__ops.html#09a989481103de7468cd46ef61ace0ce">complete</a>(hcd, qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#5ba0e393ef9768275db85c00e68be477">priv</a>,
    1367. 

  1367. <a name="l01481"></a>01481                                     qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>, -DWC_E_OVERFLOW);
    1368. 

  1368. <a name="l01482"></a>01482                 <a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">halt_channel</a>(hcd, hc, qtd, DWC_OTG_HC_XFER_BABBLE_ERR);
    1369. 

  1369. <a name="l01483"></a>01483         } <span class="keywordflow">else</span> {
    1370. 

  1370. <a name="l01484"></a>01484                 dwc_otg_halt_status_e halt_status;
    1371. 

  1371. <a name="l01485"></a>01485                 halt_status = <a class="code" href="dwc__otg__hcd__intr_8c.html#e93d54bdf873c5a31882660c2984458e">update_isoc_urb_state</a>(hcd, hc, hc_regs, qtd,
    1372. 

  1372. <a name="l01486"></a>01486                                                     DWC_OTG_HC_XFER_BABBLE_ERR);
    1373. 

  1373. <a name="l01487"></a>01487                 <a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">halt_channel</a>(hcd, hc, qtd, halt_status);
    1374. 

  1374. <a name="l01488"></a>01488         }
    1375. 

  1375. <a name="l01489"></a>01489         
    1376. 

  1376. <a name="l01490"></a>01490 handle_babble_done:
    1377. 

  1377. <a name="l01491"></a>01491         <a class="code" href="dwc__otg__cil_8h.html#e530fa4a6ed31f67cad65969355651ef">disable_hc_int</a>(hc_regs, bblerr);
    1378. 

  1378. <a name="l01492"></a>01492         <span class="keywordflow">return</span> 1;
    1379. 

  1379. <a name="l01493"></a>01493 }
    1380. 

  1380. <a name="l01494"></a>01494 
    1381. 

  1381. <a name="l01499"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#1edf7eebc0475898518e18dc12c1b4b9">01499</a> <span class="keyword">static</span> int32_t <a class="code" href="dwc__otg__hcd__intr_8c.html#1edf7eebc0475898518e18dc12c1b4b9">handle_hc_ahberr_intr</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * hcd,
    1382. 

  1382. <a name="l01500"></a>01500                                      <a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    1383. 

  1383. <a name="l01501"></a>01501                                      <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> * hc_regs,
    1384. 

  1384. <a name="l01502"></a>01502                                      <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd)
    1385. 

  1385. <a name="l01503"></a>01503 {
    1386. 

  1386. <a name="l01504"></a>01504         <a class="code" href="unionhcchar__data.html">hcchar_data_t</a> hcchar;
    1387. 

  1387. <a name="l01505"></a>01505         <a class="code" href="unionhcsplt__data.html">hcsplt_data_t</a> hcsplt;
    1388. 

  1388. <a name="l01506"></a>01506         <a class="code" href="unionhctsiz__data.html">hctsiz_data_t</a> hctsiz;
    1389. 

  1389. <a name="l01507"></a>01507         uint32_t hcdma;
    1390. 

  1390. <a name="l01508"></a>01508         <span class="keywordtype">char</span> *pipetype, *speed;
    1391. 

  1391. <a name="l01509"></a>01509 
    1392. 

  1392. <a name="l01510"></a>01510         <a class="code" href="structdwc__otg__hcd__urb.html">dwc_otg_hcd_urb_t</a> *urb = qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>;
    1393. 

  1393. <a name="l01511"></a>01511 
    1394. 

  1394. <a name="l01512"></a>01512         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#e4a050e176c1c4f556da2b276a8c2b37">DBG_HCD</a>, <span class="stringliteral">"--Host Channel %d Interrupt: "</span>
    1395. 

  1395. <a name="l01513"></a>01513                     <span class="stringliteral">"AHB Error--\n"</span>, hc-&gt;<a class="code" href="structdwc__hc.html#df0c2b93e5c84cfaba6f06eaeaece5a1">hc_num</a>);
    1396. 

  1396. <a name="l01514"></a>01514 
    1397. 

  1397. <a name="l01515"></a>01515         hcchar.<a class="code" href="unionhcchar__data.html#03d352fb421ab5c11bf9afaae4933ba4">d32</a> = dwc_read_reg32(&amp;hc_regs-&gt;<a class="code" href="structdwc__otg__hc__regs.html#3d8bdf7979ea6dd5ba01858aca7a1c02">hcchar</a>);
    1398. 

  1398. <a name="l01516"></a>01516         hcsplt.<a class="code" href="unionhcsplt__data.html#0cd235b445ff681b846f5dccf24fd644">d32</a> = dwc_read_reg32(&amp;hc_regs-&gt;<a class="code" href="structdwc__otg__hc__regs.html#149053001a9ee21b692afde531a814de">hcsplt</a>);
    1399. 

  1399. <a name="l01517"></a>01517         hctsiz.<a class="code" href="unionhctsiz__data.html#fb41950555c60c6015294bdefe9cd39d">d32</a> = dwc_read_reg32(&amp;hc_regs-&gt;<a class="code" href="structdwc__otg__hc__regs.html#c6173f823ba754d9f9549422b6380ca2">hctsiz</a>);
    1400. 

  1400. <a name="l01518"></a>01518         hcdma = dwc_read_reg32(&amp;hc_regs-&gt;<a class="code" href="structdwc__otg__hc__regs.html#ab2148d4b5f1bf3a2ad438e497a8b4a3">hcdma</a>);
    1401. 

  1401. <a name="l01519"></a>01519 
    1402. 

  1402. <a name="l01520"></a>01520         DWC_ERROR(<span class="stringliteral">"AHB ERROR, Channel %d\n"</span>, hc-&gt;<a class="code" href="structdwc__hc.html#df0c2b93e5c84cfaba6f06eaeaece5a1">hc_num</a>);
    1403. 

  1403. <a name="l01521"></a>01521         DWC_ERROR(<span class="stringliteral">"  hcchar 0x%08x, hcsplt 0x%08x\n"</span>, hcchar.<a class="code" href="unionhcchar__data.html#03d352fb421ab5c11bf9afaae4933ba4">d32</a>, hcsplt.<a class="code" href="unionhcsplt__data.html#0cd235b445ff681b846f5dccf24fd644">d32</a>);
    1404. 

  1404. <a name="l01522"></a>01522         DWC_ERROR(<span class="stringliteral">"  hctsiz 0x%08x, hcdma 0x%08x\n"</span>, hctsiz.<a class="code" href="unionhctsiz__data.html#fb41950555c60c6015294bdefe9cd39d">d32</a>, hcdma);
    1405. 

  1405. <a name="l01523"></a>01523         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#e4a050e176c1c4f556da2b276a8c2b37">DBG_HCD</a>, <span class="stringliteral">"DWC OTG HCD URB Enqueue\n"</span>);
    1406. 

  1406. <a name="l01524"></a>01524         DWC_ERROR(<span class="stringliteral">"  Device address: %d\n"</span>,
    1407. 

  1407. <a name="l01525"></a>01525                   <a class="code" href="dwc__otg__hcd_8h.html#0de365358ba4472d56c1ac8074ba926b">dwc_otg_hcd_get_dev_addr</a>(&amp;urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#34ee3ac5931687b41dd726f00c558369">pipe_info</a>));
    1408. 

  1408. <a name="l01526"></a>01526         DWC_ERROR(<span class="stringliteral">"  Endpoint: %d, %s\n"</span>,
    1409. 

  1409. <a name="l01527"></a>01527                   <a class="code" href="dwc__otg__hcd_8h.html#367b79057f321cfa65023f4026d6c2c9">dwc_otg_hcd_get_ep_num</a>(&amp;urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#34ee3ac5931687b41dd726f00c558369">pipe_info</a>),
    1410. 

  1410. <a name="l01528"></a>01528                   (<a class="code" href="dwc__otg__hcd_8h.html#68de5629a8b45d9bec58f680fa4c820c">dwc_otg_hcd_is_pipe_in</a>(&amp;urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#34ee3ac5931687b41dd726f00c558369">pipe_info</a>) ? <span class="stringliteral">"IN"</span> : <span class="stringliteral">"OUT"</span>));
    1411. 

  1411. <a name="l01529"></a>01529         
    1412. 

  1412. <a name="l01530"></a>01530 
    1413. 

  1413. <a name="l01531"></a>01531         <span class="keywordflow">switch</span> (<a class="code" href="dwc__otg__hcd_8h.html#b97cea598797e69d011ffef89989a739">dwc_otg_hcd_get_pipe_type</a>(&amp;urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#34ee3ac5931687b41dd726f00c558369">pipe_info</a>)) {
    1414. 

  1414. <a name="l01532"></a>01532 <span class="keywordflow">case</span> UE_CONTROL:
    1415. 

  1415. <a name="l01533"></a>01533                 pipetype = <span class="stringliteral">"CONTROL"</span>; 
    1416. 

  1416. <a name="l01534"></a>01534                 <span class="keywordflow">break</span>; 
    1417. 

  1417. <a name="l01535"></a>01535         <span class="keywordflow">case</span> UE_BULK:
    1418. 

  1418. <a name="l01536"></a>01536                 pipetype = <span class="stringliteral">"BULK"</span>; 
    1419. 

  1419. <a name="l01537"></a>01537                 <span class="keywordflow">break</span>; 
    1420. 

  1420. <a name="l01538"></a>01538         <span class="keywordflow">case</span> UE_INTERRUPT:
    1421. 

  1421. <a name="l01539"></a>01539                 pipetype = <span class="stringliteral">"INTERRUPT"</span>; 
    1422. 

  1422. <a name="l01540"></a>01540                 <span class="keywordflow">break</span>; 
    1423. 

  1423. <a name="l01541"></a>01541         <span class="keywordflow">case</span> UE_ISOCHRONOUS:
    1424. 

  1424. <a name="l01542"></a>01542                 pipetype = <span class="stringliteral">"ISOCHRONOUS"</span>; 
    1425. 

  1425. <a name="l01543"></a>01543                 <span class="keywordflow">break</span>; 
    1426. 

  1426. <a name="l01544"></a>01544         <span class="keywordflow">default</span>:
    1427. 

  1427. <a name="l01545"></a>01545                 pipetype = <span class="stringliteral">"UNKNOWN"</span>; 
    1428. 

  1428. <a name="l01546"></a>01546                 <span class="keywordflow">break</span>;
    1429. 

  1429. <a name="l01547"></a>01547         }
    1430. 

  1430. <a name="l01548"></a>01548         
    1431. 

  1431. <a name="l01549"></a>01549         DWC_ERROR(<span class="stringliteral">"  Endpoint type: %s\n"</span>, pipetype);
    1432. 

  1432. <a name="l01550"></a>01550 
    1433. 

  1433. <a name="l01551"></a>01551         <span class="keywordflow">switch</span> (hc-&gt;<a class="code" href="structdwc__hc.html#570b78178975193edb921af1ef36d37b">speed</a>) {
    1434. 

  1434. <a name="l01552"></a>01552         <span class="keywordflow">case</span> <a class="code" href="dwc__otg__cil_8h.html#b9dc03c6bc3c1113a935a73cf7021fbe">DWC_OTG_EP_SPEED_HIGH</a>:
    1435. 

  1435. <a name="l01553"></a>01553                 speed = <span class="stringliteral">"HIGH"</span>; 
    1436. 

  1436. <a name="l01554"></a>01554                 <span class="keywordflow">break</span>; 
    1437. 

  1437. <a name="l01555"></a>01555         <span class="keywordflow">case</span> <a class="code" href="dwc__otg__cil_8h.html#2ec9a7665a34074eedf1f40681d124ef">DWC_OTG_EP_SPEED_FULL</a>:
    1438. 

  1438. <a name="l01556"></a>01556                 speed = <span class="stringliteral">"FULL"</span>; 
    1439. 

  1439. <a name="l01557"></a>01557                 <span class="keywordflow">break</span>; 
    1440. 

  1440. <a name="l01558"></a>01558         <span class="keywordflow">case</span> <a class="code" href="dwc__otg__cil_8h.html#1a25260b2e1a06850c26f7b7e5128f31">DWC_OTG_EP_SPEED_LOW</a>:
    1441. 

  1441. <a name="l01559"></a>01559                 speed = <span class="stringliteral">"LOW"</span>; 
    1442. 

  1442. <a name="l01560"></a>01560                 <span class="keywordflow">break</span>; 
    1443. 

  1443. <a name="l01561"></a>01561         <span class="keywordflow">default</span>:
    1444. 

  1444. <a name="l01562"></a>01562                 speed = <span class="stringliteral">"UNKNOWN"</span>; 
    1445. 

  1445. <a name="l01563"></a>01563                 <span class="keywordflow">break</span>;
    1446. 

  1446. <a name="l01564"></a>01564         };      
    1447. 

  1447. <a name="l01565"></a>01565 
    1448. 

  1448. <a name="l01566"></a>01566         DWC_ERROR(<span class="stringliteral">"  Speed: %s\n"</span>, speed);
    1449. 

  1449. <a name="l01567"></a>01567         
    1450. 

  1450. <a name="l01568"></a>01568         DWC_ERROR(<span class="stringliteral">"  Max packet size: %d\n"</span>,
    1451. 

  1451. <a name="l01569"></a>01569                   <a class="code" href="dwc__otg__hcd_8h.html#e47df3e0ac1c8ccc916e0c0895568c88">dwc_otg_hcd_get_mps</a>(&amp;urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#34ee3ac5931687b41dd726f00c558369">pipe_info</a>));
    1452. 

  1452. <a name="l01570"></a>01570         DWC_ERROR(<span class="stringliteral">"  Data buffer length: %d\n"</span>, urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#dca57de4fdecd894241ce24167206a45">length</a>);
    1453. 

  1453. <a name="l01571"></a>01571         DWC_ERROR(<span class="stringliteral">"  Transfer buffer: %p, Transfer DMA: %p\n"</span>,
    1454. 

  1454. <a name="l01572"></a>01572                   urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#99ae35ffcd6147ddb93b361ab3bcfe95">buf</a>, (<span class="keywordtype">void</span> *)urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#4e177a55239e95ae2f6c8b6b913f67fc">dma</a>);
    1455. 

  1455. <a name="l01573"></a>01573         DWC_ERROR(<span class="stringliteral">"  Setup buffer: %p, Setup DMA: %p\n"</span>,
    1456. 

  1456. <a name="l01574"></a>01574                   urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#254afd954f3e24bb92841384183a317c">setup_packet</a>, (<span class="keywordtype">void</span> *)urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#497f61f9b3f6f77f6b844e31c047264d">setup_dma</a>);
    1457. 

  1457. <a name="l01575"></a>01575         DWC_ERROR(<span class="stringliteral">"  Interval: %d\n"</span>, urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#49c5353377e2fb173f1b34ae7be7e257">interval</a>);
    1458. 

  1458. <a name="l01576"></a>01576 
    1459. 

  1459. <a name="l01577"></a>01577         <span class="comment">/* Core haltes the channel for Descriptor DMA mode */</span>
    1460. 

  1460. <a name="l01578"></a>01578         <span class="keywordflow">if</span> (hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#7e3b96c6167eceeeb1090798f8297f1f">dma_desc_enable</a>) {
    1461. 

  1461. <a name="l01579"></a>01579                 <a class="code" href="dwc__otg__hcd_8h.html#ca94cde3142ff1121bb0ff9bd44fa762">dwc_otg_hcd_complete_xfer_ddma</a>(hcd, hc, hc_regs, DWC_OTG_HC_XFER_AHB_ERR);
    1462. 

  1462. <a name="l01580"></a>01580                 <span class="keywordflow">goto</span> handle_ahberr_done;
    1463. 

  1463. <a name="l01581"></a>01581         }
    1464. 

  1464. <a name="l01582"></a>01582 
    1465. 

  1465. <a name="l01583"></a>01583         hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#ffefbd33a59a14b8b46406f5aaeaa2f4">fops</a>-&gt;<a class="code" href="structdwc__otg__hcd__function__ops.html#09a989481103de7468cd46ef61ace0ce">complete</a>(hcd, urb-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#5ba0e393ef9768275db85c00e68be477">priv</a>, urb, -DWC_E_IO);
    1466. 

  1466. <a name="l01584"></a>01584 
    1467. 

  1467. <a name="l01585"></a>01585         <span class="comment">/*</span>
    1468. 

  1468. <a name="l01586"></a>01586 <span class="comment">         * Force a channel halt. Don't call halt_channel because that won't</span>
    1469. 

  1469. <a name="l01587"></a>01587 <span class="comment">         * write to the HCCHARn register in DMA mode to force the halt.</span>
    1470. 

  1470. <a name="l01588"></a>01588 <span class="comment">         */</span>
    1471. 

  1471. <a name="l01589"></a>01589         <a class="code" href="dwc__otg__cil_8c.html#de044bf6b96c1bac92259a447ae85c0f">dwc_otg_hc_halt</a>(hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>, hc, DWC_OTG_HC_XFER_AHB_ERR);
    1472. 

  1472. <a name="l01590"></a>01590 handle_ahberr_done:
    1473. 

  1473. <a name="l01591"></a>01591         <a class="code" href="dwc__otg__cil_8h.html#e530fa4a6ed31f67cad65969355651ef">disable_hc_int</a>(hc_regs, ahberr);
    1474. 

  1474. <a name="l01592"></a>01592         <span class="keywordflow">return</span> 1;
    1475. 

  1475. <a name="l01593"></a>01593 }
    1476. 

  1476. <a name="l01594"></a>01594 
    1477. 

  1477. <a name="l01599"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#464af1671bd416d5db48a51fc93366ee">01599</a> <span class="keyword">static</span> int32_t <a class="code" href="dwc__otg__hcd__intr_8c.html#464af1671bd416d5db48a51fc93366ee">handle_hc_xacterr_intr</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * hcd,
    1478. 

  1478. <a name="l01600"></a>01600                                       <a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    1479. 

  1479. <a name="l01601"></a>01601                                       <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> * hc_regs,
    1480. 

  1480. <a name="l01602"></a>01602                                       <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd)
    1481. 

  1481. <a name="l01603"></a>01603 {
    1482. 

  1482. <a name="l01604"></a>01604         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#e4a050e176c1c4f556da2b276a8c2b37">DBG_HCD</a>, <span class="stringliteral">"--Host Channel %d Interrupt: "</span>
    1483. 

  1483. <a name="l01605"></a>01605                     <span class="stringliteral">"Transaction Error--\n"</span>, hc-&gt;<a class="code" href="structdwc__hc.html#df0c2b93e5c84cfaba6f06eaeaece5a1">hc_num</a>);
    1484. 

  1484. <a name="l01606"></a>01606 
    1485. 

  1485. <a name="l01607"></a>01607         <span class="keywordflow">if</span> (hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#7e3b96c6167eceeeb1090798f8297f1f">dma_desc_enable</a>) {
    1486. 

  1486. <a name="l01608"></a>01608                 <a class="code" href="dwc__otg__hcd_8h.html#ca94cde3142ff1121bb0ff9bd44fa762">dwc_otg_hcd_complete_xfer_ddma</a>(hcd, hc, hc_regs, DWC_OTG_HC_XFER_XACT_ERR);
    1487. 

  1487. <a name="l01609"></a>01609                 <span class="keywordflow">goto</span> handle_xacterr_done;
    1488. 

  1488. <a name="l01610"></a>01610         }
    1489. 

  1489. <a name="l01611"></a>01611 
    1490. 

  1490. <a name="l01612"></a>01612         <span class="keywordflow">switch</span> (<a class="code" href="dwc__otg__hcd_8h.html#b97cea598797e69d011ffef89989a739">dwc_otg_hcd_get_pipe_type</a>(&amp;qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#34ee3ac5931687b41dd726f00c558369">pipe_info</a>)) {
    1491. 

  1491. <a name="l01613"></a>01613         <span class="keywordflow">case</span> UE_CONTROL:
    1492. 

  1492. <a name="l01614"></a>01614         <span class="keywordflow">case</span> UE_BULK:
    1493. 

  1493. <a name="l01615"></a>01615                 qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#18eeb9c647049aec468bf9a7861c873f">error_count</a>++;
    1494. 

  1494. <a name="l01616"></a>01616                 <span class="keywordflow">if</span> (!hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>-&gt;<a class="code" href="structdwc__otg__qh.html#2c115474978a808c797c8975d72e419d">ping_state</a>) {
    1495. 

  1495. <a name="l01617"></a>01617 
    1496. 

  1496. <a name="l01618"></a>01618                         <a class="code" href="dwc__otg__hcd__intr_8c.html#0640c3606be7a8700ea4813e590ebf43">update_urb_state_xfer_intr</a>(hc, hc_regs,
    1497. 

  1497. <a name="l01619"></a>01619                                                    qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>, qtd,
    1498. 

  1498. <a name="l01620"></a>01620                                                    DWC_OTG_HC_XFER_XACT_ERR);
    1499. 

  1499. <a name="l01621"></a>01621                         <a class="code" href="dwc__otg__hcd_8h.html#8bce109004d7869bfdd9aa1075c6bd2c">dwc_otg_hcd_save_data_toggle</a>(hc, hc_regs, qtd);
    1500. 

  1500. <a name="l01622"></a>01622                         <span class="keywordflow">if</span> (!hc-&gt;<a class="code" href="structdwc__hc.html#c5088d431f5efc382121f201f5d571aa">ep_is_in</a> &amp;&amp; hc-&gt;<a class="code" href="structdwc__hc.html#570b78178975193edb921af1ef36d37b">speed</a> == <a class="code" href="dwc__otg__cil_8h.html#b9dc03c6bc3c1113a935a73cf7021fbe">DWC_OTG_EP_SPEED_HIGH</a>) {
    1501. 

  1501. <a name="l01623"></a>01623                                 hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>-&gt;<a class="code" href="structdwc__otg__qh.html#2c115474978a808c797c8975d72e419d">ping_state</a> = 1;
    1502. 

  1502. <a name="l01624"></a>01624                         }
    1503. 

  1503. <a name="l01625"></a>01625                 }
    1504. 

  1504. <a name="l01626"></a>01626 
    1505. 

  1505. <a name="l01627"></a>01627                 <span class="comment">/*</span>
    1506. 

  1506. <a name="l01628"></a>01628 <span class="comment">                 * Halt the channel so the transfer can be re-started from</span>
    1507. 

  1507. <a name="l01629"></a>01629 <span class="comment">                 * the appropriate point or the PING protocol will start.</span>
    1508. 

  1508. <a name="l01630"></a>01630 <span class="comment">                 */</span>
    1509. 

  1509. <a name="l01631"></a>01631                 <a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">halt_channel</a>(hcd, hc, qtd, DWC_OTG_HC_XFER_XACT_ERR);
    1510. 

  1510. <a name="l01632"></a>01632                 <span class="keywordflow">break</span>;
    1511. 

  1511. <a name="l01633"></a>01633         <span class="keywordflow">case</span> UE_INTERRUPT:
    1512. 

  1512. <a name="l01634"></a>01634                 qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#18eeb9c647049aec468bf9a7861c873f">error_count</a>++;
    1513. 

  1513. <a name="l01635"></a>01635                 <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#4365ef67d517a621a626ac5392545c6d">do_split</a> &amp;&amp; hc-&gt;<a class="code" href="structdwc__hc.html#21e00df6fb9a555975879526118d599e">complete_split</a>) {
    1514. 

  1514. <a name="l01636"></a>01636                         qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#6355e968a4d36edce3e22c89ac7b5001">complete_split</a> = 0;
    1515. 

  1515. <a name="l01637"></a>01637                 }
    1516. 

  1516. <a name="l01638"></a>01638                 <a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">halt_channel</a>(hcd, hc, qtd, DWC_OTG_HC_XFER_XACT_ERR);
    1517. 

  1517. <a name="l01639"></a>01639                 <span class="keywordflow">break</span>;
    1518. 

  1518. <a name="l01640"></a>01640         <span class="keywordflow">case</span> UE_ISOCHRONOUS:
    1519. 

  1519. <a name="l01641"></a>01641                 {
    1520. 

  1520. <a name="l01642"></a>01642                         dwc_otg_halt_status_e halt_status;
    1521. 

  1521. <a name="l01643"></a>01643                         halt_status =
    1522. 

  1522. <a name="l01644"></a>01644                             <a class="code" href="dwc__otg__hcd__intr_8c.html#e93d54bdf873c5a31882660c2984458e">update_isoc_urb_state</a>(hcd, hc, hc_regs, qtd,
    1523. 

  1523. <a name="l01645"></a>01645                                                   DWC_OTG_HC_XFER_XACT_ERR);
    1524. 

  1524. <a name="l01646"></a>01646 
    1525. 

  1525. <a name="l01647"></a>01647                         <a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">halt_channel</a>(hcd, hc, qtd, halt_status);
    1526. 

  1526. <a name="l01648"></a>01648                 }
    1527. 

  1527. <a name="l01649"></a>01649                 <span class="keywordflow">break</span>;
    1528. 

  1528. <a name="l01650"></a>01650         }
    1529. 

  1529. <a name="l01651"></a>01651 handle_xacterr_done:
    1530. 

  1530. <a name="l01652"></a>01652         <a class="code" href="dwc__otg__cil_8h.html#e530fa4a6ed31f67cad65969355651ef">disable_hc_int</a>(hc_regs, xacterr);
    1531. 

  1531. <a name="l01653"></a>01653 
    1532. 

  1532. <a name="l01654"></a>01654         <span class="keywordflow">return</span> 1;
    1533. 

  1533. <a name="l01655"></a>01655 }
    1534. 

  1534. <a name="l01656"></a>01656 
    1535. 

  1535. <a name="l01661"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#a30d61b2809dccf609bcf83cc61c9d63">01661</a> <span class="keyword">static</span> int32_t <a class="code" href="dwc__otg__hcd__intr_8c.html#a30d61b2809dccf609bcf83cc61c9d63">handle_hc_frmovrun_intr</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * hcd,
    1536. 

  1536. <a name="l01662"></a>01662                                        <a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    1537. 

  1537. <a name="l01663"></a>01663                                        <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> * hc_regs,
    1538. 

  1538. <a name="l01664"></a>01664                                        <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd)
    1539. 

  1539. <a name="l01665"></a>01665 {
    1540. 

  1540. <a name="l01666"></a>01666         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#e4a050e176c1c4f556da2b276a8c2b37">DBG_HCD</a>, <span class="stringliteral">"--Host Channel %d Interrupt: "</span>
    1541. 

  1541. <a name="l01667"></a>01667                     <span class="stringliteral">"Frame Overrun--\n"</span>, hc-&gt;<a class="code" href="structdwc__hc.html#df0c2b93e5c84cfaba6f06eaeaece5a1">hc_num</a>);
    1542. 

  1542. <a name="l01668"></a>01668 
    1543. 

  1543. <a name="l01669"></a>01669         <span class="keywordflow">switch</span> (<a class="code" href="dwc__otg__hcd_8h.html#b97cea598797e69d011ffef89989a739">dwc_otg_hcd_get_pipe_type</a>(&amp;qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#7e7767808e8eb9d71de0db00f57553f9">urb</a>-&gt;<a class="code" href="structdwc__otg__hcd__urb.html#34ee3ac5931687b41dd726f00c558369">pipe_info</a>)) {
    1544. 

  1544. <a name="l01670"></a>01670         <span class="keywordflow">case</span> UE_CONTROL:
    1545. 

  1545. <a name="l01671"></a>01671         <span class="keywordflow">case</span> UE_BULK:
    1546. 

  1546. <a name="l01672"></a>01672                 <span class="keywordflow">break</span>;
    1547. 

  1547. <a name="l01673"></a>01673         <span class="keywordflow">case</span> UE_INTERRUPT:
    1548. 

  1548. <a name="l01674"></a>01674                 <a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">halt_channel</a>(hcd, hc, qtd, DWC_OTG_HC_XFER_FRAME_OVERRUN);
    1549. 

  1549. <a name="l01675"></a>01675                 <span class="keywordflow">break</span>;
    1550. 

  1550. <a name="l01676"></a>01676         <span class="keywordflow">case</span> UE_ISOCHRONOUS:
    1551. 

  1551. <a name="l01677"></a>01677                 {
    1552. 

  1552. <a name="l01678"></a>01678                         dwc_otg_halt_status_e halt_status;
    1553. 

  1553. <a name="l01679"></a>01679                         halt_status =
    1554. 

  1554. <a name="l01680"></a>01680                             <a class="code" href="dwc__otg__hcd__intr_8c.html#e93d54bdf873c5a31882660c2984458e">update_isoc_urb_state</a>(hcd, hc, hc_regs, qtd,
    1555. 

  1555. <a name="l01681"></a>01681                                                   DWC_OTG_HC_XFER_FRAME_OVERRUN);
    1556. 

  1556. <a name="l01682"></a>01682 
    1557. 

  1557. <a name="l01683"></a>01683                         <a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">halt_channel</a>(hcd, hc, qtd, halt_status);
    1558. 

  1558. <a name="l01684"></a>01684                 }
    1559. 

  1559. <a name="l01685"></a>01685                 <span class="keywordflow">break</span>;
    1560. 

  1560. <a name="l01686"></a>01686         }
    1561. 

  1561. <a name="l01687"></a>01687 
    1562. 

  1562. <a name="l01688"></a>01688         <a class="code" href="dwc__otg__cil_8h.html#e530fa4a6ed31f67cad65969355651ef">disable_hc_int</a>(hc_regs, frmovrun);
    1563. 

  1563. <a name="l01689"></a>01689 
    1564. 

  1564. <a name="l01690"></a>01690         <span class="keywordflow">return</span> 1;
    1565. 

  1565. <a name="l01691"></a>01691 }
    1566. 

  1566. <a name="l01692"></a>01692 
    1567. 

  1567. <a name="l01697"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#f73e70f0e622267b6281e0cd6c1d89cf">01697</a> <span class="keyword">static</span> int32_t <a class="code" href="dwc__otg__hcd__intr_8c.html#f73e70f0e622267b6281e0cd6c1d89cf">handle_hc_datatglerr_intr</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * hcd,
    1568. 

  1568. <a name="l01698"></a>01698                                          <a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    1569. 

  1569. <a name="l01699"></a>01699                                          <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> * hc_regs,
    1570. 

  1570. <a name="l01700"></a>01700                                          <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd)
    1571. 

  1571. <a name="l01701"></a>01701 {
    1572. 

  1572. <a name="l01702"></a>01702         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#e4a050e176c1c4f556da2b276a8c2b37">DBG_HCD</a>, <span class="stringliteral">"--Host Channel %d Interrupt: "</span>
    1573. 

  1573. <a name="l01703"></a>01703                     <span class="stringliteral">"Data Toggle Error--\n"</span>, hc-&gt;<a class="code" href="structdwc__hc.html#df0c2b93e5c84cfaba6f06eaeaece5a1">hc_num</a>);
    1574. 

  1574. <a name="l01704"></a>01704 
    1575. 

  1575. <a name="l01705"></a>01705         <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#c5088d431f5efc382121f201f5d571aa">ep_is_in</a>) {
    1576. 

  1576. <a name="l01706"></a>01706                 qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#18eeb9c647049aec468bf9a7861c873f">error_count</a> = 0;
    1577. 

  1577. <a name="l01707"></a>01707         } <span class="keywordflow">else</span> {
    1578. 

  1578. <a name="l01708"></a>01708                 DWC_ERROR(<span class="stringliteral">"Data Toggle Error on OUT transfer,"</span>
    1579. 

  1579. <a name="l01709"></a>01709                           <span class="stringliteral">"channel %d\n"</span>, hc-&gt;<a class="code" href="structdwc__hc.html#df0c2b93e5c84cfaba6f06eaeaece5a1">hc_num</a>);
    1580. 

  1580. <a name="l01710"></a>01710         }
    1581. 

  1581. <a name="l01711"></a>01711 
    1582. 

  1582. <a name="l01712"></a>01712         <a class="code" href="dwc__otg__cil_8h.html#e530fa4a6ed31f67cad65969355651ef">disable_hc_int</a>(hc_regs, datatglerr);
    1583. 

  1583. <a name="l01713"></a>01713 
    1584. 

  1584. <a name="l01714"></a>01714         <span class="keywordflow">return</span> 1;
    1585. 

  1585. <a name="l01715"></a>01715 }
    1586. 

  1586. <a name="l01716"></a>01716 
    1587. 

  1587. <a name="l01717"></a>01717 <span class="preprocessor">#ifdef DEBUG</span>
    1588. 

  1588. <a name="l01718"></a>01718 <span class="preprocessor"></span>
    1589. 

  1589. <a name="l01724"></a>01724 <span class="keyword">static</span> <span class="keyword">inline</span> <span class="keywordtype">int</span> halt_status_ok(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * hcd,
    1590. 

  1590. <a name="l01725"></a>01725                                  <a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    1591. 

  1591. <a name="l01726"></a>01726                                  <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> * hc_regs,
    1592. 

  1592. <a name="l01727"></a>01727                                  <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd)
    1593. 

  1593. <a name="l01728"></a>01728 {
    1594. 

  1594. <a name="l01729"></a>01729         <a class="code" href="unionhcchar__data.html">hcchar_data_t</a> hcchar;
    1595. 

  1595. <a name="l01730"></a>01730         <a class="code" href="unionhctsiz__data.html">hctsiz_data_t</a> hctsiz;
    1596. 

  1596. <a name="l01731"></a>01731         <a class="code" href="unionhcint__data.html">hcint_data_t</a> hcint;
    1597. 

  1597. <a name="l01732"></a>01732         <a class="code" href="unionhcintmsk__data.html">hcintmsk_data_t</a> hcintmsk;
    1598. 

  1598. <a name="l01733"></a>01733         <a class="code" href="unionhcsplt__data.html">hcsplt_data_t</a> hcsplt;
    1599. 

  1599. <a name="l01734"></a>01734 
    1600. 

  1600. <a name="l01735"></a>01735         <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#07eca0fa02105ddaa1719387f5558b23">halt_status</a> == DWC_OTG_HC_XFER_NO_HALT_STATUS) {
    1601. 

  1601. <a name="l01736"></a>01736                 <span class="comment">/*</span>
    1602. 

  1602. <a name="l01737"></a>01737 <span class="comment">                 * This code is here only as a check. This condition should</span>
    1603. 

  1603. <a name="l01738"></a>01738 <span class="comment">                 * never happen. Ignore the halt if it does occur.</span>
    1604. 

  1604. <a name="l01739"></a>01739 <span class="comment">                 */</span>
    1605. 

  1605. <a name="l01740"></a>01740                 hcchar.<a class="code" href="unionhcchar__data.html#03d352fb421ab5c11bf9afaae4933ba4">d32</a> = dwc_read_reg32(&amp;hc_regs-&gt;<a class="code" href="structdwc__otg__hc__regs.html#3d8bdf7979ea6dd5ba01858aca7a1c02">hcchar</a>);
    1606. 

  1606. <a name="l01741"></a>01741                 hctsiz.<a class="code" href="unionhctsiz__data.html#fb41950555c60c6015294bdefe9cd39d">d32</a> = dwc_read_reg32(&amp;hc_regs-&gt;<a class="code" href="structdwc__otg__hc__regs.html#c6173f823ba754d9f9549422b6380ca2">hctsiz</a>);
    1607. 

  1607. <a name="l01742"></a>01742                 hcint.<a class="code" href="unionhcint__data.html#05a82fa7693f875622db744716d7f73e">d32</a> = dwc_read_reg32(&amp;hc_regs-&gt;<a class="code" href="structdwc__otg__hc__regs.html#0dfd5bae537d58e13788508dc719480d">hcint</a>);
    1608. 

  1608. <a name="l01743"></a>01743                 hcintmsk.<a class="code" href="unionhcintmsk__data.html#8868299fcc762e005b7f0bf67e5fbe30">d32</a> = dwc_read_reg32(&amp;hc_regs-&gt;<a class="code" href="structdwc__otg__hc__regs.html#830aa61c1d4326823662168ea7359205">hcintmsk</a>);
    1609. 

  1609. <a name="l01744"></a>01744                 hcsplt.<a class="code" href="unionhcsplt__data.html#0cd235b445ff681b846f5dccf24fd644">d32</a> = dwc_read_reg32(&amp;hc_regs-&gt;<a class="code" href="structdwc__otg__hc__regs.html#149053001a9ee21b692afde531a814de">hcsplt</a>);
    1610. 

  1610. <a name="l01745"></a>01745                 DWC_WARN
    1611. 

  1611. <a name="l01746"></a>01746                     (<span class="stringliteral">"%s: hc-&gt;halt_status == DWC_OTG_HC_XFER_NO_HALT_STATUS, "</span>
    1612. 

  1612. <a name="l01747"></a>01747                      <span class="stringliteral">"channel %d, hcchar 0x%08x, hctsiz 0x%08x, "</span>
    1613. 

  1613. <a name="l01748"></a>01748                      <span class="stringliteral">"hcint 0x%08x, hcintmsk 0x%08x, "</span>
    1614. 

  1614. <a name="l01749"></a>01749                      <span class="stringliteral">"hcsplt 0x%08x, qtd-&gt;complete_split %d\n"</span>, __func__,
    1615. 

  1615. <a name="l01750"></a>01750                      hc-&gt;<a class="code" href="structdwc__hc.html#df0c2b93e5c84cfaba6f06eaeaece5a1">hc_num</a>, hcchar.<a class="code" href="unionhcchar__data.html#03d352fb421ab5c11bf9afaae4933ba4">d32</a>, hctsiz.<a class="code" href="unionhctsiz__data.html#fb41950555c60c6015294bdefe9cd39d">d32</a>, hcint.<a class="code" href="unionhcint__data.html#05a82fa7693f875622db744716d7f73e">d32</a>,
    1616. 

  1616. <a name="l01751"></a>01751                      hcintmsk.<a class="code" href="unionhcintmsk__data.html#8868299fcc762e005b7f0bf67e5fbe30">d32</a>, hcsplt.<a class="code" href="unionhcsplt__data.html#0cd235b445ff681b846f5dccf24fd644">d32</a>, qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#6355e968a4d36edce3e22c89ac7b5001">complete_split</a>);
    1617. 

  1617. <a name="l01752"></a>01752 
    1618. 

  1618. <a name="l01753"></a>01753                 DWC_WARN(<span class="stringliteral">"%s: no halt status, channel %d, ignoring interrupt\n"</span>,
    1619. 

  1619. <a name="l01754"></a>01754                          __func__, hc-&gt;<a class="code" href="structdwc__hc.html#df0c2b93e5c84cfaba6f06eaeaece5a1">hc_num</a>);
    1620. 

  1620. <a name="l01755"></a>01755                 DWC_WARN(<span class="stringliteral">"\n"</span>);
    1621. 

  1621. <a name="l01756"></a>01756                 <a class="code" href="dwc__otg__cil_8h.html#071cb1f3f29f9a52775e9fff270b1c7c">clear_hc_int</a>(hc_regs, chhltd);
    1622. 

  1622. <a name="l01757"></a>01757                 <span class="keywordflow">return</span> 0;
    1623. 

  1623. <a name="l01758"></a>01758         }
    1624. 

  1624. <a name="l01759"></a>01759 
    1625. 

  1625. <a name="l01760"></a>01760         <span class="comment">/*</span>
    1626. 

  1626. <a name="l01761"></a>01761 <span class="comment">         * This code is here only as a check. hcchar.chdis should</span>
    1627. 

  1627. <a name="l01762"></a>01762 <span class="comment">         * never be set when the halt interrupt occurs. Halt the</span>
    1628. 

  1628. <a name="l01763"></a>01763 <span class="comment">         * channel again if it does occur.</span>
    1629. 

  1629. <a name="l01764"></a>01764 <span class="comment">         */</span>
    1630. 

  1630. <a name="l01765"></a>01765         hcchar.<a class="code" href="unionhcchar__data.html#03d352fb421ab5c11bf9afaae4933ba4">d32</a> = dwc_read_reg32(&amp;hc_regs-&gt;<a class="code" href="structdwc__otg__hc__regs.html#3d8bdf7979ea6dd5ba01858aca7a1c02">hcchar</a>);
    1631. 

  1631. <a name="l01766"></a>01766         <span class="keywordflow">if</span> (hcchar.<a class="code" href="unionhcchar__data.html#231c3638b02200c477e402d977c31e51">b</a>.<a class="code" href="unionhcchar__data.html#73c9f7f3cc4036c72ef341d1d1d9c388">chdis</a>) {
    1632. 

  1632. <a name="l01767"></a>01767                 DWC_WARN(<span class="stringliteral">"%s: hcchar.chdis set unexpectedly, "</span>
    1633. 

  1633. <a name="l01768"></a>01768                          <span class="stringliteral">"hcchar 0x%08x, trying to halt again\n"</span>,
    1634. 

  1634. <a name="l01769"></a>01769                          __func__, hcchar.<a class="code" href="unionhcchar__data.html#03d352fb421ab5c11bf9afaae4933ba4">d32</a>);
    1635. 

  1635. <a name="l01770"></a>01770                 <a class="code" href="dwc__otg__cil_8h.html#071cb1f3f29f9a52775e9fff270b1c7c">clear_hc_int</a>(hc_regs, chhltd);
    1636. 

  1636. <a name="l01771"></a>01771                 hc-&gt;<a class="code" href="structdwc__hc.html#2177dcde6dbb17b6bc7d0fb34e8ec95a">halt_pending</a> = 0;
    1637. 

  1637. <a name="l01772"></a>01772                 <a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">halt_channel</a>(hcd, hc, qtd, hc-&gt;<a class="code" href="structdwc__hc.html#07eca0fa02105ddaa1719387f5558b23">halt_status</a>);
    1638. 

  1638. <a name="l01773"></a>01773                 <span class="keywordflow">return</span> 0;
    1639. 

  1639. <a name="l01774"></a>01774         }
    1640. 

  1640. <a name="l01775"></a>01775 
    1641. 

  1641. <a name="l01776"></a>01776         <span class="keywordflow">return</span> 1;
    1642. 

  1642. <a name="l01777"></a>01777 }
    1643. 

  1643. <a name="l01778"></a>01778 <span class="preprocessor">#endif</span>
    1644. 

  1644. <a name="l01779"></a>01779 <span class="preprocessor"></span>
    1645. 

  1645. <a name="l01784"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#d75ed153a90dbda39d4d8e6cde4358df">01784</a> <span class="keyword">static</span> <span class="keywordtype">void</span> <a class="code" href="dwc__otg__hcd__intr_8c.html#d75ed153a90dbda39d4d8e6cde4358df">handle_hc_chhltd_intr_dma</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * hcd,
    1646. 

  1646. <a name="l01785"></a>01785                                       <a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    1647. 

  1647. <a name="l01786"></a>01786                                       <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> * hc_regs,
    1648. 

  1648. <a name="l01787"></a>01787                                       <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd)
    1649. 

  1649. <a name="l01788"></a>01788 {
    1650. 

  1650. <a name="l01789"></a>01789         <a class="code" href="unionhcint__data.html">hcint_data_t</a> hcint;
    1651. 

  1651. <a name="l01790"></a>01790         <a class="code" href="unionhcintmsk__data.html">hcintmsk_data_t</a> hcintmsk;
    1652. 

  1652. <a name="l01791"></a>01791         <span class="keywordtype">int</span> out_nak_enh = 0;
    1653. 

  1653. <a name="l01792"></a>01792 
    1654. 

  1654. <a name="l01793"></a>01793         <span class="comment">/* For core with OUT NAK enhancement, the flow for high-</span>
    1655. 

  1655. <a name="l01794"></a>01794 <span class="comment">         * speed CONTROL/BULK OUT is handled a little differently.</span>
    1656. 

  1656. <a name="l01795"></a>01795 <span class="comment">         */</span>
    1657. 

  1657. <a name="l01796"></a>01796         <span class="keywordflow">if</span> (hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#afc495591efa54c74c1dd50278b57ffe">snpsid</a> &gt;= <a class="code" href="dwc__otg__cil_8h.html#aac1e3cc465029aa0a2965b7c6d9fc50">OTG_CORE_REV_2_71a</a>) {
    1658. 

  1658. <a name="l01797"></a>01797                 <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#570b78178975193edb921af1ef36d37b">speed</a> == <a class="code" href="dwc__otg__cil_8h.html#b9dc03c6bc3c1113a935a73cf7021fbe">DWC_OTG_EP_SPEED_HIGH</a> &amp;&amp; !hc-&gt;<a class="code" href="structdwc__hc.html#c5088d431f5efc382121f201f5d571aa">ep_is_in</a> &amp;&amp;
    1659. 

  1659. <a name="l01798"></a>01798                     (hc-&gt;<a class="code" href="structdwc__hc.html#e6169fbc92e4d79686097742ad646f5c">ep_type</a> == <a class="code" href="dwc__otg__cil_8h.html#64e5cd756330f5adab79b25cc8067bdc">DWC_OTG_EP_TYPE_CONTROL</a> ||
    1660. 

  1660. <a name="l01799"></a>01799                      hc-&gt;<a class="code" href="structdwc__hc.html#e6169fbc92e4d79686097742ad646f5c">ep_type</a> == <a class="code" href="dwc__otg__cil_8h.html#9b079858cda0b917316ad9161b3881e0">DWC_OTG_EP_TYPE_BULK</a>)) {
    1661. 

  1661. <a name="l01800"></a>01800                         out_nak_enh = 1;
    1662. 

  1662. <a name="l01801"></a>01801                 }
    1663. 

  1663. <a name="l01802"></a>01802         }
    1664. 

  1664. <a name="l01803"></a>01803 
    1665. 

  1665. <a name="l01804"></a>01804         <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#07eca0fa02105ddaa1719387f5558b23">halt_status</a> == DWC_OTG_HC_XFER_URB_DEQUEUE ||
    1666. 

  1666. <a name="l01805"></a>01805             (hc-&gt;<a class="code" href="structdwc__hc.html#07eca0fa02105ddaa1719387f5558b23">halt_status</a> == DWC_OTG_HC_XFER_AHB_ERR &amp;&amp; !hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#7e3b96c6167eceeeb1090798f8297f1f">dma_desc_enable</a>)) {
    1667. 

  1667. <a name="l01806"></a>01806                 <span class="comment">/*</span>
    1668. 

  1668. <a name="l01807"></a>01807 <span class="comment">                 * Just release the channel. A dequeue can happen on a</span>
    1669. 

  1669. <a name="l01808"></a>01808 <span class="comment">                 * transfer timeout. In the case of an AHB Error, the channel</span>
    1670. 

  1670. <a name="l01809"></a>01809 <span class="comment">                 * was forced to halt because there's no way to gracefully</span>
    1671. 

  1671. <a name="l01810"></a>01810 <span class="comment">                 * recover.</span>
    1672. 

  1672. <a name="l01811"></a>01811 <span class="comment">                 */</span>
    1673. 

  1673. <a name="l01812"></a>01812                 <span class="keywordflow">if</span> (hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#7e3b96c6167eceeeb1090798f8297f1f">dma_desc_enable</a>)
    1674. 

  1674. <a name="l01813"></a>01813                         <a class="code" href="dwc__otg__hcd_8h.html#ca94cde3142ff1121bb0ff9bd44fa762">dwc_otg_hcd_complete_xfer_ddma</a>(hcd, hc, hc_regs, hc-&gt;<a class="code" href="structdwc__hc.html#07eca0fa02105ddaa1719387f5558b23">halt_status</a>);
    1675. 

  1675. <a name="l01814"></a>01814                 <span class="keywordflow">else</span>
    1676. 

  1676. <a name="l01815"></a>01815                         <a class="code" href="dwc__otg__hcd__intr_8c.html#4f6bf01b14a03eeed81d27bffa5e99fc">release_channel</a>(hcd, hc, qtd, hc-&gt;<a class="code" href="structdwc__hc.html#07eca0fa02105ddaa1719387f5558b23">halt_status</a>);
    1677. 

  1677. <a name="l01816"></a>01816                 <span class="keywordflow">return</span>;
    1678. 

  1678. <a name="l01817"></a>01817         }
    1679. 

  1679. <a name="l01818"></a>01818 
    1680. 

  1680. <a name="l01819"></a>01819         <span class="comment">/* Read the HCINTn register to determine the cause for the halt. */</span>
    1681. 

  1681. <a name="l01820"></a>01820         hcint.<a class="code" href="unionhcint__data.html#05a82fa7693f875622db744716d7f73e">d32</a> = dwc_read_reg32(&amp;hc_regs-&gt;<a class="code" href="structdwc__otg__hc__regs.html#0dfd5bae537d58e13788508dc719480d">hcint</a>);
    1682. 

  1682. <a name="l01821"></a>01821         hcintmsk.<a class="code" href="unionhcintmsk__data.html#8868299fcc762e005b7f0bf67e5fbe30">d32</a> = dwc_read_reg32(&amp;hc_regs-&gt;<a class="code" href="structdwc__otg__hc__regs.html#830aa61c1d4326823662168ea7359205">hcintmsk</a>);
    1683. 

  1683. <a name="l01822"></a>01822 
    1684. 

  1684. <a name="l01823"></a>01823         <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#49385cb90c4d8c003cfac91175a646e0">xfercomp</a>) {
    1685. 

  1685. <a name="l01830"></a>01830                 <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#e6169fbc92e4d79686097742ad646f5c">ep_type</a> == <a class="code" href="dwc__otg__cil_8h.html#152a3a5e1433bd2197672f0b5105e7a4">DWC_OTG_EP_TYPE_ISOC</a> &amp;&amp; !hc-&gt;<a class="code" href="structdwc__hc.html#c5088d431f5efc382121f201f5d571aa">ep_is_in</a>) {
    1686. 

  1686. <a name="l01831"></a>01831                         <a class="code" href="dwc__otg__hcd__intr_8c.html#243b0fb4191e46127a6823c0b5e970bb">handle_hc_ack_intr</a>(hcd, hc, hc_regs, qtd);
    1687. 

  1687. <a name="l01832"></a>01832                 }
    1688. 

  1688. <a name="l01833"></a>01833                 <a class="code" href="dwc__otg__hcd__intr_8c.html#e8bfcabff910322ef19eec9fc99fd097">handle_hc_xfercomp_intr</a>(hcd, hc, hc_regs, qtd);
    1689. 

  1689. <a name="l01834"></a>01834         } <span class="keywordflow">else</span> <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#cf2fb413e5758e9ebd8914b2f7605d73">stall</a>) {
    1690. 

  1690. <a name="l01835"></a>01835                 <a class="code" href="dwc__otg__hcd__intr_8c.html#e89fabf3023fa4f0279f312e5e9d4223">handle_hc_stall_intr</a>(hcd, hc, hc_regs, qtd);
    1691. 

  1691. <a name="l01836"></a>01836         } <span class="keywordflow">else</span> <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#86ec2d311ef29228676781f9100d195a">xacterr</a> &amp;&amp; !hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#7e3b96c6167eceeeb1090798f8297f1f">dma_desc_enable</a>) {
    1692. 

  1692. <a name="l01837"></a>01837                 <span class="keywordflow">if</span> (out_nak_enh) {
    1693. 

  1693. <a name="l01838"></a>01838                         <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#755e54c3dfded3653447dfdd63fd8b6a">nyet</a> || hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#ce65c9d3f0c7d3e5b8f163a378051c6c">nak</a> || hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#729749d6d0b5a1d4c449287f9efdd5fe">ack</a>) {
    1694. 

  1694. <a name="l01839"></a>01839                                 DWC_DEBUG(<span class="stringliteral">"XactErr with NYET/NAK/ACK\n"</span>);
    1695. 

  1695. <a name="l01840"></a>01840                                 qtd-&gt;<a class="code" href="structdwc__otg__qtd.html#18eeb9c647049aec468bf9a7861c873f">error_count</a> = 0;
    1696. 

  1696. <a name="l01841"></a>01841                         } <span class="keywordflow">else</span> {
    1697. 

  1697. <a name="l01842"></a>01842                                 DWC_DEBUG(<span class="stringliteral">"XactErr without NYET/NAK/ACK\n"</span>);
    1698. 

  1698. <a name="l01843"></a>01843                         }
    1699. 

  1699. <a name="l01844"></a>01844                 }
    1700. 

  1700. <a name="l01845"></a>01845 
    1701. 

  1701. <a name="l01846"></a>01846                 <span class="comment">/*</span>
    1702. 

  1702. <a name="l01847"></a>01847 <span class="comment">                 * Must handle xacterr before nak or ack. Could get a xacterr</span>
    1703. 

  1703. <a name="l01848"></a>01848 <span class="comment">                 * at the same time as either of these on a BULK/CONTROL OUT</span>
    1704. 

  1704. <a name="l01849"></a>01849 <span class="comment">                 * that started with a PING. The xacterr takes precedence.</span>
    1705. 

  1705. <a name="l01850"></a>01850 <span class="comment">                 */</span>
    1706. 

  1706. <a name="l01851"></a>01851                 <a class="code" href="dwc__otg__hcd__intr_8c.html#464af1671bd416d5db48a51fc93366ee">handle_hc_xacterr_intr</a>(hcd, hc, hc_regs, qtd);
    1707. 

  1707. <a name="l01852"></a>01852         } <span class="keywordflow">else</span> <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#f13613b1a33edddb676d2bce8a35e447">xcs_xact</a> &amp;&amp; hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#7e3b96c6167eceeeb1090798f8297f1f">dma_desc_enable</a>) {
    1708. 

  1708. <a name="l01853"></a>01853                 <a class="code" href="dwc__otg__hcd__intr_8c.html#464af1671bd416d5db48a51fc93366ee">handle_hc_xacterr_intr</a>(hcd, hc, hc_regs, qtd);
    1709. 

  1709. <a name="l01854"></a>01854         } <span class="keywordflow">else</span> <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#f953465ff02c518a52c48d4d6b1c09c7">ahberr</a> &amp;&amp; hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#7e3b96c6167eceeeb1090798f8297f1f">dma_desc_enable</a>) {    
    1710. 

  1710. <a name="l01855"></a>01855                 <a class="code" href="dwc__otg__hcd__intr_8c.html#1edf7eebc0475898518e18dc12c1b4b9">handle_hc_ahberr_intr</a>(hcd, hc, hc_regs, qtd);
    1711. 

  1711. <a name="l01856"></a>01856         } <span class="keywordflow">else</span> <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#b05adf33c7be609a2daf54478f884ec4">bblerr</a>) {
    1712. 

  1712. <a name="l01857"></a>01857                 <a class="code" href="dwc__otg__hcd__intr_8c.html#ab5348f52aac4081a9c35d529c1fcd79">handle_hc_babble_intr</a>(hcd, hc, hc_regs, qtd);
    1713. 

  1713. <a name="l01858"></a>01858         } <span class="keywordflow">else</span> <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#06f911d323d71f86639550507322dffb">frmovrun</a>) {
    1714. 

  1714. <a name="l01859"></a>01859                 <a class="code" href="dwc__otg__hcd__intr_8c.html#a30d61b2809dccf609bcf83cc61c9d63">handle_hc_frmovrun_intr</a>(hcd, hc, hc_regs, qtd);
    1715. 

  1715. <a name="l01860"></a>01860         } <span class="keywordflow">else</span> <span class="keywordflow">if</span> (!out_nak_enh) {
    1716. 

  1716. <a name="l01861"></a>01861                 <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#755e54c3dfded3653447dfdd63fd8b6a">nyet</a>) {
    1717. 

  1717. <a name="l01862"></a>01862                         <span class="comment">/*</span>
    1718. 

  1718. <a name="l01863"></a>01863 <span class="comment">                         * Must handle nyet before nak or ack. Could get a nyet at the</span>
    1719. 

  1719. <a name="l01864"></a>01864 <span class="comment">                         * same time as either of those on a BULK/CONTROL OUT that</span>
    1720. 

  1720. <a name="l01865"></a>01865 <span class="comment">                         * started with a PING. The nyet takes precedence.</span>
    1721. 

  1721. <a name="l01866"></a>01866 <span class="comment">                         */</span>
    1722. 

  1722. <a name="l01867"></a>01867                         <a class="code" href="dwc__otg__hcd__intr_8c.html#5093a2b94c1d5cd1988eb93d9def298f">handle_hc_nyet_intr</a>(hcd, hc, hc_regs, qtd);
    1723. 

  1723. <a name="l01868"></a>01868                 } <span class="keywordflow">else</span> <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#ce65c9d3f0c7d3e5b8f163a378051c6c">nak</a> &amp;&amp; !hcintmsk.<a class="code" href="unionhcintmsk__data.html#6835f55069c94947b580c8f01f64a075">b</a>.<a class="code" href="unionhcintmsk__data.html#32ae7d92d0eb93ced42ac3773ddc3a2f">nak</a>) {
    1724. 

  1724. <a name="l01869"></a>01869                         <span class="comment">/*</span>
    1725. 

  1725. <a name="l01870"></a>01870 <span class="comment">                         * If nak is not masked, it's because a non-split IN transfer</span>
    1726. 

  1726. <a name="l01871"></a>01871 <span class="comment">                         * is in an error state. In that case, the nak is handled by</span>
    1727. 

  1727. <a name="l01872"></a>01872 <span class="comment">                         * the nak interrupt handler, not here. Handle nak here for</span>
    1728. 

  1728. <a name="l01873"></a>01873 <span class="comment">                         * BULK/CONTROL OUT transfers, which halt on a NAK to allow</span>
    1729. 

  1729. <a name="l01874"></a>01874 <span class="comment">                         * rewinding the buffer pointer.</span>
    1730. 

  1730. <a name="l01875"></a>01875 <span class="comment">                         */</span>
    1731. 

  1731. <a name="l01876"></a>01876                         <a class="code" href="dwc__otg__hcd__intr_8c.html#19f718e1e8f7cded3bb7431008ee0309">handle_hc_nak_intr</a>(hcd, hc, hc_regs, qtd);
    1732. 

  1732. <a name="l01877"></a>01877                 } <span class="keywordflow">else</span> <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#729749d6d0b5a1d4c449287f9efdd5fe">ack</a> &amp;&amp; !hcintmsk.<a class="code" href="unionhcintmsk__data.html#6835f55069c94947b580c8f01f64a075">b</a>.<a class="code" href="unionhcintmsk__data.html#8d3388818a6dc098a1e1c64147d1ced9">ack</a>) {
    1733. 

  1733. <a name="l01878"></a>01878                         <span class="comment">/*</span>
    1734. 

  1734. <a name="l01879"></a>01879 <span class="comment">                         * If ack is not masked, it's because a non-split IN transfer</span>
    1735. 

  1735. <a name="l01880"></a>01880 <span class="comment">                         * is in an error state. In that case, the ack is handled by</span>
    1736. 

  1736. <a name="l01881"></a>01881 <span class="comment">                         * the ack interrupt handler, not here. Handle ack here for</span>
    1737. 

  1737. <a name="l01882"></a>01882 <span class="comment">                         * split transfers. Start splits halt on ACK.</span>
    1738. 

  1738. <a name="l01883"></a>01883 <span class="comment">                         */</span>
    1739. 

  1739. <a name="l01884"></a>01884                         <a class="code" href="dwc__otg__hcd__intr_8c.html#243b0fb4191e46127a6823c0b5e970bb">handle_hc_ack_intr</a>(hcd, hc, hc_regs, qtd);
    1740. 

  1740. <a name="l01885"></a>01885                 } <span class="keywordflow">else</span> {
    1741. 

  1741. <a name="l01886"></a>01886                         <span class="keywordflow">if</span> (hc-&gt;<a class="code" href="structdwc__hc.html#e6169fbc92e4d79686097742ad646f5c">ep_type</a> == <a class="code" href="dwc__otg__cil_8h.html#1401d1264f88530232cf51ab31cc5347">DWC_OTG_EP_TYPE_INTR</a> ||
    1742. 

  1742. <a name="l01887"></a>01887                             hc-&gt;<a class="code" href="structdwc__hc.html#e6169fbc92e4d79686097742ad646f5c">ep_type</a> == <a class="code" href="dwc__otg__cil_8h.html#152a3a5e1433bd2197672f0b5105e7a4">DWC_OTG_EP_TYPE_ISOC</a>) {
    1743. 

  1743. <a name="l01888"></a>01888                                 <span class="comment">/*</span>
    1744. 

  1744. <a name="l01889"></a>01889 <span class="comment">                                 * A periodic transfer halted with no other channel</span>
    1745. 

  1745. <a name="l01890"></a>01890 <span class="comment">                                 * interrupts set. Assume it was halted by the core</span>
    1746. 

  1746. <a name="l01891"></a>01891 <span class="comment">                                 * because it could not be completed in its scheduled</span>
    1747. 

  1747. <a name="l01892"></a>01892 <span class="comment">                                 * (micro)frame.</span>
    1748. 

  1748. <a name="l01893"></a>01893 <span class="comment">                                 */</span>
    1749. 

  1749. <a name="l01894"></a>01894 <span class="preprocessor">#ifdef DEBUG</span>
    1750. 

  1750. <a name="l01895"></a>01895 <span class="preprocessor"></span>                                DWC_PRINTF
    1751. 

  1751. <a name="l01896"></a>01896                                     (<span class="stringliteral">"%s: Halt channel %d (assume incomplete periodic transfer)\n"</span>,
    1752. 

  1752. <a name="l01897"></a>01897                                      __func__, hc-&gt;<a class="code" href="structdwc__hc.html#df0c2b93e5c84cfaba6f06eaeaece5a1">hc_num</a>);
    1753. 

  1753. <a name="l01898"></a>01898 <span class="preprocessor">#endif</span>
    1754. 

  1754. <a name="l01899"></a>01899 <span class="preprocessor"></span>                                <a class="code" href="dwc__otg__hcd__intr_8c.html#8b774e79e18861e9ad3ab1d0de00d47c">halt_channel</a>(hcd, hc, qtd,
    1755. 

  1755. <a name="l01900"></a>01900                                              DWC_OTG_HC_XFER_PERIODIC_INCOMPLETE);
    1756. 

  1756. <a name="l01901"></a>01901                         } <span class="keywordflow">else</span> {
    1757. 

  1757. <a name="l01902"></a>01902                                 DWC_ERROR
    1758. 

  1758. <a name="l01903"></a>01903                                     (<span class="stringliteral">"%s: Channel %d, DMA Mode -- ChHltd set, but reason "</span>
    1759. 

  1759. <a name="l01904"></a>01904                                      <span class="stringliteral">"for halting is unknown, hcint 0x%08x, intsts 0x%08x\n"</span>,
    1760. 

  1760. <a name="l01905"></a>01905                                      __func__, hc-&gt;<a class="code" href="structdwc__hc.html#df0c2b93e5c84cfaba6f06eaeaece5a1">hc_num</a>, hcint.<a class="code" href="unionhcint__data.html#05a82fa7693f875622db744716d7f73e">d32</a>,
    1761. 

  1761. <a name="l01906"></a>01906                                      dwc_read_reg32(&amp;hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;
    1762. 

  1762. <a name="l01907"></a>01907                                                     core_global_regs-&gt;gintsts));
    1763. 

  1763. <a name="l01908"></a>01908                         }
    1764. 

  1764. <a name="l01909"></a>01909         
    1765. 

  1765. <a name="l01910"></a>01910                 }
    1766. 

  1766. <a name="l01911"></a>01911         } <span class="keywordflow">else</span> {
    1767. 

  1767. <a name="l01912"></a>01912                 DWC_PRINTF(<span class="stringliteral">"NYET/NAK/ACK/other in non-error case, 0x%08x\n"</span>,
    1768. 

  1768. <a name="l01913"></a>01913                            hcint.<a class="code" href="unionhcint__data.html#05a82fa7693f875622db744716d7f73e">d32</a>);
    1769. 

  1769. <a name="l01914"></a>01914         }
    1770. 

  1770. <a name="l01915"></a>01915 }
    1771. 

  1771. <a name="l01916"></a>01916 
    1772. 

  1772. <a name="l01928"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#83541cd20d3297d7d7d24052834ef019">01928</a> <span class="keyword">static</span> int32_t <a class="code" href="dwc__otg__hcd__intr_8c.html#83541cd20d3297d7d7d24052834ef019">handle_hc_chhltd_intr</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * hcd,
    1773. 

  1773. <a name="l01929"></a>01929                                      <a class="code" href="structdwc__hc.html">dwc_hc_t</a> * hc,
    1774. 

  1774. <a name="l01930"></a>01930                                      <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> * hc_regs,
    1775. 

  1775. <a name="l01931"></a>01931                                      <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> * qtd)
    1776. 

  1776. <a name="l01932"></a>01932 {
    1777. 

  1777. <a name="l01933"></a>01933         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#e4a050e176c1c4f556da2b276a8c2b37">DBG_HCD</a>, <span class="stringliteral">"--Host Channel %d Interrupt: "</span>
    1778. 

  1778. <a name="l01934"></a>01934                     <span class="stringliteral">"Channel Halted--\n"</span>, hc-&gt;<a class="code" href="structdwc__hc.html#df0c2b93e5c84cfaba6f06eaeaece5a1">hc_num</a>);
    1779. 

  1779. <a name="l01935"></a>01935 
    1780. 

  1780. <a name="l01936"></a>01936         <span class="keywordflow">if</span> (hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#5ade18c62c5101c603247691d3047a19">dma_enable</a>) {
    1781. 

  1781. <a name="l01937"></a>01937                 <a class="code" href="dwc__otg__hcd__intr_8c.html#d75ed153a90dbda39d4d8e6cde4358df">handle_hc_chhltd_intr_dma</a>(hcd, hc, hc_regs, qtd);
    1782. 

  1782. <a name="l01938"></a>01938         } <span class="keywordflow">else</span> {
    1783. 

  1783. <a name="l01939"></a>01939 <span class="preprocessor">#ifdef DEBUG</span>
    1784. 

  1784. <a name="l01940"></a>01940 <span class="preprocessor"></span>                <span class="keywordflow">if</span> (!halt_status_ok(hcd, hc, hc_regs, qtd)) {
    1785. 

  1785. <a name="l01941"></a>01941                         <span class="keywordflow">return</span> 1;
    1786. 

  1786. <a name="l01942"></a>01942                 }
    1787. 

  1787. <a name="l01943"></a>01943 <span class="preprocessor">#endif</span>
    1788. 

  1788. <a name="l01944"></a>01944 <span class="preprocessor"></span>                <a class="code" href="dwc__otg__hcd__intr_8c.html#4f6bf01b14a03eeed81d27bffa5e99fc">release_channel</a>(hcd, hc, qtd, hc-&gt;<a class="code" href="structdwc__hc.html#07eca0fa02105ddaa1719387f5558b23">halt_status</a>);
    1789. 

  1789. <a name="l01945"></a>01945         }
    1790. 

  1790. <a name="l01946"></a>01946 
    1791. 

  1791. <a name="l01947"></a>01947         <span class="keywordflow">return</span> 1;
    1792. 

  1792. <a name="l01948"></a>01948 }
    1793. 

  1793. <a name="l01949"></a>01949 
    1794. 

  1794. <a name="l01951"></a><a class="code" href="dwc__otg__hcd__intr_8c.html#019c9cc38ec85275a7ef0b0d38bf53ab">01951</a> int32_t <a class="code" href="dwc__otg__hcd_8h.html#019c9cc38ec85275a7ef0b0d38bf53ab">dwc_otg_hcd_handle_hc_n_intr</a>(<a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd_t</a> * <a class="code" href="structdwc__otg__hcd.html">dwc_otg_hcd</a>, uint32_t num)
    1795. 

  1795. <a name="l01952"></a>01952 {
    1796. 

  1796. <a name="l01953"></a>01953         <span class="keywordtype">int</span> retval = 0;
    1797. 

  1797. <a name="l01954"></a>01954         <a class="code" href="unionhcint__data.html">hcint_data_t</a> hcint;
    1798. 

  1798. <a name="l01955"></a>01955         <a class="code" href="unionhcintmsk__data.html">hcintmsk_data_t</a> hcintmsk;
    1799. 

  1799. <a name="l01956"></a>01956         <a class="code" href="structdwc__hc.html">dwc_hc_t</a> *hc;
    1800. 

  1800. <a name="l01957"></a>01957         <a class="code" href="structdwc__otg__hc__regs.html">dwc_otg_hc_regs_t</a> *hc_regs;
    1801. 

  1801. <a name="l01958"></a>01958         <a class="code" href="structdwc__otg__qtd.html">dwc_otg_qtd_t</a> *qtd;
    1802. 

  1802. <a name="l01959"></a>01959 
    1803. 

  1803. <a name="l01960"></a>01960         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>, <span class="stringliteral">"--Host Channel Interrupt--, Channel %d\n"</span>, num);
    1804. 

  1804. <a name="l01961"></a>01961 
    1805. 

  1805. <a name="l01962"></a>01962         hc = dwc_otg_hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#cb393f6a676fb106e0e3d35396fb97f9">hc_ptr_array</a>[num];
    1806. 

  1806. <a name="l01963"></a>01963         hc_regs = dwc_otg_hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#51bac71891b5f6f435d7fc4582b974c1">host_if</a>-&gt;<a class="code" href="structdwc__otg__host__if.html#7f7c107d4720641eb4141cd817211ac0">hc_regs</a>[num];
    1807. 

  1807. <a name="l01964"></a>01964         qtd = DWC_CIRCLEQ_FIRST(&amp;hc-&gt;<a class="code" href="structdwc__hc.html#d338f8db131745d9921f51c30f26cd3c">qh</a>-&gt;<a class="code" href="structdwc__otg__qh.html#9567d266da8e796d3467fb16ae867f8e">qtd_list</a>);
    1808. 

  1808. <a name="l01965"></a>01965 
    1809. 

  1809. <a name="l01966"></a>01966         hcint.<a class="code" href="unionhcint__data.html#05a82fa7693f875622db744716d7f73e">d32</a> = dwc_read_reg32(&amp;hc_regs-&gt;<a class="code" href="structdwc__otg__hc__regs.html#0dfd5bae537d58e13788508dc719480d">hcint</a>);
    1810. 

  1810. <a name="l01967"></a>01967         hcintmsk.<a class="code" href="unionhcintmsk__data.html#8868299fcc762e005b7f0bf67e5fbe30">d32</a> = dwc_read_reg32(&amp;hc_regs-&gt;<a class="code" href="structdwc__otg__hc__regs.html#830aa61c1d4326823662168ea7359205">hcintmsk</a>);
    1811. 

  1811. <a name="l01968"></a>01968         <a class="code" href="dwc__otg__dbg_8h.html#ed38f5a57cb756e97a17c0926cc9a10e">DWC_DEBUGPL</a>(<a class="code" href="dwc__otg__dbg_8h.html#39931d908ba215b3d5d590e42d8408b5">DBG_HCDV</a>,
    1812. 

  1812. <a name="l01969"></a>01969                     <span class="stringliteral">"  hcint 0x%08x, hcintmsk 0x%08x, hcint&amp;hcintmsk 0x%08x\n"</span>,
    1813. 

  1813. <a name="l01970"></a>01970                     hcint.<a class="code" href="unionhcint__data.html#05a82fa7693f875622db744716d7f73e">d32</a>, hcintmsk.<a class="code" href="unionhcintmsk__data.html#8868299fcc762e005b7f0bf67e5fbe30">d32</a>, (hcint.<a class="code" href="unionhcint__data.html#05a82fa7693f875622db744716d7f73e">d32</a> &amp; hcintmsk.<a class="code" href="unionhcintmsk__data.html#8868299fcc762e005b7f0bf67e5fbe30">d32</a>));
    1814. 

  1814. <a name="l01971"></a>01971         hcint.<a class="code" href="unionhcint__data.html#05a82fa7693f875622db744716d7f73e">d32</a> = hcint.<a class="code" href="unionhcint__data.html#05a82fa7693f875622db744716d7f73e">d32</a> &amp; hcintmsk.<a class="code" href="unionhcintmsk__data.html#8868299fcc762e005b7f0bf67e5fbe30">d32</a>;
    1815. 

  1815. <a name="l01972"></a>01972 
    1816. 

  1816. <a name="l01973"></a>01973         <span class="keywordflow">if</span> (!dwc_otg_hcd-&gt;<a class="code" href="structdwc__otg__hcd.html#e36b9560ce538a7d2ea9bd266d4041f0">core_if</a>-&gt;<a class="code" href="structdwc__otg__core__if.html#5ade18c62c5101c603247691d3047a19">dma_enable</a>) {
    1817. 

  1817. <a name="l01974"></a>01974                 <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#b93ceab913a49e33c5bf4dde0e62d75a">chhltd</a> &amp;&amp; hcint.<a class="code" href="unionhcint__data.html#05a82fa7693f875622db744716d7f73e">d32</a> != 0x2) {
    1818. 

  1818. <a name="l01975"></a>01975                         hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#b93ceab913a49e33c5bf4dde0e62d75a">chhltd</a> = 0;
    1819. 

  1819. <a name="l01976"></a>01976                 }
    1820. 

  1820. <a name="l01977"></a>01977         }
    1821. 

  1821. <a name="l01978"></a>01978 
    1822. 

  1822. <a name="l01979"></a>01979         <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#49385cb90c4d8c003cfac91175a646e0">xfercomp</a>) {
    1823. 

  1823. <a name="l01980"></a>01980                 retval |=
    1824. 

  1824. <a name="l01981"></a>01981                     <a class="code" href="dwc__otg__hcd__intr_8c.html#e8bfcabff910322ef19eec9fc99fd097">handle_hc_xfercomp_intr</a>(dwc_otg_hcd, hc, hc_regs, qtd);
    1825. 

  1825. <a name="l01982"></a>01982                 <span class="comment">/*</span>
    1826. 

  1826. <a name="l01983"></a>01983 <span class="comment">                 * If NYET occurred at same time as Xfer Complete, the NYET is</span>
    1827. 

  1827. <a name="l01984"></a>01984 <span class="comment">                 * handled by the Xfer Complete interrupt handler. Don't want</span>
    1828. 

  1828. <a name="l01985"></a>01985 <span class="comment">                 * to call the NYET interrupt handler in this case.</span>
    1829. 

  1829. <a name="l01986"></a>01986 <span class="comment">                 */</span>
    1830. 

  1830. <a name="l01987"></a>01987                 hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#755e54c3dfded3653447dfdd63fd8b6a">nyet</a> = 0;
    1831. 

  1831. <a name="l01988"></a>01988         }
    1832. 

  1832. <a name="l01989"></a>01989         <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#b93ceab913a49e33c5bf4dde0e62d75a">chhltd</a>) {
    1833. 

  1833. <a name="l01990"></a>01990                 retval |= <a class="code" href="dwc__otg__hcd__intr_8c.html#83541cd20d3297d7d7d24052834ef019">handle_hc_chhltd_intr</a>(dwc_otg_hcd, hc, hc_regs, qtd);
    1834. 

  1834. <a name="l01991"></a>01991         }
    1835. 

  1835. <a name="l01992"></a>01992         <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#f953465ff02c518a52c48d4d6b1c09c7">ahberr</a>) {
    1836. 

  1836. <a name="l01993"></a>01993                 retval |= <a class="code" href="dwc__otg__hcd__intr_8c.html#1edf7eebc0475898518e18dc12c1b4b9">handle_hc_ahberr_intr</a>(dwc_otg_hcd, hc, hc_regs, qtd);
    1837. 

  1837. <a name="l01994"></a>01994         }
    1838. 

  1838. <a name="l01995"></a>01995         <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#cf2fb413e5758e9ebd8914b2f7605d73">stall</a>) {
    1839. 

  1839. <a name="l01996"></a>01996                 retval |= <a class="code" href="dwc__otg__hcd__intr_8c.html#e89fabf3023fa4f0279f312e5e9d4223">handle_hc_stall_intr</a>(dwc_otg_hcd, hc, hc_regs, qtd);
    1840. 

  1840. <a name="l01997"></a>01997         }
    1841. 

  1841. <a name="l01998"></a>01998         <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#ce65c9d3f0c7d3e5b8f163a378051c6c">nak</a>) {
    1842. 

  1842. <a name="l01999"></a>01999                 retval |= <a class="code" href="dwc__otg__hcd__intr_8c.html#19f718e1e8f7cded3bb7431008ee0309">handle_hc_nak_intr</a>(dwc_otg_hcd, hc, hc_regs, qtd);
    1843. 

  1843. <a name="l02000"></a>02000         }
    1844. 

  1844. <a name="l02001"></a>02001         <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#729749d6d0b5a1d4c449287f9efdd5fe">ack</a>) {
    1845. 

  1845. <a name="l02002"></a>02002                 retval |= <a class="code" href="dwc__otg__hcd__intr_8c.html#243b0fb4191e46127a6823c0b5e970bb">handle_hc_ack_intr</a>(dwc_otg_hcd, hc, hc_regs, qtd);
    1846. 

  1846. <a name="l02003"></a>02003         }
    1847. 

  1847. <a name="l02004"></a>02004         <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#755e54c3dfded3653447dfdd63fd8b6a">nyet</a>) {
    1848. 

  1848. <a name="l02005"></a>02005                 retval |= <a class="code" href="dwc__otg__hcd__intr_8c.html#5093a2b94c1d5cd1988eb93d9def298f">handle_hc_nyet_intr</a>(dwc_otg_hcd, hc, hc_regs, qtd);
    1849. 

  1849. <a name="l02006"></a>02006         }
    1850. 

  1850. <a name="l02007"></a>02007         <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#86ec2d311ef29228676781f9100d195a">xacterr</a>) {
    1851. 

  1851. <a name="l02008"></a>02008                 retval |= <a class="code" href="dwc__otg__hcd__intr_8c.html#464af1671bd416d5db48a51fc93366ee">handle_hc_xacterr_intr</a>(dwc_otg_hcd, hc, hc_regs, qtd);
    1852. 

  1852. <a name="l02009"></a>02009         }
    1853. 

  1853. <a name="l02010"></a>02010         <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#b05adf33c7be609a2daf54478f884ec4">bblerr</a>) {
    1854. 

  1854. <a name="l02011"></a>02011                 retval |= <a class="code" href="dwc__otg__hcd__intr_8c.html#ab5348f52aac4081a9c35d529c1fcd79">handle_hc_babble_intr</a>(dwc_otg_hcd, hc, hc_regs, qtd);
    1855. 

  1855. <a name="l02012"></a>02012         }
    1856. 

  1856. <a name="l02013"></a>02013         <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#06f911d323d71f86639550507322dffb">frmovrun</a>) {
    1857. 

  1857. <a name="l02014"></a>02014                 retval |=
    1858. 

  1858. <a name="l02015"></a>02015                     <a class="code" href="dwc__otg__hcd__intr_8c.html#a30d61b2809dccf609bcf83cc61c9d63">handle_hc_frmovrun_intr</a>(dwc_otg_hcd, hc, hc_regs, qtd);
    1859. 

  1859. <a name="l02016"></a>02016         }
    1860. 

  1860. <a name="l02017"></a>02017         <span class="keywordflow">if</span> (hcint.<a class="code" href="unionhcint__data.html#3ab6af507f45d91a7898dd711f4368ee">b</a>.<a class="code" href="unionhcint__data.html#2fc8618d16e6908e99c8cca3ffb54736">datatglerr</a>) {
    1861. 

  1861. <a name="l02018"></a>02018                 retval |=
    1862. 

  1862. <a name="l02019"></a>02019                     <a class="code" href="dwc__otg__hcd__intr_8c.html#f73e70f0e622267b6281e0cd6c1d89cf">handle_hc_datatglerr_intr</a>(dwc_otg_hcd, hc, hc_regs, qtd);
    1863. 

  1863. <a name="l02020"></a>02020         }
    1864. 

  1864. <a name="l02021"></a>02021 
    1865. 

  1865. <a name="l02022"></a>02022         <span class="keywordflow">return</span> retval;
    1866. 

  1866. <a name="l02023"></a>02023 }
    1867. 

  1867. <a name="l02024"></a>02024 
    1868. 

  1868. <a name="l02025"></a>02025 <span class="preprocessor">#endif                          </span><span class="comment">/* DWC_DEVICE_ONLY */</span>
    1869. 

  1869. </pre></div><hr size="1"><address style="align: right;"><small>Generated on Tue May 5 02:22:48 2009 for DesignWare USB 2.0 OTG Controller (DWC_otg) Device Driver by&nbsp;
    1870. 

  1870. <a href="http://www.doxygen.org/index.html">
    1871. 

  1871. <img src="doxygen.png" alt="doxygen" align="middle" border="0"></a> 1.4.7 </small></address>
    1872. 

  1872. </body>
    1873. 

  1873. </html>
    1874. 

  1874.