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/arch/arm/mach-fsm/board-qsd8x50.c

https://bitbucket.org/sammyz/iscream_thunderc-2.6.35-rebase
C | 2555 lines | 2175 code | 321 blank | 59 comment | 147 complexity | 877d604654a65f0f02f6f411d3b4dd5e MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
  1. /* Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. * You should have received a copy of the GNU General Public License
  13. * along with this program; if not, write to the Free Software
  14. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  15. * 02110-1301, USA.
  16. *
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/irq.h>
  20. #include <linux/gpio.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/android_pmem.h>
  23. #include <linux/bootmem.h>
  24. #include <linux/i2c.h>
  25. #include <linux/spi/spi.h>
  26. #include <linux/delay.h>
  27. #include <linux/mfd/tps65023.h>
  28. #include <linux/bma150.h>
  29. #include <linux/power_supply.h>
  30. #include <linux/clk.h>
  31. #include <asm/mach-types.h>
  32. #include <asm/mach/arch.h>
  33. #include <asm/io.h>
  34. #include <asm/setup.h>
  35. #include <asm/mach/mmc.h>
  36. #include <mach/vreg.h>
  37. #include <mach/mpp.h>
  38. #include <mach/gpio.h>
  39. #include <mach/board.h>
  40. #include <mach/sirc.h>
  41. #include <mach/dma.h>
  42. #include <mach/rpc_hsusb.h>
  43. #include <mach/rpc_pmapp.h>
  44. #include <mach/msm_hsusb.h>
  45. #include <mach/msm_serial_hs.h>
  46. #include <mach/msm_touchpad.h>
  47. #include <mach/msm_i2ckbd.h>
  48. #include <mach/pmic.h>
  49. #include <mach/camera.h>
  50. #include <mach/memory.h>
  51. #include <mach/msm_spi.h>
  52. #include <mach/msm_tsif.h>
  53. #include <mach/msm_battery.h>
  54. #include <mach/rpc_server_handset.h>
  55. #include "devices.h"
  56. #include "timer.h"
  57. #include "socinfo.h"
  58. #include "msm-keypad-devices.h"
  59. #include "pm.h"
  60. #include "proc_comm.h"
  61. #include <linux/msm_kgsl.h>
  62. #ifdef CONFIG_USB_ANDROID
  63. #include <linux/usb/android_composite.h>
  64. #endif
  65. #define TOUCHPAD_SUSPEND 34
  66. #define TOUCHPAD_IRQ 38
  67. #define MSM_PMEM_SF_SIZE 0x1700000
  68. #define SMEM_SPINLOCK_I2C "S:6"
  69. #define MSM_PMEM_ADSP_SIZE 0x2B96000
  70. #define MSM_FB_SIZE 0x2EE000
  71. #define MSM_AUDIO_SIZE 0x80000
  72. #define MSM_GPU_PHYS_SIZE SZ_2M
  73. #ifdef CONFIG_MSM_SOC_REV_A
  74. #define MSM_SMI_BASE 0xE0000000
  75. #else
  76. #define MSM_SMI_BASE 0x00000000
  77. #endif
  78. #define MSM_SHARED_RAM_PHYS (MSM_SMI_BASE + 0x00100000)
  79. #define MSM_PMEM_SMI_BASE (MSM_SMI_BASE + 0x02B00000)
  80. #define MSM_PMEM_SMI_SIZE 0x01500000
  81. #define MSM_FB_BASE MSM_PMEM_SMI_BASE
  82. #define MSM_GPU_PHYS_BASE (MSM_FB_BASE + MSM_FB_SIZE)
  83. #define MSM_PMEM_SMIPOOL_BASE (MSM_GPU_PHYS_BASE + MSM_GPU_PHYS_SIZE)
  84. #define MSM_PMEM_SMIPOOL_SIZE (MSM_PMEM_SMI_SIZE - MSM_FB_SIZE \
  85. - MSM_GPU_PHYS_SIZE)
  86. #define PMEM_KERNEL_EBI1_SIZE 0x28000
  87. #define PMIC_VREG_WLAN_LEVEL 2600
  88. #define PMIC_VREG_GP6_LEVEL 2900
  89. #define FPGA_SDCC_STATUS 0x70000280
  90. static struct resource smc91x_resources[] = {
  91. [0] = {
  92. .flags = IORESOURCE_MEM,
  93. },
  94. [1] = {
  95. .flags = IORESOURCE_IRQ,
  96. },
  97. };
  98. #ifdef CONFIG_USB_FUNCTION
  99. static struct usb_mass_storage_platform_data usb_mass_storage_pdata = {
  100. .nluns = 0x02,
  101. .buf_size = 16384,
  102. .vendor = "GOOGLE",
  103. .product = "Mass storage",
  104. .release = 0xffff,
  105. };
  106. static struct platform_device mass_storage_device = {
  107. .name = "usb_mass_storage",
  108. .id = -1,
  109. .dev = {
  110. .platform_data = &usb_mass_storage_pdata,
  111. },
  112. };
  113. #endif
  114. #ifdef CONFIG_USB_ANDROID
  115. static char *usb_functions_default[] = {
  116. "diag",
  117. "modem",
  118. "nmea",
  119. "rmnet",
  120. "usb_mass_storage",
  121. };
  122. static char *usb_functions_default_adb[] = {
  123. "diag",
  124. "adb",
  125. "modem",
  126. "nmea",
  127. "rmnet",
  128. "usb_mass_storage",
  129. };
  130. static char *usb_functions_rndis[] = {
  131. "rndis",
  132. };
  133. static char *usb_functions_rndis_adb[] = {
  134. "rndis",
  135. "adb",
  136. };
  137. static char *usb_functions_all[] = {
  138. #ifdef CONFIG_USB_ANDROID_RNDIS
  139. "rndis",
  140. #endif
  141. #ifdef CONFIG_USB_ANDROID_DIAG
  142. "diag",
  143. #endif
  144. "adb",
  145. #ifdef CONFIG_USB_F_SERIAL
  146. "modem",
  147. "nmea",
  148. #endif
  149. #ifdef CONFIG_USB_ANDROID_RMNET
  150. "rmnet",
  151. #endif
  152. "usb_mass_storage",
  153. #ifdef CONFIG_USB_ANDROID_ACM
  154. "acm",
  155. #endif
  156. };
  157. static struct android_usb_product usb_products[] = {
  158. {
  159. .product_id = 0x9026,
  160. .num_functions = ARRAY_SIZE(usb_functions_default),
  161. .functions = usb_functions_default,
  162. },
  163. {
  164. .product_id = 0x9025,
  165. .num_functions = ARRAY_SIZE(usb_functions_default_adb),
  166. .functions = usb_functions_default_adb,
  167. },
  168. {
  169. .product_id = 0xf00e,
  170. .num_functions = ARRAY_SIZE(usb_functions_rndis),
  171. .functions = usb_functions_rndis,
  172. },
  173. {
  174. .product_id = 0x9024,
  175. .num_functions = ARRAY_SIZE(usb_functions_rndis_adb),
  176. .functions = usb_functions_rndis_adb,
  177. },
  178. };
  179. static struct usb_mass_storage_platform_data mass_storage_pdata = {
  180. .nluns = 1,
  181. .vendor = "Qualcomm Incorporated",
  182. .product = "Mass storage",
  183. .release = 0x0100,
  184. };
  185. static struct platform_device usb_mass_storage_device = {
  186. .name = "usb_mass_storage",
  187. .id = -1,
  188. .dev = {
  189. .platform_data = &mass_storage_pdata,
  190. },
  191. };
  192. static struct usb_ether_platform_data rndis_pdata = {
  193. /* ethaddr is filled by board_serialno_setup */
  194. .vendorID = 0x05C6,
  195. .vendorDescr = "Qualcomm Incorporated",
  196. };
  197. static struct platform_device rndis_device = {
  198. .name = "rndis",
  199. .id = -1,
  200. .dev = {
  201. .platform_data = &rndis_pdata,
  202. },
  203. };
  204. static struct android_usb_platform_data android_usb_pdata = {
  205. .vendor_id = 0x05C6,
  206. .product_id = 0x9026,
  207. .version = 0x0100,
  208. .product_name = "Qualcomm HSUSB Device",
  209. .manufacturer_name = "Qualcomm Incorporated",
  210. .num_products = ARRAY_SIZE(usb_products),
  211. .products = usb_products,
  212. .num_functions = ARRAY_SIZE(usb_functions_all),
  213. .functions = usb_functions_all,
  214. .serial_number = "1234567890ABCDEF",
  215. };
  216. static struct platform_device android_usb_device = {
  217. .name = "android_usb",
  218. .id = -1,
  219. .dev = {
  220. .platform_data = &android_usb_pdata,
  221. },
  222. };
  223. static int __init board_serialno_setup(char *serialno)
  224. {
  225. int i;
  226. char *src = serialno;
  227. /* create a fake MAC address from our serial number.
  228. * first byte is 0x02 to signify locally administered.
  229. */
  230. rndis_pdata.ethaddr[0] = 0x02;
  231. for (i = 0; *src; i++) {
  232. /* XOR the USB serial across the remaining bytes */
  233. rndis_pdata.ethaddr[i % (ETH_ALEN - 1) + 1] ^= *src++;
  234. }
  235. android_usb_pdata.serial_number = serialno;
  236. return 1;
  237. }
  238. __setup("androidboot.serialno=", board_serialno_setup);
  239. #endif
  240. static struct platform_device smc91x_device = {
  241. .name = "smc91x",
  242. .id = 0,
  243. .num_resources = ARRAY_SIZE(smc91x_resources),
  244. .resource = smc91x_resources,
  245. };
  246. #ifdef CONFIG_USB_FUNCTION
  247. static struct usb_function_map usb_functions_map[] = {
  248. {"diag", 0},
  249. {"adb", 1},
  250. {"modem", 2},
  251. {"nmea", 3},
  252. {"mass_storage", 4},
  253. {"ethernet", 5},
  254. };
  255. /* dynamic composition */
  256. static struct usb_composition usb_func_composition[] = {
  257. {
  258. .product_id = 0x9012,
  259. .functions = 0x5, /* 0101 */
  260. },
  261. {
  262. .product_id = 0x9013,
  263. .functions = 0x15, /* 10101 */
  264. },
  265. {
  266. .product_id = 0x9014,
  267. .functions = 0x30, /* 110000 */
  268. },
  269. {
  270. .product_id = 0x9015,
  271. .functions = 0x12, /* 10010 */
  272. },
  273. {
  274. .product_id = 0x9016,
  275. .functions = 0xD, /* 01101 */
  276. },
  277. {
  278. .product_id = 0x9017,
  279. .functions = 0x1D, /* 11101 */
  280. },
  281. {
  282. .product_id = 0xF000,
  283. .functions = 0x10, /* 10000 */
  284. },
  285. {
  286. .product_id = 0xF009,
  287. .functions = 0x20, /* 100000 */
  288. },
  289. {
  290. .product_id = 0x9018,
  291. .functions = 0x1F, /* 011111 */
  292. },
  293. {
  294. .product_id = 0x901A,
  295. .functions = 0x0F, /* 01111 */
  296. },
  297. };
  298. #endif
  299. static struct msm_handset_platform_data hs_platform_data = {
  300. .hs_name = "8k_handset",
  301. .pwr_key_delay_ms = 500, /* 0 will disable end key */
  302. };
  303. static struct platform_device hs_device = {
  304. .name = "msm-handset",
  305. .id = -1,
  306. .dev = {
  307. .platform_data = &hs_platform_data,
  308. },
  309. };
  310. #ifdef CONFIG_USB_FS_HOST
  311. static struct msm_gpio fsusb_config[] = {
  312. { GPIO_CFG(139, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), "fs_dat" },
  313. { GPIO_CFG(140, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), "fs_se0" },
  314. { GPIO_CFG(141, 3, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), "fs_oe_n" },
  315. };
  316. static int fsusb_gpio_init(void)
  317. {
  318. return msm_gpios_request(fsusb_config, ARRAY_SIZE(fsusb_config));
  319. }
  320. static void msm_fsusb_setup_gpio(unsigned int enable)
  321. {
  322. if (enable)
  323. msm_gpios_enable(fsusb_config, ARRAY_SIZE(fsusb_config));
  324. else
  325. msm_gpios_disable(fsusb_config, ARRAY_SIZE(fsusb_config));
  326. }
  327. #endif
  328. #define MSM_USB_BASE ((unsigned)addr)
  329. static struct msm_hsusb_platform_data msm_hsusb_pdata = {
  330. #ifdef CONFIG_USB_FUNCTION
  331. .version = 0x0100,
  332. .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_180NM),
  333. .vendor_id = 0x5c6,
  334. .product_name = "Qualcomm HSUSB Device",
  335. .serial_number = "1234567890ABCDEF",
  336. .manufacturer_name = "Qualcomm Incorporated",
  337. .compositions = usb_func_composition,
  338. .num_compositions = ARRAY_SIZE(usb_func_composition),
  339. .function_map = usb_functions_map,
  340. .num_functions = ARRAY_SIZE(usb_functions_map),
  341. .config_gpio = NULL,
  342. #endif
  343. };
  344. static struct vreg *vreg_usb;
  345. static void msm_hsusb_vbus_power(unsigned phy_info, int on)
  346. {
  347. switch (PHY_TYPE(phy_info)) {
  348. case USB_PHY_INTEGRATED:
  349. if (on)
  350. msm_hsusb_vbus_powerup();
  351. else
  352. msm_hsusb_vbus_shutdown();
  353. break;
  354. case USB_PHY_SERIAL_PMIC:
  355. if (on)
  356. vreg_enable(vreg_usb);
  357. else
  358. vreg_disable(vreg_usb);
  359. break;
  360. default:
  361. pr_err("%s: undefined phy type ( %X ) \n", __func__,
  362. phy_info);
  363. }
  364. }
  365. static struct msm_usb_host_platform_data msm_usb_host_pdata = {
  366. .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_180NM),
  367. };
  368. #ifdef CONFIG_USB_FS_HOST
  369. static struct msm_usb_host_platform_data msm_usb_host2_pdata = {
  370. .phy_info = USB_PHY_SERIAL_PMIC,
  371. .config_gpio = msm_fsusb_setup_gpio,
  372. .vbus_power = msm_hsusb_vbus_power,
  373. };
  374. #endif
  375. static struct android_pmem_platform_data android_pmem_kernel_ebi1_pdata = {
  376. .name = PMEM_KERNEL_EBI1_DATA_NAME,
  377. /* if no allocator_type, defaults to PMEM_ALLOCATORTYPE_BITMAP,
  378. * the only valid choice at this time. The board structure is
  379. * set to all zeros by the C runtime initialization and that is now
  380. * the enum value of PMEM_ALLOCATORTYPE_BITMAP, now forced to 0 in
  381. * include/linux/android_pmem.h.
  382. */
  383. .cached = 0,
  384. };
  385. #ifdef CONFIG_KERNEL_PMEM_SMI_REGION
  386. static struct android_pmem_platform_data android_pmem_kernel_smi_pdata = {
  387. .name = PMEM_KERNEL_SMI_DATA_NAME,
  388. /* if no allocator_type, defaults to PMEM_ALLOCATORTYPE_BITMAP,
  389. * the only valid choice at this time. The board structure is
  390. * set to all zeros by the C runtime initialization and that is now
  391. * the enum value of PMEM_ALLOCATORTYPE_BITMAP, now forced to 0 in
  392. * include/linux/android_pmem.h.
  393. */
  394. .cached = 0,
  395. };
  396. #endif
  397. static struct android_pmem_platform_data android_pmem_pdata = {
  398. .name = "pmem",
  399. .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
  400. .cached = 1,
  401. };
  402. static struct android_pmem_platform_data android_pmem_adsp_pdata = {
  403. .name = "pmem_adsp",
  404. .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
  405. .cached = 0,
  406. };
  407. static struct android_pmem_platform_data android_pmem_smipool_pdata = {
  408. .name = "pmem_smipool",
  409. .start = MSM_PMEM_SMIPOOL_BASE,
  410. .size = MSM_PMEM_SMIPOOL_SIZE,
  411. .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
  412. .cached = 0,
  413. };
  414. static struct platform_device android_pmem_device = {
  415. .name = "android_pmem",
  416. .id = 0,
  417. .dev = { .platform_data = &android_pmem_pdata },
  418. };
  419. static struct platform_device android_pmem_adsp_device = {
  420. .name = "android_pmem",
  421. .id = 1,
  422. .dev = { .platform_data = &android_pmem_adsp_pdata },
  423. };
  424. static struct platform_device android_pmem_smipool_device = {
  425. .name = "android_pmem",
  426. .id = 2,
  427. .dev = { .platform_data = &android_pmem_smipool_pdata },
  428. };
  429. static struct platform_device android_pmem_kernel_ebi1_device = {
  430. .name = "android_pmem",
  431. .id = 3,
  432. .dev = { .platform_data = &android_pmem_kernel_ebi1_pdata },
  433. };
  434. #ifdef CONFIG_KERNEL_PMEM_SMI_REGION
  435. static struct platform_device android_pmem_kernel_smi_device = {
  436. .name = "android_pmem",
  437. .id = 4,
  438. .dev = { .platform_data = &android_pmem_kernel_smi_pdata },
  439. };
  440. #endif
  441. static struct resource msm_fb_resources[] = {
  442. {
  443. .flags = IORESOURCE_DMA,
  444. }
  445. };
  446. static int msm_fb_detect_panel(const char *name)
  447. {
  448. int ret = -EPERM;
  449. if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa()) {
  450. if (!strncmp(name, "mddi_toshiba_wvga_pt", 20))
  451. ret = 0;
  452. else
  453. ret = -ENODEV;
  454. } else if ((machine_is_qsd8x50_surf() || machine_is_qsd8x50a_surf())
  455. && !strcmp(name, "lcdc_external"))
  456. ret = 0;
  457. return ret;
  458. }
  459. static struct msm_fb_platform_data msm_fb_pdata = {
  460. .detect_client = msm_fb_detect_panel,
  461. };
  462. static struct platform_device msm_fb_device = {
  463. .name = "msm_fb",
  464. .id = 0,
  465. .num_resources = ARRAY_SIZE(msm_fb_resources),
  466. .resource = msm_fb_resources,
  467. .dev = {
  468. .platform_data = &msm_fb_pdata,
  469. }
  470. };
  471. static struct msm_gpio bma_spi_gpio_config_data[] = {
  472. { GPIO_CFG(22, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), "bma_irq" },
  473. };
  474. static int msm_bma_gpio_setup(struct device *dev)
  475. {
  476. int rc;
  477. rc = msm_gpios_request_enable(bma_spi_gpio_config_data,
  478. ARRAY_SIZE(bma_spi_gpio_config_data));
  479. return rc;
  480. }
  481. static void msm_bma_gpio_teardown(struct device *dev)
  482. {
  483. msm_gpios_disable_free(bma_spi_gpio_config_data,
  484. ARRAY_SIZE(bma_spi_gpio_config_data));
  485. }
  486. static struct bma150_platform_data bma_pdata = {
  487. .setup = msm_bma_gpio_setup,
  488. .teardown = msm_bma_gpio_teardown,
  489. };
  490. static struct resource qsd_spi_resources[] = {
  491. {
  492. .name = "spi_irq_in",
  493. .start = INT_SPI_INPUT,
  494. .end = INT_SPI_INPUT,
  495. .flags = IORESOURCE_IRQ,
  496. },
  497. {
  498. .name = "spi_irq_out",
  499. .start = INT_SPI_OUTPUT,
  500. .end = INT_SPI_OUTPUT,
  501. .flags = IORESOURCE_IRQ,
  502. },
  503. {
  504. .name = "spi_irq_err",
  505. .start = INT_SPI_ERROR,
  506. .end = INT_SPI_ERROR,
  507. .flags = IORESOURCE_IRQ,
  508. },
  509. {
  510. .name = "spi_base",
  511. .start = 0xA1200000,
  512. .end = 0xA1200000 + SZ_4K - 1,
  513. .flags = IORESOURCE_MEM,
  514. },
  515. {
  516. .name = "spidm_channels",
  517. .flags = IORESOURCE_DMA,
  518. },
  519. {
  520. .name = "spidm_crci",
  521. .flags = IORESOURCE_DMA,
  522. },
  523. };
  524. static struct platform_device qsd_device_spi = {
  525. .name = "spi_qsd",
  526. .id = 0,
  527. .num_resources = ARRAY_SIZE(qsd_spi_resources),
  528. .resource = qsd_spi_resources,
  529. };
  530. static struct spi_board_info msm_spi_board_info[] __initdata = {
  531. {
  532. .modalias = "bma150",
  533. .mode = SPI_MODE_3,
  534. .irq = MSM_GPIO_TO_INT(22),
  535. .bus_num = 0,
  536. .chip_select = 0,
  537. .max_speed_hz = 10000000,
  538. .platform_data = &bma_pdata,
  539. },
  540. };
  541. #define CT_CSR_PHYS 0xA8700000
  542. #define TCSR_SPI_MUX (ct_csr_base + 0x54)
  543. static int msm_qsd_spi_dma_config(void)
  544. {
  545. void __iomem *ct_csr_base = 0;
  546. u32 spi_mux;
  547. int ret = 0;
  548. ct_csr_base = ioremap(CT_CSR_PHYS, PAGE_SIZE);
  549. if (!ct_csr_base) {
  550. pr_err("%s: Could not remap %x\n", __func__, CT_CSR_PHYS);
  551. return -1;
  552. }
  553. spi_mux = readl(TCSR_SPI_MUX);
  554. switch (spi_mux) {
  555. case (1):
  556. qsd_spi_resources[4].start = DMOV_HSUART1_RX_CHAN;
  557. qsd_spi_resources[4].end = DMOV_HSUART1_TX_CHAN;
  558. qsd_spi_resources[5].start = DMOV_HSUART1_RX_CRCI;
  559. qsd_spi_resources[5].end = DMOV_HSUART1_TX_CRCI;
  560. break;
  561. case (2):
  562. qsd_spi_resources[4].start = DMOV_HSUART2_RX_CHAN;
  563. qsd_spi_resources[4].end = DMOV_HSUART2_TX_CHAN;
  564. qsd_spi_resources[5].start = DMOV_HSUART2_RX_CRCI;
  565. qsd_spi_resources[5].end = DMOV_HSUART2_TX_CRCI;
  566. break;
  567. case (3):
  568. qsd_spi_resources[4].start = DMOV_CE_OUT_CHAN;
  569. qsd_spi_resources[4].end = DMOV_CE_IN_CHAN;
  570. qsd_spi_resources[5].start = DMOV_CE_OUT_CRCI;
  571. qsd_spi_resources[5].end = DMOV_CE_IN_CRCI;
  572. break;
  573. default:
  574. ret = -1;
  575. }
  576. iounmap(ct_csr_base);
  577. return ret;
  578. }
  579. static struct msm_gpio qsd_spi_gpio_config_data[] = {
  580. { GPIO_CFG(17, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), "spi_clk" },
  581. { GPIO_CFG(18, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), "spi_mosi" },
  582. { GPIO_CFG(19, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), "spi_miso" },
  583. { GPIO_CFG(20, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), "spi_cs0" },
  584. { GPIO_CFG(21, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_16MA), "spi_pwr" },
  585. };
  586. static int msm_qsd_spi_gpio_config(void)
  587. {
  588. int rc;
  589. rc = msm_gpios_request_enable(qsd_spi_gpio_config_data,
  590. ARRAY_SIZE(qsd_spi_gpio_config_data));
  591. if (rc)
  592. return rc;
  593. /* Set direction for SPI_PWR */
  594. gpio_direction_output(21, 1);
  595. return 0;
  596. }
  597. static void msm_qsd_spi_gpio_release(void)
  598. {
  599. msm_gpios_disable_free(qsd_spi_gpio_config_data,
  600. ARRAY_SIZE(qsd_spi_gpio_config_data));
  601. }
  602. static struct msm_spi_platform_data qsd_spi_pdata = {
  603. .max_clock_speed = 19200000,
  604. .clk_name = "spi_clk",
  605. .gpio_config = msm_qsd_spi_gpio_config,
  606. .gpio_release = msm_qsd_spi_gpio_release,
  607. .dma_config = msm_qsd_spi_dma_config,
  608. };
  609. static void __init msm_qsd_spi_init(void)
  610. {
  611. qsd_device_spi.dev.platform_data = &qsd_spi_pdata;
  612. }
  613. static int mddi_toshiba_pmic_bl(int level)
  614. {
  615. int ret = -EPERM;
  616. if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa()) {
  617. ret = pmic_set_led_intensity(LED_LCD, level);
  618. if (ret)
  619. printk(KERN_WARNING "%s: can't set lcd backlight!\n",
  620. __func__);
  621. }
  622. return ret;
  623. }
  624. static struct msm_panel_common_pdata mddi_toshiba_pdata = {
  625. .pmic_backlight = mddi_toshiba_pmic_bl,
  626. };
  627. static struct platform_device mddi_toshiba_device = {
  628. .name = "mddi_toshiba",
  629. .id = 0,
  630. .dev = {
  631. .platform_data = &mddi_toshiba_pdata,
  632. }
  633. };
  634. static void msm_fb_vreg_config(const char *name, int on)
  635. {
  636. struct vreg *vreg;
  637. int ret = 0;
  638. vreg = vreg_get(NULL, name);
  639. if (IS_ERR(vreg)) {
  640. printk(KERN_ERR "%s: vreg_get(%s) failed (%ld)\n",
  641. __func__, name, PTR_ERR(vreg));
  642. return;
  643. }
  644. ret = (on) ? vreg_enable(vreg) : vreg_disable(vreg);
  645. if (ret)
  646. printk(KERN_ERR "%s: %s(%s) failed!\n",
  647. __func__, (on) ? "vreg_enable" : "vreg_disable", name);
  648. }
  649. #define MDDI_RST_OUT_GPIO 100
  650. static int mddi_power_save_on;
  651. static int msm_fb_mddi_power_save(int on)
  652. {
  653. int flag_on = !!on;
  654. int ret = 0;
  655. if (mddi_power_save_on == flag_on)
  656. return ret;
  657. mddi_power_save_on = flag_on;
  658. if (!flag_on && (machine_is_qsd8x50_ffa()
  659. || machine_is_qsd8x50a_ffa())) {
  660. gpio_set_value(MDDI_RST_OUT_GPIO, 0);
  661. mdelay(1);
  662. }
  663. ret = pmic_lp_mode_control(flag_on ? OFF_CMD : ON_CMD,
  664. PM_VREG_LP_MSME2_ID);
  665. if (ret)
  666. printk(KERN_ERR "%s: pmic_lp_mode_control failed!\n", __func__);
  667. msm_fb_vreg_config("gp5", flag_on);
  668. msm_fb_vreg_config("boost", flag_on);
  669. if (flag_on && (machine_is_qsd8x50_ffa()
  670. || machine_is_qsd8x50a_ffa())) {
  671. gpio_set_value(MDDI_RST_OUT_GPIO, 0);
  672. mdelay(1);
  673. gpio_set_value(MDDI_RST_OUT_GPIO, 1);
  674. gpio_set_value(MDDI_RST_OUT_GPIO, 1);
  675. mdelay(1);
  676. }
  677. return ret;
  678. }
  679. static int msm_fb_mddi_sel_clk(u32 *clk_rate)
  680. {
  681. *clk_rate *= 2;
  682. return 0;
  683. }
  684. static struct mddi_platform_data mddi_pdata = {
  685. .mddi_power_save = msm_fb_mddi_power_save,
  686. .mddi_sel_clk = msm_fb_mddi_sel_clk,
  687. };
  688. static struct msm_panel_common_pdata mdp_pdata = {
  689. .gpio = 98,
  690. };
  691. static void __init msm_fb_add_devices(void)
  692. {
  693. msm_fb_register_device("mdp", &mdp_pdata);
  694. msm_fb_register_device("pmdh", &mddi_pdata);
  695. msm_fb_register_device("emdh", &mddi_pdata);
  696. msm_fb_register_device("tvenc", 0);
  697. msm_fb_register_device("lcdc", 0);
  698. }
  699. static struct resource msm_audio_resources[] = {
  700. {
  701. .flags = IORESOURCE_DMA,
  702. },
  703. {
  704. .name = "aux_pcm_dout",
  705. .start = 68,
  706. .end = 68,
  707. .flags = IORESOURCE_IO,
  708. },
  709. {
  710. .name = "aux_pcm_din",
  711. .start = 69,
  712. .end = 69,
  713. .flags = IORESOURCE_IO,
  714. },
  715. {
  716. .name = "aux_pcm_syncout",
  717. .start = 70,
  718. .end = 70,
  719. .flags = IORESOURCE_IO,
  720. },
  721. {
  722. .name = "aux_pcm_clkin_a",
  723. .start = 71,
  724. .end = 71,
  725. .flags = IORESOURCE_IO,
  726. },
  727. {
  728. .name = "sdac_din",
  729. .start = 144,
  730. .end = 144,
  731. .flags = IORESOURCE_IO,
  732. },
  733. {
  734. .name = "sdac_dout",
  735. .start = 145,
  736. .end = 145,
  737. .flags = IORESOURCE_IO,
  738. },
  739. {
  740. .name = "sdac_wsout",
  741. .start = 143,
  742. .end = 143,
  743. .flags = IORESOURCE_IO,
  744. },
  745. {
  746. .name = "cc_i2s_clk",
  747. .start = 142,
  748. .end = 142,
  749. .flags = IORESOURCE_IO,
  750. },
  751. {
  752. .name = "audio_master_clkout",
  753. .start = 146,
  754. .end = 146,
  755. .flags = IORESOURCE_IO,
  756. },
  757. {
  758. .name = "audio_base_addr",
  759. .start = 0xa0700000,
  760. .end = 0xa0700000 + 4,
  761. .flags = IORESOURCE_MEM,
  762. },
  763. };
  764. static unsigned audio_gpio_on[] = {
  765. GPIO_CFG(68, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* PCM_DOUT */
  766. GPIO_CFG(69, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* PCM_DIN */
  767. GPIO_CFG(70, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* PCM_SYNC */
  768. GPIO_CFG(71, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* PCM_CLK */
  769. GPIO_CFG(142, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* CC_I2S_CLK */
  770. GPIO_CFG(143, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* SADC_WSOUT */
  771. GPIO_CFG(144, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* SADC_DIN */
  772. GPIO_CFG(145, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* SDAC_DOUT */
  773. GPIO_CFG(146, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* MA_CLK_OUT */
  774. };
  775. static void __init audio_gpio_init(void)
  776. {
  777. int pin, rc;
  778. for (pin = 0; pin < ARRAY_SIZE(audio_gpio_on); pin++) {
  779. rc = gpio_tlmm_config(audio_gpio_on[pin],
  780. GPIO_CFG_ENABLE);
  781. if (rc) {
  782. printk(KERN_ERR
  783. "%s: gpio_tlmm_config(%#x)=%d\n",
  784. __func__, audio_gpio_on[pin], rc);
  785. return;
  786. }
  787. }
  788. }
  789. static struct platform_device msm_audio_device = {
  790. .name = "msm_audio",
  791. .id = 0,
  792. .num_resources = ARRAY_SIZE(msm_audio_resources),
  793. .resource = msm_audio_resources,
  794. };
  795. static struct resource bluesleep_resources[] = {
  796. {
  797. .name = "gpio_host_wake",
  798. .start = 21,
  799. .end = 21,
  800. .flags = IORESOURCE_IO,
  801. },
  802. {
  803. .name = "gpio_ext_wake",
  804. .start = 19,
  805. .end = 19,
  806. .flags = IORESOURCE_IO,
  807. },
  808. {
  809. .name = "host_wake",
  810. .start = MSM_GPIO_TO_INT(21),
  811. .end = MSM_GPIO_TO_INT(21),
  812. .flags = IORESOURCE_IRQ,
  813. },
  814. };
  815. static struct platform_device msm_bluesleep_device = {
  816. .name = "bluesleep",
  817. .id = -1,
  818. .num_resources = ARRAY_SIZE(bluesleep_resources),
  819. .resource = bluesleep_resources,
  820. };
  821. #ifdef CONFIG_BT
  822. static struct platform_device msm_bt_power_device = {
  823. .name = "bt_power",
  824. };
  825. enum {
  826. BT_SYSRST,
  827. BT_WAKE,
  828. BT_HOST_WAKE,
  829. BT_VDD_IO,
  830. BT_RFR,
  831. BT_CTS,
  832. BT_RX,
  833. BT_TX,
  834. BT_VDD_FREG
  835. };
  836. static struct msm_gpio bt_config_power_off[] = {
  837. { GPIO_CFG(18, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
  838. "BT SYSRST" },
  839. { GPIO_CFG(19, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
  840. "BT WAKE" },
  841. { GPIO_CFG(21, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
  842. "HOST WAKE" },
  843. { GPIO_CFG(22, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
  844. "BT VDD_IO" },
  845. { GPIO_CFG(43, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
  846. "UART1DM_RFR" },
  847. { GPIO_CFG(44, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
  848. "UART1DM_CTS" },
  849. { GPIO_CFG(45, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
  850. "UART1DM_RX" },
  851. { GPIO_CFG(46, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
  852. "UART1DM_TX" }
  853. };
  854. static struct msm_gpio bt_config_power_on[] = {
  855. { GPIO_CFG(18, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
  856. "BT SYSRST" },
  857. { GPIO_CFG(19, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
  858. "BT WAKE" },
  859. { GPIO_CFG(21, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
  860. "HOST WAKE" },
  861. { GPIO_CFG(22, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
  862. "BT VDD_IO" },
  863. { GPIO_CFG(43, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
  864. "UART1DM_RFR" },
  865. { GPIO_CFG(44, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
  866. "UART1DM_CTS" },
  867. { GPIO_CFG(45, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
  868. "UART1DM_RX" },
  869. { GPIO_CFG(46, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
  870. "UART1DM_TX" }
  871. };
  872. static struct msm_gpio wlan_config_power_off[] = {
  873. { GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
  874. "SDC2_CLK" },
  875. { GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
  876. "SDC2_CMD" },
  877. { GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
  878. "SDC2_D3" },
  879. { GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
  880. "SDC2_D2" },
  881. { GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
  882. "SDC2_D1" },
  883. { GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
  884. "SDC2_D0" },
  885. { GPIO_CFG(113, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
  886. "VDD_WLAN" },
  887. { GPIO_CFG(138, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
  888. "WLAN_PWD" }
  889. };
  890. static struct msm_gpio wlan_config_power_on[] = {
  891. { GPIO_CFG(62, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
  892. "SDC2_CLK" },
  893. { GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
  894. "SDC2_CMD" },
  895. { GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
  896. "SDC2_D3" },
  897. { GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
  898. "SDC2_D2" },
  899. { GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
  900. "SDC2_D1" },
  901. { GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
  902. "SDC2_D0" },
  903. { GPIO_CFG(113, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
  904. "VDD_WLAN" },
  905. { GPIO_CFG(138, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
  906. "WLAN_PWD" }
  907. };
  908. static int bluetooth_power(int on)
  909. {
  910. int rc;
  911. struct vreg *vreg_wlan;
  912. vreg_wlan = vreg_get(NULL, "wlan");
  913. if (IS_ERR(vreg_wlan)) {
  914. printk(KERN_ERR "%s: vreg get failed (%ld)\n",
  915. __func__, PTR_ERR(vreg_wlan));
  916. return PTR_ERR(vreg_wlan);
  917. }
  918. if (on) {
  919. /* units of mV, steps of 50 mV */
  920. rc = vreg_set_level(vreg_wlan, PMIC_VREG_WLAN_LEVEL);
  921. if (rc) {
  922. printk(KERN_ERR "%s: vreg wlan set level failed (%d)\n",
  923. __func__, rc);
  924. return -EIO;
  925. }
  926. rc = vreg_enable(vreg_wlan);
  927. if (rc) {
  928. printk(KERN_ERR "%s: vreg wlan enable failed (%d)\n",
  929. __func__, rc);
  930. return -EIO;
  931. }
  932. rc = msm_gpios_enable(bt_config_power_on,
  933. ARRAY_SIZE(bt_config_power_on));
  934. if (rc < 0) {
  935. printk(KERN_ERR
  936. "%s: bt power on gpio config failed: %d\n",
  937. __func__, rc);
  938. return rc;
  939. }
  940. if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa()) {
  941. rc = msm_gpios_enable
  942. (wlan_config_power_on,
  943. ARRAY_SIZE(wlan_config_power_on));
  944. if (rc < 0) {
  945. printk
  946. (KERN_ERR
  947. "%s: wlan power on gpio config failed: %d\n",
  948. __func__, rc);
  949. return rc;
  950. }
  951. }
  952. gpio_set_value(22, on); /* VDD_IO */
  953. gpio_set_value(18, on); /* SYSRST */
  954. if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa()) {
  955. gpio_set_value(138, 0); /* WLAN: CHIP_PWD */
  956. gpio_set_value(113, on); /* WLAN */
  957. }
  958. } else {
  959. if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa()) {
  960. gpio_set_value(138, on); /* WLAN: CHIP_PWD */
  961. gpio_set_value(113, on); /* WLAN */
  962. }
  963. gpio_set_value(18, on); /* SYSRST */
  964. gpio_set_value(22, on); /* VDD_IO */
  965. rc = vreg_disable(vreg_wlan);
  966. if (rc) {
  967. printk(KERN_ERR "%s: vreg wlan disable failed (%d)\n",
  968. __func__, rc);
  969. return -EIO;
  970. }
  971. rc = msm_gpios_enable(bt_config_power_off,
  972. ARRAY_SIZE(bt_config_power_off));
  973. if (rc < 0) {
  974. printk(KERN_ERR
  975. "%s: bt power off gpio config failed: %d\n",
  976. __func__, rc);
  977. return rc;
  978. }
  979. if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa()) {
  980. rc = msm_gpios_enable
  981. (wlan_config_power_off,
  982. ARRAY_SIZE(wlan_config_power_off));
  983. if (rc < 0) {
  984. printk
  985. (KERN_ERR
  986. "%s: wlan power off gpio config failed: %d\n",
  987. __func__, rc);
  988. return rc;
  989. }
  990. }
  991. }
  992. printk(KERN_DEBUG "Bluetooth power switch: %d\n", on);
  993. return 0;
  994. }
  995. static void __init bt_power_init(void)
  996. {
  997. struct vreg *vreg_bt;
  998. int rc;
  999. if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa()) {
  1000. gpio_set_value(138, 0); /* WLAN: CHIP_PWD */
  1001. gpio_set_value(113, 0); /* WLAN */
  1002. }
  1003. gpio_set_value(18, 0); /* SYSRST */
  1004. gpio_set_value(22, 0); /* VDD_IO */
  1005. /* do not have vreg bt defined, gp6 is the same */
  1006. /* vreg_get parameter 1 (struct device *) is ignored */
  1007. vreg_bt = vreg_get(NULL, "gp6");
  1008. if (IS_ERR(vreg_bt)) {
  1009. printk(KERN_ERR "%s: vreg get failed (%ld)\n",
  1010. __func__, PTR_ERR(vreg_bt));
  1011. goto exit;
  1012. }
  1013. /* units of mV, steps of 50 mV */
  1014. rc = vreg_set_level(vreg_bt, PMIC_VREG_GP6_LEVEL);
  1015. if (rc) {
  1016. printk(KERN_ERR "%s: vreg bt set level failed (%d)\n",
  1017. __func__, rc);
  1018. goto exit;
  1019. }
  1020. rc = vreg_enable(vreg_bt);
  1021. if (rc) {
  1022. printk(KERN_ERR "%s: vreg bt enable failed (%d)\n",
  1023. __func__, rc);
  1024. goto exit;
  1025. }
  1026. if (bluetooth_power(0))
  1027. goto exit;
  1028. msm_bt_power_device.dev.platform_data = &bluetooth_power;
  1029. printk(KERN_DEBUG "Bluetooth power switch: initialized\n");
  1030. exit:
  1031. return;
  1032. }
  1033. #else
  1034. #define bt_power_init(x) do {} while (0)
  1035. #endif
  1036. static struct resource kgsl_resources[] = {
  1037. {
  1038. .name = "kgsl_reg_memory",
  1039. .start = 0xA0000000,
  1040. .end = 0xA001ffff,
  1041. .flags = IORESOURCE_MEM,
  1042. },
  1043. {
  1044. .name = "kgsl_phys_memory",
  1045. .start = MSM_GPU_PHYS_BASE,
  1046. .end = MSM_GPU_PHYS_BASE + MSM_GPU_PHYS_SIZE - 1,
  1047. .flags = IORESOURCE_MEM,
  1048. },
  1049. {
  1050. .name = "kgsl_yamato_irq",
  1051. .start = INT_GRAPHICS,
  1052. .end = INT_GRAPHICS,
  1053. .flags = IORESOURCE_IRQ,
  1054. },
  1055. };
  1056. static struct kgsl_platform_data kgsl_pdata = {
  1057. .high_axi_3d = 128000, /* Max for 8K */
  1058. .max_grp2d_freq = 0,
  1059. .min_grp2d_freq = 0,
  1060. .set_grp2d_async = NULL,
  1061. .max_grp3d_freq = 0,
  1062. .min_grp3d_freq = 0,
  1063. .set_grp3d_async = NULL,
  1064. .imem_clk_name = "imem_clk",
  1065. .grp3d_clk_name = "grp_clk",
  1066. .grp2d_clk_name = NULL,
  1067. };
  1068. static struct platform_device msm_device_kgsl = {
  1069. .name = "kgsl",
  1070. .id = -1,
  1071. .num_resources = ARRAY_SIZE(kgsl_resources),
  1072. .resource = kgsl_resources,
  1073. .dev = {
  1074. .platform_data = &kgsl_pdata,
  1075. },
  1076. };
  1077. static struct platform_device msm_device_pmic_leds = {
  1078. .name = "pmic-leds",
  1079. .id = -1,
  1080. };
  1081. /* TSIF begin */
  1082. #if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
  1083. #define TSIF_A_SYNC GPIO_CFG(106, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
  1084. #define TSIF_A_DATA GPIO_CFG(107, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
  1085. #define TSIF_A_EN GPIO_CFG(108, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
  1086. #define TSIF_A_CLK GPIO_CFG(109, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA)
  1087. static const struct msm_gpio tsif_gpios[] = {
  1088. { .gpio_cfg = TSIF_A_CLK, .label = "tsif_clk", },
  1089. { .gpio_cfg = TSIF_A_EN, .label = "tsif_en", },
  1090. { .gpio_cfg = TSIF_A_DATA, .label = "tsif_data", },
  1091. { .gpio_cfg = TSIF_A_SYNC, .label = "tsif_sync", },
  1092. };
  1093. static struct msm_tsif_platform_data tsif_platform_data = {
  1094. .num_gpios = ARRAY_SIZE(tsif_gpios),
  1095. .gpios = tsif_gpios,
  1096. .tsif_clk = "tsif_clk",
  1097. .tsif_ref_clk = "tsif_ref_clk",
  1098. };
  1099. #endif /* defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) */
  1100. /* TSIF end */
  1101. #ifdef CONFIG_QSD_SVS
  1102. #define TPS65023_MAX_DCDC1 1600
  1103. #else
  1104. #define TPS65023_MAX_DCDC1 CONFIG_QSD_PMIC_DEFAULT_DCDC1
  1105. #endif
  1106. static int qsd8x50_tps65023_set_dcdc1(int mVolts)
  1107. {
  1108. int rc = 0;
  1109. #ifdef CONFIG_QSD_SVS
  1110. rc = tps65023_set_dcdc1_level(mVolts);
  1111. /* By default the TPS65023 will be initialized to 1.225V.
  1112. * So we can safely switch to any frequency within this
  1113. * voltage even if the device is not probed/ready.
  1114. */
  1115. if (rc == -ENODEV && mVolts <= CONFIG_QSD_PMIC_DEFAULT_DCDC1)
  1116. rc = 0;
  1117. #else
  1118. /* Disallow frequencies not supported in the default PMIC
  1119. * output voltage.
  1120. */
  1121. if (mVolts > CONFIG_QSD_PMIC_DEFAULT_DCDC1)
  1122. rc = -EFAULT;
  1123. #endif
  1124. return rc;
  1125. }
  1126. static struct msm_acpu_clock_platform_data qsd8x50_clock_data = {
  1127. .acpu_switch_time_us = 20,
  1128. .max_speed_delta_khz = 256000,
  1129. .vdd_switch_time_us = 62,
  1130. .max_vdd = TPS65023_MAX_DCDC1,
  1131. .acpu_set_vdd = qsd8x50_tps65023_set_dcdc1,
  1132. };
  1133. static void touchpad_gpio_release(void)
  1134. {
  1135. gpio_free(TOUCHPAD_IRQ);
  1136. gpio_free(TOUCHPAD_SUSPEND);
  1137. }
  1138. static int touchpad_gpio_setup(void)
  1139. {
  1140. int rc;
  1141. int suspend_pin = TOUCHPAD_SUSPEND;
  1142. int irq_pin = TOUCHPAD_IRQ;
  1143. unsigned suspend_cfg =
  1144. GPIO_CFG(suspend_pin, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA);
  1145. unsigned irq_cfg =
  1146. GPIO_CFG(irq_pin, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA);
  1147. rc = gpio_request(irq_pin, "msm_touchpad_irq");
  1148. if (rc) {
  1149. pr_err("gpio_request failed on pin %d (rc=%d)\n",
  1150. irq_pin, rc);
  1151. goto err_gpioconfig;
  1152. }
  1153. rc = gpio_request(suspend_pin, "msm_touchpad_suspend");
  1154. if (rc) {
  1155. pr_err("gpio_request failed on pin %d (rc=%d)\n",
  1156. suspend_pin, rc);
  1157. goto err_gpioconfig;
  1158. }
  1159. rc = gpio_tlmm_config(suspend_cfg, GPIO_CFG_ENABLE);
  1160. if (rc) {
  1161. pr_err("gpio_tlmm_config failed on pin %d (rc=%d)\n",
  1162. suspend_pin, rc);
  1163. goto err_gpioconfig;
  1164. }
  1165. rc = gpio_tlmm_config(irq_cfg, GPIO_CFG_ENABLE);
  1166. if (rc) {
  1167. pr_err("gpio_tlmm_config failed on pin %d (rc=%d)\n",
  1168. irq_pin, rc);
  1169. goto err_gpioconfig;
  1170. }
  1171. return rc;
  1172. err_gpioconfig:
  1173. touchpad_gpio_release();
  1174. return rc;
  1175. }
  1176. static struct msm_touchpad_platform_data msm_touchpad_data = {
  1177. .gpioirq = TOUCHPAD_IRQ,
  1178. .gpiosuspend = TOUCHPAD_SUSPEND,
  1179. .gpio_setup = touchpad_gpio_setup,
  1180. .gpio_shutdown = touchpad_gpio_release
  1181. };
  1182. #define KBD_RST 35
  1183. #define KBD_IRQ 36
  1184. static void kbd_gpio_release(void)
  1185. {
  1186. gpio_free(KBD_IRQ);
  1187. gpio_free(KBD_RST);
  1188. }
  1189. static int kbd_gpio_setup(void)
  1190. {
  1191. int rc;
  1192. int respin = KBD_RST;
  1193. int irqpin = KBD_IRQ;
  1194. unsigned rescfg =
  1195. GPIO_CFG(respin, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA);
  1196. unsigned irqcfg =
  1197. GPIO_CFG(irqpin, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA);
  1198. rc = gpio_request(irqpin, "gpio_keybd_irq");
  1199. if (rc) {
  1200. pr_err("gpio_request failed on pin %d (rc=%d)\n",
  1201. irqpin, rc);
  1202. goto err_gpioconfig;
  1203. }
  1204. rc = gpio_request(respin, "gpio_keybd_reset");
  1205. if (rc) {
  1206. pr_err("gpio_request failed on pin %d (rc=%d)\n",
  1207. respin, rc);
  1208. goto err_gpioconfig;
  1209. }
  1210. rc = gpio_tlmm_config(rescfg, GPIO_CFG_ENABLE);
  1211. if (rc) {
  1212. pr_err("gpio_tlmm_config failed on pin %d (rc=%d)\n",
  1213. respin, rc);
  1214. goto err_gpioconfig;
  1215. }
  1216. rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
  1217. if (rc) {
  1218. pr_err("gpio_tlmm_config failed on pin %d (rc=%d)\n",
  1219. irqpin, rc);
  1220. goto err_gpioconfig;
  1221. }
  1222. return rc;
  1223. err_gpioconfig:
  1224. kbd_gpio_release();
  1225. return rc;
  1226. }
  1227. /* use gpio output pin to toggle keyboard external reset pin */
  1228. static void kbd_hwreset(int kbd_mclrpin)
  1229. {
  1230. gpio_direction_output(kbd_mclrpin, 0);
  1231. gpio_direction_output(kbd_mclrpin, 1);
  1232. }
  1233. static struct msm_i2ckbd_platform_data msm_kybd_data = {
  1234. .hwrepeat = 0,
  1235. .scanset1 = 1,
  1236. .gpioreset = KBD_RST,
  1237. .gpioirq = KBD_IRQ,
  1238. .gpio_setup = kbd_gpio_setup,
  1239. .gpio_shutdown = kbd_gpio_release,
  1240. .hw_reset = kbd_hwreset,
  1241. };
  1242. static struct i2c_board_info msm_i2c_board_info[] __initdata = {
  1243. {
  1244. I2C_BOARD_INFO("glidesensor", 0x2A),
  1245. .irq = MSM_GPIO_TO_INT(TOUCHPAD_IRQ),
  1246. .platform_data = &msm_touchpad_data
  1247. },
  1248. {
  1249. I2C_BOARD_INFO("msm-i2ckbd", 0x3A),
  1250. .type = "msm-i2ckbd",
  1251. .irq = MSM_GPIO_TO_INT(KBD_IRQ),
  1252. .platform_data = &msm_kybd_data
  1253. },
  1254. #ifdef CONFIG_MT9D112
  1255. {
  1256. I2C_BOARD_INFO("mt9d112", 0x78 >> 1),
  1257. },
  1258. #endif
  1259. #ifdef CONFIG_S5K3E2FX
  1260. {
  1261. I2C_BOARD_INFO("s5k3e2fx", 0x20 >> 1),
  1262. },
  1263. #endif
  1264. #ifdef CONFIG_MT9P012
  1265. {
  1266. I2C_BOARD_INFO("mt9p012", 0x6C >> 1),
  1267. },
  1268. #endif
  1269. #ifdef CONFIG_MT9P012_KM
  1270. {
  1271. I2C_BOARD_INFO("mt9p012_km", 0x6C >> 2),
  1272. },
  1273. #endif
  1274. #if defined(CONFIG_MT9T013) || defined(CONFIG_SENSORS_MT9T013)
  1275. {
  1276. I2C_BOARD_INFO("mt9t013", 0x6C),
  1277. },
  1278. #endif
  1279. {
  1280. I2C_BOARD_INFO("tps65023", 0x48),
  1281. },
  1282. };
  1283. #ifdef CONFIG_MSM_CAMERA
  1284. static uint32_t camera_off_gpio_table[] = {
  1285. /* parallel CAMERA interfaces */
  1286. GPIO_CFG(0, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT0 */
  1287. GPIO_CFG(1, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT1 */
  1288. GPIO_CFG(2, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT2 */
  1289. GPIO_CFG(3, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT3 */
  1290. GPIO_CFG(4, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT4 */
  1291. GPIO_CFG(5, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT5 */
  1292. GPIO_CFG(6, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT6 */
  1293. GPIO_CFG(7, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT7 */
  1294. GPIO_CFG(8, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT8 */
  1295. GPIO_CFG(9, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT9 */
  1296. GPIO_CFG(10, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT10 */
  1297. GPIO_CFG(11, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT11 */
  1298. GPIO_CFG(12, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCLK */
  1299. GPIO_CFG(13, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* HSYNC_IN */
  1300. GPIO_CFG(14, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* VSYNC_IN */
  1301. GPIO_CFG(15, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* MCLK */
  1302. };
  1303. static uint32_t camera_on_gpio_table[] = {
  1304. /* parallel CAMERA interfaces */
  1305. GPIO_CFG(0, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT0 */
  1306. GPIO_CFG(1, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT1 */
  1307. GPIO_CFG(2, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT2 */
  1308. GPIO_CFG(3, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT3 */
  1309. GPIO_CFG(4, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT4 */
  1310. GPIO_CFG(5, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT5 */
  1311. GPIO_CFG(6, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT6 */
  1312. GPIO_CFG(7, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT7 */
  1313. GPIO_CFG(8, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT8 */
  1314. GPIO_CFG(9, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT9 */
  1315. GPIO_CFG(10, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT10 */
  1316. GPIO_CFG(11, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* DAT11 */
  1317. GPIO_CFG(12, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* PCLK */
  1318. GPIO_CFG(13, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* HSYNC_IN */
  1319. GPIO_CFG(14, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), /* VSYNC_IN */
  1320. GPIO_CFG(15, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_16MA), /* MCLK */
  1321. };
  1322. static uint32_t camera_on_gpio_ffa_table[] = {
  1323. /* parallel CAMERA interfaces */
  1324. GPIO_CFG(95, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_16MA), /* I2C_SCL */
  1325. GPIO_CFG(96, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_16MA), /* I2C_SDA */
  1326. /* FFA front Sensor Reset */
  1327. GPIO_CFG(137, 1, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_16MA),
  1328. };
  1329. static uint32_t camera_off_gpio_ffa_table[] = {
  1330. /* FFA front Sensor Reset */
  1331. GPIO_CFG(137, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_16MA),
  1332. };
  1333. static void config_gpio_table(uint32_t *table, int len)
  1334. {
  1335. int n, rc;
  1336. for (n = 0; n < len; n++) {
  1337. rc = gpio_tlmm_config(table[n], GPIO_CFG_ENABLE);
  1338. if (rc) {
  1339. printk(KERN_ERR "%s: gpio_tlmm_config(%#x)=%d\n",
  1340. __func__, table[n], rc);
  1341. break;
  1342. }
  1343. }
  1344. }
  1345. static struct vreg *vreg_gp2;
  1346. static struct vreg *vreg_gp3;
  1347. static void msm_camera_vreg_config(int vreg_en)
  1348. {
  1349. int rc;
  1350. if (vreg_gp2 == NULL) {
  1351. vreg_gp2 = vreg_get(NULL, "gp2");
  1352. if (IS_ERR(vreg_gp2)) {
  1353. printk(KERN_ERR "%s: vreg_get(%s) failed (%ld)\n",
  1354. __func__, "gp2", PTR_ERR(vreg_gp2));
  1355. return;
  1356. }
  1357. rc = vreg_set_level(vreg_gp2, 1800);
  1358. if (rc) {
  1359. printk(KERN_ERR "%s: GP2 set_level failed (%d)\n",
  1360. __func__, rc);
  1361. }
  1362. }
  1363. if (vreg_gp3 == NULL) {
  1364. vreg_gp3 = vreg_get(NULL, "gp3");
  1365. if (IS_ERR(vreg_gp3)) {
  1366. printk(KERN_ERR "%s: vreg_get(%s) failed (%ld)\n",
  1367. __func__, "gp3", PTR_ERR(vreg_gp3));
  1368. return;
  1369. }
  1370. rc = vreg_set_level(vreg_gp3, 2800);
  1371. if (rc) {
  1372. printk(KERN_ERR "%s: GP3 set level failed (%d)\n",
  1373. __func__, rc);
  1374. }
  1375. }
  1376. if (vreg_en) {
  1377. rc = vreg_enable(vreg_gp2);
  1378. if (rc) {
  1379. printk(KERN_ERR "%s: GP2 enable failed (%d)\n",
  1380. __func__, rc);
  1381. }
  1382. rc = vreg_enable(vreg_gp3);
  1383. if (rc) {
  1384. printk(KERN_ERR "%s: GP3 enable failed (%d)\n",
  1385. __func__, rc);
  1386. }
  1387. } else {
  1388. rc = vreg_disable(vreg_gp2);
  1389. if (rc) {
  1390. printk(KERN_ERR "%s: GP2 disable failed (%d)\n",
  1391. __func__, rc);
  1392. }
  1393. rc = vreg_disable(vreg_gp3);
  1394. if (rc) {
  1395. printk(KERN_ERR "%s: GP3 disable failed (%d)\n",
  1396. __func__, rc);
  1397. }
  1398. }
  1399. }
  1400. static void config_camera_on_gpios(void)
  1401. {
  1402. int vreg_en = 1;
  1403. if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa()) {
  1404. config_gpio_table(camera_on_gpio_ffa_table,
  1405. ARRAY_SIZE(camera_on_gpio_ffa_table));
  1406. msm_camera_vreg_config(vreg_en);
  1407. gpio_set_value(137, 0);
  1408. }
  1409. config_gpio_table(camera_on_gpio_table,
  1410. ARRAY_SIZE(camera_on_gpio_table));
  1411. }
  1412. static void config_camera_off_gpios(void)
  1413. {
  1414. int vreg_en = 0;
  1415. if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa()) {
  1416. config_gpio_table(camera_off_gpio_ffa_table,
  1417. ARRAY_SIZE(camera_off_gpio_ffa_table));
  1418. msm_camera_vreg_config(vreg_en);
  1419. }
  1420. config_gpio_table(camera_off_gpio_table,
  1421. ARRAY_SIZE(camera_off_gpio_table));
  1422. }
  1423. static struct resource msm_camera_resources[] = {
  1424. {
  1425. .start = 0xA0F00000,
  1426. .end = 0xA0F00000 + SZ_1M - 1,
  1427. .flags = IORESOURCE_MEM,
  1428. },
  1429. {
  1430. .start = INT_VFE,
  1431. .end = INT_VFE,
  1432. .flags = IORESOURCE_IRQ,
  1433. },
  1434. };
  1435. static struct msm_camera_device_platform_data msm_camera_device_data = {
  1436. .camera_gpio_on = config_camera_on_gpios,
  1437. .camera_gpio_off = config_camera_off_gpios,
  1438. .ioext.mdcphy = MSM_MDC_PHYS,
  1439. .ioext.mdcsz = MSM_MDC_SIZE,
  1440. .ioext.appphy = MSM_CLK_CTL_PHYS,
  1441. .ioext.appsz = MSM_CLK_CTL_SIZE,
  1442. };
  1443. static struct msm_camera_sensor_flash_src msm_flash_src = {
  1444. .flash_sr_type = MSM_CAMERA_FLASH_SRC_PMIC,
  1445. ._fsrc.pmic_src.low_current = 30,
  1446. ._fsrc.pmic_src.high_current = 100,
  1447. };
  1448. #ifdef CONFIG_MT9D112
  1449. static struct msm_camera_sensor_flash_data flash_mt9d112 = {
  1450. .flash_type = MSM_CAMERA_FLASH_LED,
  1451. .flash_src = &msm_flash_src
  1452. };
  1453. static struct msm_camera_sensor_info msm_camera_sensor_mt9d112_data = {
  1454. .sensor_name = "mt9d112",
  1455. .sensor_reset = 17,
  1456. .sensor_pwd = 85,
  1457. .vcm_pwd = 0,
  1458. .vcm_enable = 0,
  1459. .pdata = &msm_camera_device_data,
  1460. .resource = msm_camera_resources,
  1461. .num_resources = ARRAY_SIZE(msm_camera_resources),
  1462. .flash_data = &flash_mt9d112
  1463. };
  1464. static struct platform_device msm_camera_sensor_mt9d112 = {
  1465. .name = "msm_camera_mt9d112",
  1466. .dev = {
  1467. .platform_data = &msm_camera_sensor_mt9d112_data,
  1468. },
  1469. };
  1470. #endif
  1471. #ifdef CONFIG_S5K3E2FX
  1472. static struct msm_camera_sensor_flash_data flash_s5k3e2fx = {
  1473. .flash_type = MSM_CAMERA_FLASH_LED,
  1474. .flash_src = &msm_flash_src
  1475. };
  1476. static struct msm_camera_sensor_info msm_camera_sensor_s5k3e2fx_data = {
  1477. .sensor_name = "s5k3e2fx",
  1478. .sensor_reset = 17,
  1479. .sensor_pwd = 85,
  1480. /*.vcm_pwd = 31, */ /* CAM1_VCM_EN, enabled in a9 */
  1481. .vcm_enable = 0,
  1482. .pdata = &msm_camera_device_data,
  1483. .resource = msm_camera_resources,
  1484. .num_resources = ARRAY_SIZE(msm_camera_resources),
  1485. .flash_data = &flash_s5k3e2fx
  1486. };
  1487. static struct platform_device msm_camera_sensor_s5k3e2fx = {
  1488. .name = "msm_camera_s5k3e2fx",
  1489. .dev = {
  1490. .platform_data = &msm_camera_sensor_s5k3e2fx_data,
  1491. },
  1492. };
  1493. #endif
  1494. #ifdef CONFIG_MT9P012
  1495. static struct msm_camera_sensor_flash_data flash_mt9p012 = {
  1496. .flash_type = MSM_CAMERA_FLASH_LED,
  1497. .flash_src = &msm_flash_src
  1498. };
  1499. static struct msm_camera_sensor_info msm_camera_sensor_mt9p012_data = {
  1500. .sensor_name = "mt9p012",
  1501. .sensor_reset = 17,
  1502. .sensor_pwd = 85,
  1503. .vcm_pwd = 88,
  1504. .vcm_enable = 0,
  1505. .pdata = &msm_camera_device_data,
  1506. .resource = msm_camera_resources,
  1507. .num_resources = ARRAY_SIZE(msm_camera_resources),
  1508. .flash_data = &flash_mt9p012
  1509. };
  1510. static struct platform_device msm_camera_sensor_mt9p012 = {
  1511. .name = "msm_camera_mt9p012",
  1512. .dev = {
  1513. .platform_data = &msm_camera_sensor_mt9p012_data,
  1514. },
  1515. };
  1516. #endif
  1517. #ifdef CONFIG_MT9P012_KM
  1518. static struct msm_camera_sensor_flash_data flash_mt9p012_km = {
  1519. .flash_type = MSM_CAMERA_FLASH_LED,
  1520. .flash_src = &msm_flash_src
  1521. };
  1522. static struct msm_camera_sensor_info msm_camera_sensor_mt9p012_km_data = {
  1523. .sensor_name = "mt9p012_km",
  1524. .sensor_reset = 17,
  1525. .sensor_pwd = 85,
  1526. .vcm_pwd = 88,
  1527. .vcm_enable = 0,
  1528. .pdata = &msm_camera_device_data,
  1529. .resource = msm_camera_resources,
  1530. .num_resources = ARRAY_SIZE(msm_camera_resources),
  1531. .flash_data = &flash_mt9p012_km
  1532. };
  1533. static struct platform_device msm_camera_sensor_mt9p012_km = {
  1534. .name = "msm_camera_mt9p012_km",
  1535. .dev = {
  1536. .platform_data = &msm_camera_sensor_mt9p012_km_data,
  1537. },
  1538. };
  1539. #endif
  1540. #ifdef CONFIG_MT9T013
  1541. static struct msm_camera_sensor_flash_data flash_mt9t013 = {
  1542. .flash_type = MSM_CAMERA_FLASH_LED,
  1543. .flash_src = &msm_flash_src
  1544. };
  1545. static struct msm_camera_sensor_info msm_camera_sensor_mt9t013_data = {
  1546. .sensor_name = "mt9t013",
  1547. .sensor_reset = 17,
  1548. .sensor_pwd = 85,
  1549. .vcm_pwd = 0,
  1550. .vcm_enable = 0,
  1551. .pdata = &msm_camera_device_data,
  1552. .resource = msm_camera_resources,
  1553. .num_resources = ARRAY_SIZE(msm_camera_resources),
  1554. .flash_data = &flash_mt9t013
  1555. };
  1556. static struct platform_device msm_camera_sensor_mt9t013 = {
  1557. .name = "msm_camera_mt9t013",
  1558. .dev = {
  1559. .platform_data = &msm_camera_sensor_mt9t013_data,
  1560. },
  1561. };
  1562. #endif
  1563. #endif /*CONFIG_MSM_CAMERA*/
  1564. static u32 msm_calculate_batt_capacity(u32 current_voltage);
  1565. static struct msm_psy_batt_pdata msm_psy_batt_data = {
  1566. .voltage_min_design = 3200,
  1567. .voltage_max_design = 4200,
  1568. .avail_chg_sources = AC_CHG | USB_CHG ,
  1569. .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
  1570. .calculate_capacity = &msm_calculate_batt_capacity,
  1571. };
  1572. static u32 msm_calculate_batt_capacity(u32 current_voltage)
  1573. {
  1574. u32 low_voltage = msm_psy_batt_data.voltage_min_design;
  1575. u32 high_voltage = msm_psy_batt_data.voltage_max_design;
  1576. return (current_voltage - low_voltage) * 100
  1577. / (high_voltage - low_voltage);
  1578. }
  1579. static struct platform_device msm_batt_device = {
  1580. .name = "msm-battery",
  1581. .id = -1,
  1582. .dev.platform_data = &msm_psy_batt_data,
  1583. };
  1584. static int hsusb_rpc_connect(int connect)
  1585. {
  1586. if (connect)
  1587. return msm_hsusb_rpc_connect();
  1588. else
  1589. return msm_hsusb_rpc_close();
  1590. }
  1591. static struct msm_otg_platform_data msm_otg_pdata = {
  1592. .rpc_connect = hsusb_rpc_connect,
  1593. .pmic_notif_init = msm_pm_app_rpc_init,
  1594. .pmic_notif_deinit = msm_pm_app_rpc_deinit,
  1595. .pmic_register_vbus_sn = msm_pm_app_register_vbus_sn,
  1596. .pmic_unregister_vbus_sn = msm_pm_app_unregister_vbus_sn,
  1597. .pmic_enable_ldo = msm_pm_app_enable_usb_ldo,
  1598. .pemp_level = PRE_EMPHASIS_WITH_10_PERCENT,
  1599. .cdr_autoreset = CDR_AUTO_RESET_DEFAULT,
  1600. .drv_ampl = HS_DRV_AMPLITUDE_5_PERCENT,
  1601. .vbus_power = msm_hsusb_vbus_power,
  1602. .chg_vbus_draw = hsusb_chg_vbus_draw,
  1603. .chg_connected = hsusb_chg_connected,
  1604. .chg_init = hsusb_chg_init,
  1605. };
  1606. static struct msm_hsusb_gadget_platform_data msm_gadget_pdata;
  1607. static struct platform_device *early_devices[] __initdata = {
  1608. #ifdef CONFIG_GPIOLIB
  1609. &msm_gpio_devices[0],
  1610. &msm_gpio_devices[1],
  1611. &msm_gpio_devices[2],
  1612. &msm_gpio_devices[3],
  1613. &msm_gpio_devices[4],
  1614. &msm_gpio_devices[5],
  1615. &msm_gpio_devices[6],
  1616. &msm_gpio_devices[7],
  1617. #endif
  1618. };
  1619. static struct platform_device *devices[] __initdata = {
  1620. &msm_fb_device,
  1621. &mddi_toshiba_device,
  1622. &smc91x_device,
  1623. &msm_device_smd,
  1624. &msm_device_dmov,
  1625. &android_pmem_kernel_ebi1_device,
  1626. #ifdef CONFIG_KERNEL_PMEM_SMI_REGION
  1627. &android_pmem_kernel_smi_device,
  1628. #endif
  1629. &android_pmem_device,
  1630. &android_pmem_adsp_device,
  1631. &android_pmem_smipool_device,
  1632. &msm_device_nand,
  1633. &msm_device_i2c,
  1634. &qsd_device_spi,
  1635. #ifdef CONFIG_USB_FUNCTION
  1636. &mass_storage_device,
  1637. #endif
  1638. #ifdef CONFIG_USB_ANDROID
  1639. &usb_mass_storage_device,
  1640. &rndis_device,
  1641. &android_usb_device,
  1642. #endif
  1643. &msm_device_tssc,
  1644. &msm_audio_device,
  1645. &msm_device_uart_dm1,
  1646. &msm_bluesleep_device,
  1647. #ifdef CONFIG_BT
  1648. &msm_bt_power_device,
  1649. #endif
  1650. #if !defined(CONFIG_MSM_SERIAL_DEBUGGER)
  1651. &msm_device_uart3,
  1652. #endif
  1653. &msm_device_pmic_leds,
  1654. &msm_device_kgsl,
  1655. &hs_device,
  1656. #if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
  1657. &msm_device_tsif,
  1658. #endif
  1659. #ifdef CONFIG_MT9T013
  1660. &msm_camera_sensor_mt9t013,
  1661. #endif
  1662. #ifdef CONFIG_MT9D112
  1663. &msm_camera_sensor_mt9d112,
  1664. #endif
  1665. #ifdef CONFIG_S5K3E2FX
  1666. &msm_camera_sensor_s5k3e2fx,
  1667. #endif
  1668. #ifdef CONFIG_MT9P012
  1669. &msm_camera_sensor_mt9p012,
  1670. #endif
  1671. #ifdef CONFIG_MT9P012_KM
  1672. &msm_camera_sensor_mt9p012_km,
  1673. #endif
  1674. &msm_batt_device,
  1675. };
  1676. static void __init qsd8x50_init_irq(void)
  1677. {
  1678. msm_init_irq();
  1679. msm_init_sirc();
  1680. }
  1681. static void kgsl_phys_memory_init(void)
  1682. {
  1683. request_mem_region(kgsl_resources[1].start,
  1684. resource_size(&kgsl_resources[1]), "kgsl");
  1685. }
  1686. static void usb_mpp_init(void)
  1687. {
  1688. unsigned rc;
  1689. unsigned mpp_usb = 20;
  1690. if (machine_is_qsd8x50_ffa()) {
  1691. rc = mpp_config_digital_out(mpp_usb,
  1692. MPP_CFG(MPP_DLOGIC_LVL_VDD,
  1693. MPP_DLOGIC_OUT_CTRL_HIGH));
  1694. if (rc)
  1695. pr_err("%s: configuring mpp pin"
  1696. "to enable 3.3V LDO failed\n", __func__);
  1697. }
  1698. }
  1699. static void __init qsd8x50_init_usb(void)
  1700. {
  1701. usb_mpp_init();
  1702. #ifdef CONFIG_USB_MSM_OTG_72K
  1703. platform_device_register(&msm_device_otg);
  1704. #endif
  1705. #ifdef CONFIG_USB_FUNCTION_MSM_HSUSB
  1706. platform_device_register(&msm_device_hsusb_peripheral);
  1707. #endif
  1708. #ifdef CONFIG_USB_MSM_72K
  1709. platform_device_register(&msm_device_gadget_peripheral);
  1710. #endif
  1711. if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa())
  1712. return;
  1713. vreg_usb = vreg_get(NULL, "boost");
  1714. if (IS_ERR(vreg_usb)) {
  1715. printk(KERN_ERR "%s: vreg get failed (%ld)\n",
  1716. __func__, PTR_ERR(vreg_usb));
  1717. return;
  1718. }
  1719. platform_device_register(&msm_device_hsusb_otg);
  1720. msm_add_host(0, &msm_usb_host_pdata);
  1721. #ifdef CONFIG_USB_FS_HOST
  1722. if (fsusb_gpio_init())
  1723. return;
  1724. msm_add_host(1, &msm_usb_host2_pdata);
  1725. #endif
  1726. }
  1727. static struct vreg *vreg_mmc;
  1728. #if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
  1729. || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
  1730. || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
  1731. || defined(CONFIG_MMC_MSM_SDC4_SUPPORT))
  1732. struct sdcc_gpio {
  1733. struct msm_gpio *cfg_data;
  1734. uint32_t size;
  1735. };
  1736. static struct msm_gpio sdc1_cfg_data[] = {
  1737. {GPIO_CFG(51, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_dat_3"},
  1738. {GPIO_CFG(52, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_dat_2"},
  1739. {GPIO_CFG(53, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_dat_1"},
  1740. {GPIO_CFG(54, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_dat_0"},
  1741. {GPIO_CFG(55, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc1_cmd"},
  1742. {GPIO_CFG(56, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), "sdc1_clk"},
  1743. };
  1744. static struct msm_gpio sdc2_cfg_data[] = {
  1745. {GPIO_CFG(62, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), "sdc2_clk"},
  1746. {GPIO_CFG(63, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_cmd"},
  1747. {GPIO_CFG(64, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_dat_3"},
  1748. {GPIO_CFG(65, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_dat_2"},
  1749. {GPIO_CFG(66, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_dat_1"},
  1750. {GPIO_CFG(67, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc2_dat_0"},
  1751. };
  1752. static struct msm_gpio sdc3_cfg_data[] = {
  1753. {GPIO_CFG(88, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), "sdc3_clk"},
  1754. {GPIO_CFG(89, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_cmd"},
  1755. {GPIO_CFG(90, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_3"},
  1756. {GPIO_CFG(91, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_2"},
  1757. {GPIO_CFG(92, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_1"},
  1758. {GPIO_CFG(93, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_0"},
  1759. #ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
  1760. {GPIO_CFG(158, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_4"},
  1761. {GPIO_CFG(159, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_5"},
  1762. {GPIO_CFG(160, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_6"},
  1763. {GPIO_CFG(161, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc3_dat_7"},
  1764. #endif
  1765. };
  1766. static struct msm_gpio sdc4_cfg_data[] = {
  1767. {GPIO_CFG(142, 3, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), "sdc4_clk"},
  1768. {GPIO_CFG(143, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_cmd"},
  1769. {GPIO_CFG(144, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_dat_0"},
  1770. {GPIO_CFG(145, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_dat_1"},
  1771. {GPIO_CFG(146, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_dat_2"},
  1772. {GPIO_CFG(147, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA), "sdc4_dat_3"},
  1773. };
  1774. static struct sdcc_gpio sdcc_cfg_data[] = {
  1775. {
  1776. .cfg_data = sdc1_cfg_data,
  1777. .size = ARRAY_SIZE(sdc1_cfg_data),
  1778. },
  1779. {
  1780. .cfg_data = sdc2_cfg_data,
  1781. .size = ARRAY_SIZE(sdc2_cfg_data),
  1782. },
  1783. {
  1784. .cfg_data = sdc3_cfg_data,
  1785. .size = ARRAY_SIZE(sdc3_cfg_data),
  1786. },
  1787. {
  1788. .cfg_data = sdc4_cfg_data,
  1789. .size = ARRAY_SIZE(sdc4_cfg_data),
  1790. },
  1791. };
  1792. static unsigned long vreg_sts, gpio_sts;
  1793. static void msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
  1794. {
  1795. int rc = 0;
  1796. struct sdcc_gpio *curr;
  1797. curr = &sdcc_cfg_data[dev_id - 1];
  1798. if (!(test_bit(dev_id, &gpio_sts)^enable))
  1799. return;
  1800. if (enable) {
  1801. set_bit(dev_id, &gpio_sts);
  1802. rc = msm_gpios_request_enable(curr->cfg_data, curr->size);
  1803. if (rc)
  1804. printk(KERN_ERR "%s: Failed to turn on GPIOs for slot %d\n",
  1805. __func__, dev_id);
  1806. } else {
  1807. clear_bit(dev_id, &gpio_sts);
  1808. msm_gpios_disable_free(curr->cfg_data, curr->size);
  1809. }
  1810. }
  1811. static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
  1812. {
  1813. int rc = 0;
  1814. struct platform_device *pdev;
  1815. pdev = container_of(dv, struct platform_device, dev);
  1816. msm_sdcc_setup_gpio(pdev->id, !!vdd);
  1817. if (vdd == 0) {
  1818. if (!vreg_sts)
  1819. return 0;
  1820. clear_bit(pdev->id, &vreg_sts);
  1821. if (!vreg_sts) {
  1822. rc = vreg_disable(vreg_mmc);
  1823. if (rc)
  1824. printk(KERN_ERR "%s: return val: %d \n",
  1825. __func__, rc);
  1826. }
  1827. return 0;
  1828. }
  1829. if (!vreg_sts) {
  1830. rc = vreg_set_level(vreg_mmc, PMIC_VREG_GP6_LEVEL);
  1831. if (!rc)
  1832. rc = vreg_enable(vreg_mmc);
  1833. if (rc)
  1834. printk(KERN_ERR "%s: return val: %d \n",
  1835. __func__, rc);
  1836. }
  1837. set_bit(pdev->id, &vreg_sts);
  1838. return 0;
  1839. }
  1840. #endif
  1841. #if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
  1842. || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
  1843. || defined(CONFIG_MMC_MSM_SDC4_SUPPORT))
  1844. static int msm_sdcc_get_wpswitch(struct device *dv)
  1845. {
  1846. void __iomem *wp_addr = 0;
  1847. uint32_t ret = 0;
  1848. struct platform_device *pdev;
  1849. if (!(machine_is_qsd8x50_surf() || machine_is_qsd8x50a_surf()))
  1850. return -1;
  1851. pdev = container_of(dv, struct platform_device, dev);
  1852. wp_addr = ioremap(FPGA_SDCC_STATUS, 4);
  1853. if (!wp_addr) {
  1854. pr_err("%s: Could not remap %x\n", __func__, FPGA_SDCC_STATUS);
  1855. return -ENOMEM;
  1856. }
  1857. ret = (readl(wp_addr) >> ((pdev->id - 1) << 1)) & (0x03);
  1858. pr_info("%s: WP/CD Status for Slot %d = 0x%x \n", __func__,
  1859. pdev->id, ret);
  1860. iounmap(wp_addr);
  1861. return ((ret == 0x02) ? 1 : 0);
  1862. }
  1863. #endif
  1864. #ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
  1865. static struct mmc_platform_data qsd8x50_sdc1_data = {
  1866. .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
  1867. .translate_vdd = msm_sdcc_setup_power,
  1868. .mmc_bus_width = MMC_CAP_4_BIT_DATA,
  1869. .wpswitch = msm_sdcc_get_wpswitch,
  1870. #ifdef CONFIG_MMC_MSM_SDC1_DUMMY52_REQUIRED
  1871. .dummy52_required = 1,
  1872. #endif
  1873. .msmsdcc_fmin = 144000,
  1874. .msmsdcc_fmid = 25000000,
  1875. .msmsdcc_fmax = 49152000,
  1876. .nonremovable = 0,
  1877. };
  1878. #endif
  1879. #ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
  1880. static struct mmc_platform_data qsd8x50_sdc2_data = {
  1881. .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
  1882. .translate_vdd = msm_sdcc_setup_power,
  1883. .mmc_bus_width = MMC_CAP_4_BIT_DATA,
  1884. .wpswitch = msm_sdcc_get_wpswitch,
  1885. #ifdef CONFIG_MMC_MSM_SDC2_DUMMY52_REQUIRED
  1886. .dummy52_required = 1,
  1887. #endif
  1888. .msmsdcc_fmin = 144000,
  1889. .msmsdcc_fmid = 25000000,
  1890. .msmsdcc_fmax = 49152000,
  1891. .nonremovable = 1,
  1892. };
  1893. #endif
  1894. #ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
  1895. static struct mmc_platform_data qsd8x50_sdc3_data = {
  1896. .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
  1897. .translate_vdd = msm_sdcc_setup_power,
  1898. #ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
  1899. .mmc_bus_width = MMC_CAP_8_BIT_DATA,
  1900. #else
  1901. .mmc_bus_width = MMC_CAP_4_BIT_DATA,
  1902. #endif
  1903. #ifdef CONFIG_MMC_MSM_SDC3_DUMMY52_REQUIRED
  1904. .dummy52_required = 1,
  1905. #endif
  1906. .msmsdcc_fmin = 144000,
  1907. .msmsdcc_fmid = 25000000,
  1908. .msmsdcc_fmax = 49152000,
  1909. .nonremovable = 0,
  1910. };
  1911. #endif
  1912. #ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
  1913. static struct mmc_platform_data qsd8x50_sdc4_data = {
  1914. .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
  1915. .translate_vdd = msm_sdcc_setup_power,
  1916. .mmc_bus_width = MMC_CAP_4_BIT_DATA,
  1917. .wpswitch = msm_sdcc_get_wpswitch,
  1918. #ifdef CONFIG_MMC_MSM_SDC4_DUMMY52_REQUIRED
  1919. .dummy52_required = 1,
  1920. #endif
  1921. .msmsdcc_fmin = 144000,
  1922. .msmsdcc_fmid = 25000000,
  1923. .msmsdcc_fmax = 49152000,
  1924. .nonremovable = 0,
  1925. };
  1926. #endif
  1927. static void __init qsd8x50_init_mmc(void)
  1928. {
  1929. if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa())
  1930. vreg_mmc = vreg_get(NULL, "gp6");
  1931. else
  1932. vreg_mmc = vreg_get(NULL, "gp5");
  1933. if (IS_ERR(vreg_mmc)) {
  1934. printk(KERN_ERR "%s: vreg get failed (%ld)\n",
  1935. __func__, PTR_ERR(vreg_mmc));
  1936. return;
  1937. }
  1938. #ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
  1939. msm_add_sdcc(1, &qsd8x50_sdc1_data);
  1940. #endif
  1941. if (machine_is_qsd8x50_surf() || machine_is_qsd8x50a_surf()) {
  1942. #ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
  1943. msm_add_sdcc(2, &qsd8x50_sdc2_data);
  1944. #endif
  1945. #ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
  1946. msm_add_sdcc(3, &qsd8x50_sdc3_data);
  1947. #endif
  1948. #ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
  1949. msm_add_sdcc(4, &qsd8x50_sdc4_data);
  1950. #endif
  1951. }
  1952. }
  1953. static void __init qsd8x50_cfg_smc91x(void)
  1954. {
  1955. int rc = 0;
  1956. if (machine_is_qsd8x50_surf() || machine_is_qsd8x50a_surf()) {
  1957. smc91x_resources[0].start = 0x70000300;
  1958. smc91x_resources[0].end = 0x700003ff;
  1959. smc91x_resources[1].start = MSM_GPIO_TO_INT(156);
  1960. smc91x_resources[1].end = MSM_GPIO_TO_INT(156);
  1961. } else if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa()) {
  1962. smc91x_resources[0].start = 0x84000300;
  1963. smc91x_resources[0].end = 0x840003ff;
  1964. smc91x_resources[1].start = MSM_GPIO_TO_INT(87);
  1965. smc91x_resources[1].end = MSM_GPIO_TO_INT(87);
  1966. rc = gpio_tlmm_config(GPIO_CFG(87, 0, GPIO_CFG_INPUT,
  1967. GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
  1968. GPIO_CFG_ENABLE);
  1969. if (rc) {
  1970. printk(KERN_ERR "%s: gpio_tlmm_config=%d\n",
  1971. __func__, rc);
  1972. }
  1973. } else
  1974. printk(KERN_ERR "%s: invalid machine type\n", __func__);
  1975. }
  1976. static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR] = {
  1977. [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].supported = 1,
  1978. [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].suspend_enabled = 1,
  1979. [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].idle_enabled = 1,
  1980. [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].latency = 8594,
  1981. [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].residency = 23740,
  1982. [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].supported = 1,
  1983. [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].suspend_enabled = 1,
  1984. [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].idle_enabled = 1,
  1985. [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].latency = 4594,
  1986. [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].residency = 23740,
  1987. [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].supported = 1,
  1988. [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].suspend_enabled
  1989. = 1,
  1990. [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].idle_enabled = 0,
  1991. [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency = 443,
  1992. [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].residency = 1098,
  1993. [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].supported = 1,
  1994. [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].suspend_enabled = 1,
  1995. [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].idle_enabled = 1,
  1996. [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].latency = 2,
  1997. [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].residency = 0,
  1998. };
  1999. static void
  2000. msm_i2c_gpio_config(int iface, int config_type)
  2001. {
  2002. int gpio_scl;
  2003. int gpio_sda;
  2004. if (iface) {
  2005. gpio_scl = 60;
  2006. gpio_sda = 61;
  2007. } else {
  2008. gpio_scl = 95;
  2009. gpio_sda = 96;
  2010. }
  2011. if (config_type) {
  2012. gpio_tlmm_config(GPIO_CFG(gpio_scl, 1, GPIO_CFG_INPUT,
  2013. GPIO_CFG_NO_PULL, GPIO_CFG_16MA), GPIO_CFG_ENABLE);
  2014. gpio_tlmm_config(GPIO_CFG(gpio_sda, 1, GPIO_CFG_INPUT,
  2015. GPIO_CFG_NO_PULL, GPIO_CFG_16MA), GPIO_CFG_ENABLE);
  2016. } else {
  2017. gpio_tlmm_config(GPIO_CFG(gpio_scl, 0, GPIO_CFG_OUTPUT,
  2018. GPIO_CFG_NO_PULL, GPIO_CFG_16MA), GPIO_CFG_ENABLE);
  2019. gpio_tlmm_config(GPIO_CFG(gpio_sda, 0, GPIO_CFG_OUTPUT,
  2020. GPIO_CFG_NO_PULL, GPIO_CFG_16MA), GPIO_CFG_ENABLE);
  2021. }
  2022. }
  2023. static struct msm_i2c_platform_data msm_i2c_pdata = {
  2024. .clk_freq = 100000,
  2025. .rsl_id = SMEM_SPINLOCK_I2C,
  2026. .pri_clk = 95,
  2027. .pri_dat = 96,
  2028. .aux_clk = 60,
  2029. .aux_dat = 61,
  2030. .msm_i2c_config_gpio = msm_i2c_gpio_config,
  2031. };
  2032. static void __init msm_device_i2c_init(void)
  2033. {
  2034. if (gpio_request(95, "i2c_pri_clk"))
  2035. pr_err("failed to request gpio i2c_pri_clk\n");
  2036. if (gpio_request(96, "i2c_pri_dat"))
  2037. pr_err("failed to request gpio i2c_pri_dat\n");
  2038. if (gpio_request(60, "i2c_sec_clk"))
  2039. pr_err("failed to request gpio i2c_sec_clk\n");
  2040. if (gpio_request(61, "i2c_sec_dat"))
  2041. pr_err("failed to request gpio i2c_sec_dat\n");
  2042. msm_i2c_pdata.rmutex = 1;
  2043. msm_i2c_pdata.pm_lat =
  2044. msm_pm_data[MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN]
  2045. .latency;
  2046. msm_device_i2c.dev.platform_data = &msm_i2c_pdata;
  2047. }
  2048. static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
  2049. static void __init pmem_kernel_ebi1_size_setup(char **p)
  2050. {
  2051. pmem_kernel_ebi1_size = memparse(*p, p);
  2052. }
  2053. __early_param("pmem_kernel_ebi1_size=", pmem_kernel_ebi1_size_setup);
  2054. #ifdef CONFIG_KERNEL_PMEM_SMI_REGION
  2055. static unsigned pmem_kernel_smi_size = MSM_PMEM_SMIPOOL_SIZE;
  2056. static void __init pmem_kernel_smi_size_setup(char **p)
  2057. {
  2058. pmem_kernel_smi_size = memparse(*p, p);
  2059. /* Make sure that we don't allow more SMI memory then is
  2060. available - the kernel mapping code has no way of knowing
  2061. if it has gone over the edge */
  2062. if (pmem_kernel_smi_size > MSM_PMEM_SMIPOOL_SIZE)
  2063. pmem_kernel_smi_size = MSM_PMEM_SMIPOOL_SIZE;
  2064. }
  2065. __early_param("pmem_kernel_smi_size=", pmem_kernel_smi_size_setup);
  2066. #endif
  2067. static unsigned pmem_sf_size = MSM_PMEM_SF_SIZE;
  2068. static void __init pmem_sf_size_setup(char **p)
  2069. {
  2070. pmem_sf_size = memparse(*p, p);
  2071. }
  2072. __early_param("pmem_sf_size=", pmem_sf_size_setup);
  2073. static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
  2074. static void __init pmem_adsp_size_setup(char **p)
  2075. {
  2076. pmem_adsp_size = memparse(*p, p);
  2077. }
  2078. __early_param("pmem_adsp_size=", pmem_adsp_size_setup);
  2079. static unsigned audio_size = MSM_AUDIO_SIZE;
  2080. static void __init audio_size_setup(char **p)
  2081. {
  2082. audio_size = memparse(*p, p);
  2083. }
  2084. __early_param("audio_size=", audio_size_setup);
  2085. static void __init qsd8x50_init(void)
  2086. {
  2087. if (socinfo_init() < 0)
  2088. printk(KERN_ERR "%s: socinfo_init() failed!\n",
  2089. __func__);
  2090. msm_clock_init(msm_clocks_8x50, msm_num_clocks_8x50);
  2091. platform_add_devices(early_devices, ARRAY_SIZE(early_devices));
  2092. qsd8x50_cfg_smc91x();
  2093. msm_acpu_clock_init(&qsd8x50_clock_data);
  2094. msm_hsusb_pdata.swfi_latency =
  2095. msm_pm_data
  2096. [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
  2097. msm_device_hsusb_peripheral.dev.platform_data = &msm_hsusb_pdata;
  2098. msm_otg_pdata.swfi_latency =
  2099. msm_pm_data
  2100. [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
  2101. msm_device_otg.dev.platform_data = &msm_otg_pdata;
  2102. msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata;
  2103. #if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
  2104. msm_device_tsif.dev.platform_data = &tsif_platform_data;
  2105. #endif
  2106. platform_add_devices(devices, ARRAY_SIZE(devices));
  2107. msm_fb_add_devices();
  2108. #ifdef CONFIG_MSM_CAMERA
  2109. config_camera_off_gpios(); /* might not be necessary */
  2110. #endif
  2111. qsd8x50_init_usb();
  2112. qsd8x50_init_mmc();
  2113. bt_power_init();
  2114. audio_gpio_init();
  2115. msm_device_i2c_init();
  2116. msm_qsd_spi_init();
  2117. i2c_register_board_info(0, msm_i2c_board_info,
  2118. ARRAY_SIZE(msm_i2c_board_info));
  2119. spi_register_board_info(msm_spi_board_info,
  2120. ARRAY_SIZE(msm_spi_board_info));
  2121. msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
  2122. kgsl_phys_memory_init();
  2123. #ifdef CONFIG_SURF_FFA_GPIO_KEYPAD
  2124. if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa())
  2125. platform_device_register(&keypad_device_8k_ffa);
  2126. else
  2127. platform_device_register(&keypad_device_surf);
  2128. #endif
  2129. }
  2130. static void __init qsd8x50_allocate_memory_regions(void)
  2131. {
  2132. void *addr;
  2133. unsigned long size;
  2134. size = pmem_kernel_ebi1_size;
  2135. if (size) {
  2136. addr = alloc_bootmem_aligned(size, 0x100000);
  2137. android_pmem_kernel_ebi1_pdata.start = __pa(addr);
  2138. android_pmem_kernel_ebi1_pdata.size = size;
  2139. pr_info("allocating %lu bytes at %p (%lx physical) for kernel"
  2140. " ebi1 pmem arena\n", size, addr, __pa(addr));
  2141. }
  2142. #ifdef CONFIG_KERNEL_PMEM_SMI_REGION
  2143. size = pmem_kernel_smi_size;
  2144. if (size > MSM_PMEM_SMIPOOL_SIZE) {
  2145. printk(KERN_ERR "pmem kernel smi arena size %lu is too big\n",
  2146. size);
  2147. size = MSM_PMEM_SMIPOOL_SIZE;
  2148. }
  2149. android_pmem_kernel_smi_pdata.start = MSM_PMEM_SMIPOOL_BASE;
  2150. android_pmem_kernel_smi_pdata.size = size;
  2151. pr_info("allocating %lu bytes at %lx (%lx physical)"
  2152. "for pmem kernel smi arena\n", size,
  2153. (long unsigned int) MSM_PMEM_SMIPOOL_BASE,
  2154. __pa(MSM_PMEM_SMIPOOL_BASE));
  2155. #endif
  2156. size = pmem_sf_size;
  2157. if (size) {
  2158. addr = alloc_bootmem(size);
  2159. android_pmem_pdata.start = __pa(addr);
  2160. android_pmem_pdata.size = size;
  2161. pr_info("allocating %lu bytes at %p (%lx physical) for sf "
  2162. "pmem arena\n", size, addr, __pa(addr));
  2163. }
  2164. size = pmem_adsp_size;
  2165. if (size) {
  2166. addr = alloc_bootmem(size);
  2167. android_pmem_adsp_pdata.start = __pa(addr);
  2168. android_pmem_adsp_pdata.size = size;
  2169. pr_info("allocating %lu bytes at %p (%lx physical) for adsp "
  2170. "pmem arena\n", size, addr, __pa(addr));
  2171. }
  2172. size = MSM_FB_SIZE;
  2173. addr = (void *)MSM_FB_BASE;
  2174. msm_fb_resources[0].start = (unsigned long)addr;
  2175. msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
  2176. pr_info("using %lu bytes of SMI at %lx physical for fb\n",
  2177. size, (unsigned long)addr);
  2178. size = audio_size ? : MSM_AUDIO_SIZE;
  2179. addr = alloc_bootmem(size);
  2180. msm_audio_resources[0].start = __pa(addr);
  2181. msm_audio_resources[0].end = msm_audio_resources[0].start + size - 1;
  2182. pr_info("allocating %lu bytes at %p (%lx physical) for audio\n",
  2183. size, addr, __pa(addr));
  2184. }
  2185. static void __init qsd8x50_map_io(void)
  2186. {
  2187. msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
  2188. msm_map_qsd8x50_io();
  2189. qsd8x50_allocate_memory_regions();
  2190. }
  2191. MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF")
  2192. #ifdef CONFIG_MSM_DEBUG_UART
  2193. .phys_io = MSM_DEBUG_UART_PHYS,
  2194. .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
  2195. #endif
  2196. .boot_params = PHYS_OFFSET + 0x100,
  2197. .map_io = qsd8x50_map_io,
  2198. .init_irq = qsd8x50_init_irq,
  2199. .init_machine = qsd8x50_init,
  2200. .timer = &msm_timer,
  2201. MACHINE_END
  2202. MACHINE_START(QSD8X50_FFA, "QCT QSD8X50 FFA")
  2203. #ifdef CONFIG_MSM_DEBUG_UART
  2204. .phys_io = MSM_DEBUG_UART_PHYS,
  2205. .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
  2206. #endif
  2207. .boot_params = PHYS_OFFSET + 0x100,
  2208. .map_io = qsd8x50_map_io,
  2209. .init_irq = qsd8x50_init_irq,
  2210. .init_machine = qsd8x50_init,
  2211. .timer = &msm_timer,
  2212. MACHINE_END
  2213. MACHINE_START(QSD8X50A_SURF, "QCT QSD8X50A SURF")
  2214. #ifdef CONFIG_MSM_DEBUG_UART
  2215. .phys_io = MSM_DEBUG_UART_PHYS,
  2216. .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
  2217. #endif
  2218. .boot_params = PHYS_OFFSET + 0x100,
  2219. .map_io = qsd8x50_map_io,
  2220. .init_irq = qsd8x50_init_irq,
  2221. .init_machine = qsd8x50_init,
  2222. .timer = &msm_timer,
  2223. MACHINE_END
  2224. MACHINE_START(QSD8X50A_FFA, "QCT QSD8X50A FFA")
  2225. #ifdef CONFIG_MSM_DEBUG_UART
  2226. .phys_io = MSM_DEBUG_UART_PHYS,
  2227. .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
  2228. #endif
  2229. .boot_params = PHYS_OFFSET + 0x100,
  2230. .map_io = qsd8x50_map_io,
  2231. .init_irq = qsd8x50_init_irq,
  2232. .init_machine = qsd8x50_init,
  2233. .timer = &msm_timer,
  2234. MACHINE_END