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/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c

https://bitbucket.org/cyanogenmod/android_kernel_asus_tf300t
C | 6772 lines | 5051 code | 1015 blank | 706 comment | 946 complexity | 02856cd1f5dfd7e3cc5f432120f1cff0 MD5 | raw file
Possible License(s): LGPL-2.0, AGPL-1.0, GPL-2.0
  1. /*
  2. * Copyright (c) 2010 Broadcom Corporation
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11. * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13. * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14. * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/types.h>
  17. #include <linux/kernel.h>
  18. #include <linux/kthread.h>
  19. #include <linux/printk.h>
  20. #include <linux/pci_ids.h>
  21. #include <linux/netdevice.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/mmc/sdio.h>
  25. #include <linux/mmc/sdio_func.h>
  26. #include <linux/semaphore.h>
  27. #include <linux/firmware.h>
  28. #include <asm/unaligned.h>
  29. #include <defs.h>
  30. #include <brcmu_wifi.h>
  31. #include <brcmu_utils.h>
  32. #include <brcm_hw_ids.h>
  33. #include <soc.h>
  34. #include "sdio_host.h"
  35. /* register access macros */
  36. #ifndef __BIG_ENDIAN
  37. #ifndef __mips__
  38. #define R_REG(r, typ) \
  39. brcmf_sdcard_reg_read(NULL, (r), sizeof(typ))
  40. #else /* __mips__ */
  41. #define R_REG(r, typ) \
  42. ({ \
  43. __typeof(*(r)) __osl_v; \
  44. __asm__ __volatile__("sync"); \
  45. __osl_v = brcmf_sdcard_reg_read(NULL, (r),\
  46. sizeof(typ)); \
  47. __asm__ __volatile__("sync"); \
  48. __osl_v; \
  49. })
  50. #endif /* __mips__ */
  51. #else /* __BIG_ENDIAN */
  52. #define R_REG(r, typ) \
  53. brcmf_sdcard_reg_read(NULL, (r), sizeof(typ))
  54. #endif /* __BIG_ENDIAN */
  55. #define OR_REG(r, v, typ) \
  56. brcmf_sdcard_reg_write(NULL, (r), sizeof(typ), R_REG(r, typ) | (v))
  57. #ifdef BCMDBG
  58. /* ARM trap handling */
  59. /* Trap types defined by ARM (see arminc.h) */
  60. #if defined(__ARM_ARCH_4T__)
  61. #define MAX_TRAP_TYPE (TR_FIQ + 1)
  62. #elif defined(__ARM_ARCH_7M__)
  63. #define MAX_TRAP_TYPE (TR_ISR + ARMCM3_NUMINTS)
  64. #endif /* __ARM_ARCH_7M__ */
  65. /* The trap structure is defined here as offsets for assembly */
  66. #define TR_TYPE 0x00
  67. #define TR_EPC 0x04
  68. #define TR_CPSR 0x08
  69. #define TR_SPSR 0x0c
  70. #define TR_REGS 0x10
  71. #define TR_REG(n) (TR_REGS + (n) * 4)
  72. #define TR_SP TR_REG(13)
  73. #define TR_LR TR_REG(14)
  74. #define TR_PC TR_REG(15)
  75. #define TRAP_T_SIZE 80
  76. struct brcmf_trap {
  77. u32 type;
  78. u32 epc;
  79. u32 cpsr;
  80. u32 spsr;
  81. u32 r0;
  82. u32 r1;
  83. u32 r2;
  84. u32 r3;
  85. u32 r4;
  86. u32 r5;
  87. u32 r6;
  88. u32 r7;
  89. u32 r8;
  90. u32 r9;
  91. u32 r10;
  92. u32 r11;
  93. u32 r12;
  94. u32 r13;
  95. u32 r14;
  96. u32 pc;
  97. };
  98. #define CBUF_LEN (128)
  99. struct rte_log {
  100. u32 buf; /* Can't be pointer on (64-bit) hosts */
  101. uint buf_size;
  102. uint idx;
  103. char *_buf_compat; /* Redundant pointer for backward compat. */
  104. };
  105. struct rte_console {
  106. /* Virtual UART
  107. * When there is no UART (e.g. Quickturn),
  108. * the host should write a complete
  109. * input line directly into cbuf and then write
  110. * the length into vcons_in.
  111. * This may also be used when there is a real UART
  112. * (at risk of conflicting with
  113. * the real UART). vcons_out is currently unused.
  114. */
  115. volatile uint vcons_in;
  116. volatile uint vcons_out;
  117. /* Output (logging) buffer
  118. * Console output is written to a ring buffer log_buf at index log_idx.
  119. * The host may read the output when it sees log_idx advance.
  120. * Output will be lost if the output wraps around faster than the host
  121. * polls.
  122. */
  123. struct rte_log log;
  124. /* Console input line buffer
  125. * Characters are read one at a time into cbuf
  126. * until <CR> is received, then
  127. * the buffer is processed as a command line.
  128. * Also used for virtual UART.
  129. */
  130. uint cbuf_idx;
  131. char cbuf[CBUF_LEN];
  132. };
  133. #endif /* BCMDBG */
  134. #include <chipcommon.h>
  135. #include "dhd.h"
  136. #include "dhd_bus.h"
  137. #include "dhd_proto.h"
  138. #include "dhd_dbg.h"
  139. #include <bcmchip.h>
  140. #define TXQLEN 2048 /* bulk tx queue length */
  141. #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
  142. #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
  143. #define PRIOMASK 7
  144. #define TXRETRIES 2 /* # of retries for tx frames */
  145. #define BRCMF_RXBOUND 50 /* Default for max rx frames in
  146. one scheduling */
  147. #define BRCMF_TXBOUND 20 /* Default for max tx frames in
  148. one scheduling */
  149. #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
  150. #define MEMBLOCK 2048 /* Block size used for downloading
  151. of dongle image */
  152. #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
  153. biggest possible glom */
  154. #ifndef BRCMF_FIRSTREAD
  155. #define BRCMF_FIRSTREAD 32
  156. #endif
  157. #if !ISPOWEROF2(BRCMF_FIRSTREAD)
  158. #error BRCMF_FIRSTREAD is not a power of 2!
  159. #endif
  160. /* SBSDIO_DEVICE_CTL */
  161. #define SBSDIO_DEVCTL_SETBUSY 0x01 /* 1: device will assert busy signal when
  162. * receiving CMD53
  163. */
  164. #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02 /* 1: assertion of sdio interrupt is
  165. * synchronous to the sdio clock
  166. */
  167. #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04 /* 1: mask all interrupts to host
  168. * except the chipActive (rev 8)
  169. */
  170. #define SBSDIO_DEVCTL_PADS_ISO 0x08 /* 1: isolate internal sdio signals, put
  171. * external pads in tri-state; requires
  172. * sdio bus power cycle to clear (rev 9)
  173. */
  174. #define SBSDIO_DEVCTL_SB_RST_CTL 0x30 /* Force SD->SB reset mapping (rev 11) */
  175. #define SBSDIO_DEVCTL_RST_CORECTL 0x00 /* Determined by CoreControl bit */
  176. #define SBSDIO_DEVCTL_RST_BPRESET 0x10 /* Force backplane reset */
  177. #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20 /* Force no backplane reset */
  178. /* SBSDIO_FUNC1_CHIPCLKCSR */
  179. #define SBSDIO_FORCE_ALP 0x01 /* Force ALP request to backplane */
  180. #define SBSDIO_FORCE_HT 0x02 /* Force HT request to backplane */
  181. #define SBSDIO_FORCE_ILP 0x04 /* Force ILP request to backplane */
  182. #define SBSDIO_ALP_AVAIL_REQ 0x08 /* Make ALP ready (power up xtal) */
  183. #define SBSDIO_HT_AVAIL_REQ 0x10 /* Make HT ready (power up PLL) */
  184. #define SBSDIO_FORCE_HW_CLKREQ_OFF 0x20 /* Squelch clock requests from HW */
  185. #define SBSDIO_ALP_AVAIL 0x40 /* Status: ALP is ready */
  186. #define SBSDIO_HT_AVAIL 0x80 /* Status: HT is ready */
  187. #define SBSDIO_AVBITS (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
  188. #define SBSDIO_ALPAV(regval) ((regval) & SBSDIO_AVBITS)
  189. #define SBSDIO_HTAV(regval) (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
  190. #define SBSDIO_ALPONLY(regval) (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
  191. #define SBSDIO_CLKAV(regval, alponly) (SBSDIO_ALPAV(regval) && \
  192. (alponly ? 1 : SBSDIO_HTAV(regval)))
  193. /* direct(mapped) cis space */
  194. #define SBSDIO_CIS_BASE_COMMON 0x1000 /* MAPPED common CIS address */
  195. #define SBSDIO_CIS_SIZE_LIMIT 0x200 /* maximum bytes in one CIS */
  196. #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF /* cis offset addr is < 17 bits */
  197. #define SBSDIO_CIS_MANFID_TUPLE_LEN 6 /* manfid tuple length, include tuple,
  198. * link bytes
  199. */
  200. /* intstatus */
  201. #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
  202. #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
  203. #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
  204. #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
  205. #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
  206. #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
  207. #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
  208. #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
  209. #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
  210. #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
  211. #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
  212. #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
  213. #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
  214. #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
  215. #define I_PC (1 << 10) /* descriptor error */
  216. #define I_PD (1 << 11) /* data error */
  217. #define I_DE (1 << 12) /* Descriptor protocol Error */
  218. #define I_RU (1 << 13) /* Receive descriptor Underflow */
  219. #define I_RO (1 << 14) /* Receive fifo Overflow */
  220. #define I_XU (1 << 15) /* Transmit fifo Underflow */
  221. #define I_RI (1 << 16) /* Receive Interrupt */
  222. #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
  223. #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
  224. #define I_XI (1 << 24) /* Transmit Interrupt */
  225. #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
  226. #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
  227. #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
  228. #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
  229. #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
  230. #define I_SRESET (1 << 30) /* CCCR RES interrupt */
  231. #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
  232. #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
  233. #define I_DMA (I_RI | I_XI | I_ERRORS)
  234. /* corecontrol */
  235. #define CC_CISRDY (1 << 0) /* CIS Ready */
  236. #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
  237. #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
  238. #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
  239. #define CC_XMTDATAAVAIL_MODE (1 << 4)
  240. #define CC_XMTDATAAVAIL_CTRL (1 << 5)
  241. /* SDA_FRAMECTRL */
  242. #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
  243. #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
  244. #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
  245. #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
  246. /* HW frame tag */
  247. #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
  248. /* Total length of frame header for dongle protocol */
  249. #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
  250. #ifdef SDTEST
  251. #define SDPCM_RESERVE (SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + BRCMF_SDALIGN)
  252. #else
  253. #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
  254. #endif
  255. /*
  256. * Software allocation of To SB Mailbox resources
  257. */
  258. /* tosbmailbox bits corresponding to intstatus bits */
  259. #define SMB_NAK (1 << 0) /* Frame NAK */
  260. #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
  261. #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
  262. #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
  263. /* tosbmailboxdata */
  264. #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
  265. /*
  266. * Software allocation of To Host Mailbox resources
  267. */
  268. /* intstatus bits */
  269. #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
  270. #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
  271. #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
  272. #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
  273. /* tohostmailboxdata */
  274. #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
  275. #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
  276. #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
  277. #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
  278. #define HMB_DATA_FCDATA_MASK 0xff000000
  279. #define HMB_DATA_FCDATA_SHIFT 24
  280. #define HMB_DATA_VERSION_MASK 0x00ff0000
  281. #define HMB_DATA_VERSION_SHIFT 16
  282. /*
  283. * Software-defined protocol header
  284. */
  285. /* Current protocol version */
  286. #define SDPCM_PROT_VERSION 4
  287. /* SW frame header */
  288. #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
  289. #define SDPCM_CHANNEL_MASK 0x00000f00
  290. #define SDPCM_CHANNEL_SHIFT 8
  291. #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
  292. #define SDPCM_NEXTLEN_OFFSET 2
  293. /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
  294. #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
  295. #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
  296. #define SDPCM_DOFFSET_MASK 0xff000000
  297. #define SDPCM_DOFFSET_SHIFT 24
  298. #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
  299. #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
  300. #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
  301. #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
  302. #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
  303. /* logical channel numbers */
  304. #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
  305. #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
  306. #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
  307. #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
  308. #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
  309. #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
  310. #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
  311. /* For TEST_CHANNEL packets, define another 4-byte header */
  312. #define SDPCM_TEST_HDRLEN 4 /*
  313. * Generally: Cmd(1), Ext(1), Len(2);
  314. * Semantics of Ext byte depend on
  315. * command. Len is current or requested
  316. * frame length, not including test
  317. * header; sent little-endian.
  318. */
  319. #define SDPCM_TEST_DISCARD 0x01 /* Receiver discards. Ext:pattern id. */
  320. #define SDPCM_TEST_ECHOREQ 0x02 /* Echo request. Ext:pattern id. */
  321. #define SDPCM_TEST_ECHORSP 0x03 /* Echo response. Ext:pattern id. */
  322. #define SDPCM_TEST_BURST 0x04 /*
  323. * Receiver to send a burst.
  324. * Ext is a frame count
  325. */
  326. #define SDPCM_TEST_SEND 0x05 /*
  327. * Receiver sets send mode.
  328. * Ext is boolean on/off
  329. */
  330. /* Handy macro for filling in datagen packets with a pattern */
  331. #define SDPCM_TEST_FILL(byteno, id) ((u8)(id + byteno))
  332. /*
  333. * Shared structure between dongle and the host.
  334. * The structure contains pointers to trap or assert information.
  335. */
  336. #define SDPCM_SHARED_VERSION 0x0002
  337. #define SDPCM_SHARED_VERSION_MASK 0x00FF
  338. #define SDPCM_SHARED_ASSERT_BUILT 0x0100
  339. #define SDPCM_SHARED_ASSERT 0x0200
  340. #define SDPCM_SHARED_TRAP 0x0400
  341. /* Space for header read, limit for data packets */
  342. #ifndef MAX_HDR_READ
  343. #define MAX_HDR_READ 32
  344. #endif
  345. #if !ISPOWEROF2(MAX_HDR_READ)
  346. #error MAX_HDR_READ is not a power of 2!
  347. #endif
  348. #define MAX_RX_DATASZ 2048
  349. /* Maximum milliseconds to wait for F2 to come up */
  350. #define BRCMF_WAIT_F2RDY 3000
  351. /* Bump up limit on waiting for HT to account for first startup;
  352. * if the image is doing a CRC calculation before programming the PMU
  353. * for HT availability, it could take a couple hundred ms more, so
  354. * max out at a 1 second (1000000us).
  355. */
  356. #if (PMU_MAX_TRANSITION_DLY <= 1000000)
  357. #undef PMU_MAX_TRANSITION_DLY
  358. #define PMU_MAX_TRANSITION_DLY 1000000
  359. #endif
  360. /* Value for ChipClockCSR during initial setup */
  361. #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
  362. SBSDIO_ALP_AVAIL_REQ)
  363. /* Flags for SDH calls */
  364. #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
  365. /* sbimstate */
  366. #define SBIM_IBE 0x20000 /* inbanderror */
  367. #define SBIM_TO 0x40000 /* timeout */
  368. #define SBIM_BY 0x01800000 /* busy (sonics >= 2.3) */
  369. #define SBIM_RJ 0x02000000 /* reject (sonics >= 2.3) */
  370. /* sbtmstatelow */
  371. #define SBTML_RESET 0x0001 /* reset */
  372. #define SBTML_REJ_MASK 0x0006 /* reject field */
  373. #define SBTML_REJ 0x0002 /* reject */
  374. #define SBTML_TMPREJ 0x0004 /* temporary reject, for error recovery */
  375. #define SBTML_SICF_SHIFT 16 /* Shift to locate the SI control flags in sbtml */
  376. /* sbtmstatehigh */
  377. #define SBTMH_SERR 0x0001 /* serror */
  378. #define SBTMH_INT 0x0002 /* interrupt */
  379. #define SBTMH_BUSY 0x0004 /* busy */
  380. #define SBTMH_TO 0x0020 /* timeout (sonics >= 2.3) */
  381. #define SBTMH_SISF_SHIFT 16 /* Shift to locate the SI status flags in sbtmh */
  382. /* sbidlow */
  383. #define SBIDL_INIT 0x80 /* initiator */
  384. /* sbidhigh */
  385. #define SBIDH_RC_MASK 0x000f /* revision code */
  386. #define SBIDH_RCE_MASK 0x7000 /* revision code extension field */
  387. #define SBIDH_RCE_SHIFT 8
  388. #define SBCOREREV(sbidh) \
  389. ((((sbidh) & SBIDH_RCE_MASK) >> SBIDH_RCE_SHIFT) | ((sbidh) & SBIDH_RC_MASK))
  390. #define SBIDH_CC_MASK 0x8ff0 /* core code */
  391. #define SBIDH_CC_SHIFT 4
  392. #define SBIDH_VC_MASK 0xffff0000 /* vendor code */
  393. #define SBIDH_VC_SHIFT 16
  394. /*
  395. * Conversion of 802.1D priority to precedence level
  396. */
  397. #define PRIO2PREC(prio) \
  398. (((prio) == PRIO_8021D_NONE || (prio) == PRIO_8021D_BE) ? \
  399. ((prio^2)) : (prio))
  400. BRCMF_SPINWAIT_SLEEP_INIT(sdioh_spinwait_sleep);
  401. /*
  402. * Core reg address translation.
  403. * Both macro's returns a 32 bits byte address on the backplane bus.
  404. */
  405. #define CORE_CC_REG(base, field) (base + offsetof(chipcregs_t, field))
  406. #define CORE_BUS_REG(base, field) \
  407. (base + offsetof(struct sdpcmd_regs, field))
  408. #define CORE_SB(base, field) \
  409. (base + SBCONFIGOFF + offsetof(struct sbconfig, field))
  410. /* core registers */
  411. struct sdpcmd_regs {
  412. u32 corecontrol; /* 0x00, rev8 */
  413. u32 corestatus; /* rev8 */
  414. u32 PAD[1];
  415. u32 biststatus; /* rev8 */
  416. /* PCMCIA access */
  417. u16 pcmciamesportaladdr; /* 0x010, rev8 */
  418. u16 PAD[1];
  419. u16 pcmciamesportalmask; /* rev8 */
  420. u16 PAD[1];
  421. u16 pcmciawrframebc; /* rev8 */
  422. u16 PAD[1];
  423. u16 pcmciaunderflowtimer; /* rev8 */
  424. u16 PAD[1];
  425. /* interrupt */
  426. u32 intstatus; /* 0x020, rev8 */
  427. u32 hostintmask; /* rev8 */
  428. u32 intmask; /* rev8 */
  429. u32 sbintstatus; /* rev8 */
  430. u32 sbintmask; /* rev8 */
  431. u32 funcintmask; /* rev4 */
  432. u32 PAD[2];
  433. u32 tosbmailbox; /* 0x040, rev8 */
  434. u32 tohostmailbox; /* rev8 */
  435. u32 tosbmailboxdata; /* rev8 */
  436. u32 tohostmailboxdata; /* rev8 */
  437. /* synchronized access to registers in SDIO clock domain */
  438. u32 sdioaccess; /* 0x050, rev8 */
  439. u32 PAD[3];
  440. /* PCMCIA frame control */
  441. u8 pcmciaframectrl; /* 0x060, rev8 */
  442. u8 PAD[3];
  443. u8 pcmciawatermark; /* rev8 */
  444. u8 PAD[155];
  445. /* interrupt batching control */
  446. u32 intrcvlazy; /* 0x100, rev8 */
  447. u32 PAD[3];
  448. /* counters */
  449. u32 cmd52rd; /* 0x110, rev8 */
  450. u32 cmd52wr; /* rev8 */
  451. u32 cmd53rd; /* rev8 */
  452. u32 cmd53wr; /* rev8 */
  453. u32 abort; /* rev8 */
  454. u32 datacrcerror; /* rev8 */
  455. u32 rdoutofsync; /* rev8 */
  456. u32 wroutofsync; /* rev8 */
  457. u32 writebusy; /* rev8 */
  458. u32 readwait; /* rev8 */
  459. u32 readterm; /* rev8 */
  460. u32 writeterm; /* rev8 */
  461. u32 PAD[40];
  462. u32 clockctlstatus; /* rev8 */
  463. u32 PAD[7];
  464. u32 PAD[128]; /* DMA engines */
  465. /* SDIO/PCMCIA CIS region */
  466. char cis[512]; /* 0x400-0x5ff, rev6 */
  467. /* PCMCIA function control registers */
  468. char pcmciafcr[256]; /* 0x600-6ff, rev6 */
  469. u16 PAD[55];
  470. /* PCMCIA backplane access */
  471. u16 backplanecsr; /* 0x76E, rev6 */
  472. u16 backplaneaddr0; /* rev6 */
  473. u16 backplaneaddr1; /* rev6 */
  474. u16 backplaneaddr2; /* rev6 */
  475. u16 backplaneaddr3; /* rev6 */
  476. u16 backplanedata0; /* rev6 */
  477. u16 backplanedata1; /* rev6 */
  478. u16 backplanedata2; /* rev6 */
  479. u16 backplanedata3; /* rev6 */
  480. u16 PAD[31];
  481. /* sprom "size" & "blank" info */
  482. u16 spromstatus; /* 0x7BE, rev2 */
  483. u32 PAD[464];
  484. u16 PAD[0x80];
  485. };
  486. #ifdef BCMDBG
  487. /* Device console log buffer state */
  488. struct brcmf_console {
  489. uint count; /* Poll interval msec counter */
  490. uint log_addr; /* Log struct address (fixed) */
  491. struct rte_log log; /* Log struct (host copy) */
  492. uint bufsize; /* Size of log buffer */
  493. u8 *buf; /* Log buffer (host copy) */
  494. uint last; /* Last buffer read index */
  495. };
  496. #endif /* BCMDBG */
  497. struct sdpcm_shared {
  498. u32 flags;
  499. u32 trap_addr;
  500. u32 assert_exp_addr;
  501. u32 assert_file_addr;
  502. u32 assert_line;
  503. u32 console_addr; /* Address of struct rte_console */
  504. u32 msgtrace_addr;
  505. u8 tag[32];
  506. };
  507. /* misc chip info needed by some of the routines */
  508. struct chip_info {
  509. u32 chip;
  510. u32 chiprev;
  511. u32 cccorebase;
  512. u32 ccrev;
  513. u32 cccaps;
  514. u32 buscorebase; /* 32 bits backplane bus address */
  515. u32 buscorerev;
  516. u32 buscoretype;
  517. u32 ramcorebase;
  518. u32 armcorebase;
  519. u32 pmurev;
  520. u32 ramsize;
  521. };
  522. /* Private data for SDIO bus interaction */
  523. struct brcmf_bus {
  524. struct brcmf_pub *drvr;
  525. struct brcmf_sdio_card *card; /* Handle for sdio card calls */
  526. struct chip_info *ci; /* Chip info struct */
  527. char *vars; /* Variables (from CIS and/or other) */
  528. uint varsz; /* Size of variables buffer */
  529. u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
  530. u32 orig_ramsize; /* Size of RAM in SOCRAM (bytes) */
  531. u32 bus; /* gSPI or SDIO bus */
  532. u32 hostintmask; /* Copy of Host Interrupt Mask */
  533. u32 intstatus; /* Intstatus bits (events) pending */
  534. bool dpc_sched; /* Indicates DPC schedule (intrpt rcvd) */
  535. bool fcstate; /* State of dongle flow-control */
  536. u16 cl_devid; /* cached devid for brcmf_sdio_probe_attach() */
  537. uint blocksize; /* Block size of SDIO transfers */
  538. uint roundup; /* Max roundup limit */
  539. struct pktq txq; /* Queue length used for flow-control */
  540. u8 flowcontrol; /* per prio flow control bitmask */
  541. u8 tx_seq; /* Transmit sequence number (next) */
  542. u8 tx_max; /* Maximum transmit sequence allowed */
  543. u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
  544. u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
  545. u16 nextlen; /* Next Read Len from last header */
  546. u8 rx_seq; /* Receive sequence number (expected) */
  547. bool rxskip; /* Skip receive (awaiting NAK ACK) */
  548. struct sk_buff *glomd; /* Packet containing glomming descriptor */
  549. struct sk_buff *glom; /* Packet chain for glommed superframe */
  550. uint glomerr; /* Glom packet read errors */
  551. u8 *rxbuf; /* Buffer for receiving control packets */
  552. uint rxblen; /* Allocated length of rxbuf */
  553. u8 *rxctl; /* Aligned pointer into rxbuf */
  554. u8 *databuf; /* Buffer for receiving big glom packet */
  555. u8 *dataptr; /* Aligned pointer into databuf */
  556. uint rxlen; /* Length of valid data in buffer */
  557. u8 sdpcm_ver; /* Bus protocol reported by dongle */
  558. bool intr; /* Use interrupts */
  559. bool poll; /* Use polling */
  560. bool ipend; /* Device interrupt is pending */
  561. bool intdis; /* Interrupts disabled by isr */
  562. uint intrcount; /* Count of device interrupt callbacks */
  563. uint lastintrs; /* Count as of last watchdog timer */
  564. uint spurious; /* Count of spurious interrupts */
  565. uint pollrate; /* Ticks between device polls */
  566. uint polltick; /* Tick counter */
  567. uint pollcnt; /* Count of active polls */
  568. #ifdef BCMDBG
  569. struct brcmf_console console; /* Console output polling support */
  570. uint console_addr; /* Console address from shared struct */
  571. #endif /* BCMDBG */
  572. uint regfails; /* Count of R_REG failures */
  573. uint clkstate; /* State of sd and backplane clock(s) */
  574. bool activity; /* Activity flag for clock down */
  575. s32 idletime; /* Control for activity timeout */
  576. s32 idlecount; /* Activity timeout counter */
  577. s32 idleclock; /* How to set bus driver when idle */
  578. s32 sd_rxchain;
  579. bool use_rxchain; /* If brcmf should use PKT chains */
  580. bool sleeping; /* Is SDIO bus sleeping? */
  581. bool rxflow_mode; /* Rx flow control mode */
  582. bool rxflow; /* Is rx flow control on */
  583. bool alp_only; /* Don't use HT clock (ALP only) */
  584. /* Field to decide if rx of control frames happen in rxbuf or lb-pool */
  585. bool usebufpool;
  586. #ifdef SDTEST
  587. /* external loopback */
  588. bool ext_loop;
  589. u8 loopid;
  590. /* pktgen configuration */
  591. uint pktgen_freq; /* Ticks between bursts */
  592. uint pktgen_count; /* Packets to send each burst */
  593. uint pktgen_print; /* Bursts between count displays */
  594. uint pktgen_total; /* Stop after this many */
  595. uint pktgen_minlen; /* Minimum packet data len */
  596. uint pktgen_maxlen; /* Maximum packet data len */
  597. uint pktgen_mode; /* Configured mode: tx, rx, or echo */
  598. uint pktgen_stop; /* Number of tx failures causing stop */
  599. /* active pktgen fields */
  600. uint pktgen_tick; /* Tick counter for bursts */
  601. uint pktgen_ptick; /* Burst counter for printing */
  602. uint pktgen_sent; /* Number of test packets generated */
  603. uint pktgen_rcvd; /* Number of test packets received */
  604. uint pktgen_fail; /* Number of failed send attempts */
  605. u16 pktgen_len; /* Length of next packet to send */
  606. #endif /* SDTEST */
  607. /* Some additional counters */
  608. uint tx_sderrs; /* Count of tx attempts with sd errors */
  609. uint fcqueued; /* Tx packets that got queued */
  610. uint rxrtx; /* Count of rtx requests (NAK to dongle) */
  611. uint rx_toolong; /* Receive frames too long to receive */
  612. uint rxc_errors; /* SDIO errors when reading control frames */
  613. uint rx_hdrfail; /* SDIO errors on header reads */
  614. uint rx_badhdr; /* Bad received headers (roosync?) */
  615. uint rx_badseq; /* Mismatched rx sequence number */
  616. uint fc_rcvd; /* Number of flow-control events received */
  617. uint fc_xoff; /* Number which turned on flow-control */
  618. uint fc_xon; /* Number which turned off flow-control */
  619. uint rxglomfail; /* Failed deglom attempts */
  620. uint rxglomframes; /* Number of glom frames (superframes) */
  621. uint rxglompkts; /* Number of packets from glom frames */
  622. uint f2rxhdrs; /* Number of header reads */
  623. uint f2rxdata; /* Number of frame data reads */
  624. uint f2txdata; /* Number of f2 frame writes */
  625. uint f1regdata; /* Number of f1 register accesses */
  626. u8 *ctrl_frame_buf;
  627. u32 ctrl_frame_len;
  628. bool ctrl_frame_stat;
  629. spinlock_t txqlock;
  630. wait_queue_head_t ctrl_wait;
  631. struct timer_list timer;
  632. struct completion watchdog_wait;
  633. struct task_struct *watchdog_tsk;
  634. bool wd_timer_valid;
  635. struct tasklet_struct tasklet;
  636. struct task_struct *dpc_tsk;
  637. struct completion dpc_wait;
  638. bool threads_only;
  639. struct semaphore sdsem;
  640. spinlock_t sdlock;
  641. const char *fw_name;
  642. const struct firmware *firmware;
  643. const char *nv_name;
  644. u32 fw_ptr;
  645. };
  646. struct sbconfig {
  647. u32 PAD[2];
  648. u32 sbipsflag; /* initiator port ocp slave flag */
  649. u32 PAD[3];
  650. u32 sbtpsflag; /* target port ocp slave flag */
  651. u32 PAD[11];
  652. u32 sbtmerrloga; /* (sonics >= 2.3) */
  653. u32 PAD;
  654. u32 sbtmerrlog; /* (sonics >= 2.3) */
  655. u32 PAD[3];
  656. u32 sbadmatch3; /* address match3 */
  657. u32 PAD;
  658. u32 sbadmatch2; /* address match2 */
  659. u32 PAD;
  660. u32 sbadmatch1; /* address match1 */
  661. u32 PAD[7];
  662. u32 sbimstate; /* initiator agent state */
  663. u32 sbintvec; /* interrupt mask */
  664. u32 sbtmstatelow; /* target state */
  665. u32 sbtmstatehigh; /* target state */
  666. u32 sbbwa0; /* bandwidth allocation table0 */
  667. u32 PAD;
  668. u32 sbimconfiglow; /* initiator configuration */
  669. u32 sbimconfighigh; /* initiator configuration */
  670. u32 sbadmatch0; /* address match0 */
  671. u32 PAD;
  672. u32 sbtmconfiglow; /* target configuration */
  673. u32 sbtmconfighigh; /* target configuration */
  674. u32 sbbconfig; /* broadcast configuration */
  675. u32 PAD;
  676. u32 sbbstate; /* broadcast state */
  677. u32 PAD[3];
  678. u32 sbactcnfg; /* activate configuration */
  679. u32 PAD[3];
  680. u32 sbflagst; /* current sbflags */
  681. u32 PAD[3];
  682. u32 sbidlow; /* identification */
  683. u32 sbidhigh; /* identification */
  684. };
  685. /* clkstate */
  686. #define CLK_NONE 0
  687. #define CLK_SDONLY 1
  688. #define CLK_PENDING 2 /* Not used yet */
  689. #define CLK_AVAIL 3
  690. #define BRCMF_NOPMU(brcmf) (false)
  691. #ifdef BCMDBG
  692. static int qcount[NUMPRIO];
  693. static int tx_packets[NUMPRIO];
  694. #endif /* BCMDBG */
  695. /* Deferred transmit */
  696. uint brcmf_deferred_tx = 1;
  697. module_param(brcmf_deferred_tx, uint, 0);
  698. /* Watchdog thread priority, -1 to use kernel timer */
  699. int brcmf_watchdog_prio = 97;
  700. module_param(brcmf_watchdog_prio, int, 0);
  701. /* Watchdog interval */
  702. uint brcmf_watchdog_ms = 10;
  703. module_param(brcmf_watchdog_ms, uint, 0);
  704. /* DPC thread priority, -1 to use tasklet */
  705. int brcmf_dpc_prio = 98;
  706. module_param(brcmf_dpc_prio, int, 0);
  707. #ifdef BCMDBG
  708. /* Console poll interval */
  709. uint brcmf_console_ms;
  710. module_param(brcmf_console_ms, uint, 0);
  711. #endif /* BCMDBG */
  712. /* Tx/Rx bounds */
  713. uint brcmf_txbound;
  714. uint brcmf_rxbound;
  715. uint brcmf_txminmax;
  716. /* override the RAM size if possible */
  717. #define DONGLE_MIN_MEMSIZE (128 * 1024)
  718. int brcmf_dongle_memsize;
  719. static bool brcmf_alignctl;
  720. static bool sd1idle;
  721. static bool retrydata;
  722. #define RETRYCHAN(chan) (((chan) == SDPCM_EVENT_CHANNEL) || retrydata)
  723. static const uint watermark = 8;
  724. static const uint firstread = BRCMF_FIRSTREAD;
  725. /* Retry count for register access failures */
  726. static const uint retry_limit = 2;
  727. /* Force even SD lengths (some host controllers mess up on odd bytes) */
  728. static bool forcealign;
  729. #define ALIGNMENT 4
  730. #define PKTALIGN(_p, _len, _align) \
  731. do { \
  732. uint datalign; \
  733. datalign = (unsigned long)((_p)->data); \
  734. datalign = roundup(datalign, (_align)) - datalign; \
  735. if (datalign) \
  736. skb_pull((_p), datalign); \
  737. __skb_trim((_p), (_len)); \
  738. } while (0)
  739. /* Limit on rounding up frames */
  740. static const uint max_roundup = 512;
  741. /* Try doing readahead */
  742. static bool brcmf_readahead;
  743. /* To check if there's window offered */
  744. #define DATAOK(bus) \
  745. (((u8)(bus->tx_max - bus->tx_seq) != 0) && \
  746. (((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0))
  747. /*
  748. * Reads a register in the SDIO hardware block. This block occupies a series of
  749. * adresses on the 32 bit backplane bus.
  750. */
  751. static void
  752. r_sdreg32(struct brcmf_bus *bus, u32 *regvar, u32 reg_offset, u32 *retryvar)
  753. {
  754. *retryvar = 0;
  755. do {
  756. *regvar = R_REG(bus->ci->buscorebase + reg_offset, u32);
  757. } while (brcmf_sdcard_regfail(bus->card) &&
  758. (++(*retryvar) <= retry_limit));
  759. if (*retryvar) {
  760. bus->regfails += (*retryvar-1);
  761. if (*retryvar > retry_limit) {
  762. BRCMF_ERROR(("FAILED READ %Xh\n", reg_offset));
  763. *regvar = 0;
  764. }
  765. }
  766. }
  767. static void
  768. w_sdreg32(struct brcmf_bus *bus, u32 regval, u32 reg_offset, u32 *retryvar)
  769. {
  770. *retryvar = 0;
  771. do {
  772. brcmf_sdcard_reg_write(NULL, bus->ci->buscorebase + reg_offset,
  773. sizeof(u32), regval);
  774. } while (brcmf_sdcard_regfail(bus->card) &&
  775. (++(*retryvar) <= retry_limit));
  776. if (*retryvar) {
  777. bus->regfails += (*retryvar-1);
  778. if (*retryvar > retry_limit)
  779. BRCMF_ERROR(("FAILED REGISTER WRITE"
  780. " %Xh\n", reg_offset));
  781. }
  782. }
  783. #define BRCMF_BUS SDIO_BUS
  784. #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
  785. #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
  786. #ifdef SDTEST
  787. static void brcmf_sdbrcm_checkdied(struct brcmf_bus *bus, void *pkt, uint seq);
  788. static void brcmf_sdbrcm_sdtest_set(struct brcmf_bus *bus, bool start);
  789. #endif
  790. #ifdef BCMDBG
  791. static int brcmf_sdbrcm_bus_console_in(struct brcmf_pub *drvr,
  792. unsigned char *msg, uint msglen);
  793. static int brcmf_sdbrcm_checkdied(struct brcmf_bus *bus, u8 *data, uint size);
  794. static int brcmf_sdbrcm_mem_dump(struct brcmf_bus *bus);
  795. #endif /* BCMDBG */
  796. static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter);
  797. static void brcmf_sdbrcm_release(struct brcmf_bus *bus);
  798. static void brcmf_sdbrcm_release_malloc(struct brcmf_bus *bus);
  799. static void brcmf_sdbrcm_disconnect(void *ptr);
  800. static bool brcmf_sdbrcm_chipmatch(u16 chipid);
  801. static bool brcmf_sdbrcm_probe_attach(struct brcmf_bus *bus, void *card,
  802. u32 regsva, u16 devid);
  803. static bool brcmf_sdbrcm_probe_malloc(struct brcmf_bus *bus, void *card);
  804. static bool brcmf_sdbrcm_probe_init(struct brcmf_bus *bus, void *card);
  805. static void brcmf_sdbrcm_release_dongle(struct brcmf_bus *bus);
  806. static uint brcmf_process_nvram_vars(char *varbuf, uint len);
  807. static void brcmf_sdbrcm_setmemsize(struct brcmf_bus *bus, int mem_size);
  808. static int brcmf_sdbrcm_send_buf(struct brcmf_bus *bus, u32 addr, uint fn,
  809. uint flags, u8 *buf, uint nbytes,
  810. struct sk_buff *pkt,
  811. void (*complete)(void *handle, int status,
  812. bool sync_waiting),
  813. void *handle);
  814. static bool brcmf_sdbrcm_download_firmware(struct brcmf_bus *bus, void *card);
  815. static int _brcmf_sdbrcm_download_firmware(struct brcmf_bus *bus);
  816. static int brcmf_sdbrcm_download_code_file(struct brcmf_bus *bus);
  817. static int brcmf_sdbrcm_download_nvram(struct brcmf_bus *bus);
  818. static void
  819. brcmf_sdbrcm_chip_disablecore(struct brcmf_sdio_card *card, u32 corebase);
  820. static int brcmf_sdbrcm_chip_attach(struct brcmf_bus *bus, u32 regs);
  821. static void
  822. brcmf_sdbrcm_chip_resetcore(struct brcmf_sdio_card *card, u32 corebase);
  823. static void brcmf_sdbrcm_sdiod_drive_strength_init(struct brcmf_bus *bus,
  824. u32 drivestrength);
  825. static void brcmf_sdbrcm_chip_detach(struct brcmf_bus *bus);
  826. static void brcmf_sdbrcm_wait_for_event(struct brcmf_bus *bus, bool *lockvar);
  827. static void brcmf_sdbrcm_wait_event_wakeup(struct brcmf_bus *bus);
  828. static void brcmf_sdbrcm_watchdog(unsigned long data);
  829. static int brcmf_sdbrcm_watchdog_thread(void *data);
  830. static int brcmf_sdbrcm_dpc_thread(void *data);
  831. static void brcmf_sdbrcm_dpc_tasklet(unsigned long data);
  832. static void brcmf_sdbrcm_sched_dpc(struct brcmf_bus *bus);
  833. static void brcmf_sdbrcm_sdlock(struct brcmf_bus *bus);
  834. static void brcmf_sdbrcm_sdunlock(struct brcmf_bus *bus);
  835. static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_bus *bus);
  836. /* Packet free applicable unconditionally for sdio and sdspi.
  837. * Conditional if bufpool was present for gspi bus.
  838. */
  839. static void brcmf_sdbrcm_pktfree2(struct brcmf_bus *bus, struct sk_buff *pkt)
  840. {
  841. if ((bus->bus != SPI_BUS) || bus->usebufpool)
  842. brcmu_pkt_buf_free_skb(pkt);
  843. }
  844. static void brcmf_sdbrcm_setmemsize(struct brcmf_bus *bus, int mem_size)
  845. {
  846. s32 min_size = DONGLE_MIN_MEMSIZE;
  847. /* Restrict the memsize to user specified limit */
  848. BRCMF_ERROR(("user: Restrict the dongle ram size to %d, min %d\n",
  849. brcmf_dongle_memsize, min_size));
  850. if ((brcmf_dongle_memsize > min_size) &&
  851. (brcmf_dongle_memsize < (s32) bus->orig_ramsize))
  852. bus->ramsize = brcmf_dongle_memsize;
  853. }
  854. static int brcmf_sdbrcm_set_siaddr_window(struct brcmf_bus *bus, u32 address)
  855. {
  856. int err = 0;
  857. brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRLOW,
  858. (address >> 8) & SBSDIO_SBADDRLOW_MASK, &err);
  859. if (!err)
  860. brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1,
  861. SBSDIO_FUNC1_SBADDRMID,
  862. (address >> 16) & SBSDIO_SBADDRMID_MASK, &err);
  863. if (!err)
  864. brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1,
  865. SBSDIO_FUNC1_SBADDRHIGH,
  866. (address >> 24) & SBSDIO_SBADDRHIGH_MASK,
  867. &err);
  868. return err;
  869. }
  870. /* Turn backplane clock on or off */
  871. static int brcmf_sdbrcm_htclk(struct brcmf_bus *bus, bool on, bool pendok)
  872. {
  873. int err;
  874. u8 clkctl, clkreq, devctl;
  875. struct brcmf_sdio_card *card;
  876. BRCMF_TRACE(("%s: Enter\n", __func__));
  877. clkctl = 0;
  878. card = bus->card;
  879. if (on) {
  880. /* Request HT Avail */
  881. clkreq =
  882. bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
  883. if ((bus->ci->chip == BCM4329_CHIP_ID)
  884. && (bus->ci->chiprev == 0))
  885. clkreq |= SBSDIO_FORCE_ALP;
  886. brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
  887. SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
  888. if (err) {
  889. BRCMF_ERROR(("%s: HT Avail request error: %d\n",
  890. __func__, err));
  891. return -EBADE;
  892. }
  893. if (pendok && ((bus->ci->buscoretype == PCMCIA_CORE_ID)
  894. && (bus->ci->buscorerev == 9))) {
  895. u32 dummy, retries;
  896. r_sdreg32(bus, &dummy,
  897. offsetof(struct sdpcmd_regs, clockctlstatus),
  898. &retries);
  899. }
  900. /* Check current status */
  901. clkctl = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
  902. SBSDIO_FUNC1_CHIPCLKCSR, &err);
  903. if (err) {
  904. BRCMF_ERROR(("%s: HT Avail read error: %d\n",
  905. __func__, err));
  906. return -EBADE;
  907. }
  908. /* Go to pending and await interrupt if appropriate */
  909. if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
  910. /* Allow only clock-available interrupt */
  911. devctl = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
  912. SBSDIO_DEVICE_CTL, &err);
  913. if (err) {
  914. BRCMF_ERROR(("%s: Devctl error setting CA:"
  915. " %d\n", __func__, err));
  916. return -EBADE;
  917. }
  918. devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
  919. brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
  920. SBSDIO_DEVICE_CTL, devctl, &err);
  921. BRCMF_INFO(("CLKCTL: set PENDING\n"));
  922. bus->clkstate = CLK_PENDING;
  923. return 0;
  924. } else if (bus->clkstate == CLK_PENDING) {
  925. /* Cancel CA-only interrupt filter */
  926. devctl =
  927. brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
  928. SBSDIO_DEVICE_CTL, &err);
  929. devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
  930. brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
  931. SBSDIO_DEVICE_CTL, devctl, &err);
  932. }
  933. /* Otherwise, wait here (polling) for HT Avail */
  934. if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
  935. BRCMF_SPINWAIT_SLEEP(sdioh_spinwait_sleep,
  936. ((clkctl =
  937. brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
  938. SBSDIO_FUNC1_CHIPCLKCSR,
  939. &err)),
  940. !SBSDIO_CLKAV(clkctl, bus->alp_only)),
  941. PMU_MAX_TRANSITION_DLY);
  942. }
  943. if (err) {
  944. BRCMF_ERROR(("%s: HT Avail request error: %d\n",
  945. __func__, err));
  946. return -EBADE;
  947. }
  948. if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
  949. BRCMF_ERROR(("%s: HT Avail timeout (%d): "
  950. "clkctl 0x%02x\n", __func__,
  951. PMU_MAX_TRANSITION_DLY, clkctl));
  952. return -EBADE;
  953. }
  954. /* Mark clock available */
  955. bus->clkstate = CLK_AVAIL;
  956. BRCMF_INFO(("CLKCTL: turned ON\n"));
  957. #if defined(BCMDBG)
  958. if (bus->alp_only != true) {
  959. if (SBSDIO_ALPONLY(clkctl)) {
  960. BRCMF_ERROR(("%s: HT Clock should be on.\n",
  961. __func__));
  962. }
  963. }
  964. #endif /* defined (BCMDBG) */
  965. bus->activity = true;
  966. } else {
  967. clkreq = 0;
  968. if (bus->clkstate == CLK_PENDING) {
  969. /* Cancel CA-only interrupt filter */
  970. devctl = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
  971. SBSDIO_DEVICE_CTL, &err);
  972. devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
  973. brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
  974. SBSDIO_DEVICE_CTL, devctl, &err);
  975. }
  976. bus->clkstate = CLK_SDONLY;
  977. brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
  978. SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
  979. BRCMF_INFO(("CLKCTL: turned OFF\n"));
  980. if (err) {
  981. BRCMF_ERROR(("%s: Failed access turning clock off:"
  982. " %d\n", __func__, err));
  983. return -EBADE;
  984. }
  985. }
  986. return 0;
  987. }
  988. /* Change idle/active SD state */
  989. static int brcmf_sdbrcm_sdclk(struct brcmf_bus *bus, bool on)
  990. {
  991. BRCMF_TRACE(("%s: Enter\n", __func__));
  992. if (on)
  993. bus->clkstate = CLK_SDONLY;
  994. else
  995. bus->clkstate = CLK_NONE;
  996. return 0;
  997. }
  998. /* Transition SD and backplane clock readiness */
  999. static int brcmf_sdbrcm_clkctl(struct brcmf_bus *bus, uint target, bool pendok)
  1000. {
  1001. #ifdef BCMDBG
  1002. uint oldstate = bus->clkstate;
  1003. #endif /* BCMDBG */
  1004. BRCMF_TRACE(("%s: Enter\n", __func__));
  1005. /* Early exit if we're already there */
  1006. if (bus->clkstate == target) {
  1007. if (target == CLK_AVAIL) {
  1008. brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
  1009. bus->activity = true;
  1010. }
  1011. return 0;
  1012. }
  1013. switch (target) {
  1014. case CLK_AVAIL:
  1015. /* Make sure SD clock is available */
  1016. if (bus->clkstate == CLK_NONE)
  1017. brcmf_sdbrcm_sdclk(bus, true);
  1018. /* Now request HT Avail on the backplane */
  1019. brcmf_sdbrcm_htclk(bus, true, pendok);
  1020. brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
  1021. bus->activity = true;
  1022. break;
  1023. case CLK_SDONLY:
  1024. /* Remove HT request, or bring up SD clock */
  1025. if (bus->clkstate == CLK_NONE)
  1026. brcmf_sdbrcm_sdclk(bus, true);
  1027. else if (bus->clkstate == CLK_AVAIL)
  1028. brcmf_sdbrcm_htclk(bus, false, false);
  1029. else
  1030. BRCMF_ERROR(("brcmf_sdbrcm_clkctl: request for %d -> %d"
  1031. "\n", bus->clkstate, target));
  1032. brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
  1033. break;
  1034. case CLK_NONE:
  1035. /* Make sure to remove HT request */
  1036. if (bus->clkstate == CLK_AVAIL)
  1037. brcmf_sdbrcm_htclk(bus, false, false);
  1038. /* Now remove the SD clock */
  1039. brcmf_sdbrcm_sdclk(bus, false);
  1040. brcmf_sdbrcm_wd_timer(bus, 0);
  1041. break;
  1042. }
  1043. #ifdef BCMDBG
  1044. BRCMF_INFO(("brcmf_sdbrcm_clkctl: %d -> %d\n",
  1045. oldstate, bus->clkstate));
  1046. #endif /* BCMDBG */
  1047. return 0;
  1048. }
  1049. int brcmf_sdbrcm_bussleep(struct brcmf_bus *bus, bool sleep)
  1050. {
  1051. struct brcmf_sdio_card *card = bus->card;
  1052. uint retries = 0;
  1053. BRCMF_INFO(("brcmf_sdbrcm_bussleep: request %s (currently %s)\n",
  1054. (sleep ? "SLEEP" : "WAKE"),
  1055. (bus->sleeping ? "SLEEP" : "WAKE")));
  1056. /* Done if we're already in the requested state */
  1057. if (sleep == bus->sleeping)
  1058. return 0;
  1059. /* Going to sleep: set the alarm and turn off the lights... */
  1060. if (sleep) {
  1061. /* Don't sleep if something is pending */
  1062. if (bus->dpc_sched || bus->rxskip || pktq_len(&bus->txq))
  1063. return -EBUSY;
  1064. /* Disable SDIO interrupts (no longer interested) */
  1065. brcmf_sdcard_intr_disable(bus->card);
  1066. /* Make sure the controller has the bus up */
  1067. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
  1068. /* Tell device to start using OOB wakeup */
  1069. w_sdreg32(bus, SMB_USE_OOB,
  1070. offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
  1071. if (retries > retry_limit)
  1072. BRCMF_ERROR(("CANNOT SIGNAL CHIP, "
  1073. "WILL NOT WAKE UP!!\n"));
  1074. /* Turn off our contribution to the HT clock request */
  1075. brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
  1076. brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
  1077. SBSDIO_FUNC1_CHIPCLKCSR,
  1078. SBSDIO_FORCE_HW_CLKREQ_OFF, NULL);
  1079. /* Isolate the bus */
  1080. if (bus->ci->chip != BCM4329_CHIP_ID
  1081. && bus->ci->chip != BCM4319_CHIP_ID) {
  1082. brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
  1083. SBSDIO_DEVICE_CTL,
  1084. SBSDIO_DEVCTL_PADS_ISO, NULL);
  1085. }
  1086. /* Change state */
  1087. bus->sleeping = true;
  1088. } else {
  1089. /* Waking up: bus power up is ok, set local state */
  1090. brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
  1091. SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
  1092. /* Force pad isolation off if possible
  1093. (in case power never toggled) */
  1094. if ((bus->ci->buscoretype == PCMCIA_CORE_ID)
  1095. && (bus->ci->buscorerev >= 10))
  1096. brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
  1097. SBSDIO_DEVICE_CTL, 0, NULL);
  1098. /* Make sure the controller has the bus up */
  1099. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
  1100. /* Send misc interrupt to indicate OOB not needed */
  1101. w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, tosbmailboxdata),
  1102. &retries);
  1103. if (retries <= retry_limit)
  1104. w_sdreg32(bus, SMB_DEV_INT,
  1105. offsetof(struct sdpcmd_regs, tosbmailbox),
  1106. &retries);
  1107. if (retries > retry_limit)
  1108. BRCMF_ERROR(("CANNOT SIGNAL CHIP TO CLEAR OOB!!\n"));
  1109. /* Make sure we have SD bus access */
  1110. brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
  1111. /* Change state */
  1112. bus->sleeping = false;
  1113. /* Enable interrupts again */
  1114. if (bus->intr && (bus->drvr->busstate == BRCMF_BUS_DATA)) {
  1115. bus->intdis = false;
  1116. brcmf_sdcard_intr_enable(bus->card);
  1117. }
  1118. }
  1119. return 0;
  1120. }
  1121. #define BUS_WAKE(bus) \
  1122. do { \
  1123. if ((bus)->sleeping) \
  1124. brcmf_sdbrcm_bussleep((bus), false); \
  1125. } while (0);
  1126. /* Writes a HW/SW header into the packet and sends it. */
  1127. /* Assumes: (a) header space already there, (b) caller holds lock */
  1128. static int brcmf_sdbrcm_txpkt(struct brcmf_bus *bus, struct sk_buff *pkt, uint chan,
  1129. bool free_pkt)
  1130. {
  1131. int ret;
  1132. u8 *frame;
  1133. u16 len, pad = 0;
  1134. u32 swheader;
  1135. uint retries = 0;
  1136. struct brcmf_sdio_card *card;
  1137. struct sk_buff *new;
  1138. int i;
  1139. BRCMF_TRACE(("%s: Enter\n", __func__));
  1140. card = bus->card;
  1141. if (bus->drvr->dongle_reset) {
  1142. ret = -EPERM;
  1143. goto done;
  1144. }
  1145. frame = (u8 *) (pkt->data);
  1146. /* Add alignment padding, allocate new packet if needed */
  1147. pad = ((unsigned long)frame % BRCMF_SDALIGN);
  1148. if (pad) {
  1149. if (skb_headroom(pkt) < pad) {
  1150. BRCMF_INFO(("%s: insufficient headroom %d for %d pad\n",
  1151. __func__, skb_headroom(pkt), pad));
  1152. bus->drvr->tx_realloc++;
  1153. new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN);
  1154. if (!new) {
  1155. BRCMF_ERROR(("%s: couldn't allocate new "
  1156. "%d-byte packet\n", __func__,
  1157. pkt->len + BRCMF_SDALIGN));
  1158. ret = -ENOMEM;
  1159. goto done;
  1160. }
  1161. PKTALIGN(new, pkt->len, BRCMF_SDALIGN);
  1162. memcpy(new->data, pkt->data, pkt->len);
  1163. if (free_pkt)
  1164. brcmu_pkt_buf_free_skb(pkt);
  1165. /* free the pkt if canned one is not used */
  1166. free_pkt = true;
  1167. pkt = new;
  1168. frame = (u8 *) (pkt->data);
  1169. /* precondition: (frame % BRCMF_SDALIGN) == 0) */
  1170. pad = 0;
  1171. } else {
  1172. skb_push(pkt, pad);
  1173. frame = (u8 *) (pkt->data);
  1174. /* precondition: pad + SDPCM_HDRLEN <= pkt->len */
  1175. memset(frame, 0, pad + SDPCM_HDRLEN);
  1176. }
  1177. }
  1178. /* precondition: pad < BRCMF_SDALIGN */
  1179. /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
  1180. len = (u16) (pkt->len);
  1181. *(u16 *) frame = cpu_to_le16(len);
  1182. *(((u16 *) frame) + 1) = cpu_to_le16(~len);
  1183. /* Software tag: channel, sequence number, data offset */
  1184. swheader =
  1185. ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
  1186. (((pad +
  1187. SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
  1188. put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
  1189. put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
  1190. #ifdef BCMDBG
  1191. tx_packets[pkt->priority]++;
  1192. if (BRCMF_BYTES_ON() &&
  1193. (((BRCMF_CTL_ON() && (chan == SDPCM_CONTROL_CHANNEL)) ||
  1194. (BRCMF_DATA_ON() && (chan != SDPCM_CONTROL_CHANNEL))))) {
  1195. printk(KERN_DEBUG "Tx Frame:\n");
  1196. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, frame, len);
  1197. } else if (BRCMF_HDRS_ON()) {
  1198. printk(KERN_DEBUG "TxHdr:\n");
  1199. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  1200. frame, min_t(u16, len, 16));
  1201. }
  1202. #endif
  1203. /* Raise len to next SDIO block to eliminate tail command */
  1204. if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
  1205. u16 pad = bus->blocksize - (len % bus->blocksize);
  1206. if ((pad <= bus->roundup) && (pad < bus->blocksize))
  1207. len += pad;
  1208. } else if (len % BRCMF_SDALIGN) {
  1209. len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
  1210. }
  1211. /* Some controllers have trouble with odd bytes -- round to even */
  1212. if (forcealign && (len & (ALIGNMENT - 1))) {
  1213. len = roundup(len, ALIGNMENT);
  1214. }
  1215. do {
  1216. ret = brcmf_sdbrcm_send_buf(bus, brcmf_sdcard_cur_sbwad(card),
  1217. SDIO_FUNC_2, F2SYNC, frame, len, pkt, NULL, NULL);
  1218. bus->f2txdata++;
  1219. if (ret < 0) {
  1220. /* On failure, abort the command
  1221. and terminate the frame */
  1222. BRCMF_INFO(("%s: sdio error %d, abort command and "
  1223. "terminate frame.\n", __func__, ret));
  1224. bus->tx_sderrs++;
  1225. brcmf_sdcard_abort(card, SDIO_FUNC_2);
  1226. brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
  1227. SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
  1228. NULL);
  1229. bus->f1regdata++;
  1230. for (i = 0; i < 3; i++) {
  1231. u8 hi, lo;
  1232. hi = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
  1233. SBSDIO_FUNC1_WFRAMEBCHI,
  1234. NULL);
  1235. lo = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
  1236. SBSDIO_FUNC1_WFRAMEBCLO,
  1237. NULL);
  1238. bus->f1regdata += 2;
  1239. if ((hi == 0) && (lo == 0))
  1240. break;
  1241. }
  1242. }
  1243. if (ret == 0)
  1244. bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
  1245. } while ((ret < 0) && retrydata && retries++ < TXRETRIES);
  1246. done:
  1247. /* restore pkt buffer pointer before calling tx complete routine */
  1248. skb_pull(pkt, SDPCM_HDRLEN + pad);
  1249. brcmf_sdbrcm_sdunlock(bus);
  1250. brcmf_txcomplete(bus->drvr, pkt, ret != 0);
  1251. brcmf_sdbrcm_sdlock(bus);
  1252. if (free_pkt)
  1253. brcmu_pkt_buf_free_skb(pkt);
  1254. return ret;
  1255. }
  1256. int brcmf_sdbrcm_bus_txdata(struct brcmf_bus *bus, struct sk_buff *pkt)
  1257. {
  1258. int ret = -EBADE;
  1259. uint datalen, prec;
  1260. BRCMF_TRACE(("%s: Enter\n", __func__));
  1261. datalen = pkt->len;
  1262. #ifdef SDTEST
  1263. /* Push the test header if doing loopback */
  1264. if (bus->ext_loop) {
  1265. u8 *data;
  1266. skb_push(pkt, SDPCM_TEST_HDRLEN);
  1267. data = pkt->data;
  1268. *data++ = SDPCM_TEST_ECHOREQ;
  1269. *data++ = (u8) bus->loopid++;
  1270. *data++ = (datalen >> 0);
  1271. *data++ = (datalen >> 8);
  1272. datalen += SDPCM_TEST_HDRLEN;
  1273. }
  1274. #endif /* SDTEST */
  1275. /* Add space for the header */
  1276. skb_push(pkt, SDPCM_HDRLEN);
  1277. /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
  1278. prec = PRIO2PREC((pkt->priority & PRIOMASK));
  1279. /* Check for existing queue, current flow-control,
  1280. pending event, or pending clock */
  1281. if (brcmf_deferred_tx || bus->fcstate || pktq_len(&bus->txq)
  1282. || bus->dpc_sched || (!DATAOK(bus))
  1283. || (bus->flowcontrol & NBITVAL(prec))
  1284. || (bus->clkstate != CLK_AVAIL)) {
  1285. BRCMF_TRACE(("%s: deferring pktq len %d\n", __func__,
  1286. pktq_len(&bus->txq)));
  1287. bus->fcqueued++;
  1288. /* Priority based enq */
  1289. spin_lock_bh(&bus->txqlock);
  1290. if (brcmf_c_prec_enq(bus->drvr, &bus->txq, pkt, prec) == false) {
  1291. skb_pull(pkt, SDPCM_HDRLEN);
  1292. brcmf_txcomplete(bus->drvr, pkt, false);
  1293. brcmu_pkt_buf_free_skb(pkt);
  1294. BRCMF_ERROR(("%s: out of bus->txq !!!\n", __func__));
  1295. ret = -ENOSR;
  1296. } else {
  1297. ret = 0;
  1298. }
  1299. spin_unlock_bh(&bus->txqlock);
  1300. if (pktq_len(&bus->txq) >= TXHI)
  1301. brcmf_txflowcontrol(bus->drvr, 0, ON);
  1302. #ifdef BCMDBG
  1303. if (pktq_plen(&bus->txq, prec) > qcount[prec])
  1304. qcount[prec] = pktq_plen(&bus->txq, prec);
  1305. #endif
  1306. /* Schedule DPC if needed to send queued packet(s) */
  1307. if (brcmf_deferred_tx && !bus->dpc_sched) {
  1308. bus->dpc_sched = true;
  1309. brcmf_sdbrcm_sched_dpc(bus);
  1310. }
  1311. } else {
  1312. /* Lock: we're about to use shared data/code (and SDIO) */
  1313. brcmf_sdbrcm_sdlock(bus);
  1314. /* Otherwise, send it now */
  1315. BUS_WAKE(bus);
  1316. /* Make sure back plane ht clk is on, no pending allowed */
  1317. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
  1318. #ifndef SDTEST
  1319. BRCMF_TRACE(("%s: calling txpkt\n", __func__));
  1320. ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
  1321. #else
  1322. ret = brcmf_sdbrcm_txpkt(bus, pkt,
  1323. (bus->ext_loop ? SDPCM_TEST_CHANNEL :
  1324. SDPCM_DATA_CHANNEL), true);
  1325. #endif
  1326. if (ret)
  1327. bus->drvr->tx_errors++;
  1328. else
  1329. bus->drvr->dstats.tx_bytes += datalen;
  1330. if (bus->idletime == BRCMF_IDLE_IMMEDIATE &&
  1331. !bus->dpc_sched) {
  1332. bus->activity = false;
  1333. brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
  1334. }
  1335. brcmf_sdbrcm_sdunlock(bus);
  1336. }
  1337. return ret;
  1338. }
  1339. static uint brcmf_sdbrcm_sendfromq(struct brcmf_bus *bus, uint maxframes)
  1340. {
  1341. struct sk_buff *pkt;
  1342. u32 intstatus = 0;
  1343. uint retries = 0;
  1344. int ret = 0, prec_out;
  1345. uint cnt = 0;
  1346. uint datalen;
  1347. u8 tx_prec_map;
  1348. struct brcmf_pub *drvr = bus->drvr;
  1349. BRCMF_TRACE(("%s: Enter\n", __func__));
  1350. tx_prec_map = ~bus->flowcontrol;
  1351. /* Send frames until the limit or some other event */
  1352. for (cnt = 0; (cnt < maxframes) && DATAOK(bus); cnt++) {
  1353. spin_lock_bh(&bus->txqlock);
  1354. pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
  1355. if (pkt == NULL) {
  1356. spin_unlock_bh(&bus->txqlock);
  1357. break;
  1358. }
  1359. spin_unlock_bh(&bus->txqlock);
  1360. datalen = pkt->len - SDPCM_HDRLEN;
  1361. #ifndef SDTEST
  1362. ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
  1363. #else
  1364. ret = brcmf_sdbrcm_txpkt(bus, pkt,
  1365. (bus->ext_loop ? SDPCM_TEST_CHANNEL :
  1366. SDPCM_DATA_CHANNEL), true);
  1367. #endif
  1368. if (ret)
  1369. bus->drvr->tx_errors++;
  1370. else
  1371. bus->drvr->dstats.tx_bytes += datalen;
  1372. /* In poll mode, need to check for other events */
  1373. if (!bus->intr && cnt) {
  1374. /* Check device status, signal pending interrupt */
  1375. r_sdreg32(bus, &intstatus,
  1376. offsetof(struct sdpcmd_regs, intstatus),
  1377. &retries);
  1378. bus->f2txdata++;
  1379. if (brcmf_sdcard_regfail(bus->card))
  1380. break;
  1381. if (intstatus & bus->hostintmask)
  1382. bus->ipend = true;
  1383. }
  1384. }
  1385. /* Deflow-control stack if needed */
  1386. if (drvr->up && (drvr->busstate == BRCMF_BUS_DATA) &&
  1387. drvr->txoff && (pktq_len(&bus->txq) < TXLOW))
  1388. brcmf_txflowcontrol(drvr, 0, OFF);
  1389. return cnt;
  1390. }
  1391. int
  1392. brcmf_sdbrcm_bus_txctl(struct brcmf_bus *bus, unsigned char *msg, uint msglen)
  1393. {
  1394. u8 *frame;
  1395. u16 len;
  1396. u32 swheader;
  1397. uint retries = 0;
  1398. struct brcmf_sdio_card *card = bus->card;
  1399. u8 doff = 0;
  1400. int ret = -1;
  1401. int i;
  1402. BRCMF_TRACE(("%s: Enter\n", __func__));
  1403. if (bus->drvr->dongle_reset)
  1404. return -EIO;
  1405. /* Back the pointer to make a room for bus header */
  1406. frame = msg - SDPCM_HDRLEN;
  1407. len = (msglen += SDPCM_HDRLEN);
  1408. /* Add alignment padding (optional for ctl frames) */
  1409. if (brcmf_alignctl) {
  1410. doff = ((unsigned long)frame % BRCMF_SDALIGN);
  1411. if (doff) {
  1412. frame -= doff;
  1413. len += doff;
  1414. msglen += doff;
  1415. memset(frame, 0, doff + SDPCM_HDRLEN);
  1416. }
  1417. /* precondition: doff < BRCMF_SDALIGN */
  1418. }
  1419. doff += SDPCM_HDRLEN;
  1420. /* Round send length to next SDIO block */
  1421. if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
  1422. u16 pad = bus->blocksize - (len % bus->blocksize);
  1423. if ((pad <= bus->roundup) && (pad < bus->blocksize))
  1424. len += pad;
  1425. } else if (len % BRCMF_SDALIGN) {
  1426. len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
  1427. }
  1428. /* Satisfy length-alignment requirements */
  1429. if (forcealign && (len & (ALIGNMENT - 1)))
  1430. len = roundup(len, ALIGNMENT);
  1431. /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
  1432. /* Need to lock here to protect txseq and SDIO tx calls */
  1433. brcmf_sdbrcm_sdlock(bus);
  1434. BUS_WAKE(bus);
  1435. /* Make sure backplane clock is on */
  1436. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
  1437. /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
  1438. *(u16 *) frame = cpu_to_le16((u16) msglen);
  1439. *(((u16 *) frame) + 1) = cpu_to_le16(~msglen);
  1440. /* Software tag: channel, sequence number, data offset */
  1441. swheader =
  1442. ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
  1443. SDPCM_CHANNEL_MASK)
  1444. | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
  1445. SDPCM_DOFFSET_MASK);
  1446. put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
  1447. put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
  1448. if (!DATAOK(bus)) {
  1449. BRCMF_INFO(("%s: No bus credit bus->tx_max %d,"
  1450. " bus->tx_seq %d\n", __func__,
  1451. bus->tx_max, bus->tx_seq));
  1452. bus->ctrl_frame_stat = true;
  1453. /* Send from dpc */
  1454. bus->ctrl_frame_buf = frame;
  1455. bus->ctrl_frame_len = len;
  1456. brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat);
  1457. if (bus->ctrl_frame_stat == false) {
  1458. BRCMF_INFO(("%s: ctrl_frame_stat == false\n",
  1459. __func__));
  1460. ret = 0;
  1461. } else {
  1462. BRCMF_INFO(("%s: ctrl_frame_stat == true\n", __func__));
  1463. ret = -1;
  1464. }
  1465. }
  1466. if (ret == -1) {
  1467. #ifdef BCMDBG
  1468. if (BRCMF_BYTES_ON() && BRCMF_CTL_ON()) {
  1469. printk(KERN_DEBUG "Tx Frame:\n");
  1470. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  1471. frame, len);
  1472. } else if (BRCMF_HDRS_ON()) {
  1473. printk(KERN_DEBUG "TxHdr:\n");
  1474. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  1475. frame, min_t(u16, len, 16));
  1476. }
  1477. #endif
  1478. do {
  1479. bus->ctrl_frame_stat = false;
  1480. ret = brcmf_sdbrcm_send_buf(bus,
  1481. brcmf_sdcard_cur_sbwad(card), SDIO_FUNC_2,
  1482. F2SYNC, frame, len, NULL, NULL, NULL);
  1483. if (ret < 0) {
  1484. /* On failure, abort the command and
  1485. terminate the frame */
  1486. BRCMF_INFO(("%s: sdio error %d, abort command "
  1487. "and terminate frame.\n",
  1488. __func__, ret));
  1489. bus->tx_sderrs++;
  1490. brcmf_sdcard_abort(card, SDIO_FUNC_2);
  1491. brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
  1492. SBSDIO_FUNC1_FRAMECTRL,
  1493. SFC_WF_TERM, NULL);
  1494. bus->f1regdata++;
  1495. for (i = 0; i < 3; i++) {
  1496. u8 hi, lo;
  1497. hi = brcmf_sdcard_cfg_read(card,
  1498. SDIO_FUNC_1,
  1499. SBSDIO_FUNC1_WFRAMEBCHI,
  1500. NULL);
  1501. lo = brcmf_sdcard_cfg_read(card,
  1502. SDIO_FUNC_1,
  1503. SBSDIO_FUNC1_WFRAMEBCLO,
  1504. NULL);
  1505. bus->f1regdata += 2;
  1506. if ((hi == 0) && (lo == 0))
  1507. break;
  1508. }
  1509. }
  1510. if (ret == 0) {
  1511. bus->tx_seq =
  1512. (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
  1513. }
  1514. } while ((ret < 0) && retries++ < TXRETRIES);
  1515. }
  1516. if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) {
  1517. bus->activity = false;
  1518. brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
  1519. }
  1520. brcmf_sdbrcm_sdunlock(bus);
  1521. if (ret)
  1522. bus->drvr->tx_ctlerrs++;
  1523. else
  1524. bus->drvr->tx_ctlpkts++;
  1525. return ret ? -EIO : 0;
  1526. }
  1527. int brcmf_sdbrcm_bus_rxctl(struct brcmf_bus *bus, unsigned char *msg, uint msglen)
  1528. {
  1529. int timeleft;
  1530. uint rxlen = 0;
  1531. bool pending;
  1532. BRCMF_TRACE(("%s: Enter\n", __func__));
  1533. if (bus->drvr->dongle_reset)
  1534. return -EIO;
  1535. /* Wait until control frame is available */
  1536. timeleft = brcmf_os_ioctl_resp_wait(bus->drvr, &bus->rxlen, &pending);
  1537. brcmf_sdbrcm_sdlock(bus);
  1538. rxlen = bus->rxlen;
  1539. memcpy(msg, bus->rxctl, min(msglen, rxlen));
  1540. bus->rxlen = 0;
  1541. brcmf_sdbrcm_sdunlock(bus);
  1542. if (rxlen) {
  1543. BRCMF_CTL(("%s: resumed on rxctl frame, got %d expected %d\n",
  1544. __func__, rxlen, msglen));
  1545. } else if (timeleft == 0) {
  1546. BRCMF_ERROR(("%s: resumed on timeout\n", __func__));
  1547. #ifdef BCMDBG
  1548. brcmf_sdbrcm_sdlock(bus);
  1549. brcmf_sdbrcm_checkdied(bus, NULL, 0);
  1550. brcmf_sdbrcm_sdunlock(bus);
  1551. #endif /* BCMDBG */
  1552. } else if (pending == true) {
  1553. BRCMF_CTL(("%s: cancelled\n", __func__));
  1554. return -ERESTARTSYS;
  1555. } else {
  1556. BRCMF_CTL(("%s: resumed for unknown reason?\n", __func__));
  1557. #ifdef BCMDBG
  1558. brcmf_sdbrcm_sdlock(bus);
  1559. brcmf_sdbrcm_checkdied(bus, NULL, 0);
  1560. brcmf_sdbrcm_sdunlock(bus);
  1561. #endif /* BCMDBG */
  1562. }
  1563. if (rxlen)
  1564. bus->drvr->rx_ctlpkts++;
  1565. else
  1566. bus->drvr->rx_ctlerrs++;
  1567. return rxlen ? (int)rxlen : -ETIMEDOUT;
  1568. }
  1569. /* IOVar table */
  1570. enum {
  1571. IOV_INTR = 1,
  1572. IOV_POLLRATE,
  1573. IOV_SDREG,
  1574. IOV_SBREG,
  1575. IOV_SDCIS,
  1576. IOV_MEMBYTES,
  1577. IOV_MEMSIZE,
  1578. #ifdef BCMDBG
  1579. IOV_CHECKDIED,
  1580. IOV_CONS,
  1581. IOV_DCONSOLE_POLL,
  1582. #endif
  1583. IOV_DOWNLOAD,
  1584. IOV_FORCEEVEN,
  1585. IOV_SDIOD_DRIVE,
  1586. IOV_READAHEAD,
  1587. IOV_SDRXCHAIN,
  1588. IOV_ALIGNCTL,
  1589. IOV_SDALIGN,
  1590. IOV_DEVRESET,
  1591. IOV_CPU,
  1592. #ifdef SDTEST
  1593. IOV_PKTGEN,
  1594. IOV_EXTLOOP,
  1595. #endif /* SDTEST */
  1596. IOV_SPROM,
  1597. IOV_TXBOUND,
  1598. IOV_RXBOUND,
  1599. IOV_TXMINMAX,
  1600. IOV_IDLETIME,
  1601. IOV_IDLECLOCK,
  1602. IOV_SD1IDLE,
  1603. IOV_SLEEP,
  1604. IOV_WDTICK,
  1605. IOV_VARS
  1606. };
  1607. const struct brcmu_iovar brcmf_sdio_iovars[] = {
  1608. {"intr", IOV_INTR, 0, IOVT_BOOL, 0},
  1609. {"sleep", IOV_SLEEP, 0, IOVT_BOOL, 0},
  1610. {"pollrate", IOV_POLLRATE, 0, IOVT_UINT32, 0},
  1611. {"idletime", IOV_IDLETIME, 0, IOVT_INT32, 0},
  1612. {"idleclock", IOV_IDLECLOCK, 0, IOVT_INT32, 0},
  1613. {"sd1idle", IOV_SD1IDLE, 0, IOVT_BOOL, 0},
  1614. {"membytes", IOV_MEMBYTES, 0, IOVT_BUFFER, 2 * sizeof(int)},
  1615. {"memsize", IOV_MEMSIZE, 0, IOVT_UINT32, 0},
  1616. {"download", IOV_DOWNLOAD, 0, IOVT_BOOL, 0},
  1617. {"vars", IOV_VARS, 0, IOVT_BUFFER, 0},
  1618. {"sdiod_drive", IOV_SDIOD_DRIVE, 0, IOVT_UINT32, 0},
  1619. {"readahead", IOV_READAHEAD, 0, IOVT_BOOL, 0},
  1620. {"sdrxchain", IOV_SDRXCHAIN, 0, IOVT_BOOL, 0},
  1621. {"alignctl", IOV_ALIGNCTL, 0, IOVT_BOOL, 0},
  1622. {"sdalign", IOV_SDALIGN, 0, IOVT_BOOL, 0},
  1623. {"devreset", IOV_DEVRESET, 0, IOVT_BOOL, 0},
  1624. {"wdtick", IOV_WDTICK, 0, IOVT_UINT32, 0},
  1625. #ifdef BCMDBG
  1626. {"cons", IOV_CONS, 0, IOVT_BUFFER, 0}
  1627. ,
  1628. {"dconpoll", IOV_DCONSOLE_POLL, 0, IOVT_UINT32, 0}
  1629. ,
  1630. {"sdreg", IOV_SDREG, 0, IOVT_BUFFER, sizeof(struct brcmf_sdreg)}
  1631. ,
  1632. {"sbreg", IOV_SBREG, 0, IOVT_BUFFER, sizeof(struct brcmf_sdreg)}
  1633. ,
  1634. {"sd_cis", IOV_SDCIS, 0, IOVT_BUFFER, BRCMF_IOCTL_MAXLEN}
  1635. ,
  1636. {"forcealign", IOV_FORCEEVEN, 0, IOVT_BOOL, 0}
  1637. ,
  1638. {"txbound", IOV_TXBOUND, 0, IOVT_UINT32, 0}
  1639. ,
  1640. {"rxbound", IOV_RXBOUND, 0, IOVT_UINT32, 0}
  1641. ,
  1642. {"txminmax", IOV_TXMINMAX, 0, IOVT_UINT32, 0}
  1643. ,
  1644. {"cpu", IOV_CPU, 0, IOVT_BOOL, 0}
  1645. ,
  1646. {"checkdied", IOV_CHECKDIED, 0, IOVT_BUFFER, 0}
  1647. ,
  1648. #endif /* BCMDBG */
  1649. #ifdef SDTEST
  1650. {"extloop", IOV_EXTLOOP, 0, IOVT_BOOL, 0}
  1651. ,
  1652. {"pktgen", IOV_PKTGEN, 0, IOVT_BUFFER, sizeof(struct brcmf_pktgen)}
  1653. ,
  1654. #endif /* SDTEST */
  1655. {NULL, 0, 0, 0, 0}
  1656. };
  1657. static void
  1658. brcmf_dump_pct(struct brcmu_strbuf *strbuf, char *desc, uint num, uint div)
  1659. {
  1660. uint q1, q2;
  1661. if (!div) {
  1662. brcmu_bprintf(strbuf, "%s N/A", desc);
  1663. } else {
  1664. q1 = num / div;
  1665. q2 = (100 * (num - (q1 * div))) / div;
  1666. brcmu_bprintf(strbuf, "%s %d.%02d", desc, q1, q2);
  1667. }
  1668. }
  1669. void brcmf_sdbrcm_bus_dump(struct brcmf_pub *drvr, struct brcmu_strbuf *strbuf)
  1670. {
  1671. struct brcmf_bus *bus = drvr->bus;
  1672. brcmu_bprintf(strbuf, "Bus SDIO structure:\n");
  1673. brcmu_bprintf(strbuf,
  1674. "hostintmask 0x%08x intstatus 0x%08x sdpcm_ver %d\n",
  1675. bus->hostintmask, bus->intstatus, bus->sdpcm_ver);
  1676. brcmu_bprintf(strbuf,
  1677. "fcstate %d qlen %d tx_seq %d, max %d, rxskip %d rxlen %d rx_seq %d\n",
  1678. bus->fcstate, pktq_len(&bus->txq), bus->tx_seq, bus->tx_max,
  1679. bus->rxskip, bus->rxlen, bus->rx_seq);
  1680. brcmu_bprintf(strbuf, "intr %d intrcount %d lastintrs %d spurious %d\n",
  1681. bus->intr, bus->intrcount, bus->lastintrs, bus->spurious);
  1682. brcmu_bprintf(strbuf, "pollrate %d pollcnt %d regfails %d\n",
  1683. bus->pollrate, bus->pollcnt, bus->regfails);
  1684. brcmu_bprintf(strbuf, "\nAdditional counters:\n");
  1685. brcmu_bprintf(strbuf,
  1686. "tx_sderrs %d fcqueued %d rxrtx %d rx_toolong %d rxc_errors %d\n",
  1687. bus->tx_sderrs, bus->fcqueued, bus->rxrtx, bus->rx_toolong,
  1688. bus->rxc_errors);
  1689. brcmu_bprintf(strbuf, "rx_hdrfail %d badhdr %d badseq %d\n",
  1690. bus->rx_hdrfail, bus->rx_badhdr, bus->rx_badseq);
  1691. brcmu_bprintf(strbuf, "fc_rcvd %d, fc_xoff %d, fc_xon %d\n",
  1692. bus->fc_rcvd, bus->fc_xoff, bus->fc_xon);
  1693. brcmu_bprintf(strbuf, "rxglomfail %d, rxglomframes %d, rxglompkts %d\n",
  1694. bus->rxglomfail, bus->rxglomframes, bus->rxglompkts);
  1695. brcmu_bprintf(strbuf, "f2rx (hdrs/data) %d (%d/%d), f2tx %d f1regs"
  1696. " %d\n",
  1697. (bus->f2rxhdrs + bus->f2rxdata), bus->f2rxhdrs,
  1698. bus->f2rxdata, bus->f2txdata, bus->f1regdata);
  1699. {
  1700. brcmf_dump_pct(strbuf, "\nRx: pkts/f2rd", bus->drvr->rx_packets,
  1701. (bus->f2rxhdrs + bus->f2rxdata));
  1702. brcmf_dump_pct(strbuf, ", pkts/f1sd", bus->drvr->rx_packets,
  1703. bus->f1regdata);
  1704. brcmf_dump_pct(strbuf, ", pkts/sd", bus->drvr->rx_packets,
  1705. (bus->f2rxhdrs + bus->f2rxdata + bus->f1regdata));
  1706. brcmf_dump_pct(strbuf, ", pkts/int", bus->drvr->rx_packets,
  1707. bus->intrcount);
  1708. brcmu_bprintf(strbuf, "\n");
  1709. brcmf_dump_pct(strbuf, "Rx: glom pct", (100 * bus->rxglompkts),
  1710. bus->drvr->rx_packets);
  1711. brcmf_dump_pct(strbuf, ", pkts/glom", bus->rxglompkts,
  1712. bus->rxglomframes);
  1713. brcmu_bprintf(strbuf, "\n");
  1714. brcmf_dump_pct(strbuf, "Tx: pkts/f2wr", bus->drvr->tx_packets,
  1715. bus->f2txdata);
  1716. brcmf_dump_pct(strbuf, ", pkts/f1sd", bus->drvr->tx_packets,
  1717. bus->f1regdata);
  1718. brcmf_dump_pct(strbuf, ", pkts/sd", bus->drvr->tx_packets,
  1719. (bus->f2txdata + bus->f1regdata));
  1720. brcmf_dump_pct(strbuf, ", pkts/int", bus->drvr->tx_packets,
  1721. bus->intrcount);
  1722. brcmu_bprintf(strbuf, "\n");
  1723. brcmf_dump_pct(strbuf, "Total: pkts/f2rw",
  1724. (bus->drvr->tx_packets + bus->drvr->rx_packets),
  1725. (bus->f2txdata + bus->f2rxhdrs + bus->f2rxdata));
  1726. brcmf_dump_pct(strbuf, ", pkts/f1sd",
  1727. (bus->drvr->tx_packets + bus->drvr->rx_packets),
  1728. bus->f1regdata);
  1729. brcmf_dump_pct(strbuf, ", pkts/sd",
  1730. (bus->drvr->tx_packets + bus->drvr->rx_packets),
  1731. (bus->f2txdata + bus->f2rxhdrs + bus->f2rxdata +
  1732. bus->f1regdata));
  1733. brcmf_dump_pct(strbuf, ", pkts/int",
  1734. (bus->drvr->tx_packets + bus->drvr->rx_packets),
  1735. bus->intrcount);
  1736. brcmu_bprintf(strbuf, "\n\n");
  1737. }
  1738. #ifdef SDTEST
  1739. if (bus->pktgen_count) {
  1740. brcmu_bprintf(strbuf, "pktgen config and count:\n");
  1741. brcmu_bprintf(strbuf,
  1742. "freq %d count %d print %d total %d min %d len %d\n",
  1743. bus->pktgen_freq, bus->pktgen_count,
  1744. bus->pktgen_print, bus->pktgen_total,
  1745. bus->pktgen_minlen, bus->pktgen_maxlen);
  1746. brcmu_bprintf(strbuf, "send attempts %d rcvd %d fail %d\n",
  1747. bus->pktgen_sent, bus->pktgen_rcvd,
  1748. bus->pktgen_fail);
  1749. }
  1750. #endif /* SDTEST */
  1751. #ifdef BCMDBG
  1752. brcmu_bprintf(strbuf, "dpc_sched %d host interrupt%spending\n",
  1753. bus->dpc_sched, " not ");
  1754. brcmu_bprintf(strbuf, "blocksize %d roundup %d\n", bus->blocksize,
  1755. bus->roundup);
  1756. #endif /* BCMDBG */
  1757. brcmu_bprintf(strbuf,
  1758. "clkstate %d activity %d idletime %d idlecount %d sleeping %d\n",
  1759. bus->clkstate, bus->activity, bus->idletime, bus->idlecount,
  1760. bus->sleeping);
  1761. }
  1762. void brcmf_bus_clearcounts(struct brcmf_pub *drvr)
  1763. {
  1764. struct brcmf_bus *bus = (struct brcmf_bus *) drvr->bus;
  1765. bus->intrcount = bus->lastintrs = bus->spurious = bus->regfails = 0;
  1766. bus->rxrtx = bus->rx_toolong = bus->rxc_errors = 0;
  1767. bus->rx_hdrfail = bus->rx_badhdr = bus->rx_badseq = 0;
  1768. bus->tx_sderrs = bus->fc_rcvd = bus->fc_xoff = bus->fc_xon = 0;
  1769. bus->rxglomfail = bus->rxglomframes = bus->rxglompkts = 0;
  1770. bus->f2rxhdrs = bus->f2rxdata = bus->f2txdata = bus->f1regdata = 0;
  1771. }
  1772. #ifdef SDTEST
  1773. static int brcmf_sdbrcm_pktgen_get(struct brcmf_bus *bus, u8 *arg)
  1774. {
  1775. struct brcmf_pktgen pktgen;
  1776. pktgen.version = BRCMF_PKTGEN_VERSION;
  1777. pktgen.freq = bus->pktgen_freq;
  1778. pktgen.count = bus->pktgen_count;
  1779. pktgen.print = bus->pktgen_print;
  1780. pktgen.total = bus->pktgen_total;
  1781. pktgen.minlen = bus->pktgen_minlen;
  1782. pktgen.maxlen = bus->pktgen_maxlen;
  1783. pktgen.numsent = bus->pktgen_sent;
  1784. pktgen.numrcvd = bus->pktgen_rcvd;
  1785. pktgen.numfail = bus->pktgen_fail;
  1786. pktgen.mode = bus->pktgen_mode;
  1787. pktgen.stop = bus->pktgen_stop;
  1788. memcpy(arg, &pktgen, sizeof(pktgen));
  1789. return 0;
  1790. }
  1791. static int brcmf_sdbrcm_pktgen_set(struct brcmf_bus *bus, u8 *arg)
  1792. {
  1793. struct brcmf_pktgen pktgen;
  1794. uint oldcnt, oldmode;
  1795. memcpy(&pktgen, arg, sizeof(pktgen));
  1796. if (pktgen.version != BRCMF_PKTGEN_VERSION)
  1797. return -EINVAL;
  1798. oldcnt = bus->pktgen_count;
  1799. oldmode = bus->pktgen_mode;
  1800. bus->pktgen_freq = pktgen.freq;
  1801. bus->pktgen_count = pktgen.count;
  1802. bus->pktgen_print = pktgen.print;
  1803. bus->pktgen_total = pktgen.total;
  1804. bus->pktgen_minlen = pktgen.minlen;
  1805. bus->pktgen_maxlen = pktgen.maxlen;
  1806. bus->pktgen_mode = pktgen.mode;
  1807. bus->pktgen_stop = pktgen.stop;
  1808. bus->pktgen_tick = bus->pktgen_ptick = 0;
  1809. bus->pktgen_len = max(bus->pktgen_len, bus->pktgen_minlen);
  1810. bus->pktgen_len = min(bus->pktgen_len, bus->pktgen_maxlen);
  1811. /* Clear counts for a new pktgen (mode change, or was stopped) */
  1812. if (bus->pktgen_count && (!oldcnt || oldmode != bus->pktgen_mode))
  1813. bus->pktgen_sent = bus->pktgen_rcvd = bus->pktgen_fail = 0;
  1814. return 0;
  1815. }
  1816. #endif /* SDTEST */
  1817. static int
  1818. brcmf_sdbrcm_membytes(struct brcmf_bus *bus, bool write, u32 address, u8 *data,
  1819. uint size)
  1820. {
  1821. int bcmerror = 0;
  1822. u32 sdaddr;
  1823. uint dsize;
  1824. /* Determine initial transfer parameters */
  1825. sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK;
  1826. if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK)
  1827. dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr);
  1828. else
  1829. dsize = size;
  1830. /* Set the backplane window to include the start address */
  1831. bcmerror = brcmf_sdbrcm_set_siaddr_window(bus, address);
  1832. if (bcmerror) {
  1833. BRCMF_ERROR(("%s: window change failed\n", __func__));
  1834. goto xfer_done;
  1835. }
  1836. /* Do the transfer(s) */
  1837. while (size) {
  1838. BRCMF_INFO(("%s: %s %d bytes at offset 0x%08x in window"
  1839. " 0x%08x\n", __func__, (write ? "write" : "read"),
  1840. dsize, sdaddr, (address & SBSDIO_SBWINDOW_MASK)));
  1841. bcmerror =
  1842. brcmf_sdcard_rwdata(bus->card, write, sdaddr, data, dsize);
  1843. if (bcmerror) {
  1844. BRCMF_ERROR(("%s: membytes transfer failed\n",
  1845. __func__));
  1846. break;
  1847. }
  1848. /* Adjust for next transfer (if any) */
  1849. size -= dsize;
  1850. if (size) {
  1851. data += dsize;
  1852. address += dsize;
  1853. bcmerror = brcmf_sdbrcm_set_siaddr_window(bus, address);
  1854. if (bcmerror) {
  1855. BRCMF_ERROR(("%s: window change failed\n",
  1856. __func__));
  1857. break;
  1858. }
  1859. sdaddr = 0;
  1860. dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size);
  1861. }
  1862. }
  1863. xfer_done:
  1864. /* Return the window to backplane enumeration space for core access */
  1865. if (brcmf_sdbrcm_set_siaddr_window(bus,
  1866. brcmf_sdcard_cur_sbwad(bus->card))) {
  1867. BRCMF_ERROR(("%s: FAILED to set window back to 0x%x\n",
  1868. __func__, brcmf_sdcard_cur_sbwad(bus->card)));
  1869. }
  1870. return bcmerror;
  1871. }
  1872. #ifdef BCMDBG
  1873. static int brcmf_sdbrcm_readshared(struct brcmf_bus *bus, struct sdpcm_shared *sh)
  1874. {
  1875. u32 addr;
  1876. int rv;
  1877. /* Read last word in memory to determine address of
  1878. sdpcm_shared structure */
  1879. rv = brcmf_sdbrcm_membytes(bus, false, bus->ramsize - 4, (u8 *)&addr,
  1880. 4);
  1881. if (rv < 0)
  1882. return rv;
  1883. addr = le32_to_cpu(addr);
  1884. BRCMF_INFO(("sdpcm_shared address 0x%08X\n", addr));
  1885. /*
  1886. * Check if addr is valid.
  1887. * NVRAM length at the end of memory should have been overwritten.
  1888. */
  1889. if (addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff)) {
  1890. BRCMF_ERROR(("%s: address (0x%08x) of sdpcm_shared invalid\n",
  1891. __func__, addr));
  1892. return -EBADE;
  1893. }
  1894. /* Read rte_shared structure */
  1895. rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *) sh,
  1896. sizeof(struct sdpcm_shared));
  1897. if (rv < 0)
  1898. return rv;
  1899. /* Endianness */
  1900. sh->flags = le32_to_cpu(sh->flags);
  1901. sh->trap_addr = le32_to_cpu(sh->trap_addr);
  1902. sh->assert_exp_addr = le32_to_cpu(sh->assert_exp_addr);
  1903. sh->assert_file_addr = le32_to_cpu(sh->assert_file_addr);
  1904. sh->assert_line = le32_to_cpu(sh->assert_line);
  1905. sh->console_addr = le32_to_cpu(sh->console_addr);
  1906. sh->msgtrace_addr = le32_to_cpu(sh->msgtrace_addr);
  1907. if ((sh->flags & SDPCM_SHARED_VERSION_MASK) != SDPCM_SHARED_VERSION) {
  1908. BRCMF_ERROR(("%s: sdpcm_shared version %d in brcmf "
  1909. "is different than sdpcm_shared version %d in dongle\n",
  1910. __func__, SDPCM_SHARED_VERSION,
  1911. sh->flags & SDPCM_SHARED_VERSION_MASK));
  1912. return -EBADE;
  1913. }
  1914. return 0;
  1915. }
  1916. static int brcmf_sdbrcm_checkdied(struct brcmf_bus *bus, u8 *data, uint size)
  1917. {
  1918. int bcmerror = 0;
  1919. uint msize = 512;
  1920. char *mbuffer = NULL;
  1921. uint maxstrlen = 256;
  1922. char *str = NULL;
  1923. struct brcmf_trap tr;
  1924. struct sdpcm_shared sdpcm_shared;
  1925. struct brcmu_strbuf strbuf;
  1926. BRCMF_TRACE(("%s: Enter\n", __func__));
  1927. if (data == NULL) {
  1928. /*
  1929. * Called after a rx ctrl timeout. "data" is NULL.
  1930. * allocate memory to trace the trap or assert.
  1931. */
  1932. size = msize;
  1933. mbuffer = data = kmalloc(msize, GFP_ATOMIC);
  1934. if (mbuffer == NULL) {
  1935. BRCMF_ERROR(("%s: kmalloc(%d) failed\n", __func__,
  1936. msize));
  1937. bcmerror = -ENOMEM;
  1938. goto done;
  1939. }
  1940. }
  1941. str = kmalloc(maxstrlen, GFP_ATOMIC);
  1942. if (str == NULL) {
  1943. BRCMF_ERROR(("%s: kmalloc(%d) failed\n", __func__, maxstrlen));
  1944. bcmerror = -ENOMEM;
  1945. goto done;
  1946. }
  1947. bcmerror = brcmf_sdbrcm_readshared(bus, &sdpcm_shared);
  1948. if (bcmerror < 0)
  1949. goto done;
  1950. brcmu_binit(&strbuf, data, size);
  1951. brcmu_bprintf(&strbuf,
  1952. "msgtrace address : 0x%08X\nconsole address : 0x%08X\n",
  1953. sdpcm_shared.msgtrace_addr, sdpcm_shared.console_addr);
  1954. if ((sdpcm_shared.flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
  1955. /* NOTE: Misspelled assert is intentional - DO NOT FIX.
  1956. * (Avoids conflict with real asserts for programmatic
  1957. * parsing of output.)
  1958. */
  1959. brcmu_bprintf(&strbuf, "Assrt not built in dongle\n");
  1960. }
  1961. if ((sdpcm_shared.flags & (SDPCM_SHARED_ASSERT | SDPCM_SHARED_TRAP)) ==
  1962. 0) {
  1963. /* NOTE: Misspelled assert is intentional - DO NOT FIX.
  1964. * (Avoids conflict with real asserts for programmatic
  1965. * parsing of output.)
  1966. */
  1967. brcmu_bprintf(&strbuf, "No trap%s in dongle",
  1968. (sdpcm_shared.flags & SDPCM_SHARED_ASSERT_BUILT)
  1969. ? "/assrt" : "");
  1970. } else {
  1971. if (sdpcm_shared.flags & SDPCM_SHARED_ASSERT) {
  1972. /* Download assert */
  1973. brcmu_bprintf(&strbuf, "Dongle assert");
  1974. if (sdpcm_shared.assert_exp_addr != 0) {
  1975. str[0] = '\0';
  1976. bcmerror = brcmf_sdbrcm_membytes(bus, false,
  1977. sdpcm_shared.assert_exp_addr,
  1978. (u8 *) str, maxstrlen);
  1979. if (bcmerror < 0)
  1980. goto done;
  1981. str[maxstrlen - 1] = '\0';
  1982. brcmu_bprintf(&strbuf, " expr \"%s\"", str);
  1983. }
  1984. if (sdpcm_shared.assert_file_addr != 0) {
  1985. str[0] = '\0';
  1986. bcmerror = brcmf_sdbrcm_membytes(bus, false,
  1987. sdpcm_shared.assert_file_addr,
  1988. (u8 *) str, maxstrlen);
  1989. if (bcmerror < 0)
  1990. goto done;
  1991. str[maxstrlen - 1] = '\0';
  1992. brcmu_bprintf(&strbuf, " file \"%s\"", str);
  1993. }
  1994. brcmu_bprintf(&strbuf, " line %d ",
  1995. sdpcm_shared.assert_line);
  1996. }
  1997. if (sdpcm_shared.flags & SDPCM_SHARED_TRAP) {
  1998. bcmerror = brcmf_sdbrcm_membytes(bus, false,
  1999. sdpcm_shared.trap_addr, (u8 *)&tr,
  2000. sizeof(struct brcmf_trap));
  2001. if (bcmerror < 0)
  2002. goto done;
  2003. brcmu_bprintf(&strbuf,
  2004. "Dongle trap type 0x%x @ epc 0x%x, cpsr 0x%x, spsr 0x%x, sp 0x%x,"
  2005. "lp 0x%x, rpc 0x%x Trap offset 0x%x, "
  2006. "r0 0x%x, r1 0x%x, r2 0x%x, r3 0x%x, r4 0x%x, r5 0x%x, r6 0x%x, r7 0x%x\n",
  2007. tr.type, tr.epc, tr.cpsr, tr.spsr, tr.r13,
  2008. tr.r14, tr.pc, sdpcm_shared.trap_addr,
  2009. tr.r0, tr.r1, tr.r2, tr.r3, tr.r4, tr.r5,
  2010. tr.r6, tr.r7);
  2011. }
  2012. }
  2013. if (sdpcm_shared.flags & (SDPCM_SHARED_ASSERT | SDPCM_SHARED_TRAP))
  2014. BRCMF_ERROR(("%s: %s\n", __func__, strbuf.origbuf));
  2015. #ifdef BCMDBG
  2016. if (sdpcm_shared.flags & SDPCM_SHARED_TRAP) {
  2017. /* Mem dump to a file on device */
  2018. brcmf_sdbrcm_mem_dump(bus);
  2019. }
  2020. #endif /* BCMDBG */
  2021. done:
  2022. kfree(mbuffer);
  2023. kfree(str);
  2024. return bcmerror;
  2025. }
  2026. static int brcmf_sdbrcm_mem_dump(struct brcmf_bus *bus)
  2027. {
  2028. int ret = 0;
  2029. int size; /* Full mem size */
  2030. int start = 0; /* Start address */
  2031. int read_size = 0; /* Read size of each iteration */
  2032. u8 *buf = NULL, *databuf = NULL;
  2033. /* Get full mem size */
  2034. size = bus->ramsize;
  2035. buf = kmalloc(size, GFP_ATOMIC);
  2036. if (!buf) {
  2037. BRCMF_ERROR(("%s: Out of memory (%d bytes)\n", __func__, size));
  2038. return -1;
  2039. }
  2040. /* Read mem content */
  2041. printk(KERN_DEBUG "Dump dongle memory");
  2042. databuf = buf;
  2043. while (size) {
  2044. read_size = min(MEMBLOCK, size);
  2045. ret = brcmf_sdbrcm_membytes(bus, false, start, databuf,
  2046. read_size);
  2047. if (ret) {
  2048. BRCMF_ERROR(("%s: Error membytes %d\n", __func__, ret));
  2049. kfree(buf);
  2050. return -1;
  2051. }
  2052. printk(".");
  2053. /* Decrement size and increment start address */
  2054. size -= read_size;
  2055. start += read_size;
  2056. databuf += read_size;
  2057. }
  2058. printk(KERN_DEBUG "Done\n");
  2059. /* free buf before return !!! */
  2060. if (brcmf_write_to_file(bus->drvr, buf, bus->ramsize)) {
  2061. BRCMF_ERROR(("%s: Error writing to files\n", __func__));
  2062. return -1;
  2063. }
  2064. /* buf free handled in brcmf_write_to_file, not here */
  2065. return 0;
  2066. }
  2067. #define CONSOLE_LINE_MAX 192
  2068. static int brcmf_sdbrcm_readconsole(struct brcmf_bus *bus)
  2069. {
  2070. struct brcmf_console *c = &bus->console;
  2071. u8 line[CONSOLE_LINE_MAX], ch;
  2072. u32 n, idx, addr;
  2073. int rv;
  2074. /* Don't do anything until FWREADY updates console address */
  2075. if (bus->console_addr == 0)
  2076. return 0;
  2077. /* Read console log struct */
  2078. addr = bus->console_addr + offsetof(struct rte_console, log);
  2079. rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log,
  2080. sizeof(c->log));
  2081. if (rv < 0)
  2082. return rv;
  2083. /* Allocate console buffer (one time only) */
  2084. if (c->buf == NULL) {
  2085. c->bufsize = le32_to_cpu(c->log.buf_size);
  2086. c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
  2087. if (c->buf == NULL)
  2088. return -ENOMEM;
  2089. }
  2090. idx = le32_to_cpu(c->log.idx);
  2091. /* Protect against corrupt value */
  2092. if (idx > c->bufsize)
  2093. return -EBADE;
  2094. /* Skip reading the console buffer if the index pointer
  2095. has not moved */
  2096. if (idx == c->last)
  2097. return 0;
  2098. /* Read the console buffer */
  2099. addr = le32_to_cpu(c->log.buf);
  2100. rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize);
  2101. if (rv < 0)
  2102. return rv;
  2103. while (c->last != idx) {
  2104. for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
  2105. if (c->last == idx) {
  2106. /* This would output a partial line.
  2107. * Instead, back up
  2108. * the buffer pointer and output this
  2109. * line next time around.
  2110. */
  2111. if (c->last >= n)
  2112. c->last -= n;
  2113. else
  2114. c->last = c->bufsize - n;
  2115. goto break2;
  2116. }
  2117. ch = c->buf[c->last];
  2118. c->last = (c->last + 1) % c->bufsize;
  2119. if (ch == '\n')
  2120. break;
  2121. line[n] = ch;
  2122. }
  2123. if (n > 0) {
  2124. if (line[n - 1] == '\r')
  2125. n--;
  2126. line[n] = 0;
  2127. printk(KERN_DEBUG "CONSOLE: %s\n", line);
  2128. }
  2129. }
  2130. break2:
  2131. return 0;
  2132. }
  2133. #endif /* BCMDBG */
  2134. int brcmf_sdbrcm_downloadvars(struct brcmf_bus *bus, void *arg, int len)
  2135. {
  2136. int bcmerror = 0;
  2137. BRCMF_TRACE(("%s: Enter\n", __func__));
  2138. /* Basic sanity checks */
  2139. if (bus->drvr->up) {
  2140. bcmerror = -EISCONN;
  2141. goto err;
  2142. }
  2143. if (!len) {
  2144. bcmerror = -EOVERFLOW;
  2145. goto err;
  2146. }
  2147. /* Free the old ones and replace with passed variables */
  2148. kfree(bus->vars);
  2149. bus->vars = kmalloc(len, GFP_ATOMIC);
  2150. bus->varsz = bus->vars ? len : 0;
  2151. if (bus->vars == NULL) {
  2152. bcmerror = -ENOMEM;
  2153. goto err;
  2154. }
  2155. /* Copy the passed variables, which should include the
  2156. terminating double-null */
  2157. memcpy(bus->vars, arg, bus->varsz);
  2158. err:
  2159. return bcmerror;
  2160. }
  2161. static int
  2162. brcmf_sdbrcm_doiovar(struct brcmf_bus *bus, const struct brcmu_iovar *vi, u32 actionid,
  2163. const char *name, void *params, int plen, void *arg, int len,
  2164. int val_size)
  2165. {
  2166. int bcmerror = 0;
  2167. s32 int_val = 0;
  2168. bool bool_val = 0;
  2169. BRCMF_TRACE(("%s: Enter, action %d name %s params %p plen %d arg %p "
  2170. "len %d val_size %d\n", __func__, actionid, name, params,
  2171. plen, arg, len, val_size));
  2172. bcmerror = brcmu_iovar_lencheck(vi, arg, len, IOV_ISSET(actionid));
  2173. if (bcmerror != 0)
  2174. goto exit;
  2175. if (plen >= (int)sizeof(int_val))
  2176. memcpy(&int_val, params, sizeof(int_val));
  2177. bool_val = (int_val != 0) ? true : false;
  2178. /* Some ioctls use the bus */
  2179. brcmf_sdbrcm_sdlock(bus);
  2180. /* Check if dongle is in reset. If so, only allow DEVRESET iovars */
  2181. if (bus->drvr->dongle_reset && !(actionid == IOV_SVAL(IOV_DEVRESET) ||
  2182. actionid == IOV_GVAL(IOV_DEVRESET))) {
  2183. bcmerror = -EPERM;
  2184. goto exit;
  2185. }
  2186. /* Handle sleep stuff before any clock mucking */
  2187. if (vi->varid == IOV_SLEEP) {
  2188. if (IOV_ISSET(actionid)) {
  2189. bcmerror = brcmf_sdbrcm_bussleep(bus, bool_val);
  2190. } else {
  2191. int_val = (s32) bus->sleeping;
  2192. memcpy(arg, &int_val, val_size);
  2193. }
  2194. goto exit;
  2195. }
  2196. /* Request clock to allow SDIO accesses */
  2197. if (!bus->drvr->dongle_reset) {
  2198. BUS_WAKE(bus);
  2199. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
  2200. }
  2201. switch (actionid) {
  2202. case IOV_GVAL(IOV_INTR):
  2203. int_val = (s32) bus->intr;
  2204. memcpy(arg, &int_val, val_size);
  2205. break;
  2206. case IOV_SVAL(IOV_INTR):
  2207. bus->intr = bool_val;
  2208. bus->intdis = false;
  2209. if (bus->drvr->up) {
  2210. BRCMF_INTR(("%s: %s SDIO interrupts\n", __func__,
  2211. bus->intr ? "enable" : "disable"));
  2212. if (bus->intr) {
  2213. brcmf_sdcard_intr_enable(bus->card);
  2214. } else {
  2215. brcmf_sdcard_intr_disable(bus->card);
  2216. }
  2217. }
  2218. break;
  2219. case IOV_GVAL(IOV_POLLRATE):
  2220. int_val = (s32) bus->pollrate;
  2221. memcpy(arg, &int_val, val_size);
  2222. break;
  2223. case IOV_SVAL(IOV_POLLRATE):
  2224. bus->pollrate = (uint) int_val;
  2225. bus->poll = (bus->pollrate != 0);
  2226. break;
  2227. case IOV_GVAL(IOV_IDLETIME):
  2228. int_val = bus->idletime;
  2229. memcpy(arg, &int_val, val_size);
  2230. break;
  2231. case IOV_SVAL(IOV_IDLETIME):
  2232. if ((int_val < 0) && (int_val != BRCMF_IDLE_IMMEDIATE))
  2233. bcmerror = -EINVAL;
  2234. else
  2235. bus->idletime = int_val;
  2236. break;
  2237. case IOV_GVAL(IOV_IDLECLOCK):
  2238. int_val = (s32) bus->idleclock;
  2239. memcpy(arg, &int_val, val_size);
  2240. break;
  2241. case IOV_SVAL(IOV_IDLECLOCK):
  2242. bus->idleclock = int_val;
  2243. break;
  2244. case IOV_GVAL(IOV_SD1IDLE):
  2245. int_val = (s32) sd1idle;
  2246. memcpy(arg, &int_val, val_size);
  2247. break;
  2248. case IOV_SVAL(IOV_SD1IDLE):
  2249. sd1idle = bool_val;
  2250. break;
  2251. case IOV_SVAL(IOV_MEMBYTES):
  2252. case IOV_GVAL(IOV_MEMBYTES):
  2253. {
  2254. u32 address;
  2255. uint size, dsize;
  2256. u8 *data;
  2257. bool set = (actionid == IOV_SVAL(IOV_MEMBYTES));
  2258. address = (u32) int_val;
  2259. memcpy(&int_val, (char *)params + sizeof(int_val),
  2260. sizeof(int_val));
  2261. size = (uint) int_val;
  2262. /* Do some validation */
  2263. dsize = set ? plen - (2 * sizeof(int)) : len;
  2264. if (dsize < size) {
  2265. BRCMF_ERROR(("%s: error on %s membytes, addr "
  2266. "0x%08x size %d dsize %d\n",
  2267. __func__, (set ? "set" : "get"),
  2268. address, size, dsize));
  2269. bcmerror = -EINVAL;
  2270. break;
  2271. }
  2272. BRCMF_INFO(("%s: Request to %s %d bytes at address "
  2273. "0x%08x\n", __func__,
  2274. (set ? "write" : "read"), size, address));
  2275. /* If we know about SOCRAM, check for a fit */
  2276. if ((bus->orig_ramsize) &&
  2277. ((address > bus->orig_ramsize)
  2278. || (address + size > bus->orig_ramsize))) {
  2279. BRCMF_ERROR(("%s: ramsize 0x%08x doesn't have"
  2280. " %d bytes at 0x%08x\n", __func__,
  2281. bus->orig_ramsize, size, address));
  2282. bcmerror = -EINVAL;
  2283. break;
  2284. }
  2285. /* Generate the actual data pointer */
  2286. data =
  2287. set ? (u8 *) params +
  2288. 2 * sizeof(int) : (u8 *) arg;
  2289. /* Call to do the transfer */
  2290. bcmerror = brcmf_sdbrcm_membytes(bus, set, address,
  2291. data, size);
  2292. break;
  2293. }
  2294. case IOV_GVAL(IOV_MEMSIZE):
  2295. int_val = (s32) bus->ramsize;
  2296. memcpy(arg, &int_val, val_size);
  2297. break;
  2298. case IOV_GVAL(IOV_SDIOD_DRIVE):
  2299. int_val = (s32) brcmf_sdiod_drive_strength;
  2300. memcpy(arg, &int_val, val_size);
  2301. break;
  2302. case IOV_SVAL(IOV_SDIOD_DRIVE):
  2303. brcmf_sdiod_drive_strength = int_val;
  2304. brcmf_sdbrcm_sdiod_drive_strength_init(bus,
  2305. brcmf_sdiod_drive_strength);
  2306. break;
  2307. case IOV_SVAL(IOV_DOWNLOAD):
  2308. bcmerror = brcmf_sdbrcm_download_state(bus, bool_val);
  2309. break;
  2310. case IOV_SVAL(IOV_VARS):
  2311. bcmerror = brcmf_sdbrcm_downloadvars(bus, arg, len);
  2312. break;
  2313. case IOV_GVAL(IOV_READAHEAD):
  2314. int_val = (s32) brcmf_readahead;
  2315. memcpy(arg, &int_val, val_size);
  2316. break;
  2317. case IOV_SVAL(IOV_READAHEAD):
  2318. if (bool_val && !brcmf_readahead)
  2319. bus->nextlen = 0;
  2320. brcmf_readahead = bool_val;
  2321. break;
  2322. case IOV_GVAL(IOV_SDRXCHAIN):
  2323. int_val = (s32) bus->use_rxchain;
  2324. memcpy(arg, &int_val, val_size);
  2325. break;
  2326. case IOV_SVAL(IOV_SDRXCHAIN):
  2327. if (bool_val && !bus->sd_rxchain)
  2328. bcmerror = -ENOTSUPP;
  2329. else
  2330. bus->use_rxchain = bool_val;
  2331. break;
  2332. case IOV_GVAL(IOV_ALIGNCTL):
  2333. int_val = (s32) brcmf_alignctl;
  2334. memcpy(arg, &int_val, val_size);
  2335. break;
  2336. case IOV_SVAL(IOV_ALIGNCTL):
  2337. brcmf_alignctl = bool_val;
  2338. break;
  2339. case IOV_GVAL(IOV_SDALIGN):
  2340. int_val = BRCMF_SDALIGN;
  2341. memcpy(arg, &int_val, val_size);
  2342. break;
  2343. #ifdef BCMDBG
  2344. case IOV_GVAL(IOV_VARS):
  2345. if (bus->varsz < (uint) len)
  2346. memcpy(arg, bus->vars, bus->varsz);
  2347. else
  2348. bcmerror = -EOVERFLOW;
  2349. break;
  2350. #endif /* BCMDBG */
  2351. #ifdef BCMDBG
  2352. case IOV_GVAL(IOV_DCONSOLE_POLL):
  2353. int_val = (s32) brcmf_console_ms;
  2354. memcpy(arg, &int_val, val_size);
  2355. break;
  2356. case IOV_SVAL(IOV_DCONSOLE_POLL):
  2357. brcmf_console_ms = (uint) int_val;
  2358. break;
  2359. case IOV_SVAL(IOV_CONS):
  2360. if (len > 0)
  2361. bcmerror = brcmf_sdbrcm_bus_console_in(bus->drvr,
  2362. arg, len - 1);
  2363. break;
  2364. case IOV_GVAL(IOV_SDREG):
  2365. {
  2366. struct brcmf_sdreg *sd_ptr;
  2367. u32 addr, size;
  2368. sd_ptr = (struct brcmf_sdreg *) params;
  2369. addr = bus->ci->buscorebase + sd_ptr->offset;
  2370. size = sd_ptr->func;
  2371. int_val = (s32) brcmf_sdcard_reg_read(bus->card, addr,
  2372. size);
  2373. if (brcmf_sdcard_regfail(bus->card))
  2374. bcmerror = -EIO;
  2375. memcpy(arg, &int_val, sizeof(s32));
  2376. break;
  2377. }
  2378. case IOV_SVAL(IOV_SDREG):
  2379. {
  2380. struct brcmf_sdreg *sd_ptr;
  2381. u32 addr, size;
  2382. sd_ptr = (struct brcmf_sdreg *) params;
  2383. addr = bus->ci->buscorebase + sd_ptr->offset;
  2384. size = sd_ptr->func;
  2385. brcmf_sdcard_reg_write(bus->card, addr, size,
  2386. sd_ptr->value);
  2387. if (brcmf_sdcard_regfail(bus->card))
  2388. bcmerror = -EIO;
  2389. break;
  2390. }
  2391. /* Same as above, but offset is not backplane
  2392. (not SDIO core) */
  2393. case IOV_GVAL(IOV_SBREG):
  2394. {
  2395. struct brcmf_sdreg sdreg;
  2396. u32 addr, size;
  2397. memcpy(&sdreg, params, sizeof(sdreg));
  2398. addr = SI_ENUM_BASE + sdreg.offset;
  2399. size = sdreg.func;
  2400. int_val = (s32) brcmf_sdcard_reg_read(bus->card, addr,
  2401. size);
  2402. if (brcmf_sdcard_regfail(bus->card))
  2403. bcmerror = -EIO;
  2404. memcpy(arg, &int_val, sizeof(s32));
  2405. break;
  2406. }
  2407. case IOV_SVAL(IOV_SBREG):
  2408. {
  2409. struct brcmf_sdreg sdreg;
  2410. u32 addr, size;
  2411. memcpy(&sdreg, params, sizeof(sdreg));
  2412. addr = SI_ENUM_BASE + sdreg.offset;
  2413. size = sdreg.func;
  2414. brcmf_sdcard_reg_write(bus->card, addr, size,
  2415. sdreg.value);
  2416. if (brcmf_sdcard_regfail(bus->card))
  2417. bcmerror = -EIO;
  2418. break;
  2419. }
  2420. case IOV_GVAL(IOV_SDCIS):
  2421. {
  2422. *(char *)arg = 0;
  2423. strcat(arg, "\nFunc 0\n");
  2424. brcmf_sdcard_cis_read(bus->card, 0x10,
  2425. (u8 *) arg + strlen(arg),
  2426. SBSDIO_CIS_SIZE_LIMIT);
  2427. strcat(arg, "\nFunc 1\n");
  2428. brcmf_sdcard_cis_read(bus->card, 0x11,
  2429. (u8 *) arg + strlen(arg),
  2430. SBSDIO_CIS_SIZE_LIMIT);
  2431. strcat(arg, "\nFunc 2\n");
  2432. brcmf_sdcard_cis_read(bus->card, 0x12,
  2433. (u8 *) arg + strlen(arg),
  2434. SBSDIO_CIS_SIZE_LIMIT);
  2435. break;
  2436. }
  2437. case IOV_GVAL(IOV_FORCEEVEN):
  2438. int_val = (s32) forcealign;
  2439. memcpy(arg, &int_val, val_size);
  2440. break;
  2441. case IOV_SVAL(IOV_FORCEEVEN):
  2442. forcealign = bool_val;
  2443. break;
  2444. case IOV_GVAL(IOV_TXBOUND):
  2445. int_val = (s32) brcmf_txbound;
  2446. memcpy(arg, &int_val, val_size);
  2447. break;
  2448. case IOV_SVAL(IOV_TXBOUND):
  2449. brcmf_txbound = (uint) int_val;
  2450. break;
  2451. case IOV_GVAL(IOV_RXBOUND):
  2452. int_val = (s32) brcmf_rxbound;
  2453. memcpy(arg, &int_val, val_size);
  2454. break;
  2455. case IOV_SVAL(IOV_RXBOUND):
  2456. brcmf_rxbound = (uint) int_val;
  2457. break;
  2458. case IOV_GVAL(IOV_TXMINMAX):
  2459. int_val = (s32) brcmf_txminmax;
  2460. memcpy(arg, &int_val, val_size);
  2461. break;
  2462. case IOV_SVAL(IOV_TXMINMAX):
  2463. brcmf_txminmax = (uint) int_val;
  2464. break;
  2465. #endif /* BCMDBG */
  2466. #ifdef SDTEST
  2467. case IOV_GVAL(IOV_EXTLOOP):
  2468. int_val = (s32) bus->ext_loop;
  2469. memcpy(arg, &int_val, val_size);
  2470. break;
  2471. case IOV_SVAL(IOV_EXTLOOP):
  2472. bus->ext_loop = bool_val;
  2473. break;
  2474. case IOV_GVAL(IOV_PKTGEN):
  2475. bcmerror = brcmf_sdbrcm_pktgen_get(bus, arg);
  2476. break;
  2477. case IOV_SVAL(IOV_PKTGEN):
  2478. bcmerror = brcmf_sdbrcm_pktgen_set(bus, arg);
  2479. break;
  2480. #endif /* SDTEST */
  2481. case IOV_SVAL(IOV_DEVRESET):
  2482. BRCMF_TRACE(("%s: Called set IOV_DEVRESET=%d dongle_reset=%d "
  2483. "busstate=%d\n",
  2484. __func__, bool_val, bus->drvr->dongle_reset,
  2485. bus->drvr->busstate));
  2486. brcmf_bus_devreset(bus->drvr, (u8) bool_val);
  2487. break;
  2488. case IOV_GVAL(IOV_DEVRESET):
  2489. BRCMF_TRACE(("%s: Called get IOV_DEVRESET\n", __func__));
  2490. /* Get its status */
  2491. int_val = (bool) bus->drvr->dongle_reset;
  2492. memcpy(arg, &int_val, val_size);
  2493. break;
  2494. case IOV_GVAL(IOV_WDTICK):
  2495. int_val = (s32) brcmf_watchdog_ms;
  2496. memcpy(arg, &int_val, val_size);
  2497. break;
  2498. case IOV_SVAL(IOV_WDTICK):
  2499. if (!bus->drvr->up) {
  2500. bcmerror = -ENOLINK;
  2501. break;
  2502. }
  2503. brcmf_sdbrcm_wd_timer(bus, (uint) int_val);
  2504. break;
  2505. default:
  2506. bcmerror = -ENOTSUPP;
  2507. break;
  2508. }
  2509. exit:
  2510. if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) {
  2511. bus->activity = false;
  2512. brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
  2513. }
  2514. brcmf_sdbrcm_sdunlock(bus);
  2515. if (actionid == IOV_SVAL(IOV_DEVRESET) && bool_val == false)
  2516. brcmf_c_preinit_ioctls(bus->drvr);
  2517. return bcmerror;
  2518. }
  2519. static int brcmf_sdbrcm_write_vars(struct brcmf_bus *bus)
  2520. {
  2521. int bcmerror = 0;
  2522. u32 varsize;
  2523. u32 varaddr;
  2524. u8 *vbuffer;
  2525. u32 varsizew;
  2526. #ifdef BCMDBG
  2527. char *nvram_ularray;
  2528. #endif /* BCMDBG */
  2529. /* Even if there are no vars are to be written, we still
  2530. need to set the ramsize. */
  2531. varsize = bus->varsz ? roundup(bus->varsz, 4) : 0;
  2532. varaddr = (bus->ramsize - 4) - varsize;
  2533. if (bus->vars) {
  2534. vbuffer = kzalloc(varsize, GFP_ATOMIC);
  2535. if (!vbuffer)
  2536. return -ENOMEM;
  2537. memcpy(vbuffer, bus->vars, bus->varsz);
  2538. /* Write the vars list */
  2539. bcmerror =
  2540. brcmf_sdbrcm_membytes(bus, true, varaddr, vbuffer, varsize);
  2541. #ifdef BCMDBG
  2542. /* Verify NVRAM bytes */
  2543. BRCMF_INFO(("Compare NVRAM dl & ul; varsize=%d\n", varsize));
  2544. nvram_ularray = kmalloc(varsize, GFP_ATOMIC);
  2545. if (!nvram_ularray)
  2546. return -ENOMEM;
  2547. /* Upload image to verify downloaded contents. */
  2548. memset(nvram_ularray, 0xaa, varsize);
  2549. /* Read the vars list to temp buffer for comparison */
  2550. bcmerror =
  2551. brcmf_sdbrcm_membytes(bus, false, varaddr, nvram_ularray,
  2552. varsize);
  2553. if (bcmerror) {
  2554. BRCMF_ERROR(("%s: error %d on reading %d nvram bytes"
  2555. " at 0x%08x\n", __func__, bcmerror,
  2556. varsize, varaddr));
  2557. }
  2558. /* Compare the org NVRAM with the one read from RAM */
  2559. if (memcmp(vbuffer, nvram_ularray, varsize)) {
  2560. BRCMF_ERROR(("%s: Downloaded NVRAM image is "
  2561. "corrupted.\n", __func__));
  2562. } else
  2563. BRCMF_ERROR(("%s: Download/Upload/Compare of"
  2564. " NVRAM ok.\n", __func__));
  2565. kfree(nvram_ularray);
  2566. #endif /* BCMDBG */
  2567. kfree(vbuffer);
  2568. }
  2569. /* adjust to the user specified RAM */
  2570. BRCMF_INFO(("Physical memory size: %d, usable memory size: %d\n",
  2571. bus->orig_ramsize, bus->ramsize));
  2572. BRCMF_INFO(("Vars are at %d, orig varsize is %d\n", varaddr, varsize));
  2573. varsize = ((bus->orig_ramsize - 4) - varaddr);
  2574. /*
  2575. * Determine the length token:
  2576. * Varsize, converted to words, in lower 16-bits, checksum
  2577. * in upper 16-bits.
  2578. */
  2579. if (bcmerror) {
  2580. varsizew = 0;
  2581. } else {
  2582. varsizew = varsize / 4;
  2583. varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF);
  2584. varsizew = cpu_to_le32(varsizew);
  2585. }
  2586. BRCMF_INFO(("New varsize is %d, length token=0x%08x\n", varsize,
  2587. varsizew));
  2588. /* Write the length token to the last word */
  2589. bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->orig_ramsize - 4),
  2590. (u8 *)&varsizew, 4);
  2591. return bcmerror;
  2592. }
  2593. static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter)
  2594. {
  2595. uint retries;
  2596. u32 regdata;
  2597. int bcmerror = 0;
  2598. /* To enter download state, disable ARM and reset SOCRAM.
  2599. * To exit download state, simply reset ARM (default is RAM boot).
  2600. */
  2601. if (enter) {
  2602. bus->alp_only = true;
  2603. brcmf_sdbrcm_chip_disablecore(bus->card, bus->ci->armcorebase);
  2604. brcmf_sdbrcm_chip_resetcore(bus->card, bus->ci->ramcorebase);
  2605. /* Clear the top bit of memory */
  2606. if (bus->ramsize) {
  2607. u32 zeros = 0;
  2608. brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4,
  2609. (u8 *)&zeros, 4);
  2610. }
  2611. } else {
  2612. regdata = brcmf_sdcard_reg_read(bus->card,
  2613. CORE_SB(bus->ci->ramcorebase, sbtmstatelow), 4);
  2614. regdata &= (SBTML_RESET | SBTML_REJ_MASK |
  2615. (SICF_CLOCK_EN << SBTML_SICF_SHIFT));
  2616. if ((SICF_CLOCK_EN << SBTML_SICF_SHIFT) != regdata) {
  2617. BRCMF_ERROR(("%s: SOCRAM core is down after reset?\n",
  2618. __func__));
  2619. bcmerror = -EBADE;
  2620. goto fail;
  2621. }
  2622. bcmerror = brcmf_sdbrcm_write_vars(bus);
  2623. if (bcmerror) {
  2624. BRCMF_ERROR(("%s: no vars written to RAM\n", __func__));
  2625. bcmerror = 0;
  2626. }
  2627. w_sdreg32(bus, 0xFFFFFFFF,
  2628. offsetof(struct sdpcmd_regs, intstatus), &retries);
  2629. brcmf_sdbrcm_chip_resetcore(bus->card, bus->ci->armcorebase);
  2630. /* Allow HT Clock now that the ARM is running. */
  2631. bus->alp_only = false;
  2632. bus->drvr->busstate = BRCMF_BUS_LOAD;
  2633. }
  2634. fail:
  2635. return bcmerror;
  2636. }
  2637. int
  2638. brcmf_sdbrcm_bus_iovar_op(struct brcmf_pub *drvr, const char *name,
  2639. void *params, int plen, void *arg, int len, bool set)
  2640. {
  2641. struct brcmf_bus *bus = drvr->bus;
  2642. const struct brcmu_iovar *vi = NULL;
  2643. int bcmerror = 0;
  2644. int val_size;
  2645. u32 actionid;
  2646. BRCMF_TRACE(("%s: Enter\n", __func__));
  2647. if (name == NULL || len <= 0)
  2648. return -EINVAL;
  2649. /* Set does not take qualifiers */
  2650. if (set && (params || plen))
  2651. return -EINVAL;
  2652. /* Get must have return space;*/
  2653. if (!set && !(arg && len))
  2654. return -EINVAL;
  2655. /* Look up var locally; if not found pass to host driver */
  2656. vi = brcmu_iovar_lookup(brcmf_sdio_iovars, name);
  2657. if (vi == NULL) {
  2658. brcmf_sdbrcm_sdlock(bus);
  2659. BUS_WAKE(bus);
  2660. /* Turn on clock in case SD command needs backplane */
  2661. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
  2662. bcmerror = brcmf_sdcard_iovar_op(bus->card, name, params, plen,
  2663. arg, len, set);
  2664. /* Similar check for blocksize change */
  2665. if (set && strcmp(name, "sd_blocksize") == 0) {
  2666. s32 fnum = 2;
  2667. if (brcmf_sdcard_iovar_op
  2668. (bus->card, "sd_blocksize", &fnum, sizeof(s32),
  2669. &bus->blocksize, sizeof(s32),
  2670. false) != 0) {
  2671. bus->blocksize = 0;
  2672. BRCMF_ERROR(("%s: fail on %s get\n", __func__,
  2673. "sd_blocksize"));
  2674. } else {
  2675. BRCMF_INFO(("%s: noted sd_blocksize update,"
  2676. " value now %d\n", __func__,
  2677. bus->blocksize));
  2678. }
  2679. }
  2680. bus->roundup = min(max_roundup, bus->blocksize);
  2681. if (bus->idletime == BRCMF_IDLE_IMMEDIATE &&
  2682. !bus->dpc_sched) {
  2683. bus->activity = false;
  2684. brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
  2685. }
  2686. brcmf_sdbrcm_sdunlock(bus);
  2687. goto exit;
  2688. }
  2689. BRCMF_CTL(("%s: %s %s, len %d plen %d\n", __func__,
  2690. name, (set ? "set" : "get"), len, plen));
  2691. /* set up 'params' pointer in case this is a set command so that
  2692. * the convenience int and bool code can be common to set and get
  2693. */
  2694. if (params == NULL) {
  2695. params = arg;
  2696. plen = len;
  2697. }
  2698. if (vi->type == IOVT_VOID)
  2699. val_size = 0;
  2700. else if (vi->type == IOVT_BUFFER)
  2701. val_size = len;
  2702. else
  2703. /* all other types are integer sized */
  2704. val_size = sizeof(int);
  2705. actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid);
  2706. bcmerror = brcmf_sdbrcm_doiovar(bus, vi, actionid, name, params, plen,
  2707. arg, len, val_size);
  2708. exit:
  2709. return bcmerror;
  2710. }
  2711. void brcmf_sdbrcm_bus_stop(struct brcmf_bus *bus, bool enforce_mutex)
  2712. {
  2713. u32 local_hostintmask;
  2714. u8 saveclk;
  2715. uint retries;
  2716. int err;
  2717. BRCMF_TRACE(("%s: Enter\n", __func__));
  2718. if (enforce_mutex)
  2719. brcmf_sdbrcm_sdlock(bus);
  2720. BUS_WAKE(bus);
  2721. /* Enable clock for device interrupts */
  2722. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
  2723. if (bus->watchdog_tsk) {
  2724. send_sig(SIGTERM, bus->watchdog_tsk, 1);
  2725. kthread_stop(bus->watchdog_tsk);
  2726. bus->watchdog_tsk = NULL;
  2727. }
  2728. if (bus->dpc_tsk) {
  2729. send_sig(SIGTERM, bus->dpc_tsk, 1);
  2730. kthread_stop(bus->dpc_tsk);
  2731. bus->dpc_tsk = NULL;
  2732. } else
  2733. tasklet_kill(&bus->tasklet);
  2734. /* Disable and clear interrupts at the chip level also */
  2735. w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask), &retries);
  2736. local_hostintmask = bus->hostintmask;
  2737. bus->hostintmask = 0;
  2738. /* Change our idea of bus state */
  2739. bus->drvr->busstate = BRCMF_BUS_DOWN;
  2740. /* Force clocks on backplane to be sure F2 interrupt propagates */
  2741. saveclk = brcmf_sdcard_cfg_read(bus->card, SDIO_FUNC_1,
  2742. SBSDIO_FUNC1_CHIPCLKCSR, &err);
  2743. if (!err) {
  2744. brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1,
  2745. SBSDIO_FUNC1_CHIPCLKCSR,
  2746. (saveclk | SBSDIO_FORCE_HT), &err);
  2747. }
  2748. if (err) {
  2749. BRCMF_ERROR(("%s: Failed to force clock for F2: err %d\n",
  2750. __func__, err));
  2751. }
  2752. /* Turn off the bus (F2), free any pending packets */
  2753. BRCMF_INTR(("%s: disable SDIO interrupts\n", __func__));
  2754. brcmf_sdcard_intr_disable(bus->card);
  2755. brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_0, SDIO_CCCR_IOEx,
  2756. SDIO_FUNC_ENABLE_1, NULL);
  2757. /* Clear any pending interrupts now that F2 is disabled */
  2758. w_sdreg32(bus, local_hostintmask,
  2759. offsetof(struct sdpcmd_regs, intstatus), &retries);
  2760. /* Turn off the backplane clock (only) */
  2761. brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
  2762. /* Clear the data packet queues */
  2763. brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
  2764. /* Clear any held glomming stuff */
  2765. if (bus->glomd)
  2766. brcmu_pkt_buf_free_skb(bus->glomd);
  2767. if (bus->glom)
  2768. brcmu_pkt_buf_free_skb(bus->glom);
  2769. bus->glom = bus->glomd = NULL;
  2770. /* Clear rx control and wake any waiters */
  2771. bus->rxlen = 0;
  2772. brcmf_os_ioctl_resp_wake(bus->drvr);
  2773. /* Reset some F2 state stuff */
  2774. bus->rxskip = false;
  2775. bus->tx_seq = bus->rx_seq = 0;
  2776. if (enforce_mutex)
  2777. brcmf_sdbrcm_sdunlock(bus);
  2778. }
  2779. int brcmf_sdbrcm_bus_init(struct brcmf_pub *drvr, bool enforce_mutex)
  2780. {
  2781. struct brcmf_bus *bus = drvr->bus;
  2782. struct brcmf_timeout tmo;
  2783. uint retries = 0;
  2784. u8 ready, enable;
  2785. int err, ret = 0;
  2786. u8 saveclk;
  2787. BRCMF_TRACE(("%s: Enter\n", __func__));
  2788. /* try to download image and nvram to the dongle */
  2789. if (drvr->busstate == BRCMF_BUS_DOWN) {
  2790. if (!(brcmf_sdbrcm_download_firmware(bus, bus->card)))
  2791. return -1;
  2792. }
  2793. if (!bus->drvr)
  2794. return 0;
  2795. /* Start the watchdog timer */
  2796. bus->drvr->tickcnt = 0;
  2797. brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
  2798. if (enforce_mutex)
  2799. brcmf_sdbrcm_sdlock(bus);
  2800. /* Make sure backplane clock is on, needed to generate F2 interrupt */
  2801. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
  2802. if (bus->clkstate != CLK_AVAIL)
  2803. goto exit;
  2804. /* Force clocks on backplane to be sure F2 interrupt propagates */
  2805. saveclk =
  2806. brcmf_sdcard_cfg_read(bus->card, SDIO_FUNC_1,
  2807. SBSDIO_FUNC1_CHIPCLKCSR, &err);
  2808. if (!err) {
  2809. brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1,
  2810. SBSDIO_FUNC1_CHIPCLKCSR,
  2811. (saveclk | SBSDIO_FORCE_HT), &err);
  2812. }
  2813. if (err) {
  2814. BRCMF_ERROR(("%s: Failed to force clock for F2: err %d\n",
  2815. __func__, err));
  2816. goto exit;
  2817. }
  2818. /* Enable function 2 (frame transfers) */
  2819. w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
  2820. offsetof(struct sdpcmd_regs, tosbmailboxdata), &retries);
  2821. enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
  2822. brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_0, SDIO_CCCR_IOEx, enable,
  2823. NULL);
  2824. /* Give the dongle some time to do its thing and set IOR2 */
  2825. brcmf_timeout_start(&tmo, BRCMF_WAIT_F2RDY * 1000);
  2826. ready = 0;
  2827. while (ready != enable && !brcmf_timeout_expired(&tmo))
  2828. ready = brcmf_sdcard_cfg_read(bus->card, SDIO_FUNC_0,
  2829. SDIO_CCCR_IORx, NULL);
  2830. BRCMF_INFO(("%s: enable 0x%02x, ready 0x%02x (waited %uus)\n",
  2831. __func__, enable, ready, tmo.elapsed));
  2832. /* If F2 successfully enabled, set core and enable interrupts */
  2833. if (ready == enable) {
  2834. /* Set up the interrupt mask and enable interrupts */
  2835. bus->hostintmask = HOSTINTMASK;
  2836. w_sdreg32(bus, bus->hostintmask,
  2837. offsetof(struct sdpcmd_regs, hostintmask), &retries);
  2838. brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1, SBSDIO_WATERMARK,
  2839. (u8) watermark, &err);
  2840. /* Set bus state according to enable result */
  2841. drvr->busstate = BRCMF_BUS_DATA;
  2842. bus->intdis = false;
  2843. if (bus->intr) {
  2844. BRCMF_INTR(("%s: enable SDIO device interrupts\n",
  2845. __func__));
  2846. brcmf_sdcard_intr_enable(bus->card);
  2847. } else {
  2848. BRCMF_INTR(("%s: disable SDIO interrupts\n", __func__));
  2849. brcmf_sdcard_intr_disable(bus->card);
  2850. }
  2851. }
  2852. else {
  2853. /* Disable F2 again */
  2854. enable = SDIO_FUNC_ENABLE_1;
  2855. brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_0, SDIO_CCCR_IOEx,
  2856. enable, NULL);
  2857. }
  2858. /* Restore previous clock setting */
  2859. brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
  2860. saveclk, &err);
  2861. #if defined(OOB_INTR_ONLY)
  2862. /* Host registration for OOB interrupt */
  2863. if (brcmf_sdio_register_oob_intr(bus->dhd)) {
  2864. brcmf_sdbrcm_wd_timer(bus, 0);
  2865. BRCMF_ERROR(("%s Host failed to resgister for OOB\n",
  2866. __func__));
  2867. ret = -ENODEV;
  2868. goto exit;
  2869. }
  2870. /* Enable oob at firmware */
  2871. brcmf_sdbrcm_enable_oob_intr(bus, true);
  2872. #endif /* defined(OOB_INTR_ONLY) */
  2873. /* If we didn't come up, turn off backplane clock */
  2874. if (drvr->busstate != BRCMF_BUS_DATA)
  2875. brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
  2876. exit:
  2877. if (enforce_mutex)
  2878. brcmf_sdbrcm_sdunlock(bus);
  2879. return ret;
  2880. }
  2881. static void brcmf_sdbrcm_rxfail(struct brcmf_bus *bus, bool abort, bool rtx)
  2882. {
  2883. struct brcmf_sdio_card *card = bus->card;
  2884. uint retries = 0;
  2885. u16 lastrbc;
  2886. u8 hi, lo;
  2887. int err;
  2888. BRCMF_ERROR(("%s: %sterminate frame%s\n", __func__,
  2889. (abort ? "abort command, " : ""),
  2890. (rtx ? ", send NAK" : "")));
  2891. if (abort)
  2892. brcmf_sdcard_abort(card, SDIO_FUNC_2);
  2893. brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, SBSDIO_FUNC1_FRAMECTRL,
  2894. SFC_RF_TERM, &err);
  2895. bus->f1regdata++;
  2896. /* Wait until the packet has been flushed (device/FIFO stable) */
  2897. for (lastrbc = retries = 0xffff; retries > 0; retries--) {
  2898. hi = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
  2899. SBSDIO_FUNC1_RFRAMEBCHI, NULL);
  2900. lo = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
  2901. SBSDIO_FUNC1_RFRAMEBCLO, NULL);
  2902. bus->f1regdata += 2;
  2903. if ((hi == 0) && (lo == 0))
  2904. break;
  2905. if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
  2906. BRCMF_ERROR(("%s: count growing: last 0x%04x now "
  2907. "0x%04x\n",
  2908. __func__, lastrbc, ((hi << 8) + lo)));
  2909. }
  2910. lastrbc = (hi << 8) + lo;
  2911. }
  2912. if (!retries) {
  2913. BRCMF_ERROR(("%s: count never zeroed: last 0x%04x\n",
  2914. __func__, lastrbc));
  2915. } else {
  2916. BRCMF_INFO(("%s: flush took %d iterations\n", __func__,
  2917. (0xffff - retries)));
  2918. }
  2919. if (rtx) {
  2920. bus->rxrtx++;
  2921. w_sdreg32(bus, SMB_NAK,
  2922. offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
  2923. bus->f1regdata++;
  2924. if (retries <= retry_limit)
  2925. bus->rxskip = true;
  2926. }
  2927. /* Clear partial in any case */
  2928. bus->nextlen = 0;
  2929. /* If we can't reach the device, signal failure */
  2930. if (err || brcmf_sdcard_regfail(card))
  2931. bus->drvr->busstate = BRCMF_BUS_DOWN;
  2932. }
  2933. static void
  2934. brcmf_sdbrcm_read_control(struct brcmf_bus *bus, u8 *hdr, uint len, uint doff)
  2935. {
  2936. struct brcmf_sdio_card *card = bus->card;
  2937. uint rdlen, pad;
  2938. int sdret;
  2939. BRCMF_TRACE(("%s: Enter\n", __func__));
  2940. /* Control data already received in aligned rxctl */
  2941. if ((bus->bus == SPI_BUS) && (!bus->usebufpool))
  2942. goto gotpkt;
  2943. /* Set rxctl for frame (w/optional alignment) */
  2944. bus->rxctl = bus->rxbuf;
  2945. if (brcmf_alignctl) {
  2946. bus->rxctl += firstread;
  2947. pad = ((unsigned long)bus->rxctl % BRCMF_SDALIGN);
  2948. if (pad)
  2949. bus->rxctl += (BRCMF_SDALIGN - pad);
  2950. bus->rxctl -= firstread;
  2951. }
  2952. /* Copy the already-read portion over */
  2953. memcpy(bus->rxctl, hdr, firstread);
  2954. if (len <= firstread)
  2955. goto gotpkt;
  2956. /* Copy the full data pkt in gSPI case and process ioctl. */
  2957. if (bus->bus == SPI_BUS) {
  2958. memcpy(bus->rxctl, hdr, len);
  2959. goto gotpkt;
  2960. }
  2961. /* Raise rdlen to next SDIO block to avoid tail command */
  2962. rdlen = len - firstread;
  2963. if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
  2964. pad = bus->blocksize - (rdlen % bus->blocksize);
  2965. if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
  2966. ((len + pad) < bus->drvr->maxctl))
  2967. rdlen += pad;
  2968. } else if (rdlen % BRCMF_SDALIGN) {
  2969. rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
  2970. }
  2971. /* Satisfy length-alignment requirements */
  2972. if (forcealign && (rdlen & (ALIGNMENT - 1)))
  2973. rdlen = roundup(rdlen, ALIGNMENT);
  2974. /* Drop if the read is too big or it exceeds our maximum */
  2975. if ((rdlen + firstread) > bus->drvr->maxctl) {
  2976. BRCMF_ERROR(("%s: %d-byte control read exceeds %d-byte"
  2977. " buffer\n", __func__, rdlen, bus->drvr->maxctl));
  2978. bus->drvr->rx_errors++;
  2979. brcmf_sdbrcm_rxfail(bus, false, false);
  2980. goto done;
  2981. }
  2982. if ((len - doff) > bus->drvr->maxctl) {
  2983. BRCMF_ERROR(("%s: %d-byte ctl frame (%d-byte ctl data) exceeds "
  2984. "%d-byte limit\n",
  2985. __func__, len, (len - doff), bus->drvr->maxctl));
  2986. bus->drvr->rx_errors++;
  2987. bus->rx_toolong++;
  2988. brcmf_sdbrcm_rxfail(bus, false, false);
  2989. goto done;
  2990. }
  2991. /* Read remainder of frame body into the rxctl buffer */
  2992. sdret = brcmf_sdcard_recv_buf(card, brcmf_sdcard_cur_sbwad(card),
  2993. SDIO_FUNC_2,
  2994. F2SYNC, (bus->rxctl + firstread), rdlen,
  2995. NULL, NULL, NULL);
  2996. bus->f2rxdata++;
  2997. /* Control frame failures need retransmission */
  2998. if (sdret < 0) {
  2999. BRCMF_ERROR(("%s: read %d control bytes failed: %d\n",
  3000. __func__, rdlen, sdret));
  3001. bus->rxc_errors++;
  3002. brcmf_sdbrcm_rxfail(bus, true, true);
  3003. goto done;
  3004. }
  3005. gotpkt:
  3006. #ifdef BCMDBG
  3007. if (BRCMF_BYTES_ON() && BRCMF_CTL_ON()) {
  3008. printk(KERN_DEBUG "RxCtrl:\n");
  3009. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, bus->rxctl, len);
  3010. }
  3011. #endif
  3012. /* Point to valid data and indicate its length */
  3013. bus->rxctl += doff;
  3014. bus->rxlen = len - doff;
  3015. done:
  3016. /* Awake any waiters */
  3017. brcmf_os_ioctl_resp_wake(bus->drvr);
  3018. }
  3019. static u8 brcmf_sdbrcm_rxglom(struct brcmf_bus *bus, u8 rxseq)
  3020. {
  3021. u16 dlen, totlen;
  3022. u8 *dptr, num = 0;
  3023. u16 sublen, check;
  3024. struct sk_buff *pfirst, *plast, *pnext, *save_pfirst;
  3025. int errcode;
  3026. u8 chan, seq, doff, sfdoff;
  3027. u8 txmax;
  3028. int ifidx = 0;
  3029. bool usechain = bus->use_rxchain;
  3030. /* If packets, issue read(s) and send up packet chain */
  3031. /* Return sequence numbers consumed? */
  3032. BRCMF_TRACE(("brcmf_sdbrcm_rxglom: start: glomd %p glom %p\n",
  3033. bus->glomd, bus->glom));
  3034. /* If there's a descriptor, generate the packet chain */
  3035. if (bus->glomd) {
  3036. pfirst = plast = pnext = NULL;
  3037. dlen = (u16) (bus->glomd->len);
  3038. dptr = bus->glomd->data;
  3039. if (!dlen || (dlen & 1)) {
  3040. BRCMF_ERROR(("%s: bad glomd len(%d),"
  3041. " ignore descriptor\n",
  3042. __func__, dlen));
  3043. dlen = 0;
  3044. }
  3045. for (totlen = num = 0; dlen; num++) {
  3046. /* Get (and move past) next length */
  3047. sublen = get_unaligned_le16(dptr);
  3048. dlen -= sizeof(u16);
  3049. dptr += sizeof(u16);
  3050. if ((sublen < SDPCM_HDRLEN) ||
  3051. ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
  3052. BRCMF_ERROR(("%s: descriptor len %d bad: %d\n",
  3053. __func__, num, sublen));
  3054. pnext = NULL;
  3055. break;
  3056. }
  3057. if (sublen % BRCMF_SDALIGN) {
  3058. BRCMF_ERROR(("%s: sublen %d not multiple of"
  3059. " %d\n", __func__, sublen,
  3060. BRCMF_SDALIGN));
  3061. usechain = false;
  3062. }
  3063. totlen += sublen;
  3064. /* For last frame, adjust read len so total
  3065. is a block multiple */
  3066. if (!dlen) {
  3067. sublen +=
  3068. (roundup(totlen, bus->blocksize) - totlen);
  3069. totlen = roundup(totlen, bus->blocksize);
  3070. }
  3071. /* Allocate/chain packet for next subframe */
  3072. pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
  3073. if (pnext == NULL) {
  3074. BRCMF_ERROR(("%s: bcm_pkt_buf_get_skb failed, "
  3075. "num %d len %d\n", __func__,
  3076. num, sublen));
  3077. break;
  3078. }
  3079. if (!pfirst) {
  3080. pfirst = plast = pnext;
  3081. } else {
  3082. plast->next = pnext;
  3083. plast = pnext;
  3084. }
  3085. /* Adhere to start alignment requirements */
  3086. PKTALIGN(pnext, sublen, BRCMF_SDALIGN);
  3087. }
  3088. /* If all allocations succeeded, save packet chain
  3089. in bus structure */
  3090. if (pnext) {
  3091. BRCMF_GLOM(("%s: allocated %d-byte packet chain for %d "
  3092. "subframes\n", __func__, totlen, num));
  3093. if (BRCMF_GLOM_ON() && bus->nextlen) {
  3094. if (totlen != bus->nextlen) {
  3095. BRCMF_GLOM(("%s: glomdesc mismatch: "
  3096. "nextlen %d glomdesc %d "
  3097. "rxseq %d\n", __func__,
  3098. bus->nextlen,
  3099. totlen, rxseq));
  3100. }
  3101. }
  3102. bus->glom = pfirst;
  3103. pfirst = pnext = NULL;
  3104. } else {
  3105. if (pfirst)
  3106. brcmu_pkt_buf_free_skb(pfirst);
  3107. bus->glom = NULL;
  3108. num = 0;
  3109. }
  3110. /* Done with descriptor packet */
  3111. brcmu_pkt_buf_free_skb(bus->glomd);
  3112. bus->glomd = NULL;
  3113. bus->nextlen = 0;
  3114. }
  3115. /* Ok -- either we just generated a packet chain,
  3116. or had one from before */
  3117. if (bus->glom) {
  3118. if (BRCMF_GLOM_ON()) {
  3119. BRCMF_GLOM(("%s: try superframe read, packet chain:\n",
  3120. __func__));
  3121. for (pnext = bus->glom; pnext; pnext = pnext->next) {
  3122. BRCMF_GLOM((" %p: %p len 0x%04x (%d)\n",
  3123. pnext, (u8 *) (pnext->data),
  3124. pnext->len, pnext->len));
  3125. }
  3126. }
  3127. pfirst = bus->glom;
  3128. dlen = (u16) brcmu_pkttotlen(pfirst);
  3129. /* Do an SDIO read for the superframe. Configurable iovar to
  3130. * read directly into the chained packet, or allocate a large
  3131. * packet and and copy into the chain.
  3132. */
  3133. if (usechain) {
  3134. errcode = brcmf_sdcard_recv_buf(bus->card,
  3135. brcmf_sdcard_cur_sbwad(bus->card),
  3136. SDIO_FUNC_2,
  3137. F2SYNC, (u8 *) pfirst->data, dlen,
  3138. pfirst, NULL, NULL);
  3139. } else if (bus->dataptr) {
  3140. errcode = brcmf_sdcard_recv_buf(bus->card,
  3141. brcmf_sdcard_cur_sbwad(bus->card),
  3142. SDIO_FUNC_2,
  3143. F2SYNC, bus->dataptr, dlen,
  3144. NULL, NULL, NULL);
  3145. sublen = (u16) brcmu_pktfrombuf(pfirst, 0, dlen,
  3146. bus->dataptr);
  3147. if (sublen != dlen) {
  3148. BRCMF_ERROR(("%s: FAILED TO COPY, dlen %d "
  3149. "sublen %d\n",
  3150. __func__, dlen, sublen));
  3151. errcode = -1;
  3152. }
  3153. pnext = NULL;
  3154. } else {
  3155. BRCMF_ERROR(("COULDN'T ALLOC %d-BYTE GLOM, "
  3156. "FORCE FAILURE\n", dlen));
  3157. errcode = -1;
  3158. }
  3159. bus->f2rxdata++;
  3160. /* On failure, kill the superframe, allow a couple retries */
  3161. if (errcode < 0) {
  3162. BRCMF_ERROR(("%s: glom read of %d bytes failed: %d\n",
  3163. __func__, dlen, errcode));
  3164. bus->drvr->rx_errors++;
  3165. if (bus->glomerr++ < 3) {
  3166. brcmf_sdbrcm_rxfail(bus, true, true);
  3167. } else {
  3168. bus->glomerr = 0;
  3169. brcmf_sdbrcm_rxfail(bus, true, false);
  3170. brcmu_pkt_buf_free_skb(bus->glom);
  3171. bus->rxglomfail++;
  3172. bus->glom = NULL;
  3173. }
  3174. return 0;
  3175. }
  3176. #ifdef BCMDBG
  3177. if (BRCMF_GLOM_ON()) {
  3178. printk(KERN_DEBUG "SUPERFRAME:\n");
  3179. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  3180. pfirst->data, min_t(int, pfirst->len, 48));
  3181. }
  3182. #endif
  3183. /* Validate the superframe header */
  3184. dptr = (u8 *) (pfirst->data);
  3185. sublen = get_unaligned_le16(dptr);
  3186. check = get_unaligned_le16(dptr + sizeof(u16));
  3187. chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
  3188. seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
  3189. bus->nextlen = dptr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
  3190. if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
  3191. BRCMF_INFO(("%s: nextlen too large (%d) seq %d\n",
  3192. __func__, bus->nextlen, seq));
  3193. bus->nextlen = 0;
  3194. }
  3195. doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
  3196. txmax = SDPCM_WINDOW_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
  3197. errcode = 0;
  3198. if ((u16)~(sublen ^ check)) {
  3199. BRCMF_ERROR(("%s (superframe): HW hdr error: len/check "
  3200. "0x%04x/0x%04x\n", __func__, sublen,
  3201. check));
  3202. errcode = -1;
  3203. } else if (roundup(sublen, bus->blocksize) != dlen) {
  3204. BRCMF_ERROR(("%s (superframe): len 0x%04x, rounded "
  3205. "0x%04x, expect 0x%04x\n",
  3206. __func__, sublen,
  3207. roundup(sublen, bus->blocksize), dlen));
  3208. errcode = -1;
  3209. } else if (SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]) !=
  3210. SDPCM_GLOM_CHANNEL) {
  3211. BRCMF_ERROR(("%s (superframe): bad channel %d\n",
  3212. __func__,
  3213. SDPCM_PACKET_CHANNEL(&dptr
  3214. [SDPCM_FRAMETAG_LEN])));
  3215. errcode = -1;
  3216. } else if (SDPCM_GLOMDESC(&dptr[SDPCM_FRAMETAG_LEN])) {
  3217. BRCMF_ERROR(("%s (superframe): got 2nd descriptor?\n",
  3218. __func__));
  3219. errcode = -1;
  3220. } else if ((doff < SDPCM_HDRLEN) ||
  3221. (doff > (pfirst->len - SDPCM_HDRLEN))) {
  3222. BRCMF_ERROR(("%s (superframe): Bad data offset %d: "
  3223. "HW %d pkt %d min %d\n",
  3224. __func__, doff, sublen,
  3225. pfirst->len, SDPCM_HDRLEN));
  3226. errcode = -1;
  3227. }
  3228. /* Check sequence number of superframe SW header */
  3229. if (rxseq != seq) {
  3230. BRCMF_INFO(("%s: (superframe) rx_seq %d, expected %d\n",
  3231. __func__, seq, rxseq));
  3232. bus->rx_badseq++;
  3233. rxseq = seq;
  3234. }
  3235. /* Check window for sanity */
  3236. if ((u8) (txmax - bus->tx_seq) > 0x40) {
  3237. BRCMF_ERROR(("%s: unlikely tx max %d with tx_seq %d\n",
  3238. __func__, txmax, bus->tx_seq));
  3239. txmax = bus->tx_seq + 2;
  3240. }
  3241. bus->tx_max = txmax;
  3242. /* Remove superframe header, remember offset */
  3243. skb_pull(pfirst, doff);
  3244. sfdoff = doff;
  3245. /* Validate all the subframe headers */
  3246. for (num = 0, pnext = pfirst; pnext && !errcode;
  3247. num++, pnext = pnext->next) {
  3248. dptr = (u8 *) (pnext->data);
  3249. dlen = (u16) (pnext->len);
  3250. sublen = get_unaligned_le16(dptr);
  3251. check = get_unaligned_le16(dptr + sizeof(u16));
  3252. chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
  3253. doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
  3254. #ifdef BCMDBG
  3255. if (BRCMF_GLOM_ON()) {
  3256. printk(KERN_DEBUG "subframe:\n");
  3257. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  3258. dptr, 32);
  3259. }
  3260. #endif
  3261. if ((u16)~(sublen ^ check)) {
  3262. BRCMF_ERROR(("%s (subframe %d): HW hdr error: "
  3263. "len/check 0x%04x/0x%04x\n",
  3264. __func__, num, sublen, check));
  3265. errcode = -1;
  3266. } else if ((sublen > dlen) || (sublen < SDPCM_HDRLEN)) {
  3267. BRCMF_ERROR(("%s (subframe %d): length mismatch"
  3268. ": len 0x%04x, expect 0x%04x\n",
  3269. __func__, num, sublen, dlen));
  3270. errcode = -1;
  3271. } else if ((chan != SDPCM_DATA_CHANNEL) &&
  3272. (chan != SDPCM_EVENT_CHANNEL)) {
  3273. BRCMF_ERROR(("%s (subframe %d): bad channel"
  3274. " %d\n", __func__, num, chan));
  3275. errcode = -1;
  3276. } else if ((doff < SDPCM_HDRLEN) || (doff > sublen)) {
  3277. BRCMF_ERROR(("%s (subframe %d): Bad data offset"
  3278. " %d: HW %d min %d\n",
  3279. __func__, num, doff, sublen,
  3280. SDPCM_HDRLEN));
  3281. errcode = -1;
  3282. }
  3283. }
  3284. if (errcode) {
  3285. /* Terminate frame on error, request
  3286. a couple retries */
  3287. if (bus->glomerr++ < 3) {
  3288. /* Restore superframe header space */
  3289. skb_push(pfirst, sfdoff);
  3290. brcmf_sdbrcm_rxfail(bus, true, true);
  3291. } else {
  3292. bus->glomerr = 0;
  3293. brcmf_sdbrcm_rxfail(bus, true, false);
  3294. brcmu_pkt_buf_free_skb(bus->glom);
  3295. bus->rxglomfail++;
  3296. bus->glom = NULL;
  3297. }
  3298. bus->nextlen = 0;
  3299. return 0;
  3300. }
  3301. /* Basic SD framing looks ok - process each packet (header) */
  3302. save_pfirst = pfirst;
  3303. bus->glom = NULL;
  3304. plast = NULL;
  3305. for (num = 0; pfirst; rxseq++, pfirst = pnext) {
  3306. pnext = pfirst->next;
  3307. pfirst->next = NULL;
  3308. dptr = (u8 *) (pfirst->data);
  3309. sublen = get_unaligned_le16(dptr);
  3310. chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
  3311. seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
  3312. doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
  3313. BRCMF_GLOM(("%s: Get subframe %d, %p(%p/%d), sublen %d "
  3314. "chan %d seq %d\n",
  3315. __func__, num, pfirst, pfirst->data,
  3316. pfirst->len, sublen, chan, seq));
  3317. /* precondition: chan == SDPCM_DATA_CHANNEL ||
  3318. chan == SDPCM_EVENT_CHANNEL */
  3319. if (rxseq != seq) {
  3320. BRCMF_GLOM(("%s: rx_seq %d, expected %d\n",
  3321. __func__, seq, rxseq));
  3322. bus->rx_badseq++;
  3323. rxseq = seq;
  3324. }
  3325. #ifdef BCMDBG
  3326. if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
  3327. printk(KERN_DEBUG "Rx Subframe Data:\n");
  3328. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  3329. dptr, dlen);
  3330. }
  3331. #endif
  3332. __skb_trim(pfirst, sublen);
  3333. skb_pull(pfirst, doff);
  3334. if (pfirst->len == 0) {
  3335. brcmu_pkt_buf_free_skb(pfirst);
  3336. if (plast) {
  3337. plast->next = pnext;
  3338. } else {
  3339. save_pfirst = pnext;
  3340. }
  3341. continue;
  3342. } else if (brcmf_proto_hdrpull(bus->drvr, &ifidx, pfirst)
  3343. != 0) {
  3344. BRCMF_ERROR(("%s: rx protocol error\n",
  3345. __func__));
  3346. bus->drvr->rx_errors++;
  3347. brcmu_pkt_buf_free_skb(pfirst);
  3348. if (plast) {
  3349. plast->next = pnext;
  3350. } else {
  3351. save_pfirst = pnext;
  3352. }
  3353. continue;
  3354. }
  3355. /* this packet will go up, link back into
  3356. chain and count it */
  3357. pfirst->next = pnext;
  3358. plast = pfirst;
  3359. num++;
  3360. #ifdef BCMDBG
  3361. if (BRCMF_GLOM_ON()) {
  3362. BRCMF_GLOM(("%s subframe %d to stack, %p"
  3363. "(%p/%d) nxt/lnk %p/%p\n",
  3364. __func__, num, pfirst, pfirst->data,
  3365. pfirst->len, pfirst->next,
  3366. pfirst->prev));
  3367. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  3368. pfirst->data,
  3369. min_t(int, pfirst->len, 32));
  3370. }
  3371. #endif /* BCMDBG */
  3372. }
  3373. if (num) {
  3374. brcmf_sdbrcm_sdunlock(bus);
  3375. brcmf_rx_frame(bus->drvr, ifidx, save_pfirst, num);
  3376. brcmf_sdbrcm_sdlock(bus);
  3377. }
  3378. bus->rxglomframes++;
  3379. bus->rxglompkts += num;
  3380. }
  3381. return num;
  3382. }
  3383. /* Return true if there may be more frames to read */
  3384. static uint
  3385. brcmf_sdbrcm_readframes(struct brcmf_bus *bus, uint maxframes, bool *finished)
  3386. {
  3387. struct brcmf_sdio_card *card = bus->card;
  3388. u16 len, check; /* Extracted hardware header fields */
  3389. u8 chan, seq, doff; /* Extracted software header fields */
  3390. u8 fcbits; /* Extracted fcbits from software header */
  3391. struct sk_buff *pkt; /* Packet for event or data frames */
  3392. u16 pad; /* Number of pad bytes to read */
  3393. u16 rdlen; /* Total number of bytes to read */
  3394. u8 rxseq; /* Next sequence number to expect */
  3395. uint rxleft = 0; /* Remaining number of frames allowed */
  3396. int sdret; /* Return code from calls */
  3397. u8 txmax; /* Maximum tx sequence offered */
  3398. bool len_consistent; /* Result of comparing readahead len and
  3399. len from hw-hdr */
  3400. u8 *rxbuf;
  3401. int ifidx = 0;
  3402. uint rxcount = 0; /* Total frames read */
  3403. #if defined(BCMDBG) || defined(SDTEST)
  3404. bool sdtest = false; /* To limit message spew from test mode */
  3405. #endif
  3406. BRCMF_TRACE(("%s: Enter\n", __func__));
  3407. #ifdef SDTEST
  3408. /* Allow pktgen to override maxframes */
  3409. if (bus->pktgen_count && (bus->pktgen_mode == BRCMF_PKTGEN_RECV)) {
  3410. maxframes = bus->pktgen_count;
  3411. sdtest = true;
  3412. }
  3413. #endif
  3414. /* Not finished unless we encounter no more frames indication */
  3415. *finished = false;
  3416. for (rxseq = bus->rx_seq, rxleft = maxframes;
  3417. !bus->rxskip && rxleft && bus->drvr->busstate != BRCMF_BUS_DOWN;
  3418. rxseq++, rxleft--) {
  3419. /* Handle glomming separately */
  3420. if (bus->glom || bus->glomd) {
  3421. u8 cnt;
  3422. BRCMF_GLOM(("%s: calling rxglom: glomd %p, glom %p\n",
  3423. __func__, bus->glomd, bus->glom));
  3424. cnt = brcmf_sdbrcm_rxglom(bus, rxseq);
  3425. BRCMF_GLOM(("%s: rxglom returned %d\n", __func__, cnt));
  3426. rxseq += cnt - 1;
  3427. rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
  3428. continue;
  3429. }
  3430. /* Try doing single read if we can */
  3431. if (brcmf_readahead && bus->nextlen) {
  3432. u16 nextlen = bus->nextlen;
  3433. bus->nextlen = 0;
  3434. if (bus->bus == SPI_BUS) {
  3435. rdlen = len = nextlen;
  3436. } else {
  3437. rdlen = len = nextlen << 4;
  3438. /* Pad read to blocksize for efficiency */
  3439. if (bus->roundup && bus->blocksize
  3440. && (rdlen > bus->blocksize)) {
  3441. pad =
  3442. bus->blocksize -
  3443. (rdlen % bus->blocksize);
  3444. if ((pad <= bus->roundup)
  3445. && (pad < bus->blocksize)
  3446. && ((rdlen + pad + firstread) <
  3447. MAX_RX_DATASZ))
  3448. rdlen += pad;
  3449. } else if (rdlen % BRCMF_SDALIGN) {
  3450. rdlen +=
  3451. BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
  3452. }
  3453. }
  3454. /* We use bus->rxctl buffer in WinXP for initial
  3455. * control pkt receives.
  3456. * Later we use buffer-poll for data as well
  3457. * as control packets.
  3458. * This is required because dhd receives full
  3459. * frame in gSPI unlike SDIO.
  3460. * After the frame is received we have to
  3461. * distinguish whether it is data
  3462. * or non-data frame.
  3463. */
  3464. /* Allocate a packet buffer */
  3465. pkt = brcmu_pkt_buf_get_skb(rdlen + BRCMF_SDALIGN);
  3466. if (!pkt) {
  3467. if (bus->bus == SPI_BUS) {
  3468. bus->usebufpool = false;
  3469. bus->rxctl = bus->rxbuf;
  3470. if (brcmf_alignctl) {
  3471. bus->rxctl += firstread;
  3472. pad = ((unsigned long)bus->rxctl %
  3473. BRCMF_SDALIGN);
  3474. if (pad)
  3475. bus->rxctl +=
  3476. (BRCMF_SDALIGN - pad);
  3477. bus->rxctl -= firstread;
  3478. }
  3479. rxbuf = bus->rxctl;
  3480. /* Read the entire frame */
  3481. sdret = brcmf_sdcard_recv_buf(card,
  3482. brcmf_sdcard_cur_sbwad(card),
  3483. SDIO_FUNC_2, F2SYNC,
  3484. rxbuf, rdlen,
  3485. NULL, NULL, NULL);
  3486. bus->f2rxdata++;
  3487. /* Control frame failures need
  3488. retransmission */
  3489. if (sdret < 0) {
  3490. BRCMF_ERROR(("%s: read %d "
  3491. "control bytes "
  3492. "failed: %d\n",
  3493. __func__,
  3494. rdlen, sdret));
  3495. /* dhd.rx_ctlerrs is higher */
  3496. bus->rxc_errors++;
  3497. brcmf_sdbrcm_rxfail(bus, true,
  3498. (bus->bus ==
  3499. SPI_BUS) ? false
  3500. : true);
  3501. continue;
  3502. }
  3503. } else {
  3504. /* Give up on data,
  3505. request rtx of events */
  3506. BRCMF_ERROR(("%s (nextlen): "
  3507. "brcmu_pkt_buf_get_skb "
  3508. "failed:"
  3509. " len %d rdlen %d expected"
  3510. " rxseq %d\n", __func__,
  3511. len, rdlen, rxseq));
  3512. continue;
  3513. }
  3514. } else {
  3515. if (bus->bus == SPI_BUS)
  3516. bus->usebufpool = true;
  3517. PKTALIGN(pkt, rdlen, BRCMF_SDALIGN);
  3518. rxbuf = (u8 *) (pkt->data);
  3519. /* Read the entire frame */
  3520. sdret = brcmf_sdcard_recv_buf(card,
  3521. brcmf_sdcard_cur_sbwad(card),
  3522. SDIO_FUNC_2, F2SYNC,
  3523. rxbuf, rdlen,
  3524. pkt, NULL, NULL);
  3525. bus->f2rxdata++;
  3526. if (sdret < 0) {
  3527. BRCMF_ERROR(("%s (nextlen): read %d"
  3528. " bytes failed: %d\n",
  3529. __func__, rdlen, sdret));
  3530. brcmu_pkt_buf_free_skb(pkt);
  3531. bus->drvr->rx_errors++;
  3532. /* Force retry w/normal header read.
  3533. * Don't attempt NAK for
  3534. * gSPI
  3535. */
  3536. brcmf_sdbrcm_rxfail(bus, true,
  3537. (bus->bus ==
  3538. SPI_BUS) ? false :
  3539. true);
  3540. continue;
  3541. }
  3542. }
  3543. /* Now check the header */
  3544. memcpy(bus->rxhdr, rxbuf, SDPCM_HDRLEN);
  3545. /* Extract hardware header fields */
  3546. len = get_unaligned_le16(bus->rxhdr);
  3547. check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
  3548. /* All zeros means readahead info was bad */
  3549. if (!(len | check)) {
  3550. BRCMF_INFO(("%s (nextlen): read zeros in HW "
  3551. "header???\n", __func__));
  3552. brcmf_sdbrcm_pktfree2(bus, pkt);
  3553. continue;
  3554. }
  3555. /* Validate check bytes */
  3556. if ((u16)~(len ^ check)) {
  3557. BRCMF_ERROR(("%s (nextlen): HW hdr error:"
  3558. " nextlen/len/check"
  3559. " 0x%04x/0x%04x/0x%04x\n",
  3560. __func__, nextlen, len, check));
  3561. bus->rx_badhdr++;
  3562. brcmf_sdbrcm_rxfail(bus, false, false);
  3563. brcmf_sdbrcm_pktfree2(bus, pkt);
  3564. continue;
  3565. }
  3566. /* Validate frame length */
  3567. if (len < SDPCM_HDRLEN) {
  3568. BRCMF_ERROR(("%s (nextlen): HW hdr length "
  3569. "invalid: %d\n", __func__, len));
  3570. brcmf_sdbrcm_pktfree2(bus, pkt);
  3571. continue;
  3572. }
  3573. /* Check for consistency withreadahead info */
  3574. len_consistent = (nextlen != (roundup(len, 16) >> 4));
  3575. if (len_consistent) {
  3576. /* Mismatch, force retry w/normal
  3577. header (may be >4K) */
  3578. BRCMF_ERROR(("%s (nextlen): mismatch, "
  3579. "nextlen %d len %d rnd %d; "
  3580. "expected rxseq %d\n",
  3581. __func__, nextlen,
  3582. len, roundup(len, 16), rxseq));
  3583. brcmf_sdbrcm_rxfail(bus, true,
  3584. bus->bus != SPI_BUS);
  3585. brcmf_sdbrcm_pktfree2(bus, pkt);
  3586. continue;
  3587. }
  3588. /* Extract software header fields */
  3589. chan = SDPCM_PACKET_CHANNEL(
  3590. &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
  3591. seq = SDPCM_PACKET_SEQUENCE(
  3592. &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
  3593. doff = SDPCM_DOFFSET_VALUE(
  3594. &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
  3595. txmax = SDPCM_WINDOW_VALUE(
  3596. &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
  3597. bus->nextlen =
  3598. bus->rxhdr[SDPCM_FRAMETAG_LEN +
  3599. SDPCM_NEXTLEN_OFFSET];
  3600. if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
  3601. BRCMF_INFO(("%s (nextlen): got frame w/nextlen"
  3602. " too large (%d), seq %d\n",
  3603. __func__, bus->nextlen, seq));
  3604. bus->nextlen = 0;
  3605. }
  3606. bus->drvr->rx_readahead_cnt++;
  3607. /* Handle Flow Control */
  3608. fcbits = SDPCM_FCMASK_VALUE(
  3609. &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
  3610. if (bus->flowcontrol != fcbits) {
  3611. if (~bus->flowcontrol & fcbits)
  3612. bus->fc_xoff++;
  3613. if (bus->flowcontrol & ~fcbits)
  3614. bus->fc_xon++;
  3615. bus->fc_rcvd++;
  3616. bus->flowcontrol = fcbits;
  3617. }
  3618. /* Check and update sequence number */
  3619. if (rxseq != seq) {
  3620. BRCMF_INFO(("%s (nextlen): rx_seq %d, expected "
  3621. "%d\n", __func__, seq, rxseq));
  3622. bus->rx_badseq++;
  3623. rxseq = seq;
  3624. }
  3625. /* Check window for sanity */
  3626. if ((u8) (txmax - bus->tx_seq) > 0x40) {
  3627. BRCMF_ERROR(("%s: got unlikely tx max %d with "
  3628. "tx_seq %d\n",
  3629. __func__, txmax, bus->tx_seq));
  3630. txmax = bus->tx_seq + 2;
  3631. }
  3632. bus->tx_max = txmax;
  3633. #ifdef BCMDBG
  3634. if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
  3635. printk(KERN_DEBUG "Rx Data:\n");
  3636. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  3637. rxbuf, len);
  3638. } else if (BRCMF_HDRS_ON()) {
  3639. printk(KERN_DEBUG "RxHdr:\n");
  3640. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  3641. bus->rxhdr, SDPCM_HDRLEN);
  3642. }
  3643. #endif
  3644. if (chan == SDPCM_CONTROL_CHANNEL) {
  3645. if (bus->bus == SPI_BUS) {
  3646. brcmf_sdbrcm_read_control(bus, rxbuf,
  3647. len, doff);
  3648. } else {
  3649. BRCMF_ERROR(("%s (nextlen): readahead"
  3650. " on control packet %d?\n",
  3651. __func__, seq));
  3652. /* Force retry w/normal header read */
  3653. bus->nextlen = 0;
  3654. brcmf_sdbrcm_rxfail(bus, false, true);
  3655. }
  3656. brcmf_sdbrcm_pktfree2(bus, pkt);
  3657. continue;
  3658. }
  3659. if ((bus->bus == SPI_BUS) && !bus->usebufpool) {
  3660. BRCMF_ERROR(("Received %d bytes on %d channel."
  3661. " Running out of " "rx pktbuf's or"
  3662. " not yet malloced.\n",
  3663. len, chan));
  3664. continue;
  3665. }
  3666. /* Validate data offset */
  3667. if ((doff < SDPCM_HDRLEN) || (doff > len)) {
  3668. BRCMF_ERROR(("%s (nextlen): bad data offset %d:"
  3669. " HW len %d min %d\n", __func__,
  3670. doff, len, SDPCM_HDRLEN));
  3671. brcmf_sdbrcm_rxfail(bus, false, false);
  3672. brcmf_sdbrcm_pktfree2(bus, pkt);
  3673. continue;
  3674. }
  3675. /* All done with this one -- now deliver the packet */
  3676. goto deliver;
  3677. }
  3678. /* gSPI frames should not be handled in fractions */
  3679. if (bus->bus == SPI_BUS)
  3680. break;
  3681. /* Read frame header (hardware and software) */
  3682. sdret = brcmf_sdcard_recv_buf(card,
  3683. brcmf_sdcard_cur_sbwad(card),
  3684. SDIO_FUNC_2, F2SYNC, bus->rxhdr, firstread,
  3685. NULL, NULL, NULL);
  3686. bus->f2rxhdrs++;
  3687. if (sdret < 0) {
  3688. BRCMF_ERROR(("%s: RXHEADER FAILED: %d\n", __func__,
  3689. sdret));
  3690. bus->rx_hdrfail++;
  3691. brcmf_sdbrcm_rxfail(bus, true, true);
  3692. continue;
  3693. }
  3694. #ifdef BCMDBG
  3695. if (BRCMF_BYTES_ON() || BRCMF_HDRS_ON()) {
  3696. printk(KERN_DEBUG "RxHdr:\n");
  3697. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  3698. bus->rxhdr, SDPCM_HDRLEN);
  3699. }
  3700. #endif
  3701. /* Extract hardware header fields */
  3702. len = get_unaligned_le16(bus->rxhdr);
  3703. check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
  3704. /* All zeros means no more frames */
  3705. if (!(len | check)) {
  3706. *finished = true;
  3707. break;
  3708. }
  3709. /* Validate check bytes */
  3710. if ((u16) ~(len ^ check)) {
  3711. BRCMF_ERROR(("%s: HW hdr err: len/check "
  3712. "0x%04x/0x%04x\n", __func__, len, check));
  3713. bus->rx_badhdr++;
  3714. brcmf_sdbrcm_rxfail(bus, false, false);
  3715. continue;
  3716. }
  3717. /* Validate frame length */
  3718. if (len < SDPCM_HDRLEN) {
  3719. BRCMF_ERROR(("%s: HW hdr length invalid: %d\n",
  3720. __func__, len));
  3721. continue;
  3722. }
  3723. /* Extract software header fields */
  3724. chan = SDPCM_PACKET_CHANNEL(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
  3725. seq = SDPCM_PACKET_SEQUENCE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
  3726. doff = SDPCM_DOFFSET_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
  3727. txmax = SDPCM_WINDOW_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
  3728. /* Validate data offset */
  3729. if ((doff < SDPCM_HDRLEN) || (doff > len)) {
  3730. BRCMF_ERROR(("%s: Bad data offset %d: HW len %d,"
  3731. " min %d seq %d\n", __func__, doff,
  3732. len, SDPCM_HDRLEN, seq));
  3733. bus->rx_badhdr++;
  3734. brcmf_sdbrcm_rxfail(bus, false, false);
  3735. continue;
  3736. }
  3737. /* Save the readahead length if there is one */
  3738. bus->nextlen =
  3739. bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
  3740. if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
  3741. BRCMF_INFO(("%s (nextlen): got frame w/nextlen too"
  3742. " large (%d), seq %d\n",
  3743. __func__, bus->nextlen, seq));
  3744. bus->nextlen = 0;
  3745. }
  3746. /* Handle Flow Control */
  3747. fcbits = SDPCM_FCMASK_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
  3748. if (bus->flowcontrol != fcbits) {
  3749. if (~bus->flowcontrol & fcbits)
  3750. bus->fc_xoff++;
  3751. if (bus->flowcontrol & ~fcbits)
  3752. bus->fc_xon++;
  3753. bus->fc_rcvd++;
  3754. bus->flowcontrol = fcbits;
  3755. }
  3756. /* Check and update sequence number */
  3757. if (rxseq != seq) {
  3758. BRCMF_INFO(("%s: rx_seq %d, expected %d\n", __func__,
  3759. seq, rxseq));
  3760. bus->rx_badseq++;
  3761. rxseq = seq;
  3762. }
  3763. /* Check window for sanity */
  3764. if ((u8) (txmax - bus->tx_seq) > 0x40) {
  3765. BRCMF_ERROR(("%s: unlikely tx max %d with tx_seq %d\n",
  3766. __func__, txmax, bus->tx_seq));
  3767. txmax = bus->tx_seq + 2;
  3768. }
  3769. bus->tx_max = txmax;
  3770. /* Call a separate function for control frames */
  3771. if (chan == SDPCM_CONTROL_CHANNEL) {
  3772. brcmf_sdbrcm_read_control(bus, bus->rxhdr, len, doff);
  3773. continue;
  3774. }
  3775. /* precondition: chan is either SDPCM_DATA_CHANNEL,
  3776. SDPCM_EVENT_CHANNEL, SDPCM_TEST_CHANNEL or
  3777. SDPCM_GLOM_CHANNEL */
  3778. /* Length to read */
  3779. rdlen = (len > firstread) ? (len - firstread) : 0;
  3780. /* May pad read to blocksize for efficiency */
  3781. if (bus->roundup && bus->blocksize &&
  3782. (rdlen > bus->blocksize)) {
  3783. pad = bus->blocksize - (rdlen % bus->blocksize);
  3784. if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
  3785. ((rdlen + pad + firstread) < MAX_RX_DATASZ))
  3786. rdlen += pad;
  3787. } else if (rdlen % BRCMF_SDALIGN) {
  3788. rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
  3789. }
  3790. /* Satisfy length-alignment requirements */
  3791. if (forcealign && (rdlen & (ALIGNMENT - 1)))
  3792. rdlen = roundup(rdlen, ALIGNMENT);
  3793. if ((rdlen + firstread) > MAX_RX_DATASZ) {
  3794. /* Too long -- skip this frame */
  3795. BRCMF_ERROR(("%s: too long: len %d rdlen %d\n",
  3796. __func__, len, rdlen));
  3797. bus->drvr->rx_errors++;
  3798. bus->rx_toolong++;
  3799. brcmf_sdbrcm_rxfail(bus, false, false);
  3800. continue;
  3801. }
  3802. pkt = brcmu_pkt_buf_get_skb(rdlen + firstread + BRCMF_SDALIGN);
  3803. if (!pkt) {
  3804. /* Give up on data, request rtx of events */
  3805. BRCMF_ERROR(("%s: brcmu_pkt_buf_get_skb failed:"
  3806. " rdlen %d chan %d\n", __func__, rdlen,
  3807. chan));
  3808. bus->drvr->rx_dropped++;
  3809. brcmf_sdbrcm_rxfail(bus, false, RETRYCHAN(chan));
  3810. continue;
  3811. }
  3812. /* Leave room for what we already read, and align remainder */
  3813. skb_pull(pkt, firstread);
  3814. PKTALIGN(pkt, rdlen, BRCMF_SDALIGN);
  3815. /* Read the remaining frame data */
  3816. sdret = brcmf_sdcard_recv_buf(card,
  3817. brcmf_sdcard_cur_sbwad(card),
  3818. SDIO_FUNC_2, F2SYNC, ((u8 *) (pkt->data)),
  3819. rdlen, pkt, NULL, NULL);
  3820. bus->f2rxdata++;
  3821. if (sdret < 0) {
  3822. BRCMF_ERROR(("%s: read %d %s bytes failed: %d\n",
  3823. __func__, rdlen,
  3824. ((chan == SDPCM_EVENT_CHANNEL) ? "event"
  3825. : ((chan == SDPCM_DATA_CHANNEL) ? "data"
  3826. : "test")), sdret));
  3827. brcmu_pkt_buf_free_skb(pkt);
  3828. bus->drvr->rx_errors++;
  3829. brcmf_sdbrcm_rxfail(bus, true, RETRYCHAN(chan));
  3830. continue;
  3831. }
  3832. /* Copy the already-read portion */
  3833. skb_push(pkt, firstread);
  3834. memcpy(pkt->data, bus->rxhdr, firstread);
  3835. #ifdef BCMDBG
  3836. if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
  3837. printk(KERN_DEBUG "Rx Data:\n");
  3838. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  3839. pkt->data, len);
  3840. }
  3841. #endif
  3842. deliver:
  3843. /* Save superframe descriptor and allocate packet frame */
  3844. if (chan == SDPCM_GLOM_CHANNEL) {
  3845. if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
  3846. BRCMF_GLOM(("%s: glom descriptor, %d bytes:\n",
  3847. __func__, len));
  3848. #ifdef BCMDBG
  3849. if (BRCMF_GLOM_ON()) {
  3850. printk(KERN_DEBUG "Glom Data:\n");
  3851. print_hex_dump_bytes("",
  3852. DUMP_PREFIX_OFFSET,
  3853. pkt->data, len);
  3854. }
  3855. #endif
  3856. __skb_trim(pkt, len);
  3857. skb_pull(pkt, SDPCM_HDRLEN);
  3858. bus->glomd = pkt;
  3859. } else {
  3860. BRCMF_ERROR(("%s: glom superframe w/o "
  3861. "descriptor!\n", __func__));
  3862. brcmf_sdbrcm_rxfail(bus, false, false);
  3863. }
  3864. continue;
  3865. }
  3866. /* Fill in packet len and prio, deliver upward */
  3867. __skb_trim(pkt, len);
  3868. skb_pull(pkt, doff);
  3869. #ifdef SDTEST
  3870. /* Test channel packets are processed separately */
  3871. if (chan == SDPCM_TEST_CHANNEL) {
  3872. brcmf_sdbrcm_checkdied(bus, pkt, seq);
  3873. continue;
  3874. }
  3875. #endif /* SDTEST */
  3876. if (pkt->len == 0) {
  3877. brcmu_pkt_buf_free_skb(pkt);
  3878. continue;
  3879. } else if (brcmf_proto_hdrpull(bus->drvr, &ifidx, pkt) != 0) {
  3880. BRCMF_ERROR(("%s: rx protocol error\n", __func__));
  3881. brcmu_pkt_buf_free_skb(pkt);
  3882. bus->drvr->rx_errors++;
  3883. continue;
  3884. }
  3885. /* Unlock during rx call */
  3886. brcmf_sdbrcm_sdunlock(bus);
  3887. brcmf_rx_frame(bus->drvr, ifidx, pkt, 1);
  3888. brcmf_sdbrcm_sdlock(bus);
  3889. }
  3890. rxcount = maxframes - rxleft;
  3891. #ifdef BCMDBG
  3892. /* Message if we hit the limit */
  3893. if (!rxleft && !sdtest)
  3894. BRCMF_DATA(("%s: hit rx limit of %d frames\n", __func__,
  3895. maxframes));
  3896. else
  3897. #endif /* BCMDBG */
  3898. BRCMF_DATA(("%s: processed %d frames\n", __func__, rxcount));
  3899. /* Back off rxseq if awaiting rtx, update rx_seq */
  3900. if (bus->rxskip)
  3901. rxseq--;
  3902. bus->rx_seq = rxseq;
  3903. return rxcount;
  3904. }
  3905. static u32 brcmf_sdbrcm_hostmail(struct brcmf_bus *bus)
  3906. {
  3907. u32 intstatus = 0;
  3908. u32 hmb_data;
  3909. u8 fcbits;
  3910. uint retries = 0;
  3911. BRCMF_TRACE(("%s: Enter\n", __func__));
  3912. /* Read mailbox data and ack that we did so */
  3913. r_sdreg32(bus, &hmb_data,
  3914. offsetof(struct sdpcmd_regs, tohostmailboxdata), &retries);
  3915. if (retries <= retry_limit)
  3916. w_sdreg32(bus, SMB_INT_ACK,
  3917. offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
  3918. bus->f1regdata += 2;
  3919. /* Dongle recomposed rx frames, accept them again */
  3920. if (hmb_data & HMB_DATA_NAKHANDLED) {
  3921. BRCMF_INFO(("Dongle reports NAK handled, expect rtx of %d\n",
  3922. bus->rx_seq));
  3923. if (!bus->rxskip)
  3924. BRCMF_ERROR(("%s: unexpected NAKHANDLED!\n", __func__));
  3925. bus->rxskip = false;
  3926. intstatus |= I_HMB_FRAME_IND;
  3927. }
  3928. /*
  3929. * DEVREADY does not occur with gSPI.
  3930. */
  3931. if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
  3932. bus->sdpcm_ver =
  3933. (hmb_data & HMB_DATA_VERSION_MASK) >>
  3934. HMB_DATA_VERSION_SHIFT;
  3935. if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
  3936. BRCMF_ERROR(("Version mismatch, dongle reports %d, "
  3937. "expecting %d\n",
  3938. bus->sdpcm_ver, SDPCM_PROT_VERSION));
  3939. else
  3940. BRCMF_INFO(("Dongle ready, protocol version %d\n",
  3941. bus->sdpcm_ver));
  3942. }
  3943. /*
  3944. * Flow Control has been moved into the RX headers and this out of band
  3945. * method isn't used any more.
  3946. * remaining backward compatible with older dongles.
  3947. */
  3948. if (hmb_data & HMB_DATA_FC) {
  3949. fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
  3950. HMB_DATA_FCDATA_SHIFT;
  3951. if (fcbits & ~bus->flowcontrol)
  3952. bus->fc_xoff++;
  3953. if (bus->flowcontrol & ~fcbits)
  3954. bus->fc_xon++;
  3955. bus->fc_rcvd++;
  3956. bus->flowcontrol = fcbits;
  3957. }
  3958. /* Shouldn't be any others */
  3959. if (hmb_data & ~(HMB_DATA_DEVREADY |
  3960. HMB_DATA_NAKHANDLED |
  3961. HMB_DATA_FC |
  3962. HMB_DATA_FWREADY |
  3963. HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK)) {
  3964. BRCMF_ERROR(("Unknown mailbox data content: 0x%02x\n",
  3965. hmb_data));
  3966. }
  3967. return intstatus;
  3968. }
  3969. static bool brcmf_sdbrcm_dpc(struct brcmf_bus *bus)
  3970. {
  3971. struct brcmf_sdio_card *card = bus->card;
  3972. u32 intstatus, newstatus = 0;
  3973. uint retries = 0;
  3974. uint rxlimit = brcmf_rxbound; /* Rx frames to read before resched */
  3975. uint txlimit = brcmf_txbound; /* Tx frames to send before resched */
  3976. uint framecnt = 0; /* Temporary counter of tx/rx frames */
  3977. bool rxdone = true; /* Flag for no more read data */
  3978. bool resched = false; /* Flag indicating resched wanted */
  3979. BRCMF_TRACE(("%s: Enter\n", __func__));
  3980. /* Start with leftover status bits */
  3981. intstatus = bus->intstatus;
  3982. brcmf_sdbrcm_sdlock(bus);
  3983. /* If waiting for HTAVAIL, check status */
  3984. if (bus->clkstate == CLK_PENDING) {
  3985. int err;
  3986. u8 clkctl, devctl = 0;
  3987. #ifdef BCMDBG
  3988. /* Check for inconsistent device control */
  3989. devctl = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
  3990. SBSDIO_DEVICE_CTL, &err);
  3991. if (err) {
  3992. BRCMF_ERROR(("%s: error reading DEVCTL: %d\n",
  3993. __func__, err));
  3994. bus->drvr->busstate = BRCMF_BUS_DOWN;
  3995. }
  3996. #endif /* BCMDBG */
  3997. /* Read CSR, if clock on switch to AVAIL, else ignore */
  3998. clkctl = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
  3999. SBSDIO_FUNC1_CHIPCLKCSR, &err);
  4000. if (err) {
  4001. BRCMF_ERROR(("%s: error reading CSR: %d\n", __func__,
  4002. err));
  4003. bus->drvr->busstate = BRCMF_BUS_DOWN;
  4004. }
  4005. BRCMF_INFO(("DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
  4006. devctl, clkctl));
  4007. if (SBSDIO_HTAV(clkctl)) {
  4008. devctl = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
  4009. SBSDIO_DEVICE_CTL, &err);
  4010. if (err) {
  4011. BRCMF_ERROR(("%s: error reading DEVCTL: %d\n",
  4012. __func__, err));
  4013. bus->drvr->busstate = BRCMF_BUS_DOWN;
  4014. }
  4015. devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
  4016. brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
  4017. SBSDIO_DEVICE_CTL, devctl, &err);
  4018. if (err) {
  4019. BRCMF_ERROR(("%s: error writing DEVCTL: %d\n",
  4020. __func__, err));
  4021. bus->drvr->busstate = BRCMF_BUS_DOWN;
  4022. }
  4023. bus->clkstate = CLK_AVAIL;
  4024. } else {
  4025. goto clkwait;
  4026. }
  4027. }
  4028. BUS_WAKE(bus);
  4029. /* Make sure backplane clock is on */
  4030. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
  4031. if (bus->clkstate == CLK_PENDING)
  4032. goto clkwait;
  4033. /* Pending interrupt indicates new device status */
  4034. if (bus->ipend) {
  4035. bus->ipend = false;
  4036. r_sdreg32(bus, &newstatus,
  4037. offsetof(struct sdpcmd_regs, intstatus), &retries);
  4038. bus->f1regdata++;
  4039. if (brcmf_sdcard_regfail(bus->card))
  4040. newstatus = 0;
  4041. newstatus &= bus->hostintmask;
  4042. bus->fcstate = !!(newstatus & I_HMB_FC_STATE);
  4043. if (newstatus) {
  4044. w_sdreg32(bus, newstatus,
  4045. offsetof(struct sdpcmd_regs, intstatus),
  4046. &retries);
  4047. bus->f1regdata++;
  4048. }
  4049. }
  4050. /* Merge new bits with previous */
  4051. intstatus |= newstatus;
  4052. bus->intstatus = 0;
  4053. /* Handle flow-control change: read new state in case our ack
  4054. * crossed another change interrupt. If change still set, assume
  4055. * FC ON for safety, let next loop through do the debounce.
  4056. */
  4057. if (intstatus & I_HMB_FC_CHANGE) {
  4058. intstatus &= ~I_HMB_FC_CHANGE;
  4059. w_sdreg32(bus, I_HMB_FC_CHANGE,
  4060. offsetof(struct sdpcmd_regs, intstatus), &retries);
  4061. r_sdreg32(bus, &newstatus,
  4062. offsetof(struct sdpcmd_regs, intstatus), &retries);
  4063. bus->f1regdata += 2;
  4064. bus->fcstate =
  4065. !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE));
  4066. intstatus |= (newstatus & bus->hostintmask);
  4067. }
  4068. /* Handle host mailbox indication */
  4069. if (intstatus & I_HMB_HOST_INT) {
  4070. intstatus &= ~I_HMB_HOST_INT;
  4071. intstatus |= brcmf_sdbrcm_hostmail(bus);
  4072. }
  4073. /* Generally don't ask for these, can get CRC errors... */
  4074. if (intstatus & I_WR_OOSYNC) {
  4075. BRCMF_ERROR(("Dongle reports WR_OOSYNC\n"));
  4076. intstatus &= ~I_WR_OOSYNC;
  4077. }
  4078. if (intstatus & I_RD_OOSYNC) {
  4079. BRCMF_ERROR(("Dongle reports RD_OOSYNC\n"));
  4080. intstatus &= ~I_RD_OOSYNC;
  4081. }
  4082. if (intstatus & I_SBINT) {
  4083. BRCMF_ERROR(("Dongle reports SBINT\n"));
  4084. intstatus &= ~I_SBINT;
  4085. }
  4086. /* Would be active due to wake-wlan in gSPI */
  4087. if (intstatus & I_CHIPACTIVE) {
  4088. BRCMF_INFO(("Dongle reports CHIPACTIVE\n"));
  4089. intstatus &= ~I_CHIPACTIVE;
  4090. }
  4091. /* Ignore frame indications if rxskip is set */
  4092. if (bus->rxskip)
  4093. intstatus &= ~I_HMB_FRAME_IND;
  4094. /* On frame indication, read available frames */
  4095. if (PKT_AVAILABLE()) {
  4096. framecnt = brcmf_sdbrcm_readframes(bus, rxlimit, &rxdone);
  4097. if (rxdone || bus->rxskip)
  4098. intstatus &= ~I_HMB_FRAME_IND;
  4099. rxlimit -= min(framecnt, rxlimit);
  4100. }
  4101. /* Keep still-pending events for next scheduling */
  4102. bus->intstatus = intstatus;
  4103. clkwait:
  4104. /* Re-enable interrupts to detect new device events (mailbox, rx frame)
  4105. * or clock availability. (Allows tx loop to check ipend if desired.)
  4106. * (Unless register access seems hosed, as we may not be able to ACK...)
  4107. */
  4108. if (bus->intr && bus->intdis && !brcmf_sdcard_regfail(card)) {
  4109. BRCMF_INTR(("%s: enable SDIO interrupts, rxdone %d"
  4110. " framecnt %d\n", __func__, rxdone, framecnt));
  4111. bus->intdis = false;
  4112. brcmf_sdcard_intr_enable(card);
  4113. }
  4114. if (DATAOK(bus) && bus->ctrl_frame_stat &&
  4115. (bus->clkstate == CLK_AVAIL)) {
  4116. int ret, i;
  4117. ret = brcmf_sdbrcm_send_buf(bus, brcmf_sdcard_cur_sbwad(card),
  4118. SDIO_FUNC_2, F2SYNC, (u8 *) bus->ctrl_frame_buf,
  4119. (u32) bus->ctrl_frame_len, NULL, NULL, NULL);
  4120. if (ret < 0) {
  4121. /* On failure, abort the command and
  4122. terminate the frame */
  4123. BRCMF_INFO(("%s: sdio error %d, abort command and "
  4124. "terminate frame.\n", __func__, ret));
  4125. bus->tx_sderrs++;
  4126. brcmf_sdcard_abort(card, SDIO_FUNC_2);
  4127. brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
  4128. SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
  4129. NULL);
  4130. bus->f1regdata++;
  4131. for (i = 0; i < 3; i++) {
  4132. u8 hi, lo;
  4133. hi = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
  4134. SBSDIO_FUNC1_WFRAMEBCHI,
  4135. NULL);
  4136. lo = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
  4137. SBSDIO_FUNC1_WFRAMEBCLO,
  4138. NULL);
  4139. bus->f1regdata += 2;
  4140. if ((hi == 0) && (lo == 0))
  4141. break;
  4142. }
  4143. }
  4144. if (ret == 0)
  4145. bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
  4146. BRCMF_INFO(("Return_dpc value is : %d\n", ret));
  4147. bus->ctrl_frame_stat = false;
  4148. brcmf_sdbrcm_wait_event_wakeup(bus);
  4149. }
  4150. /* Send queued frames (limit 1 if rx may still be pending) */
  4151. else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate &&
  4152. brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
  4153. && DATAOK(bus)) {
  4154. framecnt = rxdone ? txlimit : min(txlimit, brcmf_txminmax);
  4155. framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
  4156. txlimit -= framecnt;
  4157. }
  4158. /* Resched if events or tx frames are pending,
  4159. else await next interrupt */
  4160. /* On failed register access, all bets are off:
  4161. no resched or interrupts */
  4162. if ((bus->drvr->busstate == BRCMF_BUS_DOWN) ||
  4163. brcmf_sdcard_regfail(card)) {
  4164. BRCMF_ERROR(("%s: failed backplane access over SDIO, halting "
  4165. "operation %d\n", __func__,
  4166. brcmf_sdcard_regfail(card)));
  4167. bus->drvr->busstate = BRCMF_BUS_DOWN;
  4168. bus->intstatus = 0;
  4169. } else if (bus->clkstate == CLK_PENDING) {
  4170. BRCMF_INFO(("%s: rescheduled due to CLK_PENDING awaiting "
  4171. "I_CHIPACTIVE interrupt\n", __func__));
  4172. resched = true;
  4173. } else if (bus->intstatus || bus->ipend ||
  4174. (!bus->fcstate && brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol)
  4175. && DATAOK(bus)) || PKT_AVAILABLE()) {
  4176. resched = true;
  4177. }
  4178. bus->dpc_sched = resched;
  4179. /* If we're done for now, turn off clock request. */
  4180. if ((bus->clkstate != CLK_PENDING)
  4181. && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
  4182. bus->activity = false;
  4183. brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
  4184. }
  4185. brcmf_sdbrcm_sdunlock(bus);
  4186. return resched;
  4187. }
  4188. void brcmf_sdbrcm_isr(void *arg)
  4189. {
  4190. struct brcmf_bus *bus = (struct brcmf_bus *) arg;
  4191. struct brcmf_sdio_card *card;
  4192. BRCMF_TRACE(("%s: Enter\n", __func__));
  4193. if (!bus) {
  4194. BRCMF_ERROR(("%s : bus is null pointer , exit\n", __func__));
  4195. return;
  4196. }
  4197. card = bus->card;
  4198. if (bus->drvr->busstate == BRCMF_BUS_DOWN) {
  4199. BRCMF_ERROR(("%s : bus is down. we have nothing to do\n",
  4200. __func__));
  4201. return;
  4202. }
  4203. /* Count the interrupt call */
  4204. bus->intrcount++;
  4205. bus->ipend = true;
  4206. /* Shouldn't get this interrupt if we're sleeping? */
  4207. if (bus->sleeping) {
  4208. BRCMF_ERROR(("INTERRUPT WHILE SLEEPING??\n"));
  4209. return;
  4210. }
  4211. /* Disable additional interrupts (is this needed now)? */
  4212. if (bus->intr)
  4213. BRCMF_INTR(("%s: disable SDIO interrupts\n", __func__));
  4214. else
  4215. BRCMF_ERROR(("brcmf_sdbrcm_isr() w/o interrupt configured!\n"));
  4216. brcmf_sdcard_intr_disable(card);
  4217. bus->intdis = true;
  4218. #if defined(SDIO_ISR_THREAD)
  4219. BRCMF_TRACE(("Calling brcmf_sdbrcm_dpc() from %s\n", __func__));
  4220. while (brcmf_sdbrcm_dpc(bus))
  4221. ;
  4222. #else
  4223. bus->dpc_sched = true;
  4224. brcmf_sdbrcm_sched_dpc(bus);
  4225. #endif
  4226. }
  4227. #ifdef SDTEST
  4228. static void brcmf_sdbrcm_pktgen_init(struct brcmf_bus *bus)
  4229. {
  4230. /* Default to specified length, or full range */
  4231. if (brcmf_pktgen_len) {
  4232. bus->pktgen_maxlen = min(brcmf_pktgen_len,
  4233. BRCMF_MAX_PKTGEN_LEN);
  4234. bus->pktgen_minlen = bus->pktgen_maxlen;
  4235. } else {
  4236. bus->pktgen_maxlen = BRCMF_MAX_PKTGEN_LEN;
  4237. bus->pktgen_minlen = 0;
  4238. }
  4239. bus->pktgen_len = (u16) bus->pktgen_minlen;
  4240. /* Default to per-watchdog burst with 10s print time */
  4241. bus->pktgen_freq = 1;
  4242. bus->pktgen_print = 10000 / brcmf_watchdog_ms;
  4243. bus->pktgen_count = (brcmf_pktgen * brcmf_watchdog_ms + 999) / 1000;
  4244. /* Default to echo mode */
  4245. bus->pktgen_mode = BRCMF_PKTGEN_ECHO;
  4246. bus->pktgen_stop = 1;
  4247. }
  4248. static void brcmf_sdbrcm_pktgen(struct brcmf_bus *bus)
  4249. {
  4250. struct sk_buff *pkt;
  4251. u8 *data;
  4252. uint pktcount;
  4253. uint fillbyte;
  4254. u16 len;
  4255. /* Display current count if appropriate */
  4256. if (bus->pktgen_print && (++bus->pktgen_ptick >= bus->pktgen_print)) {
  4257. bus->pktgen_ptick = 0;
  4258. printk(KERN_DEBUG "%s: send attempts %d rcvd %d\n",
  4259. __func__, bus->pktgen_sent, bus->pktgen_rcvd);
  4260. }
  4261. /* For recv mode, just make sure dongle has started sending */
  4262. if (bus->pktgen_mode == BRCMF_PKTGEN_RECV) {
  4263. if (!bus->pktgen_rcvd)
  4264. brcmf_sdbrcm_sdtest_set(bus, true);
  4265. return;
  4266. }
  4267. /* Otherwise, generate or request the specified number of packets */
  4268. for (pktcount = 0; pktcount < bus->pktgen_count; pktcount++) {
  4269. /* Stop if total has been reached */
  4270. if (bus->pktgen_total
  4271. && (bus->pktgen_sent >= bus->pktgen_total)) {
  4272. bus->pktgen_count = 0;
  4273. break;
  4274. }
  4275. /* Allocate an appropriate-sized packet */
  4276. len = bus->pktgen_len;
  4277. pkt = brcmu_pkt_buf_get_skb(
  4278. len + SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + BRCMF_SDALIGN,
  4279. true);
  4280. if (!pkt) {
  4281. BRCMF_ERROR(("%s: brcmu_pkt_buf_get_skb failed!\n",
  4282. __func__));
  4283. break;
  4284. }
  4285. PKTALIGN(pkt, (len + SDPCM_HDRLEN + SDPCM_TEST_HDRLEN),
  4286. BRCMF_SDALIGN);
  4287. data = (u8 *) (pkt->data) + SDPCM_HDRLEN;
  4288. /* Write test header cmd and extra based on mode */
  4289. switch (bus->pktgen_mode) {
  4290. case BRCMF_PKTGEN_ECHO:
  4291. *data++ = SDPCM_TEST_ECHOREQ;
  4292. *data++ = (u8) bus->pktgen_sent;
  4293. break;
  4294. case BRCMF_PKTGEN_SEND:
  4295. *data++ = SDPCM_TEST_DISCARD;
  4296. *data++ = (u8) bus->pktgen_sent;
  4297. break;
  4298. case BRCMF_PKTGEN_RXBURST:
  4299. *data++ = SDPCM_TEST_BURST;
  4300. *data++ = (u8) bus->pktgen_count;
  4301. break;
  4302. default:
  4303. BRCMF_ERROR(("Unrecognized pktgen mode %d\n",
  4304. bus->pktgen_mode));
  4305. brcmu_pkt_buf_free_skb(pkt, true);
  4306. bus->pktgen_count = 0;
  4307. return;
  4308. }
  4309. /* Write test header length field */
  4310. *data++ = (len >> 0);
  4311. *data++ = (len >> 8);
  4312. /* Then fill in the remainder -- N/A for burst,
  4313. but who cares... */
  4314. for (fillbyte = 0; fillbyte < len; fillbyte++)
  4315. *data++ =
  4316. SDPCM_TEST_FILL(fillbyte, (u8) bus->pktgen_sent);
  4317. #ifdef BCMDBG
  4318. if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
  4319. data = (u8 *) (pkt->data) + SDPCM_HDRLEN;
  4320. printk(KERN_DEBUG "brcmf_sdbrcm_pktgen: Tx Data:\n");
  4321. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, data,
  4322. pkt->len - SDPCM_HDRLEN);
  4323. }
  4324. #endif
  4325. /* Send it */
  4326. if (brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true)) {
  4327. bus->pktgen_fail++;
  4328. if (bus->pktgen_stop
  4329. && bus->pktgen_stop == bus->pktgen_fail)
  4330. bus->pktgen_count = 0;
  4331. }
  4332. bus->pktgen_sent++;
  4333. /* Bump length if not fixed, wrap at max */
  4334. if (++bus->pktgen_len > bus->pktgen_maxlen)
  4335. bus->pktgen_len = (u16) bus->pktgen_minlen;
  4336. /* Special case for burst mode: just send one request! */
  4337. if (bus->pktgen_mode == BRCMF_PKTGEN_RXBURST)
  4338. break;
  4339. }
  4340. }
  4341. static void brcmf_sdbrcm_sdtest_set(struct brcmf_bus *bus, bool start)
  4342. {
  4343. struct sk_buff *pkt;
  4344. u8 *data;
  4345. /* Allocate the packet */
  4346. pkt = brcmu_pkt_buf_get_skb(SDPCM_HDRLEN + SDPCM_TEST_HDRLEN +
  4347. BRCMF_SDALIGN, true);
  4348. if (!pkt) {
  4349. BRCMF_ERROR(("%s: brcmu_pkt_buf_get_skb failed!\n", __func__));
  4350. return;
  4351. }
  4352. PKTALIGN(pkt, (SDPCM_HDRLEN + SDPCM_TEST_HDRLEN), BRCMF_SDALIGN);
  4353. data = (u8 *) (pkt->data) + SDPCM_HDRLEN;
  4354. /* Fill in the test header */
  4355. *data++ = SDPCM_TEST_SEND;
  4356. *data++ = start;
  4357. *data++ = (bus->pktgen_maxlen >> 0);
  4358. *data++ = (bus->pktgen_maxlen >> 8);
  4359. /* Send it */
  4360. if (brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true))
  4361. bus->pktgen_fail++;
  4362. }
  4363. static void
  4364. brcmf_sdbrcm_checkdied(struct brcmf_bus *bus, struct sk_buff *pkt, uint seq)
  4365. {
  4366. u8 *data;
  4367. uint pktlen;
  4368. u8 cmd;
  4369. u8 extra;
  4370. u16 len;
  4371. u16 offset;
  4372. /* Check for min length */
  4373. pktlen = pkt->len;
  4374. if (pktlen < SDPCM_TEST_HDRLEN) {
  4375. BRCMF_ERROR(("brcmf_sdbrcm_checkdied: toss runt frame, pktlen "
  4376. "%d\n", pktlen));
  4377. brcmu_pkt_buf_free_skb(pkt, false);
  4378. return;
  4379. }
  4380. /* Extract header fields */
  4381. data = pkt->data;
  4382. cmd = *data++;
  4383. extra = *data++;
  4384. len = *data++;
  4385. len += *data++ << 8;
  4386. /* Check length for relevant commands */
  4387. if (cmd == SDPCM_TEST_DISCARD || cmd == SDPCM_TEST_ECHOREQ
  4388. || cmd == SDPCM_TEST_ECHORSP) {
  4389. if (pktlen != len + SDPCM_TEST_HDRLEN) {
  4390. BRCMF_ERROR(("brcmf_sdbrcm_checkdied: frame length "
  4391. "mismatch, pktlen %d seq %d"
  4392. " cmd %d extra %d len %d\n",
  4393. pktlen, seq, cmd, extra, len));
  4394. brcmu_pkt_buf_free_skb(pkt, false);
  4395. return;
  4396. }
  4397. }
  4398. /* Process as per command */
  4399. switch (cmd) {
  4400. case SDPCM_TEST_ECHOREQ:
  4401. /* Rx->Tx turnaround ok (even on NDIS w/current
  4402. implementation) */
  4403. *(u8 *) (pkt->data) = SDPCM_TEST_ECHORSP;
  4404. if (brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true) == 0)
  4405. bus->pktgen_sent++;
  4406. else {
  4407. bus->pktgen_fail++;
  4408. brcmu_pkt_buf_free_skb(pkt, false);
  4409. }
  4410. bus->pktgen_rcvd++;
  4411. break;
  4412. case SDPCM_TEST_ECHORSP:
  4413. if (bus->ext_loop) {
  4414. brcmu_pkt_buf_free_skb(pkt, false);
  4415. bus->pktgen_rcvd++;
  4416. break;
  4417. }
  4418. for (offset = 0; offset < len; offset++, data++) {
  4419. if (*data != SDPCM_TEST_FILL(offset, extra)) {
  4420. BRCMF_ERROR(("brcmf_sdbrcm_checkdied: echo"
  4421. " data mismatch: "
  4422. "offset %d (len %d) "
  4423. "expect 0x%02x rcvd 0x%02x\n",
  4424. offset, len,
  4425. SDPCM_TEST_FILL(offset, extra),
  4426. *data));
  4427. break;
  4428. }
  4429. }
  4430. brcmu_pkt_buf_free_skb(pkt, false);
  4431. bus->pktgen_rcvd++;
  4432. break;
  4433. case SDPCM_TEST_DISCARD:
  4434. brcmu_pkt_buf_free_skb(pkt, false);
  4435. bus->pktgen_rcvd++;
  4436. break;
  4437. case SDPCM_TEST_BURST:
  4438. case SDPCM_TEST_SEND:
  4439. default:
  4440. BRCMF_INFO(("brcmf_sdbrcm_checkdied: unsupported or unknown "
  4441. "command, pktlen %d seq %d" " cmd %d extra %d"
  4442. " len %d\n", pktlen, seq, cmd, extra, len));
  4443. brcmu_pkt_buf_free_skb(pkt, false);
  4444. break;
  4445. }
  4446. /* For recv mode, stop at limie (and tell dongle to stop sending) */
  4447. if (bus->pktgen_mode == BRCMF_PKTGEN_RECV) {
  4448. if (bus->pktgen_total
  4449. && (bus->pktgen_rcvd >= bus->pktgen_total)) {
  4450. bus->pktgen_count = 0;
  4451. brcmf_sdbrcm_sdtest_set(bus, false);
  4452. }
  4453. }
  4454. }
  4455. #endif /* SDTEST */
  4456. extern bool brcmf_sdbrcm_bus_watchdog(struct brcmf_pub *drvr)
  4457. {
  4458. struct brcmf_bus *bus;
  4459. BRCMF_TIMER(("%s: Enter\n", __func__));
  4460. bus = drvr->bus;
  4461. if (bus->drvr->dongle_reset)
  4462. return false;
  4463. /* Ignore the timer if simulating bus down */
  4464. if (bus->sleeping)
  4465. return false;
  4466. brcmf_sdbrcm_sdlock(bus);
  4467. /* Poll period: check device if appropriate. */
  4468. if (bus->poll && (++bus->polltick >= bus->pollrate)) {
  4469. u32 intstatus = 0;
  4470. /* Reset poll tick */
  4471. bus->polltick = 0;
  4472. /* Check device if no interrupts */
  4473. if (!bus->intr || (bus->intrcount == bus->lastintrs)) {
  4474. if (!bus->dpc_sched) {
  4475. u8 devpend;
  4476. devpend = brcmf_sdcard_cfg_read(bus->card,
  4477. SDIO_FUNC_0, SDIO_CCCR_INTx,
  4478. NULL);
  4479. intstatus =
  4480. devpend & (INTR_STATUS_FUNC1 |
  4481. INTR_STATUS_FUNC2);
  4482. }
  4483. /* If there is something, make like the ISR and
  4484. schedule the DPC */
  4485. if (intstatus) {
  4486. bus->pollcnt++;
  4487. bus->ipend = true;
  4488. if (bus->intr)
  4489. brcmf_sdcard_intr_disable(bus->card);
  4490. bus->dpc_sched = true;
  4491. brcmf_sdbrcm_sched_dpc(bus);
  4492. }
  4493. }
  4494. /* Update interrupt tracking */
  4495. bus->lastintrs = bus->intrcount;
  4496. }
  4497. #ifdef BCMDBG
  4498. /* Poll for console output periodically */
  4499. if (drvr->busstate == BRCMF_BUS_DATA && brcmf_console_ms != 0) {
  4500. bus->console.count += brcmf_watchdog_ms;
  4501. if (bus->console.count >= brcmf_console_ms) {
  4502. bus->console.count -= brcmf_console_ms;
  4503. /* Make sure backplane clock is on */
  4504. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
  4505. if (brcmf_sdbrcm_readconsole(bus) < 0)
  4506. brcmf_console_ms = 0; /* On error,
  4507. stop trying */
  4508. }
  4509. }
  4510. #endif /* BCMDBG */
  4511. #ifdef SDTEST
  4512. /* Generate packets if configured */
  4513. if (bus->pktgen_count && (++bus->pktgen_tick >= bus->pktgen_freq)) {
  4514. /* Make sure backplane clock is on */
  4515. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
  4516. bus->pktgen_tick = 0;
  4517. brcmf_sdbrcm_pktgen(bus);
  4518. }
  4519. #endif
  4520. /* On idle timeout clear activity flag and/or turn off clock */
  4521. if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
  4522. if (++bus->idlecount >= bus->idletime) {
  4523. bus->idlecount = 0;
  4524. if (bus->activity) {
  4525. bus->activity = false;
  4526. brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
  4527. } else {
  4528. brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
  4529. }
  4530. }
  4531. }
  4532. brcmf_sdbrcm_sdunlock(bus);
  4533. return bus->ipend;
  4534. }
  4535. #ifdef BCMDBG
  4536. static int brcmf_sdbrcm_bus_console_in(struct brcmf_pub *drvr,
  4537. unsigned char *msg, uint msglen)
  4538. {
  4539. struct brcmf_bus *bus = drvr->bus;
  4540. u32 addr, val;
  4541. int rv;
  4542. struct sk_buff *pkt;
  4543. /* Address could be zero if CONSOLE := 0 in dongle Makefile */
  4544. if (bus->console_addr == 0)
  4545. return -ENOTSUPP;
  4546. /* Exclusive bus access */
  4547. brcmf_sdbrcm_sdlock(bus);
  4548. /* Don't allow input if dongle is in reset */
  4549. if (bus->drvr->dongle_reset) {
  4550. brcmf_sdbrcm_sdunlock(bus);
  4551. return -EPERM;
  4552. }
  4553. /* Request clock to allow SDIO accesses */
  4554. BUS_WAKE(bus);
  4555. /* No pend allowed since txpkt is called later, ht clk has to be on */
  4556. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
  4557. /* Zero cbuf_index */
  4558. addr = bus->console_addr + offsetof(struct rte_console, cbuf_idx);
  4559. val = cpu_to_le32(0);
  4560. rv = brcmf_sdbrcm_membytes(bus, true, addr, (u8 *)&val, sizeof(val));
  4561. if (rv < 0)
  4562. goto done;
  4563. /* Write message into cbuf */
  4564. addr = bus->console_addr + offsetof(struct rte_console, cbuf);
  4565. rv = brcmf_sdbrcm_membytes(bus, true, addr, (u8 *)msg, msglen);
  4566. if (rv < 0)
  4567. goto done;
  4568. /* Write length into vcons_in */
  4569. addr = bus->console_addr + offsetof(struct rte_console, vcons_in);
  4570. val = cpu_to_le32(msglen);
  4571. rv = brcmf_sdbrcm_membytes(bus, true, addr, (u8 *)&val, sizeof(val));
  4572. if (rv < 0)
  4573. goto done;
  4574. /* Bump dongle by sending an empty event pkt.
  4575. * sdpcm_sendup (RX) checks for virtual console input.
  4576. */
  4577. pkt = brcmu_pkt_buf_get_skb(4 + SDPCM_RESERVE);
  4578. if ((pkt != NULL) && bus->clkstate == CLK_AVAIL)
  4579. brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_EVENT_CHANNEL, true);
  4580. done:
  4581. if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) {
  4582. bus->activity = false;
  4583. brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
  4584. }
  4585. brcmf_sdbrcm_sdunlock(bus);
  4586. return rv;
  4587. }
  4588. #endif /* BCMDBG */
  4589. static bool brcmf_sdbrcm_chipmatch(u16 chipid)
  4590. {
  4591. if (chipid == BCM4325_CHIP_ID)
  4592. return true;
  4593. if (chipid == BCM4329_CHIP_ID)
  4594. return true;
  4595. if (chipid == BCM4319_CHIP_ID)
  4596. return true;
  4597. return false;
  4598. }
  4599. static void *brcmf_sdbrcm_probe(u16 venid, u16 devid, u16 bus_no,
  4600. u16 slot, u16 func, uint bustype, u32 regsva,
  4601. void *card)
  4602. {
  4603. int ret;
  4604. struct brcmf_bus *bus;
  4605. /* Init global variables at run-time, not as part of the declaration.
  4606. * This is required to support init/de-init of the driver.
  4607. * Initialization
  4608. * of globals as part of the declaration results in non-deterministic
  4609. * behavior since the value of the globals may be different on the
  4610. * first time that the driver is initialized vs subsequent
  4611. * initializations.
  4612. */
  4613. brcmf_txbound = BRCMF_TXBOUND;
  4614. brcmf_rxbound = BRCMF_RXBOUND;
  4615. brcmf_alignctl = true;
  4616. sd1idle = true;
  4617. brcmf_readahead = true;
  4618. retrydata = false;
  4619. brcmf_dongle_memsize = 0;
  4620. brcmf_txminmax = BRCMF_TXMINMAX;
  4621. forcealign = true;
  4622. brcmf_c_init();
  4623. BRCMF_TRACE(("%s: Enter\n", __func__));
  4624. BRCMF_INFO(("%s: venid 0x%04x devid 0x%04x\n", __func__, venid, devid));
  4625. /* We make an assumption about address window mappings:
  4626. * regsva == SI_ENUM_BASE*/
  4627. /* SDIO car passes venid and devid based on CIS parsing -- but
  4628. * low-power start
  4629. * means early parse could fail, so here we should get either an ID
  4630. * we recognize OR (-1) indicating we must request power first.
  4631. */
  4632. /* Check the Vendor ID */
  4633. switch (venid) {
  4634. case 0x0000:
  4635. case PCI_VENDOR_ID_BROADCOM:
  4636. break;
  4637. default:
  4638. BRCMF_ERROR(("%s: unknown vendor: 0x%04x\n", __func__, venid));
  4639. return NULL;
  4640. }
  4641. /* Check the Device ID and make sure it's one that we support */
  4642. switch (devid) {
  4643. case BCM4325_D11DUAL_ID: /* 4325 802.11a/g id */
  4644. case BCM4325_D11G_ID: /* 4325 802.11g 2.4Ghz band id */
  4645. case BCM4325_D11A_ID: /* 4325 802.11a 5Ghz band id */
  4646. BRCMF_INFO(("%s: found 4325 Dongle\n", __func__));
  4647. break;
  4648. case BCM4329_D11NDUAL_ID: /* 4329 802.11n dualband device */
  4649. case BCM4329_D11N2G_ID: /* 4329 802.11n 2.4G device */
  4650. case BCM4329_D11N5G_ID: /* 4329 802.11n 5G device */
  4651. case 0x4329:
  4652. BRCMF_INFO(("%s: found 4329 Dongle\n", __func__));
  4653. break;
  4654. case BCM4319_D11N_ID: /* 4319 802.11n id */
  4655. case BCM4319_D11N2G_ID: /* 4319 802.11n2g id */
  4656. case BCM4319_D11N5G_ID: /* 4319 802.11n5g id */
  4657. BRCMF_INFO(("%s: found 4319 Dongle\n", __func__));
  4658. break;
  4659. case 0:
  4660. BRCMF_INFO(("%s: allow device id 0, will check chip"
  4661. " internals\n", __func__));
  4662. break;
  4663. default:
  4664. BRCMF_ERROR(("%s: skipping 0x%04x/0x%04x, not a dongle\n",
  4665. __func__, venid, devid));
  4666. return NULL;
  4667. }
  4668. /* Allocate private bus interface state */
  4669. bus = kzalloc(sizeof(struct brcmf_bus), GFP_ATOMIC);
  4670. if (!bus) {
  4671. BRCMF_ERROR(("%s: kmalloc of struct dhd_bus failed\n",
  4672. __func__));
  4673. goto fail;
  4674. }
  4675. bus->card = card;
  4676. bus->cl_devid = (u16) devid;
  4677. bus->bus = BRCMF_BUS;
  4678. bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
  4679. bus->usebufpool = false; /* Use bufpool if allocated,
  4680. else use locally malloced rxbuf */
  4681. /* attempt to attach to the dongle */
  4682. if (!(brcmf_sdbrcm_probe_attach(bus, card, regsva, devid))) {
  4683. BRCMF_ERROR(("%s: brcmf_sdbrcm_probe_attach failed\n",
  4684. __func__));
  4685. goto fail;
  4686. }
  4687. spin_lock_init(&bus->txqlock);
  4688. init_waitqueue_head(&bus->ctrl_wait);
  4689. /* Set up the watchdog timer */
  4690. init_timer(&bus->timer);
  4691. bus->timer.data = (unsigned long)bus;
  4692. bus->timer.function = brcmf_sdbrcm_watchdog;
  4693. /* Initialize thread based operation and lock */
  4694. if ((brcmf_watchdog_prio >= 0) && (brcmf_dpc_prio >= 0)) {
  4695. bus->threads_only = true;
  4696. sema_init(&bus->sdsem, 1);
  4697. } else {
  4698. bus->threads_only = false;
  4699. spin_lock_init(&bus->sdlock);
  4700. }
  4701. if (brcmf_dpc_prio >= 0) {
  4702. /* Initialize watchdog thread */
  4703. init_completion(&bus->watchdog_wait);
  4704. bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
  4705. bus, "brcmf_watchdog");
  4706. if (IS_ERR(bus->watchdog_tsk)) {
  4707. printk(KERN_WARNING
  4708. "brcmf_watchdog thread failed to start\n");
  4709. bus->watchdog_tsk = NULL;
  4710. }
  4711. } else
  4712. bus->watchdog_tsk = NULL;
  4713. /* Set up the bottom half handler */
  4714. if (brcmf_dpc_prio >= 0) {
  4715. /* Initialize DPC thread */
  4716. init_completion(&bus->dpc_wait);
  4717. bus->dpc_tsk = kthread_run(brcmf_sdbrcm_dpc_thread,
  4718. bus, "brcmf_dpc");
  4719. if (IS_ERR(bus->dpc_tsk)) {
  4720. printk(KERN_WARNING
  4721. "brcmf_dpc thread failed to start\n");
  4722. bus->dpc_tsk = NULL;
  4723. }
  4724. } else {
  4725. tasklet_init(&bus->tasklet, brcmf_sdbrcm_dpc_tasklet,
  4726. (unsigned long)bus);
  4727. bus->dpc_tsk = NULL;
  4728. }
  4729. /* Attach to the brcmf/OS/network interface */
  4730. bus->drvr = brcmf_attach(bus, SDPCM_RESERVE);
  4731. if (!bus->drvr) {
  4732. BRCMF_ERROR(("%s: brcmf_attach failed\n", __func__));
  4733. goto fail;
  4734. }
  4735. /* Allocate buffers */
  4736. if (!(brcmf_sdbrcm_probe_malloc(bus, card))) {
  4737. BRCMF_ERROR(("%s: brcmf_sdbrcm_probe_malloc failed\n",
  4738. __func__));
  4739. goto fail;
  4740. }
  4741. if (!(brcmf_sdbrcm_probe_init(bus, card))) {
  4742. BRCMF_ERROR(("%s: brcmf_sdbrcm_probe_init failed\n", __func__));
  4743. goto fail;
  4744. }
  4745. /* Register interrupt callback, but mask it (not operational yet). */
  4746. BRCMF_INTR(("%s: disable SDIO interrupts (not interested yet)\n",
  4747. __func__));
  4748. brcmf_sdcard_intr_disable(card);
  4749. ret = brcmf_sdcard_intr_reg(card, brcmf_sdbrcm_isr, bus);
  4750. if (ret != 0) {
  4751. BRCMF_ERROR(("%s: FAILED: sdcard_intr_reg returned %d\n",
  4752. __func__, ret));
  4753. goto fail;
  4754. }
  4755. BRCMF_INTR(("%s: registered SDIO interrupt function ok\n", __func__));
  4756. BRCMF_INFO(("%s: completed!!\n", __func__));
  4757. /* if firmware path present try to download and bring up bus */
  4758. ret = brcmf_bus_start(bus->drvr);
  4759. if (ret != 0) {
  4760. if (ret == -ENOLINK) {
  4761. BRCMF_ERROR(("%s: dongle is not responding\n",
  4762. __func__));
  4763. goto fail;
  4764. }
  4765. }
  4766. /* Ok, have the per-port tell the stack we're open for business */
  4767. if (brcmf_net_attach(bus->drvr, 0) != 0) {
  4768. BRCMF_ERROR(("%s: Net attach failed!!\n", __func__));
  4769. goto fail;
  4770. }
  4771. return bus;
  4772. fail:
  4773. brcmf_sdbrcm_release(bus);
  4774. return NULL;
  4775. }
  4776. static bool
  4777. brcmf_sdbrcm_probe_attach(struct brcmf_bus *bus, void *card, u32 regsva,
  4778. u16 devid)
  4779. {
  4780. u8 clkctl = 0;
  4781. int err = 0;
  4782. bus->alp_only = true;
  4783. /* Return the window to backplane enumeration space for core access */
  4784. if (brcmf_sdbrcm_set_siaddr_window(bus, SI_ENUM_BASE))
  4785. BRCMF_ERROR(("%s: FAILED to return to SI_ENUM_BASE\n",
  4786. __func__));
  4787. #ifdef BCMDBG
  4788. printk(KERN_DEBUG "F1 signature read @0x18000000=0x%4x\n",
  4789. brcmf_sdcard_reg_read(bus->card, SI_ENUM_BASE, 4));
  4790. #endif /* BCMDBG */
  4791. /*
  4792. * Force PLL off until brcmf_sdbrcm_chip_attach()
  4793. * programs PLL control regs
  4794. */
  4795. brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
  4796. BRCMF_INIT_CLKCTL1, &err);
  4797. if (!err)
  4798. clkctl =
  4799. brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
  4800. SBSDIO_FUNC1_CHIPCLKCSR, &err);
  4801. if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
  4802. BRCMF_ERROR(("brcmf_sdbrcm_probe: ChipClkCSR access: err %d"
  4803. " wrote 0x%02x read 0x%02x\n",
  4804. err, BRCMF_INIT_CLKCTL1, clkctl));
  4805. goto fail;
  4806. }
  4807. if (brcmf_sdbrcm_chip_attach(bus, regsva)) {
  4808. BRCMF_ERROR(("%s: brcmf_sdbrcm_chip_attach failed!\n",
  4809. __func__));
  4810. goto fail;
  4811. }
  4812. if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) {
  4813. BRCMF_ERROR(("%s: unsupported chip: 0x%04x\n",
  4814. __func__, bus->ci->chip));
  4815. goto fail;
  4816. }
  4817. brcmf_sdbrcm_sdiod_drive_strength_init(bus, brcmf_sdiod_drive_strength);
  4818. /* Get info on the ARM and SOCRAM cores... */
  4819. if (!BRCMF_NOPMU(bus)) {
  4820. brcmf_sdcard_reg_read(bus->card,
  4821. CORE_SB(bus->ci->armcorebase, sbidhigh), 4);
  4822. bus->orig_ramsize = bus->ci->ramsize;
  4823. if (!(bus->orig_ramsize)) {
  4824. BRCMF_ERROR(("%s: failed to find SOCRAM memory!\n",
  4825. __func__));
  4826. goto fail;
  4827. }
  4828. bus->ramsize = bus->orig_ramsize;
  4829. if (brcmf_dongle_memsize)
  4830. brcmf_sdbrcm_setmemsize(bus, brcmf_dongle_memsize);
  4831. BRCMF_ERROR(("DHD: dongle ram size is set to %d(orig %d)\n",
  4832. bus->ramsize, bus->orig_ramsize));
  4833. }
  4834. /* Set core control so an SDIO reset does a backplane reset */
  4835. OR_REG(bus->ci->buscorebase + offsetof(struct sdpcmd_regs,
  4836. corecontrol),
  4837. CC_BPRESEN, u32);
  4838. brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
  4839. /* Locate an appropriately-aligned portion of hdrbuf */
  4840. bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
  4841. BRCMF_SDALIGN);
  4842. /* Set the poll and/or interrupt flags */
  4843. bus->intr = (bool) brcmf_intr;
  4844. bus->poll = (bool) brcmf_poll;
  4845. if (bus->poll)
  4846. bus->pollrate = 1;
  4847. return true;
  4848. fail:
  4849. return false;
  4850. }
  4851. static bool brcmf_sdbrcm_probe_malloc(struct brcmf_bus *bus, void *card)
  4852. {
  4853. BRCMF_TRACE(("%s: Enter\n", __func__));
  4854. if (bus->drvr->maxctl) {
  4855. bus->rxblen =
  4856. roundup((bus->drvr->maxctl + SDPCM_HDRLEN),
  4857. ALIGNMENT) + BRCMF_SDALIGN;
  4858. bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
  4859. if (!(bus->rxbuf)) {
  4860. BRCMF_ERROR(("%s: kmalloc of %d-byte rxbuf failed\n",
  4861. __func__, bus->rxblen));
  4862. goto fail;
  4863. }
  4864. }
  4865. /* Allocate buffer to receive glomed packet */
  4866. bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
  4867. if (!(bus->databuf)) {
  4868. BRCMF_ERROR(("%s: kmalloc of %d-byte databuf failed\n",
  4869. __func__, MAX_DATA_BUF));
  4870. /* release rxbuf which was already located as above */
  4871. if (!bus->rxblen)
  4872. kfree(bus->rxbuf);
  4873. goto fail;
  4874. }
  4875. /* Align the buffer */
  4876. if ((unsigned long)bus->databuf % BRCMF_SDALIGN)
  4877. bus->dataptr = bus->databuf + (BRCMF_SDALIGN -
  4878. ((unsigned long)bus->databuf % BRCMF_SDALIGN));
  4879. else
  4880. bus->dataptr = bus->databuf;
  4881. return true;
  4882. fail:
  4883. return false;
  4884. }
  4885. static bool brcmf_sdbrcm_probe_init(struct brcmf_bus *bus, void *card)
  4886. {
  4887. s32 fnum;
  4888. BRCMF_TRACE(("%s: Enter\n", __func__));
  4889. #ifdef SDTEST
  4890. brcmf_sdbrcm_pktgen_init(bus);
  4891. #endif /* SDTEST */
  4892. /* Disable F2 to clear any intermediate frame state on the dongle */
  4893. brcmf_sdcard_cfg_write(card, SDIO_FUNC_0, SDIO_CCCR_IOEx,
  4894. SDIO_FUNC_ENABLE_1, NULL);
  4895. bus->drvr->busstate = BRCMF_BUS_DOWN;
  4896. bus->sleeping = false;
  4897. bus->rxflow = false;
  4898. /* Done with backplane-dependent accesses, can drop clock... */
  4899. brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, 0,
  4900. NULL);
  4901. /* ...and initialize clock/power states */
  4902. bus->clkstate = CLK_SDONLY;
  4903. bus->idletime = (s32) brcmf_idletime;
  4904. bus->idleclock = BRCMF_IDLE_ACTIVE;
  4905. /* Query the F2 block size, set roundup accordingly */
  4906. fnum = 2;
  4907. if (brcmf_sdcard_iovar_op(card, "sd_blocksize", &fnum, sizeof(s32),
  4908. &bus->blocksize, sizeof(s32), false) != 0) {
  4909. bus->blocksize = 0;
  4910. BRCMF_ERROR(("%s: fail on %s get\n", __func__, "sd_blocksize"));
  4911. } else {
  4912. BRCMF_INFO(("%s: Initial value for %s is %d\n",
  4913. __func__, "sd_blocksize", bus->blocksize));
  4914. }
  4915. bus->roundup = min(max_roundup, bus->blocksize);
  4916. /* Query if bus module supports packet chaining,
  4917. default to use if supported */
  4918. if (brcmf_sdcard_iovar_op(card, "sd_rxchain", NULL, 0,
  4919. &bus->sd_rxchain, sizeof(s32),
  4920. false) != 0) {
  4921. bus->sd_rxchain = false;
  4922. } else {
  4923. BRCMF_INFO(("%s: bus module (through sdiocard API) %s"
  4924. " chaining\n", __func__, bus->sd_rxchain
  4925. ? "supports" : "does not support"));
  4926. }
  4927. bus->use_rxchain = (bool) bus->sd_rxchain;
  4928. return true;
  4929. }
  4930. static bool
  4931. brcmf_sdbrcm_download_firmware(struct brcmf_bus *bus, void *card)
  4932. {
  4933. bool ret;
  4934. /* Download the firmware */
  4935. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
  4936. ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
  4937. brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
  4938. return ret;
  4939. }
  4940. /* Detach and free everything */
  4941. static void brcmf_sdbrcm_release(struct brcmf_bus *bus)
  4942. {
  4943. BRCMF_TRACE(("%s: Enter\n", __func__));
  4944. if (bus) {
  4945. /* De-register interrupt handler */
  4946. brcmf_sdcard_intr_disable(bus->card);
  4947. brcmf_sdcard_intr_dereg(bus->card);
  4948. if (bus->drvr) {
  4949. brcmf_detach(bus->drvr);
  4950. brcmf_sdbrcm_release_dongle(bus);
  4951. bus->drvr = NULL;
  4952. }
  4953. brcmf_sdbrcm_release_malloc(bus);
  4954. kfree(bus);
  4955. }
  4956. BRCMF_TRACE(("%s: Disconnected\n", __func__));
  4957. }
  4958. static void brcmf_sdbrcm_release_malloc(struct brcmf_bus *bus)
  4959. {
  4960. BRCMF_TRACE(("%s: Enter\n", __func__));
  4961. if (bus->drvr && bus->drvr->dongle_reset)
  4962. return;
  4963. kfree(bus->rxbuf);
  4964. bus->rxctl = bus->rxbuf = NULL;
  4965. bus->rxlen = 0;
  4966. kfree(bus->databuf);
  4967. bus->databuf = NULL;
  4968. }
  4969. static void brcmf_sdbrcm_release_dongle(struct brcmf_bus *bus)
  4970. {
  4971. BRCMF_TRACE(("%s: Enter\n", __func__));
  4972. if (bus->drvr && bus->drvr->dongle_reset)
  4973. return;
  4974. if (bus->ci) {
  4975. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
  4976. brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
  4977. brcmf_sdbrcm_chip_detach(bus);
  4978. if (bus->vars && bus->varsz)
  4979. kfree(bus->vars);
  4980. bus->vars = NULL;
  4981. }
  4982. BRCMF_TRACE(("%s: Disconnected\n", __func__));
  4983. }
  4984. static void brcmf_sdbrcm_disconnect(void *ptr)
  4985. {
  4986. struct brcmf_bus *bus = (struct brcmf_bus *)ptr;
  4987. BRCMF_TRACE(("%s: Enter\n", __func__));
  4988. if (bus) {
  4989. brcmf_sdbrcm_release(bus);
  4990. }
  4991. BRCMF_TRACE(("%s: Disconnected\n", __func__));
  4992. }
  4993. /* Register/Unregister functions are called by the main DHD entry
  4994. * point (e.g. module insertion) to link with the bus driver, in
  4995. * order to look for or await the device.
  4996. */
  4997. static struct brcmf_sdioh_driver brcmf_sdio = {
  4998. brcmf_sdbrcm_probe,
  4999. brcmf_sdbrcm_disconnect
  5000. };
  5001. int brcmf_bus_register(void)
  5002. {
  5003. BRCMF_TRACE(("%s: Enter\n", __func__));
  5004. /* Sanity check on the module parameters */
  5005. do {
  5006. /* Both watchdog and DPC as tasklets are ok */
  5007. if ((brcmf_watchdog_prio < 0) && (brcmf_dpc_prio < 0))
  5008. break;
  5009. /* If both watchdog and DPC are threads, TX must be deferred */
  5010. if ((brcmf_watchdog_prio >= 0) && (brcmf_dpc_prio >= 0)
  5011. && brcmf_deferred_tx)
  5012. break;
  5013. BRCMF_ERROR(("Invalid module parameters.\n"));
  5014. return -EINVAL;
  5015. } while (0);
  5016. return brcmf_sdio_register(&brcmf_sdio);
  5017. }
  5018. void brcmf_bus_unregister(void)
  5019. {
  5020. BRCMF_TRACE(("%s: Enter\n", __func__));
  5021. brcmf_sdio_unregister();
  5022. }
  5023. static int brcmf_sdbrcm_download_code_file(struct brcmf_bus *bus)
  5024. {
  5025. int offset = 0;
  5026. uint len;
  5027. u8 *memblock = NULL, *memptr;
  5028. int ret;
  5029. BRCMF_INFO(("%s: Enter\n", __func__));
  5030. bus->fw_name = BCM4329_FW_NAME;
  5031. ret = request_firmware(&bus->firmware, bus->fw_name,
  5032. &gInstance->func[2]->dev);
  5033. if (ret) {
  5034. BRCMF_ERROR(("%s: Fail to request firmware %d\n",
  5035. __func__, ret));
  5036. return ret;
  5037. }
  5038. bus->fw_ptr = 0;
  5039. memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC);
  5040. if (memblock == NULL) {
  5041. BRCMF_ERROR(("%s: Failed to allocate memory %d bytes\n",
  5042. __func__, MEMBLOCK));
  5043. ret = -ENOMEM;
  5044. goto err;
  5045. }
  5046. if ((u32)(unsigned long)memblock % BRCMF_SDALIGN)
  5047. memptr += (BRCMF_SDALIGN -
  5048. ((u32)(unsigned long)memblock % BRCMF_SDALIGN));
  5049. /* Download image */
  5050. while ((len =
  5051. brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus))) {
  5052. ret = brcmf_sdbrcm_membytes(bus, true, offset, memptr, len);
  5053. if (ret) {
  5054. BRCMF_ERROR(("%s: error %d on writing %d membytes at "
  5055. "0x%08x\n", __func__, ret, MEMBLOCK,
  5056. offset));
  5057. goto err;
  5058. }
  5059. offset += MEMBLOCK;
  5060. }
  5061. err:
  5062. kfree(memblock);
  5063. release_firmware(bus->firmware);
  5064. bus->fw_ptr = 0;
  5065. return ret;
  5066. }
  5067. /*
  5068. * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
  5069. * and ending in a NUL.
  5070. * Removes carriage returns, empty lines, comment lines, and converts
  5071. * newlines to NULs.
  5072. * Shortens buffer as needed and pads with NULs. End of buffer is marked
  5073. * by two NULs.
  5074. */
  5075. static uint brcmf_process_nvram_vars(char *varbuf, uint len)
  5076. {
  5077. char *dp;
  5078. bool findNewline;
  5079. int column;
  5080. uint buf_len, n;
  5081. dp = varbuf;
  5082. findNewline = false;
  5083. column = 0;
  5084. for (n = 0; n < len; n++) {
  5085. if (varbuf[n] == 0)
  5086. break;
  5087. if (varbuf[n] == '\r')
  5088. continue;
  5089. if (findNewline && varbuf[n] != '\n')
  5090. continue;
  5091. findNewline = false;
  5092. if (varbuf[n] == '#') {
  5093. findNewline = true;
  5094. continue;
  5095. }
  5096. if (varbuf[n] == '\n') {
  5097. if (column == 0)
  5098. continue;
  5099. *dp++ = 0;
  5100. column = 0;
  5101. continue;
  5102. }
  5103. *dp++ = varbuf[n];
  5104. column++;
  5105. }
  5106. buf_len = dp - varbuf;
  5107. while (dp < varbuf + n)
  5108. *dp++ = 0;
  5109. return buf_len;
  5110. }
  5111. static int brcmf_sdbrcm_download_nvram(struct brcmf_bus *bus)
  5112. {
  5113. uint len;
  5114. char *memblock = NULL;
  5115. char *bufp;
  5116. int ret;
  5117. bus->nv_name = BCM4329_NV_NAME;
  5118. ret = request_firmware(&bus->firmware, bus->nv_name,
  5119. &gInstance->func[2]->dev);
  5120. if (ret) {
  5121. BRCMF_ERROR(("%s: Fail to request nvram %d\n", __func__, ret));
  5122. return ret;
  5123. }
  5124. bus->fw_ptr = 0;
  5125. memblock = kmalloc(MEMBLOCK, GFP_ATOMIC);
  5126. if (memblock == NULL) {
  5127. BRCMF_ERROR(("%s: Failed to allocate memory %d bytes\n",
  5128. __func__, MEMBLOCK));
  5129. ret = -ENOMEM;
  5130. goto err;
  5131. }
  5132. len = brcmf_sdbrcm_get_image(memblock, MEMBLOCK, bus);
  5133. if (len > 0 && len < MEMBLOCK) {
  5134. bufp = (char *)memblock;
  5135. bufp[len] = 0;
  5136. len = brcmf_process_nvram_vars(bufp, len);
  5137. bufp += len;
  5138. *bufp++ = 0;
  5139. if (len)
  5140. ret = brcmf_sdbrcm_downloadvars(bus, memblock, len + 1);
  5141. if (ret)
  5142. BRCMF_ERROR(("%s: error downloading vars: %d\n",
  5143. __func__, ret));
  5144. } else {
  5145. BRCMF_ERROR(("%s: error reading nvram file: %d\n",
  5146. __func__, len));
  5147. ret = -EIO;
  5148. }
  5149. err:
  5150. kfree(memblock);
  5151. release_firmware(bus->firmware);
  5152. bus->fw_ptr = 0;
  5153. return ret;
  5154. }
  5155. static int _brcmf_sdbrcm_download_firmware(struct brcmf_bus *bus)
  5156. {
  5157. int bcmerror = -1;
  5158. /* Keep arm in reset */
  5159. if (brcmf_sdbrcm_download_state(bus, true)) {
  5160. BRCMF_ERROR(("%s: error placing ARM core in reset\n",
  5161. __func__));
  5162. goto err;
  5163. }
  5164. /* External image takes precedence if specified */
  5165. if (brcmf_sdbrcm_download_code_file(bus)) {
  5166. BRCMF_ERROR(("%s: dongle image file download failed\n",
  5167. __func__));
  5168. goto err;
  5169. }
  5170. /* External nvram takes precedence if specified */
  5171. if (brcmf_sdbrcm_download_nvram(bus)) {
  5172. BRCMF_ERROR(("%s: dongle nvram file download failed\n",
  5173. __func__));
  5174. }
  5175. /* Take arm out of reset */
  5176. if (brcmf_sdbrcm_download_state(bus, false)) {
  5177. BRCMF_ERROR(("%s: error getting out of ARM core reset\n",
  5178. __func__));
  5179. goto err;
  5180. }
  5181. bcmerror = 0;
  5182. err:
  5183. return bcmerror;
  5184. }
  5185. static int
  5186. brcmf_sdbrcm_send_buf(struct brcmf_bus *bus, u32 addr, uint fn, uint flags,
  5187. u8 *buf, uint nbytes, struct sk_buff *pkt,
  5188. void (*complete)(void *handle, int status,
  5189. bool sync_waiting),
  5190. void *handle)
  5191. {
  5192. return brcmf_sdcard_send_buf
  5193. (bus->card, addr, fn, flags, buf, nbytes, pkt, complete,
  5194. handle);
  5195. }
  5196. int brcmf_bus_devreset(struct brcmf_pub *drvr, u8 flag)
  5197. {
  5198. int bcmerror = 0;
  5199. struct brcmf_bus *bus;
  5200. bus = drvr->bus;
  5201. if (flag == true) {
  5202. brcmf_sdbrcm_wd_timer(bus, 0);
  5203. if (!bus->drvr->dongle_reset) {
  5204. /* Expect app to have torn down any
  5205. connection before calling */
  5206. /* Stop the bus, disable F2 */
  5207. brcmf_sdbrcm_bus_stop(bus, false);
  5208. /* Clean tx/rx buffer pointers,
  5209. detach from the dongle */
  5210. brcmf_sdbrcm_release_dongle(bus);
  5211. bus->drvr->dongle_reset = true;
  5212. bus->drvr->up = false;
  5213. BRCMF_TRACE(("%s: WLAN OFF DONE\n", __func__));
  5214. /* App can now remove power from device */
  5215. } else
  5216. bcmerror = -EIO;
  5217. } else {
  5218. /* App must have restored power to device before calling */
  5219. BRCMF_TRACE(("\n\n%s: == WLAN ON ==\n", __func__));
  5220. if (bus->drvr->dongle_reset) {
  5221. /* Turn on WLAN */
  5222. /* Attempt to re-attach & download */
  5223. if (brcmf_sdbrcm_probe_attach(bus, bus->card,
  5224. SI_ENUM_BASE,
  5225. bus->cl_devid)) {
  5226. /* Attempt to download binary to the dongle */
  5227. if (brcmf_sdbrcm_probe_init(bus, bus->card)) {
  5228. /* Re-init bus, enable F2 transfer */
  5229. brcmf_sdbrcm_bus_init(bus->drvr, false);
  5230. bus->drvr->dongle_reset = false;
  5231. bus->drvr->up = true;
  5232. BRCMF_TRACE(("%s: WLAN ON DONE\n",
  5233. __func__));
  5234. } else
  5235. bcmerror = -EIO;
  5236. } else
  5237. bcmerror = -EIO;
  5238. } else {
  5239. bcmerror = -EISCONN;
  5240. BRCMF_ERROR(("%s: Set DEVRESET=false invoked when"
  5241. " device is on\n", __func__));
  5242. bcmerror = -EIO;
  5243. }
  5244. brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
  5245. }
  5246. return bcmerror;
  5247. }
  5248. static int
  5249. brcmf_sdbrcm_chip_recognition(struct brcmf_sdio_card *card,
  5250. struct chip_info *ci, u32 regs)
  5251. {
  5252. u32 regdata;
  5253. /*
  5254. * Get CC core rev
  5255. * Chipid is assume to be at offset 0 from regs arg
  5256. * For different chiptypes or old sdio hosts w/o chipcommon,
  5257. * other ways of recognition should be added here.
  5258. */
  5259. ci->cccorebase = regs;
  5260. regdata = brcmf_sdcard_reg_read(card,
  5261. CORE_CC_REG(ci->cccorebase, chipid), 4);
  5262. ci->chip = regdata & CID_ID_MASK;
  5263. ci->chiprev = (regdata & CID_REV_MASK) >> CID_REV_SHIFT;
  5264. BRCMF_INFO(("%s: chipid=0x%x chiprev=%d\n",
  5265. __func__, ci->chip, ci->chiprev));
  5266. /* Address of cores for new chips should be added here */
  5267. switch (ci->chip) {
  5268. case BCM4329_CHIP_ID:
  5269. ci->buscorebase = BCM4329_CORE_BUS_BASE;
  5270. ci->ramcorebase = BCM4329_CORE_SOCRAM_BASE;
  5271. ci->armcorebase = BCM4329_CORE_ARM_BASE;
  5272. ci->ramsize = BCM4329_RAMSIZE;
  5273. break;
  5274. default:
  5275. BRCMF_ERROR(("%s: chipid 0x%x is not supported\n",
  5276. __func__, ci->chip));
  5277. return -ENODEV;
  5278. }
  5279. regdata = brcmf_sdcard_reg_read(card,
  5280. CORE_SB(ci->cccorebase, sbidhigh), 4);
  5281. ci->ccrev = SBCOREREV(regdata);
  5282. regdata = brcmf_sdcard_reg_read(card,
  5283. CORE_CC_REG(ci->cccorebase, pmucapabilities), 4);
  5284. ci->pmurev = regdata & PCAP_REV_MASK;
  5285. regdata = brcmf_sdcard_reg_read(card,
  5286. CORE_SB(ci->buscorebase, sbidhigh), 4);
  5287. ci->buscorerev = SBCOREREV(regdata);
  5288. ci->buscoretype = (regdata & SBIDH_CC_MASK) >> SBIDH_CC_SHIFT;
  5289. BRCMF_INFO(("%s: ccrev=%d, pmurev=%d, buscore rev/type=%d/0x%x\n",
  5290. __func__, ci->ccrev, ci->pmurev,
  5291. ci->buscorerev, ci->buscoretype));
  5292. /* get chipcommon capabilites */
  5293. ci->cccaps = brcmf_sdcard_reg_read(card,
  5294. CORE_CC_REG(ci->cccorebase, capabilities), 4);
  5295. return 0;
  5296. }
  5297. static void
  5298. brcmf_sdbrcm_chip_disablecore(struct brcmf_sdio_card *card, u32 corebase)
  5299. {
  5300. u32 regdata;
  5301. regdata = brcmf_sdcard_reg_read(card,
  5302. CORE_SB(corebase, sbtmstatelow), 4);
  5303. if (regdata & SBTML_RESET)
  5304. return;
  5305. regdata = brcmf_sdcard_reg_read(card,
  5306. CORE_SB(corebase, sbtmstatelow), 4);
  5307. if ((regdata & (SICF_CLOCK_EN << SBTML_SICF_SHIFT)) != 0) {
  5308. /*
  5309. * set target reject and spin until busy is clear
  5310. * (preserve core-specific bits)
  5311. */
  5312. regdata = brcmf_sdcard_reg_read(card,
  5313. CORE_SB(corebase, sbtmstatelow), 4);
  5314. brcmf_sdcard_reg_write(card, CORE_SB(corebase, sbtmstatelow), 4,
  5315. regdata | SBTML_REJ);
  5316. regdata = brcmf_sdcard_reg_read(card,
  5317. CORE_SB(corebase, sbtmstatelow), 4);
  5318. udelay(1);
  5319. SPINWAIT((brcmf_sdcard_reg_read(card,
  5320. CORE_SB(corebase, sbtmstatehigh), 4) &
  5321. SBTMH_BUSY), 100000);
  5322. regdata = brcmf_sdcard_reg_read(card,
  5323. CORE_SB(corebase, sbtmstatehigh), 4);
  5324. if (regdata & SBTMH_BUSY)
  5325. BRCMF_ERROR(("%s: ARM core still busy\n", __func__));
  5326. regdata = brcmf_sdcard_reg_read(card,
  5327. CORE_SB(corebase, sbidlow), 4);
  5328. if (regdata & SBIDL_INIT) {
  5329. regdata = brcmf_sdcard_reg_read(card,
  5330. CORE_SB(corebase, sbimstate), 4) |
  5331. SBIM_RJ;
  5332. brcmf_sdcard_reg_write(card,
  5333. CORE_SB(corebase, sbimstate), 4,
  5334. regdata);
  5335. regdata = brcmf_sdcard_reg_read(card,
  5336. CORE_SB(corebase, sbimstate), 4);
  5337. udelay(1);
  5338. SPINWAIT((brcmf_sdcard_reg_read(card,
  5339. CORE_SB(corebase, sbimstate), 4) &
  5340. SBIM_BY), 100000);
  5341. }
  5342. /* set reset and reject while enabling the clocks */
  5343. brcmf_sdcard_reg_write(card,
  5344. CORE_SB(corebase, sbtmstatelow), 4,
  5345. (((SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) |
  5346. SBTML_REJ | SBTML_RESET));
  5347. regdata = brcmf_sdcard_reg_read(card,
  5348. CORE_SB(corebase, sbtmstatelow), 4);
  5349. udelay(10);
  5350. /* clear the initiator reject bit */
  5351. regdata = brcmf_sdcard_reg_read(card,
  5352. CORE_SB(corebase, sbidlow), 4);
  5353. if (regdata & SBIDL_INIT) {
  5354. regdata = brcmf_sdcard_reg_read(card,
  5355. CORE_SB(corebase, sbimstate), 4) &
  5356. ~SBIM_RJ;
  5357. brcmf_sdcard_reg_write(card,
  5358. CORE_SB(corebase, sbimstate), 4,
  5359. regdata);
  5360. }
  5361. }
  5362. /* leave reset and reject asserted */
  5363. brcmf_sdcard_reg_write(card, CORE_SB(corebase, sbtmstatelow), 4,
  5364. (SBTML_REJ | SBTML_RESET));
  5365. udelay(1);
  5366. }
  5367. static int
  5368. brcmf_sdbrcm_chip_attach(struct brcmf_bus *bus, u32 regs)
  5369. {
  5370. struct chip_info *ci;
  5371. int err;
  5372. u8 clkval, clkset;
  5373. BRCMF_TRACE(("%s: Enter\n", __func__));
  5374. /* alloc chip_info_t */
  5375. ci = kmalloc(sizeof(struct chip_info), GFP_ATOMIC);
  5376. if (NULL == ci) {
  5377. BRCMF_ERROR(("%s: malloc failed!\n", __func__));
  5378. return -ENOMEM;
  5379. }
  5380. memset((unsigned char *)ci, 0, sizeof(struct chip_info));
  5381. /* bus/core/clk setup for register access */
  5382. /* Try forcing SDIO core to do ALPAvail request only */
  5383. clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
  5384. brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
  5385. clkset, &err);
  5386. if (err) {
  5387. BRCMF_ERROR(("%s: error writing for HT off\n", __func__));
  5388. goto fail;
  5389. }
  5390. /* If register supported, wait for ALPAvail and then force ALP */
  5391. /* This may take up to 15 milliseconds */
  5392. clkval = brcmf_sdcard_cfg_read(bus->card, SDIO_FUNC_1,
  5393. SBSDIO_FUNC1_CHIPCLKCSR, NULL);
  5394. if ((clkval & ~SBSDIO_AVBITS) == clkset) {
  5395. SPINWAIT(((clkval =
  5396. brcmf_sdcard_cfg_read(bus->card, SDIO_FUNC_1,
  5397. SBSDIO_FUNC1_CHIPCLKCSR,
  5398. NULL)),
  5399. !SBSDIO_ALPAV(clkval)),
  5400. PMU_MAX_TRANSITION_DLY);
  5401. if (!SBSDIO_ALPAV(clkval)) {
  5402. BRCMF_ERROR(("%s: timeout on ALPAV wait,"
  5403. " clkval 0x%02x\n", __func__, clkval));
  5404. err = -EBUSY;
  5405. goto fail;
  5406. }
  5407. clkset = SBSDIO_FORCE_HW_CLKREQ_OFF |
  5408. SBSDIO_FORCE_ALP;
  5409. brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1,
  5410. SBSDIO_FUNC1_CHIPCLKCSR,
  5411. clkset, &err);
  5412. udelay(65);
  5413. } else {
  5414. BRCMF_ERROR(("%s: ChipClkCSR access: wrote 0x%02x"
  5415. " read 0x%02x\n", __func__, clkset, clkval));
  5416. err = -EACCES;
  5417. goto fail;
  5418. }
  5419. /* Also, disable the extra SDIO pull-ups */
  5420. brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1, SBSDIO_FUNC1_SDIOPULLUP,
  5421. 0, NULL);
  5422. err = brcmf_sdbrcm_chip_recognition(bus->card, ci, regs);
  5423. if (err)
  5424. goto fail;
  5425. /*
  5426. * Make sure any on-chip ARM is off (in case strapping is wrong),
  5427. * or downloaded code was already running.
  5428. */
  5429. brcmf_sdbrcm_chip_disablecore(bus->card, ci->armcorebase);
  5430. brcmf_sdcard_reg_write(bus->card,
  5431. CORE_CC_REG(ci->cccorebase, gpiopullup), 4, 0);
  5432. brcmf_sdcard_reg_write(bus->card,
  5433. CORE_CC_REG(ci->cccorebase, gpiopulldown), 4, 0);
  5434. /* Disable F2 to clear any intermediate frame state on the dongle */
  5435. brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_0, SDIO_CCCR_IOEx,
  5436. SDIO_FUNC_ENABLE_1, NULL);
  5437. /* WAR: cmd52 backplane read so core HW will drop ALPReq */
  5438. clkval = brcmf_sdcard_cfg_read(bus->card, SDIO_FUNC_1,
  5439. 0, NULL);
  5440. /* Done with backplane-dependent accesses, can drop clock... */
  5441. brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
  5442. 0, NULL);
  5443. bus->ci = ci;
  5444. return 0;
  5445. fail:
  5446. bus->ci = NULL;
  5447. kfree(ci);
  5448. return err;
  5449. }
  5450. static void
  5451. brcmf_sdbrcm_chip_resetcore(struct brcmf_sdio_card *card, u32 corebase)
  5452. {
  5453. u32 regdata;
  5454. /*
  5455. * Must do the disable sequence first to work for
  5456. * arbitrary current core state.
  5457. */
  5458. brcmf_sdbrcm_chip_disablecore(card, corebase);
  5459. /*
  5460. * Now do the initialization sequence.
  5461. * set reset while enabling the clock and
  5462. * forcing them on throughout the core
  5463. */
  5464. brcmf_sdcard_reg_write(card, CORE_SB(corebase, sbtmstatelow), 4,
  5465. ((SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) |
  5466. SBTML_RESET);
  5467. udelay(1);
  5468. regdata = brcmf_sdcard_reg_read(card, CORE_SB(corebase, sbtmstatehigh),
  5469. 4);
  5470. if (regdata & SBTMH_SERR)
  5471. brcmf_sdcard_reg_write(card, CORE_SB(corebase, sbtmstatehigh),
  5472. 4, 0);
  5473. regdata = brcmf_sdcard_reg_read(card, CORE_SB(corebase, sbimstate), 4);
  5474. if (regdata & (SBIM_IBE | SBIM_TO))
  5475. brcmf_sdcard_reg_write(card, CORE_SB(corebase, sbimstate), 4,
  5476. regdata & ~(SBIM_IBE | SBIM_TO));
  5477. /* clear reset and allow it to propagate throughout the core */
  5478. brcmf_sdcard_reg_write(card, CORE_SB(corebase, sbtmstatelow), 4,
  5479. (SICF_FGC << SBTML_SICF_SHIFT) |
  5480. (SICF_CLOCK_EN << SBTML_SICF_SHIFT));
  5481. udelay(1);
  5482. /* leave clock enabled */
  5483. brcmf_sdcard_reg_write(card, CORE_SB(corebase, sbtmstatelow), 4,
  5484. (SICF_CLOCK_EN << SBTML_SICF_SHIFT));
  5485. udelay(1);
  5486. }
  5487. /* SDIO Pad drive strength to select value mappings */
  5488. struct sdiod_drive_str {
  5489. u8 strength; /* Pad Drive Strength in mA */
  5490. u8 sel; /* Chip-specific select value */
  5491. };
  5492. /* SDIO Drive Strength to sel value table for PMU Rev 1 */
  5493. static const struct sdiod_drive_str sdiod_drive_strength_tab1[] = {
  5494. {
  5495. 4, 0x2}, {
  5496. 2, 0x3}, {
  5497. 1, 0x0}, {
  5498. 0, 0x0}
  5499. };
  5500. /* SDIO Drive Strength to sel value table for PMU Rev 2, 3 */
  5501. static const struct sdiod_drive_str sdiod_drive_strength_tab2[] = {
  5502. {
  5503. 12, 0x7}, {
  5504. 10, 0x6}, {
  5505. 8, 0x5}, {
  5506. 6, 0x4}, {
  5507. 4, 0x2}, {
  5508. 2, 0x1}, {
  5509. 0, 0x0}
  5510. };
  5511. /* SDIO Drive Strength to sel value table for PMU Rev 8 (1.8V) */
  5512. static const struct sdiod_drive_str sdiod_drive_strength_tab3[] = {
  5513. {
  5514. 32, 0x7}, {
  5515. 26, 0x6}, {
  5516. 22, 0x5}, {
  5517. 16, 0x4}, {
  5518. 12, 0x3}, {
  5519. 8, 0x2}, {
  5520. 4, 0x1}, {
  5521. 0, 0x0}
  5522. };
  5523. #define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu))
  5524. static void
  5525. brcmf_sdbrcm_sdiod_drive_strength_init(struct brcmf_bus *bus, u32 drivestrength) {
  5526. struct sdiod_drive_str *str_tab = NULL;
  5527. u32 str_mask = 0;
  5528. u32 str_shift = 0;
  5529. char chn[8];
  5530. if (!(bus->ci->cccaps & CC_CAP_PMU))
  5531. return;
  5532. switch (SDIOD_DRVSTR_KEY(bus->ci->chip, bus->ci->pmurev)) {
  5533. case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 1):
  5534. str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab1;
  5535. str_mask = 0x30000000;
  5536. str_shift = 28;
  5537. break;
  5538. case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 2):
  5539. case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 3):
  5540. str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab2;
  5541. str_mask = 0x00003800;
  5542. str_shift = 11;
  5543. break;
  5544. case SDIOD_DRVSTR_KEY(BCM4336_CHIP_ID, 8):
  5545. str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab3;
  5546. str_mask = 0x00003800;
  5547. str_shift = 11;
  5548. break;
  5549. default:
  5550. BRCMF_ERROR(("No SDIO Drive strength init"
  5551. "done for chip %s rev %d pmurev %d\n",
  5552. brcmu_chipname(bus->ci->chip, chn, 8),
  5553. bus->ci->chiprev, bus->ci->pmurev));
  5554. break;
  5555. }
  5556. if (str_tab != NULL) {
  5557. u32 drivestrength_sel = 0;
  5558. u32 cc_data_temp;
  5559. int i;
  5560. for (i = 0; str_tab[i].strength != 0; i++) {
  5561. if (drivestrength >= str_tab[i].strength) {
  5562. drivestrength_sel = str_tab[i].sel;
  5563. break;
  5564. }
  5565. }
  5566. brcmf_sdcard_reg_write(bus->card,
  5567. CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr),
  5568. 4, 1);
  5569. cc_data_temp = brcmf_sdcard_reg_read(bus->card,
  5570. CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr), 4);
  5571. cc_data_temp &= ~str_mask;
  5572. drivestrength_sel <<= str_shift;
  5573. cc_data_temp |= drivestrength_sel;
  5574. brcmf_sdcard_reg_write(bus->card,
  5575. CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr),
  5576. 4, cc_data_temp);
  5577. BRCMF_INFO(("SDIO: %dmA drive strength selected, "
  5578. "set to 0x%08x\n", drivestrength, cc_data_temp));
  5579. }
  5580. }
  5581. static void
  5582. brcmf_sdbrcm_chip_detach(struct brcmf_bus *bus)
  5583. {
  5584. BRCMF_TRACE(("%s: Enter\n", __func__));
  5585. kfree(bus->ci);
  5586. bus->ci = NULL;
  5587. }
  5588. static void
  5589. brcmf_sdbrcm_wait_for_event(struct brcmf_bus *bus, bool *lockvar)
  5590. {
  5591. brcmf_sdbrcm_sdunlock(bus);
  5592. wait_event_interruptible_timeout(bus->ctrl_wait,
  5593. (*lockvar == false), HZ * 2);
  5594. brcmf_sdbrcm_sdlock(bus);
  5595. return;
  5596. }
  5597. static void
  5598. brcmf_sdbrcm_wait_event_wakeup(struct brcmf_bus *bus)
  5599. {
  5600. if (waitqueue_active(&bus->ctrl_wait))
  5601. wake_up_interruptible(&bus->ctrl_wait);
  5602. return;
  5603. }
  5604. static int
  5605. brcmf_sdbrcm_watchdog_thread(void *data)
  5606. {
  5607. struct brcmf_bus *bus = (struct brcmf_bus *)data;
  5608. /* This thread doesn't need any user-level access,
  5609. * so get rid of all our resources
  5610. */
  5611. if (brcmf_watchdog_prio > 0) {
  5612. struct sched_param param;
  5613. param.sched_priority = (brcmf_watchdog_prio < MAX_RT_PRIO) ?
  5614. brcmf_watchdog_prio : (MAX_RT_PRIO - 1);
  5615. sched_setscheduler(current, SCHED_FIFO, &param);
  5616. }
  5617. allow_signal(SIGTERM);
  5618. /* Run until signal received */
  5619. while (1) {
  5620. if (kthread_should_stop())
  5621. break;
  5622. if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
  5623. if (bus->drvr->dongle_reset == false)
  5624. brcmf_sdbrcm_bus_watchdog(bus->drvr);
  5625. /* Count the tick for reference */
  5626. bus->drvr->tickcnt++;
  5627. } else
  5628. break;
  5629. }
  5630. return 0;
  5631. }
  5632. static void
  5633. brcmf_sdbrcm_watchdog(unsigned long data)
  5634. {
  5635. struct brcmf_bus *bus = (struct brcmf_bus *)data;
  5636. if (brcmf_watchdog_prio >= 0) {
  5637. if (bus->watchdog_tsk)
  5638. complete(&bus->watchdog_wait);
  5639. else
  5640. return;
  5641. } else {
  5642. brcmf_sdbrcm_bus_watchdog(bus->drvr);
  5643. /* Count the tick for reference */
  5644. bus->drvr->tickcnt++;
  5645. }
  5646. /* Reschedule the watchdog */
  5647. if (bus->wd_timer_valid)
  5648. mod_timer(&bus->timer, jiffies + brcmf_watchdog_ms * HZ / 1000);
  5649. }
  5650. void
  5651. brcmf_sdbrcm_wd_timer(struct brcmf_bus *bus, uint wdtick)
  5652. {
  5653. static uint save_ms;
  5654. /* don't start the wd until fw is loaded */
  5655. if (bus->drvr->busstate == BRCMF_BUS_DOWN)
  5656. return;
  5657. /* Totally stop the timer */
  5658. if (!wdtick && bus->wd_timer_valid == true) {
  5659. del_timer_sync(&bus->timer);
  5660. bus->wd_timer_valid = false;
  5661. save_ms = wdtick;
  5662. return;
  5663. }
  5664. if (wdtick) {
  5665. brcmf_watchdog_ms = (uint) wdtick;
  5666. if (save_ms != brcmf_watchdog_ms) {
  5667. if (bus->wd_timer_valid == true)
  5668. /* Stop timer and restart at new value */
  5669. del_timer_sync(&bus->timer);
  5670. /* Create timer again when watchdog period is
  5671. dynamically changed or in the first instance
  5672. */
  5673. bus->timer.expires =
  5674. jiffies + brcmf_watchdog_ms * HZ / 1000;
  5675. add_timer(&bus->timer);
  5676. } else {
  5677. /* Re arm the timer, at last watchdog period */
  5678. mod_timer(&bus->timer,
  5679. jiffies + brcmf_watchdog_ms * HZ / 1000);
  5680. }
  5681. bus->wd_timer_valid = true;
  5682. save_ms = wdtick;
  5683. }
  5684. }
  5685. static int brcmf_sdbrcm_dpc_thread(void *data)
  5686. {
  5687. struct brcmf_bus *bus = (struct brcmf_bus *) data;
  5688. /* This thread doesn't need any user-level access,
  5689. * so get rid of all our resources
  5690. */
  5691. if (brcmf_dpc_prio > 0) {
  5692. struct sched_param param;
  5693. param.sched_priority = (brcmf_dpc_prio < MAX_RT_PRIO) ?
  5694. brcmf_dpc_prio : (MAX_RT_PRIO - 1);
  5695. sched_setscheduler(current, SCHED_FIFO, &param);
  5696. }
  5697. allow_signal(SIGTERM);
  5698. /* Run until signal received */
  5699. while (1) {
  5700. if (kthread_should_stop())
  5701. break;
  5702. if (!wait_for_completion_interruptible(&bus->dpc_wait)) {
  5703. /* Call bus dpc unless it indicated down
  5704. (then clean stop) */
  5705. if (bus->drvr->busstate != BRCMF_BUS_DOWN) {
  5706. if (brcmf_sdbrcm_dpc(bus))
  5707. complete(&bus->dpc_wait);
  5708. } else {
  5709. brcmf_sdbrcm_bus_stop(bus, true);
  5710. }
  5711. } else
  5712. break;
  5713. }
  5714. return 0;
  5715. }
  5716. static void brcmf_sdbrcm_dpc_tasklet(unsigned long data)
  5717. {
  5718. struct brcmf_bus *bus = (struct brcmf_bus *) data;
  5719. /* Call bus dpc unless it indicated down (then clean stop) */
  5720. if (bus->drvr->busstate != BRCMF_BUS_DOWN) {
  5721. if (brcmf_sdbrcm_dpc(bus))
  5722. tasklet_schedule(&bus->tasklet);
  5723. } else
  5724. brcmf_sdbrcm_bus_stop(bus, true);
  5725. }
  5726. static void brcmf_sdbrcm_sched_dpc(struct brcmf_bus *bus)
  5727. {
  5728. if (bus->dpc_tsk) {
  5729. complete(&bus->dpc_wait);
  5730. return;
  5731. }
  5732. tasklet_schedule(&bus->tasklet);
  5733. }
  5734. static void brcmf_sdbrcm_sdlock(struct brcmf_bus *bus)
  5735. {
  5736. if (bus->threads_only)
  5737. down(&bus->sdsem);
  5738. else
  5739. spin_lock_bh(&bus->sdlock);
  5740. }
  5741. static void brcmf_sdbrcm_sdunlock(struct brcmf_bus *bus)
  5742. {
  5743. if (bus->threads_only)
  5744. up(&bus->sdsem);
  5745. else
  5746. spin_unlock_bh(&bus->sdlock);
  5747. }
  5748. static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_bus *bus)
  5749. {
  5750. if (bus->firmware->size < bus->fw_ptr + len)
  5751. len = bus->firmware->size - bus->fw_ptr;
  5752. memcpy(buf, &bus->firmware->data[bus->fw_ptr], len);
  5753. bus->fw_ptr += len;
  5754. return len;
  5755. }
  5756. MODULE_FIRMWARE(BCM4329_FW_NAME);
  5757. MODULE_FIRMWARE(BCM4329_NV_NAME);