/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
C | 6772 lines | 5051 code | 1015 blank | 706 comment | 946 complexity | 02856cd1f5dfd7e3cc5f432120f1cff0 MD5 | raw file
Possible License(s): LGPL-2.0, AGPL-1.0, GPL-2.0
1/*
2 * Copyright (c) 2010 Broadcom Corporation
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#include <linux/types.h>
18#include <linux/kernel.h>
19#include <linux/kthread.h>
20#include <linux/printk.h>
21#include <linux/pci_ids.h>
22#include <linux/netdevice.h>
23#include <linux/interrupt.h>
24#include <linux/sched.h>
25#include <linux/mmc/sdio.h>
26#include <linux/mmc/sdio_func.h>
27#include <linux/semaphore.h>
28#include <linux/firmware.h>
29#include <asm/unaligned.h>
30#include <defs.h>
31#include <brcmu_wifi.h>
32#include <brcmu_utils.h>
33#include <brcm_hw_ids.h>
34#include <soc.h>
35#include "sdio_host.h"
36
37/* register access macros */
38#ifndef __BIG_ENDIAN
39#ifndef __mips__
40#define R_REG(r, typ) \
41 brcmf_sdcard_reg_read(NULL, (r), sizeof(typ))
42#else /* __mips__ */
43#define R_REG(r, typ) \
44 ({ \
45 __typeof(*(r)) __osl_v; \
46 __asm__ __volatile__("sync"); \
47 __osl_v = brcmf_sdcard_reg_read(NULL, (r),\
48 sizeof(typ)); \
49 __asm__ __volatile__("sync"); \
50 __osl_v; \
51 })
52#endif /* __mips__ */
53
54#else /* __BIG_ENDIAN */
55#define R_REG(r, typ) \
56 brcmf_sdcard_reg_read(NULL, (r), sizeof(typ))
57#endif /* __BIG_ENDIAN */
58
59#define OR_REG(r, v, typ) \
60 brcmf_sdcard_reg_write(NULL, (r), sizeof(typ), R_REG(r, typ) | (v))
61
62#ifdef BCMDBG
63
64/* ARM trap handling */
65
66/* Trap types defined by ARM (see arminc.h) */
67
68#if defined(__ARM_ARCH_4T__)
69#define MAX_TRAP_TYPE (TR_FIQ + 1)
70#elif defined(__ARM_ARCH_7M__)
71#define MAX_TRAP_TYPE (TR_ISR + ARMCM3_NUMINTS)
72#endif /* __ARM_ARCH_7M__ */
73
74/* The trap structure is defined here as offsets for assembly */
75#define TR_TYPE 0x00
76#define TR_EPC 0x04
77#define TR_CPSR 0x08
78#define TR_SPSR 0x0c
79#define TR_REGS 0x10
80#define TR_REG(n) (TR_REGS + (n) * 4)
81#define TR_SP TR_REG(13)
82#define TR_LR TR_REG(14)
83#define TR_PC TR_REG(15)
84
85#define TRAP_T_SIZE 80
86
87struct brcmf_trap {
88 u32 type;
89 u32 epc;
90 u32 cpsr;
91 u32 spsr;
92 u32 r0;
93 u32 r1;
94 u32 r2;
95 u32 r3;
96 u32 r4;
97 u32 r5;
98 u32 r6;
99 u32 r7;
100 u32 r8;
101 u32 r9;
102 u32 r10;
103 u32 r11;
104 u32 r12;
105 u32 r13;
106 u32 r14;
107 u32 pc;
108};
109
110#define CBUF_LEN (128)
111
112struct rte_log {
113 u32 buf; /* Can't be pointer on (64-bit) hosts */
114 uint buf_size;
115 uint idx;
116 char *_buf_compat; /* Redundant pointer for backward compat. */
117};
118
119struct rte_console {
120 /* Virtual UART
121 * When there is no UART (e.g. Quickturn),
122 * the host should write a complete
123 * input line directly into cbuf and then write
124 * the length into vcons_in.
125 * This may also be used when there is a real UART
126 * (at risk of conflicting with
127 * the real UART). vcons_out is currently unused.
128 */
129 volatile uint vcons_in;
130 volatile uint vcons_out;
131
132 /* Output (logging) buffer
133 * Console output is written to a ring buffer log_buf at index log_idx.
134 * The host may read the output when it sees log_idx advance.
135 * Output will be lost if the output wraps around faster than the host
136 * polls.
137 */
138 struct rte_log log;
139
140 /* Console input line buffer
141 * Characters are read one at a time into cbuf
142 * until <CR> is received, then
143 * the buffer is processed as a command line.
144 * Also used for virtual UART.
145 */
146 uint cbuf_idx;
147 char cbuf[CBUF_LEN];
148};
149
150#endif /* BCMDBG */
151#include <chipcommon.h>
152
153#include "dhd.h"
154#include "dhd_bus.h"
155#include "dhd_proto.h"
156#include "dhd_dbg.h"
157#include <bcmchip.h>
158
159#define TXQLEN 2048 /* bulk tx queue length */
160#define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
161#define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
162#define PRIOMASK 7
163
164#define TXRETRIES 2 /* # of retries for tx frames */
165
166#define BRCMF_RXBOUND 50 /* Default for max rx frames in
167 one scheduling */
168
169#define BRCMF_TXBOUND 20 /* Default for max tx frames in
170 one scheduling */
171
172#define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
173
174#define MEMBLOCK 2048 /* Block size used for downloading
175 of dongle image */
176#define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
177 biggest possible glom */
178
179#ifndef BRCMF_FIRSTREAD
180#define BRCMF_FIRSTREAD 32
181#endif
182
183#if !ISPOWEROF2(BRCMF_FIRSTREAD)
184#error BRCMF_FIRSTREAD is not a power of 2!
185#endif
186
187/* SBSDIO_DEVICE_CTL */
188#define SBSDIO_DEVCTL_SETBUSY 0x01 /* 1: device will assert busy signal when
189 * receiving CMD53
190 */
191#define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02 /* 1: assertion of sdio interrupt is
192 * synchronous to the sdio clock
193 */
194#define SBSDIO_DEVCTL_CA_INT_ONLY 0x04 /* 1: mask all interrupts to host
195 * except the chipActive (rev 8)
196 */
197#define SBSDIO_DEVCTL_PADS_ISO 0x08 /* 1: isolate internal sdio signals, put
198 * external pads in tri-state; requires
199 * sdio bus power cycle to clear (rev 9)
200 */
201#define SBSDIO_DEVCTL_SB_RST_CTL 0x30 /* Force SD->SB reset mapping (rev 11) */
202#define SBSDIO_DEVCTL_RST_CORECTL 0x00 /* Determined by CoreControl bit */
203#define SBSDIO_DEVCTL_RST_BPRESET 0x10 /* Force backplane reset */
204#define SBSDIO_DEVCTL_RST_NOBPRESET 0x20 /* Force no backplane reset */
205
206/* SBSDIO_FUNC1_CHIPCLKCSR */
207#define SBSDIO_FORCE_ALP 0x01 /* Force ALP request to backplane */
208#define SBSDIO_FORCE_HT 0x02 /* Force HT request to backplane */
209#define SBSDIO_FORCE_ILP 0x04 /* Force ILP request to backplane */
210#define SBSDIO_ALP_AVAIL_REQ 0x08 /* Make ALP ready (power up xtal) */
211#define SBSDIO_HT_AVAIL_REQ 0x10 /* Make HT ready (power up PLL) */
212#define SBSDIO_FORCE_HW_CLKREQ_OFF 0x20 /* Squelch clock requests from HW */
213#define SBSDIO_ALP_AVAIL 0x40 /* Status: ALP is ready */
214#define SBSDIO_HT_AVAIL 0x80 /* Status: HT is ready */
215
216#define SBSDIO_AVBITS (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
217#define SBSDIO_ALPAV(regval) ((regval) & SBSDIO_AVBITS)
218#define SBSDIO_HTAV(regval) (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
219#define SBSDIO_ALPONLY(regval) (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
220#define SBSDIO_CLKAV(regval, alponly) (SBSDIO_ALPAV(regval) && \
221 (alponly ? 1 : SBSDIO_HTAV(regval)))
222/* direct(mapped) cis space */
223#define SBSDIO_CIS_BASE_COMMON 0x1000 /* MAPPED common CIS address */
224#define SBSDIO_CIS_SIZE_LIMIT 0x200 /* maximum bytes in one CIS */
225#define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF /* cis offset addr is < 17 bits */
226
227#define SBSDIO_CIS_MANFID_TUPLE_LEN 6 /* manfid tuple length, include tuple,
228 * link bytes
229 */
230
231/* intstatus */
232#define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
233#define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
234#define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
235#define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
236#define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
237#define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
238#define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
239#define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
240#define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
241#define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
242#define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
243#define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
244#define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
245#define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
246#define I_PC (1 << 10) /* descriptor error */
247#define I_PD (1 << 11) /* data error */
248#define I_DE (1 << 12) /* Descriptor protocol Error */
249#define I_RU (1 << 13) /* Receive descriptor Underflow */
250#define I_RO (1 << 14) /* Receive fifo Overflow */
251#define I_XU (1 << 15) /* Transmit fifo Underflow */
252#define I_RI (1 << 16) /* Receive Interrupt */
253#define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
254#define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
255#define I_XI (1 << 24) /* Transmit Interrupt */
256#define I_RF_TERM (1 << 25) /* Read Frame Terminate */
257#define I_WF_TERM (1 << 26) /* Write Frame Terminate */
258#define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
259#define I_SBINT (1 << 28) /* sbintstatus Interrupt */
260#define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
261#define I_SRESET (1 << 30) /* CCCR RES interrupt */
262#define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
263#define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
264#define I_DMA (I_RI | I_XI | I_ERRORS)
265
266/* corecontrol */
267#define CC_CISRDY (1 << 0) /* CIS Ready */
268#define CC_BPRESEN (1 << 1) /* CCCR RES signal */
269#define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
270#define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
271#define CC_XMTDATAAVAIL_MODE (1 << 4)
272#define CC_XMTDATAAVAIL_CTRL (1 << 5)
273
274/* SDA_FRAMECTRL */
275#define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
276#define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
277#define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
278#define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
279
280/* HW frame tag */
281#define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
282
283/* Total length of frame header for dongle protocol */
284#define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
285#ifdef SDTEST
286#define SDPCM_RESERVE (SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + BRCMF_SDALIGN)
287#else
288#define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
289#endif
290
291/*
292 * Software allocation of To SB Mailbox resources
293 */
294
295/* tosbmailbox bits corresponding to intstatus bits */
296#define SMB_NAK (1 << 0) /* Frame NAK */
297#define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
298#define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
299#define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
300
301/* tosbmailboxdata */
302#define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
303
304/*
305 * Software allocation of To Host Mailbox resources
306 */
307
308/* intstatus bits */
309#define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
310#define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
311#define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
312#define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
313
314/* tohostmailboxdata */
315#define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
316#define HMB_DATA_DEVREADY 2 /* talk to host after enable */
317#define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
318#define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
319
320#define HMB_DATA_FCDATA_MASK 0xff000000
321#define HMB_DATA_FCDATA_SHIFT 24
322
323#define HMB_DATA_VERSION_MASK 0x00ff0000
324#define HMB_DATA_VERSION_SHIFT 16
325
326/*
327 * Software-defined protocol header
328 */
329
330/* Current protocol version */
331#define SDPCM_PROT_VERSION 4
332
333/* SW frame header */
334#define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
335
336#define SDPCM_CHANNEL_MASK 0x00000f00
337#define SDPCM_CHANNEL_SHIFT 8
338#define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
339
340#define SDPCM_NEXTLEN_OFFSET 2
341
342/* Data Offset from SOF (HW Tag, SW Tag, Pad) */
343#define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
344#define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
345#define SDPCM_DOFFSET_MASK 0xff000000
346#define SDPCM_DOFFSET_SHIFT 24
347#define SDPCM_FCMASK_OFFSET 4 /* Flow control */
348#define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
349#define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
350#define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
351
352#define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
353
354/* logical channel numbers */
355#define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
356#define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
357#define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
358#define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
359#define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
360
361#define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
362
363#define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
364
365/* For TEST_CHANNEL packets, define another 4-byte header */
366#define SDPCM_TEST_HDRLEN 4 /*
367 * Generally: Cmd(1), Ext(1), Len(2);
368 * Semantics of Ext byte depend on
369 * command. Len is current or requested
370 * frame length, not including test
371 * header; sent little-endian.
372 */
373#define SDPCM_TEST_DISCARD 0x01 /* Receiver discards. Ext:pattern id. */
374#define SDPCM_TEST_ECHOREQ 0x02 /* Echo request. Ext:pattern id. */
375#define SDPCM_TEST_ECHORSP 0x03 /* Echo response. Ext:pattern id. */
376#define SDPCM_TEST_BURST 0x04 /*
377 * Receiver to send a burst.
378 * Ext is a frame count
379 */
380#define SDPCM_TEST_SEND 0x05 /*
381 * Receiver sets send mode.
382 * Ext is boolean on/off
383 */
384
385/* Handy macro for filling in datagen packets with a pattern */
386#define SDPCM_TEST_FILL(byteno, id) ((u8)(id + byteno))
387
388/*
389 * Shared structure between dongle and the host.
390 * The structure contains pointers to trap or assert information.
391 */
392#define SDPCM_SHARED_VERSION 0x0002
393#define SDPCM_SHARED_VERSION_MASK 0x00FF
394#define SDPCM_SHARED_ASSERT_BUILT 0x0100
395#define SDPCM_SHARED_ASSERT 0x0200
396#define SDPCM_SHARED_TRAP 0x0400
397
398
399/* Space for header read, limit for data packets */
400#ifndef MAX_HDR_READ
401#define MAX_HDR_READ 32
402#endif
403#if !ISPOWEROF2(MAX_HDR_READ)
404#error MAX_HDR_READ is not a power of 2!
405#endif
406
407#define MAX_RX_DATASZ 2048
408
409/* Maximum milliseconds to wait for F2 to come up */
410#define BRCMF_WAIT_F2RDY 3000
411
412/* Bump up limit on waiting for HT to account for first startup;
413 * if the image is doing a CRC calculation before programming the PMU
414 * for HT availability, it could take a couple hundred ms more, so
415 * max out at a 1 second (1000000us).
416 */
417#if (PMU_MAX_TRANSITION_DLY <= 1000000)
418#undef PMU_MAX_TRANSITION_DLY
419#define PMU_MAX_TRANSITION_DLY 1000000
420#endif
421
422/* Value for ChipClockCSR during initial setup */
423#define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
424 SBSDIO_ALP_AVAIL_REQ)
425
426/* Flags for SDH calls */
427#define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
428
429/* sbimstate */
430#define SBIM_IBE 0x20000 /* inbanderror */
431#define SBIM_TO 0x40000 /* timeout */
432#define SBIM_BY 0x01800000 /* busy (sonics >= 2.3) */
433#define SBIM_RJ 0x02000000 /* reject (sonics >= 2.3) */
434
435/* sbtmstatelow */
436#define SBTML_RESET 0x0001 /* reset */
437#define SBTML_REJ_MASK 0x0006 /* reject field */
438#define SBTML_REJ 0x0002 /* reject */
439#define SBTML_TMPREJ 0x0004 /* temporary reject, for error recovery */
440
441#define SBTML_SICF_SHIFT 16 /* Shift to locate the SI control flags in sbtml */
442
443/* sbtmstatehigh */
444#define SBTMH_SERR 0x0001 /* serror */
445#define SBTMH_INT 0x0002 /* interrupt */
446#define SBTMH_BUSY 0x0004 /* busy */
447#define SBTMH_TO 0x0020 /* timeout (sonics >= 2.3) */
448
449#define SBTMH_SISF_SHIFT 16 /* Shift to locate the SI status flags in sbtmh */
450
451/* sbidlow */
452#define SBIDL_INIT 0x80 /* initiator */
453
454/* sbidhigh */
455#define SBIDH_RC_MASK 0x000f /* revision code */
456#define SBIDH_RCE_MASK 0x7000 /* revision code extension field */
457#define SBIDH_RCE_SHIFT 8
458#define SBCOREREV(sbidh) \
459 ((((sbidh) & SBIDH_RCE_MASK) >> SBIDH_RCE_SHIFT) | ((sbidh) & SBIDH_RC_MASK))
460#define SBIDH_CC_MASK 0x8ff0 /* core code */
461#define SBIDH_CC_SHIFT 4
462#define SBIDH_VC_MASK 0xffff0000 /* vendor code */
463#define SBIDH_VC_SHIFT 16
464
465/*
466 * Conversion of 802.1D priority to precedence level
467 */
468#define PRIO2PREC(prio) \
469 (((prio) == PRIO_8021D_NONE || (prio) == PRIO_8021D_BE) ? \
470 ((prio^2)) : (prio))
471
472BRCMF_SPINWAIT_SLEEP_INIT(sdioh_spinwait_sleep);
473
474/*
475 * Core reg address translation.
476 * Both macro's returns a 32 bits byte address on the backplane bus.
477 */
478#define CORE_CC_REG(base, field) (base + offsetof(chipcregs_t, field))
479#define CORE_BUS_REG(base, field) \
480 (base + offsetof(struct sdpcmd_regs, field))
481#define CORE_SB(base, field) \
482 (base + SBCONFIGOFF + offsetof(struct sbconfig, field))
483
484/* core registers */
485struct sdpcmd_regs {
486 u32 corecontrol; /* 0x00, rev8 */
487 u32 corestatus; /* rev8 */
488 u32 PAD[1];
489 u32 biststatus; /* rev8 */
490
491 /* PCMCIA access */
492 u16 pcmciamesportaladdr; /* 0x010, rev8 */
493 u16 PAD[1];
494 u16 pcmciamesportalmask; /* rev8 */
495 u16 PAD[1];
496 u16 pcmciawrframebc; /* rev8 */
497 u16 PAD[1];
498 u16 pcmciaunderflowtimer; /* rev8 */
499 u16 PAD[1];
500
501 /* interrupt */
502 u32 intstatus; /* 0x020, rev8 */
503 u32 hostintmask; /* rev8 */
504 u32 intmask; /* rev8 */
505 u32 sbintstatus; /* rev8 */
506 u32 sbintmask; /* rev8 */
507 u32 funcintmask; /* rev4 */
508 u32 PAD[2];
509 u32 tosbmailbox; /* 0x040, rev8 */
510 u32 tohostmailbox; /* rev8 */
511 u32 tosbmailboxdata; /* rev8 */
512 u32 tohostmailboxdata; /* rev8 */
513
514 /* synchronized access to registers in SDIO clock domain */
515 u32 sdioaccess; /* 0x050, rev8 */
516 u32 PAD[3];
517
518 /* PCMCIA frame control */
519 u8 pcmciaframectrl; /* 0x060, rev8 */
520 u8 PAD[3];
521 u8 pcmciawatermark; /* rev8 */
522 u8 PAD[155];
523
524 /* interrupt batching control */
525 u32 intrcvlazy; /* 0x100, rev8 */
526 u32 PAD[3];
527
528 /* counters */
529 u32 cmd52rd; /* 0x110, rev8 */
530 u32 cmd52wr; /* rev8 */
531 u32 cmd53rd; /* rev8 */
532 u32 cmd53wr; /* rev8 */
533 u32 abort; /* rev8 */
534 u32 datacrcerror; /* rev8 */
535 u32 rdoutofsync; /* rev8 */
536 u32 wroutofsync; /* rev8 */
537 u32 writebusy; /* rev8 */
538 u32 readwait; /* rev8 */
539 u32 readterm; /* rev8 */
540 u32 writeterm; /* rev8 */
541 u32 PAD[40];
542 u32 clockctlstatus; /* rev8 */
543 u32 PAD[7];
544
545 u32 PAD[128]; /* DMA engines */
546
547 /* SDIO/PCMCIA CIS region */
548 char cis[512]; /* 0x400-0x5ff, rev6 */
549
550 /* PCMCIA function control registers */
551 char pcmciafcr[256]; /* 0x600-6ff, rev6 */
552 u16 PAD[55];
553
554 /* PCMCIA backplane access */
555 u16 backplanecsr; /* 0x76E, rev6 */
556 u16 backplaneaddr0; /* rev6 */
557 u16 backplaneaddr1; /* rev6 */
558 u16 backplaneaddr2; /* rev6 */
559 u16 backplaneaddr3; /* rev6 */
560 u16 backplanedata0; /* rev6 */
561 u16 backplanedata1; /* rev6 */
562 u16 backplanedata2; /* rev6 */
563 u16 backplanedata3; /* rev6 */
564 u16 PAD[31];
565
566 /* sprom "size" & "blank" info */
567 u16 spromstatus; /* 0x7BE, rev2 */
568 u32 PAD[464];
569
570 u16 PAD[0x80];
571};
572
573#ifdef BCMDBG
574/* Device console log buffer state */
575struct brcmf_console {
576 uint count; /* Poll interval msec counter */
577 uint log_addr; /* Log struct address (fixed) */
578 struct rte_log log; /* Log struct (host copy) */
579 uint bufsize; /* Size of log buffer */
580 u8 *buf; /* Log buffer (host copy) */
581 uint last; /* Last buffer read index */
582};
583#endif /* BCMDBG */
584
585struct sdpcm_shared {
586 u32 flags;
587 u32 trap_addr;
588 u32 assert_exp_addr;
589 u32 assert_file_addr;
590 u32 assert_line;
591 u32 console_addr; /* Address of struct rte_console */
592 u32 msgtrace_addr;
593 u8 tag[32];
594};
595
596
597/* misc chip info needed by some of the routines */
598struct chip_info {
599 u32 chip;
600 u32 chiprev;
601 u32 cccorebase;
602 u32 ccrev;
603 u32 cccaps;
604 u32 buscorebase; /* 32 bits backplane bus address */
605 u32 buscorerev;
606 u32 buscoretype;
607 u32 ramcorebase;
608 u32 armcorebase;
609 u32 pmurev;
610 u32 ramsize;
611};
612
613/* Private data for SDIO bus interaction */
614struct brcmf_bus {
615 struct brcmf_pub *drvr;
616
617 struct brcmf_sdio_card *card; /* Handle for sdio card calls */
618 struct chip_info *ci; /* Chip info struct */
619 char *vars; /* Variables (from CIS and/or other) */
620 uint varsz; /* Size of variables buffer */
621
622 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
623 u32 orig_ramsize; /* Size of RAM in SOCRAM (bytes) */
624
625 u32 bus; /* gSPI or SDIO bus */
626 u32 hostintmask; /* Copy of Host Interrupt Mask */
627 u32 intstatus; /* Intstatus bits (events) pending */
628 bool dpc_sched; /* Indicates DPC schedule (intrpt rcvd) */
629 bool fcstate; /* State of dongle flow-control */
630
631 u16 cl_devid; /* cached devid for brcmf_sdio_probe_attach() */
632
633 uint blocksize; /* Block size of SDIO transfers */
634 uint roundup; /* Max roundup limit */
635
636 struct pktq txq; /* Queue length used for flow-control */
637 u8 flowcontrol; /* per prio flow control bitmask */
638 u8 tx_seq; /* Transmit sequence number (next) */
639 u8 tx_max; /* Maximum transmit sequence allowed */
640
641 u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
642 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
643 u16 nextlen; /* Next Read Len from last header */
644 u8 rx_seq; /* Receive sequence number (expected) */
645 bool rxskip; /* Skip receive (awaiting NAK ACK) */
646
647 struct sk_buff *glomd; /* Packet containing glomming descriptor */
648 struct sk_buff *glom; /* Packet chain for glommed superframe */
649 uint glomerr; /* Glom packet read errors */
650
651 u8 *rxbuf; /* Buffer for receiving control packets */
652 uint rxblen; /* Allocated length of rxbuf */
653 u8 *rxctl; /* Aligned pointer into rxbuf */
654 u8 *databuf; /* Buffer for receiving big glom packet */
655 u8 *dataptr; /* Aligned pointer into databuf */
656 uint rxlen; /* Length of valid data in buffer */
657
658 u8 sdpcm_ver; /* Bus protocol reported by dongle */
659
660 bool intr; /* Use interrupts */
661 bool poll; /* Use polling */
662 bool ipend; /* Device interrupt is pending */
663 bool intdis; /* Interrupts disabled by isr */
664 uint intrcount; /* Count of device interrupt callbacks */
665 uint lastintrs; /* Count as of last watchdog timer */
666 uint spurious; /* Count of spurious interrupts */
667 uint pollrate; /* Ticks between device polls */
668 uint polltick; /* Tick counter */
669 uint pollcnt; /* Count of active polls */
670
671#ifdef BCMDBG
672 struct brcmf_console console; /* Console output polling support */
673 uint console_addr; /* Console address from shared struct */
674#endif /* BCMDBG */
675
676 uint regfails; /* Count of R_REG failures */
677
678 uint clkstate; /* State of sd and backplane clock(s) */
679 bool activity; /* Activity flag for clock down */
680 s32 idletime; /* Control for activity timeout */
681 s32 idlecount; /* Activity timeout counter */
682 s32 idleclock; /* How to set bus driver when idle */
683 s32 sd_rxchain;
684 bool use_rxchain; /* If brcmf should use PKT chains */
685 bool sleeping; /* Is SDIO bus sleeping? */
686 bool rxflow_mode; /* Rx flow control mode */
687 bool rxflow; /* Is rx flow control on */
688 bool alp_only; /* Don't use HT clock (ALP only) */
689/* Field to decide if rx of control frames happen in rxbuf or lb-pool */
690 bool usebufpool;
691
692#ifdef SDTEST
693 /* external loopback */
694 bool ext_loop;
695 u8 loopid;
696
697 /* pktgen configuration */
698 uint pktgen_freq; /* Ticks between bursts */
699 uint pktgen_count; /* Packets to send each burst */
700 uint pktgen_print; /* Bursts between count displays */
701 uint pktgen_total; /* Stop after this many */
702 uint pktgen_minlen; /* Minimum packet data len */
703 uint pktgen_maxlen; /* Maximum packet data len */
704 uint pktgen_mode; /* Configured mode: tx, rx, or echo */
705 uint pktgen_stop; /* Number of tx failures causing stop */
706
707 /* active pktgen fields */
708 uint pktgen_tick; /* Tick counter for bursts */
709 uint pktgen_ptick; /* Burst counter for printing */
710 uint pktgen_sent; /* Number of test packets generated */
711 uint pktgen_rcvd; /* Number of test packets received */
712 uint pktgen_fail; /* Number of failed send attempts */
713 u16 pktgen_len; /* Length of next packet to send */
714#endif /* SDTEST */
715
716 /* Some additional counters */
717 uint tx_sderrs; /* Count of tx attempts with sd errors */
718 uint fcqueued; /* Tx packets that got queued */
719 uint rxrtx; /* Count of rtx requests (NAK to dongle) */
720 uint rx_toolong; /* Receive frames too long to receive */
721 uint rxc_errors; /* SDIO errors when reading control frames */
722 uint rx_hdrfail; /* SDIO errors on header reads */
723 uint rx_badhdr; /* Bad received headers (roosync?) */
724 uint rx_badseq; /* Mismatched rx sequence number */
725 uint fc_rcvd; /* Number of flow-control events received */
726 uint fc_xoff; /* Number which turned on flow-control */
727 uint fc_xon; /* Number which turned off flow-control */
728 uint rxglomfail; /* Failed deglom attempts */
729 uint rxglomframes; /* Number of glom frames (superframes) */
730 uint rxglompkts; /* Number of packets from glom frames */
731 uint f2rxhdrs; /* Number of header reads */
732 uint f2rxdata; /* Number of frame data reads */
733 uint f2txdata; /* Number of f2 frame writes */
734 uint f1regdata; /* Number of f1 register accesses */
735
736 u8 *ctrl_frame_buf;
737 u32 ctrl_frame_len;
738 bool ctrl_frame_stat;
739
740 spinlock_t txqlock;
741 wait_queue_head_t ctrl_wait;
742
743 struct timer_list timer;
744 struct completion watchdog_wait;
745 struct task_struct *watchdog_tsk;
746 bool wd_timer_valid;
747
748 struct tasklet_struct tasklet;
749 struct task_struct *dpc_tsk;
750 struct completion dpc_wait;
751
752 bool threads_only;
753 struct semaphore sdsem;
754 spinlock_t sdlock;
755
756 const char *fw_name;
757 const struct firmware *firmware;
758 const char *nv_name;
759 u32 fw_ptr;
760};
761
762struct sbconfig {
763 u32 PAD[2];
764 u32 sbipsflag; /* initiator port ocp slave flag */
765 u32 PAD[3];
766 u32 sbtpsflag; /* target port ocp slave flag */
767 u32 PAD[11];
768 u32 sbtmerrloga; /* (sonics >= 2.3) */
769 u32 PAD;
770 u32 sbtmerrlog; /* (sonics >= 2.3) */
771 u32 PAD[3];
772 u32 sbadmatch3; /* address match3 */
773 u32 PAD;
774 u32 sbadmatch2; /* address match2 */
775 u32 PAD;
776 u32 sbadmatch1; /* address match1 */
777 u32 PAD[7];
778 u32 sbimstate; /* initiator agent state */
779 u32 sbintvec; /* interrupt mask */
780 u32 sbtmstatelow; /* target state */
781 u32 sbtmstatehigh; /* target state */
782 u32 sbbwa0; /* bandwidth allocation table0 */
783 u32 PAD;
784 u32 sbimconfiglow; /* initiator configuration */
785 u32 sbimconfighigh; /* initiator configuration */
786 u32 sbadmatch0; /* address match0 */
787 u32 PAD;
788 u32 sbtmconfiglow; /* target configuration */
789 u32 sbtmconfighigh; /* target configuration */
790 u32 sbbconfig; /* broadcast configuration */
791 u32 PAD;
792 u32 sbbstate; /* broadcast state */
793 u32 PAD[3];
794 u32 sbactcnfg; /* activate configuration */
795 u32 PAD[3];
796 u32 sbflagst; /* current sbflags */
797 u32 PAD[3];
798 u32 sbidlow; /* identification */
799 u32 sbidhigh; /* identification */
800};
801
802/* clkstate */
803#define CLK_NONE 0
804#define CLK_SDONLY 1
805#define CLK_PENDING 2 /* Not used yet */
806#define CLK_AVAIL 3
807
808#define BRCMF_NOPMU(brcmf) (false)
809
810#ifdef BCMDBG
811static int qcount[NUMPRIO];
812static int tx_packets[NUMPRIO];
813#endif /* BCMDBG */
814
815/* Deferred transmit */
816uint brcmf_deferred_tx = 1;
817module_param(brcmf_deferred_tx, uint, 0);
818
819/* Watchdog thread priority, -1 to use kernel timer */
820int brcmf_watchdog_prio = 97;
821module_param(brcmf_watchdog_prio, int, 0);
822
823/* Watchdog interval */
824uint brcmf_watchdog_ms = 10;
825module_param(brcmf_watchdog_ms, uint, 0);
826
827/* DPC thread priority, -1 to use tasklet */
828int brcmf_dpc_prio = 98;
829module_param(brcmf_dpc_prio, int, 0);
830
831#ifdef BCMDBG
832/* Console poll interval */
833uint brcmf_console_ms;
834module_param(brcmf_console_ms, uint, 0);
835#endif /* BCMDBG */
836
837/* Tx/Rx bounds */
838uint brcmf_txbound;
839uint brcmf_rxbound;
840uint brcmf_txminmax;
841
842/* override the RAM size if possible */
843#define DONGLE_MIN_MEMSIZE (128 * 1024)
844int brcmf_dongle_memsize;
845
846static bool brcmf_alignctl;
847
848static bool sd1idle;
849
850static bool retrydata;
851#define RETRYCHAN(chan) (((chan) == SDPCM_EVENT_CHANNEL) || retrydata)
852
853static const uint watermark = 8;
854static const uint firstread = BRCMF_FIRSTREAD;
855
856/* Retry count for register access failures */
857static const uint retry_limit = 2;
858
859/* Force even SD lengths (some host controllers mess up on odd bytes) */
860static bool forcealign;
861
862#define ALIGNMENT 4
863
864#define PKTALIGN(_p, _len, _align) \
865 do { \
866 uint datalign; \
867 datalign = (unsigned long)((_p)->data); \
868 datalign = roundup(datalign, (_align)) - datalign; \
869 if (datalign) \
870 skb_pull((_p), datalign); \
871 __skb_trim((_p), (_len)); \
872 } while (0)
873
874/* Limit on rounding up frames */
875static const uint max_roundup = 512;
876
877/* Try doing readahead */
878static bool brcmf_readahead;
879
880/* To check if there's window offered */
881#define DATAOK(bus) \
882 (((u8)(bus->tx_max - bus->tx_seq) != 0) && \
883 (((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0))
884
885/*
886 * Reads a register in the SDIO hardware block. This block occupies a series of
887 * adresses on the 32 bit backplane bus.
888 */
889static void
890r_sdreg32(struct brcmf_bus *bus, u32 *regvar, u32 reg_offset, u32 *retryvar)
891{
892 *retryvar = 0;
893 do {
894 *regvar = R_REG(bus->ci->buscorebase + reg_offset, u32);
895 } while (brcmf_sdcard_regfail(bus->card) &&
896 (++(*retryvar) <= retry_limit));
897 if (*retryvar) {
898 bus->regfails += (*retryvar-1);
899 if (*retryvar > retry_limit) {
900 BRCMF_ERROR(("FAILED READ %Xh\n", reg_offset));
901 *regvar = 0;
902 }
903 }
904}
905
906static void
907w_sdreg32(struct brcmf_bus *bus, u32 regval, u32 reg_offset, u32 *retryvar)
908{
909 *retryvar = 0;
910 do {
911 brcmf_sdcard_reg_write(NULL, bus->ci->buscorebase + reg_offset,
912 sizeof(u32), regval);
913 } while (brcmf_sdcard_regfail(bus->card) &&
914 (++(*retryvar) <= retry_limit));
915 if (*retryvar) {
916 bus->regfails += (*retryvar-1);
917 if (*retryvar > retry_limit)
918 BRCMF_ERROR(("FAILED REGISTER WRITE"
919 " %Xh\n", reg_offset));
920 }
921}
922
923#define BRCMF_BUS SDIO_BUS
924
925#define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
926
927#define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
928
929#ifdef SDTEST
930static void brcmf_sdbrcm_checkdied(struct brcmf_bus *bus, void *pkt, uint seq);
931static void brcmf_sdbrcm_sdtest_set(struct brcmf_bus *bus, bool start);
932#endif
933
934#ifdef BCMDBG
935static int brcmf_sdbrcm_bus_console_in(struct brcmf_pub *drvr,
936 unsigned char *msg, uint msglen);
937static int brcmf_sdbrcm_checkdied(struct brcmf_bus *bus, u8 *data, uint size);
938static int brcmf_sdbrcm_mem_dump(struct brcmf_bus *bus);
939#endif /* BCMDBG */
940static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter);
941
942static void brcmf_sdbrcm_release(struct brcmf_bus *bus);
943static void brcmf_sdbrcm_release_malloc(struct brcmf_bus *bus);
944static void brcmf_sdbrcm_disconnect(void *ptr);
945static bool brcmf_sdbrcm_chipmatch(u16 chipid);
946static bool brcmf_sdbrcm_probe_attach(struct brcmf_bus *bus, void *card,
947 u32 regsva, u16 devid);
948static bool brcmf_sdbrcm_probe_malloc(struct brcmf_bus *bus, void *card);
949static bool brcmf_sdbrcm_probe_init(struct brcmf_bus *bus, void *card);
950static void brcmf_sdbrcm_release_dongle(struct brcmf_bus *bus);
951
952static uint brcmf_process_nvram_vars(char *varbuf, uint len);
953
954static void brcmf_sdbrcm_setmemsize(struct brcmf_bus *bus, int mem_size);
955static int brcmf_sdbrcm_send_buf(struct brcmf_bus *bus, u32 addr, uint fn,
956 uint flags, u8 *buf, uint nbytes,
957 struct sk_buff *pkt,
958 void (*complete)(void *handle, int status,
959 bool sync_waiting),
960 void *handle);
961
962static bool brcmf_sdbrcm_download_firmware(struct brcmf_bus *bus, void *card);
963static int _brcmf_sdbrcm_download_firmware(struct brcmf_bus *bus);
964
965static int brcmf_sdbrcm_download_code_file(struct brcmf_bus *bus);
966static int brcmf_sdbrcm_download_nvram(struct brcmf_bus *bus);
967
968static void
969brcmf_sdbrcm_chip_disablecore(struct brcmf_sdio_card *card, u32 corebase);
970
971static int brcmf_sdbrcm_chip_attach(struct brcmf_bus *bus, u32 regs);
972
973static void
974brcmf_sdbrcm_chip_resetcore(struct brcmf_sdio_card *card, u32 corebase);
975
976static void brcmf_sdbrcm_sdiod_drive_strength_init(struct brcmf_bus *bus,
977 u32 drivestrength);
978static void brcmf_sdbrcm_chip_detach(struct brcmf_bus *bus);
979static void brcmf_sdbrcm_wait_for_event(struct brcmf_bus *bus, bool *lockvar);
980static void brcmf_sdbrcm_wait_event_wakeup(struct brcmf_bus *bus);
981static void brcmf_sdbrcm_watchdog(unsigned long data);
982static int brcmf_sdbrcm_watchdog_thread(void *data);
983static int brcmf_sdbrcm_dpc_thread(void *data);
984static void brcmf_sdbrcm_dpc_tasklet(unsigned long data);
985static void brcmf_sdbrcm_sched_dpc(struct brcmf_bus *bus);
986static void brcmf_sdbrcm_sdlock(struct brcmf_bus *bus);
987static void brcmf_sdbrcm_sdunlock(struct brcmf_bus *bus);
988static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_bus *bus);
989
990/* Packet free applicable unconditionally for sdio and sdspi.
991 * Conditional if bufpool was present for gspi bus.
992 */
993static void brcmf_sdbrcm_pktfree2(struct brcmf_bus *bus, struct sk_buff *pkt)
994{
995 if ((bus->bus != SPI_BUS) || bus->usebufpool)
996 brcmu_pkt_buf_free_skb(pkt);
997}
998
999static void brcmf_sdbrcm_setmemsize(struct brcmf_bus *bus, int mem_size)
1000{
1001 s32 min_size = DONGLE_MIN_MEMSIZE;
1002 /* Restrict the memsize to user specified limit */
1003 BRCMF_ERROR(("user: Restrict the dongle ram size to %d, min %d\n",
1004 brcmf_dongle_memsize, min_size));
1005 if ((brcmf_dongle_memsize > min_size) &&
1006 (brcmf_dongle_memsize < (s32) bus->orig_ramsize))
1007 bus->ramsize = brcmf_dongle_memsize;
1008}
1009
1010static int brcmf_sdbrcm_set_siaddr_window(struct brcmf_bus *bus, u32 address)
1011{
1012 int err = 0;
1013 brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRLOW,
1014 (address >> 8) & SBSDIO_SBADDRLOW_MASK, &err);
1015 if (!err)
1016 brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1,
1017 SBSDIO_FUNC1_SBADDRMID,
1018 (address >> 16) & SBSDIO_SBADDRMID_MASK, &err);
1019 if (!err)
1020 brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1,
1021 SBSDIO_FUNC1_SBADDRHIGH,
1022 (address >> 24) & SBSDIO_SBADDRHIGH_MASK,
1023 &err);
1024 return err;
1025}
1026
1027/* Turn backplane clock on or off */
1028static int brcmf_sdbrcm_htclk(struct brcmf_bus *bus, bool on, bool pendok)
1029{
1030 int err;
1031 u8 clkctl, clkreq, devctl;
1032 struct brcmf_sdio_card *card;
1033
1034 BRCMF_TRACE(("%s: Enter\n", __func__));
1035
1036 clkctl = 0;
1037 card = bus->card;
1038
1039 if (on) {
1040 /* Request HT Avail */
1041 clkreq =
1042 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
1043
1044 if ((bus->ci->chip == BCM4329_CHIP_ID)
1045 && (bus->ci->chiprev == 0))
1046 clkreq |= SBSDIO_FORCE_ALP;
1047
1048 brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
1049 SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
1050 if (err) {
1051 BRCMF_ERROR(("%s: HT Avail request error: %d\n",
1052 __func__, err));
1053 return -EBADE;
1054 }
1055
1056 if (pendok && ((bus->ci->buscoretype == PCMCIA_CORE_ID)
1057 && (bus->ci->buscorerev == 9))) {
1058 u32 dummy, retries;
1059 r_sdreg32(bus, &dummy,
1060 offsetof(struct sdpcmd_regs, clockctlstatus),
1061 &retries);
1062 }
1063
1064 /* Check current status */
1065 clkctl = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
1066 SBSDIO_FUNC1_CHIPCLKCSR, &err);
1067 if (err) {
1068 BRCMF_ERROR(("%s: HT Avail read error: %d\n",
1069 __func__, err));
1070 return -EBADE;
1071 }
1072
1073 /* Go to pending and await interrupt if appropriate */
1074 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
1075 /* Allow only clock-available interrupt */
1076 devctl = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
1077 SBSDIO_DEVICE_CTL, &err);
1078 if (err) {
1079 BRCMF_ERROR(("%s: Devctl error setting CA:"
1080 " %d\n", __func__, err));
1081 return -EBADE;
1082 }
1083
1084 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
1085 brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
1086 SBSDIO_DEVICE_CTL, devctl, &err);
1087 BRCMF_INFO(("CLKCTL: set PENDING\n"));
1088 bus->clkstate = CLK_PENDING;
1089
1090 return 0;
1091 } else if (bus->clkstate == CLK_PENDING) {
1092 /* Cancel CA-only interrupt filter */
1093 devctl =
1094 brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
1095 SBSDIO_DEVICE_CTL, &err);
1096 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
1097 brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
1098 SBSDIO_DEVICE_CTL, devctl, &err);
1099 }
1100
1101 /* Otherwise, wait here (polling) for HT Avail */
1102 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
1103 BRCMF_SPINWAIT_SLEEP(sdioh_spinwait_sleep,
1104 ((clkctl =
1105 brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
1106 SBSDIO_FUNC1_CHIPCLKCSR,
1107 &err)),
1108 !SBSDIO_CLKAV(clkctl, bus->alp_only)),
1109 PMU_MAX_TRANSITION_DLY);
1110 }
1111 if (err) {
1112 BRCMF_ERROR(("%s: HT Avail request error: %d\n",
1113 __func__, err));
1114 return -EBADE;
1115 }
1116 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
1117 BRCMF_ERROR(("%s: HT Avail timeout (%d): "
1118 "clkctl 0x%02x\n", __func__,
1119 PMU_MAX_TRANSITION_DLY, clkctl));
1120 return -EBADE;
1121 }
1122
1123 /* Mark clock available */
1124 bus->clkstate = CLK_AVAIL;
1125 BRCMF_INFO(("CLKCTL: turned ON\n"));
1126
1127#if defined(BCMDBG)
1128 if (bus->alp_only != true) {
1129 if (SBSDIO_ALPONLY(clkctl)) {
1130 BRCMF_ERROR(("%s: HT Clock should be on.\n",
1131 __func__));
1132 }
1133 }
1134#endif /* defined (BCMDBG) */
1135
1136 bus->activity = true;
1137 } else {
1138 clkreq = 0;
1139
1140 if (bus->clkstate == CLK_PENDING) {
1141 /* Cancel CA-only interrupt filter */
1142 devctl = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
1143 SBSDIO_DEVICE_CTL, &err);
1144 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
1145 brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
1146 SBSDIO_DEVICE_CTL, devctl, &err);
1147 }
1148
1149 bus->clkstate = CLK_SDONLY;
1150 brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
1151 SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
1152 BRCMF_INFO(("CLKCTL: turned OFF\n"));
1153 if (err) {
1154 BRCMF_ERROR(("%s: Failed access turning clock off:"
1155 " %d\n", __func__, err));
1156 return -EBADE;
1157 }
1158 }
1159 return 0;
1160}
1161
1162/* Change idle/active SD state */
1163static int brcmf_sdbrcm_sdclk(struct brcmf_bus *bus, bool on)
1164{
1165 BRCMF_TRACE(("%s: Enter\n", __func__));
1166
1167 if (on)
1168 bus->clkstate = CLK_SDONLY;
1169 else
1170 bus->clkstate = CLK_NONE;
1171
1172 return 0;
1173}
1174
1175/* Transition SD and backplane clock readiness */
1176static int brcmf_sdbrcm_clkctl(struct brcmf_bus *bus, uint target, bool pendok)
1177{
1178#ifdef BCMDBG
1179 uint oldstate = bus->clkstate;
1180#endif /* BCMDBG */
1181
1182 BRCMF_TRACE(("%s: Enter\n", __func__));
1183
1184 /* Early exit if we're already there */
1185 if (bus->clkstate == target) {
1186 if (target == CLK_AVAIL) {
1187 brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
1188 bus->activity = true;
1189 }
1190 return 0;
1191 }
1192
1193 switch (target) {
1194 case CLK_AVAIL:
1195 /* Make sure SD clock is available */
1196 if (bus->clkstate == CLK_NONE)
1197 brcmf_sdbrcm_sdclk(bus, true);
1198 /* Now request HT Avail on the backplane */
1199 brcmf_sdbrcm_htclk(bus, true, pendok);
1200 brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
1201 bus->activity = true;
1202 break;
1203
1204 case CLK_SDONLY:
1205 /* Remove HT request, or bring up SD clock */
1206 if (bus->clkstate == CLK_NONE)
1207 brcmf_sdbrcm_sdclk(bus, true);
1208 else if (bus->clkstate == CLK_AVAIL)
1209 brcmf_sdbrcm_htclk(bus, false, false);
1210 else
1211 BRCMF_ERROR(("brcmf_sdbrcm_clkctl: request for %d -> %d"
1212 "\n", bus->clkstate, target));
1213 brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
1214 break;
1215
1216 case CLK_NONE:
1217 /* Make sure to remove HT request */
1218 if (bus->clkstate == CLK_AVAIL)
1219 brcmf_sdbrcm_htclk(bus, false, false);
1220 /* Now remove the SD clock */
1221 brcmf_sdbrcm_sdclk(bus, false);
1222 brcmf_sdbrcm_wd_timer(bus, 0);
1223 break;
1224 }
1225#ifdef BCMDBG
1226 BRCMF_INFO(("brcmf_sdbrcm_clkctl: %d -> %d\n",
1227 oldstate, bus->clkstate));
1228#endif /* BCMDBG */
1229
1230 return 0;
1231}
1232
1233int brcmf_sdbrcm_bussleep(struct brcmf_bus *bus, bool sleep)
1234{
1235 struct brcmf_sdio_card *card = bus->card;
1236 uint retries = 0;
1237
1238 BRCMF_INFO(("brcmf_sdbrcm_bussleep: request %s (currently %s)\n",
1239 (sleep ? "SLEEP" : "WAKE"),
1240 (bus->sleeping ? "SLEEP" : "WAKE")));
1241
1242 /* Done if we're already in the requested state */
1243 if (sleep == bus->sleeping)
1244 return 0;
1245
1246 /* Going to sleep: set the alarm and turn off the lights... */
1247 if (sleep) {
1248 /* Don't sleep if something is pending */
1249 if (bus->dpc_sched || bus->rxskip || pktq_len(&bus->txq))
1250 return -EBUSY;
1251
1252 /* Disable SDIO interrupts (no longer interested) */
1253 brcmf_sdcard_intr_disable(bus->card);
1254
1255 /* Make sure the controller has the bus up */
1256 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
1257
1258 /* Tell device to start using OOB wakeup */
1259 w_sdreg32(bus, SMB_USE_OOB,
1260 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
1261 if (retries > retry_limit)
1262 BRCMF_ERROR(("CANNOT SIGNAL CHIP, "
1263 "WILL NOT WAKE UP!!\n"));
1264
1265 /* Turn off our contribution to the HT clock request */
1266 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
1267
1268 brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
1269 SBSDIO_FUNC1_CHIPCLKCSR,
1270 SBSDIO_FORCE_HW_CLKREQ_OFF, NULL);
1271
1272 /* Isolate the bus */
1273 if (bus->ci->chip != BCM4329_CHIP_ID
1274 && bus->ci->chip != BCM4319_CHIP_ID) {
1275 brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
1276 SBSDIO_DEVICE_CTL,
1277 SBSDIO_DEVCTL_PADS_ISO, NULL);
1278 }
1279
1280 /* Change state */
1281 bus->sleeping = true;
1282
1283 } else {
1284 /* Waking up: bus power up is ok, set local state */
1285
1286 brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
1287 SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
1288
1289 /* Force pad isolation off if possible
1290 (in case power never toggled) */
1291 if ((bus->ci->buscoretype == PCMCIA_CORE_ID)
1292 && (bus->ci->buscorerev >= 10))
1293 brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
1294 SBSDIO_DEVICE_CTL, 0, NULL);
1295
1296 /* Make sure the controller has the bus up */
1297 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
1298
1299 /* Send misc interrupt to indicate OOB not needed */
1300 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, tosbmailboxdata),
1301 &retries);
1302 if (retries <= retry_limit)
1303 w_sdreg32(bus, SMB_DEV_INT,
1304 offsetof(struct sdpcmd_regs, tosbmailbox),
1305 &retries);
1306
1307 if (retries > retry_limit)
1308 BRCMF_ERROR(("CANNOT SIGNAL CHIP TO CLEAR OOB!!\n"));
1309
1310 /* Make sure we have SD bus access */
1311 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
1312
1313 /* Change state */
1314 bus->sleeping = false;
1315
1316 /* Enable interrupts again */
1317 if (bus->intr && (bus->drvr->busstate == BRCMF_BUS_DATA)) {
1318 bus->intdis = false;
1319 brcmf_sdcard_intr_enable(bus->card);
1320 }
1321 }
1322
1323 return 0;
1324}
1325
1326#define BUS_WAKE(bus) \
1327 do { \
1328 if ((bus)->sleeping) \
1329 brcmf_sdbrcm_bussleep((bus), false); \
1330 } while (0);
1331
1332/* Writes a HW/SW header into the packet and sends it. */
1333/* Assumes: (a) header space already there, (b) caller holds lock */
1334static int brcmf_sdbrcm_txpkt(struct brcmf_bus *bus, struct sk_buff *pkt, uint chan,
1335 bool free_pkt)
1336{
1337 int ret;
1338 u8 *frame;
1339 u16 len, pad = 0;
1340 u32 swheader;
1341 uint retries = 0;
1342 struct brcmf_sdio_card *card;
1343 struct sk_buff *new;
1344 int i;
1345
1346 BRCMF_TRACE(("%s: Enter\n", __func__));
1347
1348 card = bus->card;
1349
1350 if (bus->drvr->dongle_reset) {
1351 ret = -EPERM;
1352 goto done;
1353 }
1354
1355 frame = (u8 *) (pkt->data);
1356
1357 /* Add alignment padding, allocate new packet if needed */
1358 pad = ((unsigned long)frame % BRCMF_SDALIGN);
1359 if (pad) {
1360 if (skb_headroom(pkt) < pad) {
1361 BRCMF_INFO(("%s: insufficient headroom %d for %d pad\n",
1362 __func__, skb_headroom(pkt), pad));
1363 bus->drvr->tx_realloc++;
1364 new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN);
1365 if (!new) {
1366 BRCMF_ERROR(("%s: couldn't allocate new "
1367 "%d-byte packet\n", __func__,
1368 pkt->len + BRCMF_SDALIGN));
1369 ret = -ENOMEM;
1370 goto done;
1371 }
1372
1373 PKTALIGN(new, pkt->len, BRCMF_SDALIGN);
1374 memcpy(new->data, pkt->data, pkt->len);
1375 if (free_pkt)
1376 brcmu_pkt_buf_free_skb(pkt);
1377 /* free the pkt if canned one is not used */
1378 free_pkt = true;
1379 pkt = new;
1380 frame = (u8 *) (pkt->data);
1381 /* precondition: (frame % BRCMF_SDALIGN) == 0) */
1382 pad = 0;
1383 } else {
1384 skb_push(pkt, pad);
1385 frame = (u8 *) (pkt->data);
1386 /* precondition: pad + SDPCM_HDRLEN <= pkt->len */
1387 memset(frame, 0, pad + SDPCM_HDRLEN);
1388 }
1389 }
1390 /* precondition: pad < BRCMF_SDALIGN */
1391
1392 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
1393 len = (u16) (pkt->len);
1394 *(u16 *) frame = cpu_to_le16(len);
1395 *(((u16 *) frame) + 1) = cpu_to_le16(~len);
1396
1397 /* Software tag: channel, sequence number, data offset */
1398 swheader =
1399 ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
1400 (((pad +
1401 SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
1402
1403 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
1404 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
1405
1406#ifdef BCMDBG
1407 tx_packets[pkt->priority]++;
1408 if (BRCMF_BYTES_ON() &&
1409 (((BRCMF_CTL_ON() && (chan == SDPCM_CONTROL_CHANNEL)) ||
1410 (BRCMF_DATA_ON() && (chan != SDPCM_CONTROL_CHANNEL))))) {
1411 printk(KERN_DEBUG "Tx Frame:\n");
1412 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, frame, len);
1413 } else if (BRCMF_HDRS_ON()) {
1414 printk(KERN_DEBUG "TxHdr:\n");
1415 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1416 frame, min_t(u16, len, 16));
1417 }
1418#endif
1419
1420 /* Raise len to next SDIO block to eliminate tail command */
1421 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
1422 u16 pad = bus->blocksize - (len % bus->blocksize);
1423 if ((pad <= bus->roundup) && (pad < bus->blocksize))
1424 len += pad;
1425 } else if (len % BRCMF_SDALIGN) {
1426 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
1427 }
1428
1429 /* Some controllers have trouble with odd bytes -- round to even */
1430 if (forcealign && (len & (ALIGNMENT - 1))) {
1431 len = roundup(len, ALIGNMENT);
1432 }
1433
1434 do {
1435 ret = brcmf_sdbrcm_send_buf(bus, brcmf_sdcard_cur_sbwad(card),
1436 SDIO_FUNC_2, F2SYNC, frame, len, pkt, NULL, NULL);
1437 bus->f2txdata++;
1438
1439 if (ret < 0) {
1440 /* On failure, abort the command
1441 and terminate the frame */
1442 BRCMF_INFO(("%s: sdio error %d, abort command and "
1443 "terminate frame.\n", __func__, ret));
1444 bus->tx_sderrs++;
1445
1446 brcmf_sdcard_abort(card, SDIO_FUNC_2);
1447 brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
1448 SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
1449 NULL);
1450 bus->f1regdata++;
1451
1452 for (i = 0; i < 3; i++) {
1453 u8 hi, lo;
1454 hi = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
1455 SBSDIO_FUNC1_WFRAMEBCHI,
1456 NULL);
1457 lo = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
1458 SBSDIO_FUNC1_WFRAMEBCLO,
1459 NULL);
1460 bus->f1regdata += 2;
1461 if ((hi == 0) && (lo == 0))
1462 break;
1463 }
1464
1465 }
1466 if (ret == 0)
1467 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
1468
1469 } while ((ret < 0) && retrydata && retries++ < TXRETRIES);
1470
1471done:
1472 /* restore pkt buffer pointer before calling tx complete routine */
1473 skb_pull(pkt, SDPCM_HDRLEN + pad);
1474 brcmf_sdbrcm_sdunlock(bus);
1475 brcmf_txcomplete(bus->drvr, pkt, ret != 0);
1476 brcmf_sdbrcm_sdlock(bus);
1477
1478 if (free_pkt)
1479 brcmu_pkt_buf_free_skb(pkt);
1480
1481 return ret;
1482}
1483
1484int brcmf_sdbrcm_bus_txdata(struct brcmf_bus *bus, struct sk_buff *pkt)
1485{
1486 int ret = -EBADE;
1487 uint datalen, prec;
1488
1489 BRCMF_TRACE(("%s: Enter\n", __func__));
1490
1491 datalen = pkt->len;
1492
1493#ifdef SDTEST
1494 /* Push the test header if doing loopback */
1495 if (bus->ext_loop) {
1496 u8 *data;
1497 skb_push(pkt, SDPCM_TEST_HDRLEN);
1498 data = pkt->data;
1499 *data++ = SDPCM_TEST_ECHOREQ;
1500 *data++ = (u8) bus->loopid++;
1501 *data++ = (datalen >> 0);
1502 *data++ = (datalen >> 8);
1503 datalen += SDPCM_TEST_HDRLEN;
1504 }
1505#endif /* SDTEST */
1506
1507 /* Add space for the header */
1508 skb_push(pkt, SDPCM_HDRLEN);
1509 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
1510
1511 prec = PRIO2PREC((pkt->priority & PRIOMASK));
1512
1513 /* Check for existing queue, current flow-control,
1514 pending event, or pending clock */
1515 if (brcmf_deferred_tx || bus->fcstate || pktq_len(&bus->txq)
1516 || bus->dpc_sched || (!DATAOK(bus))
1517 || (bus->flowcontrol & NBITVAL(prec))
1518 || (bus->clkstate != CLK_AVAIL)) {
1519 BRCMF_TRACE(("%s: deferring pktq len %d\n", __func__,
1520 pktq_len(&bus->txq)));
1521 bus->fcqueued++;
1522
1523 /* Priority based enq */
1524 spin_lock_bh(&bus->txqlock);
1525 if (brcmf_c_prec_enq(bus->drvr, &bus->txq, pkt, prec) == false) {
1526 skb_pull(pkt, SDPCM_HDRLEN);
1527 brcmf_txcomplete(bus->drvr, pkt, false);
1528 brcmu_pkt_buf_free_skb(pkt);
1529 BRCMF_ERROR(("%s: out of bus->txq !!!\n", __func__));
1530 ret = -ENOSR;
1531 } else {
1532 ret = 0;
1533 }
1534 spin_unlock_bh(&bus->txqlock);
1535
1536 if (pktq_len(&bus->txq) >= TXHI)
1537 brcmf_txflowcontrol(bus->drvr, 0, ON);
1538
1539#ifdef BCMDBG
1540 if (pktq_plen(&bus->txq, prec) > qcount[prec])
1541 qcount[prec] = pktq_plen(&bus->txq, prec);
1542#endif
1543 /* Schedule DPC if needed to send queued packet(s) */
1544 if (brcmf_deferred_tx && !bus->dpc_sched) {
1545 bus->dpc_sched = true;
1546 brcmf_sdbrcm_sched_dpc(bus);
1547 }
1548 } else {
1549 /* Lock: we're about to use shared data/code (and SDIO) */
1550 brcmf_sdbrcm_sdlock(bus);
1551
1552 /* Otherwise, send it now */
1553 BUS_WAKE(bus);
1554 /* Make sure back plane ht clk is on, no pending allowed */
1555 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
1556
1557#ifndef SDTEST
1558 BRCMF_TRACE(("%s: calling txpkt\n", __func__));
1559 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
1560#else
1561 ret = brcmf_sdbrcm_txpkt(bus, pkt,
1562 (bus->ext_loop ? SDPCM_TEST_CHANNEL :
1563 SDPCM_DATA_CHANNEL), true);
1564#endif
1565 if (ret)
1566 bus->drvr->tx_errors++;
1567 else
1568 bus->drvr->dstats.tx_bytes += datalen;
1569
1570 if (bus->idletime == BRCMF_IDLE_IMMEDIATE &&
1571 !bus->dpc_sched) {
1572 bus->activity = false;
1573 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
1574 }
1575
1576 brcmf_sdbrcm_sdunlock(bus);
1577 }
1578
1579 return ret;
1580}
1581
1582static uint brcmf_sdbrcm_sendfromq(struct brcmf_bus *bus, uint maxframes)
1583{
1584 struct sk_buff *pkt;
1585 u32 intstatus = 0;
1586 uint retries = 0;
1587 int ret = 0, prec_out;
1588 uint cnt = 0;
1589 uint datalen;
1590 u8 tx_prec_map;
1591
1592 struct brcmf_pub *drvr = bus->drvr;
1593
1594 BRCMF_TRACE(("%s: Enter\n", __func__));
1595
1596 tx_prec_map = ~bus->flowcontrol;
1597
1598 /* Send frames until the limit or some other event */
1599 for (cnt = 0; (cnt < maxframes) && DATAOK(bus); cnt++) {
1600 spin_lock_bh(&bus->txqlock);
1601 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
1602 if (pkt == NULL) {
1603 spin_unlock_bh(&bus->txqlock);
1604 break;
1605 }
1606 spin_unlock_bh(&bus->txqlock);
1607 datalen = pkt->len - SDPCM_HDRLEN;
1608
1609#ifndef SDTEST
1610 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
1611#else
1612 ret = brcmf_sdbrcm_txpkt(bus, pkt,
1613 (bus->ext_loop ? SDPCM_TEST_CHANNEL :
1614 SDPCM_DATA_CHANNEL), true);
1615#endif
1616 if (ret)
1617 bus->drvr->tx_errors++;
1618 else
1619 bus->drvr->dstats.tx_bytes += datalen;
1620
1621 /* In poll mode, need to check for other events */
1622 if (!bus->intr && cnt) {
1623 /* Check device status, signal pending interrupt */
1624 r_sdreg32(bus, &intstatus,
1625 offsetof(struct sdpcmd_regs, intstatus),
1626 &retries);
1627 bus->f2txdata++;
1628 if (brcmf_sdcard_regfail(bus->card))
1629 break;
1630 if (intstatus & bus->hostintmask)
1631 bus->ipend = true;
1632 }
1633 }
1634
1635 /* Deflow-control stack if needed */
1636 if (drvr->up && (drvr->busstate == BRCMF_BUS_DATA) &&
1637 drvr->txoff && (pktq_len(&bus->txq) < TXLOW))
1638 brcmf_txflowcontrol(drvr, 0, OFF);
1639
1640 return cnt;
1641}
1642
1643int
1644brcmf_sdbrcm_bus_txctl(struct brcmf_bus *bus, unsigned char *msg, uint msglen)
1645{
1646 u8 *frame;
1647 u16 len;
1648 u32 swheader;
1649 uint retries = 0;
1650 struct brcmf_sdio_card *card = bus->card;
1651 u8 doff = 0;
1652 int ret = -1;
1653 int i;
1654
1655 BRCMF_TRACE(("%s: Enter\n", __func__));
1656
1657 if (bus->drvr->dongle_reset)
1658 return -EIO;
1659
1660 /* Back the pointer to make a room for bus header */
1661 frame = msg - SDPCM_HDRLEN;
1662 len = (msglen += SDPCM_HDRLEN);
1663
1664 /* Add alignment padding (optional for ctl frames) */
1665 if (brcmf_alignctl) {
1666 doff = ((unsigned long)frame % BRCMF_SDALIGN);
1667 if (doff) {
1668 frame -= doff;
1669 len += doff;
1670 msglen += doff;
1671 memset(frame, 0, doff + SDPCM_HDRLEN);
1672 }
1673 /* precondition: doff < BRCMF_SDALIGN */
1674 }
1675 doff += SDPCM_HDRLEN;
1676
1677 /* Round send length to next SDIO block */
1678 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
1679 u16 pad = bus->blocksize - (len % bus->blocksize);
1680 if ((pad <= bus->roundup) && (pad < bus->blocksize))
1681 len += pad;
1682 } else if (len % BRCMF_SDALIGN) {
1683 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
1684 }
1685
1686 /* Satisfy length-alignment requirements */
1687 if (forcealign && (len & (ALIGNMENT - 1)))
1688 len = roundup(len, ALIGNMENT);
1689
1690 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
1691
1692 /* Need to lock here to protect txseq and SDIO tx calls */
1693 brcmf_sdbrcm_sdlock(bus);
1694
1695 BUS_WAKE(bus);
1696
1697 /* Make sure backplane clock is on */
1698 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
1699
1700 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
1701 *(u16 *) frame = cpu_to_le16((u16) msglen);
1702 *(((u16 *) frame) + 1) = cpu_to_le16(~msglen);
1703
1704 /* Software tag: channel, sequence number, data offset */
1705 swheader =
1706 ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
1707 SDPCM_CHANNEL_MASK)
1708 | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
1709 SDPCM_DOFFSET_MASK);
1710 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
1711 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
1712
1713 if (!DATAOK(bus)) {
1714 BRCMF_INFO(("%s: No bus credit bus->tx_max %d,"
1715 " bus->tx_seq %d\n", __func__,
1716 bus->tx_max, bus->tx_seq));
1717 bus->ctrl_frame_stat = true;
1718 /* Send from dpc */
1719 bus->ctrl_frame_buf = frame;
1720 bus->ctrl_frame_len = len;
1721
1722 brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat);
1723
1724 if (bus->ctrl_frame_stat == false) {
1725 BRCMF_INFO(("%s: ctrl_frame_stat == false\n",
1726 __func__));
1727 ret = 0;
1728 } else {
1729 BRCMF_INFO(("%s: ctrl_frame_stat == true\n", __func__));
1730 ret = -1;
1731 }
1732 }
1733
1734 if (ret == -1) {
1735#ifdef BCMDBG
1736 if (BRCMF_BYTES_ON() && BRCMF_CTL_ON()) {
1737 printk(KERN_DEBUG "Tx Frame:\n");
1738 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1739 frame, len);
1740 } else if (BRCMF_HDRS_ON()) {
1741 printk(KERN_DEBUG "TxHdr:\n");
1742 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
1743 frame, min_t(u16, len, 16));
1744 }
1745#endif
1746
1747 do {
1748 bus->ctrl_frame_stat = false;
1749 ret = brcmf_sdbrcm_send_buf(bus,
1750 brcmf_sdcard_cur_sbwad(card), SDIO_FUNC_2,
1751 F2SYNC, frame, len, NULL, NULL, NULL);
1752
1753 if (ret < 0) {
1754 /* On failure, abort the command and
1755 terminate the frame */
1756 BRCMF_INFO(("%s: sdio error %d, abort command "
1757 "and terminate frame.\n",
1758 __func__, ret));
1759 bus->tx_sderrs++;
1760
1761 brcmf_sdcard_abort(card, SDIO_FUNC_2);
1762
1763 brcmf_sdcard_cfg_write(card, SDIO_FUNC_1,
1764 SBSDIO_FUNC1_FRAMECTRL,
1765 SFC_WF_TERM, NULL);
1766 bus->f1regdata++;
1767
1768 for (i = 0; i < 3; i++) {
1769 u8 hi, lo;
1770 hi = brcmf_sdcard_cfg_read(card,
1771 SDIO_FUNC_1,
1772 SBSDIO_FUNC1_WFRAMEBCHI,
1773 NULL);
1774 lo = brcmf_sdcard_cfg_read(card,
1775 SDIO_FUNC_1,
1776 SBSDIO_FUNC1_WFRAMEBCLO,
1777 NULL);
1778 bus->f1regdata += 2;
1779 if ((hi == 0) && (lo == 0))
1780 break;
1781 }
1782
1783 }
1784 if (ret == 0) {
1785 bus->tx_seq =
1786 (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
1787 }
1788 } while ((ret < 0) && retries++ < TXRETRIES);
1789 }
1790
1791 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) {
1792 bus->activity = false;
1793 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
1794 }
1795
1796 brcmf_sdbrcm_sdunlock(bus);
1797
1798 if (ret)
1799 bus->drvr->tx_ctlerrs++;
1800 else
1801 bus->drvr->tx_ctlpkts++;
1802
1803 return ret ? -EIO : 0;
1804}
1805
1806int brcmf_sdbrcm_bus_rxctl(struct brcmf_bus *bus, unsigned char *msg, uint msglen)
1807{
1808 int timeleft;
1809 uint rxlen = 0;
1810 bool pending;
1811
1812 BRCMF_TRACE(("%s: Enter\n", __func__));
1813
1814 if (bus->drvr->dongle_reset)
1815 return -EIO;
1816
1817 /* Wait until control frame is available */
1818 timeleft = brcmf_os_ioctl_resp_wait(bus->drvr, &bus->rxlen, &pending);
1819
1820 brcmf_sdbrcm_sdlock(bus);
1821 rxlen = bus->rxlen;
1822 memcpy(msg, bus->rxctl, min(msglen, rxlen));
1823 bus->rxlen = 0;
1824 brcmf_sdbrcm_sdunlock(bus);
1825
1826 if (rxlen) {
1827 BRCMF_CTL(("%s: resumed on rxctl frame, got %d expected %d\n",
1828 __func__, rxlen, msglen));
1829 } else if (timeleft == 0) {
1830 BRCMF_ERROR(("%s: resumed on timeout\n", __func__));
1831#ifdef BCMDBG
1832 brcmf_sdbrcm_sdlock(bus);
1833 brcmf_sdbrcm_checkdied(bus, NULL, 0);
1834 brcmf_sdbrcm_sdunlock(bus);
1835#endif /* BCMDBG */
1836 } else if (pending == true) {
1837 BRCMF_CTL(("%s: cancelled\n", __func__));
1838 return -ERESTARTSYS;
1839 } else {
1840 BRCMF_CTL(("%s: resumed for unknown reason?\n", __func__));
1841#ifdef BCMDBG
1842 brcmf_sdbrcm_sdlock(bus);
1843 brcmf_sdbrcm_checkdied(bus, NULL, 0);
1844 brcmf_sdbrcm_sdunlock(bus);
1845#endif /* BCMDBG */
1846 }
1847
1848 if (rxlen)
1849 bus->drvr->rx_ctlpkts++;
1850 else
1851 bus->drvr->rx_ctlerrs++;
1852
1853 return rxlen ? (int)rxlen : -ETIMEDOUT;
1854}
1855
1856/* IOVar table */
1857enum {
1858 IOV_INTR = 1,
1859 IOV_POLLRATE,
1860 IOV_SDREG,
1861 IOV_SBREG,
1862 IOV_SDCIS,
1863 IOV_MEMBYTES,
1864 IOV_MEMSIZE,
1865#ifdef BCMDBG
1866 IOV_CHECKDIED,
1867 IOV_CONS,
1868 IOV_DCONSOLE_POLL,
1869#endif
1870 IOV_DOWNLOAD,
1871 IOV_FORCEEVEN,
1872 IOV_SDIOD_DRIVE,
1873 IOV_READAHEAD,
1874 IOV_SDRXCHAIN,
1875 IOV_ALIGNCTL,
1876 IOV_SDALIGN,
1877 IOV_DEVRESET,
1878 IOV_CPU,
1879#ifdef SDTEST
1880 IOV_PKTGEN,
1881 IOV_EXTLOOP,
1882#endif /* SDTEST */
1883 IOV_SPROM,
1884 IOV_TXBOUND,
1885 IOV_RXBOUND,
1886 IOV_TXMINMAX,
1887 IOV_IDLETIME,
1888 IOV_IDLECLOCK,
1889 IOV_SD1IDLE,
1890 IOV_SLEEP,
1891 IOV_WDTICK,
1892 IOV_VARS
1893};
1894
1895const struct brcmu_iovar brcmf_sdio_iovars[] = {
1896 {"intr", IOV_INTR, 0, IOVT_BOOL, 0},
1897 {"sleep", IOV_SLEEP, 0, IOVT_BOOL, 0},
1898 {"pollrate", IOV_POLLRATE, 0, IOVT_UINT32, 0},
1899 {"idletime", IOV_IDLETIME, 0, IOVT_INT32, 0},
1900 {"idleclock", IOV_IDLECLOCK, 0, IOVT_INT32, 0},
1901 {"sd1idle", IOV_SD1IDLE, 0, IOVT_BOOL, 0},
1902 {"membytes", IOV_MEMBYTES, 0, IOVT_BUFFER, 2 * sizeof(int)},
1903 {"memsize", IOV_MEMSIZE, 0, IOVT_UINT32, 0},
1904 {"download", IOV_DOWNLOAD, 0, IOVT_BOOL, 0},
1905 {"vars", IOV_VARS, 0, IOVT_BUFFER, 0},
1906 {"sdiod_drive", IOV_SDIOD_DRIVE, 0, IOVT_UINT32, 0},
1907 {"readahead", IOV_READAHEAD, 0, IOVT_BOOL, 0},
1908 {"sdrxchain", IOV_SDRXCHAIN, 0, IOVT_BOOL, 0},
1909 {"alignctl", IOV_ALIGNCTL, 0, IOVT_BOOL, 0},
1910 {"sdalign", IOV_SDALIGN, 0, IOVT_BOOL, 0},
1911 {"devreset", IOV_DEVRESET, 0, IOVT_BOOL, 0},
1912 {"wdtick", IOV_WDTICK, 0, IOVT_UINT32, 0},
1913#ifdef BCMDBG
1914 {"cons", IOV_CONS, 0, IOVT_BUFFER, 0}
1915 ,
1916 {"dconpoll", IOV_DCONSOLE_POLL, 0, IOVT_UINT32, 0}
1917 ,
1918 {"sdreg", IOV_SDREG, 0, IOVT_BUFFER, sizeof(struct brcmf_sdreg)}
1919 ,
1920 {"sbreg", IOV_SBREG, 0, IOVT_BUFFER, sizeof(struct brcmf_sdreg)}
1921 ,
1922 {"sd_cis", IOV_SDCIS, 0, IOVT_BUFFER, BRCMF_IOCTL_MAXLEN}
1923 ,
1924 {"forcealign", IOV_FORCEEVEN, 0, IOVT_BOOL, 0}
1925 ,
1926 {"txbound", IOV_TXBOUND, 0, IOVT_UINT32, 0}
1927 ,
1928 {"rxbound", IOV_RXBOUND, 0, IOVT_UINT32, 0}
1929 ,
1930 {"txminmax", IOV_TXMINMAX, 0, IOVT_UINT32, 0}
1931 ,
1932 {"cpu", IOV_CPU, 0, IOVT_BOOL, 0}
1933 ,
1934 {"checkdied", IOV_CHECKDIED, 0, IOVT_BUFFER, 0}
1935 ,
1936#endif /* BCMDBG */
1937#ifdef SDTEST
1938 {"extloop", IOV_EXTLOOP, 0, IOVT_BOOL, 0}
1939 ,
1940 {"pktgen", IOV_PKTGEN, 0, IOVT_BUFFER, sizeof(struct brcmf_pktgen)}
1941 ,
1942#endif /* SDTEST */
1943
1944 {NULL, 0, 0, 0, 0}
1945};
1946
1947static void
1948brcmf_dump_pct(struct brcmu_strbuf *strbuf, char *desc, uint num, uint div)
1949{
1950 uint q1, q2;
1951
1952 if (!div) {
1953 brcmu_bprintf(strbuf, "%s N/A", desc);
1954 } else {
1955 q1 = num / div;
1956 q2 = (100 * (num - (q1 * div))) / div;
1957 brcmu_bprintf(strbuf, "%s %d.%02d", desc, q1, q2);
1958 }
1959}
1960
1961void brcmf_sdbrcm_bus_dump(struct brcmf_pub *drvr, struct brcmu_strbuf *strbuf)
1962{
1963 struct brcmf_bus *bus = drvr->bus;
1964
1965 brcmu_bprintf(strbuf, "Bus SDIO structure:\n");
1966 brcmu_bprintf(strbuf,
1967 "hostintmask 0x%08x intstatus 0x%08x sdpcm_ver %d\n",
1968 bus->hostintmask, bus->intstatus, bus->sdpcm_ver);
1969 brcmu_bprintf(strbuf,
1970 "fcstate %d qlen %d tx_seq %d, max %d, rxskip %d rxlen %d rx_seq %d\n",
1971 bus->fcstate, pktq_len(&bus->txq), bus->tx_seq, bus->tx_max,
1972 bus->rxskip, bus->rxlen, bus->rx_seq);
1973 brcmu_bprintf(strbuf, "intr %d intrcount %d lastintrs %d spurious %d\n",
1974 bus->intr, bus->intrcount, bus->lastintrs, bus->spurious);
1975 brcmu_bprintf(strbuf, "pollrate %d pollcnt %d regfails %d\n",
1976 bus->pollrate, bus->pollcnt, bus->regfails);
1977
1978 brcmu_bprintf(strbuf, "\nAdditional counters:\n");
1979 brcmu_bprintf(strbuf,
1980 "tx_sderrs %d fcqueued %d rxrtx %d rx_toolong %d rxc_errors %d\n",
1981 bus->tx_sderrs, bus->fcqueued, bus->rxrtx, bus->rx_toolong,
1982 bus->rxc_errors);
1983 brcmu_bprintf(strbuf, "rx_hdrfail %d badhdr %d badseq %d\n",
1984 bus->rx_hdrfail, bus->rx_badhdr, bus->rx_badseq);
1985 brcmu_bprintf(strbuf, "fc_rcvd %d, fc_xoff %d, fc_xon %d\n",
1986 bus->fc_rcvd, bus->fc_xoff, bus->fc_xon);
1987 brcmu_bprintf(strbuf, "rxglomfail %d, rxglomframes %d, rxglompkts %d\n",
1988 bus->rxglomfail, bus->rxglomframes, bus->rxglompkts);
1989 brcmu_bprintf(strbuf, "f2rx (hdrs/data) %d (%d/%d), f2tx %d f1regs"
1990 " %d\n",
1991 (bus->f2rxhdrs + bus->f2rxdata), bus->f2rxhdrs,
1992 bus->f2rxdata, bus->f2txdata, bus->f1regdata);
1993 {
1994 brcmf_dump_pct(strbuf, "\nRx: pkts/f2rd", bus->drvr->rx_packets,
1995 (bus->f2rxhdrs + bus->f2rxdata));
1996 brcmf_dump_pct(strbuf, ", pkts/f1sd", bus->drvr->rx_packets,
1997 bus->f1regdata);
1998 brcmf_dump_pct(strbuf, ", pkts/sd", bus->drvr->rx_packets,
1999 (bus->f2rxhdrs + bus->f2rxdata + bus->f1regdata));
2000 brcmf_dump_pct(strbuf, ", pkts/int", bus->drvr->rx_packets,
2001 bus->intrcount);
2002 brcmu_bprintf(strbuf, "\n");
2003
2004 brcmf_dump_pct(strbuf, "Rx: glom pct", (100 * bus->rxglompkts),
2005 bus->drvr->rx_packets);
2006 brcmf_dump_pct(strbuf, ", pkts/glom", bus->rxglompkts,
2007 bus->rxglomframes);
2008 brcmu_bprintf(strbuf, "\n");
2009
2010 brcmf_dump_pct(strbuf, "Tx: pkts/f2wr", bus->drvr->tx_packets,
2011 bus->f2txdata);
2012 brcmf_dump_pct(strbuf, ", pkts/f1sd", bus->drvr->tx_packets,
2013 bus->f1regdata);
2014 brcmf_dump_pct(strbuf, ", pkts/sd", bus->drvr->tx_packets,
2015 (bus->f2txdata + bus->f1regdata));
2016 brcmf_dump_pct(strbuf, ", pkts/int", bus->drvr->tx_packets,
2017 bus->intrcount);
2018 brcmu_bprintf(strbuf, "\n");
2019
2020 brcmf_dump_pct(strbuf, "Total: pkts/f2rw",
2021 (bus->drvr->tx_packets + bus->drvr->rx_packets),
2022 (bus->f2txdata + bus->f2rxhdrs + bus->f2rxdata));
2023 brcmf_dump_pct(strbuf, ", pkts/f1sd",
2024 (bus->drvr->tx_packets + bus->drvr->rx_packets),
2025 bus->f1regdata);
2026 brcmf_dump_pct(strbuf, ", pkts/sd",
2027 (bus->drvr->tx_packets + bus->drvr->rx_packets),
2028 (bus->f2txdata + bus->f2rxhdrs + bus->f2rxdata +
2029 bus->f1regdata));
2030 brcmf_dump_pct(strbuf, ", pkts/int",
2031 (bus->drvr->tx_packets + bus->drvr->rx_packets),
2032 bus->intrcount);
2033 brcmu_bprintf(strbuf, "\n\n");
2034 }
2035
2036#ifdef SDTEST
2037 if (bus->pktgen_count) {
2038 brcmu_bprintf(strbuf, "pktgen config and count:\n");
2039 brcmu_bprintf(strbuf,
2040 "freq %d count %d print %d total %d min %d len %d\n",
2041 bus->pktgen_freq, bus->pktgen_count,
2042 bus->pktgen_print, bus->pktgen_total,
2043 bus->pktgen_minlen, bus->pktgen_maxlen);
2044 brcmu_bprintf(strbuf, "send attempts %d rcvd %d fail %d\n",
2045 bus->pktgen_sent, bus->pktgen_rcvd,
2046 bus->pktgen_fail);
2047 }
2048#endif /* SDTEST */
2049#ifdef BCMDBG
2050 brcmu_bprintf(strbuf, "dpc_sched %d host interrupt%spending\n",
2051 bus->dpc_sched, " not ");
2052 brcmu_bprintf(strbuf, "blocksize %d roundup %d\n", bus->blocksize,
2053 bus->roundup);
2054#endif /* BCMDBG */
2055 brcmu_bprintf(strbuf,
2056 "clkstate %d activity %d idletime %d idlecount %d sleeping %d\n",
2057 bus->clkstate, bus->activity, bus->idletime, bus->idlecount,
2058 bus->sleeping);
2059}
2060
2061void brcmf_bus_clearcounts(struct brcmf_pub *drvr)
2062{
2063 struct brcmf_bus *bus = (struct brcmf_bus *) drvr->bus;
2064
2065 bus->intrcount = bus->lastintrs = bus->spurious = bus->regfails = 0;
2066 bus->rxrtx = bus->rx_toolong = bus->rxc_errors = 0;
2067 bus->rx_hdrfail = bus->rx_badhdr = bus->rx_badseq = 0;
2068 bus->tx_sderrs = bus->fc_rcvd = bus->fc_xoff = bus->fc_xon = 0;
2069 bus->rxglomfail = bus->rxglomframes = bus->rxglompkts = 0;
2070 bus->f2rxhdrs = bus->f2rxdata = bus->f2txdata = bus->f1regdata = 0;
2071}
2072
2073#ifdef SDTEST
2074static int brcmf_sdbrcm_pktgen_get(struct brcmf_bus *bus, u8 *arg)
2075{
2076 struct brcmf_pktgen pktgen;
2077
2078 pktgen.version = BRCMF_PKTGEN_VERSION;
2079 pktgen.freq = bus->pktgen_freq;
2080 pktgen.count = bus->pktgen_count;
2081 pktgen.print = bus->pktgen_print;
2082 pktgen.total = bus->pktgen_total;
2083 pktgen.minlen = bus->pktgen_minlen;
2084 pktgen.maxlen = bus->pktgen_maxlen;
2085 pktgen.numsent = bus->pktgen_sent;
2086 pktgen.numrcvd = bus->pktgen_rcvd;
2087 pktgen.numfail = bus->pktgen_fail;
2088 pktgen.mode = bus->pktgen_mode;
2089 pktgen.stop = bus->pktgen_stop;
2090
2091 memcpy(arg, &pktgen, sizeof(pktgen));
2092
2093 return 0;
2094}
2095
2096static int brcmf_sdbrcm_pktgen_set(struct brcmf_bus *bus, u8 *arg)
2097{
2098 struct brcmf_pktgen pktgen;
2099 uint oldcnt, oldmode;
2100
2101 memcpy(&pktgen, arg, sizeof(pktgen));
2102 if (pktgen.version != BRCMF_PKTGEN_VERSION)
2103 return -EINVAL;
2104
2105 oldcnt = bus->pktgen_count;
2106 oldmode = bus->pktgen_mode;
2107
2108 bus->pktgen_freq = pktgen.freq;
2109 bus->pktgen_count = pktgen.count;
2110 bus->pktgen_print = pktgen.print;
2111 bus->pktgen_total = pktgen.total;
2112 bus->pktgen_minlen = pktgen.minlen;
2113 bus->pktgen_maxlen = pktgen.maxlen;
2114 bus->pktgen_mode = pktgen.mode;
2115 bus->pktgen_stop = pktgen.stop;
2116
2117 bus->pktgen_tick = bus->pktgen_ptick = 0;
2118 bus->pktgen_len = max(bus->pktgen_len, bus->pktgen_minlen);
2119 bus->pktgen_len = min(bus->pktgen_len, bus->pktgen_maxlen);
2120
2121 /* Clear counts for a new pktgen (mode change, or was stopped) */
2122 if (bus->pktgen_count && (!oldcnt || oldmode != bus->pktgen_mode))
2123 bus->pktgen_sent = bus->pktgen_rcvd = bus->pktgen_fail = 0;
2124
2125 return 0;
2126}
2127#endif /* SDTEST */
2128
2129static int
2130brcmf_sdbrcm_membytes(struct brcmf_bus *bus, bool write, u32 address, u8 *data,
2131 uint size)
2132{
2133 int bcmerror = 0;
2134 u32 sdaddr;
2135 uint dsize;
2136
2137 /* Determine initial transfer parameters */
2138 sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK;
2139 if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK)
2140 dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr);
2141 else
2142 dsize = size;
2143
2144 /* Set the backplane window to include the start address */
2145 bcmerror = brcmf_sdbrcm_set_siaddr_window(bus, address);
2146 if (bcmerror) {
2147 BRCMF_ERROR(("%s: window change failed\n", __func__));
2148 goto xfer_done;
2149 }
2150
2151 /* Do the transfer(s) */
2152 while (size) {
2153 BRCMF_INFO(("%s: %s %d bytes at offset 0x%08x in window"
2154 " 0x%08x\n", __func__, (write ? "write" : "read"),
2155 dsize, sdaddr, (address & SBSDIO_SBWINDOW_MASK)));
2156 bcmerror =
2157 brcmf_sdcard_rwdata(bus->card, write, sdaddr, data, dsize);
2158 if (bcmerror) {
2159 BRCMF_ERROR(("%s: membytes transfer failed\n",
2160 __func__));
2161 break;
2162 }
2163
2164 /* Adjust for next transfer (if any) */
2165 size -= dsize;
2166 if (size) {
2167 data += dsize;
2168 address += dsize;
2169 bcmerror = brcmf_sdbrcm_set_siaddr_window(bus, address);
2170 if (bcmerror) {
2171 BRCMF_ERROR(("%s: window change failed\n",
2172 __func__));
2173 break;
2174 }
2175 sdaddr = 0;
2176 dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size);
2177 }
2178 }
2179
2180xfer_done:
2181 /* Return the window to backplane enumeration space for core access */
2182 if (brcmf_sdbrcm_set_siaddr_window(bus,
2183 brcmf_sdcard_cur_sbwad(bus->card))) {
2184 BRCMF_ERROR(("%s: FAILED to set window back to 0x%x\n",
2185 __func__, brcmf_sdcard_cur_sbwad(bus->card)));
2186 }
2187
2188 return bcmerror;
2189}
2190
2191#ifdef BCMDBG
2192static int brcmf_sdbrcm_readshared(struct brcmf_bus *bus, struct sdpcm_shared *sh)
2193{
2194 u32 addr;
2195 int rv;
2196
2197 /* Read last word in memory to determine address of
2198 sdpcm_shared structure */
2199 rv = brcmf_sdbrcm_membytes(bus, false, bus->ramsize - 4, (u8 *)&addr,
2200 4);
2201 if (rv < 0)
2202 return rv;
2203
2204 addr = le32_to_cpu(addr);
2205
2206 BRCMF_INFO(("sdpcm_shared address 0x%08X\n", addr));
2207
2208 /*
2209 * Check if addr is valid.
2210 * NVRAM length at the end of memory should have been overwritten.
2211 */
2212 if (addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff)) {
2213 BRCMF_ERROR(("%s: address (0x%08x) of sdpcm_shared invalid\n",
2214 __func__, addr));
2215 return -EBADE;
2216 }
2217
2218 /* Read rte_shared structure */
2219 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *) sh,
2220 sizeof(struct sdpcm_shared));
2221 if (rv < 0)
2222 return rv;
2223
2224 /* Endianness */
2225 sh->flags = le32_to_cpu(sh->flags);
2226 sh->trap_addr = le32_to_cpu(sh->trap_addr);
2227 sh->assert_exp_addr = le32_to_cpu(sh->assert_exp_addr);
2228 sh->assert_file_addr = le32_to_cpu(sh->assert_file_addr);
2229 sh->assert_line = le32_to_cpu(sh->assert_line);
2230 sh->console_addr = le32_to_cpu(sh->console_addr);
2231 sh->msgtrace_addr = le32_to_cpu(sh->msgtrace_addr);
2232
2233 if ((sh->flags & SDPCM_SHARED_VERSION_MASK) != SDPCM_SHARED_VERSION) {
2234 BRCMF_ERROR(("%s: sdpcm_shared version %d in brcmf "
2235 "is different than sdpcm_shared version %d in dongle\n",
2236 __func__, SDPCM_SHARED_VERSION,
2237 sh->flags & SDPCM_SHARED_VERSION_MASK));
2238 return -EBADE;
2239 }
2240
2241 return 0;
2242}
2243
2244static int brcmf_sdbrcm_checkdied(struct brcmf_bus *bus, u8 *data, uint size)
2245{
2246 int bcmerror = 0;
2247 uint msize = 512;
2248 char *mbuffer = NULL;
2249 uint maxstrlen = 256;
2250 char *str = NULL;
2251 struct brcmf_trap tr;
2252 struct sdpcm_shared sdpcm_shared;
2253 struct brcmu_strbuf strbuf;
2254
2255 BRCMF_TRACE(("%s: Enter\n", __func__));
2256
2257 if (data == NULL) {
2258 /*
2259 * Called after a rx ctrl timeout. "data" is NULL.
2260 * allocate memory to trace the trap or assert.
2261 */
2262 size = msize;
2263 mbuffer = data = kmalloc(msize, GFP_ATOMIC);
2264 if (mbuffer == NULL) {
2265 BRCMF_ERROR(("%s: kmalloc(%d) failed\n", __func__,
2266 msize));
2267 bcmerror = -ENOMEM;
2268 goto done;
2269 }
2270 }
2271
2272 str = kmalloc(maxstrlen, GFP_ATOMIC);
2273 if (str == NULL) {
2274 BRCMF_ERROR(("%s: kmalloc(%d) failed\n", __func__, maxstrlen));
2275 bcmerror = -ENOMEM;
2276 goto done;
2277 }
2278
2279 bcmerror = brcmf_sdbrcm_readshared(bus, &sdpcm_shared);
2280 if (bcmerror < 0)
2281 goto done;
2282
2283 brcmu_binit(&strbuf, data, size);
2284
2285 brcmu_bprintf(&strbuf,
2286 "msgtrace address : 0x%08X\nconsole address : 0x%08X\n",
2287 sdpcm_shared.msgtrace_addr, sdpcm_shared.console_addr);
2288
2289 if ((sdpcm_shared.flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
2290 /* NOTE: Misspelled assert is intentional - DO NOT FIX.
2291 * (Avoids conflict with real asserts for programmatic
2292 * parsing of output.)
2293 */
2294 brcmu_bprintf(&strbuf, "Assrt not built in dongle\n");
2295 }
2296
2297 if ((sdpcm_shared.flags & (SDPCM_SHARED_ASSERT | SDPCM_SHARED_TRAP)) ==
2298 0) {
2299 /* NOTE: Misspelled assert is intentional - DO NOT FIX.
2300 * (Avoids conflict with real asserts for programmatic
2301 * parsing of output.)
2302 */
2303 brcmu_bprintf(&strbuf, "No trap%s in dongle",
2304 (sdpcm_shared.flags & SDPCM_SHARED_ASSERT_BUILT)
2305 ? "/assrt" : "");
2306 } else {
2307 if (sdpcm_shared.flags & SDPCM_SHARED_ASSERT) {
2308 /* Download assert */
2309 brcmu_bprintf(&strbuf, "Dongle assert");
2310 if (sdpcm_shared.assert_exp_addr != 0) {
2311 str[0] = '\0';
2312 bcmerror = brcmf_sdbrcm_membytes(bus, false,
2313 sdpcm_shared.assert_exp_addr,
2314 (u8 *) str, maxstrlen);
2315 if (bcmerror < 0)
2316 goto done;
2317
2318 str[maxstrlen - 1] = '\0';
2319 brcmu_bprintf(&strbuf, " expr \"%s\"", str);
2320 }
2321
2322 if (sdpcm_shared.assert_file_addr != 0) {
2323 str[0] = '\0';
2324 bcmerror = brcmf_sdbrcm_membytes(bus, false,
2325 sdpcm_shared.assert_file_addr,
2326 (u8 *) str, maxstrlen);
2327 if (bcmerror < 0)
2328 goto done;
2329
2330 str[maxstrlen - 1] = '\0';
2331 brcmu_bprintf(&strbuf, " file \"%s\"", str);
2332 }
2333
2334 brcmu_bprintf(&strbuf, " line %d ",
2335 sdpcm_shared.assert_line);
2336 }
2337
2338 if (sdpcm_shared.flags & SDPCM_SHARED_TRAP) {
2339 bcmerror = brcmf_sdbrcm_membytes(bus, false,
2340 sdpcm_shared.trap_addr, (u8 *)&tr,
2341 sizeof(struct brcmf_trap));
2342 if (bcmerror < 0)
2343 goto done;
2344
2345 brcmu_bprintf(&strbuf,
2346 "Dongle trap type 0x%x @ epc 0x%x, cpsr 0x%x, spsr 0x%x, sp 0x%x,"
2347 "lp 0x%x, rpc 0x%x Trap offset 0x%x, "
2348 "r0 0x%x, r1 0x%x, r2 0x%x, r3 0x%x, r4 0x%x, r5 0x%x, r6 0x%x, r7 0x%x\n",
2349 tr.type, tr.epc, tr.cpsr, tr.spsr, tr.r13,
2350 tr.r14, tr.pc, sdpcm_shared.trap_addr,
2351 tr.r0, tr.r1, tr.r2, tr.r3, tr.r4, tr.r5,
2352 tr.r6, tr.r7);
2353 }
2354 }
2355
2356 if (sdpcm_shared.flags & (SDPCM_SHARED_ASSERT | SDPCM_SHARED_TRAP))
2357 BRCMF_ERROR(("%s: %s\n", __func__, strbuf.origbuf));
2358
2359#ifdef BCMDBG
2360 if (sdpcm_shared.flags & SDPCM_SHARED_TRAP) {
2361 /* Mem dump to a file on device */
2362 brcmf_sdbrcm_mem_dump(bus);
2363 }
2364#endif /* BCMDBG */
2365
2366done:
2367 kfree(mbuffer);
2368 kfree(str);
2369
2370 return bcmerror;
2371}
2372
2373static int brcmf_sdbrcm_mem_dump(struct brcmf_bus *bus)
2374{
2375 int ret = 0;
2376 int size; /* Full mem size */
2377 int start = 0; /* Start address */
2378 int read_size = 0; /* Read size of each iteration */
2379 u8 *buf = NULL, *databuf = NULL;
2380
2381 /* Get full mem size */
2382 size = bus->ramsize;
2383 buf = kmalloc(size, GFP_ATOMIC);
2384 if (!buf) {
2385 BRCMF_ERROR(("%s: Out of memory (%d bytes)\n", __func__, size));
2386 return -1;
2387 }
2388
2389 /* Read mem content */
2390 printk(KERN_DEBUG "Dump dongle memory");
2391 databuf = buf;
2392 while (size) {
2393 read_size = min(MEMBLOCK, size);
2394 ret = brcmf_sdbrcm_membytes(bus, false, start, databuf,
2395 read_size);
2396 if (ret) {
2397 BRCMF_ERROR(("%s: Error membytes %d\n", __func__, ret));
2398 kfree(buf);
2399 return -1;
2400 }
2401 printk(".");
2402
2403 /* Decrement size and increment start address */
2404 size -= read_size;
2405 start += read_size;
2406 databuf += read_size;
2407 }
2408 printk(KERN_DEBUG "Done\n");
2409
2410 /* free buf before return !!! */
2411 if (brcmf_write_to_file(bus->drvr, buf, bus->ramsize)) {
2412 BRCMF_ERROR(("%s: Error writing to files\n", __func__));
2413 return -1;
2414 }
2415
2416 /* buf free handled in brcmf_write_to_file, not here */
2417 return 0;
2418}
2419
2420#define CONSOLE_LINE_MAX 192
2421
2422static int brcmf_sdbrcm_readconsole(struct brcmf_bus *bus)
2423{
2424 struct brcmf_console *c = &bus->console;
2425 u8 line[CONSOLE_LINE_MAX], ch;
2426 u32 n, idx, addr;
2427 int rv;
2428
2429 /* Don't do anything until FWREADY updates console address */
2430 if (bus->console_addr == 0)
2431 return 0;
2432
2433 /* Read console log struct */
2434 addr = bus->console_addr + offsetof(struct rte_console, log);
2435 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log,
2436 sizeof(c->log));
2437 if (rv < 0)
2438 return rv;
2439
2440 /* Allocate console buffer (one time only) */
2441 if (c->buf == NULL) {
2442 c->bufsize = le32_to_cpu(c->log.buf_size);
2443 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2444 if (c->buf == NULL)
2445 return -ENOMEM;
2446 }
2447
2448 idx = le32_to_cpu(c->log.idx);
2449
2450 /* Protect against corrupt value */
2451 if (idx > c->bufsize)
2452 return -EBADE;
2453
2454 /* Skip reading the console buffer if the index pointer
2455 has not moved */
2456 if (idx == c->last)
2457 return 0;
2458
2459 /* Read the console buffer */
2460 addr = le32_to_cpu(c->log.buf);
2461 rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize);
2462 if (rv < 0)
2463 return rv;
2464
2465 while (c->last != idx) {
2466 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2467 if (c->last == idx) {
2468 /* This would output a partial line.
2469 * Instead, back up
2470 * the buffer pointer and output this
2471 * line next time around.
2472 */
2473 if (c->last >= n)
2474 c->last -= n;
2475 else
2476 c->last = c->bufsize - n;
2477 goto break2;
2478 }
2479 ch = c->buf[c->last];
2480 c->last = (c->last + 1) % c->bufsize;
2481 if (ch == '\n')
2482 break;
2483 line[n] = ch;
2484 }
2485
2486 if (n > 0) {
2487 if (line[n - 1] == '\r')
2488 n--;
2489 line[n] = 0;
2490 printk(KERN_DEBUG "CONSOLE: %s\n", line);
2491 }
2492 }
2493break2:
2494
2495 return 0;
2496}
2497#endif /* BCMDBG */
2498
2499int brcmf_sdbrcm_downloadvars(struct brcmf_bus *bus, void *arg, int len)
2500{
2501 int bcmerror = 0;
2502
2503 BRCMF_TRACE(("%s: Enter\n", __func__));
2504
2505 /* Basic sanity checks */
2506 if (bus->drvr->up) {
2507 bcmerror = -EISCONN;
2508 goto err;
2509 }
2510 if (!len) {
2511 bcmerror = -EOVERFLOW;
2512 goto err;
2513 }
2514
2515 /* Free the old ones and replace with passed variables */
2516 kfree(bus->vars);
2517
2518 bus->vars = kmalloc(len, GFP_ATOMIC);
2519 bus->varsz = bus->vars ? len : 0;
2520 if (bus->vars == NULL) {
2521 bcmerror = -ENOMEM;
2522 goto err;
2523 }
2524
2525 /* Copy the passed variables, which should include the
2526 terminating double-null */
2527 memcpy(bus->vars, arg, bus->varsz);
2528err:
2529 return bcmerror;
2530}
2531
2532static int
2533brcmf_sdbrcm_doiovar(struct brcmf_bus *bus, const struct brcmu_iovar *vi, u32 actionid,
2534 const char *name, void *params, int plen, void *arg, int len,
2535 int val_size)
2536{
2537 int bcmerror = 0;
2538 s32 int_val = 0;
2539 bool bool_val = 0;
2540
2541 BRCMF_TRACE(("%s: Enter, action %d name %s params %p plen %d arg %p "
2542 "len %d val_size %d\n", __func__, actionid, name, params,
2543 plen, arg, len, val_size));
2544
2545 bcmerror = brcmu_iovar_lencheck(vi, arg, len, IOV_ISSET(actionid));
2546 if (bcmerror != 0)
2547 goto exit;
2548
2549 if (plen >= (int)sizeof(int_val))
2550 memcpy(&int_val, params, sizeof(int_val));
2551
2552 bool_val = (int_val != 0) ? true : false;
2553
2554 /* Some ioctls use the bus */
2555 brcmf_sdbrcm_sdlock(bus);
2556
2557 /* Check if dongle is in reset. If so, only allow DEVRESET iovars */
2558 if (bus->drvr->dongle_reset && !(actionid == IOV_SVAL(IOV_DEVRESET) ||
2559 actionid == IOV_GVAL(IOV_DEVRESET))) {
2560 bcmerror = -EPERM;
2561 goto exit;
2562 }
2563
2564 /* Handle sleep stuff before any clock mucking */
2565 if (vi->varid == IOV_SLEEP) {
2566 if (IOV_ISSET(actionid)) {
2567 bcmerror = brcmf_sdbrcm_bussleep(bus, bool_val);
2568 } else {
2569 int_val = (s32) bus->sleeping;
2570 memcpy(arg, &int_val, val_size);
2571 }
2572 goto exit;
2573 }
2574
2575 /* Request clock to allow SDIO accesses */
2576 if (!bus->drvr->dongle_reset) {
2577 BUS_WAKE(bus);
2578 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2579 }
2580
2581 switch (actionid) {
2582 case IOV_GVAL(IOV_INTR):
2583 int_val = (s32) bus->intr;
2584 memcpy(arg, &int_val, val_size);
2585 break;
2586
2587 case IOV_SVAL(IOV_INTR):
2588 bus->intr = bool_val;
2589 bus->intdis = false;
2590 if (bus->drvr->up) {
2591 BRCMF_INTR(("%s: %s SDIO interrupts\n", __func__,
2592 bus->intr ? "enable" : "disable"));
2593 if (bus->intr) {
2594 brcmf_sdcard_intr_enable(bus->card);
2595 } else {
2596 brcmf_sdcard_intr_disable(bus->card);
2597 }
2598 }
2599 break;
2600
2601 case IOV_GVAL(IOV_POLLRATE):
2602 int_val = (s32) bus->pollrate;
2603 memcpy(arg, &int_val, val_size);
2604 break;
2605
2606 case IOV_SVAL(IOV_POLLRATE):
2607 bus->pollrate = (uint) int_val;
2608 bus->poll = (bus->pollrate != 0);
2609 break;
2610
2611 case IOV_GVAL(IOV_IDLETIME):
2612 int_val = bus->idletime;
2613 memcpy(arg, &int_val, val_size);
2614 break;
2615
2616 case IOV_SVAL(IOV_IDLETIME):
2617 if ((int_val < 0) && (int_val != BRCMF_IDLE_IMMEDIATE))
2618 bcmerror = -EINVAL;
2619 else
2620 bus->idletime = int_val;
2621 break;
2622
2623 case IOV_GVAL(IOV_IDLECLOCK):
2624 int_val = (s32) bus->idleclock;
2625 memcpy(arg, &int_val, val_size);
2626 break;
2627
2628 case IOV_SVAL(IOV_IDLECLOCK):
2629 bus->idleclock = int_val;
2630 break;
2631
2632 case IOV_GVAL(IOV_SD1IDLE):
2633 int_val = (s32) sd1idle;
2634 memcpy(arg, &int_val, val_size);
2635 break;
2636
2637 case IOV_SVAL(IOV_SD1IDLE):
2638 sd1idle = bool_val;
2639 break;
2640
2641 case IOV_SVAL(IOV_MEMBYTES):
2642 case IOV_GVAL(IOV_MEMBYTES):
2643 {
2644 u32 address;
2645 uint size, dsize;
2646 u8 *data;
2647
2648 bool set = (actionid == IOV_SVAL(IOV_MEMBYTES));
2649
2650 address = (u32) int_val;
2651 memcpy(&int_val, (char *)params + sizeof(int_val),
2652 sizeof(int_val));
2653 size = (uint) int_val;
2654
2655 /* Do some validation */
2656 dsize = set ? plen - (2 * sizeof(int)) : len;
2657 if (dsize < size) {
2658 BRCMF_ERROR(("%s: error on %s membytes, addr "
2659 "0x%08x size %d dsize %d\n",
2660 __func__, (set ? "set" : "get"),
2661 address, size, dsize));
2662 bcmerror = -EINVAL;
2663 break;
2664 }
2665
2666 BRCMF_INFO(("%s: Request to %s %d bytes at address "
2667 "0x%08x\n", __func__,
2668 (set ? "write" : "read"), size, address));
2669
2670 /* If we know about SOCRAM, check for a fit */
2671 if ((bus->orig_ramsize) &&
2672 ((address > bus->orig_ramsize)
2673 || (address + size > bus->orig_ramsize))) {
2674 BRCMF_ERROR(("%s: ramsize 0x%08x doesn't have"
2675 " %d bytes at 0x%08x\n", __func__,
2676 bus->orig_ramsize, size, address));
2677 bcmerror = -EINVAL;
2678 break;
2679 }
2680
2681 /* Generate the actual data pointer */
2682 data =
2683 set ? (u8 *) params +
2684 2 * sizeof(int) : (u8 *) arg;
2685
2686 /* Call to do the transfer */
2687 bcmerror = brcmf_sdbrcm_membytes(bus, set, address,
2688 data, size);
2689
2690 break;
2691 }
2692
2693 case IOV_GVAL(IOV_MEMSIZE):
2694 int_val = (s32) bus->ramsize;
2695 memcpy(arg, &int_val, val_size);
2696 break;
2697
2698 case IOV_GVAL(IOV_SDIOD_DRIVE):
2699 int_val = (s32) brcmf_sdiod_drive_strength;
2700 memcpy(arg, &int_val, val_size);
2701 break;
2702
2703 case IOV_SVAL(IOV_SDIOD_DRIVE):
2704 brcmf_sdiod_drive_strength = int_val;
2705 brcmf_sdbrcm_sdiod_drive_strength_init(bus,
2706 brcmf_sdiod_drive_strength);
2707 break;
2708
2709 case IOV_SVAL(IOV_DOWNLOAD):
2710 bcmerror = brcmf_sdbrcm_download_state(bus, bool_val);
2711 break;
2712
2713 case IOV_SVAL(IOV_VARS):
2714 bcmerror = brcmf_sdbrcm_downloadvars(bus, arg, len);
2715 break;
2716
2717 case IOV_GVAL(IOV_READAHEAD):
2718 int_val = (s32) brcmf_readahead;
2719 memcpy(arg, &int_val, val_size);
2720 break;
2721
2722 case IOV_SVAL(IOV_READAHEAD):
2723 if (bool_val && !brcmf_readahead)
2724 bus->nextlen = 0;
2725 brcmf_readahead = bool_val;
2726 break;
2727
2728 case IOV_GVAL(IOV_SDRXCHAIN):
2729 int_val = (s32) bus->use_rxchain;
2730 memcpy(arg, &int_val, val_size);
2731 break;
2732
2733 case IOV_SVAL(IOV_SDRXCHAIN):
2734 if (bool_val && !bus->sd_rxchain)
2735 bcmerror = -ENOTSUPP;
2736 else
2737 bus->use_rxchain = bool_val;
2738 break;
2739 case IOV_GVAL(IOV_ALIGNCTL):
2740 int_val = (s32) brcmf_alignctl;
2741 memcpy(arg, &int_val, val_size);
2742 break;
2743
2744 case IOV_SVAL(IOV_ALIGNCTL):
2745 brcmf_alignctl = bool_val;
2746 break;
2747
2748 case IOV_GVAL(IOV_SDALIGN):
2749 int_val = BRCMF_SDALIGN;
2750 memcpy(arg, &int_val, val_size);
2751 break;
2752
2753#ifdef BCMDBG
2754 case IOV_GVAL(IOV_VARS):
2755 if (bus->varsz < (uint) len)
2756 memcpy(arg, bus->vars, bus->varsz);
2757 else
2758 bcmerror = -EOVERFLOW;
2759 break;
2760#endif /* BCMDBG */
2761
2762#ifdef BCMDBG
2763 case IOV_GVAL(IOV_DCONSOLE_POLL):
2764 int_val = (s32) brcmf_console_ms;
2765 memcpy(arg, &int_val, val_size);
2766 break;
2767
2768 case IOV_SVAL(IOV_DCONSOLE_POLL):
2769 brcmf_console_ms = (uint) int_val;
2770 break;
2771
2772 case IOV_SVAL(IOV_CONS):
2773 if (len > 0)
2774 bcmerror = brcmf_sdbrcm_bus_console_in(bus->drvr,
2775 arg, len - 1);
2776 break;
2777
2778 case IOV_GVAL(IOV_SDREG):
2779 {
2780 struct brcmf_sdreg *sd_ptr;
2781 u32 addr, size;
2782
2783 sd_ptr = (struct brcmf_sdreg *) params;
2784
2785 addr = bus->ci->buscorebase + sd_ptr->offset;
2786 size = sd_ptr->func;
2787 int_val = (s32) brcmf_sdcard_reg_read(bus->card, addr,
2788 size);
2789 if (brcmf_sdcard_regfail(bus->card))
2790 bcmerror = -EIO;
2791 memcpy(arg, &int_val, sizeof(s32));
2792 break;
2793 }
2794
2795 case IOV_SVAL(IOV_SDREG):
2796 {
2797 struct brcmf_sdreg *sd_ptr;
2798 u32 addr, size;
2799
2800 sd_ptr = (struct brcmf_sdreg *) params;
2801
2802 addr = bus->ci->buscorebase + sd_ptr->offset;
2803 size = sd_ptr->func;
2804 brcmf_sdcard_reg_write(bus->card, addr, size,
2805 sd_ptr->value);
2806 if (brcmf_sdcard_regfail(bus->card))
2807 bcmerror = -EIO;
2808 break;
2809 }
2810
2811 /* Same as above, but offset is not backplane
2812 (not SDIO core) */
2813 case IOV_GVAL(IOV_SBREG):
2814 {
2815 struct brcmf_sdreg sdreg;
2816 u32 addr, size;
2817
2818 memcpy(&sdreg, params, sizeof(sdreg));
2819
2820 addr = SI_ENUM_BASE + sdreg.offset;
2821 size = sdreg.func;
2822 int_val = (s32) brcmf_sdcard_reg_read(bus->card, addr,
2823 size);
2824 if (brcmf_sdcard_regfail(bus->card))
2825 bcmerror = -EIO;
2826 memcpy(arg, &int_val, sizeof(s32));
2827 break;
2828 }
2829
2830 case IOV_SVAL(IOV_SBREG):
2831 {
2832 struct brcmf_sdreg sdreg;
2833 u32 addr, size;
2834
2835 memcpy(&sdreg, params, sizeof(sdreg));
2836
2837 addr = SI_ENUM_BASE + sdreg.offset;
2838 size = sdreg.func;
2839 brcmf_sdcard_reg_write(bus->card, addr, size,
2840 sdreg.value);
2841 if (brcmf_sdcard_regfail(bus->card))
2842 bcmerror = -EIO;
2843 break;
2844 }
2845
2846 case IOV_GVAL(IOV_SDCIS):
2847 {
2848 *(char *)arg = 0;
2849
2850 strcat(arg, "\nFunc 0\n");
2851 brcmf_sdcard_cis_read(bus->card, 0x10,
2852 (u8 *) arg + strlen(arg),
2853 SBSDIO_CIS_SIZE_LIMIT);
2854 strcat(arg, "\nFunc 1\n");
2855 brcmf_sdcard_cis_read(bus->card, 0x11,
2856 (u8 *) arg + strlen(arg),
2857 SBSDIO_CIS_SIZE_LIMIT);
2858 strcat(arg, "\nFunc 2\n");
2859 brcmf_sdcard_cis_read(bus->card, 0x12,
2860 (u8 *) arg + strlen(arg),
2861 SBSDIO_CIS_SIZE_LIMIT);
2862 break;
2863 }
2864
2865 case IOV_GVAL(IOV_FORCEEVEN):
2866 int_val = (s32) forcealign;
2867 memcpy(arg, &int_val, val_size);
2868 break;
2869
2870 case IOV_SVAL(IOV_FORCEEVEN):
2871 forcealign = bool_val;
2872 break;
2873
2874 case IOV_GVAL(IOV_TXBOUND):
2875 int_val = (s32) brcmf_txbound;
2876 memcpy(arg, &int_val, val_size);
2877 break;
2878
2879 case IOV_SVAL(IOV_TXBOUND):
2880 brcmf_txbound = (uint) int_val;
2881 break;
2882
2883 case IOV_GVAL(IOV_RXBOUND):
2884 int_val = (s32) brcmf_rxbound;
2885 memcpy(arg, &int_val, val_size);
2886 break;
2887
2888 case IOV_SVAL(IOV_RXBOUND):
2889 brcmf_rxbound = (uint) int_val;
2890 break;
2891
2892 case IOV_GVAL(IOV_TXMINMAX):
2893 int_val = (s32) brcmf_txminmax;
2894 memcpy(arg, &int_val, val_size);
2895 break;
2896
2897 case IOV_SVAL(IOV_TXMINMAX):
2898 brcmf_txminmax = (uint) int_val;
2899 break;
2900#endif /* BCMDBG */
2901
2902#ifdef SDTEST
2903 case IOV_GVAL(IOV_EXTLOOP):
2904 int_val = (s32) bus->ext_loop;
2905 memcpy(arg, &int_val, val_size);
2906 break;
2907
2908 case IOV_SVAL(IOV_EXTLOOP):
2909 bus->ext_loop = bool_val;
2910 break;
2911
2912 case IOV_GVAL(IOV_PKTGEN):
2913 bcmerror = brcmf_sdbrcm_pktgen_get(bus, arg);
2914 break;
2915
2916 case IOV_SVAL(IOV_PKTGEN):
2917 bcmerror = brcmf_sdbrcm_pktgen_set(bus, arg);
2918 break;
2919#endif /* SDTEST */
2920
2921 case IOV_SVAL(IOV_DEVRESET):
2922 BRCMF_TRACE(("%s: Called set IOV_DEVRESET=%d dongle_reset=%d "
2923 "busstate=%d\n",
2924 __func__, bool_val, bus->drvr->dongle_reset,
2925 bus->drvr->busstate));
2926
2927 brcmf_bus_devreset(bus->drvr, (u8) bool_val);
2928
2929 break;
2930
2931 case IOV_GVAL(IOV_DEVRESET):
2932 BRCMF_TRACE(("%s: Called get IOV_DEVRESET\n", __func__));
2933
2934 /* Get its status */
2935 int_val = (bool) bus->drvr->dongle_reset;
2936 memcpy(arg, &int_val, val_size);
2937
2938 break;
2939
2940 case IOV_GVAL(IOV_WDTICK):
2941 int_val = (s32) brcmf_watchdog_ms;
2942 memcpy(arg, &int_val, val_size);
2943 break;
2944
2945 case IOV_SVAL(IOV_WDTICK):
2946 if (!bus->drvr->up) {
2947 bcmerror = -ENOLINK;
2948 break;
2949 }
2950 brcmf_sdbrcm_wd_timer(bus, (uint) int_val);
2951 break;
2952
2953 default:
2954 bcmerror = -ENOTSUPP;
2955 break;
2956 }
2957
2958exit:
2959 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) {
2960 bus->activity = false;
2961 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2962 }
2963
2964 brcmf_sdbrcm_sdunlock(bus);
2965
2966 if (actionid == IOV_SVAL(IOV_DEVRESET) && bool_val == false)
2967 brcmf_c_preinit_ioctls(bus->drvr);
2968
2969 return bcmerror;
2970}
2971
2972static int brcmf_sdbrcm_write_vars(struct brcmf_bus *bus)
2973{
2974 int bcmerror = 0;
2975 u32 varsize;
2976 u32 varaddr;
2977 u8 *vbuffer;
2978 u32 varsizew;
2979#ifdef BCMDBG
2980 char *nvram_ularray;
2981#endif /* BCMDBG */
2982
2983 /* Even if there are no vars are to be written, we still
2984 need to set the ramsize. */
2985 varsize = bus->varsz ? roundup(bus->varsz, 4) : 0;
2986 varaddr = (bus->ramsize - 4) - varsize;
2987
2988 if (bus->vars) {
2989 vbuffer = kzalloc(varsize, GFP_ATOMIC);
2990 if (!vbuffer)
2991 return -ENOMEM;
2992
2993 memcpy(vbuffer, bus->vars, bus->varsz);
2994
2995 /* Write the vars list */
2996 bcmerror =
2997 brcmf_sdbrcm_membytes(bus, true, varaddr, vbuffer, varsize);
2998#ifdef BCMDBG
2999 /* Verify NVRAM bytes */
3000 BRCMF_INFO(("Compare NVRAM dl & ul; varsize=%d\n", varsize));
3001 nvram_ularray = kmalloc(varsize, GFP_ATOMIC);
3002 if (!nvram_ularray)
3003 return -ENOMEM;
3004
3005 /* Upload image to verify downloaded contents. */
3006 memset(nvram_ularray, 0xaa, varsize);
3007
3008 /* Read the vars list to temp buffer for comparison */
3009 bcmerror =
3010 brcmf_sdbrcm_membytes(bus, false, varaddr, nvram_ularray,
3011 varsize);
3012 if (bcmerror) {
3013 BRCMF_ERROR(("%s: error %d on reading %d nvram bytes"
3014 " at 0x%08x\n", __func__, bcmerror,
3015 varsize, varaddr));
3016 }
3017 /* Compare the org NVRAM with the one read from RAM */
3018 if (memcmp(vbuffer, nvram_ularray, varsize)) {
3019 BRCMF_ERROR(("%s: Downloaded NVRAM image is "
3020 "corrupted.\n", __func__));
3021 } else
3022 BRCMF_ERROR(("%s: Download/Upload/Compare of"
3023 " NVRAM ok.\n", __func__));
3024
3025 kfree(nvram_ularray);
3026#endif /* BCMDBG */
3027
3028 kfree(vbuffer);
3029 }
3030
3031 /* adjust to the user specified RAM */
3032 BRCMF_INFO(("Physical memory size: %d, usable memory size: %d\n",
3033 bus->orig_ramsize, bus->ramsize));
3034 BRCMF_INFO(("Vars are at %d, orig varsize is %d\n", varaddr, varsize));
3035 varsize = ((bus->orig_ramsize - 4) - varaddr);
3036
3037 /*
3038 * Determine the length token:
3039 * Varsize, converted to words, in lower 16-bits, checksum
3040 * in upper 16-bits.
3041 */
3042 if (bcmerror) {
3043 varsizew = 0;
3044 } else {
3045 varsizew = varsize / 4;
3046 varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF);
3047 varsizew = cpu_to_le32(varsizew);
3048 }
3049
3050 BRCMF_INFO(("New varsize is %d, length token=0x%08x\n", varsize,
3051 varsizew));
3052
3053 /* Write the length token to the last word */
3054 bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->orig_ramsize - 4),
3055 (u8 *)&varsizew, 4);
3056
3057 return bcmerror;
3058}
3059
3060static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter)
3061{
3062 uint retries;
3063 u32 regdata;
3064 int bcmerror = 0;
3065
3066 /* To enter download state, disable ARM and reset SOCRAM.
3067 * To exit download state, simply reset ARM (default is RAM boot).
3068 */
3069 if (enter) {
3070 bus->alp_only = true;
3071
3072 brcmf_sdbrcm_chip_disablecore(bus->card, bus->ci->armcorebase);
3073
3074 brcmf_sdbrcm_chip_resetcore(bus->card, bus->ci->ramcorebase);
3075
3076 /* Clear the top bit of memory */
3077 if (bus->ramsize) {
3078 u32 zeros = 0;
3079 brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4,
3080 (u8 *)&zeros, 4);
3081 }
3082 } else {
3083 regdata = brcmf_sdcard_reg_read(bus->card,
3084 CORE_SB(bus->ci->ramcorebase, sbtmstatelow), 4);
3085 regdata &= (SBTML_RESET | SBTML_REJ_MASK |
3086 (SICF_CLOCK_EN << SBTML_SICF_SHIFT));
3087 if ((SICF_CLOCK_EN << SBTML_SICF_SHIFT) != regdata) {
3088 BRCMF_ERROR(("%s: SOCRAM core is down after reset?\n",
3089 __func__));
3090 bcmerror = -EBADE;
3091 goto fail;
3092 }
3093
3094 bcmerror = brcmf_sdbrcm_write_vars(bus);
3095 if (bcmerror) {
3096 BRCMF_ERROR(("%s: no vars written to RAM\n", __func__));
3097 bcmerror = 0;
3098 }
3099
3100 w_sdreg32(bus, 0xFFFFFFFF,
3101 offsetof(struct sdpcmd_regs, intstatus), &retries);
3102
3103 brcmf_sdbrcm_chip_resetcore(bus->card, bus->ci->armcorebase);
3104
3105 /* Allow HT Clock now that the ARM is running. */
3106 bus->alp_only = false;
3107
3108 bus->drvr->busstate = BRCMF_BUS_LOAD;
3109 }
3110fail:
3111 return bcmerror;
3112}
3113
3114int
3115brcmf_sdbrcm_bus_iovar_op(struct brcmf_pub *drvr, const char *name,
3116 void *params, int plen, void *arg, int len, bool set)
3117{
3118 struct brcmf_bus *bus = drvr->bus;
3119 const struct brcmu_iovar *vi = NULL;
3120 int bcmerror = 0;
3121 int val_size;
3122 u32 actionid;
3123
3124 BRCMF_TRACE(("%s: Enter\n", __func__));
3125
3126 if (name == NULL || len <= 0)
3127 return -EINVAL;
3128
3129 /* Set does not take qualifiers */
3130 if (set && (params || plen))
3131 return -EINVAL;
3132
3133 /* Get must have return space;*/
3134 if (!set && !(arg && len))
3135 return -EINVAL;
3136
3137 /* Look up var locally; if not found pass to host driver */
3138 vi = brcmu_iovar_lookup(brcmf_sdio_iovars, name);
3139 if (vi == NULL) {
3140 brcmf_sdbrcm_sdlock(bus);
3141
3142 BUS_WAKE(bus);
3143
3144 /* Turn on clock in case SD command needs backplane */
3145 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3146
3147 bcmerror = brcmf_sdcard_iovar_op(bus->card, name, params, plen,
3148 arg, len, set);
3149
3150 /* Similar check for blocksize change */
3151 if (set && strcmp(name, "sd_blocksize") == 0) {
3152 s32 fnum = 2;
3153 if (brcmf_sdcard_iovar_op
3154 (bus->card, "sd_blocksize", &fnum, sizeof(s32),
3155 &bus->blocksize, sizeof(s32),
3156 false) != 0) {
3157 bus->blocksize = 0;
3158 BRCMF_ERROR(("%s: fail on %s get\n", __func__,
3159 "sd_blocksize"));
3160 } else {
3161 BRCMF_INFO(("%s: noted sd_blocksize update,"
3162 " value now %d\n", __func__,
3163 bus->blocksize));
3164 }
3165 }
3166 bus->roundup = min(max_roundup, bus->blocksize);
3167
3168 if (bus->idletime == BRCMF_IDLE_IMMEDIATE &&
3169 !bus->dpc_sched) {
3170 bus->activity = false;
3171 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
3172 }
3173
3174 brcmf_sdbrcm_sdunlock(bus);
3175 goto exit;
3176 }
3177
3178 BRCMF_CTL(("%s: %s %s, len %d plen %d\n", __func__,
3179 name, (set ? "set" : "get"), len, plen));
3180
3181 /* set up 'params' pointer in case this is a set command so that
3182 * the convenience int and bool code can be common to set and get
3183 */
3184 if (params == NULL) {
3185 params = arg;
3186 plen = len;
3187 }
3188
3189 if (vi->type == IOVT_VOID)
3190 val_size = 0;
3191 else if (vi->type == IOVT_BUFFER)
3192 val_size = len;
3193 else
3194 /* all other types are integer sized */
3195 val_size = sizeof(int);
3196
3197 actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid);
3198 bcmerror = brcmf_sdbrcm_doiovar(bus, vi, actionid, name, params, plen,
3199 arg, len, val_size);
3200
3201exit:
3202 return bcmerror;
3203}
3204
3205void brcmf_sdbrcm_bus_stop(struct brcmf_bus *bus, bool enforce_mutex)
3206{
3207 u32 local_hostintmask;
3208 u8 saveclk;
3209 uint retries;
3210 int err;
3211
3212 BRCMF_TRACE(("%s: Enter\n", __func__));
3213
3214 if (enforce_mutex)
3215 brcmf_sdbrcm_sdlock(bus);
3216
3217 BUS_WAKE(bus);
3218
3219 /* Enable clock for device interrupts */
3220 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3221
3222 if (bus->watchdog_tsk) {
3223 send_sig(SIGTERM, bus->watchdog_tsk, 1);
3224 kthread_stop(bus->watchdog_tsk);
3225 bus->watchdog_tsk = NULL;
3226 }
3227
3228 if (bus->dpc_tsk) {
3229 send_sig(SIGTERM, bus->dpc_tsk, 1);
3230 kthread_stop(bus->dpc_tsk);
3231 bus->dpc_tsk = NULL;
3232 } else
3233 tasklet_kill(&bus->tasklet);
3234
3235 /* Disable and clear interrupts at the chip level also */
3236 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask), &retries);
3237 local_hostintmask = bus->hostintmask;
3238 bus->hostintmask = 0;
3239
3240 /* Change our idea of bus state */
3241 bus->drvr->busstate = BRCMF_BUS_DOWN;
3242
3243 /* Force clocks on backplane to be sure F2 interrupt propagates */
3244 saveclk = brcmf_sdcard_cfg_read(bus->card, SDIO_FUNC_1,
3245 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3246 if (!err) {
3247 brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1,
3248 SBSDIO_FUNC1_CHIPCLKCSR,
3249 (saveclk | SBSDIO_FORCE_HT), &err);
3250 }
3251 if (err) {
3252 BRCMF_ERROR(("%s: Failed to force clock for F2: err %d\n",
3253 __func__, err));
3254 }
3255
3256 /* Turn off the bus (F2), free any pending packets */
3257 BRCMF_INTR(("%s: disable SDIO interrupts\n", __func__));
3258 brcmf_sdcard_intr_disable(bus->card);
3259 brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3260 SDIO_FUNC_ENABLE_1, NULL);
3261
3262 /* Clear any pending interrupts now that F2 is disabled */
3263 w_sdreg32(bus, local_hostintmask,
3264 offsetof(struct sdpcmd_regs, intstatus), &retries);
3265
3266 /* Turn off the backplane clock (only) */
3267 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3268
3269 /* Clear the data packet queues */
3270 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
3271
3272 /* Clear any held glomming stuff */
3273 if (bus->glomd)
3274 brcmu_pkt_buf_free_skb(bus->glomd);
3275
3276 if (bus->glom)
3277 brcmu_pkt_buf_free_skb(bus->glom);
3278
3279 bus->glom = bus->glomd = NULL;
3280
3281 /* Clear rx control and wake any waiters */
3282 bus->rxlen = 0;
3283 brcmf_os_ioctl_resp_wake(bus->drvr);
3284
3285 /* Reset some F2 state stuff */
3286 bus->rxskip = false;
3287 bus->tx_seq = bus->rx_seq = 0;
3288
3289 if (enforce_mutex)
3290 brcmf_sdbrcm_sdunlock(bus);
3291}
3292
3293int brcmf_sdbrcm_bus_init(struct brcmf_pub *drvr, bool enforce_mutex)
3294{
3295 struct brcmf_bus *bus = drvr->bus;
3296 struct brcmf_timeout tmo;
3297 uint retries = 0;
3298 u8 ready, enable;
3299 int err, ret = 0;
3300 u8 saveclk;
3301
3302 BRCMF_TRACE(("%s: Enter\n", __func__));
3303
3304 /* try to download image and nvram to the dongle */
3305 if (drvr->busstate == BRCMF_BUS_DOWN) {
3306 if (!(brcmf_sdbrcm_download_firmware(bus, bus->card)))
3307 return -1;
3308 }
3309
3310 if (!bus->drvr)
3311 return 0;
3312
3313 /* Start the watchdog timer */
3314 bus->drvr->tickcnt = 0;
3315 brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms);
3316
3317 if (enforce_mutex)
3318 brcmf_sdbrcm_sdlock(bus);
3319
3320 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3321 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3322 if (bus->clkstate != CLK_AVAIL)
3323 goto exit;
3324
3325 /* Force clocks on backplane to be sure F2 interrupt propagates */
3326 saveclk =
3327 brcmf_sdcard_cfg_read(bus->card, SDIO_FUNC_1,
3328 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3329 if (!err) {
3330 brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1,
3331 SBSDIO_FUNC1_CHIPCLKCSR,
3332 (saveclk | SBSDIO_FORCE_HT), &err);
3333 }
3334 if (err) {
3335 BRCMF_ERROR(("%s: Failed to force clock for F2: err %d\n",
3336 __func__, err));
3337 goto exit;
3338 }
3339
3340 /* Enable function 2 (frame transfers) */
3341 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3342 offsetof(struct sdpcmd_regs, tosbmailboxdata), &retries);
3343 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3344
3345 brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_0, SDIO_CCCR_IOEx, enable,
3346 NULL);
3347
3348 /* Give the dongle some time to do its thing and set IOR2 */
3349 brcmf_timeout_start(&tmo, BRCMF_WAIT_F2RDY * 1000);
3350
3351 ready = 0;
3352 while (ready != enable && !brcmf_timeout_expired(&tmo))
3353 ready = brcmf_sdcard_cfg_read(bus->card, SDIO_FUNC_0,
3354 SDIO_CCCR_IORx, NULL);
3355
3356 BRCMF_INFO(("%s: enable 0x%02x, ready 0x%02x (waited %uus)\n",
3357 __func__, enable, ready, tmo.elapsed));
3358
3359 /* If F2 successfully enabled, set core and enable interrupts */
3360 if (ready == enable) {
3361 /* Set up the interrupt mask and enable interrupts */
3362 bus->hostintmask = HOSTINTMASK;
3363 w_sdreg32(bus, bus->hostintmask,
3364 offsetof(struct sdpcmd_regs, hostintmask), &retries);
3365
3366 brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1, SBSDIO_WATERMARK,
3367 (u8) watermark, &err);
3368
3369 /* Set bus state according to enable result */
3370 drvr->busstate = BRCMF_BUS_DATA;
3371
3372 bus->intdis = false;
3373 if (bus->intr) {
3374 BRCMF_INTR(("%s: enable SDIO device interrupts\n",
3375 __func__));
3376 brcmf_sdcard_intr_enable(bus->card);
3377 } else {
3378 BRCMF_INTR(("%s: disable SDIO interrupts\n", __func__));
3379 brcmf_sdcard_intr_disable(bus->card);
3380 }
3381
3382 }
3383
3384 else {
3385 /* Disable F2 again */
3386 enable = SDIO_FUNC_ENABLE_1;
3387 brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3388 enable, NULL);
3389 }
3390
3391 /* Restore previous clock setting */
3392 brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
3393 saveclk, &err);
3394
3395#if defined(OOB_INTR_ONLY)
3396 /* Host registration for OOB interrupt */
3397 if (brcmf_sdio_register_oob_intr(bus->dhd)) {
3398 brcmf_sdbrcm_wd_timer(bus, 0);
3399 BRCMF_ERROR(("%s Host failed to resgister for OOB\n",
3400 __func__));
3401 ret = -ENODEV;
3402 goto exit;
3403 }
3404
3405 /* Enable oob at firmware */
3406 brcmf_sdbrcm_enable_oob_intr(bus, true);
3407#endif /* defined(OOB_INTR_ONLY) */
3408
3409 /* If we didn't come up, turn off backplane clock */
3410 if (drvr->busstate != BRCMF_BUS_DATA)
3411 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3412
3413exit:
3414 if (enforce_mutex)
3415 brcmf_sdbrcm_sdunlock(bus);
3416
3417 return ret;
3418}
3419
3420static void brcmf_sdbrcm_rxfail(struct brcmf_bus *bus, bool abort, bool rtx)
3421{
3422 struct brcmf_sdio_card *card = bus->card;
3423 uint retries = 0;
3424 u16 lastrbc;
3425 u8 hi, lo;
3426 int err;
3427
3428 BRCMF_ERROR(("%s: %sterminate frame%s\n", __func__,
3429 (abort ? "abort command, " : ""),
3430 (rtx ? ", send NAK" : "")));
3431
3432 if (abort)
3433 brcmf_sdcard_abort(card, SDIO_FUNC_2);
3434
3435 brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, SBSDIO_FUNC1_FRAMECTRL,
3436 SFC_RF_TERM, &err);
3437 bus->f1regdata++;
3438
3439 /* Wait until the packet has been flushed (device/FIFO stable) */
3440 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
3441 hi = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
3442 SBSDIO_FUNC1_RFRAMEBCHI, NULL);
3443 lo = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1,
3444 SBSDIO_FUNC1_RFRAMEBCLO, NULL);
3445 bus->f1regdata += 2;
3446
3447 if ((hi == 0) && (lo == 0))
3448 break;
3449
3450 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
3451 BRCMF_ERROR(("%s: count growing: last 0x%04x now "
3452 "0x%04x\n",
3453 __func__, lastrbc, ((hi << 8) + lo)));
3454 }
3455 lastrbc = (hi << 8) + lo;
3456 }
3457
3458 if (!retries) {
3459 BRCMF_ERROR(("%s: count never zeroed: last 0x%04x\n",
3460 __func__, lastrbc));
3461 } else {
3462 BRCMF_INFO(("%s: flush took %d iterations\n", __func__,
3463 (0xffff - retries)));
3464 }
3465
3466 if (rtx) {
3467 bus->rxrtx++;
3468 w_sdreg32(bus, SMB_NAK,
3469 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
3470
3471 bus->f1regdata++;
3472 if (retries <= retry_limit)
3473 bus->rxskip = true;
3474 }
3475
3476 /* Clear partial in any case */
3477 bus->nextlen = 0;
3478
3479 /* If we can't reach the device, signal failure */
3480 if (err || brcmf_sdcard_regfail(card))
3481 bus->drvr->busstate = BRCMF_BUS_DOWN;
3482}
3483
3484static void
3485brcmf_sdbrcm_read_control(struct brcmf_bus *bus, u8 *hdr, uint len, uint doff)
3486{
3487 struct brcmf_sdio_card *card = bus->card;
3488 uint rdlen, pad;
3489
3490 int sdret;
3491
3492 BRCMF_TRACE(("%s: Enter\n", __func__));
3493
3494 /* Control data already received in aligned rxctl */
3495 if ((bus->bus == SPI_BUS) && (!bus->usebufpool))
3496 goto gotpkt;
3497
3498 /* Set rxctl for frame (w/optional alignment) */
3499 bus->rxctl = bus->rxbuf;
3500 if (brcmf_alignctl) {
3501 bus->rxctl += firstread;
3502 pad = ((unsigned long)bus->rxctl % BRCMF_SDALIGN);
3503 if (pad)
3504 bus->rxctl += (BRCMF_SDALIGN - pad);
3505 bus->rxctl -= firstread;
3506 }
3507
3508 /* Copy the already-read portion over */
3509 memcpy(bus->rxctl, hdr, firstread);
3510 if (len <= firstread)
3511 goto gotpkt;
3512
3513 /* Copy the full data pkt in gSPI case and process ioctl. */
3514 if (bus->bus == SPI_BUS) {
3515 memcpy(bus->rxctl, hdr, len);
3516 goto gotpkt;
3517 }
3518
3519 /* Raise rdlen to next SDIO block to avoid tail command */
3520 rdlen = len - firstread;
3521 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
3522 pad = bus->blocksize - (rdlen % bus->blocksize);
3523 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
3524 ((len + pad) < bus->drvr->maxctl))
3525 rdlen += pad;
3526 } else if (rdlen % BRCMF_SDALIGN) {
3527 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
3528 }
3529
3530 /* Satisfy length-alignment requirements */
3531 if (forcealign && (rdlen & (ALIGNMENT - 1)))
3532 rdlen = roundup(rdlen, ALIGNMENT);
3533
3534 /* Drop if the read is too big or it exceeds our maximum */
3535 if ((rdlen + firstread) > bus->drvr->maxctl) {
3536 BRCMF_ERROR(("%s: %d-byte control read exceeds %d-byte"
3537 " buffer\n", __func__, rdlen, bus->drvr->maxctl));
3538 bus->drvr->rx_errors++;
3539 brcmf_sdbrcm_rxfail(bus, false, false);
3540 goto done;
3541 }
3542
3543 if ((len - doff) > bus->drvr->maxctl) {
3544 BRCMF_ERROR(("%s: %d-byte ctl frame (%d-byte ctl data) exceeds "
3545 "%d-byte limit\n",
3546 __func__, len, (len - doff), bus->drvr->maxctl));
3547 bus->drvr->rx_errors++;
3548 bus->rx_toolong++;
3549 brcmf_sdbrcm_rxfail(bus, false, false);
3550 goto done;
3551 }
3552
3553 /* Read remainder of frame body into the rxctl buffer */
3554 sdret = brcmf_sdcard_recv_buf(card, brcmf_sdcard_cur_sbwad(card),
3555 SDIO_FUNC_2,
3556 F2SYNC, (bus->rxctl + firstread), rdlen,
3557 NULL, NULL, NULL);
3558 bus->f2rxdata++;
3559
3560 /* Control frame failures need retransmission */
3561 if (sdret < 0) {
3562 BRCMF_ERROR(("%s: read %d control bytes failed: %d\n",
3563 __func__, rdlen, sdret));
3564 bus->rxc_errors++;
3565 brcmf_sdbrcm_rxfail(bus, true, true);
3566 goto done;
3567 }
3568
3569gotpkt:
3570
3571#ifdef BCMDBG
3572 if (BRCMF_BYTES_ON() && BRCMF_CTL_ON()) {
3573 printk(KERN_DEBUG "RxCtrl:\n");
3574 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, bus->rxctl, len);
3575 }
3576#endif
3577
3578 /* Point to valid data and indicate its length */
3579 bus->rxctl += doff;
3580 bus->rxlen = len - doff;
3581
3582done:
3583 /* Awake any waiters */
3584 brcmf_os_ioctl_resp_wake(bus->drvr);
3585}
3586
3587static u8 brcmf_sdbrcm_rxglom(struct brcmf_bus *bus, u8 rxseq)
3588{
3589 u16 dlen, totlen;
3590 u8 *dptr, num = 0;
3591
3592 u16 sublen, check;
3593 struct sk_buff *pfirst, *plast, *pnext, *save_pfirst;
3594
3595 int errcode;
3596 u8 chan, seq, doff, sfdoff;
3597 u8 txmax;
3598
3599 int ifidx = 0;
3600 bool usechain = bus->use_rxchain;
3601
3602 /* If packets, issue read(s) and send up packet chain */
3603 /* Return sequence numbers consumed? */
3604
3605 BRCMF_TRACE(("brcmf_sdbrcm_rxglom: start: glomd %p glom %p\n",
3606 bus->glomd, bus->glom));
3607
3608 /* If there's a descriptor, generate the packet chain */
3609 if (bus->glomd) {
3610 pfirst = plast = pnext = NULL;
3611 dlen = (u16) (bus->glomd->len);
3612 dptr = bus->glomd->data;
3613 if (!dlen || (dlen & 1)) {
3614 BRCMF_ERROR(("%s: bad glomd len(%d),"
3615 " ignore descriptor\n",
3616 __func__, dlen));
3617 dlen = 0;
3618 }
3619
3620 for (totlen = num = 0; dlen; num++) {
3621 /* Get (and move past) next length */
3622 sublen = get_unaligned_le16(dptr);
3623 dlen -= sizeof(u16);
3624 dptr += sizeof(u16);
3625 if ((sublen < SDPCM_HDRLEN) ||
3626 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
3627 BRCMF_ERROR(("%s: descriptor len %d bad: %d\n",
3628 __func__, num, sublen));
3629 pnext = NULL;
3630 break;
3631 }
3632 if (sublen % BRCMF_SDALIGN) {
3633 BRCMF_ERROR(("%s: sublen %d not multiple of"
3634 " %d\n", __func__, sublen,
3635 BRCMF_SDALIGN));
3636 usechain = false;
3637 }
3638 totlen += sublen;
3639
3640 /* For last frame, adjust read len so total
3641 is a block multiple */
3642 if (!dlen) {
3643 sublen +=
3644 (roundup(totlen, bus->blocksize) - totlen);
3645 totlen = roundup(totlen, bus->blocksize);
3646 }
3647
3648 /* Allocate/chain packet for next subframe */
3649 pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
3650 if (pnext == NULL) {
3651 BRCMF_ERROR(("%s: bcm_pkt_buf_get_skb failed, "
3652 "num %d len %d\n", __func__,
3653 num, sublen));
3654 break;
3655 }
3656 if (!pfirst) {
3657 pfirst = plast = pnext;
3658 } else {
3659 plast->next = pnext;
3660 plast = pnext;
3661 }
3662
3663 /* Adhere to start alignment requirements */
3664 PKTALIGN(pnext, sublen, BRCMF_SDALIGN);
3665 }
3666
3667 /* If all allocations succeeded, save packet chain
3668 in bus structure */
3669 if (pnext) {
3670 BRCMF_GLOM(("%s: allocated %d-byte packet chain for %d "
3671 "subframes\n", __func__, totlen, num));
3672 if (BRCMF_GLOM_ON() && bus->nextlen) {
3673 if (totlen != bus->nextlen) {
3674 BRCMF_GLOM(("%s: glomdesc mismatch: "
3675 "nextlen %d glomdesc %d "
3676 "rxseq %d\n", __func__,
3677 bus->nextlen,
3678 totlen, rxseq));
3679 }
3680 }
3681 bus->glom = pfirst;
3682 pfirst = pnext = NULL;
3683 } else {
3684 if (pfirst)
3685 brcmu_pkt_buf_free_skb(pfirst);
3686 bus->glom = NULL;
3687 num = 0;
3688 }
3689
3690 /* Done with descriptor packet */
3691 brcmu_pkt_buf_free_skb(bus->glomd);
3692 bus->glomd = NULL;
3693 bus->nextlen = 0;
3694 }
3695
3696 /* Ok -- either we just generated a packet chain,
3697 or had one from before */
3698 if (bus->glom) {
3699 if (BRCMF_GLOM_ON()) {
3700 BRCMF_GLOM(("%s: try superframe read, packet chain:\n",
3701 __func__));
3702 for (pnext = bus->glom; pnext; pnext = pnext->next) {
3703 BRCMF_GLOM((" %p: %p len 0x%04x (%d)\n",
3704 pnext, (u8 *) (pnext->data),
3705 pnext->len, pnext->len));
3706 }
3707 }
3708
3709 pfirst = bus->glom;
3710 dlen = (u16) brcmu_pkttotlen(pfirst);
3711
3712 /* Do an SDIO read for the superframe. Configurable iovar to
3713 * read directly into the chained packet, or allocate a large
3714 * packet and and copy into the chain.
3715 */
3716 if (usechain) {
3717 errcode = brcmf_sdcard_recv_buf(bus->card,
3718 brcmf_sdcard_cur_sbwad(bus->card),
3719 SDIO_FUNC_2,
3720 F2SYNC, (u8 *) pfirst->data, dlen,
3721 pfirst, NULL, NULL);
3722 } else if (bus->dataptr) {
3723 errcode = brcmf_sdcard_recv_buf(bus->card,
3724 brcmf_sdcard_cur_sbwad(bus->card),
3725 SDIO_FUNC_2,
3726 F2SYNC, bus->dataptr, dlen,
3727 NULL, NULL, NULL);
3728 sublen = (u16) brcmu_pktfrombuf(pfirst, 0, dlen,
3729 bus->dataptr);
3730 if (sublen != dlen) {
3731 BRCMF_ERROR(("%s: FAILED TO COPY, dlen %d "
3732 "sublen %d\n",
3733 __func__, dlen, sublen));
3734 errcode = -1;
3735 }
3736 pnext = NULL;
3737 } else {
3738 BRCMF_ERROR(("COULDN'T ALLOC %d-BYTE GLOM, "
3739 "FORCE FAILURE\n", dlen));
3740 errcode = -1;
3741 }
3742 bus->f2rxdata++;
3743
3744 /* On failure, kill the superframe, allow a couple retries */
3745 if (errcode < 0) {
3746 BRCMF_ERROR(("%s: glom read of %d bytes failed: %d\n",
3747 __func__, dlen, errcode));
3748 bus->drvr->rx_errors++;
3749
3750 if (bus->glomerr++ < 3) {
3751 brcmf_sdbrcm_rxfail(bus, true, true);
3752 } else {
3753 bus->glomerr = 0;
3754 brcmf_sdbrcm_rxfail(bus, true, false);
3755 brcmu_pkt_buf_free_skb(bus->glom);
3756 bus->rxglomfail++;
3757 bus->glom = NULL;
3758 }
3759 return 0;
3760 }
3761#ifdef BCMDBG
3762 if (BRCMF_GLOM_ON()) {
3763 printk(KERN_DEBUG "SUPERFRAME:\n");
3764 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
3765 pfirst->data, min_t(int, pfirst->len, 48));
3766 }
3767#endif
3768
3769 /* Validate the superframe header */
3770 dptr = (u8 *) (pfirst->data);
3771 sublen = get_unaligned_le16(dptr);
3772 check = get_unaligned_le16(dptr + sizeof(u16));
3773
3774 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
3775 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
3776 bus->nextlen = dptr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
3777 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
3778 BRCMF_INFO(("%s: nextlen too large (%d) seq %d\n",
3779 __func__, bus->nextlen, seq));
3780 bus->nextlen = 0;
3781 }
3782 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
3783 txmax = SDPCM_WINDOW_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
3784
3785 errcode = 0;
3786 if ((u16)~(sublen ^ check)) {
3787 BRCMF_ERROR(("%s (superframe): HW hdr error: len/check "
3788 "0x%04x/0x%04x\n", __func__, sublen,
3789 check));
3790 errcode = -1;
3791 } else if (roundup(sublen, bus->blocksize) != dlen) {
3792 BRCMF_ERROR(("%s (superframe): len 0x%04x, rounded "
3793 "0x%04x, expect 0x%04x\n",
3794 __func__, sublen,
3795 roundup(sublen, bus->blocksize), dlen));
3796 errcode = -1;
3797 } else if (SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]) !=
3798 SDPCM_GLOM_CHANNEL) {
3799 BRCMF_ERROR(("%s (superframe): bad channel %d\n",
3800 __func__,
3801 SDPCM_PACKET_CHANNEL(&dptr
3802 [SDPCM_FRAMETAG_LEN])));
3803 errcode = -1;
3804 } else if (SDPCM_GLOMDESC(&dptr[SDPCM_FRAMETAG_LEN])) {
3805 BRCMF_ERROR(("%s (superframe): got 2nd descriptor?\n",
3806 __func__));
3807 errcode = -1;
3808 } else if ((doff < SDPCM_HDRLEN) ||
3809 (doff > (pfirst->len - SDPCM_HDRLEN))) {
3810 BRCMF_ERROR(("%s (superframe): Bad data offset %d: "
3811 "HW %d pkt %d min %d\n",
3812 __func__, doff, sublen,
3813 pfirst->len, SDPCM_HDRLEN));
3814 errcode = -1;
3815 }
3816
3817 /* Check sequence number of superframe SW header */
3818 if (rxseq != seq) {
3819 BRCMF_INFO(("%s: (superframe) rx_seq %d, expected %d\n",
3820 __func__, seq, rxseq));
3821 bus->rx_badseq++;
3822 rxseq = seq;
3823 }
3824
3825 /* Check window for sanity */
3826 if ((u8) (txmax - bus->tx_seq) > 0x40) {
3827 BRCMF_ERROR(("%s: unlikely tx max %d with tx_seq %d\n",
3828 __func__, txmax, bus->tx_seq));
3829 txmax = bus->tx_seq + 2;
3830 }
3831 bus->tx_max = txmax;
3832
3833 /* Remove superframe header, remember offset */
3834 skb_pull(pfirst, doff);
3835 sfdoff = doff;
3836
3837 /* Validate all the subframe headers */
3838 for (num = 0, pnext = pfirst; pnext && !errcode;
3839 num++, pnext = pnext->next) {
3840 dptr = (u8 *) (pnext->data);
3841 dlen = (u16) (pnext->len);
3842 sublen = get_unaligned_le16(dptr);
3843 check = get_unaligned_le16(dptr + sizeof(u16));
3844 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
3845 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
3846#ifdef BCMDBG
3847 if (BRCMF_GLOM_ON()) {
3848 printk(KERN_DEBUG "subframe:\n");
3849 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
3850 dptr, 32);
3851 }
3852#endif
3853
3854 if ((u16)~(sublen ^ check)) {
3855 BRCMF_ERROR(("%s (subframe %d): HW hdr error: "
3856 "len/check 0x%04x/0x%04x\n",
3857 __func__, num, sublen, check));
3858 errcode = -1;
3859 } else if ((sublen > dlen) || (sublen < SDPCM_HDRLEN)) {
3860 BRCMF_ERROR(("%s (subframe %d): length mismatch"
3861 ": len 0x%04x, expect 0x%04x\n",
3862 __func__, num, sublen, dlen));
3863 errcode = -1;
3864 } else if ((chan != SDPCM_DATA_CHANNEL) &&
3865 (chan != SDPCM_EVENT_CHANNEL)) {
3866 BRCMF_ERROR(("%s (subframe %d): bad channel"
3867 " %d\n", __func__, num, chan));
3868 errcode = -1;
3869 } else if ((doff < SDPCM_HDRLEN) || (doff > sublen)) {
3870 BRCMF_ERROR(("%s (subframe %d): Bad data offset"
3871 " %d: HW %d min %d\n",
3872 __func__, num, doff, sublen,
3873 SDPCM_HDRLEN));
3874 errcode = -1;
3875 }
3876 }
3877
3878 if (errcode) {
3879 /* Terminate frame on error, request
3880 a couple retries */
3881 if (bus->glomerr++ < 3) {
3882 /* Restore superframe header space */
3883 skb_push(pfirst, sfdoff);
3884 brcmf_sdbrcm_rxfail(bus, true, true);
3885 } else {
3886 bus->glomerr = 0;
3887 brcmf_sdbrcm_rxfail(bus, true, false);
3888 brcmu_pkt_buf_free_skb(bus->glom);
3889 bus->rxglomfail++;
3890 bus->glom = NULL;
3891 }
3892 bus->nextlen = 0;
3893 return 0;
3894 }
3895
3896 /* Basic SD framing looks ok - process each packet (header) */
3897 save_pfirst = pfirst;
3898 bus->glom = NULL;
3899 plast = NULL;
3900
3901 for (num = 0; pfirst; rxseq++, pfirst = pnext) {
3902 pnext = pfirst->next;
3903 pfirst->next = NULL;
3904
3905 dptr = (u8 *) (pfirst->data);
3906 sublen = get_unaligned_le16(dptr);
3907 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
3908 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
3909 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
3910
3911 BRCMF_GLOM(("%s: Get subframe %d, %p(%p/%d), sublen %d "
3912 "chan %d seq %d\n",
3913 __func__, num, pfirst, pfirst->data,
3914 pfirst->len, sublen, chan, seq));
3915
3916 /* precondition: chan == SDPCM_DATA_CHANNEL ||
3917 chan == SDPCM_EVENT_CHANNEL */
3918
3919 if (rxseq != seq) {
3920 BRCMF_GLOM(("%s: rx_seq %d, expected %d\n",
3921 __func__, seq, rxseq));
3922 bus->rx_badseq++;
3923 rxseq = seq;
3924 }
3925#ifdef BCMDBG
3926 if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
3927 printk(KERN_DEBUG "Rx Subframe Data:\n");
3928 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
3929 dptr, dlen);
3930 }
3931#endif
3932
3933 __skb_trim(pfirst, sublen);
3934 skb_pull(pfirst, doff);
3935
3936 if (pfirst->len == 0) {
3937 brcmu_pkt_buf_free_skb(pfirst);
3938 if (plast) {
3939 plast->next = pnext;
3940 } else {
3941 save_pfirst = pnext;
3942 }
3943 continue;
3944 } else if (brcmf_proto_hdrpull(bus->drvr, &ifidx, pfirst)
3945 != 0) {
3946 BRCMF_ERROR(("%s: rx protocol error\n",
3947 __func__));
3948 bus->drvr->rx_errors++;
3949 brcmu_pkt_buf_free_skb(pfirst);
3950 if (plast) {
3951 plast->next = pnext;
3952 } else {
3953 save_pfirst = pnext;
3954 }
3955 continue;
3956 }
3957
3958 /* this packet will go up, link back into
3959 chain and count it */
3960 pfirst->next = pnext;
3961 plast = pfirst;
3962 num++;
3963
3964#ifdef BCMDBG
3965 if (BRCMF_GLOM_ON()) {
3966 BRCMF_GLOM(("%s subframe %d to stack, %p"
3967 "(%p/%d) nxt/lnk %p/%p\n",
3968 __func__, num, pfirst, pfirst->data,
3969 pfirst->len, pfirst->next,
3970 pfirst->prev));
3971 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
3972 pfirst->data,
3973 min_t(int, pfirst->len, 32));
3974 }
3975#endif /* BCMDBG */
3976 }
3977 if (num) {
3978 brcmf_sdbrcm_sdunlock(bus);
3979 brcmf_rx_frame(bus->drvr, ifidx, save_pfirst, num);
3980 brcmf_sdbrcm_sdlock(bus);
3981 }
3982
3983 bus->rxglomframes++;
3984 bus->rxglompkts += num;
3985 }
3986 return num;
3987}
3988
3989/* Return true if there may be more frames to read */
3990static uint
3991brcmf_sdbrcm_readframes(struct brcmf_bus *bus, uint maxframes, bool *finished)
3992{
3993 struct brcmf_sdio_card *card = bus->card;
3994
3995 u16 len, check; /* Extracted hardware header fields */
3996 u8 chan, seq, doff; /* Extracted software header fields */
3997 u8 fcbits; /* Extracted fcbits from software header */
3998
3999 struct sk_buff *pkt; /* Packet for event or data frames */
4000 u16 pad; /* Number of pad bytes to read */
4001 u16 rdlen; /* Total number of bytes to read */
4002 u8 rxseq; /* Next sequence number to expect */
4003 uint rxleft = 0; /* Remaining number of frames allowed */
4004 int sdret; /* Return code from calls */
4005 u8 txmax; /* Maximum tx sequence offered */
4006 bool len_consistent; /* Result of comparing readahead len and
4007 len from hw-hdr */
4008 u8 *rxbuf;
4009 int ifidx = 0;
4010 uint rxcount = 0; /* Total frames read */
4011
4012#if defined(BCMDBG) || defined(SDTEST)
4013 bool sdtest = false; /* To limit message spew from test mode */
4014#endif
4015
4016 BRCMF_TRACE(("%s: Enter\n", __func__));
4017
4018#ifdef SDTEST
4019 /* Allow pktgen to override maxframes */
4020 if (bus->pktgen_count && (bus->pktgen_mode == BRCMF_PKTGEN_RECV)) {
4021 maxframes = bus->pktgen_count;
4022 sdtest = true;
4023 }
4024#endif
4025
4026 /* Not finished unless we encounter no more frames indication */
4027 *finished = false;
4028
4029 for (rxseq = bus->rx_seq, rxleft = maxframes;
4030 !bus->rxskip && rxleft && bus->drvr->busstate != BRCMF_BUS_DOWN;
4031 rxseq++, rxleft--) {
4032
4033 /* Handle glomming separately */
4034 if (bus->glom || bus->glomd) {
4035 u8 cnt;
4036 BRCMF_GLOM(("%s: calling rxglom: glomd %p, glom %p\n",
4037 __func__, bus->glomd, bus->glom));
4038 cnt = brcmf_sdbrcm_rxglom(bus, rxseq);
4039 BRCMF_GLOM(("%s: rxglom returned %d\n", __func__, cnt));
4040 rxseq += cnt - 1;
4041 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
4042 continue;
4043 }
4044
4045 /* Try doing single read if we can */
4046 if (brcmf_readahead && bus->nextlen) {
4047 u16 nextlen = bus->nextlen;
4048 bus->nextlen = 0;
4049
4050 if (bus->bus == SPI_BUS) {
4051 rdlen = len = nextlen;
4052 } else {
4053 rdlen = len = nextlen << 4;
4054
4055 /* Pad read to blocksize for efficiency */
4056 if (bus->roundup && bus->blocksize
4057 && (rdlen > bus->blocksize)) {
4058 pad =
4059 bus->blocksize -
4060 (rdlen % bus->blocksize);
4061 if ((pad <= bus->roundup)
4062 && (pad < bus->blocksize)
4063 && ((rdlen + pad + firstread) <
4064 MAX_RX_DATASZ))
4065 rdlen += pad;
4066 } else if (rdlen % BRCMF_SDALIGN) {
4067 rdlen +=
4068 BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
4069 }
4070 }
4071
4072 /* We use bus->rxctl buffer in WinXP for initial
4073 * control pkt receives.
4074 * Later we use buffer-poll for data as well
4075 * as control packets.
4076 * This is required because dhd receives full
4077 * frame in gSPI unlike SDIO.
4078 * After the frame is received we have to
4079 * distinguish whether it is data
4080 * or non-data frame.
4081 */
4082 /* Allocate a packet buffer */
4083 pkt = brcmu_pkt_buf_get_skb(rdlen + BRCMF_SDALIGN);
4084 if (!pkt) {
4085 if (bus->bus == SPI_BUS) {
4086 bus->usebufpool = false;
4087 bus->rxctl = bus->rxbuf;
4088 if (brcmf_alignctl) {
4089 bus->rxctl += firstread;
4090 pad = ((unsigned long)bus->rxctl %
4091 BRCMF_SDALIGN);
4092 if (pad)
4093 bus->rxctl +=
4094 (BRCMF_SDALIGN - pad);
4095 bus->rxctl -= firstread;
4096 }
4097 rxbuf = bus->rxctl;
4098 /* Read the entire frame */
4099 sdret = brcmf_sdcard_recv_buf(card,
4100 brcmf_sdcard_cur_sbwad(card),
4101 SDIO_FUNC_2, F2SYNC,
4102 rxbuf, rdlen,
4103 NULL, NULL, NULL);
4104 bus->f2rxdata++;
4105
4106 /* Control frame failures need
4107 retransmission */
4108 if (sdret < 0) {
4109 BRCMF_ERROR(("%s: read %d "
4110 "control bytes "
4111 "failed: %d\n",
4112 __func__,
4113 rdlen, sdret));
4114 /* dhd.rx_ctlerrs is higher */
4115 bus->rxc_errors++;
4116 brcmf_sdbrcm_rxfail(bus, true,
4117 (bus->bus ==
4118 SPI_BUS) ? false
4119 : true);
4120 continue;
4121 }
4122 } else {
4123 /* Give up on data,
4124 request rtx of events */
4125 BRCMF_ERROR(("%s (nextlen): "
4126 "brcmu_pkt_buf_get_skb "
4127 "failed:"
4128 " len %d rdlen %d expected"
4129 " rxseq %d\n", __func__,
4130 len, rdlen, rxseq));
4131 continue;
4132 }
4133 } else {
4134 if (bus->bus == SPI_BUS)
4135 bus->usebufpool = true;
4136
4137 PKTALIGN(pkt, rdlen, BRCMF_SDALIGN);
4138 rxbuf = (u8 *) (pkt->data);
4139 /* Read the entire frame */
4140 sdret = brcmf_sdcard_recv_buf(card,
4141 brcmf_sdcard_cur_sbwad(card),
4142 SDIO_FUNC_2, F2SYNC,
4143 rxbuf, rdlen,
4144 pkt, NULL, NULL);
4145 bus->f2rxdata++;
4146
4147 if (sdret < 0) {
4148 BRCMF_ERROR(("%s (nextlen): read %d"
4149 " bytes failed: %d\n",
4150 __func__, rdlen, sdret));
4151 brcmu_pkt_buf_free_skb(pkt);
4152 bus->drvr->rx_errors++;
4153 /* Force retry w/normal header read.
4154 * Don't attempt NAK for
4155 * gSPI
4156 */
4157 brcmf_sdbrcm_rxfail(bus, true,
4158 (bus->bus ==
4159 SPI_BUS) ? false :
4160 true);
4161 continue;
4162 }
4163 }
4164
4165 /* Now check the header */
4166 memcpy(bus->rxhdr, rxbuf, SDPCM_HDRLEN);
4167
4168 /* Extract hardware header fields */
4169 len = get_unaligned_le16(bus->rxhdr);
4170 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
4171
4172 /* All zeros means readahead info was bad */
4173 if (!(len | check)) {
4174 BRCMF_INFO(("%s (nextlen): read zeros in HW "
4175 "header???\n", __func__));
4176 brcmf_sdbrcm_pktfree2(bus, pkt);
4177 continue;
4178 }
4179
4180 /* Validate check bytes */
4181 if ((u16)~(len ^ check)) {
4182 BRCMF_ERROR(("%s (nextlen): HW hdr error:"
4183 " nextlen/len/check"
4184 " 0x%04x/0x%04x/0x%04x\n",
4185 __func__, nextlen, len, check));
4186 bus->rx_badhdr++;
4187 brcmf_sdbrcm_rxfail(bus, false, false);
4188 brcmf_sdbrcm_pktfree2(bus, pkt);
4189 continue;
4190 }
4191
4192 /* Validate frame length */
4193 if (len < SDPCM_HDRLEN) {
4194 BRCMF_ERROR(("%s (nextlen): HW hdr length "
4195 "invalid: %d\n", __func__, len));
4196 brcmf_sdbrcm_pktfree2(bus, pkt);
4197 continue;
4198 }
4199
4200 /* Check for consistency withreadahead info */
4201 len_consistent = (nextlen != (roundup(len, 16) >> 4));
4202 if (len_consistent) {
4203 /* Mismatch, force retry w/normal
4204 header (may be >4K) */
4205 BRCMF_ERROR(("%s (nextlen): mismatch, "
4206 "nextlen %d len %d rnd %d; "
4207 "expected rxseq %d\n",
4208 __func__, nextlen,
4209 len, roundup(len, 16), rxseq));
4210 brcmf_sdbrcm_rxfail(bus, true,
4211 bus->bus != SPI_BUS);
4212 brcmf_sdbrcm_pktfree2(bus, pkt);
4213 continue;
4214 }
4215
4216 /* Extract software header fields */
4217 chan = SDPCM_PACKET_CHANNEL(
4218 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4219 seq = SDPCM_PACKET_SEQUENCE(
4220 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4221 doff = SDPCM_DOFFSET_VALUE(
4222 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4223 txmax = SDPCM_WINDOW_VALUE(
4224 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4225
4226 bus->nextlen =
4227 bus->rxhdr[SDPCM_FRAMETAG_LEN +
4228 SDPCM_NEXTLEN_OFFSET];
4229 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
4230 BRCMF_INFO(("%s (nextlen): got frame w/nextlen"
4231 " too large (%d), seq %d\n",
4232 __func__, bus->nextlen, seq));
4233 bus->nextlen = 0;
4234 }
4235
4236 bus->drvr->rx_readahead_cnt++;
4237
4238 /* Handle Flow Control */
4239 fcbits = SDPCM_FCMASK_VALUE(
4240 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4241
4242 if (bus->flowcontrol != fcbits) {
4243 if (~bus->flowcontrol & fcbits)
4244 bus->fc_xoff++;
4245
4246 if (bus->flowcontrol & ~fcbits)
4247 bus->fc_xon++;
4248
4249 bus->fc_rcvd++;
4250 bus->flowcontrol = fcbits;
4251 }
4252
4253 /* Check and update sequence number */
4254 if (rxseq != seq) {
4255 BRCMF_INFO(("%s (nextlen): rx_seq %d, expected "
4256 "%d\n", __func__, seq, rxseq));
4257 bus->rx_badseq++;
4258 rxseq = seq;
4259 }
4260
4261 /* Check window for sanity */
4262 if ((u8) (txmax - bus->tx_seq) > 0x40) {
4263 BRCMF_ERROR(("%s: got unlikely tx max %d with "
4264 "tx_seq %d\n",
4265 __func__, txmax, bus->tx_seq));
4266 txmax = bus->tx_seq + 2;
4267 }
4268 bus->tx_max = txmax;
4269
4270#ifdef BCMDBG
4271 if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
4272 printk(KERN_DEBUG "Rx Data:\n");
4273 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
4274 rxbuf, len);
4275 } else if (BRCMF_HDRS_ON()) {
4276 printk(KERN_DEBUG "RxHdr:\n");
4277 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
4278 bus->rxhdr, SDPCM_HDRLEN);
4279 }
4280#endif
4281
4282 if (chan == SDPCM_CONTROL_CHANNEL) {
4283 if (bus->bus == SPI_BUS) {
4284 brcmf_sdbrcm_read_control(bus, rxbuf,
4285 len, doff);
4286 } else {
4287 BRCMF_ERROR(("%s (nextlen): readahead"
4288 " on control packet %d?\n",
4289 __func__, seq));
4290 /* Force retry w/normal header read */
4291 bus->nextlen = 0;
4292 brcmf_sdbrcm_rxfail(bus, false, true);
4293 }
4294 brcmf_sdbrcm_pktfree2(bus, pkt);
4295 continue;
4296 }
4297
4298 if ((bus->bus == SPI_BUS) && !bus->usebufpool) {
4299 BRCMF_ERROR(("Received %d bytes on %d channel."
4300 " Running out of " "rx pktbuf's or"
4301 " not yet malloced.\n",
4302 len, chan));
4303 continue;
4304 }
4305
4306 /* Validate data offset */
4307 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
4308 BRCMF_ERROR(("%s (nextlen): bad data offset %d:"
4309 " HW len %d min %d\n", __func__,
4310 doff, len, SDPCM_HDRLEN));
4311 brcmf_sdbrcm_rxfail(bus, false, false);
4312 brcmf_sdbrcm_pktfree2(bus, pkt);
4313 continue;
4314 }
4315
4316 /* All done with this one -- now deliver the packet */
4317 goto deliver;
4318 }
4319 /* gSPI frames should not be handled in fractions */
4320 if (bus->bus == SPI_BUS)
4321 break;
4322
4323 /* Read frame header (hardware and software) */
4324 sdret = brcmf_sdcard_recv_buf(card,
4325 brcmf_sdcard_cur_sbwad(card),
4326 SDIO_FUNC_2, F2SYNC, bus->rxhdr, firstread,
4327 NULL, NULL, NULL);
4328 bus->f2rxhdrs++;
4329
4330 if (sdret < 0) {
4331 BRCMF_ERROR(("%s: RXHEADER FAILED: %d\n", __func__,
4332 sdret));
4333 bus->rx_hdrfail++;
4334 brcmf_sdbrcm_rxfail(bus, true, true);
4335 continue;
4336 }
4337#ifdef BCMDBG
4338 if (BRCMF_BYTES_ON() || BRCMF_HDRS_ON()) {
4339 printk(KERN_DEBUG "RxHdr:\n");
4340 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
4341 bus->rxhdr, SDPCM_HDRLEN);
4342 }
4343#endif
4344
4345 /* Extract hardware header fields */
4346 len = get_unaligned_le16(bus->rxhdr);
4347 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
4348
4349 /* All zeros means no more frames */
4350 if (!(len | check)) {
4351 *finished = true;
4352 break;
4353 }
4354
4355 /* Validate check bytes */
4356 if ((u16) ~(len ^ check)) {
4357 BRCMF_ERROR(("%s: HW hdr err: len/check "
4358 "0x%04x/0x%04x\n", __func__, len, check));
4359 bus->rx_badhdr++;
4360 brcmf_sdbrcm_rxfail(bus, false, false);
4361 continue;
4362 }
4363
4364 /* Validate frame length */
4365 if (len < SDPCM_HDRLEN) {
4366 BRCMF_ERROR(("%s: HW hdr length invalid: %d\n",
4367 __func__, len));
4368 continue;
4369 }
4370
4371 /* Extract software header fields */
4372 chan = SDPCM_PACKET_CHANNEL(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4373 seq = SDPCM_PACKET_SEQUENCE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4374 doff = SDPCM_DOFFSET_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4375 txmax = SDPCM_WINDOW_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4376
4377 /* Validate data offset */
4378 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
4379 BRCMF_ERROR(("%s: Bad data offset %d: HW len %d,"
4380 " min %d seq %d\n", __func__, doff,
4381 len, SDPCM_HDRLEN, seq));
4382 bus->rx_badhdr++;
4383 brcmf_sdbrcm_rxfail(bus, false, false);
4384 continue;
4385 }
4386
4387 /* Save the readahead length if there is one */
4388 bus->nextlen =
4389 bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
4390 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
4391 BRCMF_INFO(("%s (nextlen): got frame w/nextlen too"
4392 " large (%d), seq %d\n",
4393 __func__, bus->nextlen, seq));
4394 bus->nextlen = 0;
4395 }
4396
4397 /* Handle Flow Control */
4398 fcbits = SDPCM_FCMASK_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
4399
4400 if (bus->flowcontrol != fcbits) {
4401 if (~bus->flowcontrol & fcbits)
4402 bus->fc_xoff++;
4403
4404 if (bus->flowcontrol & ~fcbits)
4405 bus->fc_xon++;
4406
4407 bus->fc_rcvd++;
4408 bus->flowcontrol = fcbits;
4409 }
4410
4411 /* Check and update sequence number */
4412 if (rxseq != seq) {
4413 BRCMF_INFO(("%s: rx_seq %d, expected %d\n", __func__,
4414 seq, rxseq));
4415 bus->rx_badseq++;
4416 rxseq = seq;
4417 }
4418
4419 /* Check window for sanity */
4420 if ((u8) (txmax - bus->tx_seq) > 0x40) {
4421 BRCMF_ERROR(("%s: unlikely tx max %d with tx_seq %d\n",
4422 __func__, txmax, bus->tx_seq));
4423 txmax = bus->tx_seq + 2;
4424 }
4425 bus->tx_max = txmax;
4426
4427 /* Call a separate function for control frames */
4428 if (chan == SDPCM_CONTROL_CHANNEL) {
4429 brcmf_sdbrcm_read_control(bus, bus->rxhdr, len, doff);
4430 continue;
4431 }
4432
4433 /* precondition: chan is either SDPCM_DATA_CHANNEL,
4434 SDPCM_EVENT_CHANNEL, SDPCM_TEST_CHANNEL or
4435 SDPCM_GLOM_CHANNEL */
4436
4437 /* Length to read */
4438 rdlen = (len > firstread) ? (len - firstread) : 0;
4439
4440 /* May pad read to blocksize for efficiency */
4441 if (bus->roundup && bus->blocksize &&
4442 (rdlen > bus->blocksize)) {
4443 pad = bus->blocksize - (rdlen % bus->blocksize);
4444 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
4445 ((rdlen + pad + firstread) < MAX_RX_DATASZ))
4446 rdlen += pad;
4447 } else if (rdlen % BRCMF_SDALIGN) {
4448 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
4449 }
4450
4451 /* Satisfy length-alignment requirements */
4452 if (forcealign && (rdlen & (ALIGNMENT - 1)))
4453 rdlen = roundup(rdlen, ALIGNMENT);
4454
4455 if ((rdlen + firstread) > MAX_RX_DATASZ) {
4456 /* Too long -- skip this frame */
4457 BRCMF_ERROR(("%s: too long: len %d rdlen %d\n",
4458 __func__, len, rdlen));
4459 bus->drvr->rx_errors++;
4460 bus->rx_toolong++;
4461 brcmf_sdbrcm_rxfail(bus, false, false);
4462 continue;
4463 }
4464
4465 pkt = brcmu_pkt_buf_get_skb(rdlen + firstread + BRCMF_SDALIGN);
4466 if (!pkt) {
4467 /* Give up on data, request rtx of events */
4468 BRCMF_ERROR(("%s: brcmu_pkt_buf_get_skb failed:"
4469 " rdlen %d chan %d\n", __func__, rdlen,
4470 chan));
4471 bus->drvr->rx_dropped++;
4472 brcmf_sdbrcm_rxfail(bus, false, RETRYCHAN(chan));
4473 continue;
4474 }
4475
4476 /* Leave room for what we already read, and align remainder */
4477 skb_pull(pkt, firstread);
4478 PKTALIGN(pkt, rdlen, BRCMF_SDALIGN);
4479
4480 /* Read the remaining frame data */
4481 sdret = brcmf_sdcard_recv_buf(card,
4482 brcmf_sdcard_cur_sbwad(card),
4483 SDIO_FUNC_2, F2SYNC, ((u8 *) (pkt->data)),
4484 rdlen, pkt, NULL, NULL);
4485 bus->f2rxdata++;
4486
4487 if (sdret < 0) {
4488 BRCMF_ERROR(("%s: read %d %s bytes failed: %d\n",
4489 __func__, rdlen,
4490 ((chan == SDPCM_EVENT_CHANNEL) ? "event"
4491 : ((chan == SDPCM_DATA_CHANNEL) ? "data"
4492 : "test")), sdret));
4493 brcmu_pkt_buf_free_skb(pkt);
4494 bus->drvr->rx_errors++;
4495 brcmf_sdbrcm_rxfail(bus, true, RETRYCHAN(chan));
4496 continue;
4497 }
4498
4499 /* Copy the already-read portion */
4500 skb_push(pkt, firstread);
4501 memcpy(pkt->data, bus->rxhdr, firstread);
4502
4503#ifdef BCMDBG
4504 if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
4505 printk(KERN_DEBUG "Rx Data:\n");
4506 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
4507 pkt->data, len);
4508 }
4509#endif
4510
4511deliver:
4512 /* Save superframe descriptor and allocate packet frame */
4513 if (chan == SDPCM_GLOM_CHANNEL) {
4514 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
4515 BRCMF_GLOM(("%s: glom descriptor, %d bytes:\n",
4516 __func__, len));
4517#ifdef BCMDBG
4518 if (BRCMF_GLOM_ON()) {
4519 printk(KERN_DEBUG "Glom Data:\n");
4520 print_hex_dump_bytes("",
4521 DUMP_PREFIX_OFFSET,
4522 pkt->data, len);
4523 }
4524#endif
4525 __skb_trim(pkt, len);
4526 skb_pull(pkt, SDPCM_HDRLEN);
4527 bus->glomd = pkt;
4528 } else {
4529 BRCMF_ERROR(("%s: glom superframe w/o "
4530 "descriptor!\n", __func__));
4531 brcmf_sdbrcm_rxfail(bus, false, false);
4532 }
4533 continue;
4534 }
4535
4536 /* Fill in packet len and prio, deliver upward */
4537 __skb_trim(pkt, len);
4538 skb_pull(pkt, doff);
4539
4540#ifdef SDTEST
4541 /* Test channel packets are processed separately */
4542 if (chan == SDPCM_TEST_CHANNEL) {
4543 brcmf_sdbrcm_checkdied(bus, pkt, seq);
4544 continue;
4545 }
4546#endif /* SDTEST */
4547
4548 if (pkt->len == 0) {
4549 brcmu_pkt_buf_free_skb(pkt);
4550 continue;
4551 } else if (brcmf_proto_hdrpull(bus->drvr, &ifidx, pkt) != 0) {
4552 BRCMF_ERROR(("%s: rx protocol error\n", __func__));
4553 brcmu_pkt_buf_free_skb(pkt);
4554 bus->drvr->rx_errors++;
4555 continue;
4556 }
4557
4558 /* Unlock during rx call */
4559 brcmf_sdbrcm_sdunlock(bus);
4560 brcmf_rx_frame(bus->drvr, ifidx, pkt, 1);
4561 brcmf_sdbrcm_sdlock(bus);
4562 }
4563 rxcount = maxframes - rxleft;
4564#ifdef BCMDBG
4565 /* Message if we hit the limit */
4566 if (!rxleft && !sdtest)
4567 BRCMF_DATA(("%s: hit rx limit of %d frames\n", __func__,
4568 maxframes));
4569 else
4570#endif /* BCMDBG */
4571 BRCMF_DATA(("%s: processed %d frames\n", __func__, rxcount));
4572 /* Back off rxseq if awaiting rtx, update rx_seq */
4573 if (bus->rxskip)
4574 rxseq--;
4575 bus->rx_seq = rxseq;
4576
4577 return rxcount;
4578}
4579
4580static u32 brcmf_sdbrcm_hostmail(struct brcmf_bus *bus)
4581{
4582 u32 intstatus = 0;
4583 u32 hmb_data;
4584 u8 fcbits;
4585 uint retries = 0;
4586
4587 BRCMF_TRACE(("%s: Enter\n", __func__));
4588
4589 /* Read mailbox data and ack that we did so */
4590 r_sdreg32(bus, &hmb_data,
4591 offsetof(struct sdpcmd_regs, tohostmailboxdata), &retries);
4592
4593 if (retries <= retry_limit)
4594 w_sdreg32(bus, SMB_INT_ACK,
4595 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
4596 bus->f1regdata += 2;
4597
4598 /* Dongle recomposed rx frames, accept them again */
4599 if (hmb_data & HMB_DATA_NAKHANDLED) {
4600 BRCMF_INFO(("Dongle reports NAK handled, expect rtx of %d\n",
4601 bus->rx_seq));
4602 if (!bus->rxskip)
4603 BRCMF_ERROR(("%s: unexpected NAKHANDLED!\n", __func__));
</