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/contrib/ntp/ntpd/refclock_oncore.c

https://bitbucket.org/freebsd/freebsd-head/
C | 3732 lines | 2485 code | 595 blank | 652 comment | 703 complexity | c5431bce34bce5c87b214f45f81694fc MD5 | raw file
Possible License(s): MPL-2.0-no-copyleft-exception, BSD-3-Clause, LGPL-2.0, LGPL-2.1, BSD-2-Clause, 0BSD, JSON, AGPL-1.0, GPL-2.0
  1. /*
  2. * ----------------------------------------------------------------------------
  3. * "THE BEER-WARE LICENSE" (Revision 42):
  4. * <phk@FreeBSD.ORG> wrote this file. As long as you retain this notice you
  5. * can do whatever you want with this stuff. If we meet some day, and you think
  6. * this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
  7. * ----------------------------------------------------------------------------
  8. *
  9. * refclock_oncore.c
  10. *
  11. * Driver for some of the various the Motorola Oncore GPS receivers.
  12. * should work with Basic, PVT6, VP, UT, UT+, GT, GT+, SL, M12, M12+T
  13. * The receivers with TRAIM (VP, UT, UT+, M12+T), will be more accurate
  14. * than the others.
  15. * The receivers without position hold (GT, GT+) will be less accurate.
  16. *
  17. * Tested with:
  18. *
  19. * (UT) (VP)
  20. * COPYRIGHT 1991-1997 MOTOROLA INC. COPYRIGHT 1991-1996 MOTOROLA INC.
  21. * SFTW P/N # 98-P36848P SFTW P/N # 98-P36830P
  22. * SOFTWARE VER # 2 SOFTWARE VER # 8
  23. * SOFTWARE REV # 2 SOFTWARE REV # 8
  24. * SOFTWARE DATE APR 24 1998 SOFTWARE DATE 06 Aug 1996
  25. * MODEL # R1121N1114 MODEL # B4121P1155
  26. * HWDR P/N # 1 HDWR P/N # _
  27. * SERIAL # R0010A SERIAL # SSG0226478
  28. * MANUFACTUR DATE 6H07 MANUFACTUR DATE 7E02
  29. * OPTIONS LIST IB
  30. *
  31. * (Basic) (M12)
  32. * COPYRIGHT 1991-1994 MOTOROLA INC. COPYRIGHT 1991-2000 MOTOROLA INC.
  33. * SFTW P/N # 98-P39949M SFTW P/N # 61-G10002A
  34. * SOFTWARE VER # 5 SOFTWARE VER # 1
  35. * SOFTWARE REV # 0 SOFTWARE REV # 3
  36. * SOFTWARE DATE 20 JAN 1994 SOFTWARE DATE Mar 13 2000
  37. * MODEL # A11121P116 MODEL # P143T12NR1
  38. * HDWR P/N # _ HWDR P/N # 1
  39. * SERIAL # SSG0049809 SERIAL # P003UD
  40. * MANUFACTUR DATE 417AMA199 MANUFACTUR DATE 0C27
  41. * OPTIONS LIST AB
  42. *
  43. * (M12+T) (M12+T later version)
  44. * COPYRIGHT 1991-2002 MOTOROLA INC. COPYRIGHT 1991-2003 MOTOROLA INC.
  45. * SFTW P/N # 61-G10268A SFTW P/N # 61-G10268A
  46. * SOFTWARE VER # 2 SOFTWARE VER # 2
  47. * SOFTWARE REV # 0 SOFTWARE REV # 1
  48. * SOFTWARE DATE AUG 14 2002 SOFTWARE DATE APR 16 2003
  49. * MODEL # P283T12T11 MODEL # P273T12T12
  50. * HWDR P/N # 2 HWDR P/N # 2
  51. * SERIAL # P04DC2 SERIAL # P05Z7Z
  52. * MANUFACTUR DATE 2J17 MANUFACTUR DATE 3G15
  53. *
  54. * --------------------------------------------------------------------------
  55. * Reg Clemens (Feb 2006)
  56. * Fix some gcc4 compiler complaints
  57. * Fix possible segfault in oncore_init_shmem
  58. * change all (possible) fprintf(stderr, to record_clock_stats
  59. * Apply patch from Russell J. Yount <rjy@cmu.edu> Fixed (new) MT12+T UTC not correct
  60. * immediately after new Almanac Read.
  61. * Apply patch for new PPS implementation by Rodolfo Giometti <giometti@linux.it>
  62. * now code can use old Ulrich Windl <Ulrich.Windl@rz.uni-regensburg.de> or
  63. * the new one. Compiles depending on timepps.h seen.
  64. * --------------------------------------------------------------------------
  65. * Luis Batanero Guerrero <luisba@rao.es> (Dec 2005) Patch for leap seconds
  66. * (the oncore driver was setting the wrong ntpd variable)
  67. * --------------------------------------------------------------------------
  68. * Reg.Clemens (Mar 2004)
  69. * Support for interfaces other than PPSAPI removed, for Solaris, SunOS,
  70. * SCO, you now need to use one of the timepps.h files in the root dir.
  71. * this driver will 'grab' it for you if you dont have one in /usr/include
  72. * --------------------------------------------------------------------------
  73. * This code uses the two devices
  74. * /dev/oncore.serial.n
  75. * /dev/oncore.pps.n
  76. * which may be linked to the same device.
  77. * and can read initialization data from the file
  78. * /etc/ntp.oncoreN, /etc/ntp.oncore.N, or /etc/ntp.oncore, where
  79. * n or N are the unit number, viz 127.127.30.N.
  80. * --------------------------------------------------------------------------
  81. * Reg.Clemens <reg@dwf.com> Sep98.
  82. * Original code written for FreeBSD.
  83. * With these mods it works on FreeBSD, SunOS, Solaris and Linux
  84. * (SunOS 4.1.3 + ppsclock)
  85. * (Solaris7 + MU4)
  86. * (RedHat 5.1 2.0.35 + PPSKit, 2.1.126 + or later).
  87. *
  88. * Lat,Long,Ht, cable-delay, offset, and the ReceiverID (along with the
  89. * state machine state) are printed to CLOCKSTATS if that file is enabled
  90. * in /etc/ntp.conf.
  91. *
  92. * --------------------------------------------------------------------------
  93. *
  94. * According to the ONCORE manual (TRM0003, Rev 3.2, June 1998, page 3.13)
  95. * doing an average of 10000 valid 2D and 3D fixes is what the automatic
  96. * site survey mode does. Looking at the output from the receiver
  97. * it seems like it is only using 3D fixes.
  98. * When we do it ourselves, take 10000 3D fixes.
  99. */
  100. #define POS_HOLD_AVERAGE 10000 /* nb, 10000s ~= 2h45m */
  101. /*
  102. * ONCORE_SHMEM_STATUS will create a mmap(2)'ed file named according to a
  103. * "STATUS" line in the oncore config file, which contains the most recent
  104. * copy of all types of messages we recognize. This file can be mmap(2)'ed
  105. * by monitoring and statistics programs.
  106. *
  107. * See separate HTML documentation for this option.
  108. */
  109. #ifdef HAVE_CONFIG_H
  110. #include <config.h>
  111. #endif
  112. #if defined(REFCLOCK) && defined(CLOCK_ONCORE)
  113. #include "ntpd.h"
  114. #include "ntp_io.h"
  115. #include "ntp_unixtime.h"
  116. #include "ntp_refclock.h"
  117. #include "ntp_stdlib.h"
  118. #include <stdio.h>
  119. #include <ctype.h>
  120. #include <sys/stat.h>
  121. #ifdef ONCORE_SHMEM_STATUS
  122. # ifdef HAVE_SYS_MMAN_H
  123. # include <sys/mman.h>
  124. # ifndef MAP_FAILED
  125. # define MAP_FAILED ((u_char *) -1)
  126. # endif /* MAP_FAILED */
  127. # endif /* HAVE_SYS_MMAN_H */
  128. #endif /* ONCORE_SHMEM_STATUS */
  129. #ifdef HAVE_PPSAPI
  130. # include "ppsapi_timepps.h"
  131. #endif
  132. #ifdef HAVE_SYS_SIO_H
  133. # include <sys/sio.h>
  134. #endif
  135. enum receive_state {
  136. ONCORE_NO_IDEA,
  137. ONCORE_CHECK_ID,
  138. ONCORE_CHECK_CHAN,
  139. ONCORE_HAVE_CHAN,
  140. ONCORE_RESET_SENT,
  141. ONCORE_TEST_SENT,
  142. ONCORE_INIT,
  143. ONCORE_ALMANAC,
  144. ONCORE_RUN
  145. };
  146. enum site_survey_state {
  147. ONCORE_SS_UNKNOWN,
  148. ONCORE_SS_TESTING,
  149. ONCORE_SS_HW,
  150. ONCORE_SS_SW,
  151. ONCORE_SS_DONE
  152. };
  153. enum antenna_state {
  154. ONCORE_ANTENNA_UNKNOWN = -1,
  155. ONCORE_ANTENNA_OK = 0,
  156. ONCORE_ANTENNA_OC = 1,
  157. ONCORE_ANTENNA_UC = 2,
  158. ONCORE_ANTENNA_NV = 3
  159. };
  160. /* Model Name, derived from the @@Cj message.
  161. * Used to initialize some variables.
  162. */
  163. enum oncore_model {
  164. ONCORE_BASIC,
  165. ONCORE_PVT6,
  166. ONCORE_VP,
  167. ONCORE_UT,
  168. ONCORE_UTPLUS,
  169. ONCORE_GT,
  170. ONCORE_GTPLUS,
  171. ONCORE_SL,
  172. ONCORE_M12,
  173. ONCORE_UNKNOWN
  174. };
  175. /* the bits that describe these properties are in the same place
  176. * on the VP/UT, but have moved on the M12. As such we extract
  177. * them, and use them from this struct.
  178. *
  179. */
  180. struct RSM {
  181. u_char posn0D;
  182. u_char posn2D;
  183. u_char posn3D;
  184. u_char bad_almanac;
  185. u_char bad_fix;
  186. };
  187. /* It is possible to test the VP/UT each cycle (@@Ea or equivalent) to
  188. * see what mode it is in. The bits on the M12 are multiplexed with
  189. * other messages, so we have to 'keep' the last known mode here.
  190. */
  191. enum posn_mode {
  192. MODE_UNKNOWN,
  193. MODE_0D,
  194. MODE_2D,
  195. MODE_3D
  196. };
  197. struct instance {
  198. int unit; /* 127.127.30.unit */
  199. struct refclockproc *pp;
  200. struct peer *peer;
  201. int ttyfd; /* TTY file descriptor */
  202. int ppsfd; /* PPS file descriptor */
  203. int shmemfd; /* Status shm descriptor */
  204. pps_handle_t pps_h;
  205. pps_params_t pps_p;
  206. enum receive_state o_state; /* Receive state */
  207. enum posn_mode mode; /* 0D, 2D, 3D */
  208. enum site_survey_state site_survey; /* Site Survey state */
  209. enum antenna_state ant_state; /* antenna state */
  210. int Bj_day;
  211. u_long delay; /* ns */
  212. long offset; /* ns */
  213. u_char *shmem;
  214. char *shmem_fname;
  215. u_int shmem_Cb;
  216. u_int shmem_Ba;
  217. u_int shmem_Ea;
  218. u_int shmem_Ha;
  219. u_char shmem_reset;
  220. u_char shmem_Posn;
  221. u_char shmem_bad_Ea;
  222. u_char almanac_from_shmem;
  223. double ss_lat;
  224. double ss_long;
  225. double ss_ht;
  226. double dH;
  227. int ss_count;
  228. u_char posn_set;
  229. enum oncore_model model;
  230. u_int version;
  231. u_int revision;
  232. u_char chan; /* 6 for PVT6 or BASIC, 8 for UT/VP, 12 for m12, 0 if unknown */
  233. s_char traim; /* do we have traim? yes UT/VP, M12+T, no BASIC, GT, M12, -1 unknown, 0 no, +1 yes */
  234. /* the following 7 are all timing counters */
  235. u_char traim_delay; /* seconds counter, waiting for reply */
  236. u_char count; /* cycles thru Ea before starting */
  237. u_char count1; /* cycles thru Ea after SS_TESTING, waiting for SS_HW */
  238. u_char count2; /* cycles thru Ea after count, to check for @@Ea */
  239. u_char count3; /* cycles thru Ea checking for # channels */
  240. u_char count4; /* cycles thru leap after Gj to issue Bj */
  241. u_char count5; /* cycles thru get_timestamp waiting for valid UTC correction */
  242. u_char count5_set; /* only set count5 once */
  243. u_char pollcnt;
  244. u_char timeout; /* count to retry Cj after Fa self-test */
  245. struct RSM rsm; /* bits extracted from Receiver Status Msg in @@Ea */
  246. u_char printed;
  247. u_char polled;
  248. u_long ev_serial;
  249. int Rcvptr;
  250. u_char Rcvbuf[500];
  251. u_char BEHa[160]; /* Ba, Ea or Ha */
  252. u_char BEHn[80]; /* Bn , En , or Hn */
  253. u_char Cj[300];
  254. u_char Ag; /* Satellite mask angle */
  255. u_char saw_At;
  256. u_char saw_Ay;
  257. u_char saw_Az;
  258. s_char saw_Gj;
  259. u_char have_dH;
  260. u_char init_type;
  261. s_char saw_tooth;
  262. s_char chan_in; /* chan number from INPUT, will always use it */
  263. u_char chan_id; /* chan number determined from part number */
  264. u_char chan_ck; /* chan number determined by sending commands to hardware */
  265. s_char traim_in; /* TRAIM from INPUT, will always use ON/OFF specified */
  266. s_char traim_id; /* TRAIM determined from part number */
  267. u_char traim_ck; /* TRAIM determined by sending commands to hardware */
  268. u_char once; /* one pass code at top of BaEaHa */
  269. s_char assert;
  270. u_char hardpps;
  271. };
  272. #define rcvbuf instance->Rcvbuf
  273. #define rcvptr instance->Rcvptr
  274. static int oncore_start P((int, struct peer *));
  275. static void oncore_poll P((int, struct peer *));
  276. static void oncore_shutdown P((int, struct peer *));
  277. static void oncore_consume P((struct instance *));
  278. static void oncore_read_config P((struct instance *));
  279. static void oncore_receive P((struct recvbuf *));
  280. static int oncore_ppsapi P((struct instance *));
  281. static void oncore_get_timestamp P((struct instance *, long, long));
  282. static void oncore_init_shmem P((struct instance *));
  283. static void oncore_antenna_report P((struct instance *, enum antenna_state));
  284. static void oncore_chan_test P((struct instance *));
  285. static void oncore_check_almanac P((struct instance *));
  286. static void oncore_check_antenna P((struct instance *));
  287. static void oncore_check_leap_sec P((struct instance *));
  288. static int oncore_checksum_ok P((u_char *, int));
  289. static void oncore_compute_dH P((struct instance *));
  290. static void oncore_load_almanac P((struct instance *));
  291. static void oncore_print_Cb P((struct instance *, u_char *));
  292. /* static void oncore_print_array P((u_char *, int)); */
  293. static void oncore_print_posn P((struct instance *));
  294. static void oncore_sendmsg P((int, u_char *, size_t));
  295. static void oncore_set_posn P((struct instance *));
  296. static void oncore_set_traim P((struct instance *));
  297. static void oncore_shmem_get_3D P((struct instance *));
  298. static void oncore_ss P((struct instance *));
  299. static int oncore_wait_almanac P((struct instance *));
  300. static void oncore_msg_any P((struct instance *, u_char *, size_t, int));
  301. static void oncore_msg_Adef P((struct instance *, u_char *, size_t));
  302. static void oncore_msg_Ag P((struct instance *, u_char *, size_t));
  303. static void oncore_msg_As P((struct instance *, u_char *, size_t));
  304. static void oncore_msg_At P((struct instance *, u_char *, size_t));
  305. static void oncore_msg_Ay P((struct instance *, u_char *, size_t));
  306. static void oncore_msg_Az P((struct instance *, u_char *, size_t));
  307. static void oncore_msg_BaEaHa P((struct instance *, u_char *, size_t));
  308. static void oncore_msg_Bd P((struct instance *, u_char *, size_t));
  309. static void oncore_msg_Bj P((struct instance *, u_char *, size_t));
  310. static void oncore_msg_BnEnHn P((struct instance *, u_char *, size_t));
  311. static void oncore_msg_CaFaIa P((struct instance *, u_char *, size_t));
  312. static void oncore_msg_Cb P((struct instance *, u_char *, size_t));
  313. static void oncore_msg_Cf P((struct instance *, u_char *, size_t));
  314. static void oncore_msg_Cj P((struct instance *, u_char *, size_t));
  315. static void oncore_msg_Cj_id P((struct instance *, u_char *, size_t));
  316. static void oncore_msg_Cj_init P((struct instance *, u_char *, size_t));
  317. static void oncore_msg_Ga P((struct instance *, u_char *, size_t));
  318. static void oncore_msg_Gb P((struct instance *, u_char *, size_t));
  319. static void oncore_msg_Gj P((struct instance *, u_char *, size_t));
  320. static void oncore_msg_Sz P((struct instance *, u_char *, size_t));
  321. struct refclock refclock_oncore = {
  322. oncore_start, /* start up driver */
  323. oncore_shutdown, /* shut down driver */
  324. oncore_poll, /* transmit poll message */
  325. noentry, /* not used */
  326. noentry, /* not used */
  327. noentry, /* not used */
  328. NOFLAGS /* not used */
  329. };
  330. /*
  331. * Understanding the next bit here is not easy unless you have a manual
  332. * for the the various Oncore Models.
  333. */
  334. static struct msg_desc {
  335. const char flag[3];
  336. const int len;
  337. void (*handler) P((struct instance *, u_char *, size_t));
  338. const char *fmt;
  339. int shmem;
  340. } oncore_messages[] = {
  341. /* Ea and En first since they're most common */
  342. { "Ea", 76, oncore_msg_BaEaHa, "mdyyhmsffffaaaaoooohhhhmmmmvvhhddtntimsdimsdimsdimsdimsdimsdimsdimsdsC" },
  343. { "Ba", 68, oncore_msg_BaEaHa, "mdyyhmsffffaaaaoooohhhhmmmmvvhhddtntimsdimsdimsdimsdimsdimsdsC" },
  344. { "Ha", 154, oncore_msg_BaEaHa, "mdyyhmsffffaaaaoooohhhhmmmmaaaaoooohhhhmmmmVVvvhhddntimsiddimsiddimsiddimsiddimsiddimsiddimsiddimsiddimsiddimsiddimsiddimsiddssrrccooooTTushmvvvvvvC" },
  345. { "Bn", 59, oncore_msg_BnEnHn, "otaapxxxxxxxxxxpysreensffffsffffsffffsffffsffffsffffC" },
  346. { "En", 69, oncore_msg_BnEnHn, "otaapxxxxxxxxxxpysreensffffsffffsffffsffffsffffsffffsffffsffffC" },
  347. { "Hn", 78, oncore_msg_BnEnHn, "" },
  348. { "Ab", 10, 0, "" },
  349. { "Ac", 11, 0, "" },
  350. { "Ad", 11, oncore_msg_Adef, "" },
  351. { "Ae", 11, oncore_msg_Adef, "" },
  352. { "Af", 15, oncore_msg_Adef, "" },
  353. { "Ag", 8, oncore_msg_Ag, "" }, /* Satellite mask angle */
  354. { "As", 20, oncore_msg_As, "" },
  355. { "At", 8, oncore_msg_At, "" },
  356. { "Au", 12, 0, "" },
  357. { "Av", 8, 0, "" },
  358. { "Aw", 8, 0, "" },
  359. { "Ay", 11, oncore_msg_Ay, "" },
  360. { "Az", 11, oncore_msg_Az, "" },
  361. { "AB", 8, 0, "" },
  362. { "Bb", 92, 0, "" },
  363. { "Bd", 23, oncore_msg_Bd, "" },
  364. { "Bj", 8, oncore_msg_Bj, "" },
  365. { "Ca", 9, oncore_msg_CaFaIa, "" },
  366. { "Cb", 33, oncore_msg_Cb, "" },
  367. { "Cf", 7, oncore_msg_Cf, "" },
  368. { "Cg", 8, 0, "" },
  369. { "Ch", 9, 0, "" },
  370. { "Cj", 294, oncore_msg_Cj, "" },
  371. { "Ek", 71, 0, "" },
  372. { "Fa", 9, oncore_msg_CaFaIa, "" },
  373. { "Ga", 20, oncore_msg_Ga, "" },
  374. { "Gb", 17, oncore_msg_Gb, "" },
  375. { "Gc", 8, 0, "" },
  376. { "Gd", 8, 0, "" },
  377. { "Ge", 8, 0, "" },
  378. { "Gj", 21, oncore_msg_Gj, "" },
  379. { "Ia", 10, oncore_msg_CaFaIa, "" },
  380. { "Sz", 8, oncore_msg_Sz, "" },
  381. { {0}, 7, 0, "" }
  382. };
  383. static u_char oncore_cmd_Aa[] = { 'A', 'a', 0, 0, 0 }; /* 6/8 Time of Day */
  384. static u_char oncore_cmd_Ab[] = { 'A', 'b', 0, 0, 0 }; /* 6/8 GMT Correction */
  385. static u_char oncore_cmd_AB[] = { 'A', 'B', 4 }; /* VP Application Type: Static */
  386. static u_char oncore_cmd_Ac[] = { 'A', 'c', 0, 0, 0, 0 }; /* 6/8 Date */
  387. static u_char oncore_cmd_Ad[] = { 'A', 'd', 0,0,0,0 }; /* 6/8 Latitude */
  388. static u_char oncore_cmd_Ae[] = { 'A', 'e', 0,0,0,0 }; /* 6/8 Longitude */
  389. static u_char oncore_cmd_Af[] = { 'A', 'f', 0,0,0,0, 0 }; /* 6/8 Height */
  390. static u_char oncore_cmd_Ag[] = { 'A', 'g', 0 }; /* 6/8/12 Satellite Mask Angle */
  391. static u_char oncore_cmd_Agx[] = { 'A', 'g', 0xff }; /* 6/8/12 Satellite Mask Angle: read */
  392. static u_char oncore_cmd_As[] = { 'A', 's', 0,0,0,0, 0,0,0,0, 0,0,0,0, 0 }; /* 6/8/12 Posn Hold Parameters */
  393. static u_char oncore_cmd_Asx[] = { 'A', 's', 0x7f,0xff,0xff,0xff, /* 6/8/12 Posn Hold Readback */
  394. 0x7f,0xff,0xff,0xff, /* on UT+ this doesnt work with 0xff */
  395. 0x7f,0xff,0xff,0xff, 0xff }; /* but does work with 0x7f (sigh). */
  396. static u_char oncore_cmd_At0[] = { 'A', 't', 0 }; /* 6/8 Posn Hold: off */
  397. static u_char oncore_cmd_At1[] = { 'A', 't', 1 }; /* 6/8 Posn Hold: on */
  398. static u_char oncore_cmd_At2[] = { 'A', 't', 2 }; /* 6/8 Posn Hold: Start Site Survey */
  399. static u_char oncore_cmd_Atx[] = { 'A', 't', 0xff }; /* 6/8 Posn Hold: Read Back */
  400. static u_char oncore_cmd_Au[] = { 'A', 'u', 0,0,0,0, 0 }; /* GT/M12 Altitude Hold Ht. */
  401. static u_char oncore_cmd_Av0[] = { 'A', 'v', 0 }; /* VP/GT Altitude Hold: off */
  402. static u_char oncore_cmd_Av1[] = { 'A', 'v', 1 }; /* VP/GT Altitude Hold: on */
  403. static u_char oncore_cmd_Aw[] = { 'A', 'w', 1 }; /* 6/8/12 UTC/GPS time selection */
  404. static u_char oncore_cmd_Ay[] = { 'A', 'y', 0, 0, 0, 0 }; /* Timing 1PPS time offset: set */
  405. static u_char oncore_cmd_Ayx[] = { 'A', 'y', 0xff, 0xff, 0xff, 0xff }; /* Timing 1PPS time offset: Read */
  406. static u_char oncore_cmd_Az[] = { 'A', 'z', 0, 0, 0, 0 }; /* 6/8UT/12 1PPS Cable Delay: set */
  407. static u_char oncore_cmd_Azx[] = { 'A', 'z', 0xff, 0xff, 0xff, 0xff }; /* 6/8UT/12 1PPS Cable Delay: Read */
  408. static u_char oncore_cmd_Ba0[] = { 'B', 'a', 0 }; /* 6 Position/Data/Status: off */
  409. static u_char oncore_cmd_Ba[] = { 'B', 'a', 1 }; /* 6 Position/Data/Status: on */
  410. static u_char oncore_cmd_Bb[] = { 'B', 'b', 1 }; /* 6/8/12 Visible Satellites */
  411. static u_char oncore_cmd_Bd[] = { 'B', 'd', 1 }; /* 6/8/12? Almanac Status Msg. */
  412. static u_char oncore_cmd_Be[] = { 'B', 'e', 1 }; /* 6/8/12 Request Almanac Data */
  413. static u_char oncore_cmd_Bj[] = { 'B', 'j', 0 }; /* 6/8 Leap Second Pending */
  414. static u_char oncore_cmd_Bn0[] = { 'B', 'n', 0, 1, 0,10, 2, 0,0,0, 0,0,0,0,0,0,0 }; /* 6 TRAIM setup/status: msg off, traim on */
  415. static u_char oncore_cmd_Bn[] = { 'B', 'n', 1, 1, 0,10, 2, 0,0,0, 0,0,0,0,0,0,0 }; /* 6 TRAIM setup/status: msg on, traim on */
  416. static u_char oncore_cmd_Bnx[] = { 'B', 'n', 0, 0, 0,10, 2, 0,0,0, 0,0,0,0,0,0,0 }; /* 6 TRAIM setup/status: msg off, traim off */
  417. static u_char oncore_cmd_Ca[] = { 'C', 'a' }; /* 6 Self Test */
  418. static u_char oncore_cmd_Cf[] = { 'C', 'f' }; /* 6/8/12 Set to Defaults */
  419. static u_char oncore_cmd_Cg[] = { 'C', 'g', 1 }; /* VP Posn Fix/Idle Mode */
  420. static u_char oncore_cmd_Cj[] = { 'C', 'j' }; /* 6/8/12 Receiver ID */
  421. static u_char oncore_cmd_Ea0[] = { 'E', 'a', 0 }; /* 8 Position/Data/Status: off */
  422. static u_char oncore_cmd_Ea[] = { 'E', 'a', 1 }; /* 8 Position/Data/Status: on */
  423. static u_char oncore_cmd_Ek[] = { 'E', 'k', 0 }; /* just turn off */ /* 8 Posn/Status/Data - extension */
  424. static u_char oncore_cmd_En0[] = { 'E', 'n', 0, 1, 0,10, 2, 0,0,0, 0,0,0,0,0,0,0 }; /* 8/GT TRAIM setup/status: msg off, traim on */
  425. static u_char oncore_cmd_En[] = { 'E', 'n', 1, 1, 0,10, 2, 0,0,0, 0,0,0,0,0,0,0 }; /* 8/GT TRAIM setup/status: msg on, traim on */
  426. static u_char oncore_cmd_Enx[] = { 'E', 'n', 0, 0, 0,10, 2, 0,0,0, 0,0,0,0,0,0,0 }; /* 8/GT TRAIM setup/status: msg off, traim off */
  427. static u_char oncore_cmd_Fa[] = { 'F', 'a' }; /* 8 Self Test */
  428. static u_char oncore_cmd_Ga[] = { 'G', 'a', 0,0,0,0, 0,0,0,0, 0,0,0,0, 0 }; /* 12 Position Set */
  429. static u_char oncore_cmd_Gax[] = { 'G', 'a', 0xff, 0xff, 0xff, 0xff, /* 12 Position Set: Read */
  430. 0xff, 0xff, 0xff, 0xff, /* */
  431. 0xff, 0xff, 0xff, 0xff, 0xff }; /* */
  432. static u_char oncore_cmd_Gb[] = { 'G', 'b', 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; /* 12 set Date/Time */
  433. static u_char oncore_cmd_Gc[] = { 'G', 'c', 1 }; /* 12 PPS Control: On Cont */
  434. static u_char oncore_cmd_Gd0[] = { 'G', 'd', 0 }; /* 12 Position Control: 3D (no hold) */
  435. static u_char oncore_cmd_Gd1[] = { 'G', 'd', 1 }; /* 12 Position Control: 0D (3D hold) */
  436. static u_char oncore_cmd_Gd2[] = { 'G', 'd', 2 }; /* 12 Position Control: 2D (Alt Hold) */
  437. static u_char oncore_cmd_Gd3[] = { 'G', 'd', 3 }; /* 12 Position Coltrol: Start Site Survey */
  438. static u_char oncore_cmd_Ge0[] = { 'G', 'e', 0 }; /* M12+T TRAIM: off */
  439. static u_char oncore_cmd_Ge[] = { 'G', 'e', 1 }; /* M12+T TRAIM: on */
  440. static u_char oncore_cmd_Gj[] = { 'G', 'j' }; /* 8?/12 Leap Second Pending */
  441. static u_char oncore_cmd_Ha0[] = { 'H', 'a', 0 }; /* 12 Position/Data/Status: off */
  442. static u_char oncore_cmd_Ha[] = { 'H', 'a', 1 }; /* 12 Position/Data/Status: on */
  443. static u_char oncore_cmd_Hn0[] = { 'H', 'n', 0 }; /* 12 TRAIM Status: off */
  444. static u_char oncore_cmd_Hn[] = { 'H', 'n', 1 }; /* 12 TRAIM Status: on */
  445. static u_char oncore_cmd_Ia[] = { 'I', 'a' }; /* 12 Self Test */
  446. /* it appears that as of 1997/1998, the UT had As,At, but not Au,Av
  447. * the GT had Au,Av, but not As,At
  448. * This was as of v2.0 of both firmware sets. possibly 1.3 for UT.
  449. * Bj in UT at v1.3
  450. * dont see Bd in UT/GT thru 1999
  451. * Gj in UT as of 3.0, 1999 , Bj as of 1.3
  452. */
  453. static char *Month[] = {"Jan", "Feb", "Mar", "Apr", "May", "Jun", "Jly",
  454. "Aug", "Sep", "Oct", "Nov", "Dec" };
  455. #define DEVICE1 "/dev/oncore.serial.%d" /* name of serial device */
  456. #define DEVICE2 "/dev/oncore.pps.%d" /* name of pps device */
  457. #define SPEED B9600 /* Oncore Binary speed (9600 bps) */
  458. /*
  459. * Assemble and disassemble 32bit signed quantities from a buffer.
  460. *
  461. */
  462. /* to buffer, int w, u_char *buf */
  463. #define w32_buf(buf,w) { u_int i_tmp; \
  464. i_tmp = (w<0) ? (~(-w)+1) : (w); \
  465. (buf)[0] = (i_tmp >> 24) & 0xff; \
  466. (buf)[1] = (i_tmp >> 16) & 0xff; \
  467. (buf)[2] = (i_tmp >> 8) & 0xff; \
  468. (buf)[3] = (i_tmp ) & 0xff; \
  469. }
  470. #define w32(buf) (((buf)[0]&0xff) << 24 | \
  471. ((buf)[1]&0xff) << 16 | \
  472. ((buf)[2]&0xff) << 8 | \
  473. ((buf)[3]&0xff) )
  474. /* from buffer, char *buf, result to an int */
  475. #define buf_w32(buf) (((buf)[0]&0200) ? (-(~w32(buf)+1)) : w32(buf))
  476. /*
  477. * oncore_start - initialize data for processing
  478. */
  479. static int
  480. oncore_start(
  481. int unit,
  482. struct peer *peer
  483. )
  484. {
  485. #define STRING_LEN 32
  486. register struct instance *instance;
  487. struct refclockproc *pp;
  488. int fd1, fd2, num;
  489. char device1[STRING_LEN], device2[STRING_LEN], Msg[160];
  490. const char *cp;
  491. struct stat stat1, stat2;
  492. /* create instance structure for this unit */
  493. if (!(instance = (struct instance *) malloc(sizeof *instance))) {
  494. perror("malloc");
  495. return (0);
  496. }
  497. memset((char *) instance, 0, sizeof *instance);
  498. /* initialize miscellaneous variables */
  499. pp = peer->procptr;
  500. pp->unitptr = (caddr_t) instance;
  501. instance->pp = pp;
  502. instance->unit = unit;
  503. instance->peer = peer;
  504. instance->assert = 1;
  505. instance->once = 1;
  506. instance->Bj_day = -1;
  507. instance->traim = -1;
  508. instance->traim_in = -1;
  509. instance->chan_in = -1;
  510. instance->model = ONCORE_UNKNOWN;
  511. instance->mode = MODE_UNKNOWN;
  512. instance->site_survey = ONCORE_SS_UNKNOWN;
  513. instance->Ag = 0xff; /* Satellite mask angle, unset by user */
  514. instance->ant_state = ONCORE_ANTENNA_UNKNOWN;
  515. peer->precision = -26;
  516. peer->minpoll = 4;
  517. peer->maxpoll = 4;
  518. pp->clockdesc = "Motorola Oncore GPS Receiver";
  519. memcpy((char *)&pp->refid, "GPS\0", (size_t) 4);
  520. cp = "ONCORE DRIVER -- CONFIGURING";
  521. record_clock_stats(&(instance->peer->srcadr), cp);
  522. instance->o_state = ONCORE_NO_IDEA;
  523. cp = "state = ONCORE_NO_IDEA";
  524. record_clock_stats(&(instance->peer->srcadr), cp);
  525. /* Now open files.
  526. * This is a bit complicated, a we dont want to open the same file twice
  527. * (its a problem on some OS), and device2 may not exist for the new PPS
  528. */
  529. (void)sprintf(device1, DEVICE1, unit);
  530. (void)sprintf(device2, DEVICE2, unit);
  531. /* OPEN DEVICES */
  532. /* opening different devices for fd1 and fd2 presents no problems */
  533. /* opening the SAME device twice, seems to be OS dependent.
  534. (a) on Linux (no streams) no problem
  535. (b) on SunOS (and possibly Solaris, untested), (streams)
  536. never see the line discipline.
  537. Since things ALWAYS work if we only open the device once, we check
  538. to see if the two devices are in fact the same, then proceed to
  539. do one open or two.
  540. */
  541. if (stat(device1, &stat1)) {
  542. sprintf(Msg, "Can't stat fd1 (%s)\n", device1);
  543. record_clock_stats(&(instance->peer->srcadr), Msg);
  544. exit(1);
  545. }
  546. if (stat(device2, &stat2)) {
  547. sprintf(Msg, "Can't stat fd2 (%s)\n", device2);
  548. record_clock_stats(&(instance->peer->srcadr), Msg);
  549. exit(1);
  550. }
  551. if (!(fd1 = refclock_open(device1, SPEED, LDISC_RAW))) {
  552. sprintf(Msg, "Can't open fd1 (%s)\n", device1);
  553. record_clock_stats(&(instance->peer->srcadr), Msg);
  554. exit(1);
  555. }
  556. if ((stat1.st_dev == stat2.st_dev) && (stat1.st_ino == stat2.st_ino)) /* same device here */
  557. fd2 = fd1;
  558. else { /* different devices here */
  559. if ((fd2=open(device2, O_RDWR)) < 0) {
  560. sprintf(Msg, "Can't open fd2 (%s)\n", device2);
  561. record_clock_stats(&(instance->peer->srcadr), Msg);
  562. exit(1);
  563. }
  564. }
  565. num = fd2;
  566. /* open ppsapi soure */
  567. if (time_pps_create(num, &instance->pps_h) < 0) {
  568. record_clock_stats(&(instance->peer->srcadr), "PPSAPI not found in kernel");
  569. return(0);
  570. }
  571. /* continue initialization */
  572. instance->ttyfd = fd1;
  573. instance->ppsfd = fd2;
  574. /* go read any input data in /etc/ntp.oncoreX or /etc/ntp/oncore.X */
  575. oncore_read_config(instance);
  576. if (!oncore_ppsapi(instance))
  577. return(0);
  578. pp->io.clock_recv = oncore_receive;
  579. pp->io.srcclock = (caddr_t)peer;
  580. pp->io.datalen = 0;
  581. pp->io.fd = fd1;
  582. if (!io_addclock(&pp->io)) {
  583. record_clock_stats(&(instance->peer->srcadr), "ONCORE: io_addclock");
  584. (void) close(fd1);
  585. free(instance);
  586. return (0);
  587. }
  588. #ifdef ONCORE_SHMEM_STATUS
  589. /*
  590. * Before starting ONCORE, lets setup SHMEM
  591. * This will include merging an old SHMEM into the new one if
  592. * an old one is found.
  593. */
  594. oncore_init_shmem(instance);
  595. #endif
  596. /*
  597. * This will return the Model of the Oncore receiver.
  598. * and start the Initialization loop in oncore_msg_Cj.
  599. */
  600. instance->o_state = ONCORE_CHECK_ID;
  601. cp = "state = ONCORE_CHECK_ID";
  602. record_clock_stats(&(instance->peer->srcadr), cp);
  603. instance->timeout = 4;
  604. oncore_sendmsg(instance->ttyfd, oncore_cmd_Cg, sizeof(oncore_cmd_Cg)); /* Set Posn Fix mode (not Idle (VP)) */
  605. oncore_sendmsg(instance->ttyfd, oncore_cmd_Cj, sizeof(oncore_cmd_Cj));
  606. instance->pollcnt = 2;
  607. return (1);
  608. }
  609. /*
  610. * oncore_shutdown - shut down the clock
  611. */
  612. static void
  613. oncore_shutdown(
  614. int unit,
  615. struct peer *peer
  616. )
  617. {
  618. register struct instance *instance;
  619. struct refclockproc *pp;
  620. pp = peer->procptr;
  621. instance = (struct instance *) pp->unitptr;
  622. io_closeclock(&pp->io);
  623. time_pps_destroy (instance->pps_h);
  624. close(instance->ttyfd);
  625. if ((instance->ppsfd != -1) && (instance->ppsfd != instance->ttyfd))
  626. close(instance->ppsfd);
  627. if (instance->shmemfd)
  628. close(instance->shmemfd);
  629. free(instance);
  630. }
  631. /*
  632. * oncore_poll - called by the transmit procedure
  633. */
  634. static void
  635. oncore_poll(
  636. int unit,
  637. struct peer *peer
  638. )
  639. {
  640. struct instance *instance;
  641. instance = (struct instance *) peer->procptr->unitptr;
  642. if (instance->timeout) {
  643. char *cp;
  644. instance->timeout--;
  645. if (instance->timeout == 0) {
  646. cp = "Oncore: No response from @@Cj, shutting down driver";
  647. record_clock_stats(&(instance->peer->srcadr), cp);
  648. oncore_shutdown(unit, peer);
  649. } else {
  650. oncore_sendmsg(instance->ttyfd, oncore_cmd_Cj, sizeof(oncore_cmd_Cj));
  651. cp = "Oncore: Resend @@Cj";
  652. record_clock_stats(&(instance->peer->srcadr), cp);
  653. }
  654. return;
  655. }
  656. if (!instance->pollcnt)
  657. refclock_report(peer, CEVNT_TIMEOUT);
  658. else
  659. instance->pollcnt--;
  660. peer->procptr->polls++;
  661. instance->polled = 1;
  662. }
  663. /*
  664. * Initialize PPSAPI
  665. */
  666. static int
  667. oncore_ppsapi(
  668. struct instance *instance
  669. )
  670. {
  671. int cap, mode, mode1;
  672. char *cp, Msg[160];
  673. if (time_pps_getcap(instance->pps_h, &cap) < 0) {
  674. msyslog(LOG_ERR, "time_pps_getcap failed: %m");
  675. return (0);
  676. }
  677. if (time_pps_getparams(instance->pps_h, &instance->pps_p) < 0) {
  678. msyslog(LOG_ERR, "time_pps_getparams failed: %m");
  679. return (0);
  680. }
  681. /* nb. only turn things on, if someone else has turned something
  682. * on before we get here, leave it alone!
  683. */
  684. if (instance->assert) {
  685. cp = "Assert.";
  686. mode = PPS_CAPTUREASSERT;
  687. mode1 = PPS_OFFSETASSERT;
  688. } else {
  689. cp = "Clear.";
  690. mode = PPS_CAPTURECLEAR;
  691. mode1 = PPS_OFFSETCLEAR;
  692. }
  693. sprintf(Msg, "Initializing timeing to %s.", cp);
  694. record_clock_stats(&(instance->peer->srcadr), Msg);
  695. if (!(mode & cap)) {
  696. sprintf(Msg, "Can't set timeing to %s, exiting...", cp);
  697. record_clock_stats(&(instance->peer->srcadr), Msg);
  698. return(0);
  699. }
  700. if (!(mode1 & cap)) {
  701. sprintf(Msg, "Can't set PPS_%sCLEAR, this will increase jitter.", cp);
  702. record_clock_stats(&(instance->peer->srcadr), Msg);
  703. mode1 = 0;
  704. }
  705. /* only set what is legal */
  706. instance->pps_p.mode = (mode | mode1 | PPS_TSFMT_TSPEC) & cap;
  707. if (time_pps_setparams(instance->pps_h, &instance->pps_p) < 0) {
  708. record_clock_stats(&(instance->peer->srcadr), "ONCORE: time_pps_setparams fails");
  709. exit(1);
  710. }
  711. /* If HARDPPS is on, we tell kernel */
  712. if (instance->hardpps) {
  713. int i;
  714. record_clock_stats(&(instance->peer->srcadr), "HARDPPS Set.");
  715. if (instance->assert)
  716. i = PPS_CAPTUREASSERT;
  717. else
  718. i = PPS_CAPTURECLEAR;
  719. /* we know that 'i' is legal from above */
  720. if (time_pps_kcbind(instance->pps_h, PPS_KC_HARDPPS, i,
  721. PPS_TSFMT_TSPEC) < 0) {
  722. msyslog(LOG_ERR, "time_pps_kcbind failed: %m");
  723. record_clock_stats(&(instance->peer->srcadr), "HARDPPS failed, abort...");
  724. return (0);
  725. }
  726. pps_enable = 1;
  727. }
  728. return(1);
  729. }
  730. #ifdef ONCORE_SHMEM_STATUS
  731. static void
  732. oncore_init_shmem(
  733. struct instance *instance
  734. )
  735. {
  736. int i, l, n, fd, shmem_old_size, n1;
  737. char Msg[160];
  738. u_char *cp, *cp1, *buf, *shmem_old;
  739. struct msg_desc *mp;
  740. struct stat sbuf;
  741. size_t shmem_length;
  742. /*
  743. * The first thing we do is see if there is an instance->shmem_fname file (still)
  744. * out there from a previous run. If so, we copy it in and use it to initialize
  745. * shmem (so we won't lose our almanac if we need it).
  746. */
  747. shmem_old = 0;
  748. shmem_old_size = 0;
  749. if ((fd = open(instance->shmem_fname, O_RDONLY)) < 0)
  750. record_clock_stats(&(instance->peer->srcadr), "ONCORE: Can't open SHMEM file");
  751. else {
  752. fstat(fd, &sbuf);
  753. shmem_old_size = sbuf.st_size;
  754. if (shmem_old_size != 0) {
  755. shmem_old = (u_char *) malloc((unsigned) sbuf.st_size);
  756. if (shmem_old == NULL)
  757. record_clock_stats(&(instance->peer->srcadr), "ONCORE: Can't malloc buffer for shmem_old");
  758. else
  759. read(fd, shmem_old, shmem_old_size);
  760. }
  761. close(fd);
  762. }
  763. /* OK, we now create the NEW SHMEM. */
  764. if ((instance->shmemfd = open(instance->shmem_fname, O_RDWR|O_CREAT|O_TRUNC, 0644)) < 0) {
  765. record_clock_stats(&(instance->peer->srcadr), "ONCORE: Can't open shmem");
  766. if (shmem_old)
  767. free(shmem_old);
  768. return;
  769. }
  770. /* see how big it needs to be */
  771. n = 1;
  772. for (mp=oncore_messages; mp->flag[0]; mp++) {
  773. mp->shmem = n;
  774. /* Allocate space for multiplexed almanac, and 0D/2D/3D @@Ea records */
  775. if (!strcmp(mp->flag, "Cb")) {
  776. instance->shmem_Cb = n;
  777. n += (mp->len + 3) * 34;
  778. }
  779. if (!strcmp(mp->flag, "Ba")) {
  780. instance->shmem_Ba = n;
  781. n += (mp->len + 3) * 3;
  782. }
  783. if (!strcmp(mp->flag, "Ea")) {
  784. instance->shmem_Ea = n;
  785. n += (mp->len + 3) * 3;
  786. }
  787. if (!strcmp(mp->flag, "Ha")) {
  788. instance->shmem_Ha = n;
  789. n += (mp->len + 3) * 3;
  790. }
  791. n += (mp->len + 3);
  792. }
  793. shmem_length = n + 2;
  794. buf = malloc(shmem_length);
  795. if (buf == NULL) {
  796. record_clock_stats(&(instance->peer->srcadr), "ONCORE: Can't malloc buffer for shmem");
  797. close(instance->shmemfd);
  798. if (shmem_old)
  799. free(shmem_old);
  800. return;
  801. }
  802. memset(buf, 0, shmem_length);
  803. /* next build the new SHMEM buffer in memory */
  804. for (mp=oncore_messages; mp->flag[0]; mp++) {
  805. l = mp->shmem;
  806. buf[l + 0] = mp->len >> 8;
  807. buf[l + 1] = mp->len & 0xff;
  808. buf[l + 2] = 0;
  809. buf[l + 3] = '@';
  810. buf[l + 4] = '@';
  811. buf[l + 5] = mp->flag[0];
  812. buf[l + 6] = mp->flag[1];
  813. if (!strcmp(mp->flag, "Cb") || !strcmp(mp->flag, "Ba") || !strcmp(mp->flag, "Ea") || !strcmp(mp->flag, "Ha")) {
  814. if (!strcmp(mp->flag, "Cb"))
  815. n = 35;
  816. else
  817. n = 4;
  818. for (i=1; i<n; i++) {
  819. buf[l + i * (mp->len+3) + 0] = mp->len >> 8;
  820. buf[l + i * (mp->len+3) + 1] = mp->len & 0xff;
  821. buf[l + i * (mp->len+3) + 2] = 0;
  822. buf[l + i * (mp->len+3) + 3] = '@';
  823. buf[l + i * (mp->len+3) + 4] = '@';
  824. buf[l + i * (mp->len+3) + 5] = mp->flag[0];
  825. buf[l + i * (mp->len+3) + 6] = mp->flag[1];
  826. }
  827. }
  828. }
  829. /* we now walk thru the two buffers (shmem_old and buf, soon to become shmem)
  830. * copying the data in shmem_old to buf.
  831. * When we are done we write it out and free both buffers.
  832. * If the structure sizes dont agree, I will not copy.
  833. * This could be due to an addition/deletion or a problem with the disk file.
  834. */
  835. if (shmem_old) {
  836. if (shmem_old_size == shmem_length) {
  837. for (cp=buf+4, cp1=shmem_old+4; (n = 256*(*(cp-3)) + *(cp-2)); cp+=(n+3), cp1+=(n+3)) {
  838. n1 = 256*(*(cp1-3)) + *(cp1-2);
  839. if (n == 0 || n1 != n || strncmp((char *) cp, (char *) cp1, 4))
  840. break;
  841. memcpy(cp, cp1, (size_t) n);
  842. }
  843. }
  844. free(shmem_old);
  845. }
  846. i = write(instance->shmemfd, buf, shmem_length);
  847. free(buf);
  848. if (i != shmem_length) {
  849. record_clock_stats(&(instance->peer->srcadr), "ONCORE: error writing shmem");
  850. close(instance->shmemfd);
  851. return;
  852. }
  853. instance->shmem = (u_char *) mmap(0, shmem_length,
  854. PROT_READ | PROT_WRITE,
  855. #ifdef MAP_HASSEMAPHORE
  856. MAP_HASSEMAPHORE |
  857. #endif
  858. MAP_SHARED, instance->shmemfd, (off_t)0);
  859. if (instance->shmem == (u_char *)MAP_FAILED) {
  860. instance->shmem = 0;
  861. close(instance->shmemfd);
  862. return;
  863. }
  864. sprintf(Msg, "SHMEM (size = %ld) is CONFIGURED and available as %s",
  865. (u_long) shmem_length, instance->shmem_fname);
  866. record_clock_stats(&(instance->peer->srcadr), Msg);
  867. }
  868. #endif /* ONCORE_SHMEM_STATUS */
  869. /*
  870. * Read Input file if it exists.
  871. */
  872. static void
  873. oncore_read_config(
  874. struct instance *instance
  875. )
  876. {
  877. /*
  878. * First we try to open the configuration file
  879. * /etc/oncoreN
  880. * where N is the unit number viz 127.127.30.N.
  881. * If we don't find it we try
  882. * /etc/ntp.oncore.N
  883. * and then
  884. * /etc/ntp.oncore
  885. *
  886. * If we don't find any then we don't have the cable delay or PPS offset
  887. * and we choose MODE (4) below.
  888. *
  889. * Five Choices for MODE
  890. * (0) ONCORE is preinitialized, don't do anything to change it.
  891. * nb, DON'T set 0D mode, DON'T set Delay, position...
  892. * (1) NO RESET, Read Position, delays from data file, lock it in, go to 0D mode.
  893. * (2) NO RESET, Read Delays from data file, do SITE SURVEY to get position,
  894. * lock this in, go to 0D mode.
  895. * (3) HARD RESET, Read Position, delays from data file, lock it in, go to 0D mode.
  896. * (4) HARD RESET, Read Delays from data file, do SITE SURVEY to get position,
  897. * lock this in, go to 0D mode.
  898. * NB. If a POSITION is specified in the config file with mode=(2,4) [SITE SURVEY]
  899. * then this position is set as the INITIAL position of the ONCORE.
  900. * This can reduce the time to first fix.
  901. * -------------------------------------------------------------------------------
  902. * Note that an Oncore UT without a battery backup retains NO information if it is
  903. * power cycled, with a Battery Backup it remembers the almanac, etc.
  904. * For an Oncore VP, there is an eeprom that will contain this data, along with the
  905. * option of Battery Backup.
  906. * So a UT without Battery Backup is equivalent to doing a HARD RESET on each
  907. * power cycle, since there is nowhere to store the data.
  908. * -------------------------------------------------------------------------------
  909. *
  910. * If we open one or the other of the files, we read it looking for
  911. * MODE, LAT, LON, (HT, HTGPS, HTMSL), DELAY, OFFSET, ASSERT, CLEAR, HARDPPS,
  912. * STATUS, POSN3D, POSN2D, CHAN, TRAIM
  913. * then initialize using method MODE. For Mode = (1,3) all of (LAT, LON, HT) must
  914. * be present or mode reverts to (2,4).
  915. *
  916. * Read input file.
  917. *
  918. * # is comment to end of line
  919. * = allowed between 1st and 2nd fields.
  920. *
  921. * Expect to see one line with 'MODE' as first field, followed by an integer
  922. * in the range 0-4 (default = 4).
  923. *
  924. * Expect to see two lines with 'LONG', 'LAT' followed by 1-3 fields.
  925. * All numbers are floating point.
  926. * DDD.ddd
  927. * DDD MMM.mmm
  928. * DDD MMM SSS.sss
  929. *
  930. * Expect to see one line with 'HT' as first field,
  931. * followed by 1-2 fields. First is a number, the second is 'FT' or 'M'
  932. * for feet or meters. HT is the height above the GPS ellipsoid.
  933. * If the receiver reports height in both GPS and MSL, then we will report
  934. * the difference GPS-MSL on the clockstats file.
  935. *
  936. * There is an optional line, starting with DELAY, followed
  937. * by 1 or two fields. The first is a number (a time) the second is
  938. * 'MS', 'US' or 'NS' for miliseconds, microseconds or nanoseconds.
  939. * DELAY is cable delay, typically a few tens of ns.
  940. *
  941. * There is an optional line, starting with OFFSET, followed
  942. * by 1 or two fields. The first is a number (a time) the second is
  943. * 'MS', 'US' or 'NS' for miliseconds, microseconds or nanoseconds.
  944. * OFFSET is the offset of the PPS pulse from 0. (only fully implemented
  945. * with the PPSAPI, we need to be able to tell the Kernel about this
  946. * offset if the Kernel PLL is in use, but can only do this presently
  947. * when using the PPSAPI interface. If not using the Kernel PLL,
  948. * then there is no problem.
  949. *
  950. * There is an optional line, with either ASSERT or CLEAR on it, which
  951. * determine which transition of the PPS signal is used for timing by the
  952. * PPSAPI. If neither is present, then ASSERT is assumed.
  953. * ASSERT/CLEAR can also be set with FLAG2 of the ntp.conf input.
  954. * For Flag2, ASSERT=0, and hence is default.
  955. *
  956. * There is an optional line, with HARDPPS on it. Including this line causes
  957. * the PPS signal to control the kernel PLL.
  958. * HARDPPS can also be set with FLAG3 of the ntp.conf input.
  959. * For Flag3, 0 is disabled, and the default.
  960. *
  961. * There are three options that have to do with using the shared memory option.
  962. * First, to enable the option there must be a SHMEM line with a file name.
  963. * The file name is the file associated with the shared memory.
  964. *
  965. * In shared memory, there is one 'record' for each returned variable.
  966. * For the @@Ea data there are three 'records' containing position data.
  967. * There will always be data in the record corresponding to the '0D' @@Ea record,
  968. * and the user has a choice of filling the '3D' record by specifying POSN3D,
  969. * or the '2D' record by specifying POSN2D. In either case the '2D' or '3D'
  970. * record is filled once every 15s.
  971. *
  972. * Two additional variables that can be set are CHAN and TRAIM. These should be
  973. * set correctly by the code examining the @@Cj record, but we bring them out here
  974. * to allow the user to override either the # of channels, or the existence of TRAIM.
  975. * CHAN expects to be followed by in integer: 6, 8, or 12. TRAIM expects to be
  976. * followed by YES or NO.
  977. *
  978. * There is an optional line with MASK on it followed by one integer field in the
  979. * range 0 to 89. This sets the satellite mask angle and will determine the minimum
  980. * elevation angle for satellites to be tracked by the receiver. The default value
  981. * is 10 deg for the VP and 0 deg for all other receivers.
  982. *
  983. * So acceptable input would be
  984. * # these are my coordinates (RWC)
  985. * LON -106 34.610
  986. * LAT 35 08.999
  987. * HT 1589 # could equally well say HT 5215 FT
  988. * DELAY 60 ns
  989. */
  990. FILE *fd;
  991. char *cp, *cc, *ca, line[100], units[2], device[20], Msg[160], **cpp;
  992. char *dirs[] = { "/etc/ntp", "/etc", 0 };
  993. int i, sign, lat_flg, long_flg, ht_flg, mode, mask;
  994. double f1, f2, f3;
  995. fd = NULL; /* just to shutup gcc complaint */
  996. for (cpp=dirs; *cpp; cpp++) {
  997. cp = *cpp;
  998. sprintf(device, "%s/ntp.oncore.%d", cp, instance->unit); /* try "ntp.oncore.0 */
  999. if ((fd=fopen(device, "r")))
  1000. break;
  1001. sprintf(device, "%s/ntp.oncore%d", cp, instance->unit); /* try "ntp.oncore0" */
  1002. if ((fd=fopen(device, "r")))
  1003. break;
  1004. sprintf(device, "%s/ntp.oncore", cp); /* and finally "ntp.oncore" */
  1005. if ((fd=fopen(device, "r")))
  1006. break;
  1007. }
  1008. if (!fd) { /* no inputfile, default to the works ... */
  1009. instance->init_type = 4;
  1010. return;
  1011. }
  1012. mode = mask = 0;
  1013. lat_flg = long_flg = ht_flg = 0;
  1014. while (fgets(line, 100, fd)) {
  1015. /* Remove comments */
  1016. if ((cp = strchr(line, '#')))
  1017. *cp = '\0';
  1018. /* Remove trailing space */
  1019. for (i = strlen(line);
  1020. i > 0 && isascii((int)line[i - 1]) && isspace((int)line[i - 1]);
  1021. )
  1022. line[--i] = '\0';
  1023. /* Remove leading space */
  1024. for (cc = line; *cc && isascii((int)*cc) && isspace((int)*cc); cc++)
  1025. continue;
  1026. /* Stop if nothing left */
  1027. if (!*cc)
  1028. continue;
  1029. /* Uppercase the command and find the arg */
  1030. for (ca = cc; *ca; ca++) {
  1031. if (isascii((int)*ca)) {
  1032. if (islower((int)*ca)) {
  1033. *ca = toupper(*ca);
  1034. } else if (isspace((int)*ca) || (*ca == '='))
  1035. break;
  1036. }
  1037. }
  1038. /* Remove space (and possible =) leading the arg */
  1039. for (; *ca && isascii((int)*ca) && (isspace((int)*ca) || (*ca == '=')); ca++)
  1040. continue;
  1041. if (!strncmp(cc, "STATUS", (size_t) 6) || !strncmp(cc, "SHMEM", (size_t) 5)) {
  1042. i = strlen(ca);
  1043. instance->shmem_fname = (char *) malloc((unsigned) (i+1));
  1044. strcpy(instance->shmem_fname, ca);
  1045. continue;
  1046. }
  1047. /* Uppercase argument as well */
  1048. for (cp = ca; *cp; cp++)
  1049. if (isascii((int)*cp) && islower((int)*cp))
  1050. *cp = toupper(*cp);
  1051. if (!strncmp(cc, "LAT", (size_t) 3)) {
  1052. f1 = f2 = f3 = 0;
  1053. sscanf(ca, "%lf %lf %lf", &f1, &f2, &f3);
  1054. sign = 1;
  1055. if (f1 < 0) {
  1056. f1 = -f1;
  1057. sign = -1;
  1058. }
  1059. instance->ss_lat = sign*1000*(fabs(f3) + 60*(fabs(f2) + 60*f1)); /*miliseconds*/
  1060. lat_flg++;
  1061. } else if (!strncmp(cc, "LON", (size_t) 3)) {
  1062. f1 = f2 = f3 = 0;
  1063. sscanf(ca, "%lf %lf %lf", &f1, &f2, &f3);
  1064. sign = 1;
  1065. if (f1 < 0) {
  1066. f1 = -f1;
  1067. sign = -1;
  1068. }
  1069. instance->ss_long = sign*1000*(fabs(f3) + 60*(fabs(f2) + 60*f1)); /*miliseconds*/
  1070. long_flg++;
  1071. } else if (!strncmp(cc, "HT", (size_t) 2)) {
  1072. f1 = 0;
  1073. units[0] = '\0';
  1074. sscanf(ca, "%lf %1s", &f1, units);
  1075. if (units[0] == 'F')
  1076. f1 = 0.3048 * f1;
  1077. instance->ss_ht = 100 * f1; /* cm */
  1078. ht_flg++;
  1079. } else if (!strncmp(cc, "DELAY", (size_t) 5)) {
  1080. f1 = 0;
  1081. units[0] = '\0';
  1082. sscanf(ca, "%lf %1s", &f1, units);
  1083. if (units[0] == 'N')
  1084. ;
  1085. else if (units[0] == 'U')
  1086. f1 = 1000 * f1;
  1087. else if (units[0] == 'M')
  1088. f1 = 1000000 * f1;
  1089. else
  1090. f1 = 1000000000 * f1;
  1091. if (f1 < 0 || f1 > 1.e9)
  1092. f1 = 0;
  1093. if (f1 < 0 || f1 > 999999) {
  1094. sprintf(Msg, "PPS Cable delay of %fns out of Range, ignored", f1);
  1095. record_clock_stats(&(instance->peer->srcadr), Msg);
  1096. } else
  1097. instance->delay = f1; /* delay in ns */
  1098. } else if (!strncmp(cc, "OFFSET", (size_t) 6)) {
  1099. f1 = 0;
  1100. units[0] = '\0';
  1101. sscanf(ca, "%lf %1s", &f1, units);
  1102. if (units[0] == 'N')
  1103. ;
  1104. else if (units[0] == 'U')
  1105. f1 = 1000 * f1;
  1106. else if (units[0] == 'M')
  1107. f1 = 1000000 * f1;
  1108. else
  1109. f1 = 1000000000 * f1;
  1110. if (f1 < 0 || f1 > 1.e9)
  1111. f1 = 0;
  1112. if (f1 < 0 || f1 > 999999999.) {
  1113. sprintf(Msg, "PPS Offset of %fns out of Range, ignored", f1);
  1114. record_clock_stats(&(instance->peer->srcadr), Msg);
  1115. } else
  1116. instance->offset = f1; /* offset in ns */
  1117. } else if (!strncmp(cc, "MODE", (size_t) 4)) {
  1118. sscanf(ca, "%d", &mode);
  1119. if (mode < 0 || mode > 4)
  1120. mode = 4;
  1121. } else if (!strncmp(cc, "ASSERT", (size_t) 6)) {
  1122. instance->assert = 1;
  1123. } else if (!strncmp(cc, "CLEAR", (size_t) 5)) {
  1124. instance->assert = 0;
  1125. } else if (!strncmp(cc, "HARDPPS", (size_t) 7)) {
  1126. instance->hardpps = 1;
  1127. } else if (!strncmp(cc, "POSN2D", (size_t) 6)) {
  1128. instance->shmem_Posn = 2;
  1129. } else if (!strncmp(cc, "POSN3D", (size_t) 6)) {
  1130. instance->shmem_Posn = 3;
  1131. } else if (!strncmp(cc, "CHAN", (size_t) 4)) {
  1132. sscanf(ca, "%d", &i);
  1133. if ((i == 6) || (i == 8) || (i == 12))
  1134. instance->chan_in = i;
  1135. } else if (!strncmp(cc, "TRAIM", (size_t) 5)) {
  1136. instance->traim_in = 1; /* so TRAIM alone is YES */
  1137. if (!strcmp(ca, "NO") || !strcmp(ca, "OFF")) /* Yes/No, On/Off */
  1138. instance->traim_in = 0;
  1139. } else if (!strncmp(cc, "MASK", (size_t) 4)) {
  1140. sscanf(ca, "%d", &mask);
  1141. if (mask > -1 && mask < 90)
  1142. instance->Ag = mask; /* Satellite mask angle */
  1143. }
  1144. }
  1145. fclose(fd);
  1146. /*
  1147. * OK, have read all of data file, and extracted the good stuff.
  1148. * If lat/long/ht specified they ALL must be specified for mode = (1,3).
  1149. */
  1150. instance->posn_set = 1;
  1151. if (!( lat_flg && long_flg && ht_flg )) {
  1152. printf("ONCORE: incomplete data on %s\n", device);
  1153. instance->posn_set = 0;
  1154. if (mode == 1 || mode == 3) {
  1155. sprintf(Msg, "Input Mode = %d, but no/incomplete position, mode set to %d", mode, mode+1);
  1156. record_clock_stats(&(instance->peer->srcadr), Msg);
  1157. mode++;
  1158. }
  1159. }
  1160. instance->init_type = mode;
  1161. sprintf(Msg, "Input mode = %d", mode);
  1162. record_clock_stats(&(instance->peer->srcadr), Msg);
  1163. }
  1164. /*
  1165. * move data from NTP to buffer (toss the extra in the unlikely case it won't fit)
  1166. */
  1167. static void
  1168. oncore_receive(
  1169. struct recvbuf *rbufp
  1170. )
  1171. {
  1172. size_t i;
  1173. u_char *p;
  1174. struct peer *peer;
  1175. struct instance *instance;
  1176. peer = (struct peer *)rbufp->recv_srcclock;
  1177. instance = (struct instance *) peer->procptr->unitptr;
  1178. p = (u_char *) &rbufp->recv_space;
  1179. #if 0
  1180. if (debug > 4) {
  1181. int i;
  1182. printf("ONCORE: >>>");
  1183. for(i=0; i<rbufp->recv_length; i++)
  1184. printf("%02x ", p[i]);
  1185. printf("\n");
  1186. printf("ONCORE: >>>");
  1187. for(i=0; i<rbufp->recv_length; i++)
  1188. printf("%03o ", p[i]);
  1189. printf("\n");
  1190. }
  1191. #endif
  1192. i = rbufp->recv_length;
  1193. if (rcvbuf+rcvptr+i > &rcvbuf[sizeof rcvbuf])
  1194. i = sizeof(rcvbuf) - rcvptr; /* and some char will be lost */
  1195. memcpy(rcvbuf+rcvptr, p, i);
  1196. rcvptr += i;
  1197. oncore_consume(instance);
  1198. }
  1199. /*
  1200. * Deal with any complete messages
  1201. */
  1202. static void
  1203. oncore_consume(
  1204. struct instance *instance
  1205. )
  1206. {
  1207. int i, m;
  1208. unsigned l;
  1209. while (rcvptr >= 7) {
  1210. if (rcvbuf[0] != '@' || rcvbuf[1] != '@') {
  1211. /* We're not in sync, lets try to get there */
  1212. for (i=1; i < rcvptr-1; i++)
  1213. if (rcvbuf[i] == '@' && rcvbuf[i+1] == '@')
  1214. break;
  1215. #ifdef DEBUG
  1216. if (debug > 4)
  1217. printf("ONCORE[%d]: >>> skipping %d chars\n", instance->unit, i);
  1218. #endif
  1219. if (i != rcvptr)
  1220. memcpy(rcvbuf, rcvbuf+i, (size_t)(rcvptr-i));
  1221. rcvptr -= i;
  1222. continue;
  1223. }
  1224. /* Ok, we have a header now */
  1225. l = sizeof(oncore_messages)/sizeof(oncore_messages[0]) -1;
  1226. for(m=0; m<l; m++)
  1227. if (!strncmp(oncore_messages[m].flag, (char *)(rcvbuf+2), (size_t) 2))
  1228. break;
  1229. if (m == l) {
  1230. #ifdef DEBUG
  1231. if (debug > 4)
  1232. printf("ONCORE[%d]: >>> Unknown MSG, skipping 4 (%c%c)\n", instance->unit, rcvbuf[2], rcvbuf[3]);
  1233. #endif
  1234. memcpy(rcvbuf, rcvbuf+4, (size_t) 4);
  1235. rcvptr -= 4;
  1236. continue;
  1237. }
  1238. l = oncore_messages[m].len;
  1239. #if 0
  1240. if (debug > 3)
  1241. printf("ONCORE[%d]: GOT: %c%c %d of %d entry %d\n", instance->unit, rcvbuf[2], rcvbuf[3], rcvptr, l, m);
  1242. #endif
  1243. /* Got the entire message ? */
  1244. if (rcvptr < l)
  1245. return;
  1246. /* are we at the end of message? should be <Cksum><CR><LF> */
  1247. if (rcvbuf[l-2] != '\r' || rcvbuf[l-1] != '\n') {
  1248. #ifdef DEBUG
  1249. if (debug)
  1250. printf("ONCORE[%d]: NO <CR><LF> at end of message\n", instance->unit);
  1251. #endif
  1252. } else { /* check the CheckSum */
  1253. if (oncore_checksum_ok(rcvbuf, l)) {
  1254. if (instance->shmem != NULL) {
  1255. instance->shmem[oncore_messages[m].shmem + 2]++;
  1256. memcpy(instance->shmem + oncore_messages[m].shmem + 3,
  1257. rcvbuf, (size_t) l);
  1258. }
  1259. oncore_msg_any(instance, rcvbuf, (size_t) (l-3), m);
  1260. if (oncore_messages[m].handler)
  1261. oncore_messages[m].handler(instance, rcvbuf, (size_t) (l-3));
  1262. }
  1263. #ifdef DEBUG
  1264. else if (debug) {
  1265. printf("ONCORE[%d]: Checksum mismatch!\n", instance->unit);
  1266. printf("ONCORE[%d]: @@%c%c ", instance->unit, rcvbuf[2], rcvbuf[3]);
  1267. for (i=4; i<l; i++)
  1268. printf("%03o ", rcvbuf[i]);
  1269. printf("\n");
  1270. }
  1271. #endif
  1272. }
  1273. if (l != rcvptr)
  1274. memcpy(rcvbuf, rcvbuf+l, (size_t) (rcvptr-l));
  1275. rcvptr -= l;
  1276. }
  1277. }
  1278. static void
  1279. oncore_get_timestamp(
  1280. struct instance *instance,
  1281. long dt1, /* tick offset THIS time step */
  1282. long dt2 /* tick offset NEXT time step */
  1283. )
  1284. {
  1285. int Rsm;
  1286. u_long j;
  1287. l_fp ts, ts_tmp;
  1288. double dmy;
  1289. #ifdef HAVE_STRUCT_TIMESPEC
  1290. struct timespec *tsp = 0;
  1291. #else
  1292. struct timeval *tsp = 0;
  1293. #endif
  1294. int current_mode;
  1295. u_long i;
  1296. pps_params_t current_params;
  1297. struct timespec timeout;
  1298. pps_info_t pps_i;
  1299. #if 1
  1300. /* If we are in SiteSurvey mode, then we are in 3D mode, and we fall thru.
  1301. * If we have Finished the SiteSurvey, then we fall thru for the 14/15
  1302. * times we get here in 0D mode (the 1/15 is in 3D for SHMEM).
  1303. * This gives good time, which gets better when the SS is done.
  1304. */
  1305. if ((instance->site_survey == ONCORE_SS_DONE) && (instance->mode != MODE_0D))
  1306. #else
  1307. /* old check, only fall thru for SS_DONE and 0D mode, 2h45m wait for ticks */
  1308. if ((instance->site_survey != ONCORE_SS_DONE) || (instance->mode != MODE_0D))
  1309. #endif
  1310. return;
  1311. /* Don't do anything without an almanac to define the GPS->UTC delta */
  1312. if (instance->rsm.bad_almanac)
  1313. return;
  1314. /* Once the Almanac is valid, the M12+T does not produce valid UTC
  1315. * immediately.
  1316. * Wait for UTC offset decode valid, then wait one message more
  1317. * so we are not off by 13 seconds after reset.
  1318. */
  1319. if (instance->count5) {
  1320. instance->count5--;
  1321. return;
  1322. }
  1323. j = instance->ev_serial;
  1324. timeout.tv_sec = 0;
  1325. timeout.tv_nsec = 0;
  1326. if (time_pps_fetch(instance->pps_h, PPS_TSFMT_TSPEC, &pps_i,
  1327. &timeout) < 0) {
  1328. printf("ONCORE: time_pps_fetch failed\n");
  1329. return;
  1330. }
  1331. if (instance->assert) {
  1332. tsp = &pps_i.assert_timestamp;
  1333. #ifdef DEBUG
  1334. if (debug > 2) {
  1335. i = (u_long) pps_i.assert_sequence;
  1336. # ifdef HAVE_STRUCT_TIMESPEC
  1337. printf("ONCORE[%d]: serial/j (%lu, %lu) %ld.%09ld\n",
  1338. instance->unit, i, j,
  1339. (long)tsp->tv_sec, (long)tsp->tv_nsec);
  1340. # else
  1341. printf("ONCORE[%d]: serial/j (%lu, %lu) %ld.%06ld\n",
  1342. instance->unit, i, j,
  1343. (long)tsp->tv_sec, (long)tsp->tv_usec);
  1344. # endif
  1345. }
  1346. #endif
  1347. if (pps_i.assert_sequence == j) {
  1348. printf("ONCORE: oncore_get_timestamp, error serial pps\n");
  1349. return;
  1350. }
  1351. instance->ev_serial = pps_i.assert_sequence;
  1352. } else {
  1353. tsp = &pps_i.clear_timestamp;
  1354. #ifdef DEBUG
  1355. if (debug > 2) {
  1356. i = (u_long) pps_i.clear_sequence;
  1357. # ifdef HAVE_STRUCT_TIMESPEC
  1358. printf("ONCORE[%d]: serial/j (%lu, %lu) %ld.%09ld\n",
  1359. instance->unit, i, j, (long)tsp->tv_sec, (long)tsp->tv_nsec);
  1360. # else
  1361. printf("ONCORE[%d]: serial/j (%lu, %lu) %ld.%06ld\n",
  1362. instance->unit, i, j, (long)tsp->tv_sec, (long)tsp->tv_usec);
  1363. # endif
  1364. }
  1365. #endif
  1366. if (pps_i.clear_sequence == j) {
  1367. printf("ONCORE: oncore_get_timestamp, error serial pps\n");
  1368. return;
  1369. }
  1370. instance->ev_serial = pps_i.clear_sequence;
  1371. }
  1372. /* convert timespec -> ntp l_fp */
  1373. dmy = tsp->tv_nsec;
  1374. dmy /= 1e9;
  1375. ts.l_uf = dmy * 4294967296.0;
  1376. ts.l_ui = tsp->tv_sec;
  1377. #if 0
  1378. alternate code for previous 4 lines is
  1379. dmy = 1.0e-9*tsp->tv_nsec; /* fractional part */
  1380. DTOLFP(dmy, &ts);
  1381. dmy = tsp->tv_sec; /* integer part */
  1382. DTOLFP(dmy, &ts_tmp);
  1383. L_ADD(&ts, &ts_tmp);
  1384. or more simply
  1385. dmy = 1.0e-9*tsp->tv_nsec; /* fractional part */
  1386. DTOLFP(dmy, &ts);
  1387. ts.l_ui = tsp->tv_sec;
  1388. #endif /* 0 */
  1389. /* now have timestamp in ts */
  1390. /* add in saw_tooth and offset, these will be ZERO if no TRAIM */
  1391. /* they will be IGNORED if the PPSAPI cant do PPS_OFFSET/ASSERT/CLEAR */
  1392. /* we just try to add them in and dont test for that here */
  1393. /* saw_tooth not really necessary if using TIMEVAL */
  1394. /* since its only precise to us, but do it anyway. */
  1395. /* offset in ns, and is positive (late), we subtract */
  1396. /* to put the PPS time transition back where it belongs */
  1397. /* must hand the offset for the NEXT sec off to the Kernel to do */
  1398. /* the addition, so that the Kernel PLL sees the offset too */
  1399. if (instance->assert)
  1400. instance->pps_p.assert_offset.tv_nsec = -dt2;
  1401. else
  1402. instance->pps_p.clear_offset.tv_nsec = -dt2;
  1403. /* The following code is necessary, and not just a time_pps_setparams,
  1404. * using the saved instance->pps_p, since some other process on the
  1405. * machine may have diddled with the mode bits (say adding something
  1406. * that it needs). We take what is there and ADD what we need.
  1407. * [[ The results from the time_pps_getcap is unlikely to change so
  1408. * we could probably just save it, but I choose to do the call ]]
  1409. * Unfortunately, there is only ONE set of mode bits in the kernel per
  1410. * interface, and not one set for each open handle.
  1411. *
  1412. * There is still a race condition here where we might mess up someone
  1413. * elses mode, but if he is being careful too, he should survive.
  1414. */
  1415. if (time_pps_getcap(instance->pps_h, &current_mode) < 0) {
  1416. msyslog(LOG_ERR, "time_pps_getcap failed: %m");
  1417. return;
  1418. }
  1419. if (time_pps_getparams(instance->pps_h, &current_params) < 0) {
  1420. msyslog(LOG_ERR, "time_pps_getparams failed: %m");
  1421. return;
  1422. }
  1423. /* or current and mine */
  1424. current_params.mode |= instance->pps_p.mode;
  1425. /* but only set whats legal */
  1426. current_params.mode &= current_mode;
  1427. current_params.assert_offset.tv_sec = 0;
  1428. current_params.assert_offset.tv_nsec = -dt2;
  1429. current_params.clear_offset.tv_sec = 0;
  1430. current_params.clear_offset.tv_nsec = -dt2;
  1431. if (time_pps_setparams(instance->pps_h, &current_params))
  1432. record_clock_stats(&(instance->peer->srcadr), "ONCORE: Error doing time_pps_setparams");
  1433. /* have time from UNIX origin, convert to NTP origin. */
  1434. ts.l_ui += JAN_1970;
  1435. instance->pp->lastrec = ts;
  1436. /* print out information about this timestamp (long line) */
  1437. ts_tmp = ts;
  1438. ts_tmp.l_ui = 0; /* zero integer part */
  1439. LFPTOD(&ts_tmp, dmy); /* convert fractional part to a double */
  1440. j = 1.0e9*dmy; /* then to integer ns */
  1441. Rsm = 0;
  1442. if (instance->chan == 6)
  1443. Rsm = instance->BEHa[64];
  1444. else if (instance->chan == 8)
  1445. Rsm = instance->BEHa[72];
  1446. else if (instance->chan == 12)
  1447. Rsm = ((instance->BEHa[129]<<8) | instance->BEHa[130]);
  1448. if (instance->chan == 6 || instance->chan == 8) {
  1449. char f1[5], f2[5], f3[5], f4[5];
  1450. if (instance->traim) {
  1451. sprintf(f1, "%d", instance->BEHn[21]);
  1452. sprintf(f2, "%d", instance->BEHn[22]);
  1453. sprintf(f3, "%2d", instance->BEHn[23]*256+instance->BEHn[24]);
  1454. sprintf(f4, "%3d", (s_char) instance->BEHn[25]);
  1455. } else {
  1456. strcpy(f1, "x");
  1457. strcpy(f2, "x");
  1458. strcpy(f3, "xx");
  1459. strcpy(f4, "xxx");
  1460. }
  1461. sprintf(instance->pp->a_lastcode, /* MAX length 128, currently at 121 */
  1462. "%u.%09lu %d %d %2d %2d %2d %2ld rstat %02x dop %4.1f nsat %2d,%d traim %d,%s,%s sigma %s neg-sawtooth %s sat %d%d%d%d%d%d%d%d",
  1463. ts.l_ui, j,
  1464. instance->pp->year, instance->pp->day,
  1465. instance->pp->hour, instance->pp->minute, instance->pp->second,
  1466. (long) tsp->tv_sec % 60,
  1467. Rsm, 0.1*(256*instance->BEHa[35]+instance->BEHa[36]),
  1468. /*rsat dop */
  1469. instance->BEHa[38], instance->BEHa[39], instance->traim, f1, f2,
  1470. /* nsat visible, nsat tracked, traim,traim,traim */
  1471. f3, f4,
  1472. /* sigma neg-sawtooth */
  1473. /*sat*/ instance->BEHa[41], instance->BEHa[45], instance->BEHa[49], instance->BEHa[53],
  1474. instance->BEHa[57], instance->BEHa[61], instance->BEHa[65], instance->BEHa[69]
  1475. ); /* will be 0 for 6 chan */
  1476. } else if (instance->chan == 12) {
  1477. char f1[5], f2[5], f3[5], f4[5];
  1478. if (instance->traim) {
  1479. sprintf(f1, "%d", instance->BEHn[6]);
  1480. sprintf(f2, "%d", instance->BEHn[7]);
  1481. sprintf(f3, "%d", instance->BEHn[12]*256+instance->BEHn[13]);
  1482. sprintf(f4, "%3d", (s_char) instance->BEHn[14]);
  1483. } else {
  1484. strcpy(f1, "x");
  1485. strcpy(f2, "x");
  1486. strcpy(f3, "x");
  1487. strcpy(f4, "xxx");
  1488. }
  1489. sprintf(instance->pp->a_lastcode,
  1490. "%u.%09lu %d %d %2d %2d %2d %2ld rstat %02x dop %4.1f nsat %2d,%d traim %d,%s,%s sigma %s neg-sawtooth %s sat %d%d%d%d%d%d%d%d%d%d%d%d",
  1491. ts.l_ui, j,
  1492. instance->pp->year, instance->pp->day,
  1493. instance->pp->hour, instance->pp->minute, instance->pp->second,
  1494. (long) tsp->tv_sec % 60,
  1495. Rsm, 0.1*(256*instance->BEHa[53]+instance->BEHa[54]),
  1496. /*rsat dop */
  1497. instance->BEHa[55], instance->BEHa[56], instance->traim, f1, f2,
  1498. /* nsat visible, nsat tracked traim,traim,traim */
  1499. f3, f4,
  1500. /* sigma neg-sawtooth */
  1501. /*sat*/ instance->BEHa[58], instance->BEHa[64], instance->BEHa[70], instance->BEHa[76],
  1502. instance->BEHa[82], instance->BEHa[88], instance->BEHa[94], instance->BEHa[100],
  1503. instance->BEHa[106], instance->BEHa[112], instance->BEHa[118], instance->BEHa[124]
  1504. );
  1505. }
  1506. #ifdef DEBUG
  1507. if (debug > 2) {
  1508. int n;
  1509. n = strlen(instance->pp->a_lastcode);
  1510. printf("ONCORE[%d]: len = %d %s\n", instance->unit, n, instance->pp->a_lastcode);
  1511. }
  1512. #endif
  1513. /* and some things I dont understand (magic ntp things) */
  1514. if (!refclock_process(instance->pp)) {
  1515. refclock_report(instance->peer, CEVNT_BADTIME);
  1516. return;
  1517. }
  1518. record_clock_stats(&(instance->peer->srcadr), instance->pp->a_lastcode);
  1519. instance->pollcnt = 2;
  1520. if (instance->polled) {
  1521. instance->polled = 0;
  1522. /* instance->pp->dispersion = instance->pp->skew = 0; */
  1523. instance->pp->lastref = instance->pp->lastrec;
  1524. refclock_receive(instance->peer);
  1525. }
  1526. }
  1527. /*************** oncore_msg_XX routines start here *******************/
  1528. /*
  1529. * print Oncore response message.
  1530. */
  1531. static void
  1532. oncore_msg_any(
  1533. struct instance *instance,
  1534. u_char *buf,
  1535. size_t len,
  1536. int idx
  1537. )
  1538. {
  1539. int i;
  1540. const char *fmt = oncore_messages[idx].fmt;
  1541. const char *p;
  1542. #ifdef HAVE_GETCLOCK
  1543. struct timespec ts;
  1544. #endif
  1545. struct timeval tv;
  1546. #ifdef DEBUG
  1547. if (debug > 3) {
  1548. # ifdef HAVE_GETCLOCK
  1549. (void) getclock(TIMEOFDAY, &ts);
  1550. tv.tv_sec = ts.tv_sec;
  1551. tv.tv_usec = ts.tv_nsec / 1000;
  1552. # else
  1553. GETTIMEOFDAY(&tv, 0);
  1554. # endif
  1555. printf("ONCORE[%d]: %ld.%06ld\n", instance->unit, (long) tv.tv_sec, (long) tv.tv_usec);
  1556. if (!*fmt) {
  1557. printf(">>@@%c%c ", buf[2], buf[3]);
  1558. for(i=2; i < len && i < 2400 ; i++)
  1559. printf("%02x", buf[i]);
  1560. printf("\n");
  1561. return;
  1562. } else {
  1563. printf("##");
  1564. for (p = fmt; *p; p++) {
  1565. putchar(*p);
  1566. putchar('_');
  1567. }
  1568. printf("\n%c%c", buf[2], buf[3]);
  1569. i = 4;
  1570. for (p = fmt; *p; p++) {
  1571. printf("%02x", buf[i++]);
  1572. }
  1573. printf("\n");
  1574. }
  1575. }
  1576. #endif
  1577. }
  1578. /* Latitude, Longitude, Height */
  1579. static void
  1580. oncore_msg_Adef(
  1581. struct instance *instance,
  1582. u_char *buf,
  1583. size_t len
  1584. )
  1585. {
  1586. }
  1587. /* Mask Angle */
  1588. static void
  1589. oncore_msg_Ag(
  1590. struct instance *instance,
  1591. u_char *buf,
  1592. size_t len
  1593. )
  1594. { char Msg[160], *cp;
  1595. cp = "set to";
  1596. if (instance->o_state == ONCORE_RUN)
  1597. cp = "is";
  1598. instance->Ag = buf[4];
  1599. sprintf(Msg, "Satellite mask angle %s %d degrees", cp, (int) instance->Ag);
  1600. record_clock_stats(&(instance->peer->srcadr), Msg);
  1601. }
  1602. /*
  1603. * get Position hold position
  1604. */
  1605. static void
  1606. oncore_msg_As(
  1607. struct instance *instance,
  1608. u_char *buf,
  1609. size_t len
  1610. )
  1611. {
  1612. instance->ss_lat = buf_w32(&buf[4]);
  1613. instance->ss_long = buf_w32(&buf[8]);
  1614. instance->ss_ht = buf_w32(&buf[12]);
  1615. /* Print out Position */
  1616. oncore_print_posn(instance);
  1617. }
  1618. /*
  1619. * Try to use Oncore UT+ Auto Survey Feature
  1620. * If its not there (VP), set flag to do it ourselves.
  1621. */
  1622. static void
  1623. oncore_msg_At(
  1624. struct instance *instance,
  1625. u_char *buf,
  1626. size_t len
  1627. )
  1628. {
  1629. char *cp;
  1630. instance->saw_At = 1;
  1631. if (instance->site_survey == ONCORE_SS_TESTING) {
  1632. if (buf[4] == 2) {
  1633. record_clock_stats(&(instance->peer->srcadr),
  1634. "Initiating hardware 3D site survey");
  1635. cp = "SSstate = ONCORE_SS_HW";
  1636. record_clock_stats(&(instance->peer->srcadr), cp);
  1637. instance->site_survey = ONCORE_SS_HW;
  1638. }
  1639. }
  1640. }
  1641. /*
  1642. * get PPS Offset
  1643. * Nb. @@Ay is not supported for early UT (no plus) model
  1644. */
  1645. static void
  1646. oncore_msg_Ay(
  1647. struct instance *instance,
  1648. u_char *buf,
  1649. size_t len
  1650. )
  1651. {
  1652. char Msg[120];
  1653. if (instance->saw_Ay)
  1654. return;
  1655. instance->saw_Ay = 1;
  1656. instance->offset = buf_w32(&buf[4]);
  1657. sprintf(Msg, "PPS Offset is set to %ld ns", instance->offset);
  1658. record_clock_stats(&(instance->peer->srcadr), Msg);
  1659. }
  1660. /*
  1661. * get Cable Delay
  1662. */
  1663. static void
  1664. oncore_msg_Az(
  1665. struct instance *instance,
  1666. u_char *buf,
  1667. size_t len
  1668. )
  1669. {
  1670. char Msg[120];
  1671. if (instance->saw_Az)
  1672. return;
  1673. instance->saw_Az = 1;
  1674. instance->delay = buf_w32(&buf[4]);
  1675. sprintf(Msg, "Cable delay is set to %ld ns", instance->delay);
  1676. record_clock_stats(&(instance->peer->srcadr), Msg);
  1677. }
  1678. /* Ba, Ea and Ha come here, these contain Position */
  1679. static void
  1680. oncore_msg_BaEaHa(
  1681. struct instance *instance,
  1682. u_char *buf,
  1683. size_t len
  1684. )
  1685. {
  1686. const char *cp;
  1687. char Msg[160];
  1688. int mode;
  1689. /* OK, we are close to the RUN state now.
  1690. * But we have a few more items to initialize first.
  1691. *
  1692. * At the beginning of this routine there are several 'timers'.
  1693. * We enter this routine 1/sec, and since the upper levels of NTP have usurped
  1694. * the use of timers, we use the 1/sec entry to do things that
  1695. * we would normally do with timers...
  1696. */
  1697. if (instance->o_state == ONCORE_CHECK_CHAN) { /* here while checking for the # chan */
  1698. if (buf[2] == 'B') { /* 6chan */
  1699. if (instance->chan_ck < 6) instance->chan_ck = 6;
  1700. } else if (buf[2] == 'E') { /* 8chan */
  1701. if (instance->chan_ck < 8) instance->chan_ck = 8;
  1702. } else if (buf[2] == 'H') { /* 12chan */
  1703. if (instance->chan_ck < 12) instance->chan_ck = 12;
  1704. }
  1705. if (instance->count3++ < 5)
  1706. return;
  1707. instance->count3 = 0;
  1708. if (instance->chan_in != -1) /* set in Input */
  1709. instance->chan = instance->chan_in;
  1710. else /* set from test */
  1711. instance->chan = instance->chan_ck;
  1712. sprintf(Msg, "Input says chan = %d", instance->chan_in);
  1713. record_clock_stats(&(instance->peer->srcadr), Msg);
  1714. sprintf(Msg, "Model # says chan = %d", instance->chan_id);
  1715. record_clock_stats(&(instance->peer->srcadr), Msg);
  1716. sprintf(Msg, "Testing says chan = %d", instance->chan_ck);
  1717. record_clock_stats(&(instance->peer->srcadr), Msg);
  1718. sprintf(Msg, "Using chan = %d", instance->chan);
  1719. record_clock_stats(&(instance->peer->srcadr), Msg);
  1720. instance->o_state = ONCORE_HAVE_CHAN;
  1721. cp = "state = ONCORE_HAVE_CHAN";
  1722. record_clock_stats(&(instance->peer->srcadr), cp);
  1723. instance->timeout = 4;
  1724. oncore_sendmsg(instance->ttyfd, oncore_cmd_Cj, sizeof(oncore_cmd_Cj));
  1725. return;
  1726. }
  1727. if (instance->o_state != ONCORE_ALMANAC && instance->o_state != ONCORE_RUN)
  1728. return;
  1729. /* PAUSE 5sec - make sure results are stable, before using position */
  1730. if (instance->count) {
  1731. if (instance->count++ < 5)
  1732. return;
  1733. instance->count = 0;
  1734. }
  1735. memcpy(instance->BEHa, buf, (size_t) (len+3)); /* Ba, Ea or Ha */
  1736. /* check the antenna (did it get unplugged) and almanac (is it ready) for changes. */
  1737. oncore_check_almanac(instance);
  1738. oncore_check_antenna(instance);
  1739. /* If we are in Almanac mode, waiting for Almanac, we can't do anything till we have it */
  1740. /* When we have an almanac, we will start the Bn/En/@@Hn messages */
  1741. if (instance->o_state == ONCORE_ALMANAC)
  1742. if (oncore_wait_almanac(instance))
  1743. return;
  1744. /* do some things once when we get this far in BaEaHa */
  1745. if (instance->once) {
  1746. instance->once = 0;
  1747. instance->count2 = 1;
  1748. /* Have we seen an @@At (position hold) command response */
  1749. /* if not, message out */
  1750. if (instance->chan != 12 && !instance->saw_At) {
  1751. cp = "Not Good, no @@At command (no Position Hold), must be a GT/GT+";
  1752. record_clock_stats(&(instance->peer->srcadr), cp);
  1753. oncore_sendmsg(instance->ttyfd, oncore_cmd_Av1, sizeof(oncore_cmd_Av1));
  1754. }
  1755. /* have an Almanac, can start the SiteSurvey
  1756. * (actually only need to get past the almanac_load where we diddle with At
  1757. * command,- we can't change it after we start the HW_SS below
  1758. */
  1759. mode = instance->init_type;
  1760. switch (mode) {
  1761. case 0: /* NO initialization, don't change anything */
  1762. case 1: /* Use given Position */
  1763. case 3:
  1764. instance->site_survey = ONCORE_SS_DONE;
  1765. cp = "SSstate = ONCORE_SS_DONE";
  1766. record_clock_stats(&(instance->peer->srcadr), cp);
  1767. break;
  1768. case 2:
  1769. case 4: /* Site Survey */
  1770. cp = "SSstate = ONCORE_SS_TESTING";
  1771. record_clock_stats(&(instance->peer->srcadr), cp);
  1772. instance->site_survey = ONCORE_SS_TESTING;
  1773. instance->count1 = 1;
  1774. if (instance->chan == 12)
  1775. oncore_sendmsg(instance->ttyfd, oncore_cmd_Gd3, sizeof(oncore_cmd_Gd3)); /* M12+T */
  1776. else
  1777. oncore_sendmsg(instance->ttyfd, oncore_cmd_At2, sizeof(oncore_cmd_At2)); /* not GT, arg not VP */
  1778. break;
  1779. }
  1780. /* Read back PPS Offset for Output */
  1781. /* Nb. This will fail silently for early UT (no plus) and M12 models */
  1782. oncore_sendmsg(instance->ttyfd, oncore_cmd_Ayx, sizeof(oncore_cmd_Ayx));
  1783. /* Read back Cable Delay for Output */
  1784. oncore_sendmsg(instance->ttyfd, oncore_cmd_Azx, sizeof(oncore_cmd_Azx));
  1785. /* Read back Satellite Mask Angle for Output */
  1786. oncore_sendmsg(instance->ttyfd, oncore_cmd_Agx, sizeof(oncore_cmd_Agx));
  1787. }
  1788. /* Unfortunately, the Gd3 command returns '3' for the M12 v1.3 firmware where it is
  1789. * out-of-range and it should return 0-2. (v1.3 can't do a HW Site Survey)
  1790. * We must do the Gd3, and then wait a cycle or two for things to settle,
  1791. * then check Ha[130]&0x10 to see if a SS is in progress.
  1792. * We will set SW if HW has not been set after an appropriate delay.
  1793. */
  1794. if (instance->site_survey == ONCORE_SS_TESTING) {
  1795. if (instance->chan == 12) {
  1796. if (instance->count1) {
  1797. if (instance->count1++ > 5 || instance->BEHa[130]&0x10) {
  1798. instance->count1 = 0;
  1799. if (instance->BEHa[130]&0x10) {
  1800. record_clock_stats(&(instance->peer->srcadr),
  1801. "Initiating hardware 3D site survey");
  1802. record_clock_stats(&(instance->peer->srcadr), "SSstate = ONCORE_SS_HW");
  1803. instance->site_survey = ONCORE_SS_HW;
  1804. } else {
  1805. record_clock_stats(&(instance->peer->srcadr), "SSstate = ONCORE_SS_SW");
  1806. instance->site_survey = ONCORE_SS_SW;
  1807. }
  1808. }
  1809. }
  1810. } else {
  1811. if (instance->count1) {
  1812. if (instance->count1++ > 5) {
  1813. instance->count1 = 0;
  1814. /*
  1815. * For instance->site_survey to still be ONCORE_SS_TESTING, then after a 5sec
  1816. * wait after the @@At2/@@Gd3 command we have not changed the state to
  1817. * ONCORE_SS_HW. If the Hardware is capable of doing a Site Survey, then
  1818. * the variable would have been changed by now.
  1819. * There are three possibilities:
  1820. * 6/8chan
  1821. * (a) We did not get a response to the @@At0 or @@At2 commands,
  1822. * and it must be a GT/GT+/SL with no position hold mode.
  1823. * We will have to do it ourselves.
  1824. * (b) We saw the @@At0, @@At2 commands, but @@At2 failed,
  1825. * must be a VP or older UT which doesn't have Site Survey mode.
  1826. * We will have to do it ourselves.
  1827. * 12chan
  1828. * (c) We saw the @@Gd command, and saw H[13]*0x10
  1829. * We will have to do it ourselves (done above)
  1830. */
  1831. sprintf(Msg, "Initiating software 3D site survey (%d samples)",
  1832. POS_HOLD_AVERAGE);
  1833. record_clock_stats(&(instance->peer->srcadr), Msg);
  1834. record_clock_stats(&(instance->peer->srcadr), "SSstate = ONCORE_SS_SW");
  1835. instance->site_survey = ONCORE_SS_SW;
  1836. instance->ss_lat = instance->ss_long = instance->ss_ht = 0;
  1837. if (instance->chan == 12)
  1838. oncore_sendmsg(instance->ttyfd, oncore_cmd_Gd0, sizeof(oncore_cmd_Gd0)); /* disable */
  1839. else {
  1840. oncore_sendmsg(instance->ttyfd, oncore_cmd_At0, sizeof(oncore_cmd_At0)); /* disable */
  1841. oncore_sendmsg(instance->ttyfd, oncore_cmd_Av0, sizeof(oncore_cmd_Av0)); /* disable */
  1842. }
  1843. }
  1844. }
  1845. }
  1846. }
  1847. /* check the mode we are in 0/2/3D */
  1848. if (instance->chan == 6) {
  1849. if (instance->BEHa[64]&0x8)
  1850. instance->mode = MODE_0D;
  1851. else if (instance->BEHa[64]&0x10)
  1852. instance->mode = MODE_2D;
  1853. else if (instance->BEHa[64]&0x20)
  1854. instance->mode = MODE_3D;
  1855. } else if (instance->chan == 8) {
  1856. if (instance->BEHa[72]&0x8)
  1857. instance->mode = MODE_0D;
  1858. else if (instance->BEHa[72]&0x10)
  1859. instance->mode = MODE_2D;
  1860. else if (instance->BEHa[72]&0x20)
  1861. instance->mode = MODE_3D;
  1862. } else if (instance->chan == 12) {
  1863. int bits;
  1864. bits = (instance->BEHa[129]>>5) & 0x7; /* actually Ha */
  1865. if (bits == 0x4)
  1866. instance->mode = MODE_0D;
  1867. else if (bits == 0x6)
  1868. instance->mode = MODE_2D;
  1869. else if (bits == 0x7)
  1870. instance->mode = MODE_3D;
  1871. }
  1872. /* copy the record to the (extra) location in SHMEM */
  1873. if (instance->shmem) {
  1874. int i;
  1875. u_char *smp; /* pointer to start of shared mem for Ba/Ea/Ha */
  1876. switch(instance->chan) {
  1877. case 6: smp = &instance->shmem[instance->shmem_Ba]; break;
  1878. case 8: smp = &instance->shmem[instance->shmem_Ea]; break;
  1879. case 12: smp = &instance->shmem[instance->shmem_Ha]; break;
  1880. default: smp = (u_char *) NULL; break;
  1881. }
  1882. switch (instance->mode) {
  1883. case MODE_0D: i = 1; break; /* 0D, Position Hold */
  1884. case MODE_2D: i = 2; break; /* 2D, Altitude Hold */
  1885. case MODE_3D: i = 3; break; /* 3D fix */
  1886. default: i = 0; break;
  1887. }
  1888. if (i && smp != NULL) {
  1889. i *= (len+6);
  1890. smp[i + 2]++;
  1891. memcpy(&smp[i+3], buf, (size_t) (len+3));
  1892. }
  1893. }
  1894. /*
  1895. * check if traim timer active
  1896. * if it hasn't been cleared, then @@Bn/@@En/@@Hn did not respond
  1897. */
  1898. if (instance->traim_delay) {
  1899. if (instance->traim_delay++ > 5) {
  1900. instance->traim = 0;
  1901. instance->traim_delay = 0;
  1902. cp = "ONCORE: Did not detect TRAIM response, TRAIM = OFF";
  1903. record_clock_stats(&(instance->peer->srcadr), cp);
  1904. oncore_set_traim(instance);
  1905. } else
  1906. return;
  1907. }
  1908. /* by now should have a @@Ba/@@Ea/@@Ha with good data in it */
  1909. if (!instance->have_dH && !instance->traim_delay)
  1910. oncore_compute_dH(instance);
  1911. /*
  1912. * must be ONCORE_RUN if we are here.
  1913. * Have # chan and TRAIM by now.
  1914. */
  1915. instance->pp->year = buf[6]*256+buf[7];
  1916. instance->pp->day = ymd2yd(buf[6]*256+buf[7], buf[4], buf[5]);
  1917. instance->pp->hour = buf[8];
  1918. instance->pp->minute = buf[9];
  1919. instance->pp->second = buf[10];
  1920. /*
  1921. * Are we doing a Hardware or Software Site Survey?
  1922. */
  1923. if (instance->site_survey == ONCORE_SS_HW || instance->site_survey == ONCORE_SS_SW)
  1924. oncore_ss(instance);
  1925. /* see if we ever saw a response from the @@Ayx above */
  1926. if (instance->count2) {
  1927. if (instance->count2++ > 5) { /* this delay to check on @@Ay command */
  1928. instance->count2 = 0;
  1929. /* Have we seen an Ay (1PPS time offset) command response */
  1930. /* if not, and non-zero offset, zero the offset, and send message */
  1931. if (!instance->saw_Ay && instance->offset) {
  1932. cp = "No @@Ay command, PPS OFFSET ignored";
  1933. record_clock_stats(&(instance->peer->srcadr), cp);
  1934. instance->offset = 0;
  1935. }
  1936. }
  1937. }
  1938. /*
  1939. * Check the leap second status once per day.
  1940. */
  1941. oncore_check_leap_sec(instance);
  1942. /*
  1943. * if SHMEM active, every 15s, steal one 'tick' to get 2D or 3D posn.
  1944. */
  1945. if (instance->shmem && !instance->shmem_bad_Ea && instance->shmem_Posn && (instance->site_survey == ONCORE_SS_DONE))
  1946. oncore_shmem_get_3D(instance);
  1947. if (!instance->traim) /* NO traim, no BnEnHn, go get tick */
  1948. oncore_get_timestamp(instance, instance->offset, instance->offset);
  1949. }
  1950. /* Almanac Status */
  1951. static void
  1952. oncore_msg_Bd(
  1953. struct instance *instance,
  1954. u_char *buf,
  1955. size_t len
  1956. )
  1957. {
  1958. char Msg[160];
  1959. sprintf(Msg, "Bd: Almanac %s, week = %d, t = %d, %d SVs: %x",
  1960. ((buf[4]) ? "LOADED" : "(NONE)"), buf[5], buf[6], buf[7], w32(&buf[8]) );
  1961. record_clock_stats(&(instance->peer->srcadr), Msg);
  1962. }
  1963. /* get leap-second warning message */
  1964. /*
  1965. * @@Bj does NOT behave as documented in current Oncore firmware.
  1966. * It turns on the LEAP indicator when the data is set, and does not,
  1967. * as documented, wait until the beginning of the month when the
  1968. * leap second will occur.
  1969. * Since this firmware bug will never be fixed in all the outstanding Oncore receivers
  1970. * @@Bj is only called in June/December.
  1971. */
  1972. static void
  1973. oncore_msg_Bj(
  1974. struct instance *instance,
  1975. u_char *buf,
  1976. size_t len
  1977. )
  1978. {
  1979. const char *cp;
  1980. switch(buf[4]) {
  1981. case 1:
  1982. instance->pp->leap = LEAP_ADDSECOND;
  1983. cp = "Set pp.leap to LEAP_ADDSECOND";
  1984. break;
  1985. case 2:
  1986. instance->pp->leap = LEAP_DELSECOND;
  1987. cp = "Set pp.leap to LEAP_DELSECOND";
  1988. break;
  1989. case 0:
  1990. default:
  1991. instance->pp->leap = LEAP_NOWARNING;
  1992. cp = "Set pp.leap to LEAP_NOWARNING";
  1993. break;
  1994. }
  1995. record_clock_stats(&(instance->peer->srcadr), cp);
  1996. }
  1997. static void
  1998. oncore_msg_BnEnHn(
  1999. struct instance *instance,
  2000. u_char *buf,
  2001. size_t len
  2002. )
  2003. {
  2004. long dt1, dt2;
  2005. char *cp;
  2006. if (instance->o_state != ONCORE_RUN)
  2007. return;
  2008. if (instance->traim_delay) { /* flag that @@Bn/@@En/Hn returned */
  2009. instance->traim_ck = 1;
  2010. instance->traim_delay = 0;
  2011. cp = "ONCORE: Detected TRAIM, TRAIM = ON";
  2012. record_clock_stats(&(instance->peer->srcadr), cp);
  2013. oncore_set_traim(instance);
  2014. }
  2015. memcpy(instance->BEHn, buf, (size_t) len); /* Bn or En or Hn */
  2016. if (!instance->traim) /* BnEnHn will be turned off in any case */
  2017. return;
  2018. /* If Time RAIM doesn't like it, don't trust it */
  2019. if (buf[2] == 'H') {
  2020. if (instance->BEHn[6]) /* bad TRAIM */
  2021. return;
  2022. dt1 = instance->saw_tooth + instance->offset; /* dt this time step */
  2023. instance->saw_tooth = (s_char) instance->BEHn[14]; /* update for next time Hn[14] */
  2024. dt2 = instance->saw_tooth + instance->offset; /* dt next time step */
  2025. } else {
  2026. if (instance->BEHn[21]) /* bad TRAIM */
  2027. return;
  2028. dt1 = instance->saw_tooth + instance->offset; /* dt this time step */
  2029. instance->saw_tooth = (s_char) instance->BEHn[25]; /* update for next time Bn[25], En[25] */
  2030. dt2 = instance->saw_tooth + instance->offset; /* dt next time step */
  2031. }
  2032. oncore_get_timestamp(instance, dt1, dt2);
  2033. }
  2034. /* Here for @@Ca, @@Fa and @@Ia messages */
  2035. /* These are Self test Commands for 6, 8, and 12 chan receivers.
  2036. * There are good reasons NOT to do a @@Ca, @@Fa or @@Ia command with the ONCORE.
  2037. * It was found that under some circumstances the following
  2038. * command would fail if issued immediately after the return from the
  2039. * @@Fa, but a 2sec delay seemed to fix things. Since simply calling
  2040. * sleep(2) is wasteful, and may cause trouble for some OS's, repeating
  2041. * itimer, we set a flag, and test it at the next POLL. If it hasn't
  2042. * been cleared, we reissue the @@Cj that is issued below.
  2043. * Note that we do a @@Cj at the beginning, and again here.
  2044. * The first is to get the info, the 2nd is just used as a safe command
  2045. * after the @@Fa for all Oncores (and it was in this posn in the
  2046. * original code).
  2047. */
  2048. static void
  2049. oncore_msg_CaFaIa(
  2050. struct instance *instance,
  2051. u_char *buf,
  2052. size_t len
  2053. )
  2054. {
  2055. char *cp;
  2056. int i;
  2057. if (instance->o_state == ONCORE_TEST_SENT) {
  2058. enum antenna_state antenna;
  2059. instance->timeout = 0;
  2060. #ifdef DEBUG
  2061. if (debug > 2) {
  2062. if (buf[2] == 'I')
  2063. printf("ONCORE[%d]: >>@@%ca %x %x %x\n", instance->unit, buf[2], buf[4], buf[5], buf[6]);
  2064. else
  2065. printf("ONCORE[%d]: >>@@%ca %x %x\n", instance->unit, buf[2], buf[4], buf[5]);
  2066. }
  2067. #endif
  2068. antenna = (buf[4] & 0xc0) >> 6;
  2069. buf[4] &= ~0xc0;
  2070. i = buf[4] || buf[5];
  2071. if (buf[2] == 'I') i = i || buf[6];
  2072. if (i) {
  2073. if (buf[2] == 'I') {
  2074. msyslog(LOG_ERR, "ONCORE[%d]: self test failed: result %02x %02x %02x",
  2075. instance->unit, buf[4], buf[5], buf[6]);
  2076. } else {
  2077. msyslog(LOG_ERR, "ONCORE[%d]: self test failed: result %02x %02x",
  2078. instance->unit, buf[4], buf[5]);
  2079. }
  2080. cp = "ONCORE: self test failed, shutting down driver";
  2081. record_clock_stats(&instance->peer->srcadr, cp);
  2082. refclock_report(instance->peer, CEVNT_FAULT);
  2083. oncore_shutdown(instance->unit, instance->peer);
  2084. return;
  2085. }
  2086. /* report the current antenna state */
  2087. oncore_antenna_report(instance, antenna);
  2088. instance->o_state = ONCORE_INIT;
  2089. cp = "state = ONCORE_INIT";
  2090. record_clock_stats(&(instance->peer->srcadr), cp);
  2091. instance->timeout = 4;
  2092. oncore_sendmsg(instance->ttyfd, oncore_cmd_Cj, sizeof(oncore_cmd_Cj));
  2093. }
  2094. }
  2095. /*
  2096. * Demultiplex the almanac into shmem
  2097. */
  2098. static void
  2099. oncore_msg_Cb(
  2100. struct instance *instance,
  2101. u_char *buf,
  2102. size_t len
  2103. )
  2104. {
  2105. int i;
  2106. if (instance->shmem == NULL)
  2107. return;
  2108. if (buf[4] == 5 && buf[5] > 0 && buf[5] < 26)
  2109. i = buf[5];
  2110. else if (buf[4] == 4 && buf[5] <= 5)
  2111. i = buf[5] + 24;
  2112. else if (buf[4] == 4 && buf[5] <= 10)
  2113. i = buf[5] + 23;
  2114. else if (buf[4] == 4 && buf[5] == 25)
  2115. i = 34;
  2116. else {
  2117. char *cp;
  2118. cp = "Cb: Response is NO ALMANAC";
  2119. record_clock_stats(&(instance->peer->srcadr), cp);
  2120. return;
  2121. }
  2122. i *= 36;
  2123. instance->shmem[instance->shmem_Cb + i + 2]++;
  2124. memcpy(instance->shmem + instance->shmem_Cb + i + 3, buf, (size_t) (len + 3));
  2125. #if 1
  2126. {
  2127. char Msg[160];
  2128. sprintf(Msg, "See Cb [%d,%d]", buf[4], buf[5]);
  2129. record_clock_stats(&(instance->peer->srcadr), Msg);
  2130. }
  2131. #endif
  2132. }
  2133. /*
  2134. * Set to Factory Defaults (Reasonable for UT w/ no Battery Backup
  2135. * not so for VP (eeprom) or any unit with a battery
  2136. */
  2137. static void
  2138. oncore_msg_Cf(
  2139. struct instance *instance,
  2140. u_char *buf,
  2141. size_t len
  2142. )
  2143. {
  2144. const char *cp;
  2145. if (instance->o_state == ONCORE_RESET_SENT) {
  2146. oncore_sendmsg(instance->ttyfd, oncore_cmd_Cg, sizeof(oncore_cmd_Cg)); /* Return to Posn Fix mode */
  2147. /* Reset set VP to IDLE */
  2148. instance->o_state = ONCORE_TEST_SENT;
  2149. cp = "state = ONCORE_TEST_SENT";
  2150. record_clock_stats(&(instance->peer->srcadr), cp);
  2151. oncore_sendmsg(instance->ttyfd, oncore_cmd_Cj, sizeof(oncore_cmd_Cj));
  2152. }
  2153. }
  2154. /*
  2155. * This is the Grand Central Station for the Preliminary Initialization.
  2156. * Once done here we move on to oncore_msg_BaEaHa for final Initialization and Running.
  2157. *
  2158. * We do an @@Cj whenever we need a safe command for all Oncores.
  2159. * The @@Cj gets us back here where we can switch to the next phase of setup.
  2160. *
  2161. * o Once at the very beginning (in start) to get the Model number.
  2162. * This info is printed, but no longer used.
  2163. * o Again after we have determined the number of Channels in the receiver.
  2164. * o And once later after we have done a reset and test, (which may hang),
  2165. * as we are about to initialize the Oncore and start it running.
  2166. * o We have one routine below for each case.
  2167. */
  2168. static void
  2169. oncore_msg_Cj(
  2170. struct instance *instance,
  2171. u_char *buf,
  2172. size_t len
  2173. )
  2174. {
  2175. int mode;
  2176. char *cp;
  2177. memcpy(instance->Cj, buf, len);
  2178. instance->timeout = 0;
  2179. if (instance->o_state == ONCORE_CHECK_ID) {
  2180. oncore_msg_Cj_id(instance, buf, len);
  2181. oncore_chan_test(instance);
  2182. } else if (instance->o_state == ONCORE_HAVE_CHAN) {
  2183. mode = instance->init_type;
  2184. if (mode == 3 || mode == 4) { /* Cf will return here to check for TEST */
  2185. instance->o_state = ONCORE_RESET_SENT;
  2186. cp = "state = ONCORE_RESET_SENT";
  2187. record_clock_stats(&(instance->peer->srcadr), cp);
  2188. oncore_sendmsg(instance->ttyfd, oncore_cmd_Cf, sizeof(oncore_cmd_Cf));
  2189. } else {
  2190. instance->o_state = ONCORE_TEST_SENT;
  2191. cp = "state = ONCORE_TEST_SENT";
  2192. record_clock_stats(&(instance->peer->srcadr), cp);
  2193. }
  2194. }
  2195. if (instance->o_state == ONCORE_TEST_SENT) {
  2196. if (instance->chan == 6)
  2197. oncore_sendmsg(instance->ttyfd, oncore_cmd_Ca, sizeof(oncore_cmd_Ca));
  2198. else if (instance->chan == 8)
  2199. oncore_sendmsg(instance->ttyfd, oncore_cmd_Fa, sizeof(oncore_cmd_Fa));
  2200. else if (instance->chan == 12)
  2201. oncore_sendmsg(instance->ttyfd, oncore_cmd_Ia, sizeof(oncore_cmd_Ia));
  2202. } else if (instance->o_state == ONCORE_INIT)
  2203. oncore_msg_Cj_init(instance, buf, len);
  2204. }
  2205. /* The information on determining a Oncore 'Model', viz VP, UT, etc, from
  2206. * the Model Number comes from "Richard M. Hambly" <rick@cnssys.com>
  2207. * and from Motorola. Until recently Rick was the only source of
  2208. * this information as Motorola didn't give the information out.
  2209. *
  2210. * Determine the Type from the Model #, this determines #chan and if TRAIM is
  2211. * available.
  2212. *
  2213. * The Information from this routine is NO LONGER USED.
  2214. * The RESULTS are PRINTED, BUT NOT USED, and the routine COULD BE DELETED
  2215. */
  2216. static void
  2217. oncore_msg_Cj_id(
  2218. struct instance *instance,
  2219. u_char *buf,
  2220. size_t len
  2221. )
  2222. {
  2223. char *cp, *cp1, *cp2, Model[21], Msg[160];
  2224. /* Write Receiver ID message to clockstats file */
  2225. instance->Cj[294] = '\0';
  2226. for (cp=(char *)instance->Cj; cp< (char *) &instance->Cj[294]; ) {
  2227. cp1 = strchr(cp, '\r');
  2228. if (!cp1)
  2229. cp1 = (char *)&instance->Cj[294];
  2230. *cp1 = '\0';
  2231. record_clock_stats(&(instance->peer->srcadr), cp);
  2232. *cp1 = '\r';
  2233. cp = cp1+2;
  2234. }
  2235. /* next, the Firmware Version and Revision numbers */
  2236. instance->version = atoi((char *) &instance->Cj[83]);
  2237. instance->revision = atoi((char *) &instance->Cj[111]);
  2238. /* from model number decide which Oncore this is,
  2239. and then the number of channels */
  2240. for (cp= (char *) &instance->Cj[160]; *cp == ' '; cp++) /* start right after 'Model #' */
  2241. ;
  2242. cp1 = cp;
  2243. cp2 = Model;
  2244. for (; !isspace((int)*cp) && cp-cp1 < 20; cp++, cp2++)
  2245. *cp2 = *cp;
  2246. *cp2 = '\0';
  2247. cp = 0;
  2248. if (!strncmp(Model, "PVT6", (size_t) 4)) {
  2249. cp = "PVT6";
  2250. instance->model = ONCORE_PVT6;
  2251. } else if (Model[0] == 'A') {
  2252. cp = "Basic";
  2253. instance->model = ONCORE_BASIC;
  2254. } else if (Model[0] == 'B' || !strncmp(Model, "T8", (size_t) 2)) {
  2255. cp = "VP";
  2256. instance->model = ONCORE_VP;
  2257. } else if (Model[0] == 'P') {
  2258. cp = "M12";
  2259. instance->model = ONCORE_M12;
  2260. } else if (Model[0] == 'R' || Model[0] == 'D' || Model[0] == 'S') {
  2261. if (Model[5] == 'N') {
  2262. cp = "GT";
  2263. instance->model = ONCORE_GT;
  2264. } else if ((Model[1] == '3' || Model[1] == '4') && Model[5] == 'G') {
  2265. cp = "GT+";
  2266. instance->model = ONCORE_GTPLUS;
  2267. } else if ((Model[1] == '5' && Model[5] == 'U') || (Model[1] == '1' && Model[5] == 'A')) {
  2268. cp = "UT";
  2269. instance->model = ONCORE_UT;
  2270. } else if (Model[1] == '5' && Model[5] == 'G') {
  2271. cp = "UT+";
  2272. instance->model = ONCORE_UTPLUS;
  2273. } else if (Model[1] == '6' && Model[5] == 'G') {
  2274. cp = "SL";
  2275. instance->model = ONCORE_SL;
  2276. } else {
  2277. cp = "Unknown";
  2278. instance->model = ONCORE_UNKNOWN;
  2279. }
  2280. } else {
  2281. cp = "Unknown";
  2282. instance->model = ONCORE_UNKNOWN;
  2283. }
  2284. /* use MODEL to set CHAN and TRAIM and possibly zero SHMEM */
  2285. sprintf(Msg, "This looks like an Oncore %s with version %d.%d firmware.", cp, instance->version, instance->revision);
  2286. record_clock_stats(&(instance->peer->srcadr), Msg);
  2287. instance->chan_id = 8; /* default */
  2288. if (instance->model == ONCORE_BASIC || instance->model == ONCORE_PVT6)
  2289. instance->chan_id = 6;
  2290. else if (instance->model == ONCORE_VP || instance->model == ONCORE_UT || instance->model == ONCORE_UTPLUS)
  2291. instance->chan_id = 8;
  2292. else if (instance->model == ONCORE_M12)
  2293. instance->chan_id = 12;
  2294. instance->traim_id = 0; /* default */
  2295. if (instance->model == ONCORE_BASIC || instance->model == ONCORE_PVT6)
  2296. instance->traim_id = 0;
  2297. else if (instance->model == ONCORE_VP || instance->model == ONCORE_UT || instance->model == ONCORE_UTPLUS)
  2298. instance->traim_id = 1;
  2299. else if (instance->model == ONCORE_M12)
  2300. instance->traim_id = -1;
  2301. sprintf(Msg, "Channels = %d, TRAIM = %s", instance->chan_id,
  2302. ((instance->traim_id < 0) ? "UNKNOWN" : ((instance->traim_id > 0) ? "ON" : "OFF")));
  2303. record_clock_stats(&(instance->peer->srcadr), Msg);
  2304. }
  2305. /* OK, know type of Oncore, have possibly reset it, and have tested it.
  2306. * We know the number of channels.
  2307. * We will determine whether we have TRAIM before we actually start.
  2308. * Now initialize.
  2309. */
  2310. static void
  2311. oncore_msg_Cj_init(
  2312. struct instance *instance,
  2313. u_char *buf,
  2314. size_t len
  2315. )
  2316. {
  2317. char *cp, Msg[160];
  2318. u_char Cmd[20];
  2319. int mode;
  2320. /* The M12 with 1.3 or 2.0 Firmware, loses track of all Satellites and has to
  2321. * start again if we go from 0D -> 3D, then loses them again when we
  2322. * go from 3D -> 0D. We do this to get a @@Ea message for SHMEM.
  2323. * For NOW we will turn this aspect of filling SHMEM off for the M12
  2324. */
  2325. if (instance->chan == 12) {
  2326. instance->shmem_bad_Ea = 1;
  2327. sprintf(Msg, "*** SHMEM partially enabled for ONCORE M12 s/w v%d.%d ***", instance->version, instance->revision);
  2328. record_clock_stats(&(instance->peer->srcadr), Msg);
  2329. }
  2330. oncore_sendmsg(instance->ttyfd, oncore_cmd_Cg, sizeof(oncore_cmd_Cg)); /* Return to Posn Fix mode */
  2331. oncore_sendmsg(instance->ttyfd, oncore_cmd_Bb, sizeof(oncore_cmd_Bb)); /* turn on for shmem (6/8/12) */
  2332. oncore_sendmsg(instance->ttyfd, oncore_cmd_Ek, sizeof(oncore_cmd_Ek)); /* turn off (VP) */
  2333. oncore_sendmsg(instance->ttyfd, oncore_cmd_Aw, sizeof(oncore_cmd_Aw)); /* UTC time (6/8/12) */
  2334. oncore_sendmsg(instance->ttyfd, oncore_cmd_AB, sizeof(oncore_cmd_AB)); /* Appl type static (VP) */
  2335. oncore_sendmsg(instance->ttyfd, oncore_cmd_Be, sizeof(oncore_cmd_Be)); /* Tell us the Almanac for shmem (6/8/12) */
  2336. oncore_sendmsg(instance->ttyfd, oncore_cmd_Bd, sizeof(oncore_cmd_Bd)); /* Tell us when Almanac changes */
  2337. mode = instance->init_type;
  2338. /* If there is Position input in the Config file
  2339. * and mode = (1,3) set it as posn hold posn, goto 0D mode.
  2340. * or mode = (2,4) set it as INITIAL position, and do Site Survey.
  2341. */
  2342. if (instance->posn_set) {
  2343. record_clock_stats(&(instance->peer->srcadr), "Setting Posn from input data");
  2344. oncore_set_posn(instance); /* this should print posn indirectly thru the As cmd */
  2345. } else /* must issue an @@At here to check on 6/8 Position Hold, set_posn would have */
  2346. if (instance->chan != 12)
  2347. oncore_sendmsg(instance->ttyfd, oncore_cmd_Atx, sizeof(oncore_cmd_Atx));
  2348. if (mode != 0) {
  2349. /* cable delay in ns */
  2350. memcpy(Cmd, oncore_cmd_Az, (size_t) sizeof(oncore_cmd_Az));
  2351. w32_buf(&Cmd[-2+4], instance->delay);
  2352. oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Az)); /* 6,8,12 */
  2353. /* PPS offset in ns */
  2354. if (instance->offset) {
  2355. memcpy(Cmd, oncore_cmd_Ay, (size_t) sizeof(oncore_cmd_Ay)); /* some have it, some don't */
  2356. w32_buf(&Cmd[-2+4], instance->offset); /* will check for hw response */
  2357. oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Ay));
  2358. }
  2359. /* Satellite mask angle */
  2360. if (instance->Ag != 0xff) { /* will have 0xff in it if not set by user */
  2361. memcpy(Cmd, oncore_cmd_Ag, (size_t) sizeof(oncore_cmd_Ag));
  2362. Cmd[-2+4] = instance->Ag;
  2363. oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Ag));
  2364. }
  2365. }
  2366. /* 6, 8 12 chan - Position/Status/Data Output Message, 1/s
  2367. * now we're really running
  2368. * these were ALL started in the chan test,
  2369. * However, if we had mode=3,4 then commands got turned off, so we turn
  2370. * them on again here just in case
  2371. */
  2372. if (instance->chan == 6) { /* start 6chan, kill 8,12chan commands, possibly testing VP in 6chan mode */
  2373. oncore_sendmsg(instance->ttyfd, oncore_cmd_Ea0, sizeof(oncore_cmd_Ea0));
  2374. oncore_sendmsg(instance->ttyfd, oncore_cmd_En0, sizeof(oncore_cmd_En0));
  2375. oncore_sendmsg(instance->ttyfd, oncore_cmd_Ha0, sizeof(oncore_cmd_Ha0));
  2376. oncore_sendmsg(instance->ttyfd, oncore_cmd_Hn0, sizeof(oncore_cmd_Hn0));
  2377. oncore_sendmsg(instance->ttyfd, oncore_cmd_Ba, sizeof(oncore_cmd_Ba ));
  2378. } else if (instance->chan == 8) { /* start 8chan, kill 6,12chan commands */
  2379. oncore_sendmsg(instance->ttyfd, oncore_cmd_Ba0, sizeof(oncore_cmd_Ba0));
  2380. oncore_sendmsg(instance->ttyfd, oncore_cmd_Bn0, sizeof(oncore_cmd_Bn0));
  2381. oncore_sendmsg(instance->ttyfd, oncore_cmd_Ha0, sizeof(oncore_cmd_Ha0));
  2382. oncore_sendmsg(instance->ttyfd, oncore_cmd_Hn0, sizeof(oncore_cmd_Hn0));
  2383. oncore_sendmsg(instance->ttyfd, oncore_cmd_Ea, sizeof(oncore_cmd_Ea ));
  2384. } else if (instance->chan == 12){ /* start 12chan, kill 6,12chan commands */
  2385. oncore_sendmsg(instance->ttyfd, oncore_cmd_Ba0, sizeof(oncore_cmd_Ba0));
  2386. oncore_sendmsg(instance->ttyfd, oncore_cmd_Bn0, sizeof(oncore_cmd_Bn0));
  2387. oncore_sendmsg(instance->ttyfd, oncore_cmd_Ea0, sizeof(oncore_cmd_Ea0));
  2388. oncore_sendmsg(instance->ttyfd, oncore_cmd_En0, sizeof(oncore_cmd_En0));
  2389. oncore_sendmsg(instance->ttyfd, oncore_cmd_Ha, sizeof(oncore_cmd_Ha ));
  2390. }
  2391. instance->count = 1;
  2392. instance->o_state = ONCORE_ALMANAC;
  2393. cp = "state = ONCORE_ALMANAC";
  2394. record_clock_stats(&(instance->peer->srcadr), cp);
  2395. }
  2396. /* 12chan position */
  2397. static void
  2398. oncore_msg_Ga(
  2399. struct instance *instance,
  2400. u_char *buf,
  2401. size_t len
  2402. )
  2403. {
  2404. char Msg[160];
  2405. long lat, lon, ht;
  2406. double Lat, Lon, Ht;
  2407. lat = buf_w32(&buf[4]);
  2408. lon = buf_w32(&buf[8]);
  2409. ht = buf_w32(&buf[12]); /* GPS ellipsoid */
  2410. Lat = lat;
  2411. Lon = lon;
  2412. Ht = ht;
  2413. Lat /= 3600000;
  2414. Lon /= 3600000;
  2415. Ht /= 100;
  2416. sprintf(Msg, "Ga Posn Lat = %.7f, Lon = %.7f, Ht = %.2f", Lat, Lon, Ht);
  2417. record_clock_stats(&(instance->peer->srcadr), Msg);
  2418. instance->ss_lat = lat;
  2419. instance->ss_long = lon;
  2420. instance->ss_ht = ht;
  2421. oncore_print_posn(instance);
  2422. }
  2423. /* 12 chan time/date */
  2424. static void
  2425. oncore_msg_Gb(
  2426. struct instance *instance,
  2427. u_char *buf,
  2428. size_t len
  2429. )
  2430. {
  2431. char Msg[160], *gmts;
  2432. int mo, d, y, h, m, s, gmth, gmtm;
  2433. mo = buf[4];
  2434. d = buf[5];
  2435. y = 256*buf[6]+buf[7];
  2436. h = buf[8];
  2437. m = buf[9];
  2438. s = buf[10];
  2439. gmts = ((buf[11] == 0) ? "+" : "-");
  2440. gmth = buf[12];
  2441. gmtm = buf[13];
  2442. sprintf(Msg, "Date/Time set to: %d%s%d %2d:%02d:%02d GMT (GMT offset is %s%02d:%02d)",
  2443. d, Month[mo-1], y, h, m, s, gmts, gmth, gmtm);
  2444. record_clock_stats(&(instance->peer->srcadr), Msg);
  2445. }
  2446. /* Leap Second for M12, gives all info from satellite message */
  2447. /* also in UT v3.0 */
  2448. static void
  2449. oncore_msg_Gj(
  2450. struct instance *instance,
  2451. u_char *buf,
  2452. size_t len
  2453. )
  2454. {
  2455. int dt;
  2456. char Msg[160], *cp;
  2457. instance->saw_Gj = 1; /* flag, saw_Gj, dont need to try Bj in check_leap */
  2458. /* print the message to verify whats there */
  2459. dt = buf[5] - buf[4];
  2460. #if 1
  2461. sprintf(Msg, "ONCORE[%d]: Leap Sec Msg: %d %d %d %d %d %d %d %d %d %d",
  2462. instance->unit,
  2463. buf[4], buf[5], 256*buf[6]+buf[7], buf[8], buf[9], buf[10],
  2464. (buf[14]+256*(buf[13]+256*(buf[12]+256*buf[11]))),
  2465. buf[15], buf[16], buf[17]);
  2466. record_clock_stats(&(instance->peer->srcadr), Msg);
  2467. #endif
  2468. if (dt) {
  2469. sprintf(Msg, "ONCORE[%d]: Leap second (%d) scheduled for %d%s%d at %d:%d:%d",
  2470. instance->unit,
  2471. dt, buf[9], Month[buf[8]-1], 256*buf[6]+buf[7],
  2472. buf[15], buf[16], buf[17]);
  2473. record_clock_stats(&(instance->peer->srcadr), Msg);
  2474. }
  2475. /* Only raise warning within a month of the leap second */
  2476. instance->pp->leap = LEAP_NOWARNING;
  2477. cp = "Set pp.leap to LEAP_NOWARNING";
  2478. if (buf[6] == instance->BEHa[6] && buf[7] == instance->BEHa[7] && /* year */
  2479. buf[8] == instance->BEHa[4]) { /* month */
  2480. if (dt) {
  2481. if (dt < 0) {
  2482. instance->pp->leap = LEAP_DELSECOND;
  2483. cp = "Set pp.leap to LEAP_DELSECOND";
  2484. } else {
  2485. instance->pp->leap = LEAP_ADDSECOND;
  2486. cp = "Set pp.leap to LEAP_ADDSECOND";
  2487. }
  2488. }
  2489. }
  2490. record_clock_stats(&(instance->peer->srcadr), cp);
  2491. }
  2492. /* Power on failure */
  2493. static void
  2494. oncore_msg_Sz(
  2495. struct instance *instance,
  2496. u_char *buf,
  2497. size_t len
  2498. )
  2499. {
  2500. const char *cp;
  2501. cp = "Oncore: System Failure at Power On";
  2502. if (instance && instance->peer) {
  2503. record_clock_stats(&(instance->peer->srcadr), cp);
  2504. oncore_shutdown(instance->unit, instance->peer);
  2505. }
  2506. }
  2507. /************** Small Subroutines ***************/
  2508. static void
  2509. oncore_antenna_report(
  2510. struct instance *instance,
  2511. enum antenna_state new_state)
  2512. {
  2513. char *cp;
  2514. if (instance->ant_state == new_state)
  2515. return;
  2516. switch (new_state) {
  2517. case ONCORE_ANTENNA_OK: cp = "GPS antenna: OK"; break;
  2518. case ONCORE_ANTENNA_OC: cp = "GPS antenna: short (overcurrent)"; break;
  2519. case ONCORE_ANTENNA_UC: cp = "GPS antenna: open (not connected)"; break;
  2520. case ONCORE_ANTENNA_NV: cp = "GPS antenna: short (no voltage)"; break;
  2521. default: cp = "GPS antenna: ?"; break;
  2522. }
  2523. instance->ant_state = new_state;
  2524. record_clock_stats(&instance->peer->srcadr, cp);
  2525. }
  2526. static void
  2527. oncore_chan_test(
  2528. struct instance *instance
  2529. )
  2530. {
  2531. char *cp;
  2532. /* subroutine oncore_Cj_id has determined the number of channels from the
  2533. * model number of the attached oncore. This is not always correct since
  2534. * the oncore could have non-standard firmware. Here we check (independently) by
  2535. * trying a 6, 8, and 12 chan command, and see which responds.
  2536. * Caution: more than one CAN respond.
  2537. *
  2538. * This #chan is used by the code rather than that calculated from the model number.
  2539. */
  2540. instance->o_state = ONCORE_CHECK_CHAN;
  2541. cp = "state = ONCORE_CHECK_CHAN";
  2542. record_clock_stats(&(instance->peer->srcadr), cp);
  2543. instance->count3 = 1;
  2544. oncore_sendmsg(instance->ttyfd, oncore_cmd_Ba, sizeof(oncore_cmd_Ba));
  2545. oncore_sendmsg(instance->ttyfd, oncore_cmd_Ea, sizeof(oncore_cmd_Ea));
  2546. oncore_sendmsg(instance->ttyfd, oncore_cmd_Ha, sizeof(oncore_cmd_Ha));
  2547. }
  2548. /* check for a GOOD Almanac, have we got one yet? */
  2549. static void
  2550. oncore_check_almanac(
  2551. struct instance *instance
  2552. )
  2553. {
  2554. if (instance->chan == 6) {
  2555. instance->rsm.bad_almanac = instance->BEHa[64]&0x1;
  2556. instance->rsm.bad_fix = instance->BEHa[64]&0x52;
  2557. } else if (instance->chan == 8) {
  2558. instance->rsm.bad_almanac = instance->BEHa[72]&0x1;
  2559. instance->rsm.bad_fix = instance->BEHa[72]&0x52;
  2560. } else if (instance->chan == 12) {
  2561. int bits1, bits2, bits3;
  2562. bits1 = (instance->BEHa[129]>>5) & 0x7; /* actually Ha */
  2563. bits2 = instance->BEHa[130];
  2564. instance->rsm.bad_almanac = (bits2 & 0x80);
  2565. instance->rsm.bad_fix = (bits2 & 0x8) || (bits1 == 0x2);
  2566. /* too few sat Bad Geom */
  2567. bits3 = instance->BEHa[141]; /* UTC parameters */
  2568. if (!instance->count5_set && (bits3 & 0xC0)) {
  2569. instance->count5 = 2;
  2570. instance->count5_set = 1;
  2571. }
  2572. #if 0
  2573. {
  2574. char Msg[160];
  2575. sprintf(Msg, "ONCORE[%d]: DEBUG BITS: (%x %x), (%x %x %x), %x %x %x %x %x\n",
  2576. instance->unit,
  2577. instance->BEHa[129], instance->BEHa[130], bits1, bits2, bits3, instance->mode == MODE_0D,
  2578. instance->mode == MODE_2D, instance->mode == MODE_3D,
  2579. instance->rsm.bad_almanac, instance->rsm.bad_fix);
  2580. record_clock_stats(&(instance->peer->srcadr), Msg);
  2581. }
  2582. #endif
  2583. }
  2584. }
  2585. /* check the antenna for changes (did it get unplugged?) */
  2586. static void
  2587. oncore_check_antenna(
  2588. struct instance *instance
  2589. )
  2590. {
  2591. enum antenna_state antenna; /* antenna state */
  2592. antenna = instance->ant_state;
  2593. if (instance->chan == 12)
  2594. antenna = (instance->BEHa[130] & 0x6 ) >> 1;
  2595. else
  2596. antenna = (instance->BEHa[37] & 0xc0) >> 6; /* prob unset 6, set GT, UT unset VP */
  2597. oncore_antenna_report (instance, antenna);
  2598. }
  2599. /*
  2600. * Check the leap second status once per day.
  2601. *
  2602. * Note that the ONCORE firmware for the Bj command is wrong at
  2603. * least in the VP.
  2604. * It starts advertising a LEAP SECOND as soon as the GPS satellite
  2605. * data message (page 18, subframe 4) is updated to a date in the
  2606. * future, and does not wait for the month that it will occur.
  2607. * The event will usually be advertised several months in advance.
  2608. * Since there is a one bit flag, there is no way to tell if it is
  2609. * this month, or when...
  2610. *
  2611. * As such, we have the workaround below, of only checking for leap
  2612. * seconds with the Bj command in June/December.
  2613. *
  2614. * The Gj command gives more information, and we can tell in which
  2615. * month to apply the correction.
  2616. *
  2617. * Note that with the VP we COULD read the raw data message, and
  2618. * interpret it ourselves, but since this is specific to this receiver
  2619. * only, and the above workaround is adequate, we don't bother.
  2620. */
  2621. static void
  2622. oncore_check_leap_sec(
  2623. struct instance *instance
  2624. )
  2625. {
  2626. if (instance->Bj_day != instance->BEHa[5]) { /* do this 1/day */
  2627. instance->Bj_day = instance->BEHa[5];
  2628. if (instance->saw_Gj < 0) { /* -1 DONT have Gj use Bj */
  2629. if ((instance->BEHa[4] == 6) || (instance->BEHa[4] == 12))
  2630. oncore_sendmsg(instance->ttyfd, oncore_cmd_Bj, sizeof(oncore_cmd_Bj));
  2631. return;
  2632. }
  2633. if (instance->saw_Gj == 0) /* 0 is dont know if we have Gj */
  2634. instance->count4 = 1;
  2635. oncore_sendmsg(instance->ttyfd, oncore_cmd_Gj, sizeof(oncore_cmd_Gj));
  2636. return;
  2637. }
  2638. /* Gj works for some 6/8 chan UT and the M12 */
  2639. /* if no response from Gj in 5 sec, we try Bj */
  2640. /* which isnt implemented in all the GT/UT either */
  2641. if (instance->count4) { /* delay, waiting for Gj response */
  2642. if (instance->saw_Gj == 1)
  2643. instance->count4 = 0;
  2644. else if (instance->count4++ > 5) { /* delay, waiting for Gj response */
  2645. instance->saw_Gj = -1; /* didnt see it, will use Bj */
  2646. instance->count4 = 0;
  2647. if ((instance->BEHa[4] == 6) || (instance->BEHa[4] == 12))
  2648. oncore_sendmsg(instance->ttyfd, oncore_cmd_Bj, sizeof(oncore_cmd_Bj));
  2649. }
  2650. }
  2651. }
  2652. /* check the message checksum,
  2653. * buf points to START of message ( @@ )
  2654. * len is length WITH CR/LF.
  2655. */
  2656. static int
  2657. oncore_checksum_ok(
  2658. u_char *buf,
  2659. int len
  2660. )
  2661. {
  2662. int i, j;
  2663. j = 0;
  2664. for (i = 2; i < len-3; i++)
  2665. j ^= buf[i];
  2666. return(j == buf[len-3]);
  2667. }
  2668. static void
  2669. oncore_compute_dH(
  2670. struct instance *instance
  2671. )
  2672. {
  2673. int GPS, MSL;
  2674. char Msg[160];
  2675. /* Here calculate dH = GPS - MSL for output message */
  2676. /* also set Altitude Hold mode if GT */
  2677. instance->have_dH = 1;
  2678. if (instance->chan == 12) {
  2679. GPS = buf_w32(&instance->BEHa[39]);
  2680. MSL = buf_w32(&instance->BEHa[43]);
  2681. } else {
  2682. GPS = buf_w32(&instance->BEHa[23]);
  2683. MSL = buf_w32(&instance->BEHa[27]);
  2684. }
  2685. instance->dH = GPS - MSL;
  2686. instance->dH /= 100.;
  2687. /* if MSL is not set, the calculation is meaningless */
  2688. if (MSL) { /* not set ! */
  2689. sprintf(Msg, "dH = (GPS - MSL) = %.2fm", instance->dH);
  2690. record_clock_stats(&(instance->peer->srcadr), Msg);
  2691. }
  2692. }
  2693. /*
  2694. * try loading Almanac from shmem (where it was copied from shmem_old
  2695. */
  2696. static void
  2697. oncore_load_almanac(
  2698. struct instance *instance
  2699. )
  2700. {
  2701. u_char *cp, Cmd[20];
  2702. int n;
  2703. struct timeval tv;
  2704. struct tm *tm;
  2705. if (!instance->shmem)
  2706. return;
  2707. #if 1
  2708. for (cp=instance->shmem+4; (n = 256*(*(cp-3)) + *(cp-2)); cp+=(n+3)) {
  2709. if (!strncmp((char *) cp, "@@Cb", 4) &&
  2710. oncore_checksum_ok(cp, 33) &&
  2711. (*(cp+4) == 4 || *(cp+4) == 5)) {
  2712. write(instance->ttyfd, cp, n);
  2713. #if 1
  2714. oncore_print_Cb(instance, cp);
  2715. #endif
  2716. }
  2717. }
  2718. #else
  2719. /************DEBUG************/
  2720. for (cp=instance->shmem+4; (n = 256*(*(cp-3)) + *(cp-2)); cp+=(n+3)) {
  2721. char Msg[160];
  2722. sprintf(Msg, "See %c%c%c%c %d", *(cp), *(cp+1), *(cp+2), *(cp+3), *(cp+4));
  2723. record_clock_stats(&(instance->peer->srcadr), Msg);
  2724. if (!strncmp(cp, "@@Cb", 4)) {
  2725. oncore_print_Cb(instance, cp);
  2726. if (oncore_checksum_ok(cp, 33)) {
  2727. if (*(cp+4) == 4 || *(cp+4) == 5) {
  2728. record_clock_stats(&(instance->peer->srcadr), "GOOD SF");
  2729. write(instance->ttyfd, cp, n);
  2730. } else
  2731. record_clock_stats(&(instance->peer->srcadr), "BAD SF");
  2732. } else
  2733. record_clock_stats(&(instance->peer->srcadr), "BAD CHECKSUM");
  2734. }
  2735. }
  2736. /************DEBUG************/
  2737. #endif
  2738. /* Must load position and time or the Almanac doesn't do us any good */
  2739. if (!instance->posn_set) { /* if we input a posn use it, else from SHMEM */
  2740. record_clock_stats(&(instance->peer->srcadr), "Loading Posn from SHMEM");
  2741. for (cp=instance->shmem+4; (n = 256*(*(cp-3)) + *(cp-2)); cp+=(n+3)) {
  2742. if ((instance->chan == 6 && (!strncmp((char *) cp, "@@Ba", 4) && oncore_checksum_ok(cp, 68))) ||
  2743. (instance->chan == 8 && (!strncmp((char *) cp, "@@Ea", 4) && oncore_checksum_ok(cp, 76))) ||
  2744. (instance->chan == 12 && (!strncmp((char *) cp, "@@Ha", 4) && oncore_checksum_ok(cp, 154)))) {
  2745. int ii, jj, kk;
  2746. instance->posn_set = 1;
  2747. ii = buf_w32(cp + 15);
  2748. jj = buf_w32(cp + 19);
  2749. kk = buf_w32(cp + 23);
  2750. #if 0
  2751. {
  2752. char Msg[160];
  2753. sprintf(Msg, "SHMEM posn = %ld (%d, %d, %d)", (long) (cp-instance->shmem), ii, jj, kk);
  2754. record_clock_stats(&(instance->peer->srcadr), Msg);
  2755. }
  2756. #endif
  2757. if (ii != 0 || jj != 0 || kk != 0) { /* phk asked for this test */
  2758. instance->ss_lat = ii;
  2759. instance->ss_long = jj;
  2760. instance->ss_ht = kk;
  2761. }
  2762. }
  2763. }
  2764. }
  2765. oncore_set_posn(instance);
  2766. /* and set time to time from Computer clock */
  2767. gettimeofday(&tv, 0);
  2768. tm = gmtime((const time_t *) &tv.tv_sec);
  2769. #if 1
  2770. {
  2771. char Msg[160];
  2772. sprintf(Msg, "DATE %d %d %d, %d %d %d", 1900+tm->tm_year, tm->tm_mon, tm->tm_mday,
  2773. tm->tm_hour, tm->tm_min, tm->tm_sec);
  2774. record_clock_stats(&(instance->peer->srcadr), Msg);
  2775. }
  2776. #endif
  2777. if (instance->chan == 12) {
  2778. memcpy(Cmd, oncore_cmd_Gb, (size_t) sizeof(oncore_cmd_Gb));
  2779. Cmd[-2+4] = tm->tm_mon + 1;
  2780. Cmd[-2+5] = tm->tm_mday;
  2781. Cmd[-2+6] = (1900+tm->tm_year)/256;
  2782. Cmd[-2+7] = (1900+tm->tm_year)%256;
  2783. Cmd[-2+8] = tm->tm_hour;
  2784. Cmd[-2+9] = tm->tm_min;
  2785. Cmd[-2+10] = tm->tm_sec;
  2786. Cmd[-2+11] = 0;
  2787. Cmd[-2+12] = 0;
  2788. Cmd[-2+13] = 0;
  2789. oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Gb));
  2790. } else {
  2791. /* First set GMT offset to zero */
  2792. oncore_sendmsg(instance->ttyfd, oncore_cmd_Ab, sizeof(oncore_cmd_Ab));
  2793. memcpy(Cmd, oncore_cmd_Ac, (size_t) sizeof(oncore_cmd_Ac));
  2794. Cmd[-2+4] = tm->tm_mon + 1;
  2795. Cmd[-2+5] = tm->tm_mday;
  2796. Cmd[-2+6] = (1900+tm->tm_year)/256;
  2797. Cmd[-2+7] = (1900+tm->tm_year)%256;
  2798. oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Ac));
  2799. memcpy(Cmd, oncore_cmd_Aa, (size_t) sizeof(oncore_cmd_Aa));
  2800. Cmd[-2+4] = tm->tm_hour;
  2801. Cmd[-2+5] = tm->tm_min;
  2802. Cmd[-2+6] = tm->tm_sec;
  2803. oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Aa));
  2804. }
  2805. record_clock_stats(&(instance->peer->srcadr), "Setting Posn and Time after Loading Almanac");
  2806. }
  2807. /* Almanac data input */
  2808. static void
  2809. oncore_print_Cb(
  2810. struct instance *instance,
  2811. u_char *cp
  2812. )
  2813. {
  2814. #if 0
  2815. int ii;
  2816. char Msg[160];
  2817. printf("DEBUG: See: %c%c%c%c\n", *(cp), *(cp+1), *(cp+2), *(cp+3));
  2818. printf("DEBUG: Cb: [%d,%d]", *(cp+4), *(cp+5));
  2819. for(ii=0; ii<33; ii++)
  2820. printf(" %d", *(cp+ii));
  2821. printf("\n");
  2822. sprintf(Msg, "Debug: Cb: [%d,%d]", *(cp+4), *(cp+5));
  2823. record_clock_stats(&(instance->peer->srcadr), Msg);
  2824. #endif
  2825. }
  2826. #if 0
  2827. static void
  2828. oncore_print_array(
  2829. u_char *cp,
  2830. int n
  2831. )
  2832. {
  2833. int jj, i, j, nn;
  2834. nn = 0;
  2835. printf("\nTOP\n");
  2836. jj = n/16;
  2837. for (j=0; j<jj; j++) {
  2838. printf("%4d: ", nn);
  2839. nn += 16;
  2840. for (i=0; i<16; i++)
  2841. printf(" %o", *cp++);
  2842. printf("\n");
  2843. }
  2844. }
  2845. #endif
  2846. static void
  2847. oncore_print_posn(
  2848. struct instance *instance
  2849. )
  2850. {
  2851. char Msg[120], ew, ns;
  2852. double xd, xm, xs, yd, ym, ys, hm, hft;
  2853. int idx, idy, is, imx, imy;
  2854. long lat, lon;
  2855. record_clock_stats(&(instance->peer->srcadr), "Posn:");
  2856. ew = 'E';
  2857. lon = instance->ss_long;
  2858. if (lon < 0) {
  2859. ew = 'W';
  2860. lon = -lon;
  2861. }
  2862. ns = 'N';
  2863. lat = instance->ss_lat;
  2864. if (lat < 0) {
  2865. ns = 'S';
  2866. lat = -lat;
  2867. }
  2868. hm = instance->ss_ht/100.;
  2869. hft= hm/0.3048;
  2870. xd = lat/3600000.; /* lat, lon in int msec arc, ht in cm. */
  2871. yd = lon/3600000.;
  2872. sprintf(Msg, "Lat = %c %11.7fdeg, Long = %c %11.7fdeg, Alt = %5.2fm (%5.2fft) GPS", ns, xd, ew, yd, hm, hft);
  2873. record_clock_stats(&(instance->peer->srcadr), Msg);
  2874. idx = xd;
  2875. idy = yd;
  2876. imx = lat%3600000;
  2877. imy = lon%3600000;
  2878. xm = imx/60000.;
  2879. ym = imy/60000.;
  2880. sprintf(Msg,
  2881. "Lat = %c %3ddeg %7.4fm, Long = %c %3ddeg %8.5fm, Alt = %7.2fm (%7.2fft) GPS", ns, idx, xm, ew, idy, ym, hm, hft);
  2882. record_clock_stats(&(instance->peer->srcadr), Msg);
  2883. imx = xm;
  2884. imy = ym;
  2885. is = lat%60000;
  2886. xs = is/1000.;
  2887. is = lon%60000;
  2888. ys = is/1000.;
  2889. sprintf(Msg,
  2890. "Lat = %c %3ddeg %2dm %5.2fs, Long = %c %3ddeg %2dm %5.2fs, Alt = %7.2fm (%7.2fft) GPS", ns, idx, imx, xs, ew, idy, imy, ys, hm, hft);
  2891. record_clock_stats(&(instance->peer->srcadr), Msg);
  2892. }
  2893. /*
  2894. * write message to Oncore.
  2895. */
  2896. static void
  2897. oncore_sendmsg(
  2898. int fd,
  2899. u_char *ptr,
  2900. size_t len
  2901. )
  2902. {
  2903. u_char cs = 0;
  2904. #ifdef DEBUG
  2905. if (debug > 4)
  2906. printf("ONCORE: Send @@%c%c %d\n", ptr[0], ptr[1], (int) len);
  2907. #endif
  2908. write(fd, "@@", (size_t) 2);
  2909. write(fd, ptr, len);
  2910. while (len--)
  2911. cs ^= *ptr++;
  2912. write(fd, &cs, (size_t) 1);
  2913. write(fd, "\r\n", (size_t) 2);
  2914. }
  2915. static void
  2916. oncore_set_posn(
  2917. struct instance *instance
  2918. )
  2919. {
  2920. int mode;
  2921. u_char Cmd[20];
  2922. /* Turn OFF position hold, it needs to be off to set position (for some units),
  2923. will get set ON in @@Ea later */
  2924. if (instance->chan == 12)
  2925. oncore_sendmsg(instance->ttyfd, oncore_cmd_Gd0, sizeof(oncore_cmd_Gd0)); /* (12) */
  2926. else {
  2927. oncore_sendmsg(instance->ttyfd, oncore_cmd_At0, sizeof(oncore_cmd_At0)); /* (6/8) */
  2928. oncore_sendmsg(instance->ttyfd, oncore_cmd_Av0, sizeof(oncore_cmd_Av0)); /* (6/8) */
  2929. }
  2930. mode = instance->init_type;
  2931. if (mode != 0) { /* first set posn hold position */
  2932. memcpy(Cmd, oncore_cmd_As, (size_t) sizeof(oncore_cmd_As)); /* don't modify static variables */
  2933. w32_buf(&Cmd[-2+4], (int) instance->ss_lat);
  2934. w32_buf(&Cmd[-2+8], (int) instance->ss_long);
  2935. w32_buf(&Cmd[-2+12], (int) instance->ss_ht);
  2936. Cmd[-2+16] = 0;
  2937. oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_As)); /* posn hold 3D posn (6/8/12) */
  2938. memcpy(Cmd, oncore_cmd_Au, (size_t) sizeof(oncore_cmd_Au));
  2939. w32_buf(&Cmd[-2+4], (int) instance->ss_ht);
  2940. Cmd[-2+8] = 0;
  2941. oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Au)); /* altitude hold (6/8/12 not UT, M12T) */
  2942. /* next set current position */
  2943. if (instance->chan == 12) {
  2944. memcpy(Cmd, oncore_cmd_Ga, (size_t) sizeof(oncore_cmd_Ga));
  2945. w32_buf(&Cmd[-2+4], (int) instance->ss_lat);
  2946. w32_buf(&Cmd[-2+8], (int) instance->ss_long);
  2947. w32_buf(&Cmd[-2+12],(int) instance->ss_ht);
  2948. Cmd[-2+16] = 0;
  2949. oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Ga)); /* 3d posn (12) */
  2950. } else {
  2951. memcpy(Cmd, oncore_cmd_Ad, (size_t) sizeof(oncore_cmd_Ad));
  2952. w32_buf(&Cmd[-2+4], (int) instance->ss_lat);
  2953. oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Ad)); /* lat (6/8) */
  2954. memcpy(Cmd, oncore_cmd_Ae, (size_t) sizeof(oncore_cmd_Ae));
  2955. w32_buf(&Cmd[-2+4], (int) instance->ss_long);
  2956. oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Ae)); /* long (6/8) */
  2957. memcpy(Cmd, oncore_cmd_Af, (size_t) sizeof(oncore_cmd_Af));
  2958. w32_buf(&Cmd[-2+4], (int) instance->ss_ht);
  2959. Cmd[-2+8] = 0;
  2960. oncore_sendmsg(instance->ttyfd, Cmd, sizeof(oncore_cmd_Af)); /* ht (6/8) */
  2961. }
  2962. /* Finally, turn on position hold */
  2963. if (instance->chan == 12)
  2964. oncore_sendmsg(instance->ttyfd, oncore_cmd_Gd1, sizeof(oncore_cmd_Gd1));
  2965. else
  2966. oncore_sendmsg(instance->ttyfd, oncore_cmd_At1, sizeof(oncore_cmd_At1));
  2967. }
  2968. }
  2969. static void
  2970. oncore_set_traim(
  2971. struct instance *instance
  2972. )
  2973. {
  2974. char Msg[160];
  2975. if (instance->traim_in != -1) /* set in Input */
  2976. instance->traim = instance->traim_in;
  2977. else
  2978. instance->traim = instance->traim_ck;
  2979. sprintf(Msg, "Input says TRAIM = %d", instance->traim_in);
  2980. record_clock_stats(&(instance->peer->srcadr), Msg);
  2981. sprintf(Msg, "Model # says TRAIM = %d", instance->traim_id);
  2982. record_clock_stats(&(instance->peer->srcadr), Msg);
  2983. sprintf(Msg, "Testing says TRAIM = %d", instance->traim_ck);
  2984. record_clock_stats(&(instance->peer->srcadr), Msg);
  2985. sprintf(Msg, "Using TRAIM = %d", instance->traim);
  2986. record_clock_stats(&(instance->peer->srcadr), Msg);
  2987. if (instance->traim_ck == 1 && instance->traim == 0) {
  2988. /* if it should be off, and I turned it on during testing,
  2989. then turn it off again */
  2990. if (instance->chan == 6)
  2991. oncore_sendmsg(instance->ttyfd, oncore_cmd_Bnx, sizeof(oncore_cmd_Bnx));
  2992. else if (instance->chan == 8)
  2993. oncore_sendmsg(instance->ttyfd, oncore_cmd_Enx, sizeof(oncore_cmd_Enx));
  2994. else /* chan == 12 */
  2995. oncore_sendmsg(instance->ttyfd, oncore_cmd_Ge0, sizeof(oncore_cmd_Ge0));
  2996. oncore_sendmsg(instance->ttyfd, oncore_cmd_Hn0, sizeof(oncore_cmd_Hn0));
  2997. }
  2998. }
  2999. /*
  3000. * if SHMEM active, every 15s, steal one 'tick' to get 2D or 3D posn.
  3001. */
  3002. static void
  3003. oncore_shmem_get_3D(
  3004. struct instance *instance
  3005. )
  3006. {
  3007. if (instance->pp->second%15 == 3) { /* start the sequence */ /* by changing mode */
  3008. instance->shmem_reset = 1;
  3009. if (instance->chan == 12) {
  3010. if (instance->shmem_Posn == 2)
  3011. oncore_sendmsg(instance->ttyfd, oncore_cmd_Gd2, sizeof(oncore_cmd_Gd2)); /* 2D */
  3012. else
  3013. oncore_sendmsg(instance->ttyfd, oncore_cmd_Gd0, sizeof(oncore_cmd_Gd0)); /* 3D */
  3014. } else {
  3015. if (instance->saw_At) { /* out of 0D -> 3D mode */
  3016. oncore_sendmsg(instance->ttyfd, oncore_cmd_At0, sizeof(oncore_cmd_At0));
  3017. if (instance->shmem_Posn == 2) /* 3D -> 2D mode */
  3018. oncore_sendmsg(instance->ttyfd, oncore_cmd_Av1, sizeof(oncore_cmd_Av1));
  3019. } else
  3020. oncore_sendmsg(instance->ttyfd, oncore_cmd_Av0, sizeof(oncore_cmd_Av0));
  3021. }
  3022. } else if (instance->shmem_reset || (instance->mode != MODE_0D)) {
  3023. instance->shmem_reset = 0;
  3024. if (instance->chan == 12)
  3025. oncore_sendmsg(instance->ttyfd, oncore_cmd_Gd1, sizeof(oncore_cmd_Gd1)); /* 0D */
  3026. else {
  3027. if (instance->saw_At) {
  3028. if (instance->mode == MODE_2D) /* 2D -> 3D or 0D mode */
  3029. oncore_sendmsg(instance->ttyfd, oncore_cmd_Av0, sizeof(oncore_cmd_Av0));
  3030. oncore_sendmsg(instance->ttyfd, oncore_cmd_At1, sizeof(oncore_cmd_At1)); /* to 0D mode */
  3031. } else
  3032. oncore_sendmsg(instance->ttyfd, oncore_cmd_Av1, sizeof(oncore_cmd_Av1));
  3033. }
  3034. }
  3035. }
  3036. /*
  3037. * Here we do the Software SiteSurvey.
  3038. * We have to average our own position for the Position Hold Mode
  3039. * We use Heights from the GPS ellipsoid.
  3040. * We check for the END of either HW or SW SiteSurvey.
  3041. */
  3042. static void
  3043. oncore_ss(
  3044. struct instance *instance
  3045. )
  3046. {
  3047. char *cp, Msg[160];
  3048. double lat, lon, ht;
  3049. if (instance->site_survey == ONCORE_SS_HW) {
  3050. /*
  3051. * Check to see if Hardware SiteSurvey has Finished.
  3052. */
  3053. if ((instance->chan == 8 && !(instance->BEHa[37] & 0x20)) ||
  3054. (instance->chan == 12 && !(instance->BEHa[130] & 0x10))) {
  3055. record_clock_stats(&(instance->peer->srcadr), "Now in 0D mode");
  3056. if (instance->chan == 12)
  3057. oncore_sendmsg(instance->ttyfd, oncore_cmd_Gax, sizeof(oncore_cmd_Gax));
  3058. else
  3059. oncore_sendmsg(instance->ttyfd, oncore_cmd_Asx, sizeof(oncore_cmd_Asx));
  3060. cp = "SSstate = ONCORE_SS_DONE";
  3061. record_clock_stats(&(instance->peer->srcadr), cp);
  3062. instance->site_survey = ONCORE_SS_DONE;
  3063. }
  3064. } else {
  3065. /*
  3066. * Must be a Software Site Survey.
  3067. */
  3068. if (instance->rsm.bad_fix) /* Not if poor geometry or less than 3 sats */
  3069. return;
  3070. if (instance->mode != MODE_3D) /* Use only 3D Fixes */
  3071. return;
  3072. instance->ss_lat += buf_w32(&instance->BEHa[15]);
  3073. instance->ss_long += buf_w32(&instance->BEHa[19]);
  3074. instance->ss_ht += buf_w32(&instance->BEHa[23]); /* GPS ellipsoid */
  3075. instance->ss_count++;
  3076. if (instance->ss_count != POS_HOLD_AVERAGE)
  3077. return;
  3078. instance->ss_lat /= POS_HOLD_AVERAGE;
  3079. instance->ss_long /= POS_HOLD_AVERAGE;
  3080. instance->ss_ht /= POS_HOLD_AVERAGE;
  3081. sprintf(Msg, "Surveyed posn: lat %.3f (mas) long %.3f (mas) ht %.3f (cm)",
  3082. instance->ss_lat, instance->ss_long, instance->ss_ht);
  3083. record_clock_stats(&(instance->peer->srcadr), Msg);
  3084. lat = instance->ss_lat/3600000.;
  3085. lon = instance->ss_long/3600000.;
  3086. ht = instance->ss_ht/100;
  3087. sprintf(Msg, "Surveyed posn: lat %.7f (deg) long %.7f (deg) ht %.2f (m)",
  3088. lat, lon, ht);
  3089. record_clock_stats(&(instance->peer->srcadr), Msg);
  3090. oncore_set_posn(instance);
  3091. record_clock_stats(&(instance->peer->srcadr), "Now in 0D mode");
  3092. cp = "SSstate = ONCORE_SS_DONE";
  3093. record_clock_stats(&(instance->peer->srcadr), cp);
  3094. instance->site_survey = ONCORE_SS_DONE;
  3095. }
  3096. }
  3097. static int
  3098. oncore_wait_almanac(
  3099. struct instance *instance
  3100. )
  3101. {
  3102. if (instance->rsm.bad_almanac) {
  3103. #ifdef DEBUG
  3104. if (debug)
  3105. printf("ONCORE[%d]: waiting for almanac\n", instance->unit);
  3106. #endif
  3107. /*
  3108. * If we get here (first time) then we don't have an almanac in memory.
  3109. * Check if we have a SHMEM, and if so try to load whatever is there.
  3110. */
  3111. if (!instance->almanac_from_shmem) {
  3112. instance->almanac_from_shmem = 1;
  3113. oncore_load_almanac(instance);
  3114. }
  3115. return(1);
  3116. } else { /* Here we have the Almanac, we will be starting the @@Bn/@@En/@@Hn
  3117. commands, and can finally check for TRAIM. Again, we set a delay
  3118. (5sec) and wait for things to settle down */
  3119. if (instance->chan == 6)
  3120. oncore_sendmsg(instance->ttyfd, oncore_cmd_Bn, sizeof(oncore_cmd_Bn));
  3121. else if (instance->chan == 8)
  3122. oncore_sendmsg(instance->ttyfd, oncore_cmd_En, sizeof(oncore_cmd_En));
  3123. else if (instance->chan == 12) {
  3124. oncore_sendmsg(instance->ttyfd, oncore_cmd_Gc, sizeof(oncore_cmd_Gc)); /* 1PPS on, continuous */
  3125. oncore_sendmsg(instance->ttyfd, oncore_cmd_Ge, sizeof(oncore_cmd_Ge)); /* TRAIM on */
  3126. oncore_sendmsg(instance->ttyfd, oncore_cmd_Hn, sizeof(oncore_cmd_Hn)); /* TRAIM status 1/s */
  3127. }
  3128. instance->traim_delay = 1;
  3129. record_clock_stats(&(instance->peer->srcadr), "Have now loaded an ALMANAC");
  3130. instance->o_state = ONCORE_RUN;
  3131. record_clock_stats(&(instance->peer->srcadr), "state = ONCORE_RUN");
  3132. }
  3133. return(0);
  3134. }
  3135. #else
  3136. int refclock_oncore_bs;
  3137. #endif /* REFCLOCK */