PageRenderTime 72ms CodeModel.GetById 18ms RepoModel.GetById 0ms app.codeStats 1ms

/drivers/char/mxser.c

https://bitbucket.org/evzijst/gittest
C | 3170 lines | 2345 code | 422 blank | 403 comment | 619 complexity | 5f4faaf6c629796ead1d3f62fb60ccd8 MD5 | raw file
Possible License(s): CC-BY-SA-3.0, GPL-2.0, LGPL-2.0 
    

  1. /*
    2. 

  2.  *          mxser.c  -- MOXA Smartio/Industio family multiport serial driver.
    3. 

  3.  *
    4. 

  4.  *      Copyright (C) 1999-2001  Moxa Technologies (support@moxa.com.tw).
    5. 

  5.  *
    6. 

  6.  *      This code is loosely based on the Linux serial driver, written by
    7. 

  7.  *      Linus Torvalds, Theodore T'so and others.
    8. 

  8.  *
    9. 

  9.  *      This program is free software; you can redistribute it and/or modify
    10. 

  10.  *      it under the terms of the GNU General Public License as published by
    11. 

  11.  *      the Free Software Foundation; either version 2 of the License, or
    12. 

  12. *      (at your option) any later version.
    13. 

  13.  *
    14. 

  14.  *      This program is distributed in the hope that it will be useful,
    15. 

  15.  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
    16. 

  16.  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    17. 

  17.  *      GNU General Public License for more details.
    18. 

  18.  *
    19. 

  19.  *      You should have received a copy of the GNU General Public License
    20. 

  20.  *      along with this program; if not, write to the Free Software
    21. 

  21.  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
    22. 

  22.  *
    23. 

  23.  *	Original release	10/26/00
    24. 

  24.  *
    25. 

  25.  *	02/06/01	Support MOXA Industio family boards.
    26. 

  26.  *	02/06/01	Support TIOCGICOUNT.
    27. 

  27.  *	02/06/01	Fix the problem for connecting to serial mouse.
    28. 

  28.  *	02/06/01	Fix the problem for H/W flow control.
    29. 

  29.  *	02/06/01	Fix the compling warning when CONFIG_PCI
    30. 

  30.  *			don't be defined.
    31. 

  31.  *
    32. 

  32.  *	Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
    33. 

  33.  *	<alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
    34. 

  34.  *	- Fixed x86_64 cleanness
    35. 

  35.  *	- Fixed sleep with spinlock held in mxser_send_break
    36. 

  36.  */
    37. 

  37. 

  38. 

  39. #include <linux/config.h>
    40. 

  40. #include <linux/module.h>
    41. 

  41. #include <linux/version.h>
    42. 

  42. #include <linux/autoconf.h>
    43. 

  43. #include <linux/errno.h>
    44. 

  44. #include <linux/signal.h>
    45. 

  45. #include <linux/sched.h>
    46. 

  46. #include <linux/timer.h>
    47. 

  47. #include <linux/interrupt.h>
    48. 

  48. #include <linux/tty.h>
    49. 

  49. #include <linux/tty_flip.h>
    50. 

  50. #include <linux/serial.h>
    51. 

  51. #include <linux/serial_reg.h>
    52. 

  52. #include <linux/major.h>
    53. 

  53. #include <linux/string.h>
    54. 

  54. #include <linux/fcntl.h>
    55. 

  55. #include <linux/ptrace.h>
    56. 

  56. #include <linux/gfp.h>
    57. 

  57. #include <linux/ioport.h>
    58. 

  58. #include <linux/mm.h>
    59. 

  59. #include <linux/smp_lock.h>
    60. 

  60. #include <linux/delay.h>
    61. 

  61. #include <linux/pci.h>
    62. 

  62. 

  63. #include <asm/system.h>
    64. 

  64. #include <asm/io.h>
    65. 

  65. #include <asm/irq.h>
    66. 

  66. #include <asm/segment.h>
    67. 

  67. #include <asm/bitops.h>
    68. 

  68. #include <asm/uaccess.h>
    69. 

  69. 

  70. #include "mxser.h"
    71. 

  71. 

  72. #define	MXSER_VERSION	"1.8"
    73. 

  73. #define	MXSERMAJOR	 174
    74. 

  74. #define	MXSERCUMAJOR	 175
    75. 

  75. 

  76. #define	MXSER_EVENT_TXLOW	 1
    77. 

  77. #define	MXSER_EVENT_HANGUP	 2
    78. 

  78. 

  79. #define MXSER_BOARDS		4	/* Max. boards */
    80. 

  80. #define MXSER_PORTS		32	/* Max. ports */
    81. 

  81. #define MXSER_PORTS_PER_BOARD	8	/* Max. ports per board */
    82. 

  82. #define MXSER_ISR_PASS_LIMIT	256
    83. 

  83. 

  84. #define	MXSER_ERR_IOADDR	-1
    85. 

  85. #define	MXSER_ERR_IRQ		-2
    86. 

  86. #define	MXSER_ERR_IRQ_CONFLIT	-3
    87. 

  87. #define	MXSER_ERR_VECTOR	-4
    88. 

  88. 

  89. #define SERIAL_TYPE_NORMAL	1
    90. 

  90. #define SERIAL_TYPE_CALLOUT	2
    91. 

  91. 

  92. #define WAKEUP_CHARS		256
    93. 

  93. 

  94. #define UART_MCR_AFE		0x20
    95. 

  95. #define UART_LSR_SPECIAL	0x1E
    96. 

  96. 

  97. #define RELEVANT_IFLAG(iflag)	(iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK|IXON|IXOFF))
    98. 

  98. 

  99. #define IRQ_T(info) ((info->flags & ASYNC_SHARE_IRQ) ? SA_SHIRQ : SA_INTERRUPT)
    100. 

  100. 

  101. #define C168_ASIC_ID    1
    102. 

  102. #define C104_ASIC_ID    2
    103. 

  103. #define C102_ASIC_ID	0xB
    104. 

  104. #define CI132_ASIC_ID	4
    105. 

  105. #define CI134_ASIC_ID	3
    106. 

  106. #define CI104J_ASIC_ID  5
    107. 

  107. 

  108. enum {
    109. 

  109. 	MXSER_BOARD_C168_ISA = 1,
    110. 

  110. 	MXSER_BOARD_C104_ISA,
    111. 

  111. 	MXSER_BOARD_CI104J,
    112. 

  112. 	MXSER_BOARD_C168_PCI,
    113. 

  113. 	MXSER_BOARD_C104_PCI,
    114. 

  114. 	MXSER_BOARD_C102_ISA,
    115. 

  115. 	MXSER_BOARD_CI132,
    116. 

  116. 	MXSER_BOARD_CI134,
    117. 

  117. 	MXSER_BOARD_CP132,
    118. 

  118. 	MXSER_BOARD_CP114,
    119. 

  119. 	MXSER_BOARD_CT114,
    120. 

  120. 	MXSER_BOARD_CP102,
    121. 

  121. 	MXSER_BOARD_CP104U,
    122. 

  122. 	MXSER_BOARD_CP168U,
    123. 

  123. 	MXSER_BOARD_CP132U,
    124. 

  124. 	MXSER_BOARD_CP134U,
    125. 

  125. 	MXSER_BOARD_CP104JU,
    126. 

  126. 	MXSER_BOARD_RC7000,
    127. 

  127. 	MXSER_BOARD_CP118U,
    128. 

  128. 	MXSER_BOARD_CP102UL,
    129. 

  129. 	MXSER_BOARD_CP102U,
    130. 

  130. };
    131. 

  131. 

  132. static char *mxser_brdname[] = {
    133. 

  133. 	"C168 series",
    134. 

  134. 	"C104 series",
    135. 

  135. 	"CI-104J series",
    136. 

  136. 	"C168H/PCI series",
    137. 

  137. 	"C104H/PCI series",
    138. 

  138. 	"C102 series",
    139. 

  139. 	"CI-132 series",
    140. 

  140. 	"CI-134 series",
    141. 

  141. 	"CP-132 series",
    142. 

  142. 	"CP-114 series",
    143. 

  143. 	"CT-114 series",
    144. 

  144. 	"CP-102 series",
    145. 

  145. 	"CP-104U series",
    146. 

  146. 	"CP-168U series",
    147. 

  147. 	"CP-132U series",
    148. 

  148. 	"CP-134U series",
    149. 

  149. 	"CP-104JU series",
    150. 

  150. 	"Moxa UC7000 Serial",
    151. 

  151. 	"CP-118U series",
    152. 

  152. 	"CP-102UL series",
    153. 

  153. 	"CP-102U series",
    154. 

  154. };
    155. 

  155. 

  156. static int mxser_numports[] = {
    157. 

  157. 	8,			// C168-ISA
    158. 

  158. 	4,			// C104-ISA
    159. 

  159. 	4,			// CI104J
    160. 

  160. 	8,			// C168-PCI
    161. 

  161. 	4,			// C104-PCI
    162. 

  162. 	2,			// C102-ISA
    163. 

  163. 	2,			// CI132
    164. 

  164. 	4,			// CI134
    165. 

  165. 	2,			// CP132
    166. 

  166. 	4,			// CP114
    167. 

  167. 	4,			// CT114
    168. 

  168. 	2,			// CP102
    169. 

  169. 	4,			// CP104U
    170. 

  170. 	8,			// CP168U
    171. 

  171. 	2,			// CP132U
    172. 

  172. 	4,			// CP134U
    173. 

  173. 	4,			// CP104JU
    174. 

  174. 	8,			// RC7000
    175. 

  175. 	8,			// CP118U 
    176. 

  176. 	2,			// CP102UL 
    177. 

  177. 	2,			// CP102U
    178. 

  178. };
    179. 

  179. 

  180. #define UART_TYPE_NUM	2
    181. 

  181. 

  182. static const unsigned int Gmoxa_uart_id[UART_TYPE_NUM] = {
    183. 

  183. 	MOXA_MUST_MU150_HWID,
    184. 

  184. 	MOXA_MUST_MU860_HWID
    185. 

  185. };
    186. 

  186. 

  187. // This is only for PCI
    188. 

  188. #define UART_INFO_NUM	3
    189. 

  189. struct mxpciuart_info {
    190. 

  190. 	int type;
    191. 

  191. 	int tx_fifo;
    192. 

  192. 	int rx_fifo;
    193. 

  193. 	int xmit_fifo_size;
    194. 

  194. 	int rx_high_water;
    195. 

  195. 	int rx_trigger;
    196. 

  196. 	int rx_low_water;
    197. 

  197. 	long max_baud;
    198. 

  198. };
    199. 

  199. 

  200. static const struct mxpciuart_info Gpci_uart_info[UART_INFO_NUM] = {
    201. 

  201. 	{MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
    202. 

  202. 	{MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
    203. 

  203. 	{MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
    204. 

  204. };
    205. 

  205. 

  206. 

  207. #ifdef CONFIG_PCI
    208. 

  208. 

  209. static struct pci_device_id mxser_pcibrds[] = {
    210. 

  210. 	{PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C168, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C168_PCI},
    211. 

  211. 	{PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C104_PCI},
    212. 

  212. 	{PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132},
    213. 

  213. 	{PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP114},
    214. 

  214. 	{PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CT114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CT114},
    215. 

  215. 	{PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102},
    216. 

  216. 	{PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104U},
    217. 

  217. 	{PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP168U},
    218. 

  218. 	{PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132U},
    219. 

  219. 	{PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP134U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP134U},
    220. 

  220. 	{PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104JU, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104JU},
    221. 

  221. 	{PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_RC7000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_RC7000},
    222. 

  222. 	{PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP118U},
    223. 

  223. 	{PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102UL, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102UL},
    224. 

  224. 	{PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102U},
    225. 

  225. 	{0}
    226. 

  226. };
    227. 

  227. 

  228. MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
    229. 

  229. 

  230. 

  231. #endif
    232. 

  232. 

  233. typedef struct _moxa_pci_info {
    234. 

  234. 	unsigned short busNum;
    235. 

  235. 	unsigned short devNum;
    236. 

  236. 	struct pci_dev *pdev;	// add by Victor Yu. 06-23-2003
    237. 

  237. } moxa_pci_info;
    238. 

  238. 

  239. static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
    240. 

  240. static int ttymajor = MXSERMAJOR;
    241. 

  241. static int calloutmajor = MXSERCUMAJOR;
    242. 

  242. static int verbose = 0;
    243. 

  243. 

  244. /* Variables for insmod */
    245. 

  245. 

  246. MODULE_AUTHOR("Casper Yang");
    247. 

  247. MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
    248. 

  248. MODULE_PARM(ioaddr, "1-4i");
    249. 

  249. MODULE_PARM(ttymajor, "i");
    250. 

  250. MODULE_PARM(calloutmajor, "i");
    251. 

  251. MODULE_PARM(verbose, "i");
    252. 

  252. MODULE_LICENSE("GPL");
    253. 

  253. 

  254. struct mxser_log {
    255. 

  255. 	int tick;
    256. 

  256. 	unsigned long rxcnt[MXSER_PORTS];
    257. 

  257. 	unsigned long txcnt[MXSER_PORTS];
    258. 

  258. };
    259. 

  259. 

  260. 

  261. struct mxser_mon {
    262. 

  262. 	unsigned long rxcnt;
    263. 

  263. 	unsigned long txcnt;
    264. 

  264. 	unsigned long up_rxcnt;
    265. 

  265. 	unsigned long up_txcnt;
    266. 

  266. 	int modem_status;
    267. 

  267. 	unsigned char hold_reason;
    268. 

  268. };
    269. 

  269. 

  270. struct mxser_mon_ext {
    271. 

  271. 	unsigned long rx_cnt[32];
    272. 

  272. 	unsigned long tx_cnt[32];
    273. 

  273. 	unsigned long up_rxcnt[32];
    274. 

  274. 	unsigned long up_txcnt[32];
    275. 

  275. 	int modem_status[32];
    276. 

  276. 

  277. 	long baudrate[32];
    278. 

  278. 	int databits[32];
    279. 

  279. 	int stopbits[32];
    280. 

  280. 	int parity[32];
    281. 

  281. 	int flowctrl[32];
    282. 

  282. 	int fifo[32];
    283. 

  283. 	int iftype[32];
    284. 

  284. };
    285. 

  285. struct mxser_hwconf {
    286. 

  286. 	int board_type;
    287. 

  287. 	int ports;
    288. 

  288. 	int irq;
    289. 

  289. 	int vector;
    290. 

  290. 	int vector_mask;
    291. 

  291. 	int uart_type;
    292. 

  292. 	int ioaddr[MXSER_PORTS_PER_BOARD];
    293. 

  293. 	int baud_base[MXSER_PORTS_PER_BOARD];
    294. 

  294. 	moxa_pci_info pciInfo;
    295. 

  295. 	int IsMoxaMustChipFlag;	// add by Victor Yu. 08-30-2002
    296. 

  296. 	int MaxCanSetBaudRate[MXSER_PORTS_PER_BOARD];	// add by Victor Yu. 09-04-2002
    297. 

  297. 	int opmode_ioaddr[MXSER_PORTS_PER_BOARD];	// add by Victor Yu. 01-05-2004
    298. 

  298. };
    299. 

  299. 

  300. struct mxser_struct {
    301. 

  301. 	int port;
    302. 

  302. 	int base;		/* port base address */
    303. 

  303. 	int irq;		/* port using irq no. */
    304. 

  304. 	int vector;		/* port irq vector */
    305. 

  305. 	int vectormask;		/* port vector mask */
    306. 

  306. 	int rx_high_water;
    307. 

  307. 	int rx_trigger;		/* Rx fifo trigger level */
    308. 

  308. 	int rx_low_water;
    309. 

  309. 	int baud_base;		/* max. speed */
    310. 

  310. 	int flags;		/* defined in tty.h */
    311. 

  311. 	int type;		/* UART type */
    312. 

  312. 	struct tty_struct *tty;
    313. 

  313. 	int read_status_mask;
    314. 

  314. 	int ignore_status_mask;
    315. 

  315. 	int xmit_fifo_size;
    316. 

  316. 	int custom_divisor;
    317. 

  317. 	int x_char;		/* xon/xoff character */
    318. 

  318. 	int close_delay;
    319. 

  319. 	unsigned short closing_wait;
    320. 

  320. 	int IER;		/* Interrupt Enable Register */
    321. 

  321. 	int MCR;		/* Modem control register */
    322. 

  322. 	unsigned long event;
    323. 

  323. 	int count;		/* # of fd on device */
    324. 

  324. 	int blocked_open;	/* # of blocked opens */
    325. 

  325. 	long session;		/* Session of opening process */
    326. 

  326. 	long pgrp;		/* pgrp of opening process */
    327. 

  327. 	unsigned char *xmit_buf;
    328. 

  328. 	int xmit_head;
    329. 

  329. 	int xmit_tail;
    330. 

  330. 	int xmit_cnt;
    331. 

  331. 	struct work_struct tqueue;
    332. 

  332. 	struct termios normal_termios;
    333. 

  333. 	struct termios callout_termios;
    334. 

  334. 	wait_queue_head_t open_wait;
    335. 

  335. 	wait_queue_head_t close_wait;
    336. 

  336. 	wait_queue_head_t delta_msr_wait;
    337. 

  337. 	struct async_icount icount;	/* kernel counters for the 4 input interrupts */
    338. 

  338. 	int timeout;
    339. 

  339. 	int IsMoxaMustChipFlag;	// add by Victor Yu. 08-30-2002
    340. 

  340. 	int MaxCanSetBaudRate;	// add by Victor Yu. 09-04-2002
    341. 

  341. 	int opmode_ioaddr;	// add by Victor Yu. 01-05-2004
    342. 

  342. 	unsigned char stop_rx;
    343. 

  343. 	unsigned char ldisc_stop_rx;
    344. 

  344. 	long realbaud;
    345. 

  345. 	struct mxser_mon mon_data;
    346. 

  346. 	unsigned char err_shadow;
    347. 

  347. 	spinlock_t slock;
    348. 

  348. };
    349. 

  349. 

  350. 

  351. struct mxser_mstatus {
    352. 

  352. 	tcflag_t cflag;
    353. 

  353. 	int cts;
    354. 

  354. 	int dsr;
    355. 

  355. 	int ri;
    356. 

  356. 	int dcd;
    357. 

  357. };
    358. 

  358. 

  359. static struct mxser_mstatus GMStatus[MXSER_PORTS];
    360. 

  360. 

  361. static int mxserBoardCAP[MXSER_BOARDS] = {
    362. 

  362. 	0, 0, 0, 0
    363. 

  363. 	    /*  0x180, 0x280, 0x200, 0x320   */
    364. 

  364. };
    365. 

  365. 

  366. static struct tty_driver *mxvar_sdriver;
    367. 

  367. static struct mxser_struct mxvar_table[MXSER_PORTS];
    368. 

  368. static struct tty_struct *mxvar_tty[MXSER_PORTS + 1];
    369. 

  369. static struct termios *mxvar_termios[MXSER_PORTS + 1];
    370. 

  370. static struct termios *mxvar_termios_locked[MXSER_PORTS + 1];
    371. 

  371. static struct mxser_log mxvar_log;
    372. 

  372. static int mxvar_diagflag;
    373. 

  373. static unsigned char mxser_msr[MXSER_PORTS + 1];
    374. 

  374. static struct mxser_mon_ext mon_data_ext;
    375. 

  375. static int mxser_set_baud_method[MXSER_PORTS + 1];
    376. 

  376. static spinlock_t gm_lock;
    377. 

  377. 

  378. /*
    379. 

  379.  * This is used to figure out the divisor speeds and the timeouts
    380. 

  380.  */
    381. 

  381. 

  382. static struct mxser_hwconf mxsercfg[MXSER_BOARDS];
    383. 

  383. 

  384. /*
    385. 

  385.  * static functions:
    386. 

  386.  */
    387. 

  387. 

  388. static void mxser_getcfg(int board, struct mxser_hwconf *hwconf);
    389. 

  389. static int mxser_init(void);
    390. 

  390. 

  391. //static void   mxser_poll(unsigned long);
    392. 

  392. static int mxser_get_ISA_conf(int, struct mxser_hwconf *);
    393. 

  393. static int mxser_get_PCI_conf(int, int, int, struct mxser_hwconf *);
    394. 

  394. static void mxser_do_softint(void *);
    395. 

  395. static int mxser_open(struct tty_struct *, struct file *);
    396. 

  396. static void mxser_close(struct tty_struct *, struct file *);
    397. 

  397. static int mxser_write(struct tty_struct *, const unsigned char *, int);
    398. 

  398. static int mxser_write_room(struct tty_struct *);
    399. 

  399. static void mxser_flush_buffer(struct tty_struct *);
    400. 

  400. static int mxser_chars_in_buffer(struct tty_struct *);
    401. 

  401. static void mxser_flush_chars(struct tty_struct *);
    402. 

  402. static void mxser_put_char(struct tty_struct *, unsigned char);
    403. 

  403. static int mxser_ioctl(struct tty_struct *, struct file *, uint, ulong);
    404. 

  404. static int mxser_ioctl_special(unsigned int, void __user *);
    405. 

  405. static void mxser_throttle(struct tty_struct *);
    406. 

  406. static void mxser_unthrottle(struct tty_struct *);
    407. 

  407. static void mxser_set_termios(struct tty_struct *, struct termios *);
    408. 

  408. static void mxser_stop(struct tty_struct *);
    409. 

  409. static void mxser_start(struct tty_struct *);
    410. 

  410. static void mxser_hangup(struct tty_struct *);
    411. 

  411. static void mxser_rs_break(struct tty_struct *, int);
    412. 

  412. static irqreturn_t mxser_interrupt(int, void *, struct pt_regs *);
    413. 

  413. static void mxser_receive_chars(struct mxser_struct *, int *);
    414. 

  414. static void mxser_transmit_chars(struct mxser_struct *);
    415. 

  415. static void mxser_check_modem_status(struct mxser_struct *, int);
    416. 

  416. static int mxser_block_til_ready(struct tty_struct *, struct file *, struct mxser_struct *);
    417. 

  417. static int mxser_startup(struct mxser_struct *);
    418. 

  418. static void mxser_shutdown(struct mxser_struct *);
    419. 

  419. static int mxser_change_speed(struct mxser_struct *, struct termios *old_termios);
    420. 

  420. static int mxser_get_serial_info(struct mxser_struct *, struct serial_struct __user *);
    421. 

  421. static int mxser_set_serial_info(struct mxser_struct *, struct serial_struct __user *);
    422. 

  422. static int mxser_get_lsr_info(struct mxser_struct *, unsigned int __user *);
    423. 

  423. static void mxser_send_break(struct mxser_struct *, int);
    424. 

  424. static int mxser_tiocmget(struct tty_struct *, struct file *);
    425. 

  425. static int mxser_tiocmset(struct tty_struct *, struct file *, unsigned int, unsigned int);
    426. 

  426. static int mxser_set_baud(struct mxser_struct *info, long newspd);
    427. 

  427. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout);
    428. 

  428. 

  429. static void mxser_startrx(struct tty_struct *tty);
    430. 

  430. static void mxser_stoprx(struct tty_struct *tty);
    431. 

  431. 

  432. 

  433. static int CheckIsMoxaMust(int io)
    434. 

  434. {
    435. 

  435. 	u8 oldmcr, hwid;
    436. 

  436. 	int i;
    437. 

  437. 

  438. 	outb(0, io + UART_LCR);
    439. 

  439. 	DISABLE_MOXA_MUST_ENCHANCE_MODE(io);
    440. 

  440. 	oldmcr = inb(io + UART_MCR);
    441. 

  441. 	outb(0, io + UART_MCR);
    442. 

  442. 	SET_MOXA_MUST_XON1_VALUE(io, 0x11);
    443. 

  443. 	if ((hwid = inb(io + UART_MCR)) != 0) {
    444. 

  444. 		outb(oldmcr, io + UART_MCR);
    445. 

  445. 		return (MOXA_OTHER_UART);
    446. 

  446. 	}
    447. 

  447. 

  448. 	GET_MOXA_MUST_HARDWARE_ID(io, &hwid);
    449. 

  449. 	for (i = 0; i < UART_TYPE_NUM; i++) {
    450. 

  450. 		if (hwid == Gmoxa_uart_id[i])
    451. 

  451. 			return (int) hwid;
    452. 

  452. 	}
    453. 

  453. 	return MOXA_OTHER_UART;
    454. 

  454. }
    455. 

  455. 

  456. // above is modified by Victor Yu. 08-15-2002
    457. 

  457. 

  458. static struct tty_operations mxser_ops = {
    459. 

  459. 	.open = mxser_open,
    460. 

  460. 	.close = mxser_close,
    461. 

  461. 	.write = mxser_write,
    462. 

  462. 	.put_char = mxser_put_char,
    463. 

  463. 	.flush_chars = mxser_flush_chars,
    464. 

  464. 	.write_room = mxser_write_room,
    465. 

  465. 	.chars_in_buffer = mxser_chars_in_buffer,
    466. 

  466. 	.flush_buffer = mxser_flush_buffer,
    467. 

  467. 	.ioctl = mxser_ioctl,
    468. 

  468. 	.throttle = mxser_throttle,
    469. 

  469. 	.unthrottle = mxser_unthrottle,
    470. 

  470. 	.set_termios = mxser_set_termios,
    471. 

  471. 	.stop = mxser_stop,
    472. 

  472. 	.start = mxser_start,
    473. 

  473. 	.hangup = mxser_hangup,
    474. 

  474. 	.tiocmget = mxser_tiocmget,
    475. 

  475. 	.tiocmset = mxser_tiocmset,
    476. 

  476. };
    477. 

  477. 

  478. /*
    479. 

  479.  * The MOXA Smartio/Industio serial driver boot-time initialization code!
    480. 

  480.  */
    481. 

  481. 

  482. static int __init mxser_module_init(void)
    483. 

  483. {
    484. 

  484. 	int ret;
    485. 

  485. 

  486. 	if (verbose)
    487. 

  487. 		printk(KERN_DEBUG "Loading module mxser ...\n");
    488. 

  488. 	ret = mxser_init();
    489. 

  489. 	if (verbose)
    490. 

  490. 		printk(KERN_DEBUG "Done.\n");
    491. 

  491. 	return ret;
    492. 

  492. }
    493. 

  493. 

  494. static void __exit mxser_module_exit(void)
    495. 

  495. {
    496. 

  496. 	int i, err = 0;
    497. 

  497. 

  498. 	if (verbose)
    499. 

  499. 		printk(KERN_DEBUG "Unloading module mxser ...\n");
    500. 

  500. 

  501. 	if ((err |= tty_unregister_driver(mxvar_sdriver)))
    502. 

  502. 		printk(KERN_ERR "Couldn't unregister MOXA Smartio/Industio family serial driver\n");
    503. 

  503. 

  504. 	for (i = 0; i < MXSER_BOARDS; i++) {
    505. 

  505. 		struct pci_dev *pdev;
    506. 

  506. 

  507. 		if (mxsercfg[i].board_type == -1)
    508. 

  508. 			continue;
    509. 

  509. 		else {
    510. 

  510. 			pdev = mxsercfg[i].pciInfo.pdev;
    511. 

  511. 			free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
    512. 

  512. 			if (pdev != NULL) {	//PCI
    513. 

  513. 				release_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
    514. 

  514. 				release_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3));
    515. 

  515. 			} else {
    516. 

  516. 				release_region(mxsercfg[i].ioaddr[0], 8 * mxsercfg[i].ports);
    517. 

  517. 				release_region(mxsercfg[i].vector, 1);
    518. 

  518. 			}
    519. 

  519. 		}
    520. 

  520. 	}
    521. 

  521. 	if (verbose)
    522. 

  522. 		printk(KERN_DEBUG "Done.\n");
    523. 

  523. 

  524. }
    525. 

  525. 

  526. static void process_txrx_fifo(struct mxser_struct *info)
    527. 

  527. {
    528. 

  528. 	int i;
    529. 

  529. 

  530. 	if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
    531. 

  531. 		info->rx_trigger = 1;
    532. 

  532. 		info->rx_high_water = 1;
    533. 

  533. 		info->rx_low_water = 1;
    534. 

  534. 		info->xmit_fifo_size = 1;
    535. 

  535. 	} else {
    536. 

  536. 		for (i = 0; i < UART_INFO_NUM; i++) {
    537. 

  537. 			if (info->IsMoxaMustChipFlag == Gpci_uart_info[i].type) {
    538. 

  538. 				info->rx_trigger = Gpci_uart_info[i].rx_trigger;
    539. 

  539. 				info->rx_low_water = Gpci_uart_info[i].rx_low_water;
    540. 

  540. 				info->rx_high_water = Gpci_uart_info[i].rx_high_water;
    541. 

  541. 				info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
    542. 

  542. 				break;
    543. 

  543. 			}
    544. 

  544. 		}
    545. 

  545. 	}
    546. 

  546. }
    547. 

  547. 

  548. static int mxser_initbrd(int board, struct mxser_hwconf *hwconf)
    549. 

  549. {
    550. 

  550. 	struct mxser_struct *info;
    551. 

  551. 	int retval;
    552. 

  552. 	int i, n;
    553. 

  553. 

  554. 	n = board * MXSER_PORTS_PER_BOARD;
    555. 

  555. 	info = &mxvar_table[n];
    556. 

  556. 	/*if (verbose) */  {
    557. 

  557. 		printk(KERN_DEBUG "        ttyM%d - ttyM%d ", n, n + hwconf->ports - 1);
    558. 

  558. 		printk(" max. baud rate = %d bps.\n", hwconf->MaxCanSetBaudRate[0]);
    559. 

  559. 	}
    560. 

  560. 

  561. 	for (i = 0; i < hwconf->ports; i++, n++, info++) {
    562. 

  562. 		info->port = n;
    563. 

  563. 		info->base = hwconf->ioaddr[i];
    564. 

  564. 		info->irq = hwconf->irq;
    565. 

  565. 		info->vector = hwconf->vector;
    566. 

  566. 		info->vectormask = hwconf->vector_mask;
    567. 

  567. 		info->opmode_ioaddr = hwconf->opmode_ioaddr[i];	// add by Victor Yu. 01-05-2004
    568. 

  568. 		info->stop_rx = 0;
    569. 

  569. 		info->ldisc_stop_rx = 0;
    570. 

  570. 

  571. 		info->IsMoxaMustChipFlag = hwconf->IsMoxaMustChipFlag;
    572. 

  572. 		//Enhance mode enabled here
    573. 

  573. 		if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
    574. 

  574. 			ENABLE_MOXA_MUST_ENCHANCE_MODE(info->base);
    575. 

  575. 		}
    576. 

  576. 

  577. 		info->flags = ASYNC_SHARE_IRQ;
    578. 

  578. 		info->type = hwconf->uart_type;
    579. 

  579. 		info->baud_base = hwconf->baud_base[i];
    580. 

  580. 

  581. 		info->MaxCanSetBaudRate = hwconf->MaxCanSetBaudRate[i];
    582. 

  582. 

  583. 		process_txrx_fifo(info);
    584. 

  584. 

  585. 

  586. 		info->custom_divisor = hwconf->baud_base[i] * 16;
    587. 

  587. 		info->close_delay = 5 * HZ / 10;
    588. 

  588. 		info->closing_wait = 30 * HZ;
    589. 

  589. 		INIT_WORK(&info->tqueue, mxser_do_softint, info);
    590. 

  590. 		info->normal_termios = mxvar_sdriver->init_termios;
    591. 

  591. 		init_waitqueue_head(&info->open_wait);
    592. 

  592. 		init_waitqueue_head(&info->close_wait);
    593. 

  593. 		init_waitqueue_head(&info->delta_msr_wait);
    594. 

  594. 		memset(&info->mon_data, 0, sizeof(struct mxser_mon));
    595. 

  595. 		info->err_shadow = 0;
    596. 

  596. 		spin_lock_init(&info->slock);
    597. 

  597. 	}
    598. 

  598. 	/*
    599. 

  599. 	 * Allocate the IRQ if necessary
    600. 

  600. 	 */
    601. 

  601. 

  602. 

  603. 	/* before set INT ISR, disable all int */
    604. 

  604. 	for (i = 0; i < hwconf->ports; i++) {
    605. 

  605. 		outb(inb(hwconf->ioaddr[i] + UART_IER) & 0xf0, hwconf->ioaddr[i] + UART_IER);
    606. 

  606. 	}
    607. 

  607. 

  608. 	n = board * MXSER_PORTS_PER_BOARD;
    609. 

  609. 	info = &mxvar_table[n];
    610. 

  610. 

  611. 	retval = request_irq(hwconf->irq, mxser_interrupt, IRQ_T(info), "mxser", info);
    612. 

  612. 	if (retval) {
    613. 

  613. 		printk(KERN_ERR "Board %d: %s", board, mxser_brdname[hwconf->board_type - 1]);
    614. 

  614. 		printk("  Request irq fail,IRQ (%d) may be conflit with another device.\n", info->irq);
    615. 

  615. 		return retval;
    616. 

  616. 	}
    617. 

  617. 	return 0;
    618. 

  618. }
    619. 

  619. 

  620. 

  621. static void mxser_getcfg(int board, struct mxser_hwconf *hwconf)
    622. 

  622. {
    623. 

  623. 	mxsercfg[board] = *hwconf;
    624. 

  624. }
    625. 

  625. 

  626. #ifdef CONFIG_PCI
    627. 

  627. static int mxser_get_PCI_conf(int busnum, int devnum, int board_type, struct mxser_hwconf *hwconf)
    628. 

  628. {
    629. 

  629. 	int i, j;
    630. 

  630. //      unsigned int    val;
    631. 

  631. 	unsigned int ioaddress;
    632. 

  632. 	struct pci_dev *pdev = hwconf->pciInfo.pdev;
    633. 

  633. 

  634. 	//io address
    635. 

  635. 	hwconf->board_type = board_type;
    636. 

  636. 	hwconf->ports = mxser_numports[board_type - 1];
    637. 

  637. 	ioaddress = pci_resource_start(pdev, 2);
    638. 

  638. 	request_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2), "mxser(IO)");
    639. 

  639. 

  640. 	for (i = 0; i < hwconf->ports; i++) {
    641. 

  641. 		hwconf->ioaddr[i] = ioaddress + 8 * i;
    642. 

  642. 	}
    643. 

  643. 

  644. 	//vector
    645. 

  645. 	ioaddress = pci_resource_start(pdev, 3);
    646. 

  646. 	request_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3), "mxser(vector)");
    647. 

  647. 	hwconf->vector = ioaddress;
    648. 

  648. 

  649. 	//irq
    650. 

  650. 	hwconf->irq = hwconf->pciInfo.pdev->irq;
    651. 

  651. 

  652. 	hwconf->IsMoxaMustChipFlag = CheckIsMoxaMust(hwconf->ioaddr[0]);
    653. 

  653. 	hwconf->uart_type = PORT_16550A;
    654. 

  654. 	hwconf->vector_mask = 0;
    655. 

  655. 

  656. 

  657. 	for (i = 0; i < hwconf->ports; i++) {
    658. 

  658. 		for (j = 0; j < UART_INFO_NUM; j++) {
    659. 

  659. 			if (Gpci_uart_info[j].type == hwconf->IsMoxaMustChipFlag) {
    660. 

  660. 				hwconf->MaxCanSetBaudRate[i] = Gpci_uart_info[j].max_baud;
    661. 

  661. 

  662. 				//exception....CP-102
    663. 

  663. 				if (board_type == MXSER_BOARD_CP102)
    664. 

  664. 					hwconf->MaxCanSetBaudRate[i] = 921600;
    665. 

  665. 				break;
    666. 

  666. 			}
    667. 

  667. 		}
    668. 

  668. 	}
    669. 

  669. 

  670. 	if (hwconf->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID) {
    671. 

  671. 		for (i = 0; i < hwconf->ports; i++) {
    672. 

  672. 			if (i < 4)
    673. 

  673. 				hwconf->opmode_ioaddr[i] = ioaddress + 4;
    674. 

  674. 			else
    675. 

  675. 				hwconf->opmode_ioaddr[i] = ioaddress + 0x0c;
    676. 

  676. 		}
    677. 

  677. 		outb(0, ioaddress + 4);	// default set to RS232 mode
    678. 

  678. 		outb(0, ioaddress + 0x0c);	//default set to RS232 mode
    679. 

  679. 	}
    680. 

  680. 

  681. 	for (i = 0; i < hwconf->ports; i++) {
    682. 

  682. 		hwconf->vector_mask |= (1 << i);
    683. 

  683. 		hwconf->baud_base[i] = 921600;
    684. 

  684. 	}
    685. 

  685. 	return (0);
    686. 

  686. }
    687. 

  687. #endif
    688. 

  688. 

  689. static int mxser_init(void)
    690. 

  690. {
    691. 

  691. 	int i, m, retval, b, n;
    692. 

  692. 	int ret1;
    693. 

  693. 	struct pci_dev *pdev = NULL;
    694. 

  694. 	int index;
    695. 

  695. 	unsigned char busnum, devnum;
    696. 

  696. 	struct mxser_hwconf hwconf;
    697. 

  697. 

  698. 	mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
    699. 

  699. 	if (!mxvar_sdriver)
    700. 

  700. 		return -ENOMEM;
    701. 

  701. 	spin_lock_init(&gm_lock);
    702. 

  702. 

  703. 	for (i = 0; i < MXSER_BOARDS; i++) {
    704. 

  704. 		mxsercfg[i].board_type = -1;
    705. 

  705. 	}
    706. 

  706. 

  707. 	printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n", MXSER_VERSION);
    708. 

  708. 

  709. 	/* Initialize the tty_driver structure */
    710. 

  710. 	memset(mxvar_sdriver, 0, sizeof(struct tty_driver));
    711. 

  711. 	mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
    712. 

  712. 	mxvar_sdriver->name = "ttyM";
    713. 

  713. 	mxvar_sdriver->major = ttymajor;
    714. 

  714. 	mxvar_sdriver->minor_start = 0;
    715. 

  715. 	mxvar_sdriver->num = MXSER_PORTS + 1;
    716. 

  716. 	mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
    717. 

  717. 	mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
    718. 

  718. 	mxvar_sdriver->init_termios = tty_std_termios;
    719. 

  719. 	mxvar_sdriver->init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL | CLOCAL;
    720. 

  720. 	mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW;
    721. 

  721. 	tty_set_operations(mxvar_sdriver, &mxser_ops);
    722. 

  722. 	mxvar_sdriver->ttys = mxvar_tty;
    723. 

  723. 	mxvar_sdriver->termios = mxvar_termios;
    724. 

  724. 	mxvar_sdriver->termios_locked = mxvar_termios_locked;
    725. 

  725. 

  726. 	mxvar_sdriver->open = mxser_open;
    727. 

  727. 	mxvar_sdriver->close = mxser_close;
    728. 

  728. 	mxvar_sdriver->write = mxser_write;
    729. 

  729. 	mxvar_sdriver->put_char = mxser_put_char;
    730. 

  730. 	mxvar_sdriver->flush_chars = mxser_flush_chars;
    731. 

  731. 	mxvar_sdriver->write_room = mxser_write_room;
    732. 

  732. 	mxvar_sdriver->chars_in_buffer = mxser_chars_in_buffer;
    733. 

  733. 	mxvar_sdriver->flush_buffer = mxser_flush_buffer;
    734. 

  734. 	mxvar_sdriver->ioctl = mxser_ioctl;
    735. 

  735. 	mxvar_sdriver->throttle = mxser_throttle;
    736. 

  736. 	mxvar_sdriver->unthrottle = mxser_unthrottle;
    737. 

  737. 	mxvar_sdriver->set_termios = mxser_set_termios;
    738. 

  738. 	mxvar_sdriver->stop = mxser_stop;
    739. 

  739. 	mxvar_sdriver->start = mxser_start;
    740. 

  740. 	mxvar_sdriver->hangup = mxser_hangup;
    741. 

  741. 	mxvar_sdriver->break_ctl = mxser_rs_break;
    742. 

  742. 	mxvar_sdriver->wait_until_sent = mxser_wait_until_sent;
    743. 

  743. 

  744. 	mxvar_diagflag = 0;
    745. 

  745. 	memset(mxvar_table, 0, MXSER_PORTS * sizeof(struct mxser_struct));
    746. 

  746. 	memset(&mxvar_log, 0, sizeof(struct mxser_log));
    747. 

  747. 

  748. 	memset(&mxser_msr, 0, sizeof(unsigned char) * (MXSER_PORTS + 1));
    749. 

  749. 	memset(&mon_data_ext, 0, sizeof(struct mxser_mon_ext));
    750. 

  750. 	memset(&mxser_set_baud_method, 0, sizeof(int) * (MXSER_PORTS + 1));
    751. 

  751. 	memset(&hwconf, 0, sizeof(struct mxser_hwconf));
    752. 

  752. 

  753. 	m = 0;
    754. 

  754. 	/* Start finding ISA boards here */
    755. 

  755. 	for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
    756. 

  756. 		int cap;
    757. 

  757. 		if (!(cap = mxserBoardCAP[b]))
    758. 

  758. 			continue;
    759. 

  759. 

  760. 		retval = mxser_get_ISA_conf(cap, &hwconf);
    761. 

  761. 

  762. 		if (retval != 0)
    763. 

  763. 			printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n", mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
    764. 

  764. 

  765. 		if (retval <= 0) {
    766. 

  766. 			if (retval == MXSER_ERR_IRQ)
    767. 

  767. 				printk(KERN_ERR "Invalid interrupt number,board not configured\n");
    768. 

  768. 			else if (retval == MXSER_ERR_IRQ_CONFLIT)
    769. 

  769. 				printk(KERN_ERR "Invalid interrupt number,board not configured\n");
    770. 

  770. 			else if (retval == MXSER_ERR_VECTOR)
    771. 

  771. 				printk(KERN_ERR "Invalid interrupt vector,board not configured\n");
    772. 

  772. 			else if (retval == MXSER_ERR_IOADDR)
    773. 

  773. 				printk(KERN_ERR "Invalid I/O address,board not configured\n");
    774. 

  774. 

  775. 			continue;
    776. 

  776. 		}
    777. 

  777. 

  778. 		hwconf.pciInfo.busNum = 0;
    779. 

  779. 		hwconf.pciInfo.devNum = 0;
    780. 

  780. 		hwconf.pciInfo.pdev = NULL;
    781. 

  781. 

  782. 		mxser_getcfg(m, &hwconf);
    783. 

  783. 		//init mxsercfg first, or mxsercfg data is not correct on ISR.
    784. 

  784. 		//mxser_initbrd will hook ISR.
    785. 

  785. 		if (mxser_initbrd(m, &hwconf) < 0)
    786. 

  786. 			continue;
    787. 

  787. 

  788. 

  789. 		m++;
    790. 

  790. 	}
    791. 

  791. 

  792. 	/* Start finding ISA boards from module arg */
    793. 

  793. 	for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
    794. 

  794. 		int cap;
    795. 

  795. 		if (!(cap = ioaddr[b]))
    796. 

  796. 			continue;
    797. 

  797. 

  798. 		retval = mxser_get_ISA_conf(cap, &hwconf);
    799. 

  799. 

  800. 		if (retval != 0)
    801. 

  801. 			printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n", mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
    802. 

  802. 

  803. 		if (retval <= 0) {
    804. 

  804. 			if (retval == MXSER_ERR_IRQ)
    805. 

  805. 				printk(KERN_ERR "Invalid interrupt number,board not configured\n");
    806. 

  806. 			else if (retval == MXSER_ERR_IRQ_CONFLIT)
    807. 

  807. 				printk(KERN_ERR "Invalid interrupt number,board not configured\n");
    808. 

  808. 			else if (retval == MXSER_ERR_VECTOR)
    809. 

  809. 				printk(KERN_ERR "Invalid interrupt vector,board not configured\n");
    810. 

  810. 			else if (retval == MXSER_ERR_IOADDR)
    811. 

  811. 				printk(KERN_ERR "Invalid I/O address,board not configured\n");
    812. 

  812. 

  813. 			continue;
    814. 

  814. 		}
    815. 

  815. 

  816. 		hwconf.pciInfo.busNum = 0;
    817. 

  817. 		hwconf.pciInfo.devNum = 0;
    818. 

  818. 		hwconf.pciInfo.pdev = NULL;
    819. 

  819. 

  820. 		mxser_getcfg(m, &hwconf);
    821. 

  821. 		//init mxsercfg first, or mxsercfg data is not correct on ISR.
    822. 

  822. 		//mxser_initbrd will hook ISR.
    823. 

  823. 		if (mxser_initbrd(m, &hwconf) < 0)
    824. 

  824. 			continue;
    825. 

  825. 

  826. 		m++;
    827. 

  827. 	}
    828. 

  828. 

  829. 	/* start finding PCI board here */
    830. 

  830. #ifdef CONFIG_PCI
    831. 

  831. 	n = (sizeof(mxser_pcibrds) / sizeof(mxser_pcibrds[0])) - 1;
    832. 

  832. 	index = 0;
    833. 

  833. 	b = 0;
    834. 

  834. 	while (b < n) {
    835. 

  835. 		pdev = pci_find_device(mxser_pcibrds[b].vendor, mxser_pcibrds[b].device, pdev);
    836. 

  836. 			if (pdev == NULL) {
    837. 

  837. 			b++;
    838. 

  838. 			continue;
    839. 

  839. 		}
    840. 

  840. 		hwconf.pciInfo.busNum = busnum = pdev->bus->number;
    841. 

  841. 		hwconf.pciInfo.devNum = devnum = PCI_SLOT(pdev->devfn) << 3;
    842. 

  842. 		hwconf.pciInfo.pdev = pdev;
    843. 

  843. 		printk(KERN_INFO "Found MOXA %s board(BusNo=%d,DevNo=%d)\n", mxser_brdname[(int) (mxser_pcibrds[b].driver_data) - 1], busnum, devnum >> 3);
    844. 

  844. 		index++;
    845. 

  845. 		if (m >= MXSER_BOARDS) {
    846. 

  846. 			printk(KERN_ERR "Too many Smartio/Industio family boards find (maximum %d),board not configured\n", MXSER_BOARDS);
    847. 

  847. 		} else {
    848. 

  848. 			if (pci_enable_device(pdev)) {
    849. 

  849. 				printk(KERN_ERR "Moxa SmartI/O PCI enable fail !\n");
    850. 

  850. 				continue;
    851. 

  851. 			}
    852. 

  852. 			retval = mxser_get_PCI_conf(busnum, devnum, (int) mxser_pcibrds[b].driver_data, &hwconf);
    853. 

  853. 			if (retval < 0) {
    854. 

  854. 				if (retval == MXSER_ERR_IRQ)
    855. 

  855. 					printk(KERN_ERR "Invalid interrupt number,board not configured\n");
    856. 

  856. 				else if (retval == MXSER_ERR_IRQ_CONFLIT)
    857. 

  857. 					printk(KERN_ERR "Invalid interrupt number,board not configured\n");
    858. 

  858. 				else if (retval == MXSER_ERR_VECTOR)
    859. 

  859. 					printk(KERN_ERR "Invalid interrupt vector,board not configured\n");
    860. 

  860. 				else if (retval == MXSER_ERR_IOADDR)
    861. 

  861. 					printk(KERN_ERR "Invalid I/O address,board not configured\n");
    862. 

  862. 				continue;
    863. 

  863. 			}
    864. 

  864. 			mxser_getcfg(m, &hwconf);
    865. 

  865. 			//init mxsercfg first, or mxsercfg data is not correct on ISR.
    866. 

  866. 			//mxser_initbrd will hook ISR.
    867. 

  867. 			if (mxser_initbrd(m, &hwconf) < 0)
    868. 

  868. 				continue;
    869. 

  869. 			m++;
    870. 

  870. 		}
    871. 

  871. 	}
    872. 

  872. #endif
    873. 

  873. 

  874. 	ret1 = 0;
    875. 

  875. 	if (!(ret1 = tty_register_driver(mxvar_sdriver))) {
    876. 

  876. 		return 0;
    877. 

  877. 	} else
    878. 

  878. 		printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family driver !\n");
    879. 

  879. 

  880. 

  881. 	if (ret1) {
    882. 

  882. 		for (i = 0; i < MXSER_BOARDS; i++) {
    883. 

  883. 			if (mxsercfg[i].board_type == -1)
    884. 

  884. 				continue;
    885. 

  885. 			else {
    886. 

  886. 				free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
    887. 

  887. 				//todo: release io, vector
    888. 

  888. 			}
    889. 

  889. 		}
    890. 

  890. 		return -1;
    891. 

  891. 	}
    892. 

  892. 

  893. 	return (0);
    894. 

  894. }
    895. 

  895. 

  896. static void mxser_do_softint(void *private_)
    897. 

  897. {
    898. 

  898. 	struct mxser_struct *info = (struct mxser_struct *) private_;
    899. 

  899. 	struct tty_struct *tty;
    900. 

  900. 

  901. 	tty = info->tty;
    902. 

  902. 

  903. 	if (tty) {
    904. 

  904. 		if (test_and_clear_bit(MXSER_EVENT_TXLOW, &info->event))
    905. 

  905. 			tty_wakeup(tty);
    906. 

  906. 		if (test_and_clear_bit(MXSER_EVENT_HANGUP, &info->event))
    907. 

  907. 			tty_hangup(tty);
    908. 

  908. 	}
    909. 

  909. }
    910. 

  910. 

  911. static unsigned char mxser_get_msr(int baseaddr, int mode, int port, struct mxser_struct *info)
    912. 

  912. {
    913. 

  913. 	unsigned char status = 0;
    914. 

  914. 

  915. 	status = inb(baseaddr + UART_MSR);
    916. 

  916. 

  917. 	mxser_msr[port] &= 0x0F;
    918. 

  918. 	mxser_msr[port] |= status;
    919. 

  919. 	status = mxser_msr[port];
    920. 

  920. 	if (mode)
    921. 

  921. 		mxser_msr[port] = 0;
    922. 

  922. 

  923. 	return status;
    924. 

  924. }
    925. 

  925. 

  926. /*
    927. 

  927.  * This routine is called whenever a serial port is opened.  It
    928. 

  928.  * enables interrupts for a serial port, linking in its async structure into
    929. 

  929.  * the IRQ chain.   It also performs the serial-specific
    930. 

  930.  * initialization for the tty structure.
    931. 

  931.  */
    932. 

  932. static int mxser_open(struct tty_struct *tty, struct file *filp)
    933. 

  933. {
    934. 

  934. 	struct mxser_struct *info;
    935. 

  935. 	int retval, line;
    936. 

  936. 

  937. 	line = tty->index;
    938. 

  938. 	if (line == MXSER_PORTS)
    939. 

  939. 		return 0;
    940. 

  940. 	if (line < 0 || line > MXSER_PORTS)
    941. 

  941. 		return -ENODEV;
    942. 

  942. 	info = mxvar_table + line;
    943. 

  943. 	if (!info->base)
    944. 

  944. 		return (-ENODEV);
    945. 

  945. 

  946. 	tty->driver_data = info;
    947. 

  947. 	info->tty = tty;
    948. 

  948. 	/*
    949. 

  949. 	 * Start up serial port
    950. 

  950. 	 */
    951. 

  951. 	retval = mxser_startup(info);
    952. 

  952. 	if (retval)
    953. 

  953. 		return (retval);
    954. 

  954. 

  955. 	retval = mxser_block_til_ready(tty, filp, info);
    956. 

  956. 	if (retval)
    957. 

  957. 		return (retval);
    958. 

  958. 

  959. 	info->count++;
    960. 

  960. 

  961. 	if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
    962. 

  962. 		if (tty->driver->subtype == SERIAL_TYPE_NORMAL)
    963. 

  963. 			*tty->termios = info->normal_termios;
    964. 

  964. 		else
    965. 

  965. 			*tty->termios = info->callout_termios;
    966. 

  966. 		mxser_change_speed(info, NULL);
    967. 

  967. 	}
    968. 

  968. 

  969. 	info->session = current->signal->session;
    970. 

  970. 	info->pgrp = process_group(current);
    971. 

  971. 	clear_bit(TTY_DONT_FLIP, &tty->flags);
    972. 

  972. 

  973. 	//status = mxser_get_msr(info->base, 0, info->port);
    974. 

  974. 	//mxser_check_modem_status(info, status);
    975. 

  975. 

  976. /* unmark here for very high baud rate (ex. 921600 bps) used
    977. 

  977. */
    978. 

  978. 	tty->low_latency = 1;
    979. 

  979. 	return 0;
    980. 

  980. }
    981. 

  981. 

  982. /*
    983. 

  983.  * This routine is called when the serial port gets closed.  First, we
    984. 

  984.  * wait for the last remaining data to be sent.  Then, we unlink its
    985. 

  985.  * async structure from the interrupt chain if necessary, and we free
    986. 

  986.  * that IRQ if nothing is left in the chain.
    987. 

  987.  */
    988. 

  988. static void mxser_close(struct tty_struct *tty, struct file *filp)
    989. 

  989. {
    990. 

  990. 	struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
    991. 

  991. 

  992. 	unsigned long timeout;
    993. 

  993. 	unsigned long flags;
    994. 

  994. 	struct tty_ldisc *ld;
    995. 

  995. 

  996. 	if (tty->index == MXSER_PORTS)
    997. 

  997. 		return;
    998. 

  998. 	if (!info)
    999. 

  999. 		BUG();
    1000. 

  1000. 

  1001. 	spin_lock_irqsave(&info->slock, flags);
    1002. 

  1002. 

  1003. 	if (tty_hung_up_p(filp)) {
    1004. 

  1004. 		spin_unlock_irqrestore(&info->slock, flags);
    1005. 

  1005. 		return;
    1006. 

  1006. 	}
    1007. 

  1007. 	if ((tty->count == 1) && (info->count != 1)) {
    1008. 

  1008. 		/*
    1009. 

  1009. 		 * Uh, oh.  tty->count is 1, which means that the tty
    1010. 

  1010. 		 * structure will be freed.  Info->count should always
    1011. 

  1011. 		 * be one in these conditions.  If it's greater than
    1012. 

  1012. 		 * one, we've got real problems, since it means the
    1013. 

  1013. 		 * serial port won't be shutdown.
    1014. 

  1014. 		 */
    1015. 

  1015. 		printk(KERN_ERR "mxser_close: bad serial port count; tty->count is 1, " "info->count is %d\n", info->count);
    1016. 

  1016. 		info->count = 1;
    1017. 

  1017. 	}
    1018. 

  1018. 	if (--info->count < 0) {
    1019. 

  1019. 		printk(KERN_ERR "mxser_close: bad serial port count for ttys%d: %d\n", info->port, info->count);
    1020. 

  1020. 		info->count = 0;
    1021. 

  1021. 	}
    1022. 

  1022. 	if (info->count) {
    1023. 

  1023. 		spin_unlock_irqrestore(&info->slock, flags);
    1024. 

  1024. 		return;
    1025. 

  1025. 	}
    1026. 

  1026. 	info->flags |= ASYNC_CLOSING;
    1027. 

  1027. 	spin_unlock_irqrestore(&info->slock, flags);
    1028. 

  1028. 	/*
    1029. 

  1029. 	 * Save the termios structure, since this port may have
    1030. 

  1030. 	 * separate termios for callout and dialin.
    1031. 

  1031. 	 */
    1032. 

  1032. 	if (info->flags & ASYNC_NORMAL_ACTIVE)
    1033. 

  1033. 		info->normal_termios = *tty->termios;
    1034. 

  1034. 	/*
    1035. 

  1035. 	 * Now we wait for the transmit buffer to clear; and we notify
    1036. 

  1036. 	 * the line discipline to only process XON/XOFF characters.
    1037. 

  1037. 	 */
    1038. 

  1038. 	tty->closing = 1;
    1039. 

  1039. 	if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
    1040. 

  1040. 		tty_wait_until_sent(tty, info->closing_wait);
    1041. 

  1041. 	/*
    1042. 

  1042. 	 * At this point we stop accepting input.  To do this, we
    1043. 

  1043. 	 * disable the receive line status interrupts, and tell the
    1044. 

  1044. 	 * interrupt driver to stop checking the data ready bit in the
    1045. 

  1045. 	 * line status register.
    1046. 

  1046. 	 */
    1047. 

  1047. 	info->IER &= ~UART_IER_RLSI;
    1048. 

  1048. 	if (info->IsMoxaMustChipFlag)
    1049. 

  1049. 		info->IER &= ~MOXA_MUST_RECV_ISR;
    1050. 

  1050. /* by William
    1051. 

  1051. 	info->read_status_mask &= ~UART_LSR_DR;
    1052. 

  1052. */
    1053. 

  1053. 	if (info->flags & ASYNC_INITIALIZED) {
    1054. 

  1054. 		outb(info->IER, info->base + UART_IER);
    1055. 

  1055. 		/*
    1056. 

  1056. 		 * Before we drop DTR, make sure the UART transmitter
    1057. 

  1057. 		 * has completely drained; this is especially
    1058. 

  1058. 		 * important if there is a transmit FIFO!
    1059. 

  1059. 		 */
    1060. 

  1060. 		timeout = jiffies + HZ;
    1061. 

  1061. 		while (!(inb(info->base + UART_LSR) & UART_LSR_TEMT)) {
    1062. 

  1062. 			set_current_state(TASK_INTERRUPTIBLE);
    1063. 

  1063. 			schedule_timeout(5);
    1064. 

  1064. 			if (time_after(jiffies, timeout))
    1065. 

  1065. 				break;
    1066. 

  1066. 		}
    1067. 

  1067. 	}
    1068. 

  1068. 	mxser_shutdown(info);
    1069. 

  1069. 

  1070. 	if (tty->driver->flush_buffer)
    1071. 

  1071. 		tty->driver->flush_buffer(tty);
    1072. 

  1072. 		
    1073. 

  1073. 	ld = tty_ldisc_ref(tty);
    1074. 

  1074. 	if (ld) {
    1075. 

  1075. 		if(ld->flush_buffer)
    1076. 

  1076. 			ld->flush_buffer(tty);
    1077. 

  1077. 		tty_ldisc_deref(ld);
    1078. 

  1078. 	}
    1079. 

  1079. 		
    1080. 

  1080. 	tty->closing = 0;
    1081. 

  1081. 	info->event = 0;
    1082. 

  1082. 	info->tty = NULL;
    1083. 

  1083. 	if (info->blocked_open) {
    1084. 

  1084. 		if (info->close_delay) {
    1085. 

  1085. 			set_current_state(TASK_INTERRUPTIBLE);
    1086. 

  1086. 			schedule_timeout(info->close_delay);
    1087. 

  1087. 		}
    1088. 

  1088. 		wake_up_interruptible(&info->open_wait);
    1089. 

  1089. 	}
    1090. 

  1090. 

  1091. 	info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
    1092. 

  1092. 	wake_up_interruptible(&info->close_wait);
    1093. 

  1093. 

  1094. }
    1095. 

  1095. 

  1096. static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
    1097. 

  1097. {
    1098. 

  1098. 	int c, total = 0;
    1099. 

  1099. 	struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
    1100. 

  1100. 	unsigned long flags;
    1101. 

  1101. 

  1102. 	if (!tty || !info->xmit_buf)
    1103. 

  1103. 		return (0);
    1104. 

  1104. 

  1105. 	while (1) {
    1106. 

  1106. 		c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, SERIAL_XMIT_SIZE - info->xmit_head));
    1107. 

  1107. 		if (c <= 0)
    1108. 

  1108. 			break;
    1109. 

  1109. 

  1110. 		memcpy(info->xmit_buf + info->xmit_head, buf, c);
    1111. 

  1111. 		spin_lock_irqsave(&info->slock, flags);
    1112. 

  1112. 		info->xmit_head = (info->xmit_head + c) & (SERIAL_XMIT_SIZE - 1);
    1113. 

  1113. 		info->xmit_cnt += c;
    1114. 

  1114. 		spin_unlock_irqrestore(&info->slock, flags);
    1115. 

  1115. 

  1116. 		buf += c;
    1117. 

  1117. 		count -= c;
    1118. 

  1118. 		total += c;
    1119. 

  1119. 

  1120. 	}
    1121. 

  1121. 

  1122. 	if (info->xmit_cnt && !tty->stopped && !(info->IER & UART_IER_THRI)) {
    1123. 

  1123. 		if (!tty->hw_stopped || (info->type == PORT_16550A) || (info->IsMoxaMustChipFlag)) {
    1124. 

  1124. 			spin_lock_irqsave(&info->slock, flags);
    1125. 

  1125. 			info->IER |= UART_IER_THRI;
    1126. 

  1126. 			outb(info->IER, info->base + UART_IER);
    1127. 

  1127. 			spin_unlock_irqrestore(&info->slock, flags);
    1128. 

  1128. 		}
    1129. 

  1129. 	}
    1130. 

  1130. 	return total;
    1131. 

  1131. }
    1132. 

  1132. 

  1133. static void mxser_put_char(struct tty_struct *tty, unsigned char ch)
    1134. 

  1134. {
    1135. 

  1135. 	struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
    1136. 

  1136. 	unsigned long flags;
    1137. 

  1137. 

  1138. 	if (!tty || !info->xmit_buf)
    1139. 

  1139. 		return;
    1140. 

  1140. 

  1141. 	if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
    1142. 

  1142. 		return;
    1143. 

  1143. 

  1144. 	spin_lock_irqsave(&info->slock, flags);
    1145. 

  1145. 	info->xmit_buf[info->xmit_head++] = ch;
    1146. 

  1146. 	info->xmit_head &= SERIAL_XMIT_SIZE - 1;
    1147. 

  1147. 	info->xmit_cnt++;
    1148. 

  1148. 	spin_unlock_irqrestore(&info->slock, flags);
    1149. 

  1149. 	if (!tty->stopped && !(info->IER & UART_IER_THRI)) {
    1150. 

  1150. 		if (!tty->hw_stopped || (info->type == PORT_16550A) || info->IsMoxaMustChipFlag) {
    1151. 

  1151. 			spin_lock_irqsave(&info->slock, flags);
    1152. 

  1152. 			info->IER |= UART_IER_THRI;
    1153. 

  1153. 			outb(info->IER, info->base + UART_IER);
    1154. 

  1154. 			spin_unlock_irqrestore(&info->slock, flags);
    1155. 

  1155. 		}
    1156. 

  1156. 	}
    1157. 

  1157. }
    1158. 

  1158. 

  1159. 

  1160. static void mxser_flush_chars(struct tty_struct *tty)
    1161. 

  1161. {
    1162. 

  1162. 	struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
    1163. 

  1163. 	unsigned long flags;
    1164. 

  1164. 

  1165. 	if (info->xmit_cnt <= 0 || tty->stopped || !info->xmit_buf || (tty->hw_stopped && (info->type != PORT_16550A) && (!info->IsMoxaMustChipFlag)))
    1166. 

  1166. 		return;
    1167. 

  1167. 

  1168. 	spin_lock_irqsave(&info->slock, flags);
    1169. 

  1169. 

  1170. 	info->IER |= UART_IER_THRI;
    1171. 

  1171. 	outb(info->IER, info->base + UART_IER);
    1172. 

  1172. 

  1173. 	spin_unlock_irqrestore(&info->slock, flags);
    1174. 

  1174. }
    1175. 

  1175. 

  1176. static int mxser_write_room(struct tty_struct *tty)
    1177. 

  1177. {
    1178. 

  1178. 	struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
    1179. 

  1179. 	int ret;
    1180. 

  1180. 

  1181. 	ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
    1182. 

  1182. 	if (ret < 0)
    1183. 

  1183. 		ret = 0;
    1184. 

  1184. 	return (ret);
    1185. 

  1185. }
    1186. 

  1186. 

  1187. static int mxser_chars_in_buffer(struct tty_struct *tty)
    1188. 

  1188. {
    1189. 

  1189. 	struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
    1190. 

  1190. 	return info->xmit_cnt;
    1191. 

  1191. }
    1192. 

  1192. 

  1193. static void mxser_flush_buffer(struct tty_struct *tty)
    1194. 

  1194. {
    1195. 

  1195. 	struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
    1196. 

  1196. 	char fcr;
    1197. 

  1197. 	unsigned long flags;
    1198. 

  1198. 

  1199. 

  1200. 	spin_lock_irqsave(&info->slock, flags);
    1201. 

  1201. 	info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
    1202. 

  1202. 

  1203. 	/* below added by shinhay */
    1204. 

  1204. 	fcr = inb(info->base + UART_FCR);
    1205. 

  1205. 	outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), info->base + UART_FCR);
    1206. 

  1206. 	outb(fcr, info->base + UART_FCR);
    1207. 

  1207. 

  1208. 	spin_unlock_irqrestore(&info->slock, flags);
    1209. 

  1209. 	/* above added by shinhay */
    1210. 

  1210. 

  1211. 	wake_up_interruptible(&tty->write_wait);
    1212. 

  1212. 	if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && tty->ldisc.write_wakeup)
    1213. 

  1213. 		(tty->ldisc.write_wakeup) (tty);
    1214. 

  1214. }
    1215. 

  1215. 

  1216. static int mxser_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
    1217. 

  1217. {
    1218. 

  1218. 	struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
    1219. 

  1219. 	int retval;
    1220. 

  1220. 	struct async_icount cprev, cnow;	/* kernel counter temps */
    1221. 

  1221. 	struct serial_icounter_struct __user *p_cuser;
    1222. 

  1222. 	unsigned long templ;
    1223. 

  1223. 	unsigned long flags;
    1224. 

  1224. 	void __user *argp = (void __user *)arg;
    1225. 

  1225. 

  1226. 	if (tty->index == MXSER_PORTS)
    1227. 

  1227. 		return (mxser_ioctl_special(cmd, argp));
    1228. 

  1228. 

  1229. 	// following add by Victor Yu. 01-05-2004
    1230. 

  1230. 	if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
    1231. 

  1231. 		int opmode, p;
    1232. 

  1232. 		static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
    1233. 

  1233. 		int shiftbit;
    1234. 

  1234. 		unsigned char val, mask;
    1235. 

  1235. 

  1236. 		p = info->port % 4;
    1237. 

  1237. 		if (cmd == MOXA_SET_OP_MODE) {
    1238. 

  1238. 			if (get_user(opmode, (int __user *) argp))
    1239. 

  1239. 				return -EFAULT;
    1240. 

  1240. 			if (opmode != RS232_MODE && opmode != RS485_2WIRE_MODE && opmode != RS422_MODE && opmode != RS485_4WIRE_MODE)
    1241. 

  1241. 				return -EFAULT;
    1242. 

  1242. 			mask = ModeMask[p];
    1243. 

  1243. 			shiftbit = p * 2;
    1244. 

  1244. 			val = inb(info->opmode_ioaddr);
    1245. 

  1245. 			val &= mask;
    1246. 

  1246. 			val |= (opmode << shiftbit);
    1247. 

  1247. 			outb(val, info->opmode_ioaddr);
    1248. 

  1248. 		} else {
    1249. 

  1249. 			shiftbit = p * 2;
    1250. 

  1250. 			opmode = inb(info->opmode_ioaddr) >> shiftbit;
    1251. 

  1251. 			opmode &= OP_MODE_MASK;
    1252. 

  1252. 			if (copy_to_user(argp, &opmode, sizeof(int)))
    1253. 

  1253. 				return -EFAULT;
    1254. 

  1254. 		}
    1255. 

  1255. 		return 0;
    1256. 

  1256. 	}
    1257. 

  1257. 	// above add by Victor Yu. 01-05-2004
    1258. 

  1258. 

  1259. 	if ((cmd != TIOCGSERIAL) && (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
    1260. 

  1260. 		if (tty->flags & (1 << TTY_IO_ERROR))
    1261. 

  1261. 			return (-EIO);
    1262. 

  1262. 	}
    1263. 

  1263. 	switch (cmd) {
    1264. 

  1264. 	case TCSBRK:		/* SVID version: non-zero arg --> no break */
    1265. 

  1265. 		retval = tty_check_change(tty);
    1266. 

  1266. 		if (retval)
    1267. 

  1267. 			return (retval);
    1268. 

  1268. 		tty_wait_until_sent(tty, 0);
    1269. 

  1269. 		if (!arg)
    1270. 

  1270. 			mxser_send_break(info, HZ / 4);	/* 1/4 second */
    1271. 

  1271. 		return (0);
    1272. 

  1272. 	case TCSBRKP:		/* support for POSIX tcsendbreak() */
    1273. 

  1273. 		retval = tty_check_change(tty);
    1274. 

  1274. 		if (retval)
    1275. 

  1275. 			return (retval);
    1276. 

  1276. 		tty_wait_until_sent(tty, 0);
    1277. 

  1277. 		mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
    1278. 

  1278. 		return (0);
    1279. 

  1279. 	case TIOCGSOFTCAR:
    1280. 

  1280. 		return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *) argp);
    1281. 

  1281. 	case TIOCSSOFTCAR:
    1282. 

  1282. 		if (get_user(templ, (unsigned long __user *) argp))
    1283. 

  1283. 			return -EFAULT;
    1284. 

  1284. 		arg = templ;
    1285. 

  1285. 		tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
    1286. 

  1286. 		return (0);
    1287. 

  1287. 	case TIOCGSERIAL:
    1288. 

  1288. 		return mxser_get_serial_info(info, argp);
    1289. 

  1289. 	case TIOCSSERIAL:
    1290. 

  1290. 		return mxser_set_serial_info(info, argp);
    1291. 

  1291. 	case TIOCSERGETLSR:	/* Get line status register */
    1292. 

  1292. 		return mxser_get_lsr_info(info, argp);
    1293. 

  1293. 		/*
    1294. 

  1294. 		 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
    1295. 

  1295. 		 * - mask passed in arg for lines of interest
    1296. 

  1296. 		 *   (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
    1297. 

  1297. 		 * Caller should use TIOCGICOUNT to see which one it was
    1298. 

  1298. 		 */
    1299. 

  1299. 	case TIOCMIWAIT:{
    1300. 

  1300. 			DECLARE_WAITQUEUE(wait, current);
    1301. 

  1301. 			int ret;
    1302. 

  1302. 			spin_lock_irqsave(&info->slock, flags);
    1303. 

  1303. 			cprev = info->icount;	/* note the counters on entry */
    1304. 

  1304. 			spin_unlock_irqrestore(&info->slock, flags);
    1305. 

  1305. 

  1306. 			add_wait_queue(&info->delta_msr_wait, &wait);
    1307. 

  1307. 			while (1) {
    1308. 

  1308. 				spin_lock_irqsave(&info->slock, flags);
    1309. 

  1309. 				cnow = info->icount;	/* atomic copy */
    1310. 

  1310. 				spin_unlock_irqrestore(&info->slock, flags);
    1311. 

  1311. 

  1312. 				set_current_state(TASK_INTERRUPTIBLE);
    1313. 

  1313. 				if (((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) || ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) || ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) || ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts))) {
    1314. 

  1314. 					ret = 0;
    1315. 

  1315. 					break;
    1316. 

  1316. 				}
    1317. 

  1317. 				/* see if a signal did it */
    1318. 

  1318. 				if (signal_pending(current)) {
    1319. 

  1319. 					ret = -ERESTARTSYS;
    1320. 

  1320. 					break;
    1321. 

  1321. 				}
    1322. 

  1322. 				cprev = cnow;
    1323. 

  1323. 			}
    1324. 

  1324. 			current->state = TASK_RUNNING;
    1325. 

  1325. 			remove_wait_queue(&info->delta_msr_wait, &wait);
    1326. 

  1326. 			break;
    1327. 

  1327. 		}
    1328. 

  1328. 		/* NOTREACHED */
    1329. 

  1329. 		/*
    1330. 

  1330. 		 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
    1331. 

  1331. 		 * Return: write counters to the user passed counter struct
    1332. 

  1332. 		 * NB: both 1->0 and 0->1 transitions are counted except for
    1333. 

  1333. 		 *     RI where only 0->1 is counted.
    1334. 

  1334. 		 */
    1335. 

  1335. 	case TIOCGICOUNT:
    1336. 

  1336. 		spin_lock_irqsave(&info->slock, flags);
    1337. 

  1337. 		cnow = info->icount;
    1338. 

  1338. 		spin_unlock_irqrestore(&info->slock, flags);
    1339. 

  1339. 		p_cuser = argp;
    1340. 

  1340. 		/* modified by casper 1/11/2000 */
    1341. 

  1341. 		if (put_user(cnow.frame, &p_cuser->frame))
    1342. 

  1342. 			return -EFAULT;
    1343. 

  1343. 		if (put_user(cnow.brk, &p_cuser->brk))
    1344. 

  1344. 			return -EFAULT;
    1345. 

  1345. 		if (put_user(cnow.overrun, &p_cuser->overrun))
    1346. 

  1346. 			return -EFAULT;
    1347. 

  1347. 		if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
    1348. 

  1348. 			return -EFAULT;
    1349. 

  1349. 		if (put_user(cnow.parity, &p_cuser->parity))
    1350. 

  1350. 			return -EFAULT;
    1351. 

  1351. 		if (put_user(cnow.rx, &p_cuser->rx))
    1352. 

  1352. 			return -EFAULT;
    1353. 

  1353. 		if (put_user(cnow.tx, &p_cuser->tx))
    1354. 

  1354. 			return -EFAULT;
    1355. 

  1355. 		put_user(cnow.cts, &p_cuser->cts);
    1356. 

  1356. 		put_user(cnow.dsr, &p_cuser->dsr);
    1357. 

  1357. 		put_user(cnow.rng, &p_cuser->rng);
    1358. 

  1358. 		put_user(cnow.dcd, &p_cuser->dcd);
    1359. 

  1359. 

  1360. /* */
    1361. 

  1361. 		return 0;
    1362. 

  1362. 	case MOXA_HighSpeedOn:
    1363. 

  1363. 		return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *) argp);
    1364. 

  1364. 

  1365. 	case MOXA_SDS_RSTICOUNTER:{
    1366. 

  1366. 			info->mon_data.rxcnt = 0;
    1367. 

  1367. 			info->mon_data.txcnt = 0;
    1368. 

  1368. 			return 0;
    1369. 

  1369. 		}
    1370. 

  1370. // (above) added by James.
    1371. 

  1371. 	case MOXA_ASPP_SETBAUD:{
    1372. 

  1372. 			long baud;
    1373. 

  1373. 			if (get_user(baud, (long __user *) argp))
    1374. 

  1374. 				return -EFAULT;
    1375. 

  1375. 			mxser_set_baud(info, baud);
    1376. 

  1376. 			return 0;
    1377. 

  1377. 		}
    1378. 

  1378. 	case MOXA_ASPP_GETBAUD:
    1379. 

  1379. 		if (copy_to_user(argp, &info->realbaud, sizeof(long)))
    1380. 

  1380. 			return -EFAULT;
    1381. 

  1381. 

  1382. 		return 0;
    1383. 

  1383. 

  1384. 	case MOXA_ASPP_OQUEUE:{
    1385. 

  1385. 			int len, lsr;
    1386. 

  1386. 

  1387. 			len = mxser_chars_in_buffer(tty);
    1388. 

  1388. 

  1389. 			lsr = inb(info->base + UART_LSR) & UART_LSR_TEMT;
    1390. 

  1390. 

  1391. 			len += (lsr ? 0 : 1);
    1392. 

  1392. 

  1393. 			if (copy_to_user(argp, &len, sizeof(int)))
    1394. 

  1394. 				return -EFAULT;
    1395. 

  1395. 

  1396. 			return 0;
    1397. 

  1397. 		}
    1398. 

  1398. 	case MOXA_ASPP_MON:{
    1399. 

  1399. 			int mcr, status;
    1400. 

  1400. //      info->mon_data.ser_param = tty->termios->c_cflag;
    1401. 

  1401. 

  1402. 			status = mxser_get_msr(info->base, 1, info->port, info);
    1403. 

  1403. 			mxser_check_modem_status(info, status);
    1404. 

  1404. 

  1405. 			mcr = inb(info->base + UART_MCR);
    1406. 

  1406. 			if (mcr & MOXA_MUST_MCR_XON_FLAG)
    1407. 

  1407. 				info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
    1408. 

  1408. 			else
    1409. 

  1409. 				info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
    1410. 

  1410. 

  1411. 			if (mcr & MOXA_MUST_MCR_TX_XON)
    1412. 

  1412. 				info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
    1413. 

  1413. 			else
    1414. 

  1414. 				info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
    1415. 

  1415. 

  1416. 			if (info->tty->hw_stopped)
    1417. 

  1417. 				info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
    1418. 

  1418. 			else
    1419. 

  1419. 				info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
    1420. 

  1420. 

  1421. 

  1422. 			if (copy_to_user(argp, &info->mon_data, sizeof(struct mxser_mon)))
    1423. 

  1423. 				return -EFAULT;
    1424. 

  1424. 

  1425. 			return 0;
    1426. 

  1426. 

  1427. 		}
    1428. 

  1428. 

  1429. 	case MOXA_ASPP_LSTATUS:{
    1430. 

  1430. 			if (copy_to_user(argp, &info->err_shadow, sizeof(unsigned char)))
    1431. 

  1431. 				return -EFAULT;
    1432. 

  1432. 

  1433. 			info->err_shadow = 0;
    1434. 

  1434. 			return 0;
    1435. 

  1435. 

  1436. 		}
    1437. 

  1437. 	case MOXA_SET_BAUD_METHOD:{
    1438. 

  1438. 			int method;
    1439. 

  1439. 			if (get_user(method, (int __user *) argp))
    1440. 

  1440. 				return -EFAULT;
    1441. 

  1441. 			mxser_set_baud_method[info->port] = method;
    1442. 

  1442. 			if (copy_to_user(argp, &method, sizeof(int)))
    1443. 

  1443. 				return -EFAULT;
    1444. 

  1444. 

  1445. 			return 0;
    1446. 

  1446. 		}
    1447. 

  1447. 	default:
    1448. 

  1448. 		return -ENOIOCTLCMD;
    1449. 

  1449. 	}
    1450. 

  1450. 	return 0;
    1451. 

  1451. }
    1452. 

  1452. 

  1453. #ifndef CMSPAR
    1454. 

  1454. #define	CMSPAR 010000000000
    1455. 

  1455. #endif
    1456. 

  1456. 

  1457. static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
    1458. 

  1458. {
    1459. 

  1459. 	int i, result, status;
    1460. 

  1460. 

  1461. 	switch (cmd) {
    1462. 

  1462. 	case MOXA_GET_CONF:
    1463. 

  1463. 		if (copy_to_user(argp, mxsercfg, sizeof(struct mxser_hwconf) * 4))
    1464. 

  1464. 			return -EFAULT;
    1465. 

  1465. 		return 0;
    1466. 

  1466. 	case MOXA_GET_MAJOR:
    1467. 

  1467. 		if (copy_to_user(argp, &ttymajor, sizeof(int)))
    1468. 

  1468. 			return -EFAULT;
    1469. 

  1469. 		return 0;
    1470. 

  1470. 

  1471. 	case MOXA_GET_CUMAJOR:
    1472. 

  1472. 		if (copy_to_user(argp, &calloutmajor, sizeof(int)))
    1473. 

  1473. 			return -EFAULT;
    1474. 

  1474. 		return 0;
    1475. 

  1475. 

  1476. 	case MOXA_CHKPORTENABLE:
    1477. 

  1477. 		result = 0;
    1478. 

  1478. 		for (i = 0; i < MXSER_PORTS; i++) {
    1479. 

  1479. 			if (mxvar_table[i].base)
    1480. 

  1480. 				result |= (1 << i);
    1481. 

  1481. 		}
    1482. 

  1482. 		return put_user(result, (unsigned long __user *) argp);
    1483. 

  1483. 	case MOXA_GETDATACOUNT:
    1484. 

  1484. 		if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
    1485. 

  1485. 			return -EFAULT;
    1486. 

  1486. 		return (0);
    1487. 

  1487. 	case MOXA_GETMSTATUS:
    1488. 

  1488. 		for (i = 0; i < MXSER_PORTS; i++) {
    1489. 

  1489. 			GMStatus[i].ri = 0;
    1490. 

  1490. 			if (!mxvar_table[i].base) {
    1491. 

  1491. 				GMStatus[i].dcd = 0;
    1492. 

  1492. 				GMStatus[i].dsr = 0;
    1493. 

  1493. 				GMStatus[i].cts = 0;
    1494. 

  1494. 				continue;
    1495. 

  1495. 			}
    1496. 

  1496. 

  1497. 			if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios)
    1498. 

  1498. 				GMStatus[i].cflag = mxvar_table[i].normal_termios.c_cflag;
    1499. 

  1499. 			else
    1500. 

  1500. 				GMStatus[i].cflag = mxvar_table[i].tty->termios->c_cflag;
    1501. 

  1501. 

  1502. 			status = inb(mxvar_table[i].base + UART_MSR);
    1503. 

  1503. 			if (status & 0x80 /*UART_MSR_DCD */ )
    1504. 

  1504. 				GMStatus[i].dcd = 1;
    1505. 

  1505. 			else
    1506. 

  1506. 				GMStatus[i].dcd = 0;
    1507. 

  1507. 

  1508. 			if (status & 0x20 /*UART_MSR_DSR */ )
    1509. 

  1509. 				GMStatus[i].dsr = 1;
    1510. 

  1510. 			else
    1511. 

  1511. 				GMStatus[i].dsr = 0;
    1512. 

  1512. 

  1513. 

  1514. 			if (status & 0x10 /*UART_MSR_CTS */ )
    1515. 

  1515. 				GMStatus[i].cts = 1;
    1516. 

  1516. 			else
    1517. 

  1517. 				GMStatus[i].cts = 0;
    1518. 

  1518. 		}
    1519. 

  1519. 		if (copy_to_user(argp, GMStatus, sizeof(struct mxser_mstatus) * MXSER_PORTS))
    1520. 

  1520. 			return -EFAULT;
    1521. 

  1521. 		return 0;
    1522. 

  1522. 	case MOXA_ASPP_MON_EXT:{
    1523. 

  1523. 			int status;
    1524. 

  1524. 			int opmode, p;
    1525. 

  1525. 			int shiftbit;
    1526. 

  1526. 			unsigned cflag, iflag;
    1527. 

  1527. 

  1528. 			for (i = 0; i < MXSER_PORTS; i++) {
    1529. 

  1529. 

  1530. 				if (!mxvar_table[i].base)
    1531. 

  1531. 					continue;
    1532. 

  1532. 

  1533. 				status = mxser_get_msr(mxvar_table[i].base, 0, i, &(mxvar_table[i]));
    1534. 

  1534. //                      mxser_check_modem_status(&mxvar_table[i], status);
    1535. 

  1535. 				if (status & UART_MSR_TERI)
    1536. 

  1536. 					mxvar_table[i].icount.rng++;
    1537. 

  1537. 				if (status & UART_MSR_DDSR)
    1538. 

  1538. 					mxvar_table[i].icount.dsr++;
    1539. 

  1539. 				if (status & UART_MSR_DDCD)
    1540. 

  1540. 					mxvar_table[i].icount.dcd++;
    1541. 

  1541. 				if (status & UART_MSR_DCTS)
    1542. 

  1542. 					mxvar_table[i].icount.cts++;
    1543. 

  1543. 

  1544. 				mxvar_table[i].mon_data.modem_status = status;
    1545. 

  1545. 				mon_data_ext.rx_cnt[i] = mxvar_table[i].mon_data.rxcnt;
    1546. 

  1546. 				mon_data_ext.tx_cnt[i] = mxvar_table[i].mon_data.txcnt;
    1547. 

  1547. 				mon_data_ext.up_rxcnt[i] = mxvar_table[i].mon_data.up_rxcnt;
    1548. 

  1548. 				mon_data_ext.up_txcnt[i] = mxvar_table[i].mon_data.up_txcnt;
    1549. 

  1549. 				mon_data_ext.modem_status[i] = mxvar_table[i].mon_data.modem_status;
    1550. 

  1550. 				mon_data_ext.baudrate[i] = mxvar_table[i].realbaud;
    1551. 

  1551. 

  1552. 				if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios) {
    1553. 

  1553. 					cflag = mxvar_table[i].normal_termios.c_cflag;
    1554. 

  1554. 					iflag = mxvar_table[i].normal_termios.c_iflag;
    1555. 

  1555. 				} else {
    1556. 

  1556. 					cflag = mxvar_table[i].tty->termios->c_cflag;
    1557. 

  1557. 					iflag = mxvar_table[i].tty->termios->c_iflag;
    1558. 

  1558. 				}
    1559. 

  1559. 

  1560. 				mon_data_ext.databits[i] = cflag & CSIZE;
    1561. 

  1561. 

  1562. 				mon_data_ext.stopbits[i] = cflag & CSTOPB;
    1563. 

  1563. 

  1564. 				mon_data_ext.parity[i] = cflag & (PARENB | PARODD | CMSPAR);
    1565. 

  1565. 

  1566. 				mon_data_ext.flowctrl[i] = 0x00;
    1567. 

  1567. 

  1568. 				if (cflag & CRTSCTS)
    1569. 

  1569. 					mon_data_ext.flowctrl[i] |= 0x03;
    1570. 

  1570. 

  1571. 				if (iflag & (IXON | IXOFF))
    1572. 

  1572. 					mon_data_ext.flowctrl[i] |= 0x0C;
    1573. 

  1573. 

  1574. 				if (mxvar_table[i].type == PORT_16550A)
    1575. 

  1575. 					mon_data_ext.fifo[i] = 1;
    1576. 

  1576. 				else
    1577. 

  1577. 					mon_data_ext.fifo[i] = 0;
    1578. 

  1578. 

  1579. 				p = i % 4;
    1580. 

  1580. 				shiftbit = p * 2;
    1581. 

  1581. 				opmode = inb(mxvar_table[i].opmode_ioaddr) >> shiftbit;
    1582. 

  1582. 				opmode &= OP_MODE_MASK;
    1583. 

  1583. 

  1584. 				mon_data_ext.iftype[i] = opmode;
    1585. 

  1585. 

  1586. 			}
    1587. 

  1587. 			if (copy_to_user(argp, &mon_data_ext, sizeof(struct mxser_mon_ext)))
    1588. 

  1588. 				return -EFAULT;
    1589. 

  1589. 

  1590. 			return 0;
    1591. 

  1591. 

  1592. 		}
    1593. 

  1593. 	default:
    1594. 

  1594. 		return -ENOIOCTLCMD;
    1595. 

  1595. 	}
    1596. 

  1596. 	return 0;
    1597. 

  1597. }
    1598. 

  1598. 

  1599. 

  1600. static void mxser_stoprx(struct tty_struct *tty)
    1601. 

  1601. {
    1602. 

  1602. 	struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
    1603. 

  1603. 	//unsigned long flags;
    1604. 

  1604. 

  1605. 

  1606. 	info->ldisc_stop_rx = 1;
    1607. 

  1607. 	if (I_IXOFF(tty)) {
    1608. 

  1608. 

  1609. 		//MX_LOCK(&info->slock);
    1610. 

  1610. 		// following add by Victor Yu. 09-02-2002
    1611. 

  1611. 		if (info->IsMoxaMustChipFlag) {
    1612. 

  1612. 			info->IER &= ~MOXA_MUST_RECV_ISR;
    1613. 

  1613. 			outb(info->IER, info->base + UART_IER);
    1614. 

  1614. 		} else {
    1615. 

  1615. 			// above add by Victor Yu. 09-02-2002
    1616. 

  1616. 

  1617. 			info->x_char = STOP_CHAR(tty);
    1618. 

  1618. 			//      outb(info->IER, 0); // mask by Victor Yu. 09-02-2002
    1619. 

  1619. 			outb(0, info->base + UART_IER);
    1620. 

  1620. 			info->IER |= UART_IER_THRI;
    1621. 

  1621. 			outb(info->IER, info->base + UART_IER);	/* force Tx interrupt */
    1622. 

  1622. 		}		// add by Victor Yu. 09-02-2002
    1623. 

  1623. 		//MX_UNLOCK(&info->slock);
    1624. 

  1624. 	}
    1625. 

  1625. 

  1626. 	if (info->tty->termios->c_cflag & CRTSCTS) {
    1627. 

  1627. 		//MX_LOCK(&info->slock);
    1628. 

  1628. 		info->MCR &= ~UART_MCR_RTS;
    1629. 

  1629. 		outb(info->MCR, info->base + UART_MCR);
    1630. 

  1630. 		//MX_UNLOCK(&info->slock);
    1631. 

  1631. 	}
    1632. 

  1632. }
    1633. 

  1633. 

  1634. static void mxser_startrx(struct tty_struct *tty)
    1635. 

  1635. {
    1636. 

  1636. 	struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
    1637. 

  1637. 	//unsigned long flags;
    1638. 

  1638. 

  1639. 	info->ldisc_stop_rx = 0;
    1640. 

  1640. 	if (I_IXOFF(tty)) {
    1641. 

  1641. 		if (info->x_char)
    1642. 

  1642. 			info->x_char = 0;
    1643. 

  1643. 		else {
    1644. 

  1644. 			//MX_LOCK(&info->slock);
    1645. 

  1645. 

  1646. 			// following add by Victor Yu. 09-02-2002
    1647. 

  1647. 			if (info->IsMoxaMustChipFlag) {
    1648. 

  1648. 				info->IER |= MOXA_MUST_RECV_ISR;
    1649. 

  1649. 				outb(info->IER, info->base + UART_IER);
    1650. 

  1650. 			} else {
    1651. 

  1651. 				// above add by Victor Yu. 09-02-2002
    1652. 

  1652. 

  1653. 				info->x_char = START_CHAR(tty);
    1654. 

  1654. 				//          outb(info->IER, 0); // mask by Victor Yu. 09-02-2002
    1655. 

  1655. 				outb(0, info->base + UART_IER);	// add by Victor Yu. 09-02-2002
    1656. 

  1656. 				info->IER |= UART_IER_THRI;	/* force Tx interrupt */
    1657. 

  1657. 				outb(info->IER, info->base + UART_IER);
    1658. 

  1658. 			}	// add by Victor Yu. 09-02-2002
    1659. 

  1659. 			//MX_UNLOCK(&info->slock);
    1660. 

  1660. 		}
    1661. 

  1661. 	}
    1662. 

  1662. 

  1663. 	if (info->tty->termios->c_cflag & CRTSCTS) {
    1664. 

  1664. 		//MX_LOCK(&info->slock);
    1665. 

  1665. 		info->MCR |= UART_MCR_RTS;
    1666. 

  1666. 		outb(info->MCR, info->base + UART_MCR);
    1667. 

  1667. 		//MX_UNLOCK(&info->slock);
    1668. 

  1668. 	}
    1669. 

  1669. }
    1670. 

  1670. 

  1671. /*
    1672. 

  1672.  * This routine is called by the upper-layer tty layer to signal that
    1673. 

  1673.  * incoming characters should be throttled.
    1674. 

  1674.  */
    1675. 

  1675. static void mxser_throttle(struct tty_struct *tty)
    1676. 

  1676. {
    1677. 

  1677. 	//struct mxser_struct *info = (struct mxser_struct *)tty->driver_data;
    1678. 

  1678. 	//unsigned long flags;
    1679. 

  1679. 	//MX_LOCK(&info->slock);
    1680. 

  1680. 	mxser_stoprx(tty);
    1681. 

  1681. 	//MX_UNLOCK(&info->slock);
    1682. 

  1682. }
    1683. 

  1683. 

  1684. static void mxser_unthrottle(struct tty_struct *tty)
    1685. 

  1685. {
    1686. 

  1686. 	//struct mxser_struct *info = (struct mxser_struct *)tty->driver_data;
    1687. 

  1687. 	//unsigned long flags;
    1688. 

  1688. 	//MX_LOCK(&info->slock);
    1689. 

  1689. 	mxser_startrx(tty);
    1690. 

  1690. 	//MX_UNLOCK(&info->slock);
    1691. 

  1691. }
    1692. 

  1692. 

  1693. static void mxser_set_termios(struct tty_struct *tty, struct termios *old_termios)
    1694. 

  1694. {
    1695. 

  1695. 	struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
    1696. 

  1696. 	unsigned long flags;
    1697. 

  1697. 

  1698. 	if ((tty->termios->c_cflag != old_termios->c_cflag) || (RELEVANT_IFLAG(tty->termios->c_iflag) != RELEVANT_IFLAG(old_termios->c_iflag))) {
    1699. 

  1699. 

  1700. 		mxser_change_speed(info, old_termios);
    1701. 

  1701. 

  1702. 		if ((old_termios->c_cflag & CRTSCTS) && !(tty->termios->c_cflag & CRTSCTS)) {
    1703. 

  1703. 			tty->hw_stopped = 0;
    1704. 

  1704. 			mxser_start(tty);
    1705. 

  1705. 		}
    1706. 

  1706. 	}
    1707. 

  1707. 

  1708. /* Handle sw stopped */
    1709. 

  1709. 	if ((old_termios->c_iflag & IXON) && !(tty->termios->c_iflag & IXON)) {
    1710. 

  1710. 		tty->stopped = 0;
    1711. 

  1711. 

  1712. 		// following add by Victor Yu. 09-02-2002
    1713. 

  1713. 		if (info->IsMoxaMustChipFlag) {
    1714. 

  1714. 			spin_lock_irqsave(&info->slock, flags);
    1715. 

  1715. 			DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
    1716. 

  1716. 			spin_unlock_irqrestore(&info->slock, flags);
    1717. 

  1717. 		}
    1718. 

  1718. 		// above add by Victor Yu. 09-02-2002
    1719. 

  1719. 

  1720. 		mxser_start(tty);
    1721. 

  1721. 	}
    1722. 

  1722. }
    1723. 

  1723. 

  1724. /*
    1725. 

  1725.  * mxser_stop() and mxser_start()
    1726. 

  1726.  *
    1727. 

  1727.  * This routines are called before setting or resetting tty->stopped.
    1728. 

  1728.  * They enable or disable transmitter interrupts, as necessary.
    1729. 

  1729.  */
    1730. 

  1730. static void mxser_stop(struct tty_struct *tty)
    1731. 

  1731. {
    1732. 

  1732. 	struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
    1733. 

  1733. 	unsigned long flags;
    1734. 

  1734. 

  1735. 	spin_lock_irqsave(&info->slock, flags);
    1736. 

  1736. 	if (info->IER & UART_IER_THRI) {
    1737. 

  1737. 		info->IER &= ~UART_IER_THRI;
    1738. 

  1738. 		outb(info->IER, info->base + UART_IER);
    1739. 

  1739. 	}
    1740. 

  1740. 	spin_unlock_irqrestore(&info->slock, flags);
    1741. 

  1741. }
    1742. 

  1742. 

  1743. static void mxser_start(struct tty_struct *tty)
    1744. 

  1744. {
    1745. 

  1745. 	struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
    1746. 

  1746. 	unsigned long flags;
    1747. 

  1747. 

  1748. 	spin_lock_irqsave(&info->slock, flags);
    1749. 

  1749. 	if (info->xmit_cnt && info->xmit_buf && !(info->IER & UART_IER_THRI)) {
    1750. 

  1750. 		info->IER |= UART_IER_THRI;
    1751. 

  1751. 		outb(info->IER, info->base + UART_IER);
    1752. 

  1752. 	}
    1753. 

  1753. 	spin_unlock_irqrestore(&info->slock, flags);
    1754. 

  1754. }
    1755. 

  1755. 

  1756. /*
    1757. 

  1757.  * mxser_wait_until_sent() --- wait until the transmitter is empty
    1758. 

  1758.  */
    1759. 

  1759. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
    1760. 

  1760. {
    1761. 

  1761. 	struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
    1762. 

  1762. 	unsigned long orig_jiffies, char_time;
    1763. 

  1763. 	int lsr;
    1764. 

  1764. 

  1765. 	if (info->type == PORT_UNKNOWN)
    1766. 

  1766. 		return;
    1767. 

  1767. 

  1768. 	if (info->xmit_fifo_size == 0)
    1769. 

  1769. 		return;		/* Just in case.... */
    1770. 

  1770. 

  1771. 	orig_jiffies = jiffies;
    1772. 

  1772. 	/*
    1773. 

  1773. 	 * Set the check interval to be 1/5 of the estimated time to
    1774. 

  1774. 	 * send a single character, and make it at least 1.  The check
    1775. 

  1775. 	 * interval should also be less than the timeout.
    1776. 

  1776. 	 *
    1777. 

  1777. 	 * Note: we have to use pretty tight timings here to satisfy
    1778. 

  1778. 	 * the NIST-PCTS.
    1779. 

  1779. 	 */
    1780. 

  1780. 	char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
    1781. 

  1781. 	char_time = char_time / 5;
    1782. 

  1782. 	if (char_time == 0)
    1783. 

  1783. 		char_time = 1;
    1784. 

  1784. 	if (timeout && timeout < char_time)
    1785. 

  1785. 		char_time = timeout;
    1786. 

  1786. 	/*
    1787. 

  1787. 	 * If the transmitter hasn't cleared in twice the approximate
    1788. 

  1788. 	 * amount of time to send the entire FIFO, it probably won't
    1789. 

  1789. 	 * ever clear.  This assumes the UART isn't doing flow
    1790. 

  1790. 	 * control, which is currently the case.  Hence, if it ever
    1791. 

  1791. 	 * takes longer than info->timeout, this is probably due to a
    1792. 

  1792. 	 * UART bug of some kind.  So, we clamp the timeout parameter at
    1793. 

  1793. 	 * 2*info->timeout.
    1794. 

  1794. 	 */
    1795. 

  1795. 	if (!timeout || timeout > 2 * info->timeout)
    1796. 

  1796. 		timeout = 2 * info->timeout;
    1797. 

  1797. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
    1798. 

  1798. 	printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
    1799. 

  1799. 	printk("jiff=%lu...", jiffies);
    1800. 

  1800. #endif
    1801. 

  1801. 	while (!((lsr = inb(info->base + UART_LSR)) & UART_LSR_TEMT)) {
    1802. 

  1802. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
    1803. 

  1803. 		printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
    1804. 

  1804. #endif
    1805. 

  1805. 		set_current_state(TASK_INTERRUPTIBLE);
    1806. 

  1806. 		schedule_timeout(char_time);
    1807. 

  1807. 		if (signal_pending(current))
    1808. 

  1808. 			break;
    1809. 

  1809. 		if (timeout && time_after(jiffies, orig_jiffies + timeout))
    1810. 

  1810. 			break;
    1811. 

  1811. 	}
    1812. 

  1812. 	set_current_state(TASK_RUNNING);
    1813. 

  1813. 

  1814. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
    1815. 

  1815. 	printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
    1816. 

  1816. #endif
    1817. 

  1817. }
    1818. 

  1818. 

  1819. 

  1820. /*
    1821. 

  1821.  * This routine is called by tty_hangup() when a hangup is signaled.
    1822. 

  1822.  */
    1823. 

  1823. void mxser_hangup(struct tty_struct *tty)
    1824. 

  1824. {
    1825. 

  1825. 	struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
    1826. 

  1826. 

  1827. 	mxser_flush_buffer(tty);
    1828. 

  1828. 	mxser_shutdown(info);
    1829. 

  1829. 	info->event = 0;
    1830. 

  1830. 	info->count = 0;
    1831. 

  1831. 	info->flags &= ~ASYNC_NORMAL_ACTIVE;
    1832. 

  1832. 	info->tty = NULL;
    1833. 

  1833. 	wake_up_interruptible(&info->open_wait);
    1834. 

  1834. }
    1835. 

  1835. 

  1836. 

  1837. // added by James 03-12-2004.
    1838. 

  1838. /*
    1839. 

  1839.  * mxser_rs_break() --- routine which turns the break handling on or off
    1840. 

  1840.  */
    1841. 

  1841. static void mxser_rs_break(struct tty_struct *tty, int break_state)
    1842. 

  1842. {
    1843. 

  1843. 	struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
    1844. 

  1844. 	unsigned long flags;
    1845. 

  1845. 

  1846. 	spin_lock_irqsave(&info->slock, flags);
    1847. 

  1847. 	if (break_state == -1)
    1848. 

  1848. 		outb(inb(info->base + UART_LCR) | UART_LCR_SBC, info->base + UART_LCR);
    1849. 

  1849. 	else
    1850. 

  1850. 		outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC, info->base + UART_LCR);
    1851. 

  1851. 	spin_unlock_irqrestore(&info->slock, flags);
    1852. 

  1852. }
    1853. 

  1853. 

  1854. // (above) added by James.
    1855. 

  1855. 

  1856. 

  1857. /*
    1858. 

  1858.  * This is the serial driver's generic interrupt routine
    1859. 

  1859.  */
    1860. 

  1860. static irqreturn_t mxser_interrupt(int irq, void *dev_id, struct pt_regs *regs)
    1861. 

  1861. {
    1862. 

  1862. 	int status, iir, i;
    1863. 

  1863. 	struct mxser_struct *info;
    1864. 

  1864. 	struct mxser_struct *port;
    1865. 

  1865. 	int max, irqbits, bits, msr;
    1866. 

  1866. 	int pass_counter = 0;
    1867. 

  1867. 	int handled = IRQ_NONE;
    1868. 

  1868. 

  1869. 	port = NULL;
    1870. 

  1870. 	//spin_lock(&gm_lock);
    1871. 

  1871. 

  1872. 	for (i = 0; i < MXSER_BOARDS; i++) {
    1873. 

  1873. 		if (dev_id == &(mxvar_table[i * MXSER_PORTS_PER_BOARD])) {
    1874. 

  1874. 			port = dev_id;
    1875. 

  1875. 			break;
    1876. 

  1876. 		}
    1877. 

  1877. 	}
    1878. 

  1878. 

  1879. 	if (i == MXSER_BOARDS) {
    1880. 

  1880. 		goto irq_stop;
    1881. 

  1881. 	}
    1882. 

  1882. 	if (port == 0) {
    1883. 

  1883. 		goto irq_stop;
    1884. 

  1884. 	}
    1885. 

  1885. 	max = mxser_numports[mxsercfg[i].board_type - 1];
    1886. 

  1886. 	while (1) {
    1887. 

  1887. 		irqbits = inb(port->vector) & port->vectormask;
    1888. 

  1888. 		if (irqbits == port->vectormask) {
    1889. 

  1889. 			break;
    1890. 

  1890. 		}
    1891. 

  1891. 

  1892. 		handled = IRQ_HANDLED;
    1893. 

  1893. 		for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
    1894. 

  1894. 			if (irqbits == port->vectormask) {
    1895. 

  1895. 				break;
    1896. 

  1896. 			}
    1897. 

  1897. 			if (bits & irqbits)
    1898. 

  1898. 				continue;
    1899. 

  1899. 			info = port + i;
    1900. 

  1900. 

  1901. 			// following add by Victor Yu. 09-13-2002
    1902. 

  1902. 			iir = inb(info->base + UART_IIR);
    1903. 

  1903. 			if (iir & UART_IIR_NO_INT)
    1904. 

  1904. 				continue;
    1905. 

  1905. 			iir &= MOXA_MUST_IIR_MASK;
    1906. 

  1906. 			if (!info->tty) {
    1907. 

  1907. 				status = inb(info->base + UART_LSR);
    1908. 

  1908. 				outb(0x27, info->base + UART_FCR);
    1909. 

  1909. 				inb(info->base + UART_MSR);
    1910. 

  1910. 				continue;
    1911. 

  1911. 			}
    1912. 

  1912. 			// above add by Victor Yu. 09-13-2002
    1913. 

  1913. 			/*
    1914. 

  1914. 			   if ( info->tty->flip.count < TTY_FLIPBUF_SIZE/4 ){
    1915. 

  1915. 			   info->IER |= MOXA_MUST_RECV_ISR;
    1916. 

  1916. 			   outb(info->IER, info->base + UART_IER);
    1917. 

  1917. 			   }
    1918. 

  1918. 			 */
    1919. 

  1919. 

  1920. 

  1921. 			/* mask by Victor Yu. 09-13-2002
    1922. 

  1922. 			   if ( !info->tty ||
    1923. 

  1923. 			   (inb(info->base + UART_IIR) & UART_IIR_NO_INT) )
    1924. 

  1924. 			   continue;
    1925. 

  1925. 			 */
    1926. 

  1926. 			/* mask by Victor Yu. 09-02-2002
    1927. 

  1927. 			   status = inb(info->base + UART_LSR) & info->read_status_mask;
    1928. 

  1928. 			 */
    1929. 

  1929. 

  1930. 			// following add by Victor Yu. 09-02-2002
    1931. 

  1931. 			status = inb(info->base + UART_LSR);
    1932. 

  1932. 

  1933. 			if (status & UART_LSR_PE) {
    1934. 

  1934. 				info->err_shadow |= NPPI_NOTIFY_PARITY;
    1935. 

  1935. 			}
    1936. 

  1936. 			if (status & UART_LSR_FE) {
    1937. 

  1937. 				info->err_shadow |= NPPI_NOTIFY_FRAMING;
    1938. 

  1938. 			}
    1939. 

  1939. 			if (status & UART_LSR_OE) {
    1940. 

  1940. 				info->err_shadow |= NPPI_NOTIFY_HW_OVERRUN;
    1941. 

  1941. 			}
    1942. 

  1942. 			if (status & UART_LSR_BI)
    1943. 

  1943. 				info->err_shadow |= NPPI_NOTIFY_BREAK;
    1944. 

  1944. 

  1945. 			if (info->IsMoxaMustChipFlag) {
    1946. 

  1946. 				/*
    1947. 

  1947. 				   if ( (status & 0x02) && !(status & 0x01) ) {
    1948. 

  1948. 				   outb(info->base+UART_FCR,  0x23);
    1949. 

  1949. 				   continue;
    1950. 

  1950. 				   }
    1951. 

  1951. 				 */
    1952. 

  1952. 				if (iir == MOXA_MUST_IIR_GDA || iir == MOXA_MUST_IIR_RDA || iir == MOXA_MUST_IIR_RTO || iir == MOXA_MUST_IIR_LSR)
    1953. 

  1953. 					mxser_receive_chars(info, &status);
    1954. 

  1954. 

  1955. 			} else {
    1956. 

  1956. 				// above add by Victor Yu. 09-02-2002
    1957. 

  1957. 

  1958. 				status &= info->read_status_mask;
    1959. 

  1959. 				if (status & UART_LSR_DR)
    1960. 

  1960. 					mxser_receive_chars(info, &status);
    1961. 

  1961. 			}
    1962. 

  1962. 			msr = inb(info->base + UART_MSR);
    1963. 

  1963. 			if (msr & UART_MSR_ANY_DELTA) {
    1964. 

  1964. 				mxser_check_modem_status(info, msr);
    1965. 

  1965. 			}
    1966. 

  1966. 			// following add by Victor Yu. 09-13-2002
    1967. 

  1967. 			if (info->IsMoxaMustChipFlag) {
    1968. 

  1968. 				if ((iir == 0x02) && (status & UART_LSR_THRE)) {
    1969. 

  1969. 					mxser_transmit_chars(info);
    1970. 

  1970. 				}
    1971. 

  1971. 			} else {
    1972. 

  1972. 				// above add by Victor Yu. 09-13-2002
    1973. 

  1973. 

  1974. 				if (status & UART_LSR_THRE) {
    1975. 

  1975. /* 8-2-99 by William
    1976. 

  1976. 			    if ( info->x_char || (info->xmit_cnt > 0) )
    1977. 

  1977. */
    1978. 

  1978. 					mxser_transmit_chars(info);
    1979. 

  1979. 				}
    1980. 

  1980. 			}
    1981. 

  1981. 		}
    1982. 

  1982. 		if (pass_counter++ > MXSER_ISR_PASS_LIMIT) {
    1983. 

  1983. 			break;	/* Prevent infinite loops */
    1984. 

  1984. 		}
    1985. 

  1985. 	}
    1986. 

  1986. 

  1987.       irq_stop:
    1988. 

  1988. 	//spin_unlock(&gm_lock);
    1989. 

  1989. 	return handled;
    1990. 

  1990. }
    1991. 

  1991. 

  1992. static void mxser_receive_chars(struct mxser_struct *info, int *status)
    1993. 

  1993. {
    1994. 

  1994. 	struct tty_struct *tty = info->tty;
    1995. 

  1995. 	unsigned char ch, gdl;
    1996. 

  1996. 	int ignored = 0;
    1997. 

  1997. 	int cnt = 0;
    1998. 

  1998. 	unsigned char *cp;
    1999. 

  1999. 	char *fp;
    2000. 

  2000. 	int count;
    2001. 

  2001. 	int recv_room;
    2002. 

  2002. 	int max = 256;
    2003. 

  2003. 	unsigned long flags;
    2004. 

  2004. 

  2005. 	spin_lock_irqsave(&info->slock, flags);
    2006. 

  2006. 

  2007. 	recv_room = tty->ldisc.receive_room(tty);
    2008. 

  2008. 	if ((recv_room == 0) && (!info->ldisc_stop_rx)) {
    2009. 

  2009. 		//mxser_throttle(tty);
    2010. 

  2010. 		mxser_stoprx(tty);
    2011. 

  2011. 		//return;
    2012. 

  2012. 	}
    2013. 

  2013. 

  2014. 	cp = tty->flip.char_buf;
    2015. 

  2015. 	fp = tty->flip.flag_buf;
    2016. 

  2016. 	count = 0;
    2017. 

  2017. 

  2018. 	// following add by Victor Yu. 09-02-2002
    2019. 

  2019. 	if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
    2020. 

  2020. 

  2021. 		if (*status & UART_LSR_SPECIAL) {
    2022. 

  2022. 			goto intr_old;
    2023. 

  2023. 		}
    2024. 

  2024. 		// following add by Victor Yu. 02-11-2004
    2025. 

  2025. 		if (info->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID && (*status & MOXA_MUST_LSR_RERR))
    2026. 

  2026. 			goto intr_old;
    2027. 

  2027. 		// above add by Victor Yu. 02-14-2004
    2028. 

  2028. 		if (*status & MOXA_MUST_LSR_RERR)
    2029. 

  2029. 			goto intr_old;
    2030. 

  2030. 

  2031. 		gdl = inb(info->base + MOXA_MUST_GDL_REGISTER);
    2032. 

  2032. 

  2033. 		if (info->IsMoxaMustChipFlag == MOXA_MUST_MU150_HWID)	// add by Victor Yu. 02-11-2004
    2034. 

  2034. 			gdl &= MOXA_MUST_GDL_MASK;
    2035. 

  2035. 		if (gdl >= recv_room) {
    2036. 

  2036. 			if (!info->ldisc_stop_rx) {
    2037. 

  2037. 				//mxser_throttle(tty);
    2038. 

  2038. 				mxser_stoprx(tty);
    2039. 

  2039. 			}
    2040. 

  2040. 			//return;
    2041. 

  2041. 		}
    2042. 

  2042. 		while (gdl--) {
    2043. 

  2043. 			ch = inb(info->base + UART_RX);
    2044. 

  2044. 			count++;
    2045. 

  2045. 			*cp++ = ch;
    2046. 

  2046. 			*fp++ = 0;
    2047. 

  2047. 			cnt++;
    2048. 

  2048. 			/*
    2049. 

  2049. 			   if((count>=HI_WATER) && (info->stop_rx==0)){
    2050. 

  2050. 			   mxser_stoprx(tty);
    2051. 

  2051. 			   info->stop_rx=1;
    2052. 

  2052. 			   break;
    2053. 

  2053. 			   } */
    2054. 

  2054. 		}
    2055. 

  2055. 		goto end_intr;
    2056. 

  2056. 	}
    2057. 

  2057. intr_old:
    2058. 

  2058. 	// above add by Victor Yu. 09-02-2002
    2059. 

  2059. 

  2060. 	do {
    2061. 

  2061. 		if (max-- < 0)
    2062. 

  2062. 			break;
    2063. 

  2063. 		/*
    2064. 

  2064. 		   if((count>=HI_WATER) && (info->stop_rx==0)){
    2065. 

  2065. 		   mxser_stoprx(tty);
    2066. 

  2066. 		   info->stop_rx=1;
    2067. 

  2067. 		   break;
    2068. 

  2068. 		   }
    2069. 

  2069. 		 */
    2070. 

  2070. 

  2071. 		ch = inb(info->base + UART_RX);
    2072. 

  2072. 		// following add by Victor Yu. 09-02-2002
    2073. 

  2073. 		if (info->IsMoxaMustChipFlag && (*status & UART_LSR_OE) /*&& !(*status&UART_LSR_DR) */ )
    2074. 

  2074. 			outb(0x23, info->base + UART_FCR);
    2075. 

  2075. 		*status &= info->read_status_mask;
    2076. 

  2076. 		// above add by Victor Yu. 09-02-2002
    2077. 

  2077. 		if (*status & info->ignore_status_mask) {
    2078. 

  2078. 			if (++ignored > 100)
    2079. 

  2079. 				break;
    2080. 

  2080. 		} else {
    2081. 

  2081. 			count++;
    2082. 

  2082. 			if (*status & UART_LSR_SPECIAL) {
    2083. 

  2083. 				if (*status & UART_LSR_BI) {
    2084. 

  2084. 					*fp++ = TTY_BREAK;
    2085. 

  2085. /* added by casper 1/11/2000 */
    2086. 

  2086. 					info->icount.brk++;
    2087. 

  2087. 

  2088. /* */
    2089. 

  2089. 					if (info->flags & ASYNC_SAK)
    2090. 

  2090. 						do_SAK(tty);
    2091. 

  2091. 				} else if (*status & UART_LSR_PE) {
    2092. 

  2092. 					*fp++ = TTY_PARITY;
    2093. 

  2093. /* added by casper 1/11/2000 */
    2094. 

  2094. 					info->icount.parity++;
    2095. 

  2095. /* */
    2096. 

  2096. 				} else if (*status & UART_LSR_FE) {
    2097. 

  2097. 					*fp++ = TTY_FRAME;
    2098. 

  2098. /* added by casper 1/11/2000 */
    2099. 

  2099. 					info->icount.frame++;
    2100. 

  2100. /* */
    2101. 

  2101. 				} else if (*status & UART_LSR_OE) {
    2102. 

  2102. 					*fp++ = TTY_OVERRUN;
    2103. 

  2103. /* added by casper 1/11/2000 */
    2104. 

  2104. 					info->icount.overrun++;
    2105. 

  2105. /* */
    2106. 

  2106. 				} else
    2107. 

  2107. 					*fp++ = 0;
    2108. 

  2108. 			} else
    2109. 

  2109. 				*fp++ = 0;
    2110. 

  2110. 			*cp++ = ch;
    2111. 

  2111. 			cnt++;
    2112. 

  2112. 			if (cnt >= recv_room) {
    2113. 

  2113. 				if (!info->ldisc_stop_rx) {
    2114. 

  2114. 					//mxser_throttle(tty);
    2115. 

  2115. 					mxser_stoprx(tty);
    2116. 

  2116. 				}
    2117. 

  2117. 				break;
    2118. 

  2118. 			}
    2119. 

  2119. 

  2120. 		}
    2121. 

  2121. 

  2122. 		// following add by Victor Yu. 09-02-2002
    2123. 

  2123. 		if (info->IsMoxaMustChipFlag)
    2124. 

  2124. 			break;
    2125. 

  2125. 		// above add by Victor Yu. 09-02-2002
    2126. 

  2126. 

  2127. 		/* mask by Victor Yu. 09-02-2002
    2128. 

  2128. 		 *status = inb(info->base + UART_LSR) & info->read_status_mask;
    2129. 

  2129. 		 */
    2130. 

  2130. 		// following add by Victor Yu. 09-02-2002
    2131. 

  2131. 		*status = inb(info->base + UART_LSR);
    2132. 

  2132. 		// above add by Victor Yu. 09-02-2002
    2133. 

  2133. 	} while (*status & UART_LSR_DR);
    2134. 

  2134. 

  2135.       end_intr:		// add by Victor Yu. 09-02-2002
    2136. 

  2136. 

  2137. 	mxvar_log.rxcnt[info->port] += cnt;
    2138. 

  2138. 	info->mon_data.rxcnt += cnt;
    2139. 

  2139. 	info->mon_data.up_rxcnt += cnt;
    2140. 

  2140. 	spin_unlock_irqrestore(&info->slock, flags);
    2141. 

  2141. 	
    2142. 

  2142. 	tty_flip_buffer_push(tty);
    2143. 

  2143. }
    2144. 

  2144. 

  2145. static void mxser_transmit_chars(struct mxser_struct *info)
    2146. 

  2146. {
    2147. 

  2147. 	int count, cnt;
    2148. 

  2148. 	unsigned long flags;
    2149. 

  2149. 

  2150. 	spin_lock_irqsave(&info->slock, flags);
    2151. 

  2151. 

  2152. 	if (info->x_char) {
    2153. 

  2153. 		outb(info->x_char, info->base + UART_TX);
    2154. 

  2154. 		info->x_char = 0;
    2155. 

  2155. 		mxvar_log.txcnt[info->port]++;
    2156. 

  2156. 		info->mon_data.txcnt++;
    2157. 

  2157. 		info->mon_data.up_txcnt++;
    2158. 

  2158. 

  2159. /* added by casper 1/11/2000 */
    2160. 

  2160. 		info->icount.tx++;
    2161. 

  2161. /* */
    2162. 

  2162. 		spin_unlock_irqrestore(&info->slock, flags);
    2163. 

  2163. 		return;
    2164. 

  2164. 	}
    2165. 

  2165. 

  2166. 	if (info->xmit_buf == 0) {
    2167. 

  2167. 		spin_unlock_irqrestore(&info->slock, flags);
    2168. 

  2168. 		return;
    2169. 

  2169. 	}
    2170. 

  2170. 

  2171. 	if ((info->xmit_cnt <= 0) || info->tty->stopped || (info->tty->hw_stopped && (info->type != PORT_16550A) && (!info->IsMoxaMustChipFlag))) {
    2172. 

  2172. 		info->IER &= ~UART_IER_THRI;
    2173. 

  2173. 		outb(info->IER, info->base + UART_IER);
    2174. 

  2174. 		spin_unlock_irqrestore(&info->slock, flags);
    2175. 

  2175. 		return;
    2176. 

  2176. 	}
    2177. 

  2177. 

  2178. 	cnt = info->xmit_cnt;
    2179. 

  2179. 	count = info->xmit_fifo_size;
    2180. 

  2180. 	do {
    2181. 

  2181. 		outb(info->xmit_buf[info->xmit_tail++], info->base + UART_TX);
    2182. 

  2182. 		info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE - 1);
    2183. 

  2183. 		if (--info->xmit_cnt <= 0)
    2184. 

  2184. 			break;
    2185. 

  2185. 	} while (--count > 0);
    2186. 

  2186. 	mxvar_log.txcnt[info->port] += (cnt - info->xmit_cnt);
    2187. 

  2187. 

  2188. // added by James 03-12-2004.
    2189. 

  2189. 	info->mon_data.txcnt += (cnt - info->xmit_cnt);
    2190. 

  2190. 	info->mon_data.up_txcnt += (cnt - info->xmit_cnt);
    2191. 

  2191. // (above) added by James.
    2192. 

  2192. 

  2193. /* added by casper 1/11/2000 */
    2194. 

  2194. 	info->icount.tx += (cnt - info->xmit_cnt);
    2195. 

  2195. /* */
    2196. 

  2196. 

  2197. 	if (info->xmit_cnt < WAKEUP_CHARS) {
    2198. 

  2198. 		set_bit(MXSER_EVENT_TXLOW, &info->event);
    2199. 

  2199. 		schedule_work(&info->tqueue);
    2200. 

  2200. 	}
    2201. 

  2201. 	if (info->xmit_cnt <= 0) {
    2202. 

  2202. 		info->IER &= ~UART_IER_THRI;
    2203. 

  2203. 		outb(info->IER, info->base + UART_IER);
    2204. 

  2204. 	}
    2205. 

  2205. 	spin_unlock_irqrestore(&info->slock, flags);
    2206. 

  2206. }
    2207. 

  2207. 

  2208. static void mxser_check_modem_status(struct mxser_struct *info, int status)
    2209. 

  2209. {
    2210. 

  2210. 	/* update input line counters */
    2211. 

  2211. 	if (status & UART_MSR_TERI)
    2212. 

  2212. 		info->icount.rng++;
    2213. 

  2213. 	if (status & UART_MSR_DDSR)
    2214. 

  2214. 		info->icount.dsr++;
    2215. 

  2215. 	if (status & UART_MSR_DDCD)
    2216. 

  2216. 		info->icount.dcd++;
    2217. 

  2217. 	if (status & UART_MSR_DCTS)
    2218. 

  2218. 		info->icount.cts++;
    2219. 

  2219. 	info->mon_data.modem_status = status;
    2220. 

  2220. 	wake_up_interruptible(&info->delta_msr_wait);
    2221. 

  2221. 

  2222. 

  2223. 	if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
    2224. 

  2224. 		if (status & UART_MSR_DCD)
    2225. 

  2225. 			wake_up_interruptible(&info->open_wait);
    2226. 

  2226. 		schedule_work(&info->tqueue);
    2227. 

  2227. 	}
    2228. 

  2228. 

  2229. 	if (info->flags & ASYNC_CTS_FLOW) {
    2230. 

  2230. 		if (info->tty->hw_stopped) {
    2231. 

  2231. 			if (status & UART_MSR_CTS) {
    2232. 

  2232. 				info->tty->hw_stopped = 0;
    2233. 

  2233. 

  2234. 				if ((info->type != PORT_16550A) && (!info->IsMoxaMustChipFlag)) {
    2235. 

  2235. 					info->IER |= UART_IER_THRI;
    2236. 

  2236. 					outb(info->IER, info->base + UART_IER);
    2237. 

  2237. 				}
    2238. 

  2238. 				set_bit(MXSER_EVENT_TXLOW, &info->event);
    2239. 

  2239. 				schedule_work(&info->tqueue);			}
    2240. 

  2240. 		} else {
    2241. 

  2241. 			if (!(status & UART_MSR_CTS)) {
    2242. 

  2242. 				info->tty->hw_stopped = 1;
    2243. 

  2243. 				if ((info->type != PORT_16550A) && (!info->IsMoxaMustChipFlag)) {
    2244. 

  2244. 					info->IER &= ~UART_IER_THRI;
    2245. 

  2245. 					outb(info->IER, info->base + UART_IER);
    2246. 

  2246. 				}
    2247. 

  2247. 			}
    2248. 

  2248. 		}
    2249. 

  2249. 	}
    2250. 

  2250. }
    2251. 

  2251. 

  2252. static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp, struct mxser_struct *info)
    2253. 

  2253. {
    2254. 

  2254. 	DECLARE_WAITQUEUE(wait, current);
    2255. 

  2255. 	int retval;
    2256. 

  2256. 	int do_clocal = 0;
    2257. 

  2257. 	unsigned long flags;
    2258. 

  2258. 

  2259. 	/*
    2260. 

  2260. 	 * If non-blocking mode is set, or the port is not enabled,
    2261. 

  2261. 	 * then make the check up front and then exit.
    2262. 

  2262. 	 */
    2263. 

  2263. 	if ((filp->f_flags & O_NONBLOCK) || (tty->flags & (1 << TTY_IO_ERROR))) {
    2264. 

  2264. 		info->flags |= ASYNC_NORMAL_ACTIVE;
    2265. 

  2265. 		return (0);
    2266. 

  2266. 	}
    2267. 

  2267. 

  2268. 	if (tty->termios->c_cflag & CLOCAL)
    2269. 

  2269. 		do_clocal = 1;
    2270. 

  2270. 

  2271. 	/*
    2272. 

  2272. 	 * Block waiting for the carrier detect and the line to become
    2273. 

  2273. 	 * free (i.e., not in use by the callout).  While we are in
    2274. 

  2274. 	 * this loop, info->count is dropped by one, so that
    2275. 

  2275. 	 * mxser_close() knows when to free things.  We restore it upon
    2276. 

  2276. 	 * exit, either normal or abnormal.
    2277. 

  2277. 	 */
    2278. 

  2278. 	retval = 0;
    2279. 

  2279. 	add_wait_queue(&info->open_wait, &wait);
    2280. 

  2280. 

  2281. 	spin_lock_irqsave(&info->slock, flags);
    2282. 

  2282. 	if (!tty_hung_up_p(filp))
    2283. 

  2283. 		info->count--;
    2284. 

  2284. 	spin_unlock_irqrestore(&info->slock, flags);
    2285. 

  2285. 	info->blocked_open++;
    2286. 

  2286. 	while (1) {
    2287. 

  2287. 		spin_lock_irqsave(&info->slock, flags);
    2288. 

  2288. 		outb(inb(info->base + UART_MCR) | UART_MCR_DTR | UART_MCR_RTS, info->base + UART_MCR);
    2289. 

  2289. 		spin_unlock_irqrestore(&info->slock, flags);
    2290. 

  2290. 		set_current_state(TASK_INTERRUPTIBLE);
    2291. 

  2291. 		if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)) {
    2292. 

  2292. 			if (info->flags & ASYNC_HUP_NOTIFY)
    2293. 

  2293. 				retval = -EAGAIN;
    2294. 

  2294. 			else
    2295. 

  2295. 				retval = -ERESTARTSYS;
    2296. 

  2296. 			break;
    2297. 

  2297. 		}
    2298. 

  2298. 		if (!(info->flags & ASYNC_CLOSING) && (do_clocal || (inb(info->base + UART_MSR) & UART_MSR_DCD)))
    2299. 

  2299. 			break;
    2300. 

  2300. 		if (signal_pending(current)) {
    2301. 

  2301. 			retval = -ERESTARTSYS;
    2302. 

  2302. 			break;
    2303. 

  2303. 		}
    2304. 

  2304. 		schedule();
    2305. 

  2305. 	}
    2306. 

  2306. 	set_current_state(TASK_RUNNING);
    2307. 

  2307. 	remove_wait_queue(&info->open_wait, &wait);
    2308. 

  2308. 	if (!tty_hung_up_p(filp))
    2309. 

  2309. 		info->count++;
    2310. 

  2310. 	info->blocked_open--;
    2311. 

  2311. 	if (retval)
    2312. 

  2312. 		return (retval);
    2313. 

  2313. 	info->flags |= ASYNC_NORMAL_ACTIVE;
    2314. 

  2314. 	return (0);
    2315. 

  2315. }
    2316. 

  2316. 

  2317. static int mxser_startup(struct mxser_struct *info)
    2318. 

  2318. {
    2319. 

  2319. 

  2320. 	unsigned long page;
    2321. 

  2321. 	unsigned long flags;
    2322. 

  2322. 

  2323. 	page = __get_free_page(GFP_KERNEL);
    2324. 

  2324. 	if (!page)
    2325. 

  2325. 		return (-ENOMEM);
    2326. 

  2326. 

  2327. 	spin_lock_irqsave(&info->slock, flags);
    2328. 

  2328. 

  2329. 	if (info->flags & ASYNC_INITIALIZED) {
    2330. 

  2330. 		free_page(page);
    2331. 

  2331. 		spin_unlock_irqrestore(&info->slock, flags);
    2332. 

  2332. 		return (0);
    2333. 

  2333. 	}
    2334. 

  2334. 

  2335. 	if (!info->base || !info->type) {
    2336. 

  2336. 		if (info->tty)
    2337. 

  2337. 			set_bit(TTY_IO_ERROR, &info->tty->flags);
    2338. 

  2338. 		free_page(page);
    2339. 

  2339. 		spin_unlock_irqrestore(&info->slock, flags);
    2340. 

  2340. 		return (0);
    2341. 

  2341. 	}
    2342. 

  2342. 	if (info->xmit_buf)
    2343. 

  2343. 		free_page(page);
    2344. 

  2344. 	else
    2345. 

  2345. 		info->xmit_buf = (unsigned char *) page;
    2346. 

  2346. 

  2347. 	/*
    2348. 

  2348. 	 * Clear the FIFO buffers and disable them
    2349. 

  2349. 	 * (they will be reenabled in mxser_change_speed())
    2350. 

  2350. 	 */
    2351. 

  2351. 	if (info->IsMoxaMustChipFlag)
    2352. 

  2352. 		outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
    2353. 

  2353. 	else
    2354. 

  2354. 		outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), info->base + UART_FCR);
    2355. 

  2355. 

  2356. 	/*
    2357. 

  2357. 	 * At this point there's no way the LSR could still be 0xFF;
    2358. 

  2358. 	 * if it is, then bail out, because there's likely no UART
    2359. 

  2359. 	 * here.
    2360. 

  2360. 	 */
    2361. 

  2361. 	if (inb(info->base + UART_LSR) == 0xff) {
    2362. 

  2362. 		spin_unlock_irqrestore(&info->slock, flags);
    2363. 

  2363. 		if (capable(CAP_SYS_ADMIN)) {
    2364. 

  2364. 			if (info->tty)
    2365. 

  2365. 				set_bit(TTY_IO_ERROR, &info->tty->flags);
    2366. 

  2366. 			return (0);
    2367. 

  2367. 		} else
    2368. 

  2368. 			return (-ENODEV);
    2369. 

  2369. 	}
    2370. 

  2370. 

  2371. 	/*
    2372. 

  2372. 	 * Clear the interrupt registers.
    2373. 

  2373. 	 */
    2374. 

  2374. 	(void) inb(info->base + UART_LSR);
    2375. 

  2375. 	(void) inb(info->base + UART_RX);
    2376. 

  2376. 	(void) inb(info->base + UART_IIR);
    2377. 

  2377. 	(void) inb(info->base + UART_MSR);
    2378. 

  2378. 

  2379. 	/*
    2380. 

  2380. 	 * Now, initialize the UART
    2381. 

  2381. 	 */
    2382. 

  2382. 	outb(UART_LCR_WLEN8, info->base + UART_LCR);	/* reset DLAB */
    2383. 

  2383. 	info->MCR = UART_MCR_DTR | UART_MCR_RTS;
    2384. 

  2384. 	outb(info->MCR, info->base + UART_MCR);
    2385. 

  2385. 

  2386. 	/*
    2387. 

  2387. 	 * Finally, enable interrupts
    2388. 

  2388. 	 */
    2389. 

  2389. 	info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
    2390. 

  2390. //      info->IER = UART_IER_RLSI | UART_IER_RDI;
    2391. 

  2391. 

  2392. 	// following add by Victor Yu. 08-30-2002
    2393. 

  2393. 	if (info->IsMoxaMustChipFlag)
    2394. 

  2394. 		info->IER |= MOXA_MUST_IER_EGDAI;
    2395. 

  2395. 	// above add by Victor Yu. 08-30-2002
    2396. 

  2396. 	outb(info->IER, info->base + UART_IER);	/* enable interrupts */
    2397. 

  2397. 

  2398. 	/*
    2399. 

  2399. 	 * And clear the interrupt registers again for luck.
    2400. 

  2400. 	 */
    2401. 

  2401. 	(void) inb(info->base + UART_LSR);
    2402. 

  2402. 	(void) inb(info->base + UART_RX);
    2403. 

  2403. 	(void) inb(info->base + UART_IIR);
    2404. 

  2404. 	(void) inb(info->base + UART_MSR);
    2405. 

  2405. 

  2406. 	if (info->tty)
    2407. 

  2407. 		clear_bit(TTY_IO_ERROR, &info->tty->flags);
    2408. 

  2408. 	info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
    2409. 

  2409. 

  2410. 	/*
    2411. 

  2411. 	 * and set the speed of the serial port
    2412. 

  2412. 	 */
    2413. 

  2413. 	spin_unlock_irqrestore(&info->slock, flags);
    2414. 

  2414. 	mxser_change_speed(info, NULL);
    2415. 

  2415. 

  2416. 	info->flags |= ASYNC_INITIALIZED;
    2417. 

  2417. 	return (0);
    2418. 

  2418. }
    2419. 

  2419. 

  2420. /*
    2421. 

  2421.  * This routine will shutdown a serial port; interrupts maybe disabled, and
    2422. 

  2422.  * DTR is dropped if the hangup on close termio flag is on.
    2423. 

  2423.  */
    2424. 

  2424. static void mxser_shutdown(struct mxser_struct *info)
    2425. 

  2425. {
    2426. 

  2426. 	unsigned long flags;
    2427. 

  2427. 

  2428. 	if (!(info->flags & ASYNC_INITIALIZED))
    2429. 

  2429. 		return;
    2430. 

  2430. 

  2431. 	spin_lock_irqsave(&info->slock, flags);
    2432. 

  2432. 

  2433. 	/*
    2434. 

  2434. 	 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
    2435. 

  2435. 	 * here so the queue might never be waken up
    2436. 

  2436. 	 */
    2437. 

  2437. 	wake_up_interruptible(&info->delta_msr_wait);
    2438. 

  2438. 

  2439. 	/*
    2440. 

  2440. 	 * Free the IRQ, if necessary
    2441. 

  2441. 	 */
    2442. 

  2442. 	if (info->xmit_buf) {
    2443. 

  2443. 		free_page((unsigned long) info->xmit_buf);
    2444. 

  2444. 		info->xmit_buf = NULL;
    2445. 

  2445. 	}
    2446. 

  2446. 

  2447. 	info->IER = 0;
    2448. 

  2448. 	outb(0x00, info->base + UART_IER);
    2449. 

  2449. 

  2450. 	if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
    2451. 

  2451. 		info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
    2452. 

  2452. 	outb(info->MCR, info->base + UART_MCR);
    2453. 

  2453. 

  2454. 	/* clear Rx/Tx FIFO's */
    2455. 

  2455. 	// following add by Victor Yu. 08-30-2002
    2456. 

  2456. 	if (info->IsMoxaMustChipFlag)
    2457. 

  2457. 		outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
    2458. 

  2458. 	else
    2459. 

  2459. 		// above add by Victor Yu. 08-30-2002
    2460. 

  2460. 		outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), info->base + UART_FCR);
    2461. 

  2461. 

  2462. 	/* read data port to reset things */
    2463. 

  2463. 	(void) inb(info->base + UART_RX);
    2464. 

  2464. 

  2465. 	if (info->tty)
    2466. 

  2466. 		set_bit(TTY_IO_ERROR, &info->tty->flags);
    2467. 

  2467. 

  2468. 	info->flags &= ~ASYNC_INITIALIZED;
    2469. 

  2469. 

  2470. 	// following add by Victor Yu. 09-23-2002
    2471. 

  2471. 	if (info->IsMoxaMustChipFlag) {
    2472. 

  2472. 		SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->base);
    2473. 

  2473. 	}
    2474. 

  2474. 	// above add by Victor Yu. 09-23-2002
    2475. 

  2475. 

  2476. 	spin_unlock_irqrestore(&info->slock, flags);
    2477. 

  2477. }
    2478. 

  2478. 

  2479. /*
    2480. 

  2480.  * This routine is called to set the UART divisor registers to match
    2481. 

  2481.  * the specified baud rate for a serial port.
    2482. 

  2482.  */
    2483. 

  2483. static int mxser_change_speed(struct mxser_struct *info, struct termios *old_termios)
    2484. 

  2484. {
    2485. 

  2485. 	unsigned cflag, cval, fcr;
    2486. 

  2486. 	int ret = 0;
    2487. 

  2487. 	unsigned char status;
    2488. 

  2488. 	long baud;
    2489. 

  2489. 	unsigned long flags;
    2490. 

  2490. 

  2491. 

  2492. 	if (!info->tty || !info->tty->termios)
    2493. 

  2493. 		return ret;
    2494. 

  2494. 	cflag = info->tty->termios->c_cflag;
    2495. 

  2495. 	if (!(info->base))
    2496. 

  2496. 		return ret;
    2497. 

  2497. 

  2498. 

  2499. #ifndef B921600
    2500. 

  2500. #define B921600 (B460800 +1)
    2501. 

  2501. #endif
    2502. 

  2502. 	if (mxser_set_baud_method[info->port] == 0) {
    2503. 

  2503. 		switch (cflag & (CBAUD | CBAUDEX)) {
    2504. 

  2504. 		case B921600:
    2505. 

  2505. 			baud = 921600;
    2506. 

  2506. 			break;
    2507. 

  2507. 		case B460800:
    2508. 

  2508. 			baud = 460800;
    2509. 

  2509. 			break;
    2510. 

  2510. 		case B230400:
    2511. 

  2511. 			baud = 230400;
    2512. 

  2512. 			break;
    2513. 

  2513. 		case B115200:
    2514. 

  2514. 			baud = 115200;
    2515. 

  2515. 			break;
    2516. 

  2516. 		case B57600:
    2517. 

  2517. 			baud = 57600;
    2518. 

  2518. 			break;
    2519. 

  2519. 		case B38400:
    2520. 

  2520. 			baud = 38400;
    2521. 

  2521. 			break;
    2522. 

  2522. 		case B19200:
    2523. 

  2523. 			baud = 19200;
    2524. 

  2524. 			break;
    2525. 

  2525. 		case B9600:
    2526. 

  2526. 			baud = 9600;
    2527. 

  2527. 			break;
    2528. 

  2528. 		case B4800:
    2529. 

  2529. 			baud = 4800;
    2530. 

  2530. 			break;
    2531. 

  2531. 		case B2400:
    2532. 

  2532. 			baud = 2400;
    2533. 

  2533. 			break;
    2534. 

  2534. 		case B1800:
    2535. 

  2535. 			baud = 1800;
    2536. 

  2536. 			break;
    2537. 

  2537. 		case B1200:
    2538. 

  2538. 			baud = 1200;
    2539. 

  2539. 			break;
    2540. 

  2540. 		case B600:
    2541. 

  2541. 			baud = 600;
    2542. 

  2542. 			break;
    2543. 

  2543. 		case B300:
    2544. 

  2544. 			baud = 300;
    2545. 

  2545. 			break;
    2546. 

  2546. 		case B200:
    2547. 

  2547. 			baud = 200;
    2548. 

  2548. 			break;
    2549. 

  2549. 		case B150:
    2550. 

  2550. 			baud = 150;
    2551. 

  2551. 			break;
    2552. 

  2552. 		case B134:
    2553. 

  2553. 			baud = 134;
    2554. 

  2554. 			break;
    2555. 

  2555. 		case B110:
    2556. 

  2556. 			baud = 110;
    2557. 

  2557. 			break;
    2558. 

  2558. 		case B75:
    2559. 

  2559. 			baud = 75;
    2560. 

  2560. 			break;
    2561. 

  2561. 		case B50:
    2562. 

  2562. 			baud = 50;
    2563. 

  2563. 			break;
    2564. 

  2564. 		default:
    2565. 

  2565. 			baud = 0;
    2566. 

  2566. 			break;
    2567. 

  2567. 		}
    2568. 

  2568. 		mxser_set_baud(info, baud);
    2569. 

  2569. 	}
    2570. 

  2570. 

  2571. 	/* byte size and parity */
    2572. 

  2572. 	switch (cflag & CSIZE) {
    2573. 

  2573. 	case CS5:
    2574. 

  2574. 		cval = 0x00;
    2575. 

  2575. 		break;
    2576. 

  2576. 	case CS6:
    2577. 

  2577. 		cval = 0x01;
    2578. 

  2578. 		break;
    2579. 

  2579. 	case CS7:
    2580. 

  2580. 		cval = 0x02;
    2581. 

  2581. 		break;
    2582. 

  2582. 	case CS8:
    2583. 

  2583. 		cval = 0x03;
    2584. 

  2584. 		break;
    2585. 

  2585. 	default:
    2586. 

  2586. 		cval = 0x00;
    2587. 

  2587. 		break;		/* too keep GCC shut... */
    2588. 

  2588. 	}
    2589. 

  2589. 	if (cflag & CSTOPB)
    2590. 

  2590. 		cval |= 0x04;
    2591. 

  2591. 	if (cflag & PARENB)
    2592. 

  2592. 		cval |= UART_LCR_PARITY;
    2593. 

  2593. 	if (!(cflag & PARODD)) {
    2594. 

  2594. 		cval |= UART_LCR_EPAR;
    2595. 

  2595. 	}
    2596. 

  2596. 	if (cflag & CMSPAR)
    2597. 

  2597. 		cval |= UART_LCR_SPAR;
    2598. 

  2598. 

  2599. 	if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
    2600. 

  2600. 		if (info->IsMoxaMustChipFlag) {
    2601. 

  2601. 			fcr = UART_FCR_ENABLE_FIFO;
    2602. 

  2602. 			fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
    2603. 

  2603. 			SET_MOXA_MUST_FIFO_VALUE(info);
    2604. 

  2604. 		} else
    2605. 

  2605. 			fcr = 0;
    2606. 

  2606. 	} else {
    2607. 

  2607. 		fcr = UART_FCR_ENABLE_FIFO;
    2608. 

  2608. 		// following add by Victor Yu. 08-30-2002
    2609. 

  2609. 		if (info->IsMoxaMustChipFlag) {
    2610. 

  2610. 			fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
    2611. 

  2611. 			SET_MOXA_MUST_FIFO_VALUE(info);
    2612. 

  2612. 		} else {
    2613. 

  2613. 			// above add by Victor Yu. 08-30-2002
    2614. 

  2614. 

  2615. 			switch (info->rx_trigger) {
    2616. 

  2616. 			case 1:
    2617. 

  2617. 				fcr |= UART_FCR_TRIGGER_1;
    2618. 

  2618. 				break;
    2619. 

  2619. 			case 4:
    2620. 

  2620. 				fcr |= UART_FCR_TRIGGER_4;
    2621. 

  2621. 				break;
    2622. 

  2622. 			case 8:
    2623. 

  2623. 				fcr |= UART_FCR_TRIGGER_8;
    2624. 

  2624. 				break;
    2625. 

  2625. 			default:
    2626. 

  2626. 				fcr |= UART_FCR_TRIGGER_14;
    2627. 

  2627. 				break;
    2628. 

  2628. 			}
    2629. 

  2629. 		}
    2630. 

  2630. 	}
    2631. 

  2631. 

  2632. 	/* CTS flow control flag and modem status interrupts */
    2633. 

  2633. 	info->IER &= ~UART_IER_MSI;
    2634. 

  2634. 	info->MCR &= ~UART_MCR_AFE;
    2635. 

  2635. 	if (cflag & CRTSCTS) {
    2636. 

  2636. 		info->flags |= ASYNC_CTS_FLOW;
    2637. 

  2637. 		info->IER |= UART_IER_MSI;
    2638. 

  2638. 		if ((info->type == PORT_16550A) || (info->IsMoxaMustChipFlag)) {
    2639. 

  2639. 			info->MCR |= UART_MCR_AFE;
    2640. 

  2640. 			//status = mxser_get_msr(info->base, 0, info->port);
    2641. 

  2641. /*	save_flags(flags);
    2642. 

  2642. 	cli();
    2643. 

  2643. 	status = inb(baseaddr + UART_MSR);
    2644. 

  2644. 	restore_flags(flags);*/
    2645. 

  2645. 			//mxser_check_modem_status(info, status);
    2646. 

  2646. 		} else {
    2647. 

  2647. 			//status = mxser_get_msr(info->base, 0, info->port);
    2648. 

  2648. 

  2649. 			//MX_LOCK(&info->slock);
    2650. 

  2650. 			status = inb(info->base + UART_MSR);
    2651. 

  2651. 			//MX_UNLOCK(&info->slock);
    2652. 

  2652. 			if (info->tty->hw_stopped) {
    2653. 

  2653. 				if (status & UART_MSR_CTS) {
    2654. 

  2654. 					info->tty->hw_stopped = 0;
    2655. 

  2655. 					if ((info->type != PORT_16550A) && (!info->IsMoxaMustChipFlag)) {
    2656. 

  2656. 						info->IER |= UART_IER_THRI;
    2657. 

  2657. 						outb(info->IER, info->base + UART_IER);
    2658. 

  2658. 					}
    2659. 

  2659. 					set_bit(MXSER_EVENT_TXLOW, &info->event);
    2660. 

  2660. 					schedule_work(&info->tqueue);				}
    2661. 

  2661. 			} else {
    2662. 

  2662. 				if (!(status & UART_MSR_CTS)) {
    2663. 

  2663. 					info->tty->hw_stopped = 1;
    2664. 

  2664. 					if ((info->type != PORT_16550A) && (!info->IsMoxaMustChipFlag)) {
    2665. 

  2665. 						info->IER &= ~UART_IER_THRI;
    2666. 

  2666. 						outb(info->IER, info->base + UART_IER);
    2667. 

  2667. 					}
    2668. 

  2668. 				}
    2669. 

  2669. 			}
    2670. 

  2670. 		}
    2671. 

  2671. 	} else {
    2672. 

  2672. 		info->flags &= ~ASYNC_CTS_FLOW;
    2673. 

  2673. 	}
    2674. 

  2674. 	outb(info->MCR, info->base + UART_MCR);
    2675. 

  2675. 	if (cflag & CLOCAL) {
    2676. 

  2676. 		info->flags &= ~ASYNC_CHECK_CD;
    2677. 

  2677. 	} else {
    2678. 

  2678. 		info->flags |= ASYNC_CHECK_CD;
    2679. 

  2679. 		info->IER |= UART_IER_MSI;
    2680. 

  2680. 	}
    2681. 

  2681. 	outb(info->IER, info->base + UART_IER);
    2682. 

  2682. 

  2683. 	/*
    2684. 

  2684. 	 * Set up parity check flag
    2685. 

  2685. 	 */
    2686. 

  2686. 	info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
    2687. 

  2687. 	if (I_INPCK(info->tty))
    2688. 

  2688. 		info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
    2689. 

  2689. 	if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
    2690. 

  2690. 		info->read_status_mask |= UART_LSR_BI;
    2691. 

  2691. 

  2692. 	info->ignore_status_mask = 0;
    2693. 

  2693. 

  2694. 	if (I_IGNBRK(info->tty)) {
    2695. 

  2695. 		info->ignore_status_mask |= UART_LSR_BI;
    2696. 

  2696. 		info->read_status_mask |= UART_LSR_BI;
    2697. 

  2697. 		/*
    2698. 

  2698. 		 * If we're ignore parity and break indicators, ignore
    2699. 

  2699. 		 * overruns too.  (For real raw support).
    2700. 

  2700. 		 */
    2701. 

  2701. 		if (I_IGNPAR(info->tty)) {
    2702. 

  2702. 			info->ignore_status_mask |= UART_LSR_OE | UART_LSR_PE | UART_LSR_FE;
    2703. 

  2703. 			info->read_status_mask |= UART_LSR_OE | UART_LSR_PE | UART_LSR_FE;
    2704. 

  2704. 		}
    2705. 

  2705. 	}
    2706. 

  2706. 	// following add by Victor Yu. 09-02-2002
    2707. 

  2707. 	if (info->IsMoxaMustChipFlag) {
    2708. 

  2708. 		spin_lock_irqsave(&info->slock, flags);
    2709. 

  2709. 		SET_MOXA_MUST_XON1_VALUE(info->base, START_CHAR(info->tty));
    2710. 

  2710. 		SET_MOXA_MUST_XOFF1_VALUE(info->base, STOP_CHAR(info->tty));
    2711. 

  2711. 		if (I_IXON(info->tty)) {
    2712. 

  2712. 			ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
    2713. 

  2713. 		} else {
    2714. 

  2714. 			DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
    2715. 

  2715. 		}
    2716. 

  2716. 		if (I_IXOFF(info->tty)) {
    2717. 

  2717. 			ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
    2718. 

  2718. 		} else {
    2719. 

  2719. 			DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
    2720. 

  2720. 		}
    2721. 

  2721. 		/*
    2722. 

  2722. 		   if ( I_IXANY(info->tty) ) {
    2723. 

  2723. 		   info->MCR |= MOXA_MUST_MCR_XON_ANY;
    2724. 

  2724. 		   ENABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
    2725. 

  2725. 		   } else {
    2726. 

  2726. 		   info->MCR &= ~MOXA_MUST_MCR_XON_ANY;
    2727. 

  2727. 		   DISABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
    2728. 

  2728. 		   }
    2729. 

  2729. 		 */
    2730. 

  2730. 		spin_unlock_irqrestore(&info->slock, flags);
    2731. 

  2731. 	}
    2732. 

  2732. 	// above add by Victor Yu. 09-02-2002
    2733. 

  2733. 

  2734. 

  2735. 	outb(fcr, info->base + UART_FCR);	/* set fcr */
    2736. 

  2736. 	outb(cval, info->base + UART_LCR);
    2737. 

  2737. 

  2738. 	return ret;
    2739. 

  2739. }
    2740. 

  2740. 

  2741. 

  2742. static int mxser_set_baud(struct mxser_struct *info, long newspd)
    2743. 

  2743. {
    2744. 

  2744. 	int quot = 0;
    2745. 

  2745. 	unsigned char cval;
    2746. 

  2746. 	int ret = 0;
    2747. 

  2747. 	unsigned long flags;
    2748. 

  2748. 

  2749. 	if (!info->tty || !info->tty->termios)
    2750. 

  2750. 		return ret;
    2751. 

  2751. 

  2752. 	if (!(info->base))
    2753. 

  2753. 		return ret;
    2754. 

  2754. 

  2755. 	if (newspd > info->MaxCanSetBaudRate)
    2756. 

  2756. 		return 0;
    2757. 

  2757. 

  2758. 	info->realbaud = newspd;
    2759. 

  2759. 	if (newspd == 134) {
    2760. 

  2760. 		quot = (2 * info->baud_base / 269);
    2761. 

  2761. 	} else if (newspd) {
    2762. 

  2762. 		quot = info->baud_base / newspd;
    2763. 

  2763. 

  2764. 		if (quot == 0)
    2765. 

  2765. 			quot = 1;
    2766. 

  2766. 

  2767. 	} else {
    2768. 

  2768. 		quot = 0;
    2769. 

  2769. 	}
    2770. 

  2770. 

  2771. 	info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
    2772. 

  2772. 	info->timeout += HZ / 50;	/* Add .02 seconds of slop */
    2773. 

  2773. 

  2774. 	if (quot) {
    2775. 

  2775. 		spin_lock_irqsave(&info->slock, flags);
    2776. 

  2776. 		info->MCR |= UART_MCR_DTR;
    2777. 

  2777. 		outb(info->MCR, info->base + UART_MCR);
    2778. 

  2778. 		spin_unlock_irqrestore(&info->slock, flags);
    2779. 

  2779. 	} else {
    2780. 

  2780. 		spin_lock_irqsave(&info->slock, flags);
    2781. 

  2781. 		info->MCR &= ~UART_MCR_DTR;
    2782. 

  2782. 		outb(info->MCR, info->base + UART_MCR);
    2783. 

  2783. 		spin_unlock_irqrestore(&info->slock, flags);
    2784. 

  2784. 		return ret;
    2785. 

  2785. 	}
    2786. 

  2786. 

  2787. 	cval = inb(info->base + UART_LCR);
    2788. 

  2788. 

  2789. 	outb(cval | UART_LCR_DLAB, info->base + UART_LCR);	/* set DLAB */
    2790. 

  2790. 

  2791. 	outb(quot & 0xff, info->base + UART_DLL);	/* LS of divisor */
    2792. 

  2792. 	outb(quot >> 8, info->base + UART_DLM);	/* MS of divisor */
    2793. 

  2793. 	outb(cval, info->base + UART_LCR);	/* reset DLAB */
    2794. 

  2794. 

  2795. 

  2796. 	return ret;
    2797. 

  2797. }
    2798. 

  2798. 

  2799. 

  2800. 

  2801. /*
    2802. 

  2802.  * ------------------------------------------------------------
    2803. 

  2803.  * friends of mxser_ioctl()
    2804. 

  2804.  * ------------------------------------------------------------
    2805. 

  2805.  */
    2806. 

  2806. static int mxser_get_serial_info(struct mxser_struct *info, struct serial_struct __user *retinfo)
    2807. 

  2807. {
    2808. 

  2808. 	struct serial_struct tmp;
    2809. 

  2809. 

  2810. 	if (!retinfo)
    2811. 

  2811. 		return (-EFAULT);
    2812. 

  2812. 	memset(&tmp, 0, sizeof(tmp));
    2813. 

  2813. 	tmp.type = info->type;
    2814. 

  2814. 	tmp.line = info->port;
    2815. 

  2815. 	tmp.port = info->base;
    2816. 

  2816. 	tmp.irq = info->irq;
    2817. 

  2817. 	tmp.flags = info->flags;
    2818. 

  2818. 	tmp.baud_base = info->baud_base;
    2819. 

  2819. 	tmp.close_delay = info->close_delay;
    2820. 

  2820. 	tmp.closing_wait = info->closing_wait;
    2821. 

  2821. 	tmp.custom_divisor = info->custom_divisor;
    2822. 

  2822. 	tmp.hub6 = 0;
    2823. 

  2823. 	if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
    2824. 

  2824. 		return -EFAULT;
    2825. 

  2825. 	return (0);
    2826. 

  2826. }
    2827. 

  2827. 

  2828. static int mxser_set_serial_info(struct mxser_struct *info, struct serial_struct __user *new_info)
    2829. 

  2829. {
    2830. 

  2830. 	struct serial_struct new_serial;
    2831. 

  2831. 	unsigned int flags;
    2832. 

  2832. 	int retval = 0;
    2833. 

  2833. 

  2834. 	if (!new_info || !info->base)
    2835. 

  2835. 		return (-EFAULT);
    2836. 

  2836. 	if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
    2837. 

  2837. 		return -EFAULT;
    2838. 

  2838. 

  2839. 	if ((new_serial.irq != info->irq) || (new_serial.port != info->base) || (new_serial.custom_divisor != info->custom_divisor) || (new_serial.baud_base != info->baud_base))
    2840. 

  2840. 		return (-EPERM);
    2841. 

  2841. 

  2842. 	flags = info->flags & ASYNC_SPD_MASK;
    2843. 

  2843. 

  2844. 	if (!capable(CAP_SYS_ADMIN)) {
    2845. 

  2845. 		if ((new_serial.baud_base != info->baud_base) || (new_serial.close_delay != info->close_delay) || ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
    2846. 

  2846. 			return (-EPERM);
    2847. 

  2847. 		info->flags = ((info->flags & ~ASYNC_USR_MASK) | (new_serial.flags & ASYNC_USR_MASK));
    2848. 

  2848. 	} else {
    2849. 

  2849. 		/*
    2850. 

  2850. 		 * OK, past this point, all the error checking has been done.
    2851. 

  2851. 		 * At this point, we start making changes.....
    2852. 

  2852. 		 */
    2853. 

  2853. 		info->flags = ((info->flags & ~ASYNC_FLAGS) | (new_serial.flags & ASYNC_FLAGS));
    2854. 

  2854. 		info->close_delay = new_serial.close_delay * HZ / 100;
    2855. 

  2855. 		info->closing_wait = new_serial.closing_wait * HZ / 100;
    2856. 

  2856. 		info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
    2857. 

  2857. 		info->tty->low_latency = 0;	//(info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
    2858. 

  2858. 	}
    2859. 

  2859. 

  2860. 	/* added by casper, 3/17/2000, for mouse */
    2861. 

  2861. 	info->type = new_serial.type;
    2862. 

  2862. 

  2863. 	process_txrx_fifo(info);
    2864. 

  2864. 

  2865. 	/* */
    2866. 

  2866. 	if (info->flags & ASYNC_INITIALIZED) {
    2867. 

  2867. 		if (flags != (info->flags & ASYNC_SPD_MASK)) {
    2868. 

  2868. 			mxser_change_speed(info, NULL);
    2869. 

  2869. 		}
    2870. 

  2870. 	} else {
    2871. 

  2871. 		retval = mxser_startup(info);
    2872. 

  2872. 	}
    2873. 

  2873. 	return (retval);
    2874. 

  2874. }
    2875. 

  2875. 

  2876. /*
    2877. 

  2877.  * mxser_get_lsr_info - get line status register info
    2878. 

  2878.  *
    2879. 

  2879.  * Purpose: Let user call ioctl() to get info when the UART physically
    2880. 

  2880.  *	    is emptied.  On bus types like RS485, the transmitter must
    2881. 

  2881.  *	    release the bus after transmitting. This must be done when
    2882. 

  2882.  *	    the transmit shift register is empty, not be done when the
    2883. 

  2883.  *	    transmit holding register is empty.  This functionality
    2884. 

  2884.  *	    allows an RS485 driver to be written in user space.
    2885. 

  2885.  */
    2886. 

  2886. static int mxser_get_lsr_info(struct mxser_struct *info, unsigned int __user *value)
    2887. 

  2887. {
    2888. 

  2888. 	unsigned char status;
    2889. 

  2889. 	unsigned int result;
    2890. 

  2890. 	unsigned long flags;
    2891. 

  2891. 

  2892. 	spin_lock_irqsave(&info->slock, flags);
    2893. 

  2893. 	status = inb(info->base + UART_LSR);
    2894. 

  2894. 	spin_unlock_irqrestore(&info->slock, flags);
    2895. 

  2895. 	result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
    2896. 

  2896. 	return put_user(result, value);
    2897. 

  2897. }
    2898. 

  2898. 

  2899. /*
    2900. 

  2900.  * This routine sends a break character out the serial port.
    2901. 

  2901.  */
    2902. 

  2902. static void mxser_send_break(struct mxser_struct *info, int duration)
    2903. 

  2903. {
    2904. 

  2904. 	unsigned long flags;
    2905. 

  2905. 

  2906. 	if (!info->base)
    2907. 

  2907. 		return;
    2908. 

  2908. 	set_current_state(TASK_INTERRUPTIBLE);
    2909. 

  2909. 	spin_lock_irqsave(&info->slock, flags);
    2910. 

  2910. 	outb(inb(info->base + UART_LCR) | UART_LCR_SBC, info->base + UART_LCR);
    2911. 

  2911. 	spin_unlock_irqrestore(&info->slock, flags);
    2912. 

  2912. 	schedule_timeout(duration);
    2913. 

  2913. 	spin_lock_irqsave(&info->slock, flags);
    2914. 

  2914. 	outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC, info->base + UART_LCR);
    2915. 

  2915. 	spin_unlock_irqrestore(&info->slock, flags);
    2916. 

  2916. }
    2917. 

  2917. 

  2918. static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
    2919. 

  2919. {
    2920. 

  2920. 	struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
    2921. 

  2921. 	unsigned char control, status;
    2922. 

  2922. 	unsigned long flags;
    2923. 

  2923. 

  2924. 

  2925. 	if (tty->index == MXSER_PORTS)
    2926. 

  2926. 		return (-ENOIOCTLCMD);
    2927. 

  2927. 	if (tty->flags & (1 << TTY_IO_ERROR))
    2928. 

  2928. 		return (-EIO);
    2929. 

  2929. 

  2930. 	control = info->MCR;
    2931. 

  2931. 

  2932. 	spin_lock_irqsave(&info->slock, flags);
    2933. 

  2933. 	status = inb(info->base + UART_MSR);
    2934. 

  2934. 	if (status & UART_MSR_ANY_DELTA)
    2935. 

  2935. 		mxser_check_modem_status(info, status);
    2936. 

  2936. 	spin_unlock_irqrestore(&info->slock, flags);
    2937. 

  2937. 	return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
    2938. 

  2938. 	    ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) | ((status & UART_MSR_RI) ? TIOCM_RNG : 0) | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
    2939. 

  2939. }
    2940. 

  2940. 

  2941. static int mxser_tiocmset(struct tty_struct *tty, struct file *file, unsigned int set, unsigned int clear)
    2942. 

  2942. {
    2943. 

  2943. 	struct mxser_struct *info = (struct mxser_struct *) tty->driver_data;
    2944. 

  2944. 	unsigned long flags;
    2945. 

  2945. 

  2946. 

  2947. 	if (tty->index == MXSER_PORTS)
    2948. 

  2948. 		return -ENOIOCTLCMD;
    2949. 

  2949. 	if (tty->flags & (1 << TTY_IO_ERROR))
    2950. 

  2950. 		return -EIO;
    2951. 

  2951. 

  2952. 	spin_lock_irqsave(&info->slock, flags);
    2953. 

  2953. 

  2954. 	if (set & TIOCM_RTS)
    2955. 

  2955. 		info->MCR |= UART_MCR_RTS;
    2956. 

  2956. 	if (set & TIOCM_DTR)
    2957. 

  2957. 		info->MCR |= UART_MCR_DTR;
    2958. 

  2958. 

  2959. 	if (clear & TIOCM_RTS)
    2960. 

  2960. 		info->MCR &= ~UART_MCR_RTS;
    2961. 

  2961. 	if (clear & TIOCM_DTR)
    2962. 

  2962. 		info->MCR &= ~UART_MCR_DTR;
    2963. 

  2963. 

  2964. 	outb(info->MCR, info->base + UART_MCR);
    2965. 

  2965. 	spin_unlock_irqrestore(&info->slock, flags);
    2966. 

  2966. 	return 0;
    2967. 

  2967. }
    2968. 

  2968. 

  2969. 

  2970. static int mxser_read_register(int, unsigned short *);
    2971. 

  2971. static int mxser_program_mode(int);
    2972. 

  2972. static void mxser_normal_mode(int);
    2973. 

  2973. 

  2974. static int mxser_get_ISA_conf(int cap, struct mxser_hwconf *hwconf)
    2975. 

  2975. {
    2976. 

  2976. 	int id, i, bits;
    2977. 

  2977. 	unsigned short regs[16], irq;
    2978. 

  2978. 	unsigned char scratch, scratch2;
    2979. 

  2979. 

  2980. 	hwconf->IsMoxaMustChipFlag = MOXA_OTHER_UART;
    2981. 

  2981. 

  2982. 	id = mxser_read_register(cap, regs);
    2983. 

  2983. 	if (id == C168_ASIC_ID) {
    2984. 

  2984. 		hwconf->board_type = MXSER_BOARD_C168_ISA;
    2985. 

  2985. 		hwconf->ports = 8;
    2986. 

  2986. 	} else if (id == C104_ASIC_ID) {
    2987. 

  2987. 		hwconf->board_type = MXSER_BOARD_C104_ISA;
    2988. 

  2988. 		hwconf->ports = 4;
    2989. 

  2989. 	} else if (id == C102_ASIC_ID) {
    2990. 

  2990. 		hwconf->board_type = MXSER_BOARD_C102_ISA;
    2991. 

  2991. 		hwconf->ports = 2;
    2992. 

  2992. 	} else if (id == CI132_ASIC_ID) {
    2993. 

  2993. 		hwconf->board_type = MXSER_BOARD_CI132;
    2994. 

  2994. 		hwconf->ports = 2;
    2995. 

  2995. 	} else if (id == CI134_ASIC_ID) {
    2996. 

  2996. 		hwconf->board_type = MXSER_BOARD_CI134;
    2997. 

  2997. 		hwconf->ports = 4;
    2998. 

  2998. 	} else if (id == CI104J_ASIC_ID) {
    2999. 

  2999. 		hwconf->board_type = MXSER_BOARD_CI104J;
    3000. 

  3000. 		hwconf->ports = 4;
    3001. 

  3001. 	} else
    3002. 

  3002. 		return (0);
    3003. 

  3003. 

  3004. 	irq = 0;
    3005. 

  3005. 	if (hwconf->ports == 2) {
    3006. 

  3006. 		irq = regs[9] & 0xF000;
    3007. 

  3007. 		irq = irq | (irq >> 4);
    3008. 

  3008. 		if (irq != (regs[9] & 0xFF00))
    3009. 

  3009. 			return (MXSER_ERR_IRQ_CONFLIT);
    3010. 

  3010. 	} else if (hwconf->ports == 4) {
    3011. 

  3011. 		irq = regs[9] & 0xF000;
    3012. 

  3012. 		irq = irq | (irq >> 4);
    3013. 

  3013. 		irq = irq | (irq >> 8);
    3014. 

  3014. 		if (irq != regs[9])
    3015. 

  3015. 			return (MXSER_ERR_IRQ_CONFLIT);
    3016. 

  3016. 	} else if (hwconf->ports == 8) {
    3017. 

  3017. 		irq = regs[9] & 0xF000;
    3018. 

  3018. 		irq = irq | (irq >> 4);
    3019. 

  3019. 		irq = irq | (irq >> 8);
    3020. 

  3020. 		if ((irq != regs[9]) || (irq != regs[10]))
    3021. 

  3021. 			return (MXSER_ERR_IRQ_CONFLIT);
    3022. 

  3022. 	}
    3023. 

  3023. 

  3024. 	if (!irq) {
    3025. 

  3025. 		return (MXSER_ERR_IRQ);
    3026. 

  3026. 	}
    3027. 

  3027. 	hwconf->irq = ((int) (irq & 0xF000) >> 12);
    3028. 

  3028. 	for (i = 0; i < 8; i++)
    3029. 

  3029. 		hwconf->ioaddr[i] = (int) regs[i + 1] & 0xFFF8;
    3030. 

  3030. 	if ((regs[12] & 0x80) == 0) {
    3031. 

  3031. 		return (MXSER_ERR_VECTOR);
    3032. 

  3032. 	}
    3033. 

  3033. 	hwconf->vector = (int) regs[11];	/* interrupt vector */
    3034. 

  3034. 	if (id == 1)
    3035. 

  3035. 		hwconf->vector_mask = 0x00FF;
    3036. 

  3036. 	else
    3037. 

  3037. 		hwconf->vector_mask = 0x000F;
    3038. 

  3038. 	for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
    3039. 

  3039. 		if (regs[12] & bits) {
    3040. 

  3040. 			hwconf->baud_base[i] = 921600;
    3041. 

  3041. 			hwconf->MaxCanSetBaudRate[i] = 921600;	// add by Victor Yu. 09-04-2002
    3042. 

  3042. 		} else {
    3043. 

  3043. 			hwconf->baud_base[i] = 115200;
    3044. 

  3044. 			hwconf->MaxCanSetBaudRate[i] = 115200;	// add by Victor Yu. 09-04-2002
    3045. 

  3045. 		}
    3046. 

  3046. 	}
    3047. 

  3047. 	scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
    3048. 

  3048. 	outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
    3049. 

  3049. 	outb(0, cap + UART_EFR);	/* EFR is the same as FCR */
    3050. 

  3050. 	outb(scratch2, cap + UART_LCR);
    3051. 

  3051. 	outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
    3052. 

  3052. 	scratch = inb(cap + UART_IIR);
    3053. 

  3053. 

  3054. 	if (scratch & 0xC0)
    3055. 

  3055. 		hwconf->uart_type = PORT_16550A;
    3056. 

  3056. 	else
    3057. 

  3057. 		hwconf->uart_type = PORT_16450;
    3058. 

  3058. 	if (id == 1)
    3059. 

  3059. 		hwconf->ports = 8;
    3060. 

  3060. 	else
    3061. 

  3061. 		hwconf->ports = 4;
    3062. 

  3062. 	request_region(hwconf->ioaddr[0], 8 * hwconf->ports, "mxser(IO)");
    3063. 

  3063. 	request_region(hwconf->vector, 1, "mxser(vector)");
    3064. 

  3064. 	return (hwconf->ports);
    3065. 

  3065. }
    3066. 

  3066. 

  3067. #define CHIP_SK 	0x01	/* Serial Data Clock  in Eprom */
    3068. 

  3068. #define CHIP_DO 	0x02	/* Serial Data Output in Eprom */
    3069. 

  3069. #define CHIP_CS 	0x04	/* Serial Chip Select in Eprom */
    3070. 

  3070. #define CHIP_DI 	0x08	/* Serial Data Input  in Eprom */
    3071. 

  3071. #define EN_CCMD 	0x000	/* Chip's command register     */
    3072. 

  3072. #define EN0_RSARLO	0x008	/* Remote start address reg 0  */
    3073. 

  3073. #define EN0_RSARHI	0x009	/* Remote start address reg 1  */
    3074. 

  3074. #define EN0_RCNTLO	0x00A	/* Remote byte count reg WR    */
    3075. 

  3075. #define EN0_RCNTHI	0x00B	/* Remote byte count reg WR    */
    3076. 

  3076. #define EN0_DCFG	0x00E	/* Data configuration reg WR   */
    3077. 

  3077. #define EN0_PORT	0x010	/* Rcv missed frame error counter RD */
    3078. 

  3078. #define ENC_PAGE0	0x000	/* Select page 0 of chip registers   */
    3079. 

  3079. #define ENC_PAGE3	0x0C0	/* Select page 3 of chip registers   */
    3080. 

  3080. static int mxser_read_register(int port, unsigned short *regs)
    3081. 

  3081. {
    3082. 

  3082. 	int i, k, value, id;
    3083. 

  3083. 	unsigned int j;
    3084. 

  3084. 

  3085. 	id = mxser_program_mode(port);
    3086. 

  3086. 	if (id < 0)
    3087. 

  3087. 		return (id);
    3088. 

  3088. 	for (i = 0; i < 14; i++) {
    3089. 

  3089. 		k = (i & 0x3F) | 0x180;
    3090. 

  3090. 		for (j = 0x100; j > 0; j >>= 1) {
    3091. 

  3091. 			outb(CHIP_CS, port);
    3092. 

  3092. 			if (k & j) {
    3093. 

  3093. 				outb(CHIP_CS | CHIP_DO, port);
    3094. 

  3094. 				outb(CHIP_CS | CHIP_DO | CHIP_SK, port);	/* A? bit of read */
    3095. 

  3095. 			} else {
    3096. 

  3096. 				outb(CHIP_CS, port);
    3097. 

  3097. 				outb(CHIP_CS | CHIP_SK, port);	/* A? bit of read */
    3098. 

  3098. 			}
    3099. 

  3099. 		}
    3100. 

  3100. 		(void) inb(port);
    3101. 

  3101. 		value = 0;
    3102. 

  3102. 		for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
    3103. 

  3103. 			outb(CHIP_CS, port);
    3104. 

  3104. 			outb(CHIP_CS | CHIP_SK, port);
    3105. 

  3105. 			if (inb(port) & CHIP_DI)
    3106. 

  3106. 				value |= j;
    3107. 

  3107. 		}
    3108. 

  3108. 		regs[i] = value;
    3109. 

  3109. 		outb(0, port);
    3110. 

  3110. 	}
    3111. 

  3111. 	mxser_normal_mode(port);
    3112. 

  3112. 	return (id);
    3113. 

  3113. }
    3114. 

  3114. 

  3115. static int mxser_program_mode(int port)
    3116. 

  3116. {
    3117. 

  3117. 	int id, i, j, n;
    3118. 

  3118. 	//unsigned long flags;
    3119. 

  3119. 

  3120. 	spin_lock(&gm_lock);
    3121. 

  3121. 	outb(0, port);
    3122. 

  3122. 	outb(0, port);
    3123. 

  3123. 	outb(0, port);
    3124. 

  3124. 	(void) inb(port);
    3125. 

  3125. 	(void) inb(port);
    3126. 

  3126. 	outb(0, port);
    3127. 

  3127. 	(void) inb(port);
    3128. 

  3128. 	//restore_flags(flags);
    3129. 

  3129. 	spin_unlock(&gm_lock);
    3130. 

  3130. 

  3131. 	id = inb(port + 1) & 0x1F;
    3132. 

  3132. 	if ((id != C168_ASIC_ID) && (id != C104_ASIC_ID) && (id != C102_ASIC_ID) && (id != CI132_ASIC_ID) && (id != CI134_ASIC_ID) && (id != CI104J_ASIC_ID))
    3133. 

  3133. 		return (-1);
    3134. 

  3134. 	for (i = 0, j = 0; i < 4; i++) {
    3135. 

  3135. 		n = inb(port + 2);
    3136. 

  3136. 		if (n == 'M') {
    3137. 

  3137. 			j = 1;
    3138. 

  3138. 		} else if ((j == 1) && (n == 1)) {
    3139. 

  3139. 			j = 2;
    3140. 

  3140. 			break;
    3141. 

  3141. 		} else
    3142. 

  3142. 			j = 0;
    3143. 

  3143. 	}
    3144. 

  3144. 	if (j != 2)
    3145. 

  3145. 		id = -2;
    3146. 

  3146. 	return (id);
    3147. 

  3147. }
    3148. 

  3148. 

  3149. static void mxser_normal_mode(int port)
    3150. 

  3150. {
    3151. 

  3151. 	int i, n;
    3152. 

  3152. 

  3153. 	outb(0xA5, port + 1);
    3154. 

  3154. 	outb(0x80, port + 3);
    3155. 

  3155. 	outb(12, port + 0);	/* 9600 bps */
    3156. 

  3156. 	outb(0, port + 1);
    3157. 

  3157. 	outb(0x03, port + 3);	/* 8 data bits */
    3158. 

  3158. 	outb(0x13, port + 4);	/* loop back mode */
    3159. 

  3159. 	for (i = 0; i < 16; i++) {
    3160. 

  3160. 		n = inb(port + 5);
    3161. 

  3161. 		if ((n & 0x61) == 0x60)
    3162. 

  3162. 			break;
    3163. 

  3163. 		if ((n & 1) == 1)
    3164. 

  3164. 			(void) inb(port);
    3165. 

  3165. 	}
    3166. 

  3166. 	outb(0x00, port + 4);
    3167. 

  3167. }
    3168. 

  3168. 

  3169. module_init(mxser_module_init);
    3170. 

  3170. module_exit(mxser_module_exit);
    3171. 

  3171.