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/drivers/scsi/mpt2sas/mpt2sas_base.c

https://bitbucket.org/bigxie/android-omap-tuna
C | 4137 lines | 2931 code | 462 blank | 744 comment | 435 complexity | cbe05a0652a7ea53f2c93f1e287a1dad MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2010 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/version.h>
  43. #include <linux/kernel.h>
  44. #include <linux/module.h>
  45. #include <linux/errno.h>
  46. #include <linux/init.h>
  47. #include <linux/slab.h>
  48. #include <linux/types.h>
  49. #include <linux/pci.h>
  50. #include <linux/kdev_t.h>
  51. #include <linux/blkdev.h>
  52. #include <linux/delay.h>
  53. #include <linux/interrupt.h>
  54. #include <linux/dma-mapping.h>
  55. #include <linux/sort.h>
  56. #include <linux/io.h>
  57. #include <linux/time.h>
  58. #include <linux/aer.h>
  59. #include "mpt2sas_base.h"
  60. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  61. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  62. static int max_queue_depth = -1;
  63. module_param(max_queue_depth, int, 0);
  64. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  65. static int max_sgl_entries = -1;
  66. module_param(max_sgl_entries, int, 0);
  67. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  68. static int msix_disable = -1;
  69. module_param(msix_disable, int, 0);
  70. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  71. static int missing_delay[2] = {-1, -1};
  72. module_param_array(missing_delay, int, NULL, 0);
  73. MODULE_PARM_DESC(missing_delay, " device missing delay , io missing delay");
  74. /* diag_buffer_enable is bitwise
  75. * bit 0 set = TRACE
  76. * bit 1 set = SNAPSHOT
  77. * bit 2 set = EXTENDED
  78. *
  79. * Either bit can be set, or both
  80. */
  81. static int diag_buffer_enable;
  82. module_param(diag_buffer_enable, int, 0);
  83. MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "
  84. "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");
  85. static int mpt2sas_fwfault_debug;
  86. MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
  87. "and halt firmware - (default=0)");
  88. static int disable_discovery = -1;
  89. module_param(disable_discovery, int, 0);
  90. MODULE_PARM_DESC(disable_discovery, " disable discovery ");
  91. /**
  92. * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
  93. *
  94. */
  95. static int
  96. _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
  97. {
  98. int ret = param_set_int(val, kp);
  99. struct MPT2SAS_ADAPTER *ioc;
  100. if (ret)
  101. return ret;
  102. printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
  103. list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
  104. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  105. return 0;
  106. }
  107. module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
  108. param_get_int, &mpt2sas_fwfault_debug, 0644);
  109. /**
  110. * _base_fault_reset_work - workq handling ioc fault conditions
  111. * @work: input argument, used to derive ioc
  112. * Context: sleep.
  113. *
  114. * Return nothing.
  115. */
  116. static void
  117. _base_fault_reset_work(struct work_struct *work)
  118. {
  119. struct MPT2SAS_ADAPTER *ioc =
  120. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  121. unsigned long flags;
  122. u32 doorbell;
  123. int rc;
  124. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  125. if (ioc->shost_recovery)
  126. goto rearm_timer;
  127. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  128. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  129. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  130. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  131. FORCE_BIG_HAMMER);
  132. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  133. __func__, (rc == 0) ? "success" : "failed");
  134. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  135. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  136. mpt2sas_base_fault_info(ioc, doorbell &
  137. MPI2_DOORBELL_DATA_MASK);
  138. }
  139. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  140. rearm_timer:
  141. if (ioc->fault_reset_work_q)
  142. queue_delayed_work(ioc->fault_reset_work_q,
  143. &ioc->fault_reset_work,
  144. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  145. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  146. }
  147. /**
  148. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  149. * @ioc: per adapter object
  150. * Context: sleep.
  151. *
  152. * Return nothing.
  153. */
  154. void
  155. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  156. {
  157. unsigned long flags;
  158. if (ioc->fault_reset_work_q)
  159. return;
  160. /* initialize fault polling */
  161. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  162. snprintf(ioc->fault_reset_work_q_name,
  163. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  164. ioc->fault_reset_work_q =
  165. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  166. if (!ioc->fault_reset_work_q) {
  167. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  168. ioc->name, __func__, __LINE__);
  169. return;
  170. }
  171. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  172. if (ioc->fault_reset_work_q)
  173. queue_delayed_work(ioc->fault_reset_work_q,
  174. &ioc->fault_reset_work,
  175. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  176. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  177. }
  178. /**
  179. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  180. * @ioc: per adapter object
  181. * Context: sleep.
  182. *
  183. * Return nothing.
  184. */
  185. void
  186. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  187. {
  188. unsigned long flags;
  189. struct workqueue_struct *wq;
  190. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  191. wq = ioc->fault_reset_work_q;
  192. ioc->fault_reset_work_q = NULL;
  193. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  194. if (wq) {
  195. if (!cancel_delayed_work(&ioc->fault_reset_work))
  196. flush_workqueue(wq);
  197. destroy_workqueue(wq);
  198. }
  199. }
  200. /**
  201. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  202. * @ioc: per adapter object
  203. * @fault_code: fault code
  204. *
  205. * Return nothing.
  206. */
  207. void
  208. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  209. {
  210. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  211. ioc->name, fault_code);
  212. }
  213. /**
  214. * mpt2sas_halt_firmware - halt's mpt controller firmware
  215. * @ioc: per adapter object
  216. *
  217. * For debugging timeout related issues. Writing 0xCOFFEE00
  218. * to the doorbell register will halt controller firmware. With
  219. * the purpose to stop both driver and firmware, the enduser can
  220. * obtain a ring buffer from controller UART.
  221. */
  222. void
  223. mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
  224. {
  225. u32 doorbell;
  226. if (!ioc->fwfault_debug)
  227. return;
  228. dump_stack();
  229. doorbell = readl(&ioc->chip->Doorbell);
  230. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  231. mpt2sas_base_fault_info(ioc , doorbell);
  232. else {
  233. writel(0xC0FFEE00, &ioc->chip->Doorbell);
  234. printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
  235. "timeout\n", ioc->name);
  236. }
  237. panic("panic in %s\n", __func__);
  238. }
  239. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  240. /**
  241. * _base_sas_ioc_info - verbose translation of the ioc status
  242. * @ioc: per adapter object
  243. * @mpi_reply: reply mf payload returned from firmware
  244. * @request_hdr: request mf
  245. *
  246. * Return nothing.
  247. */
  248. static void
  249. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  250. MPI2RequestHeader_t *request_hdr)
  251. {
  252. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  253. MPI2_IOCSTATUS_MASK;
  254. char *desc = NULL;
  255. u16 frame_sz;
  256. char *func_str = NULL;
  257. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  258. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  259. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  260. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  261. return;
  262. if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
  263. return;
  264. switch (ioc_status) {
  265. /****************************************************************************
  266. * Common IOCStatus values for all replies
  267. ****************************************************************************/
  268. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  269. desc = "invalid function";
  270. break;
  271. case MPI2_IOCSTATUS_BUSY:
  272. desc = "busy";
  273. break;
  274. case MPI2_IOCSTATUS_INVALID_SGL:
  275. desc = "invalid sgl";
  276. break;
  277. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  278. desc = "internal error";
  279. break;
  280. case MPI2_IOCSTATUS_INVALID_VPID:
  281. desc = "invalid vpid";
  282. break;
  283. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  284. desc = "insufficient resources";
  285. break;
  286. case MPI2_IOCSTATUS_INVALID_FIELD:
  287. desc = "invalid field";
  288. break;
  289. case MPI2_IOCSTATUS_INVALID_STATE:
  290. desc = "invalid state";
  291. break;
  292. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  293. desc = "op state not supported";
  294. break;
  295. /****************************************************************************
  296. * Config IOCStatus values
  297. ****************************************************************************/
  298. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  299. desc = "config invalid action";
  300. break;
  301. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  302. desc = "config invalid type";
  303. break;
  304. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  305. desc = "config invalid page";
  306. break;
  307. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  308. desc = "config invalid data";
  309. break;
  310. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  311. desc = "config no defaults";
  312. break;
  313. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  314. desc = "config cant commit";
  315. break;
  316. /****************************************************************************
  317. * SCSI IO Reply
  318. ****************************************************************************/
  319. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  320. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  321. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  322. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  323. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  324. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  325. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  326. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  327. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  328. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  329. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  330. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  331. break;
  332. /****************************************************************************
  333. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  334. ****************************************************************************/
  335. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  336. desc = "eedp guard error";
  337. break;
  338. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  339. desc = "eedp ref tag error";
  340. break;
  341. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  342. desc = "eedp app tag error";
  343. break;
  344. /****************************************************************************
  345. * SCSI Target values
  346. ****************************************************************************/
  347. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  348. desc = "target invalid io index";
  349. break;
  350. case MPI2_IOCSTATUS_TARGET_ABORTED:
  351. desc = "target aborted";
  352. break;
  353. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  354. desc = "target no conn retryable";
  355. break;
  356. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  357. desc = "target no connection";
  358. break;
  359. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  360. desc = "target xfer count mismatch";
  361. break;
  362. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  363. desc = "target data offset error";
  364. break;
  365. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  366. desc = "target too much write data";
  367. break;
  368. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  369. desc = "target iu too short";
  370. break;
  371. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  372. desc = "target ack nak timeout";
  373. break;
  374. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  375. desc = "target nak received";
  376. break;
  377. /****************************************************************************
  378. * Serial Attached SCSI values
  379. ****************************************************************************/
  380. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  381. desc = "smp request failed";
  382. break;
  383. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  384. desc = "smp data overrun";
  385. break;
  386. /****************************************************************************
  387. * Diagnostic Buffer Post / Diagnostic Release values
  388. ****************************************************************************/
  389. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  390. desc = "diagnostic released";
  391. break;
  392. default:
  393. break;
  394. }
  395. if (!desc)
  396. return;
  397. switch (request_hdr->Function) {
  398. case MPI2_FUNCTION_CONFIG:
  399. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  400. func_str = "config_page";
  401. break;
  402. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  403. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  404. func_str = "task_mgmt";
  405. break;
  406. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  407. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  408. func_str = "sas_iounit_ctl";
  409. break;
  410. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  411. frame_sz = sizeof(Mpi2SepRequest_t);
  412. func_str = "enclosure";
  413. break;
  414. case MPI2_FUNCTION_IOC_INIT:
  415. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  416. func_str = "ioc_init";
  417. break;
  418. case MPI2_FUNCTION_PORT_ENABLE:
  419. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  420. func_str = "port_enable";
  421. break;
  422. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  423. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  424. func_str = "smp_passthru";
  425. break;
  426. default:
  427. frame_sz = 32;
  428. func_str = "unknown";
  429. break;
  430. }
  431. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  432. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  433. _debug_dump_mf(request_hdr, frame_sz/4);
  434. }
  435. /**
  436. * _base_display_event_data - verbose translation of firmware asyn events
  437. * @ioc: per adapter object
  438. * @mpi_reply: reply mf payload returned from firmware
  439. *
  440. * Return nothing.
  441. */
  442. static void
  443. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  444. Mpi2EventNotificationReply_t *mpi_reply)
  445. {
  446. char *desc = NULL;
  447. u16 event;
  448. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  449. return;
  450. event = le16_to_cpu(mpi_reply->Event);
  451. switch (event) {
  452. case MPI2_EVENT_LOG_DATA:
  453. desc = "Log Data";
  454. break;
  455. case MPI2_EVENT_STATE_CHANGE:
  456. desc = "Status Change";
  457. break;
  458. case MPI2_EVENT_HARD_RESET_RECEIVED:
  459. desc = "Hard Reset Received";
  460. break;
  461. case MPI2_EVENT_EVENT_CHANGE:
  462. desc = "Event Change";
  463. break;
  464. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  465. desc = "Device Status Change";
  466. break;
  467. case MPI2_EVENT_IR_OPERATION_STATUS:
  468. if (!ioc->hide_ir_msg)
  469. desc = "IR Operation Status";
  470. break;
  471. case MPI2_EVENT_SAS_DISCOVERY:
  472. {
  473. Mpi2EventDataSasDiscovery_t *event_data =
  474. (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
  475. printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
  476. (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
  477. "start" : "stop");
  478. if (event_data->DiscoveryStatus)
  479. printk("discovery_status(0x%08x)",
  480. le32_to_cpu(event_data->DiscoveryStatus));
  481. printk("\n");
  482. return;
  483. }
  484. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  485. desc = "SAS Broadcast Primitive";
  486. break;
  487. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  488. desc = "SAS Init Device Status Change";
  489. break;
  490. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  491. desc = "SAS Init Table Overflow";
  492. break;
  493. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  494. desc = "SAS Topology Change List";
  495. break;
  496. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  497. desc = "SAS Enclosure Device Status Change";
  498. break;
  499. case MPI2_EVENT_IR_VOLUME:
  500. if (!ioc->hide_ir_msg)
  501. desc = "IR Volume";
  502. break;
  503. case MPI2_EVENT_IR_PHYSICAL_DISK:
  504. if (!ioc->hide_ir_msg)
  505. desc = "IR Physical Disk";
  506. break;
  507. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  508. if (!ioc->hide_ir_msg)
  509. desc = "IR Configuration Change List";
  510. break;
  511. case MPI2_EVENT_LOG_ENTRY_ADDED:
  512. if (!ioc->hide_ir_msg)
  513. desc = "Log Entry Added";
  514. break;
  515. }
  516. if (!desc)
  517. return;
  518. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  519. }
  520. #endif
  521. /**
  522. * _base_sas_log_info - verbose translation of firmware log info
  523. * @ioc: per adapter object
  524. * @log_info: log info
  525. *
  526. * Return nothing.
  527. */
  528. static void
  529. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  530. {
  531. union loginfo_type {
  532. u32 loginfo;
  533. struct {
  534. u32 subcode:16;
  535. u32 code:8;
  536. u32 originator:4;
  537. u32 bus_type:4;
  538. } dw;
  539. };
  540. union loginfo_type sas_loginfo;
  541. char *originator_str = NULL;
  542. sas_loginfo.loginfo = log_info;
  543. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  544. return;
  545. /* each nexus loss loginfo */
  546. if (log_info == 0x31170000)
  547. return;
  548. /* eat the loginfos associated with task aborts */
  549. if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
  550. 0x31140000 || log_info == 0x31130000))
  551. return;
  552. switch (sas_loginfo.dw.originator) {
  553. case 0:
  554. originator_str = "IOP";
  555. break;
  556. case 1:
  557. originator_str = "PL";
  558. break;
  559. case 2:
  560. if (!ioc->hide_ir_msg)
  561. originator_str = "IR";
  562. else
  563. originator_str = "WarpDrive";
  564. break;
  565. }
  566. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  567. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  568. originator_str, sas_loginfo.dw.code,
  569. sas_loginfo.dw.subcode);
  570. }
  571. /**
  572. * _base_display_reply_info -
  573. * @ioc: per adapter object
  574. * @smid: system request message index
  575. * @msix_index: MSIX table index supplied by the OS
  576. * @reply: reply message frame(lower 32bit addr)
  577. *
  578. * Return nothing.
  579. */
  580. static void
  581. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  582. u32 reply)
  583. {
  584. MPI2DefaultReply_t *mpi_reply;
  585. u16 ioc_status;
  586. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  587. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  588. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  589. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  590. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  591. _base_sas_ioc_info(ioc , mpi_reply,
  592. mpt2sas_base_get_msg_frame(ioc, smid));
  593. }
  594. #endif
  595. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  596. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  597. }
  598. /**
  599. * mpt2sas_base_done - base internal command completion routine
  600. * @ioc: per adapter object
  601. * @smid: system request message index
  602. * @msix_index: MSIX table index supplied by the OS
  603. * @reply: reply message frame(lower 32bit addr)
  604. *
  605. * Return 1 meaning mf should be freed from _base_interrupt
  606. * 0 means the mf is freed from this function.
  607. */
  608. u8
  609. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  610. u32 reply)
  611. {
  612. MPI2DefaultReply_t *mpi_reply;
  613. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  614. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  615. return 1;
  616. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  617. return 1;
  618. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  619. if (mpi_reply) {
  620. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  621. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  622. }
  623. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  624. complete(&ioc->base_cmds.done);
  625. return 1;
  626. }
  627. /**
  628. * _base_async_event - main callback handler for firmware asyn events
  629. * @ioc: per adapter object
  630. * @msix_index: MSIX table index supplied by the OS
  631. * @reply: reply message frame(lower 32bit addr)
  632. *
  633. * Return 1 meaning mf should be freed from _base_interrupt
  634. * 0 means the mf is freed from this function.
  635. */
  636. static u8
  637. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  638. {
  639. Mpi2EventNotificationReply_t *mpi_reply;
  640. Mpi2EventAckRequest_t *ack_request;
  641. u16 smid;
  642. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  643. if (!mpi_reply)
  644. return 1;
  645. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  646. return 1;
  647. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  648. _base_display_event_data(ioc, mpi_reply);
  649. #endif
  650. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  651. goto out;
  652. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  653. if (!smid) {
  654. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  655. ioc->name, __func__);
  656. goto out;
  657. }
  658. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  659. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  660. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  661. ack_request->Event = mpi_reply->Event;
  662. ack_request->EventContext = mpi_reply->EventContext;
  663. ack_request->VF_ID = 0; /* TODO */
  664. ack_request->VP_ID = 0;
  665. mpt2sas_base_put_smid_default(ioc, smid);
  666. out:
  667. /* scsih callback handler */
  668. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  669. /* ctl callback handler */
  670. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  671. return 1;
  672. }
  673. /**
  674. * _base_get_cb_idx - obtain the callback index
  675. * @ioc: per adapter object
  676. * @smid: system request message index
  677. *
  678. * Return callback index.
  679. */
  680. static u8
  681. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  682. {
  683. int i;
  684. u8 cb_idx;
  685. if (smid < ioc->hi_priority_smid) {
  686. i = smid - 1;
  687. cb_idx = ioc->scsi_lookup[i].cb_idx;
  688. } else if (smid < ioc->internal_smid) {
  689. i = smid - ioc->hi_priority_smid;
  690. cb_idx = ioc->hpr_lookup[i].cb_idx;
  691. } else if (smid <= ioc->hba_queue_depth) {
  692. i = smid - ioc->internal_smid;
  693. cb_idx = ioc->internal_lookup[i].cb_idx;
  694. } else
  695. cb_idx = 0xFF;
  696. return cb_idx;
  697. }
  698. /**
  699. * _base_mask_interrupts - disable interrupts
  700. * @ioc: per adapter object
  701. *
  702. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  703. *
  704. * Return nothing.
  705. */
  706. static void
  707. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  708. {
  709. u32 him_register;
  710. ioc->mask_interrupts = 1;
  711. him_register = readl(&ioc->chip->HostInterruptMask);
  712. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  713. writel(him_register, &ioc->chip->HostInterruptMask);
  714. readl(&ioc->chip->HostInterruptMask);
  715. }
  716. /**
  717. * _base_unmask_interrupts - enable interrupts
  718. * @ioc: per adapter object
  719. *
  720. * Enabling only Reply Interrupts
  721. *
  722. * Return nothing.
  723. */
  724. static void
  725. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  726. {
  727. u32 him_register;
  728. him_register = readl(&ioc->chip->HostInterruptMask);
  729. him_register &= ~MPI2_HIM_RIM;
  730. writel(him_register, &ioc->chip->HostInterruptMask);
  731. ioc->mask_interrupts = 0;
  732. }
  733. union reply_descriptor {
  734. u64 word;
  735. struct {
  736. u32 low;
  737. u32 high;
  738. } u;
  739. };
  740. /**
  741. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  742. * @irq: irq number (not used)
  743. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  744. * @r: pt_regs pointer (not used)
  745. *
  746. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  747. */
  748. static irqreturn_t
  749. _base_interrupt(int irq, void *bus_id)
  750. {
  751. union reply_descriptor rd;
  752. u32 completed_cmds;
  753. u8 request_desript_type;
  754. u16 smid;
  755. u8 cb_idx;
  756. u32 reply;
  757. u8 msix_index;
  758. struct MPT2SAS_ADAPTER *ioc = bus_id;
  759. Mpi2ReplyDescriptorsUnion_t *rpf;
  760. u8 rc;
  761. if (ioc->mask_interrupts)
  762. return IRQ_NONE;
  763. rpf = &ioc->reply_post_free[ioc->reply_post_host_index];
  764. request_desript_type = rpf->Default.ReplyFlags
  765. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  766. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  767. return IRQ_NONE;
  768. completed_cmds = 0;
  769. cb_idx = 0xFF;
  770. do {
  771. rd.word = le64_to_cpu(rpf->Words);
  772. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  773. goto out;
  774. reply = 0;
  775. cb_idx = 0xFF;
  776. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  777. msix_index = rpf->Default.MSIxIndex;
  778. if (request_desript_type ==
  779. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  780. reply = le32_to_cpu
  781. (rpf->AddressReply.ReplyFrameAddress);
  782. if (reply > ioc->reply_dma_max_address ||
  783. reply < ioc->reply_dma_min_address)
  784. reply = 0;
  785. } else if (request_desript_type ==
  786. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  787. goto next;
  788. else if (request_desript_type ==
  789. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  790. goto next;
  791. if (smid)
  792. cb_idx = _base_get_cb_idx(ioc, smid);
  793. if (smid && cb_idx != 0xFF) {
  794. rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
  795. reply);
  796. if (reply)
  797. _base_display_reply_info(ioc, smid, msix_index,
  798. reply);
  799. if (rc)
  800. mpt2sas_base_free_smid(ioc, smid);
  801. }
  802. if (!smid)
  803. _base_async_event(ioc, msix_index, reply);
  804. /* reply free queue handling */
  805. if (reply) {
  806. ioc->reply_free_host_index =
  807. (ioc->reply_free_host_index ==
  808. (ioc->reply_free_queue_depth - 1)) ?
  809. 0 : ioc->reply_free_host_index + 1;
  810. ioc->reply_free[ioc->reply_free_host_index] =
  811. cpu_to_le32(reply);
  812. wmb();
  813. writel(ioc->reply_free_host_index,
  814. &ioc->chip->ReplyFreeHostIndex);
  815. }
  816. next:
  817. rpf->Words = cpu_to_le64(ULLONG_MAX);
  818. ioc->reply_post_host_index = (ioc->reply_post_host_index ==
  819. (ioc->reply_post_queue_depth - 1)) ? 0 :
  820. ioc->reply_post_host_index + 1;
  821. request_desript_type =
  822. ioc->reply_post_free[ioc->reply_post_host_index].Default.
  823. ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  824. completed_cmds++;
  825. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  826. goto out;
  827. if (!ioc->reply_post_host_index)
  828. rpf = ioc->reply_post_free;
  829. else
  830. rpf++;
  831. } while (1);
  832. out:
  833. if (!completed_cmds)
  834. return IRQ_NONE;
  835. wmb();
  836. writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex);
  837. return IRQ_HANDLED;
  838. }
  839. /**
  840. * mpt2sas_base_release_callback_handler - clear interrupt callback handler
  841. * @cb_idx: callback index
  842. *
  843. * Return nothing.
  844. */
  845. void
  846. mpt2sas_base_release_callback_handler(u8 cb_idx)
  847. {
  848. mpt_callbacks[cb_idx] = NULL;
  849. }
  850. /**
  851. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  852. * @cb_func: callback function
  853. *
  854. * Returns cb_func.
  855. */
  856. u8
  857. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  858. {
  859. u8 cb_idx;
  860. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  861. if (mpt_callbacks[cb_idx] == NULL)
  862. break;
  863. mpt_callbacks[cb_idx] = cb_func;
  864. return cb_idx;
  865. }
  866. /**
  867. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  868. *
  869. * Return nothing.
  870. */
  871. void
  872. mpt2sas_base_initialize_callback_handler(void)
  873. {
  874. u8 cb_idx;
  875. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  876. mpt2sas_base_release_callback_handler(cb_idx);
  877. }
  878. /**
  879. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  880. * @ioc: per adapter object
  881. * @paddr: virtual address for SGE
  882. *
  883. * Create a zero length scatter gather entry to insure the IOCs hardware has
  884. * something to use if the target device goes brain dead and tries
  885. * to send data even when none is asked for.
  886. *
  887. * Return nothing.
  888. */
  889. void
  890. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  891. {
  892. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  893. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  894. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  895. MPI2_SGE_FLAGS_SHIFT);
  896. ioc->base_add_sg_single(paddr, flags_length, -1);
  897. }
  898. /**
  899. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  900. * @paddr: virtual address for SGE
  901. * @flags_length: SGE flags and data transfer length
  902. * @dma_addr: Physical address
  903. *
  904. * Return nothing.
  905. */
  906. static void
  907. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  908. {
  909. Mpi2SGESimple32_t *sgel = paddr;
  910. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  911. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  912. sgel->FlagsLength = cpu_to_le32(flags_length);
  913. sgel->Address = cpu_to_le32(dma_addr);
  914. }
  915. /**
  916. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  917. * @paddr: virtual address for SGE
  918. * @flags_length: SGE flags and data transfer length
  919. * @dma_addr: Physical address
  920. *
  921. * Return nothing.
  922. */
  923. static void
  924. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  925. {
  926. Mpi2SGESimple64_t *sgel = paddr;
  927. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  928. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  929. sgel->FlagsLength = cpu_to_le32(flags_length);
  930. sgel->Address = cpu_to_le64(dma_addr);
  931. }
  932. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  933. /**
  934. * _base_config_dma_addressing - set dma addressing
  935. * @ioc: per adapter object
  936. * @pdev: PCI device struct
  937. *
  938. * Returns 0 for success, non-zero for failure.
  939. */
  940. static int
  941. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  942. {
  943. struct sysinfo s;
  944. char *desc = NULL;
  945. if (sizeof(dma_addr_t) > 4) {
  946. const uint64_t required_mask =
  947. dma_get_required_mask(&pdev->dev);
  948. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  949. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  950. DMA_BIT_MASK(64))) {
  951. ioc->base_add_sg_single = &_base_add_sg_single_64;
  952. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  953. desc = "64";
  954. goto out;
  955. }
  956. }
  957. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  958. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  959. ioc->base_add_sg_single = &_base_add_sg_single_32;
  960. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  961. desc = "32";
  962. } else
  963. return -ENODEV;
  964. out:
  965. si_meminfo(&s);
  966. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  967. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  968. return 0;
  969. }
  970. /**
  971. * _base_check_enable_msix - checks MSIX capabable.
  972. * @ioc: per adapter object
  973. *
  974. * Check to see if card is capable of MSIX, and set number
  975. * of available msix vectors
  976. */
  977. static int
  978. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  979. {
  980. int base;
  981. u16 message_control;
  982. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  983. if (!base) {
  984. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  985. "supported\n", ioc->name));
  986. return -EINVAL;
  987. }
  988. /* get msix vector count */
  989. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  990. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  991. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  992. "vector_count(%d)\n", ioc->name, ioc->msix_vector_count));
  993. return 0;
  994. }
  995. /**
  996. * _base_disable_msix - disables msix
  997. * @ioc: per adapter object
  998. *
  999. */
  1000. static void
  1001. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  1002. {
  1003. if (ioc->msix_enable) {
  1004. pci_disable_msix(ioc->pdev);
  1005. ioc->msix_enable = 0;
  1006. }
  1007. }
  1008. /**
  1009. * _base_enable_msix - enables msix, failback to io_apic
  1010. * @ioc: per adapter object
  1011. *
  1012. */
  1013. static int
  1014. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1015. {
  1016. struct msix_entry entries;
  1017. int r;
  1018. u8 try_msix = 0;
  1019. if (msix_disable == -1 || msix_disable == 0)
  1020. try_msix = 1;
  1021. if (!try_msix)
  1022. goto try_ioapic;
  1023. if (_base_check_enable_msix(ioc) != 0)
  1024. goto try_ioapic;
  1025. memset(&entries, 0, sizeof(struct msix_entry));
  1026. r = pci_enable_msix(ioc->pdev, &entries, 1);
  1027. if (r) {
  1028. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  1029. "failed (r=%d) !!!\n", ioc->name, r));
  1030. goto try_ioapic;
  1031. }
  1032. r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
  1033. ioc->name, ioc);
  1034. if (r) {
  1035. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
  1036. "interrupt %d !!!\n", ioc->name, entries.vector));
  1037. pci_disable_msix(ioc->pdev);
  1038. goto try_ioapic;
  1039. }
  1040. ioc->pci_irq = entries.vector;
  1041. ioc->msix_enable = 1;
  1042. return 0;
  1043. /* failback to io_apic interrupt routing */
  1044. try_ioapic:
  1045. r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
  1046. ioc->name, ioc);
  1047. if (r) {
  1048. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1049. ioc->name, ioc->pdev->irq);
  1050. r = -EBUSY;
  1051. goto out_fail;
  1052. }
  1053. ioc->pci_irq = ioc->pdev->irq;
  1054. return 0;
  1055. out_fail:
  1056. return r;
  1057. }
  1058. /**
  1059. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1060. * @ioc: per adapter object
  1061. *
  1062. * Returns 0 for success, non-zero for failure.
  1063. */
  1064. int
  1065. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1066. {
  1067. struct pci_dev *pdev = ioc->pdev;
  1068. u32 memap_sz;
  1069. u32 pio_sz;
  1070. int i, r = 0;
  1071. u64 pio_chip = 0;
  1072. u64 chip_phys = 0;
  1073. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
  1074. ioc->name, __func__));
  1075. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1076. if (pci_enable_device_mem(pdev)) {
  1077. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1078. "failed\n", ioc->name);
  1079. return -ENODEV;
  1080. }
  1081. if (pci_request_selected_regions(pdev, ioc->bars,
  1082. MPT2SAS_DRIVER_NAME)) {
  1083. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1084. "failed\n", ioc->name);
  1085. r = -ENODEV;
  1086. goto out_fail;
  1087. }
  1088. /* AER (Advanced Error Reporting) hooks */
  1089. pci_enable_pcie_error_reporting(pdev);
  1090. pci_set_master(pdev);
  1091. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1092. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1093. ioc->name, pci_name(pdev));
  1094. r = -ENODEV;
  1095. goto out_fail;
  1096. }
  1097. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1098. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  1099. if (pio_sz)
  1100. continue;
  1101. pio_chip = (u64)pci_resource_start(pdev, i);
  1102. pio_sz = pci_resource_len(pdev, i);
  1103. } else {
  1104. if (memap_sz)
  1105. continue;
  1106. /* verify memory resource is valid before using */
  1107. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  1108. ioc->chip_phys = pci_resource_start(pdev, i);
  1109. chip_phys = (u64)ioc->chip_phys;
  1110. memap_sz = pci_resource_len(pdev, i);
  1111. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1112. if (ioc->chip == NULL) {
  1113. printk(MPT2SAS_ERR_FMT "unable to map "
  1114. "adapter memory!\n", ioc->name);
  1115. r = -EINVAL;
  1116. goto out_fail;
  1117. }
  1118. }
  1119. }
  1120. }
  1121. _base_mask_interrupts(ioc);
  1122. r = _base_enable_msix(ioc);
  1123. if (r)
  1124. goto out_fail;
  1125. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1126. ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1127. "IO-APIC enabled"), ioc->pci_irq);
  1128. printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
  1129. ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
  1130. printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
  1131. ioc->name, (unsigned long long)pio_chip, pio_sz);
  1132. /* Save PCI configuration state for recovery from PCI AER/EEH errors */
  1133. pci_save_state(pdev);
  1134. return 0;
  1135. out_fail:
  1136. if (ioc->chip_phys)
  1137. iounmap(ioc->chip);
  1138. ioc->chip_phys = 0;
  1139. ioc->pci_irq = -1;
  1140. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1141. pci_disable_pcie_error_reporting(pdev);
  1142. pci_disable_device(pdev);
  1143. return r;
  1144. }
  1145. /**
  1146. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1147. * @ioc: per adapter object
  1148. * @smid: system request message index(smid zero is invalid)
  1149. *
  1150. * Returns virt pointer to message frame.
  1151. */
  1152. void *
  1153. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1154. {
  1155. return (void *)(ioc->request + (smid * ioc->request_sz));
  1156. }
  1157. /**
  1158. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1159. * @ioc: per adapter object
  1160. * @smid: system request message index
  1161. *
  1162. * Returns virt pointer to sense buffer.
  1163. */
  1164. void *
  1165. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1166. {
  1167. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1168. }
  1169. /**
  1170. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1171. * @ioc: per adapter object
  1172. * @smid: system request message index
  1173. *
  1174. * Returns phys pointer to the low 32bit address of the sense buffer.
  1175. */
  1176. __le32
  1177. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1178. {
  1179. return cpu_to_le32(ioc->sense_dma +
  1180. ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1181. }
  1182. /**
  1183. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1184. * @ioc: per adapter object
  1185. * @phys_addr: lower 32 physical addr of the reply
  1186. *
  1187. * Converts 32bit lower physical addr into a virt address.
  1188. */
  1189. void *
  1190. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1191. {
  1192. if (!phys_addr)
  1193. return NULL;
  1194. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1195. }
  1196. /**
  1197. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1198. * @ioc: per adapter object
  1199. * @cb_idx: callback index
  1200. *
  1201. * Returns smid (zero is invalid)
  1202. */
  1203. u16
  1204. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1205. {
  1206. unsigned long flags;
  1207. struct request_tracker *request;
  1208. u16 smid;
  1209. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1210. if (list_empty(&ioc->internal_free_list)) {
  1211. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1212. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1213. ioc->name, __func__);
  1214. return 0;
  1215. }
  1216. request = list_entry(ioc->internal_free_list.next,
  1217. struct request_tracker, tracker_list);
  1218. request->cb_idx = cb_idx;
  1219. smid = request->smid;
  1220. list_del(&request->tracker_list);
  1221. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1222. return smid;
  1223. }
  1224. /**
  1225. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1226. * @ioc: per adapter object
  1227. * @cb_idx: callback index
  1228. * @scmd: pointer to scsi command object
  1229. *
  1230. * Returns smid (zero is invalid)
  1231. */
  1232. u16
  1233. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1234. struct scsi_cmnd *scmd)
  1235. {
  1236. unsigned long flags;
  1237. struct scsiio_tracker *request;
  1238. u16 smid;
  1239. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1240. if (list_empty(&ioc->free_list)) {
  1241. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1242. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1243. ioc->name, __func__);
  1244. return 0;
  1245. }
  1246. request = list_entry(ioc->free_list.next,
  1247. struct scsiio_tracker, tracker_list);
  1248. request->scmd = scmd;
  1249. request->cb_idx = cb_idx;
  1250. smid = request->smid;
  1251. list_del(&request->tracker_list);
  1252. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1253. return smid;
  1254. }
  1255. /**
  1256. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1257. * @ioc: per adapter object
  1258. * @cb_idx: callback index
  1259. *
  1260. * Returns smid (zero is invalid)
  1261. */
  1262. u16
  1263. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1264. {
  1265. unsigned long flags;
  1266. struct request_tracker *request;
  1267. u16 smid;
  1268. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1269. if (list_empty(&ioc->hpr_free_list)) {
  1270. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1271. return 0;
  1272. }
  1273. request = list_entry(ioc->hpr_free_list.next,
  1274. struct request_tracker, tracker_list);
  1275. request->cb_idx = cb_idx;
  1276. smid = request->smid;
  1277. list_del(&request->tracker_list);
  1278. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1279. return smid;
  1280. }
  1281. /**
  1282. * mpt2sas_base_free_smid - put smid back on free_list
  1283. * @ioc: per adapter object
  1284. * @smid: system request message index
  1285. *
  1286. * Return nothing.
  1287. */
  1288. void
  1289. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1290. {
  1291. unsigned long flags;
  1292. int i;
  1293. struct chain_tracker *chain_req, *next;
  1294. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1295. if (smid < ioc->hi_priority_smid) {
  1296. /* scsiio queue */
  1297. i = smid - 1;
  1298. if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
  1299. list_for_each_entry_safe(chain_req, next,
  1300. &ioc->scsi_lookup[i].chain_list, tracker_list) {
  1301. list_del_init(&chain_req->tracker_list);
  1302. list_add_tail(&chain_req->tracker_list,
  1303. &ioc->free_chain_list);
  1304. }
  1305. }
  1306. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1307. ioc->scsi_lookup[i].scmd = NULL;
  1308. ioc->scsi_lookup[i].direct_io = 0;
  1309. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  1310. &ioc->free_list);
  1311. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1312. /*
  1313. * See _wait_for_commands_to_complete() call with regards
  1314. * to this code.
  1315. */
  1316. if (ioc->shost_recovery && ioc->pending_io_count) {
  1317. if (ioc->pending_io_count == 1)
  1318. wake_up(&ioc->reset_wq);
  1319. ioc->pending_io_count--;
  1320. }
  1321. return;
  1322. } else if (smid < ioc->internal_smid) {
  1323. /* hi-priority */
  1324. i = smid - ioc->hi_priority_smid;
  1325. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1326. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  1327. &ioc->hpr_free_list);
  1328. } else if (smid <= ioc->hba_queue_depth) {
  1329. /* internal queue */
  1330. i = smid - ioc->internal_smid;
  1331. ioc->internal_lookup[i].cb_idx = 0xFF;
  1332. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  1333. &ioc->internal_free_list);
  1334. }
  1335. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1336. }
  1337. /**
  1338. * _base_writeq - 64 bit write to MMIO
  1339. * @ioc: per adapter object
  1340. * @b: data payload
  1341. * @addr: address in MMIO space
  1342. * @writeq_lock: spin lock
  1343. *
  1344. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1345. * care of 32 bit environment where its not quarenteed to send the entire word
  1346. * in one transfer.
  1347. */
  1348. #ifndef writeq
  1349. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1350. spinlock_t *writeq_lock)
  1351. {
  1352. unsigned long flags;
  1353. __u64 data_out = cpu_to_le64(b);
  1354. spin_lock_irqsave(writeq_lock, flags);
  1355. writel((u32)(data_out), addr);
  1356. writel((u32)(data_out >> 32), (addr + 4));
  1357. spin_unlock_irqrestore(writeq_lock, flags);
  1358. }
  1359. #else
  1360. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1361. spinlock_t *writeq_lock)
  1362. {
  1363. writeq(cpu_to_le64(b), addr);
  1364. }
  1365. #endif
  1366. /**
  1367. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1368. * @ioc: per adapter object
  1369. * @smid: system request message index
  1370. * @handle: device handle
  1371. *
  1372. * Return nothing.
  1373. */
  1374. void
  1375. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1376. {
  1377. Mpi2RequestDescriptorUnion_t descriptor;
  1378. u64 *request = (u64 *)&descriptor;
  1379. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1380. descriptor.SCSIIO.MSIxIndex = 0; /* TODO */
  1381. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1382. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1383. descriptor.SCSIIO.LMID = 0;
  1384. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1385. &ioc->scsi_lookup_lock);
  1386. }
  1387. /**
  1388. * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
  1389. * @ioc: per adapter object
  1390. * @smid: system request message index
  1391. *
  1392. * Return nothing.
  1393. */
  1394. void
  1395. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1396. {
  1397. Mpi2RequestDescriptorUnion_t descriptor;
  1398. u64 *request = (u64 *)&descriptor;
  1399. descriptor.HighPriority.RequestFlags =
  1400. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1401. descriptor.HighPriority.MSIxIndex = 0; /* TODO */
  1402. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1403. descriptor.HighPriority.LMID = 0;
  1404. descriptor.HighPriority.Reserved1 = 0;
  1405. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1406. &ioc->scsi_lookup_lock);
  1407. }
  1408. /**
  1409. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1410. * @ioc: per adapter object
  1411. * @smid: system request message index
  1412. *
  1413. * Return nothing.
  1414. */
  1415. void
  1416. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1417. {
  1418. Mpi2RequestDescriptorUnion_t descriptor;
  1419. u64 *request = (u64 *)&descriptor;
  1420. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1421. descriptor.Default.MSIxIndex = 0; /* TODO */
  1422. descriptor.Default.SMID = cpu_to_le16(smid);
  1423. descriptor.Default.LMID = 0;
  1424. descriptor.Default.DescriptorTypeDependent = 0;
  1425. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1426. &ioc->scsi_lookup_lock);
  1427. }
  1428. /**
  1429. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1430. * @ioc: per adapter object
  1431. * @smid: system request message index
  1432. * @io_index: value used to track the IO
  1433. *
  1434. * Return nothing.
  1435. */
  1436. void
  1437. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1438. u16 io_index)
  1439. {
  1440. Mpi2RequestDescriptorUnion_t descriptor;
  1441. u64 *request = (u64 *)&descriptor;
  1442. descriptor.SCSITarget.RequestFlags =
  1443. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1444. descriptor.SCSITarget.MSIxIndex = 0; /* TODO */
  1445. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1446. descriptor.SCSITarget.LMID = 0;
  1447. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1448. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1449. &ioc->scsi_lookup_lock);
  1450. }
  1451. /**
  1452. * _base_display_dell_branding - Disply branding string
  1453. * @ioc: per adapter object
  1454. *
  1455. * Return nothing.
  1456. */
  1457. static void
  1458. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1459. {
  1460. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1461. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1462. return;
  1463. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1464. switch (ioc->pdev->subsystem_device) {
  1465. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1466. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1467. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1468. break;
  1469. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1470. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1471. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1472. break;
  1473. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1474. strncpy(dell_branding,
  1475. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1476. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1477. break;
  1478. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1479. strncpy(dell_branding,
  1480. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1481. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1482. break;
  1483. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1484. strncpy(dell_branding,
  1485. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1486. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1487. break;
  1488. case MPT2SAS_DELL_PERC_H200_SSDID:
  1489. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1490. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1491. break;
  1492. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1493. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1494. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1495. break;
  1496. default:
  1497. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1498. break;
  1499. }
  1500. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1501. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1502. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1503. ioc->pdev->subsystem_device);
  1504. }
  1505. /**
  1506. * _base_display_intel_branding - Display branding string
  1507. * @ioc: per adapter object
  1508. *
  1509. * Return nothing.
  1510. */
  1511. static void
  1512. _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
  1513. {
  1514. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
  1515. return;
  1516. switch (ioc->pdev->device) {
  1517. case MPI2_MFGPAGE_DEVID_SAS2008:
  1518. switch (ioc->pdev->subsystem_device) {
  1519. case MPT2SAS_INTEL_RMS2LL080_SSDID:
  1520. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1521. MPT2SAS_INTEL_RMS2LL080_BRANDING);
  1522. break;
  1523. case MPT2SAS_INTEL_RMS2LL040_SSDID:
  1524. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1525. MPT2SAS_INTEL_RMS2LL040_BRANDING);
  1526. break;
  1527. default:
  1528. break;
  1529. }
  1530. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1531. switch (ioc->pdev->subsystem_device) {
  1532. case MPT2SAS_INTEL_RS25GB008_SSDID:
  1533. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1534. MPT2SAS_INTEL_RS25GB008_BRANDING);
  1535. break;
  1536. default:
  1537. break;
  1538. }
  1539. default:
  1540. break;
  1541. }
  1542. }
  1543. /**
  1544. * _base_display_hp_branding - Display branding string
  1545. * @ioc: per adapter object
  1546. *
  1547. * Return nothing.
  1548. */
  1549. static void
  1550. _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
  1551. {
  1552. if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
  1553. return;
  1554. switch (ioc->pdev->device) {
  1555. case MPI2_MFGPAGE_DEVID_SAS2004:
  1556. switch (ioc->pdev->subsystem_device) {
  1557. case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
  1558. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1559. MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
  1560. break;
  1561. default:
  1562. break;
  1563. }
  1564. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1565. switch (ioc->pdev->subsystem_device) {
  1566. case MPT2SAS_HP_2_4_INTERNAL_SSDID:
  1567. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1568. MPT2SAS_HP_2_4_INTERNAL_BRANDING);
  1569. break;
  1570. case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
  1571. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1572. MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
  1573. break;
  1574. case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
  1575. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1576. MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
  1577. break;
  1578. case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
  1579. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1580. MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
  1581. break;
  1582. default:
  1583. break;
  1584. }
  1585. default:
  1586. break;
  1587. }
  1588. }
  1589. /**
  1590. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1591. * @ioc: per adapter object
  1592. *
  1593. * Return nothing.
  1594. */
  1595. static void
  1596. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1597. {
  1598. int i = 0;
  1599. char desc[16];
  1600. u8 revision;
  1601. u32 iounit_pg1_flags;
  1602. u32 bios_version;
  1603. bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
  1604. pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
  1605. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1606. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1607. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1608. ioc->name, desc,
  1609. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1610. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1611. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1612. ioc->facts.FWVersion.Word & 0x000000FF,
  1613. revision,
  1614. (bios_version & 0xFF000000) >> 24,
  1615. (bios_version & 0x00FF0000) >> 16,
  1616. (bios_version & 0x0000FF00) >> 8,
  1617. bios_version & 0x000000FF);
  1618. _base_display_dell_branding(ioc);
  1619. _base_display_intel_branding(ioc);
  1620. _base_display_hp_branding(ioc);
  1621. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1622. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1623. printk("Initiator");
  1624. i++;
  1625. }
  1626. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1627. printk("%sTarget", i ? "," : "");
  1628. i++;
  1629. }
  1630. i = 0;
  1631. printk("), ");
  1632. printk("Capabilities=(");
  1633. if (!ioc->hide_ir_msg) {
  1634. if (ioc->facts.IOCCapabilities &
  1635. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1636. printk("Raid");
  1637. i++;
  1638. }
  1639. }
  1640. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1641. printk("%sTLR", i ? "," : "");
  1642. i++;
  1643. }
  1644. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1645. printk("%sMulticast", i ? "," : "");
  1646. i++;
  1647. }
  1648. if (ioc->facts.IOCCapabilities &
  1649. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1650. printk("%sBIDI Target", i ? "," : "");
  1651. i++;
  1652. }
  1653. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1654. printk("%sEEDP", i ? "," : "");
  1655. i++;
  1656. }
  1657. if (ioc->facts.IOCCapabilities &
  1658. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1659. printk("%sSnapshot Buffer", i ? "," : "");
  1660. i++;
  1661. }
  1662. if (ioc->facts.IOCCapabilities &
  1663. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1664. printk("%sDiag Trace Buffer", i ? "," : "");
  1665. i++;
  1666. }
  1667. if (ioc->facts.IOCCapabilities &
  1668. MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
  1669. printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
  1670. i++;
  1671. }
  1672. if (ioc->facts.IOCCapabilities &
  1673. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1674. printk("%sTask Set Full", i ? "," : "");
  1675. i++;
  1676. }
  1677. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1678. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1679. printk("%sNCQ", i ? "," : "");
  1680. i++;
  1681. }
  1682. printk(")\n");
  1683. }
  1684. /**
  1685. * _base_update_missing_delay - change the missing delay timers
  1686. * @ioc: per adapter object
  1687. * @device_missing_delay: amount of time till device is reported missing
  1688. * @io_missing_delay: interval IO is returned when there is a missing device
  1689. *
  1690. * Return nothing.
  1691. *
  1692. * Passed on the command line, this function will modify the device missing
  1693. * delay, as well as the io missing delay. This should be called at driver
  1694. * load time.
  1695. */
  1696. static void
  1697. _base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
  1698. u16 device_missing_delay, u8 io_missing_delay)
  1699. {
  1700. u16 dmd, dmd_new, dmd_orignal;
  1701. u8 io_missing_delay_original;
  1702. u16 sz;
  1703. Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
  1704. Mpi2ConfigReply_t mpi_reply;
  1705. u8 num_phys = 0;
  1706. u16 ioc_status;
  1707. mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
  1708. if (!num_phys)
  1709. return;
  1710. sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
  1711. sizeof(Mpi2SasIOUnit1PhyData_t));
  1712. sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
  1713. if (!sas_iounit_pg1) {
  1714. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1715. ioc->name, __FILE__, __LINE__, __func__);
  1716. goto out;
  1717. }
  1718. if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
  1719. sas_iounit_pg1, sz))) {
  1720. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1721. ioc->name, __FILE__, __LINE__, __func__);
  1722. goto out;
  1723. }
  1724. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
  1725. MPI2_IOCSTATUS_MASK;
  1726. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  1727. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1728. ioc->name, __FILE__, __LINE__, __func__);
  1729. goto out;
  1730. }
  1731. /* device missing delay */
  1732. dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
  1733. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  1734. dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  1735. else
  1736. dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  1737. dmd_orignal = dmd;
  1738. if (device_missing_delay > 0x7F) {
  1739. dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
  1740. device_missing_delay;
  1741. dmd = dmd / 16;
  1742. dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
  1743. } else
  1744. dmd = device_missing_delay;
  1745. sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
  1746. /* io missing delay */
  1747. io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
  1748. sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
  1749. if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
  1750. sz)) {
  1751. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  1752. dmd_new = (dmd &
  1753. MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  1754. else
  1755. dmd_new =
  1756. dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  1757. printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
  1758. "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
  1759. printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
  1760. "new(%d)\n", ioc->name, io_missing_delay_original,
  1761. io_missing_delay);
  1762. ioc->device_missing_delay = dmd_new;
  1763. ioc->io_missing_delay = io_missing_delay;
  1764. }
  1765. out:
  1766. kfree(sas_iounit_pg1);
  1767. }
  1768. /**
  1769. * _base_static_config_pages - static start of day config pages
  1770. * @ioc: per adapter object
  1771. *
  1772. * Return nothing.
  1773. */
  1774. static void
  1775. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  1776. {
  1777. Mpi2ConfigReply_t mpi_reply;
  1778. u32 iounit_pg1_flags;
  1779. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  1780. if (ioc->ir_firmware)
  1781. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  1782. &ioc->manu_pg10);
  1783. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  1784. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  1785. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  1786. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  1787. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1788. _base_display_ioc_capabilities(ioc);
  1789. /*
  1790. * Enable task_set_full handling in iounit_pg1 when the
  1791. * facts capabilities indicate that its supported.
  1792. */
  1793. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1794. if ((ioc->facts.IOCCapabilities &
  1795. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  1796. iounit_pg1_flags &=
  1797. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1798. else
  1799. iounit_pg1_flags |=
  1800. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1801. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  1802. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1803. }
  1804. /**
  1805. * _base_release_memory_pools - release memory
  1806. * @ioc: per adapter object
  1807. *
  1808. * Free memory allocated from _base_allocate_memory_pools.
  1809. *
  1810. * Return nothing.
  1811. */
  1812. static void
  1813. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  1814. {
  1815. int i;
  1816. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1817. __func__));
  1818. if (ioc->request) {
  1819. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  1820. ioc->request, ioc->request_dma);
  1821. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  1822. ": free\n", ioc->name, ioc->request));
  1823. ioc->request = NULL;
  1824. }
  1825. if (ioc->sense) {
  1826. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  1827. if (ioc->sense_dma_pool)
  1828. pci_pool_destroy(ioc->sense_dma_pool);
  1829. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  1830. ": free\n", ioc->name, ioc->sense));
  1831. ioc->sense = NULL;
  1832. }
  1833. if (ioc->reply) {
  1834. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  1835. if (ioc->reply_dma_pool)
  1836. pci_pool_destroy(ioc->reply_dma_pool);
  1837. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  1838. ": free\n", ioc->name, ioc->reply));
  1839. ioc->reply = NULL;
  1840. }
  1841. if (ioc->reply_free) {
  1842. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  1843. ioc->reply_free_dma);
  1844. if (ioc->reply_free_dma_pool)
  1845. pci_pool_destroy(ioc->reply_free_dma_pool);
  1846. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  1847. "(0x%p): free\n", ioc->name, ioc->reply_free));
  1848. ioc->reply_free = NULL;
  1849. }
  1850. if (ioc->reply_post_free) {
  1851. pci_pool_free(ioc->reply_post_free_dma_pool,
  1852. ioc->reply_post_free, ioc->reply_post_free_dma);
  1853. if (ioc->reply_post_free_dma_pool)
  1854. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  1855. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1856. "reply_post_free_pool(0x%p): free\n", ioc->name,
  1857. ioc->reply_post_free));
  1858. ioc->reply_post_free = NULL;
  1859. }
  1860. if (ioc->config_page) {
  1861. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1862. "config_page(0x%p): free\n", ioc->name,
  1863. ioc->config_page));
  1864. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  1865. ioc->config_page, ioc->config_page_dma);
  1866. }
  1867. if (ioc->scsi_lookup) {
  1868. free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
  1869. ioc->scsi_lookup = NULL;
  1870. }
  1871. kfree(ioc->hpr_lookup);
  1872. kfree(ioc->internal_lookup);
  1873. if (ioc->chain_lookup) {
  1874. for (i = 0; i < ioc->chain_depth; i++) {
  1875. if (ioc->chain_lookup[i].chain_buffer)
  1876. pci_pool_free(ioc->chain_dma_pool,
  1877. ioc->chain_lookup[i].chain_buffer,
  1878. ioc->chain_lookup[i].chain_buffer_dma);
  1879. }
  1880. if (ioc->chain_dma_pool)
  1881. pci_pool_destroy(ioc->chain_dma_pool);
  1882. }
  1883. if (ioc->chain_lookup) {
  1884. free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
  1885. ioc->chain_lookup = NULL;
  1886. }
  1887. }
  1888. /**
  1889. * _base_allocate_memory_pools - allocate start of day memory pools
  1890. * @ioc: per adapter object
  1891. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1892. *
  1893. * Returns 0 success, anything else error
  1894. */
  1895. static int
  1896. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  1897. {
  1898. struct mpt2sas_facts *facts;
  1899. u32 queue_size, queue_diff;
  1900. u16 max_sge_elements;
  1901. u16 num_of_reply_frames;
  1902. u16 chains_needed_per_io;
  1903. u32 sz, total_sz;
  1904. u32 retry_sz;
  1905. u16 max_request_credit;
  1906. int i;
  1907. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1908. __func__));
  1909. retry_sz = 0;
  1910. facts = &ioc->facts;
  1911. /* command line tunables for max sgl entries */
  1912. if (max_sgl_entries != -1) {
  1913. ioc->shost->sg_tablesize = (max_sgl_entries <
  1914. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  1915. MPT2SAS_SG_DEPTH;
  1916. } else {
  1917. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  1918. }
  1919. /* command line tunables for max controller queue depth */
  1920. if (max_queue_depth != -1)
  1921. max_request_credit = (max_queue_depth < facts->RequestCredit)
  1922. ? max_queue_depth : facts->RequestCredit;
  1923. else
  1924. max_request_credit = facts->RequestCredit;
  1925. ioc->hba_queue_depth = max_request_credit;
  1926. ioc->hi_priority_depth = facts->HighPriorityCredit;
  1927. ioc->internal_depth = ioc->hi_priority_depth + 5;
  1928. /* request frame size */
  1929. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  1930. /* reply frame size */
  1931. ioc->reply_sz = facts->ReplyFrameSize * 4;
  1932. retry_allocation:
  1933. total_sz = 0;
  1934. /* calculate number of sg elements left over in the 1st frame */
  1935. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  1936. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  1937. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  1938. /* now do the same for a chain buffer */
  1939. max_sge_elements = ioc->request_sz - ioc->sge_size;
  1940. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  1941. ioc->chain_offset_value_for_main_message =
  1942. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  1943. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  1944. /*
  1945. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  1946. */
  1947. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  1948. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  1949. + 1;
  1950. if (chains_needed_per_io > facts->MaxChainDepth) {
  1951. chains_needed_per_io = facts->MaxChainDepth;
  1952. ioc->shost->sg_tablesize = min_t(u16,
  1953. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  1954. * chains_needed_per_io), ioc->shost->sg_tablesize);
  1955. }
  1956. ioc->chains_needed_per_io = chains_needed_per_io;
  1957. /* reply free queue sizing - taking into account for events */
  1958. num_of_reply_frames = ioc->hba_queue_depth + 32;
  1959. /* number of replies frames can't be a multiple of 16 */
  1960. /* decrease number of reply frames by 1 */
  1961. if (!(num_of_reply_frames % 16))
  1962. num_of_reply_frames--;
  1963. /* calculate number of reply free queue entries
  1964. * (must be multiple of 16)
  1965. */
  1966. /* (we know reply_free_queue_depth is not a multiple of 16) */
  1967. queue_size = num_of_reply_frames;
  1968. queue_size += 16 - (queue_size % 16);
  1969. ioc->reply_free_queue_depth = queue_size;
  1970. /* reply descriptor post queue sizing */
  1971. /* this size should be the number of request frames + number of reply
  1972. * frames
  1973. */
  1974. queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1;
  1975. /* round up to 16 byte boundary */
  1976. if (queue_size % 16)
  1977. queue_size += 16 - (queue_size % 16);
  1978. /* check against IOC maximum reply post queue depth */
  1979. if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
  1980. queue_diff = queue_size -
  1981. facts->MaxReplyDescriptorPostQueueDepth;
  1982. /* round queue_diff up to multiple of 16 */
  1983. if (queue_diff % 16)
  1984. queue_diff += 16 - (queue_diff % 16);
  1985. /* adjust hba_queue_depth, reply_free_queue_depth,
  1986. * and queue_size
  1987. */
  1988. ioc->hba_queue_depth -= (queue_diff / 2);
  1989. ioc->reply_free_queue_depth -= (queue_diff / 2);
  1990. queue_size = facts->MaxReplyDescriptorPostQueueDepth;
  1991. }
  1992. ioc->reply_post_queue_depth = queue_size;
  1993. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  1994. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  1995. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  1996. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  1997. ioc->chains_needed_per_io));
  1998. ioc->scsiio_depth = ioc->hba_queue_depth -
  1999. ioc->hi_priority_depth - ioc->internal_depth;
  2000. /* set the scsi host can_queue depth
  2001. * with some internal commands that could be outstanding
  2002. */
  2003. ioc->shost->can_queue = ioc->scsiio_depth - (2);
  2004. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
  2005. "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
  2006. /* contiguous pool for request and chains, 16 byte align, one extra "
  2007. * "frame for smid=0
  2008. */
  2009. ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
  2010. sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
  2011. /* hi-priority queue */
  2012. sz += (ioc->hi_priority_depth * ioc->request_sz);
  2013. /* internal queue */
  2014. sz += (ioc->internal_depth * ioc->request_sz);
  2015. ioc->request_dma_sz = sz;
  2016. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  2017. if (!ioc->request) {
  2018. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2019. "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2020. "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
  2021. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2022. if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  2023. goto out;
  2024. retry_sz += 64;
  2025. ioc->hba_queue_depth = max_request_credit - retry_sz;
  2026. goto retry_allocation;
  2027. }
  2028. if (retry_sz)
  2029. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2030. "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2031. "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
  2032. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2033. /* hi-priority queue */
  2034. ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
  2035. ioc->request_sz);
  2036. ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
  2037. ioc->request_sz);
  2038. /* internal queue */
  2039. ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
  2040. ioc->request_sz);
  2041. ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
  2042. ioc->request_sz);
  2043. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  2044. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2045. ioc->request, ioc->hba_queue_depth, ioc->request_sz,
  2046. (ioc->hba_queue_depth * ioc->request_sz)/1024));
  2047. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  2048. ioc->name, (unsigned long long) ioc->request_dma));
  2049. total_sz += sz;
  2050. sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
  2051. ioc->scsi_lookup_pages = get_order(sz);
  2052. ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
  2053. GFP_KERNEL, ioc->scsi_lookup_pages);
  2054. if (!ioc->scsi_lookup) {
  2055. printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
  2056. "sz(%d)\n", ioc->name, (int)sz);
  2057. goto out;
  2058. }
  2059. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
  2060. "depth(%d)\n", ioc->name, ioc->request,
  2061. ioc->scsiio_depth));
  2062. /* loop till the allocation succeeds */
  2063. do {
  2064. sz = ioc->chain_depth * sizeof(struct chain_tracker);
  2065. ioc->chain_pages = get_order(sz);
  2066. ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
  2067. GFP_KERNEL, ioc->chain_pages);
  2068. if (ioc->chain_lookup == NULL)
  2069. ioc->chain_depth -= 100;
  2070. } while (ioc->chain_lookup == NULL);
  2071. ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
  2072. ioc->request_sz, 16, 0);
  2073. if (!ioc->chain_dma_pool) {
  2074. printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
  2075. "failed\n", ioc->name);
  2076. goto out;
  2077. }
  2078. for (i = 0; i < ioc->chain_depth; i++) {
  2079. ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
  2080. ioc->chain_dma_pool , GFP_KERNEL,
  2081. &ioc->chain_lookup[i].chain_buffer_dma);
  2082. if (!ioc->chain_lookup[i].chain_buffer) {
  2083. ioc->chain_depth = i;
  2084. goto chain_done;
  2085. }
  2086. total_sz += ioc->request_sz;
  2087. }
  2088. chain_done:
  2089. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
  2090. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2091. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  2092. ioc->request_sz))/1024));
  2093. /* initialize hi-priority queue smid's */
  2094. ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
  2095. sizeof(struct request_tracker), GFP_KERNEL);
  2096. if (!ioc->hpr_lookup) {
  2097. printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
  2098. ioc->name);
  2099. goto out;
  2100. }
  2101. ioc->hi_priority_smid = ioc->scsiio_depth + 1;
  2102. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
  2103. "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
  2104. ioc->hi_priority_depth, ioc->hi_priority_smid));
  2105. /* initialize internal queue smid's */
  2106. ioc->internal_lookup = kcalloc(ioc->internal_depth,
  2107. sizeof(struct request_tracker), GFP_KERNEL);
  2108. if (!ioc->internal_lookup) {
  2109. printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
  2110. ioc->name);
  2111. goto out;
  2112. }
  2113. ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
  2114. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
  2115. "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
  2116. ioc->internal_depth, ioc->internal_smid));
  2117. /* sense buffers, 4 byte align */
  2118. sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
  2119. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  2120. 0);
  2121. if (!ioc->sense_dma_pool) {
  2122. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  2123. ioc->name);
  2124. goto out;
  2125. }
  2126. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  2127. &ioc->sense_dma);
  2128. if (!ioc->sense) {
  2129. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  2130. ioc->name);
  2131. goto out;
  2132. }
  2133. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2134. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  2135. "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
  2136. SCSI_SENSE_BUFFERSIZE, sz/1024));
  2137. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  2138. ioc->name, (unsigned long long)ioc->sense_dma));
  2139. total_sz += sz;
  2140. /* reply pool, 4 byte align */
  2141. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  2142. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  2143. 0);
  2144. if (!ioc->reply_dma_pool) {
  2145. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  2146. ioc->name);
  2147. goto out;
  2148. }
  2149. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  2150. &ioc->reply_dma);
  2151. if (!ioc->reply) {
  2152. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  2153. ioc->name);
  2154. goto out;
  2155. }
  2156. ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
  2157. ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
  2158. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  2159. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  2160. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  2161. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  2162. ioc->name, (unsigned long long)ioc->reply_dma));
  2163. total_sz += sz;
  2164. /* reply free queue, 16 byte align */
  2165. sz = ioc->reply_free_queue_depth * 4;
  2166. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  2167. ioc->pdev, sz, 16, 0);
  2168. if (!ioc->reply_free_dma_pool) {
  2169. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  2170. "failed\n", ioc->name);
  2171. goto out;
  2172. }
  2173. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  2174. &ioc->reply_free_dma);
  2175. if (!ioc->reply_free) {
  2176. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  2177. "failed\n", ioc->name);
  2178. goto out;
  2179. }
  2180. memset(ioc->reply_free, 0, sz);
  2181. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  2182. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  2183. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  2184. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  2185. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  2186. total_sz += sz;
  2187. /* reply post queue, 16 byte align */
  2188. sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
  2189. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  2190. ioc->pdev, sz, 16, 0);
  2191. if (!ioc->reply_post_free_dma_pool) {
  2192. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  2193. "failed\n", ioc->name);
  2194. goto out;
  2195. }
  2196. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  2197. GFP_KERNEL, &ioc->reply_post_free_dma);
  2198. if (!ioc->reply_post_free) {
  2199. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  2200. "failed\n", ioc->name);
  2201. goto out;
  2202. }
  2203. memset(ioc->reply_post_free, 0, sz);
  2204. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  2205. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  2206. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  2207. sz/1024));
  2208. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  2209. "(0x%llx)\n", ioc->name, (unsigned long long)
  2210. ioc->reply_post_free_dma));
  2211. total_sz += sz;
  2212. ioc->config_page_sz = 512;
  2213. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  2214. ioc->config_page_sz, &ioc->config_page_dma);
  2215. if (!ioc->config_page) {
  2216. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  2217. "failed\n", ioc->name);
  2218. goto out;
  2219. }
  2220. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  2221. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  2222. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  2223. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  2224. total_sz += ioc->config_page_sz;
  2225. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  2226. ioc->name, total_sz/1024);
  2227. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  2228. "Max Controller Queue Depth(%d)\n",
  2229. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  2230. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  2231. ioc->name, ioc->shost->sg_tablesize);
  2232. return 0;
  2233. out:
  2234. return -ENOMEM;
  2235. }
  2236. /**
  2237. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  2238. * @ioc: Pointer to MPT_ADAPTER structure
  2239. * @cooked: Request raw or cooked IOC state
  2240. *
  2241. * Returns all IOC Doorbell register bits if cooked==0, else just the
  2242. * Doorbell bits in MPI_IOC_STATE_MASK.
  2243. */
  2244. u32
  2245. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  2246. {
  2247. u32 s, sc;
  2248. s = readl(&ioc->chip->Doorbell);
  2249. sc = s & MPI2_IOC_STATE_MASK;
  2250. return cooked ? sc : s;
  2251. }
  2252. /**
  2253. * _base_wait_on_iocstate - waiting on a particular ioc state
  2254. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  2255. * @timeout: timeout in second
  2256. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2257. *
  2258. * Returns 0 for success, non-zero for failure.
  2259. */
  2260. static int
  2261. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  2262. int sleep_flag)
  2263. {
  2264. u32 count, cntdn;
  2265. u32 current_state;
  2266. count = 0;
  2267. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2268. do {
  2269. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  2270. if (current_state == ioc_state)
  2271. return 0;
  2272. if (count && current_state == MPI2_IOC_STATE_FAULT)
  2273. break;
  2274. if (sleep_flag == CAN_SLEEP)
  2275. msleep(1);
  2276. else
  2277. udelay(500);
  2278. count++;
  2279. } while (--cntdn);
  2280. return current_state;
  2281. }
  2282. /**
  2283. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  2284. * a write to the doorbell)
  2285. * @ioc: per adapter object
  2286. * @timeout: timeout in second
  2287. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2288. *
  2289. * Returns 0 for success, non-zero for failure.
  2290. *
  2291. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  2292. */
  2293. static int
  2294. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2295. int sleep_flag)
  2296. {
  2297. u32 cntdn, count;
  2298. u32 int_status;
  2299. count = 0;
  2300. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2301. do {
  2302. int_status = readl(&ioc->chip->HostInterruptStatus);
  2303. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2304. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2305. "successful count(%d), timeout(%d)\n", ioc->name,
  2306. __func__, count, timeout));
  2307. return 0;
  2308. }
  2309. if (sleep_flag == CAN_SLEEP)
  2310. msleep(1);
  2311. else
  2312. udelay(500);
  2313. count++;
  2314. } while (--cntdn);
  2315. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2316. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2317. return -EFAULT;
  2318. }
  2319. /**
  2320. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  2321. * @ioc: per adapter object
  2322. * @timeout: timeout in second
  2323. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2324. *
  2325. * Returns 0 for success, non-zero for failure.
  2326. *
  2327. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  2328. * doorbell.
  2329. */
  2330. static int
  2331. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2332. int sleep_flag)
  2333. {
  2334. u32 cntdn, count;
  2335. u32 int_status;
  2336. u32 doorbell;
  2337. count = 0;
  2338. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2339. do {
  2340. int_status = readl(&ioc->chip->HostInterruptStatus);
  2341. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  2342. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2343. "successful count(%d), timeout(%d)\n", ioc->name,
  2344. __func__, count, timeout));
  2345. return 0;
  2346. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2347. doorbell = readl(&ioc->chip->Doorbell);
  2348. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  2349. MPI2_IOC_STATE_FAULT) {
  2350. mpt2sas_base_fault_info(ioc , doorbell);
  2351. return -EFAULT;
  2352. }
  2353. } else if (int_status == 0xFFFFFFFF)
  2354. goto out;
  2355. if (sleep_flag == CAN_SLEEP)
  2356. msleep(1);
  2357. else
  2358. udelay(500);
  2359. count++;
  2360. } while (--cntdn);
  2361. out:
  2362. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2363. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2364. return -EFAULT;
  2365. }
  2366. /**
  2367. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  2368. * @ioc: per adapter object
  2369. * @timeout: timeout in second
  2370. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2371. *
  2372. * Returns 0 for success, non-zero for failure.
  2373. *
  2374. */
  2375. static int
  2376. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2377. int sleep_flag)
  2378. {
  2379. u32 cntdn, count;
  2380. u32 doorbell_reg;
  2381. count = 0;
  2382. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2383. do {
  2384. doorbell_reg = readl(&ioc->chip->Doorbell);
  2385. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  2386. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2387. "successful count(%d), timeout(%d)\n", ioc->name,
  2388. __func__, count, timeout));
  2389. return 0;
  2390. }
  2391. if (sleep_flag == CAN_SLEEP)
  2392. msleep(1);
  2393. else
  2394. udelay(500);
  2395. count++;
  2396. } while (--cntdn);
  2397. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2398. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  2399. return -EFAULT;
  2400. }
  2401. /**
  2402. * _base_send_ioc_reset - send doorbell reset
  2403. * @ioc: per adapter object
  2404. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  2405. * @timeout: timeout in second
  2406. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2407. *
  2408. * Returns 0 for success, non-zero for failure.
  2409. */
  2410. static int
  2411. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  2412. int sleep_flag)
  2413. {
  2414. u32 ioc_state;
  2415. int r = 0;
  2416. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2417. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2418. ioc->name, __func__);
  2419. return -EFAULT;
  2420. }
  2421. if (!(ioc->facts.IOCCapabilities &
  2422. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2423. return -EFAULT;
  2424. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2425. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2426. &ioc->chip->Doorbell);
  2427. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2428. r = -EFAULT;
  2429. goto out;
  2430. }
  2431. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2432. timeout, sleep_flag);
  2433. if (ioc_state) {
  2434. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2435. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2436. r = -EFAULT;
  2437. goto out;
  2438. }
  2439. out:
  2440. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2441. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2442. return r;
  2443. }
  2444. /**
  2445. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2446. * @ioc: per adapter object
  2447. * @request_bytes: request length
  2448. * @request: pointer having request payload
  2449. * @reply_bytes: reply length
  2450. * @reply: pointer to reply payload
  2451. * @timeout: timeout in second
  2452. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2453. *
  2454. * Returns 0 for success, non-zero for failure.
  2455. */
  2456. static int
  2457. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2458. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2459. {
  2460. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2461. int i;
  2462. u8 failed;
  2463. u16 dummy;
  2464. __le32 *mfp;
  2465. /* make sure doorbell is not in use */
  2466. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2467. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2468. " (line=%d)\n", ioc->name, __LINE__);
  2469. return -EFAULT;
  2470. }
  2471. /* clear pending doorbell interrupts from previous state changes */
  2472. if (readl(&ioc->chip->HostInterruptStatus) &
  2473. MPI2_HIS_IOC2SYS_DB_STATUS)
  2474. writel(0, &ioc->chip->HostInterruptStatus);
  2475. /* send message to ioc */
  2476. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2477. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2478. &ioc->chip->Doorbell);
  2479. if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
  2480. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2481. "int failed (line=%d)\n", ioc->name, __LINE__);
  2482. return -EFAULT;
  2483. }
  2484. writel(0, &ioc->chip->HostInterruptStatus);
  2485. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2486. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2487. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2488. return -EFAULT;
  2489. }
  2490. /* send message 32-bits at a time */
  2491. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2492. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2493. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2494. failed = 1;
  2495. }
  2496. if (failed) {
  2497. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2498. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2499. return -EFAULT;
  2500. }
  2501. /* now wait for the reply */
  2502. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2503. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2504. "int failed (line=%d)\n", ioc->name, __LINE__);
  2505. return -EFAULT;
  2506. }
  2507. /* read the first two 16-bits, it gives the total length of the reply */
  2508. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2509. & MPI2_DOORBELL_DATA_MASK);
  2510. writel(0, &ioc->chip->HostInterruptStatus);
  2511. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2512. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2513. "int failed (line=%d)\n", ioc->name, __LINE__);
  2514. return -EFAULT;
  2515. }
  2516. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2517. & MPI2_DOORBELL_DATA_MASK);
  2518. writel(0, &ioc->chip->HostInterruptStatus);
  2519. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2520. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2521. printk(MPT2SAS_ERR_FMT "doorbell "
  2522. "handshake int failed (line=%d)\n", ioc->name,
  2523. __LINE__);
  2524. return -EFAULT;
  2525. }
  2526. if (i >= reply_bytes/2) /* overflow case */
  2527. dummy = readl(&ioc->chip->Doorbell);
  2528. else
  2529. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2530. & MPI2_DOORBELL_DATA_MASK);
  2531. writel(0, &ioc->chip->HostInterruptStatus);
  2532. }
  2533. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2534. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2535. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2536. " (line=%d)\n", ioc->name, __LINE__));
  2537. }
  2538. writel(0, &ioc->chip->HostInterruptStatus);
  2539. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2540. mfp = (__le32 *)reply;
  2541. printk(KERN_INFO "\toffset:data\n");
  2542. for (i = 0; i < reply_bytes/4; i++)
  2543. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2544. le32_to_cpu(mfp[i]));
  2545. }
  2546. return 0;
  2547. }
  2548. /**
  2549. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2550. * @ioc: per adapter object
  2551. * @mpi_reply: the reply payload from FW
  2552. * @mpi_request: the request payload sent to FW
  2553. *
  2554. * The SAS IO Unit Control Request message allows the host to perform low-level
  2555. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2556. * to obtain the IOC assigned device handles for a device if it has other
  2557. * identifying information about the device, in addition allows the host to
  2558. * remove IOC resources associated with the device.
  2559. *
  2560. * Returns 0 for success, non-zero for failure.
  2561. */
  2562. int
  2563. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2564. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2565. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2566. {
  2567. u16 smid;
  2568. u32 ioc_state;
  2569. unsigned long timeleft;
  2570. u8 issue_reset;
  2571. int rc;
  2572. void *request;
  2573. u16 wait_state_count;
  2574. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2575. __func__));
  2576. mutex_lock(&ioc->base_cmds.mutex);
  2577. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2578. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2579. ioc->name, __func__);
  2580. rc = -EAGAIN;
  2581. goto out;
  2582. }
  2583. wait_state_count = 0;
  2584. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2585. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2586. if (wait_state_count++ == 10) {
  2587. printk(MPT2SAS_ERR_FMT
  2588. "%s: failed due to ioc not operational\n",
  2589. ioc->name, __func__);
  2590. rc = -EFAULT;
  2591. goto out;
  2592. }
  2593. ssleep(1);
  2594. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2595. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2596. "operational state(count=%d)\n", ioc->name,
  2597. __func__, wait_state_count);
  2598. }
  2599. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2600. if (!smid) {
  2601. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2602. ioc->name, __func__);
  2603. rc = -EAGAIN;
  2604. goto out;
  2605. }
  2606. rc = 0;
  2607. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2608. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2609. ioc->base_cmds.smid = smid;
  2610. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2611. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2612. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2613. ioc->ioc_link_reset_in_progress = 1;
  2614. mpt2sas_base_put_smid_default(ioc, smid);
  2615. init_completion(&ioc->base_cmds.done);
  2616. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2617. msecs_to_jiffies(10000));
  2618. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2619. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2620. ioc->ioc_link_reset_in_progress)
  2621. ioc->ioc_link_reset_in_progress = 0;
  2622. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2623. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2624. ioc->name, __func__);
  2625. _debug_dump_mf(mpi_request,
  2626. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2627. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2628. issue_reset = 1;
  2629. goto issue_host_reset;
  2630. }
  2631. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2632. memcpy(mpi_reply, ioc->base_cmds.reply,
  2633. sizeof(Mpi2SasIoUnitControlReply_t));
  2634. else
  2635. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2636. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2637. goto out;
  2638. issue_host_reset:
  2639. if (issue_reset)
  2640. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2641. FORCE_BIG_HAMMER);
  2642. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2643. rc = -EFAULT;
  2644. out:
  2645. mutex_unlock(&ioc->base_cmds.mutex);
  2646. return rc;
  2647. }
  2648. /**
  2649. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2650. * @ioc: per adapter object
  2651. * @mpi_reply: the reply payload from FW
  2652. * @mpi_request: the request payload sent to FW
  2653. *
  2654. * The SCSI Enclosure Processor request message causes the IOC to
  2655. * communicate with SES devices to control LED status signals.
  2656. *
  2657. * Returns 0 for success, non-zero for failure.
  2658. */
  2659. int
  2660. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2661. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2662. {
  2663. u16 smid;
  2664. u32 ioc_state;
  2665. unsigned long timeleft;
  2666. u8 issue_reset;
  2667. int rc;
  2668. void *request;
  2669. u16 wait_state_count;
  2670. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2671. __func__));
  2672. mutex_lock(&ioc->base_cmds.mutex);
  2673. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2674. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2675. ioc->name, __func__);
  2676. rc = -EAGAIN;
  2677. goto out;
  2678. }
  2679. wait_state_count = 0;
  2680. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2681. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2682. if (wait_state_count++ == 10) {
  2683. printk(MPT2SAS_ERR_FMT
  2684. "%s: failed due to ioc not operational\n",
  2685. ioc->name, __func__);
  2686. rc = -EFAULT;
  2687. goto out;
  2688. }
  2689. ssleep(1);
  2690. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2691. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2692. "operational state(count=%d)\n", ioc->name,
  2693. __func__, wait_state_count);
  2694. }
  2695. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2696. if (!smid) {
  2697. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2698. ioc->name, __func__);
  2699. rc = -EAGAIN;
  2700. goto out;
  2701. }
  2702. rc = 0;
  2703. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2704. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2705. ioc->base_cmds.smid = smid;
  2706. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2707. mpt2sas_base_put_smid_default(ioc, smid);
  2708. init_completion(&ioc->base_cmds.done);
  2709. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2710. msecs_to_jiffies(10000));
  2711. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2712. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2713. ioc->name, __func__);
  2714. _debug_dump_mf(mpi_request,
  2715. sizeof(Mpi2SepRequest_t)/4);
  2716. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2717. issue_reset = 1;
  2718. goto issue_host_reset;
  2719. }
  2720. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2721. memcpy(mpi_reply, ioc->base_cmds.reply,
  2722. sizeof(Mpi2SepReply_t));
  2723. else
  2724. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2725. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2726. goto out;
  2727. issue_host_reset:
  2728. if (issue_reset)
  2729. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2730. FORCE_BIG_HAMMER);
  2731. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2732. rc = -EFAULT;
  2733. out:
  2734. mutex_unlock(&ioc->base_cmds.mutex);
  2735. return rc;
  2736. }
  2737. /**
  2738. * _base_get_port_facts - obtain port facts reply and save in ioc
  2739. * @ioc: per adapter object
  2740. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2741. *
  2742. * Returns 0 for success, non-zero for failure.
  2743. */
  2744. static int
  2745. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  2746. {
  2747. Mpi2PortFactsRequest_t mpi_request;
  2748. Mpi2PortFactsReply_t mpi_reply;
  2749. struct mpt2sas_port_facts *pfacts;
  2750. int mpi_reply_sz, mpi_request_sz, r;
  2751. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2752. __func__));
  2753. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  2754. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  2755. memset(&mpi_request, 0, mpi_request_sz);
  2756. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  2757. mpi_request.PortNumber = port;
  2758. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2759. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2760. if (r != 0) {
  2761. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2762. ioc->name, __func__, r);
  2763. return r;
  2764. }
  2765. pfacts = &ioc->pfacts[port];
  2766. memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
  2767. pfacts->PortNumber = mpi_reply.PortNumber;
  2768. pfacts->VP_ID = mpi_reply.VP_ID;
  2769. pfacts->VF_ID = mpi_reply.VF_ID;
  2770. pfacts->MaxPostedCmdBuffers =
  2771. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  2772. return 0;
  2773. }
  2774. /**
  2775. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  2776. * @ioc: per adapter object
  2777. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2778. *
  2779. * Returns 0 for success, non-zero for failure.
  2780. */
  2781. static int
  2782. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2783. {
  2784. Mpi2IOCFactsRequest_t mpi_request;
  2785. Mpi2IOCFactsReply_t mpi_reply;
  2786. struct mpt2sas_facts *facts;
  2787. int mpi_reply_sz, mpi_request_sz, r;
  2788. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2789. __func__));
  2790. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  2791. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  2792. memset(&mpi_request, 0, mpi_request_sz);
  2793. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  2794. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2795. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2796. if (r != 0) {
  2797. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2798. ioc->name, __func__, r);
  2799. return r;
  2800. }
  2801. facts = &ioc->facts;
  2802. memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
  2803. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  2804. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  2805. facts->VP_ID = mpi_reply.VP_ID;
  2806. facts->VF_ID = mpi_reply.VF_ID;
  2807. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  2808. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  2809. facts->WhoInit = mpi_reply.WhoInit;
  2810. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  2811. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  2812. facts->MaxReplyDescriptorPostQueueDepth =
  2813. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  2814. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  2815. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  2816. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  2817. ioc->ir_firmware = 1;
  2818. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  2819. facts->IOCRequestFrameSize =
  2820. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  2821. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  2822. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  2823. ioc->shost->max_id = -1;
  2824. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  2825. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  2826. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  2827. facts->HighPriorityCredit =
  2828. le16_to_cpu(mpi_reply.HighPriorityCredit);
  2829. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  2830. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  2831. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  2832. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  2833. facts->MaxChainDepth));
  2834. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  2835. "reply frame size(%d)\n", ioc->name,
  2836. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  2837. return 0;
  2838. }
  2839. /**
  2840. * _base_send_ioc_init - send ioc_init to firmware
  2841. * @ioc: per adapter object
  2842. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2843. *
  2844. * Returns 0 for success, non-zero for failure.
  2845. */
  2846. static int
  2847. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2848. {
  2849. Mpi2IOCInitRequest_t mpi_request;
  2850. Mpi2IOCInitReply_t mpi_reply;
  2851. int r;
  2852. struct timeval current_time;
  2853. u16 ioc_status;
  2854. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2855. __func__));
  2856. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  2857. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  2858. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  2859. mpi_request.VF_ID = 0; /* TODO */
  2860. mpi_request.VP_ID = 0;
  2861. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  2862. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  2863. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  2864. mpi_request.ReplyDescriptorPostQueueDepth =
  2865. cpu_to_le16(ioc->reply_post_queue_depth);
  2866. mpi_request.ReplyFreeQueueDepth =
  2867. cpu_to_le16(ioc->reply_free_queue_depth);
  2868. mpi_request.SenseBufferAddressHigh =
  2869. cpu_to_le32((u64)ioc->sense_dma >> 32);
  2870. mpi_request.SystemReplyAddressHigh =
  2871. cpu_to_le32((u64)ioc->reply_dma >> 32);
  2872. mpi_request.SystemRequestFrameBaseAddress =
  2873. cpu_to_le64((u64)ioc->request_dma);
  2874. mpi_request.ReplyFreeQueueAddress =
  2875. cpu_to_le64((u64)ioc->reply_free_dma);
  2876. mpi_request.ReplyDescriptorPostQueueAddress =
  2877. cpu_to_le64((u64)ioc->reply_post_free_dma);
  2878. /* This time stamp specifies number of milliseconds
  2879. * since epoch ~ midnight January 1, 1970.
  2880. */
  2881. do_gettimeofday(&current_time);
  2882. mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
  2883. (current_time.tv_usec / 1000));
  2884. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2885. __le32 *mfp;
  2886. int i;
  2887. mfp = (__le32 *)&mpi_request;
  2888. printk(KERN_INFO "\toffset:data\n");
  2889. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  2890. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2891. le32_to_cpu(mfp[i]));
  2892. }
  2893. r = _base_handshake_req_reply_wait(ioc,
  2894. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  2895. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  2896. sleep_flag);
  2897. if (r != 0) {
  2898. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2899. ioc->name, __func__, r);
  2900. return r;
  2901. }
  2902. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
  2903. if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
  2904. mpi_reply.IOCLogInfo) {
  2905. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  2906. r = -EIO;
  2907. }
  2908. return 0;
  2909. }
  2910. /**
  2911. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  2912. * @ioc: per adapter object
  2913. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2914. *
  2915. * Returns 0 for success, non-zero for failure.
  2916. */
  2917. static int
  2918. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2919. {
  2920. Mpi2PortEnableRequest_t *mpi_request;
  2921. u32 ioc_state;
  2922. unsigned long timeleft;
  2923. int r = 0;
  2924. u16 smid;
  2925. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  2926. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2927. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2928. ioc->name, __func__);
  2929. return -EAGAIN;
  2930. }
  2931. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2932. if (!smid) {
  2933. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2934. ioc->name, __func__);
  2935. return -EAGAIN;
  2936. }
  2937. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2938. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2939. ioc->base_cmds.smid = smid;
  2940. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  2941. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  2942. mpi_request->VF_ID = 0; /* TODO */
  2943. mpi_request->VP_ID = 0;
  2944. mpt2sas_base_put_smid_default(ioc, smid);
  2945. init_completion(&ioc->base_cmds.done);
  2946. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2947. 300*HZ);
  2948. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2949. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2950. ioc->name, __func__);
  2951. _debug_dump_mf(mpi_request,
  2952. sizeof(Mpi2PortEnableRequest_t)/4);
  2953. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2954. r = -EFAULT;
  2955. else
  2956. r = -ETIME;
  2957. goto out;
  2958. } else
  2959. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  2960. ioc->name, __func__));
  2961. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
  2962. 60, sleep_flag);
  2963. if (ioc_state) {
  2964. printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
  2965. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2966. r = -EFAULT;
  2967. }
  2968. out:
  2969. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2970. printk(MPT2SAS_INFO_FMT "port enable: %s\n",
  2971. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2972. return r;
  2973. }
  2974. /**
  2975. * _base_unmask_events - turn on notification for this event
  2976. * @ioc: per adapter object
  2977. * @event: firmware event
  2978. *
  2979. * The mask is stored in ioc->event_masks.
  2980. */
  2981. static void
  2982. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  2983. {
  2984. u32 desired_event;
  2985. if (event >= 128)
  2986. return;
  2987. desired_event = (1 << (event % 32));
  2988. if (event < 32)
  2989. ioc->event_masks[0] &= ~desired_event;
  2990. else if (event < 64)
  2991. ioc->event_masks[1] &= ~desired_event;
  2992. else if (event < 96)
  2993. ioc->event_masks[2] &= ~desired_event;
  2994. else if (event < 128)
  2995. ioc->event_masks[3] &= ~desired_event;
  2996. }
  2997. /**
  2998. * _base_event_notification - send event notification
  2999. * @ioc: per adapter object
  3000. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3001. *
  3002. * Returns 0 for success, non-zero for failure.
  3003. */
  3004. static int
  3005. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3006. {
  3007. Mpi2EventNotificationRequest_t *mpi_request;
  3008. unsigned long timeleft;
  3009. u16 smid;
  3010. int r = 0;
  3011. int i;
  3012. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3013. __func__));
  3014. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3015. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3016. ioc->name, __func__);
  3017. return -EAGAIN;
  3018. }
  3019. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  3020. if (!smid) {
  3021. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3022. ioc->name, __func__);
  3023. return -EAGAIN;
  3024. }
  3025. ioc->base_cmds.status = MPT2_CMD_PENDING;
  3026. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3027. ioc->base_cmds.smid = smid;
  3028. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  3029. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  3030. mpi_request->VF_ID = 0; /* TODO */
  3031. mpi_request->VP_ID = 0;
  3032. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3033. mpi_request->EventMasks[i] =
  3034. cpu_to_le32(ioc->event_masks[i]);
  3035. mpt2sas_base_put_smid_default(ioc, smid);
  3036. init_completion(&ioc->base_cmds.done);
  3037. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  3038. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  3039. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3040. ioc->name, __func__);
  3041. _debug_dump_mf(mpi_request,
  3042. sizeof(Mpi2EventNotificationRequest_t)/4);
  3043. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  3044. r = -EFAULT;
  3045. else
  3046. r = -ETIME;
  3047. } else
  3048. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  3049. ioc->name, __func__));
  3050. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3051. return r;
  3052. }
  3053. /**
  3054. * mpt2sas_base_validate_event_type - validating event types
  3055. * @ioc: per adapter object
  3056. * @event: firmware event
  3057. *
  3058. * This will turn on firmware event notification when application
  3059. * ask for that event. We don't mask events that are already enabled.
  3060. */
  3061. void
  3062. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  3063. {
  3064. int i, j;
  3065. u32 event_mask, desired_event;
  3066. u8 send_update_to_fw;
  3067. for (i = 0, send_update_to_fw = 0; i <
  3068. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  3069. event_mask = ~event_type[i];
  3070. desired_event = 1;
  3071. for (j = 0; j < 32; j++) {
  3072. if (!(event_mask & desired_event) &&
  3073. (ioc->event_masks[i] & desired_event)) {
  3074. ioc->event_masks[i] &= ~desired_event;
  3075. send_update_to_fw = 1;
  3076. }
  3077. desired_event = (desired_event << 1);
  3078. }
  3079. }
  3080. if (!send_update_to_fw)
  3081. return;
  3082. mutex_lock(&ioc->base_cmds.mutex);
  3083. _base_event_notification(ioc, CAN_SLEEP);
  3084. mutex_unlock(&ioc->base_cmds.mutex);
  3085. }
  3086. /**
  3087. * _base_diag_reset - the "big hammer" start of day reset
  3088. * @ioc: per adapter object
  3089. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3090. *
  3091. * Returns 0 for success, non-zero for failure.
  3092. */
  3093. static int
  3094. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3095. {
  3096. u32 host_diagnostic;
  3097. u32 ioc_state;
  3098. u32 count;
  3099. u32 hcb_size;
  3100. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  3101. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
  3102. ioc->name));
  3103. count = 0;
  3104. do {
  3105. /* Write magic sequence to WriteSequence register
  3106. * Loop until in diagnostic mode
  3107. */
  3108. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
  3109. "sequence\n", ioc->name));
  3110. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3111. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  3112. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  3113. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  3114. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3115. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3116. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3117. /* wait 100 msec */
  3118. if (sleep_flag == CAN_SLEEP)
  3119. msleep(100);
  3120. else
  3121. mdelay(100);
  3122. if (count++ > 20)
  3123. goto out;
  3124. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3125. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
  3126. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  3127. ioc->name, count, host_diagnostic));
  3128. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  3129. hcb_size = readl(&ioc->chip->HCBSize);
  3130. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
  3131. ioc->name));
  3132. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  3133. &ioc->chip->HostDiagnostic);
  3134. /* don't access any registers for 50 milliseconds */
  3135. msleep(50);
  3136. /* 300 second max wait */
  3137. for (count = 0; count < 3000000 ; count++) {
  3138. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3139. if (host_diagnostic == 0xFFFFFFFF)
  3140. goto out;
  3141. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  3142. break;
  3143. /* wait 100 msec */
  3144. if (sleep_flag == CAN_SLEEP)
  3145. msleep(1);
  3146. else
  3147. mdelay(1);
  3148. }
  3149. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  3150. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
  3151. "assuming the HCB Address points to good F/W\n",
  3152. ioc->name));
  3153. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  3154. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  3155. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  3156. drsprintk(ioc, printk(MPT2SAS_INFO_FMT
  3157. "re-enable the HCDW\n", ioc->name));
  3158. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  3159. &ioc->chip->HCBSize);
  3160. }
  3161. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
  3162. ioc->name));
  3163. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  3164. &ioc->chip->HostDiagnostic);
  3165. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
  3166. "diagnostic register\n", ioc->name));
  3167. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3168. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
  3169. "READY state\n", ioc->name));
  3170. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  3171. sleep_flag);
  3172. if (ioc_state) {
  3173. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  3174. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  3175. goto out;
  3176. }
  3177. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  3178. return 0;
  3179. out:
  3180. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  3181. return -EFAULT;
  3182. }
  3183. /**
  3184. * _base_make_ioc_ready - put controller in READY state
  3185. * @ioc: per adapter object
  3186. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3187. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3188. *
  3189. * Returns 0 for success, non-zero for failure.
  3190. */
  3191. static int
  3192. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3193. enum reset_type type)
  3194. {
  3195. u32 ioc_state;
  3196. int rc;
  3197. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3198. __func__));
  3199. if (ioc->pci_error_recovery)
  3200. return 0;
  3201. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3202. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
  3203. ioc->name, __func__, ioc_state));
  3204. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  3205. return 0;
  3206. if (ioc_state & MPI2_DOORBELL_USED) {
  3207. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
  3208. "active!\n", ioc->name));
  3209. goto issue_diag_reset;
  3210. }
  3211. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  3212. mpt2sas_base_fault_info(ioc, ioc_state &
  3213. MPI2_DOORBELL_DATA_MASK);
  3214. goto issue_diag_reset;
  3215. }
  3216. if (type == FORCE_BIG_HAMMER)
  3217. goto issue_diag_reset;
  3218. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  3219. if (!(_base_send_ioc_reset(ioc,
  3220. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
  3221. ioc->ioc_reset_count++;
  3222. return 0;
  3223. }
  3224. issue_diag_reset:
  3225. rc = _base_diag_reset(ioc, CAN_SLEEP);
  3226. ioc->ioc_reset_count++;
  3227. return rc;
  3228. }
  3229. /**
  3230. * _base_make_ioc_operational - put controller in OPERATIONAL state
  3231. * @ioc: per adapter object
  3232. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3233. *
  3234. * Returns 0 for success, non-zero for failure.
  3235. */
  3236. static int
  3237. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3238. {
  3239. int r, i;
  3240. unsigned long flags;
  3241. u32 reply_address;
  3242. u16 smid;
  3243. struct _tr_list *delayed_tr, *delayed_tr_next;
  3244. u8 hide_flag;
  3245. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3246. __func__));
  3247. /* clean the delayed target reset list */
  3248. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3249. &ioc->delayed_tr_list, list) {
  3250. list_del(&delayed_tr->list);
  3251. kfree(delayed_tr);
  3252. }
  3253. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3254. &ioc->delayed_tr_volume_list, list) {
  3255. list_del(&delayed_tr->list);
  3256. kfree(delayed_tr);
  3257. }
  3258. /* initialize the scsi lookup free list */
  3259. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3260. INIT_LIST_HEAD(&ioc->free_list);
  3261. smid = 1;
  3262. for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
  3263. INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
  3264. ioc->scsi_lookup[i].cb_idx = 0xFF;
  3265. ioc->scsi_lookup[i].smid = smid;
  3266. ioc->scsi_lookup[i].scmd = NULL;
  3267. ioc->scsi_lookup[i].direct_io = 0;
  3268. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  3269. &ioc->free_list);
  3270. }
  3271. /* hi-priority queue */
  3272. INIT_LIST_HEAD(&ioc->hpr_free_list);
  3273. smid = ioc->hi_priority_smid;
  3274. for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
  3275. ioc->hpr_lookup[i].cb_idx = 0xFF;
  3276. ioc->hpr_lookup[i].smid = smid;
  3277. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  3278. &ioc->hpr_free_list);
  3279. }
  3280. /* internal queue */
  3281. INIT_LIST_HEAD(&ioc->internal_free_list);
  3282. smid = ioc->internal_smid;
  3283. for (i = 0; i < ioc->internal_depth; i++, smid++) {
  3284. ioc->internal_lookup[i].cb_idx = 0xFF;
  3285. ioc->internal_lookup[i].smid = smid;
  3286. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  3287. &ioc->internal_free_list);
  3288. }
  3289. /* chain pool */
  3290. INIT_LIST_HEAD(&ioc->free_chain_list);
  3291. for (i = 0; i < ioc->chain_depth; i++)
  3292. list_add_tail(&ioc->chain_lookup[i].tracker_list,
  3293. &ioc->free_chain_list);
  3294. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3295. /* initialize Reply Free Queue */
  3296. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  3297. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  3298. ioc->reply_sz)
  3299. ioc->reply_free[i] = cpu_to_le32(reply_address);
  3300. /* initialize Reply Post Free Queue */
  3301. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  3302. ioc->reply_post_free[i].Words = cpu_to_le64(ULLONG_MAX);
  3303. r = _base_send_ioc_init(ioc, sleep_flag);
  3304. if (r)
  3305. return r;
  3306. /* initialize the index's */
  3307. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  3308. ioc->reply_post_host_index = 0;
  3309. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  3310. writel(0, &ioc->chip->ReplyPostHostIndex);
  3311. _base_unmask_interrupts(ioc);
  3312. r = _base_event_notification(ioc, sleep_flag);
  3313. if (r)
  3314. return r;
  3315. if (sleep_flag == CAN_SLEEP)
  3316. _base_static_config_pages(ioc);
  3317. if (ioc->wait_for_port_enable_to_complete && ioc->is_warpdrive) {
  3318. if (ioc->manu_pg10.OEMIdentifier == 0x80) {
  3319. hide_flag = (u8) (ioc->manu_pg10.OEMSpecificFlags0 &
  3320. MFG_PAGE10_HIDE_SSDS_MASK);
  3321. if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
  3322. ioc->mfg_pg10_hide_flag = hide_flag;
  3323. }
  3324. }
  3325. if (ioc->wait_for_port_enable_to_complete) {
  3326. if (diag_buffer_enable != 0)
  3327. mpt2sas_enable_diag_buffer(ioc, diag_buffer_enable);
  3328. if (disable_discovery > 0)
  3329. return r;
  3330. }
  3331. r = _base_send_port_enable(ioc, sleep_flag);
  3332. if (r)
  3333. return r;
  3334. return r;
  3335. }
  3336. /**
  3337. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  3338. * @ioc: per adapter object
  3339. *
  3340. * Return nothing.
  3341. */
  3342. void
  3343. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  3344. {
  3345. struct pci_dev *pdev = ioc->pdev;
  3346. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3347. __func__));
  3348. _base_mask_interrupts(ioc);
  3349. ioc->shost_recovery = 1;
  3350. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3351. ioc->shost_recovery = 0;
  3352. if (ioc->pci_irq) {
  3353. synchronize_irq(pdev->irq);
  3354. free_irq(ioc->pci_irq, ioc);
  3355. }
  3356. _base_disable_msix(ioc);
  3357. if (ioc->chip_phys)
  3358. iounmap(ioc->chip);
  3359. ioc->pci_irq = -1;
  3360. ioc->chip_phys = 0;
  3361. pci_release_selected_regions(ioc->pdev, ioc->bars);
  3362. pci_disable_pcie_error_reporting(pdev);
  3363. pci_disable_device(pdev);
  3364. return;
  3365. }
  3366. /**
  3367. * mpt2sas_base_attach - attach controller instance
  3368. * @ioc: per adapter object
  3369. *
  3370. * Returns 0 for success, non-zero for failure.
  3371. */
  3372. int
  3373. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  3374. {
  3375. int r, i;
  3376. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3377. __func__));
  3378. r = mpt2sas_base_map_resources(ioc);
  3379. if (r)
  3380. return r;
  3381. pci_set_drvdata(ioc->pdev, ioc->shost);
  3382. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  3383. if (r)
  3384. goto out_free_resources;
  3385. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3386. if (r)
  3387. goto out_free_resources;
  3388. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  3389. sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
  3390. if (!ioc->pfacts) {
  3391. r = -ENOMEM;
  3392. goto out_free_resources;
  3393. }
  3394. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  3395. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  3396. if (r)
  3397. goto out_free_resources;
  3398. }
  3399. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  3400. if (r)
  3401. goto out_free_resources;
  3402. init_waitqueue_head(&ioc->reset_wq);
  3403. /* allocate memory pd handle bitmask list */
  3404. ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
  3405. if (ioc->facts.MaxDevHandle % 8)
  3406. ioc->pd_handles_sz++;
  3407. ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
  3408. GFP_KERNEL);
  3409. if (!ioc->pd_handles) {
  3410. r = -ENOMEM;
  3411. goto out_free_resources;
  3412. }
  3413. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  3414. /* base internal command bits */
  3415. mutex_init(&ioc->base_cmds.mutex);
  3416. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3417. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3418. /* transport internal command bits */
  3419. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3420. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  3421. mutex_init(&ioc->transport_cmds.mutex);
  3422. /* scsih internal command bits */
  3423. ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3424. ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
  3425. mutex_init(&ioc->scsih_cmds.mutex);
  3426. /* task management internal command bits */
  3427. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3428. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  3429. mutex_init(&ioc->tm_cmds.mutex);
  3430. /* config page internal command bits */
  3431. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3432. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  3433. mutex_init(&ioc->config_cmds.mutex);
  3434. /* ctl module internal command bits */
  3435. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3436. ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
  3437. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  3438. mutex_init(&ioc->ctl_cmds.mutex);
  3439. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3440. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3441. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
  3442. !ioc->ctl_cmds.sense) {
  3443. r = -ENOMEM;
  3444. goto out_free_resources;
  3445. }
  3446. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3447. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3448. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
  3449. r = -ENOMEM;
  3450. goto out_free_resources;
  3451. }
  3452. init_completion(&ioc->shost_recovery_done);
  3453. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3454. ioc->event_masks[i] = -1;
  3455. /* here we enable the events we care about */
  3456. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  3457. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  3458. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  3459. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  3460. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  3461. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  3462. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  3463. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  3464. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  3465. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  3466. r = _base_make_ioc_operational(ioc, CAN_SLEEP);
  3467. if (r)
  3468. goto out_free_resources;
  3469. if (missing_delay[0] != -1 && missing_delay[1] != -1)
  3470. _base_update_missing_delay(ioc, missing_delay[0],
  3471. missing_delay[1]);
  3472. mpt2sas_base_start_watchdog(ioc);
  3473. return 0;
  3474. out_free_resources:
  3475. ioc->remove_host = 1;
  3476. mpt2sas_base_free_resources(ioc);
  3477. _base_release_memory_pools(ioc);
  3478. pci_set_drvdata(ioc->pdev, NULL);
  3479. kfree(ioc->pd_handles);
  3480. kfree(ioc->tm_cmds.reply);
  3481. kfree(ioc->transport_cmds.reply);
  3482. kfree(ioc->scsih_cmds.reply);
  3483. kfree(ioc->config_cmds.reply);
  3484. kfree(ioc->base_cmds.reply);
  3485. kfree(ioc->ctl_cmds.reply);
  3486. kfree(ioc->ctl_cmds.sense);
  3487. kfree(ioc->pfacts);
  3488. ioc->ctl_cmds.reply = NULL;
  3489. ioc->base_cmds.reply = NULL;
  3490. ioc->tm_cmds.reply = NULL;
  3491. ioc->scsih_cmds.reply = NULL;
  3492. ioc->transport_cmds.reply = NULL;
  3493. ioc->config_cmds.reply = NULL;
  3494. ioc->pfacts = NULL;
  3495. return r;
  3496. }
  3497. /**
  3498. * mpt2sas_base_detach - remove controller instance
  3499. * @ioc: per adapter object
  3500. *
  3501. * Return nothing.
  3502. */
  3503. void
  3504. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  3505. {
  3506. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3507. __func__));
  3508. mpt2sas_base_stop_watchdog(ioc);
  3509. mpt2sas_base_free_resources(ioc);
  3510. _base_release_memory_pools(ioc);
  3511. pci_set_drvdata(ioc->pdev, NULL);
  3512. kfree(ioc->pd_handles);
  3513. kfree(ioc->pfacts);
  3514. kfree(ioc->ctl_cmds.reply);
  3515. kfree(ioc->ctl_cmds.sense);
  3516. kfree(ioc->base_cmds.reply);
  3517. kfree(ioc->tm_cmds.reply);
  3518. kfree(ioc->transport_cmds.reply);
  3519. kfree(ioc->scsih_cmds.reply);
  3520. kfree(ioc->config_cmds.reply);
  3521. }
  3522. /**
  3523. * _base_reset_handler - reset callback handler (for base)
  3524. * @ioc: per adapter object
  3525. * @reset_phase: phase
  3526. *
  3527. * The handler for doing any required cleanup or initialization.
  3528. *
  3529. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3530. * MPT2_IOC_DONE_RESET
  3531. *
  3532. * Return nothing.
  3533. */
  3534. static void
  3535. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  3536. {
  3537. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3538. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3539. switch (reset_phase) {
  3540. case MPT2_IOC_PRE_RESET:
  3541. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3542. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  3543. break;
  3544. case MPT2_IOC_AFTER_RESET:
  3545. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3546. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  3547. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  3548. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  3549. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  3550. complete(&ioc->transport_cmds.done);
  3551. }
  3552. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3553. ioc->base_cmds.status |= MPT2_CMD_RESET;
  3554. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  3555. complete(&ioc->base_cmds.done);
  3556. }
  3557. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  3558. ioc->config_cmds.status |= MPT2_CMD_RESET;
  3559. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  3560. ioc->config_cmds.smid = USHRT_MAX;
  3561. complete(&ioc->config_cmds.done);
  3562. }
  3563. break;
  3564. case MPT2_IOC_DONE_RESET:
  3565. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3566. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  3567. break;
  3568. }
  3569. }
  3570. /**
  3571. * _wait_for_commands_to_complete - reset controller
  3572. * @ioc: Pointer to MPT_ADAPTER structure
  3573. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3574. *
  3575. * This function waiting(3s) for all pending commands to complete
  3576. * prior to putting controller in reset.
  3577. */
  3578. static void
  3579. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3580. {
  3581. u32 ioc_state;
  3582. unsigned long flags;
  3583. u16 i;
  3584. ioc->pending_io_count = 0;
  3585. if (sleep_flag != CAN_SLEEP)
  3586. return;
  3587. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3588. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  3589. return;
  3590. /* pending command count */
  3591. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3592. for (i = 0; i < ioc->scsiio_depth; i++)
  3593. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  3594. ioc->pending_io_count++;
  3595. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3596. if (!ioc->pending_io_count)
  3597. return;
  3598. /* wait for pending commands to complete */
  3599. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
  3600. }
  3601. /**
  3602. * mpt2sas_base_hard_reset_handler - reset controller
  3603. * @ioc: Pointer to MPT_ADAPTER structure
  3604. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3605. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3606. *
  3607. * Returns 0 for success, non-zero for failure.
  3608. */
  3609. int
  3610. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3611. enum reset_type type)
  3612. {
  3613. int r;
  3614. unsigned long flags;
  3615. u8 pe_complete = ioc->wait_for_port_enable_to_complete;
  3616. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
  3617. __func__));
  3618. if (ioc->pci_error_recovery) {
  3619. printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
  3620. ioc->name, __func__);
  3621. r = 0;
  3622. goto out;
  3623. }
  3624. if (mpt2sas_fwfault_debug)
  3625. mpt2sas_halt_firmware(ioc);
  3626. /* TODO - What we really should be doing is pulling
  3627. * out all the code associated with NO_SLEEP; its never used.
  3628. * That is legacy code from mpt fusion driver, ported over.
  3629. * I will leave this BUG_ON here for now till its been resolved.
  3630. */
  3631. BUG_ON(sleep_flag == NO_SLEEP);
  3632. /* wait for an active reset in progress to complete */
  3633. if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
  3634. do {
  3635. ssleep(1);
  3636. } while (ioc->shost_recovery == 1);
  3637. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  3638. __func__));
  3639. return ioc->ioc_reset_in_progress_status;
  3640. }
  3641. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3642. ioc->shost_recovery = 1;
  3643. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3644. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  3645. _wait_for_commands_to_complete(ioc, sleep_flag);
  3646. _base_mask_interrupts(ioc);
  3647. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  3648. if (r)
  3649. goto out;
  3650. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  3651. /* If this hard reset is called while port enable is active, then
  3652. * there is no reason to call make_ioc_operational
  3653. */
  3654. if (pe_complete) {
  3655. r = -EFAULT;
  3656. goto out;
  3657. }
  3658. r = _base_make_ioc_operational(ioc, sleep_flag);
  3659. if (!r)
  3660. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  3661. out:
  3662. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
  3663. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  3664. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3665. ioc->ioc_reset_in_progress_status = r;
  3666. ioc->shost_recovery = 0;
  3667. complete(&ioc->shost_recovery_done);
  3668. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3669. mutex_unlock(&ioc->reset_in_progress_mutex);
  3670. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  3671. __func__));
  3672. return r;
  3673. }