PageRenderTime 41ms CodeModel.GetById 18ms app.highlight 8ms RepoModel.GetById 2ms app.codeStats 0ms

/packages/tools/u-boot/patches/u-boot-2011.03-rc1-0013-omap4-separate-mux-settings-into-essential-and-non-e.patch

http://github.com/OpenELEC/OpenELEC.tv
Patch | 1294 lines | 1274 code | 20 blank | 0 comment | 0 complexity | a4428fcc8ce4371f4cc8e1418ae10f75 MD5 | raw file

Large files files are truncated, but you can click here to view the full file

   1From c46103152b4875805e05752b3684038798ffaf32 Mon Sep 17 00:00:00 2001
   2From: Aneesh V <aneesh@ti.com>
   3Date: Thu, 17 Feb 2011 01:48:11 +0530
   4Subject: [PATCH 13/22] omap4: separate mux settings into essential and non essential parts
   5
   6Do the essential part from SPL and non-essential part from U-Boot
   7- Essential part is what is essential for u-boot to function
   8- Essential part is also largely board independent(at least
   9  as of now)
  10- So essential part is moved out to SoC directory instead of
  11  keeping in board directory. This helps in having single SPL
  12  that works for Panda and SDP.
  13- Non-essential part is what is set by u-boot for kernel to
  14  function correctly
  15- Ideally non-essential part should be phased out eventually
  16
  17Signed-off-by: Aneesh V <aneesh@ti.com>
  18---
  19 arch/arm/cpu/armv7/omap4/board.c            |   53 +++++-
  20 arch/arm/cpu/armv7/omap4/omap4_mux_data.h   |   76 ++++++++
  21 arch/arm/include/asm/arch-omap4/sys_proto.h |    4 +-
  22 board/ti/panda/panda.c                      |   25 +--
  23 board/ti/panda/panda.h                      |  264 ---------------------------
  24 board/ti/panda/panda_mux_data.h             |  229 +++++++++++++++++++++++
  25 board/ti/sdp4430/sdp.c                      |   25 +--
  26 board/ti/sdp4430/sdp.h                      |  264 ---------------------------
  27 board/ti/sdp4430/sdp4430_mux_data.h         |  227 +++++++++++++++++++++++
  28 9 files changed, 597 insertions(+), 570 deletions(-)
  29 create mode 100644 arch/arm/cpu/armv7/omap4/omap4_mux_data.h
  30 delete mode 100644 board/ti/panda/panda.h
  31 create mode 100644 board/ti/panda/panda_mux_data.h
  32 delete mode 100644 board/ti/sdp4430/sdp.h
  33 create mode 100644 board/ti/sdp4430/sdp4430_mux_data.h
  34
  35diff --git a/arch/arm/cpu/armv7/omap4/board.c b/arch/arm/cpu/armv7/omap4/board.c
  36index da79669..95b6a96 100644
  37--- a/arch/arm/cpu/armv7/omap4/board.c
  38+++ b/arch/arm/cpu/armv7/omap4/board.c
  39@@ -32,9 +32,30 @@
  40 #include <asm/arch/cpu.h>
  41 #include <asm/arch/sys_proto.h>
  42 #include <asm/sizes.h>
  43+#include "omap4_mux_data.h"
  44 
  45 DECLARE_GLOBAL_DATA_PTR;
  46 
  47+void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
  48+{
  49+	int i;
  50+	struct pad_conf_entry *pad = (struct pad_conf_entry *) array;
  51+
  52+	for (i = 0; i < size; i++, pad++)
  53+		writew(pad->val, base + pad->offset);
  54+}
  55+
  56+static void set_muxconf_regs_essential(void)
  57+{
  58+	do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_essential,
  59+		   sizeof(core_padconf_array_essential) /
  60+		   sizeof(struct pad_conf_entry));
  61+
  62+	do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_essential,
  63+		   sizeof(wkup_padconf_array_essential) /
  64+		   sizeof(struct pad_conf_entry));
  65+}
  66+
  67 #ifdef CONFIG_PRELOADER
  68 u32 omap4_boot_device = BOOT_DEVICE_MMC1;
  69 u32 omap4_boot_mode = MMCSD_MODE_FAT;
  70@@ -49,14 +70,41 @@ u32 omap_boot_mode(void)
  71 }
  72 #endif
  73 
  74+static void set_mux_conf_regs(void)
  75+{
  76+	switch (omap4_hw_init_context()) {
  77+	case OMAP_INIT_CONTEXT_SPL:
  78+		set_muxconf_regs_essential();
  79+		break;
  80+	case OMAP_INIT_CONTEXT_UBOOT_LOADED_BY_SPL:
  81+		set_muxconf_regs_non_essential();
  82+		break;
  83+	case OMAP_INIT_CONTEXT_XIP_UBOOT:
  84+	case OMAP_INIT_CONTEXT_UBOOT_LOADED_BY_CH:
  85+		set_muxconf_regs_essential();
  86+		set_muxconf_regs_non_essential();
  87+		break;
  88+	}
  89+}
  90+
  91 /*
  92  * Routine: s_init
  93- * Description: Does early system init of muxing and clocks.
  94- *              - Called path is with SRAM stack.
  95+ * Description: Does early system init of watchdog, muxing, clocks, and
  96+ * sdram. Watchdog disable is done always. For the rest what gets done
  97+ * depends on the boot mode in which this function is executed
  98+ *   1. s_init of SPL running from SRAM
  99+ *   2. s_init of U-Boot running from FLASH
 100+ *   3. s_init of U-Boot loaded to SDRAM by SPL
 101+ *   4. s_init of U-Boot loaded to SDRAM by ROM code using the Configuration
 102+ *	Header feature
 103+ * Please have a look at the respective functions to see what gets done in
 104+ * each of these cases
 105+ * This function is called with SRAM stack.
 106  */
 107 void s_init(void)
 108 {
 109 	watchdog_init();
 110+	set_mux_conf_regs();
 111 #ifdef CONFIG_PRELOADER
 112 	preloader_console_init();
 113 #endif
 114@@ -142,7 +190,6 @@ int checkboard(void)
 115 */
 116 int arch_cpu_init(void)
 117 {
 118-	set_muxconf_regs();
 119 	return 0;
 120 }
 121 
 122diff --git a/arch/arm/cpu/armv7/omap4/omap4_mux_data.h b/arch/arm/cpu/armv7/omap4/omap4_mux_data.h
 123new file mode 100644
 124index 0000000..00c52f8
 125--- /dev/null
 126+++ b/arch/arm/cpu/armv7/omap4/omap4_mux_data.h
 127@@ -0,0 +1,76 @@
 128+ /*
 129+ * (C) Copyright 2010
 130+ * Texas Instruments Incorporated, <www.ti.com>
 131+ *
 132+ *	Balaji Krishnamoorthy	<balajitk@ti.com>
 133+ *	Aneesh V		<aneesh@ti.com>
 134+ *
 135+ * See file CREDITS for list of people who contributed to this
 136+ * project.
 137+ *
 138+ * This program is free software; you can redistribute it and/or
 139+ * modify it under the terms of the GNU General Public License as
 140+ * published by the Free Software Foundation; either version 2 of
 141+ * the License, or (at your option) any later version.
 142+ *
 143+ * This program is distributed in the hope that it will be useful,
 144+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
 145+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 146+ * GNU General Public License for more details.
 147+ *
 148+ * You should have received a copy of the GNU General Public License
 149+ * along with this program; if not, write to the Free Software
 150+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 151+ * MA 02111-1307 USA
 152+ */
 153+#ifndef _OMAP4_MUX_DATA_H_
 154+#define _OMAP4_MUX_DATA_H_
 155+
 156+#include <asm/arch/mux_omap4.h>
 157+
 158+const struct pad_conf_entry core_padconf_array_essential[] = {
 159+
 160+{GPMC_AD0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat0 */
 161+{GPMC_AD1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat1 */
 162+{GPMC_AD2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat2 */
 163+{GPMC_AD3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat3 */
 164+{GPMC_AD4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat4 */
 165+{GPMC_AD5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat5 */
 166+{GPMC_AD6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat6 */
 167+{GPMC_AD7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat7 */
 168+{GPMC_NOE, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M1)},	 /* sdmmc2_clk */
 169+{GPMC_NWE, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_cmd */
 170+{SDMMC1_CLK, (PTU | OFF_EN | OFF_OUT_PTD | M0)},	 /* sdmmc1_clk */
 171+{SDMMC1_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_cmd */
 172+{SDMMC1_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat0 */
 173+{SDMMC1_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat1 */
 174+{SDMMC1_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat2 */
 175+{SDMMC1_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat3 */
 176+{SDMMC1_DAT4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat4 */
 177+{SDMMC1_DAT5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat5 */
 178+{SDMMC1_DAT6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat6 */
 179+{SDMMC1_DAT7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat7 */
 180+{I2C1_SCL, (PTU | IEN | M0)},				/* i2c1_scl */
 181+{I2C1_SDA, (PTU | IEN | M0)},				/* i2c1_sda */
 182+{I2C2_SCL, (PTU | IEN | M0)},				/* i2c2_scl */
 183+{I2C2_SDA, (PTU | IEN | M0)},				/* i2c2_sda */
 184+{I2C3_SCL, (PTU | IEN | M0)},				/* i2c3_scl */
 185+{I2C3_SDA, (PTU | IEN | M0)},				/* i2c3_sda */
 186+{I2C4_SCL, (PTU | IEN | M0)},				/* i2c4_scl */
 187+{I2C4_SDA, (PTU | IEN | M0)},				/* i2c4_sda */
 188+{UART3_CTS_RCTX, (PTU | IEN | M0)},			/* uart3_tx */
 189+{UART3_RTS_SD, (M0)},					/* uart3_rts_sd */
 190+{UART3_RX_IRRX, (IEN | M0)},				/* uart3_rx */
 191+{UART3_TX_IRTX, (M0)}					/* uart3_tx */
 192+
 193+};
 194+
 195+const struct pad_conf_entry wkup_padconf_array_essential[] = {
 196+
 197+{PAD1_SR_SCL, (PTU | IEN | M0)}, /* sr_scl */
 198+{PAD0_SR_SDA, (PTU | IEN | M0)}, /* sr_sda */
 199+{PAD1_SYS_32K, (IEN | M0)}	 /* sys_32k */
 200+
 201+};
 202+
 203+#endif  /* _OMAP4_MUX_DATA_H_ */
 204diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h b/arch/arm/include/asm/arch-omap4/sys_proto.h
 205index 19da2e1..33a1666 100644
 206--- a/arch/arm/include/asm/arch-omap4/sys_proto.h
 207+++ b/arch/arm/include/asm/arch-omap4/sys_proto.h
 208@@ -24,6 +24,7 @@
 209 #include <asm/arch/omap4.h>
 210 #include <asm/io.h>
 211 #include <asm/omap_common.h>
 212+#include <asm/arch/mux_omap4.h>
 213 
 214 struct omap_sysinfo {
 215 	char *board_string;
 216@@ -33,7 +34,8 @@ void gpmc_init(void);
 217 void watchdog_init(void);
 218 u32 get_device_type(void);
 219 void invalidate_dcache(u32);
 220-void set_muxconf_regs(void);
 221+void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
 222+void set_muxconf_regs_non_essential(void);
 223 void sr32(void *, u32, u32, u32);
 224 u32 wait_on_value(u32, u32, void *, u32);
 225 void sdelay(unsigned long);
 226diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c
 227index 78e1910..9afed80 100644
 228--- a/board/ti/panda/panda.c
 229+++ b/board/ti/panda/panda.c
 230@@ -25,7 +25,7 @@
 231 #include <asm/arch/sys_proto.h>
 232 #include <asm/arch/mmc_host_def.h>
 233 
 234-#include "panda.h"
 235+#include "panda_mux_data.h"
 236 
 237 DECLARE_GLOBAL_DATA_PTR;
 238 
 239@@ -65,27 +65,14 @@ int misc_init_r(void)
 240 	return 0;
 241 }
 242 
 243-void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
 244+void set_muxconf_regs_non_essential(void)
 245 {
 246-	int i;
 247-	struct pad_conf_entry *pad = (struct pad_conf_entry *) array;
 248-
 249-	for (i = 0; i < size; i++, pad++)
 250-		writew(pad->val, base + pad->offset);
 251-}
 252-
 253-/**
 254- * @brief set_muxconf_regs Setting up the configuration Mux registers
 255- * specific to the board.
 256- */
 257-void set_muxconf_regs(void)
 258-{
 259-	do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array,
 260-		   sizeof(core_padconf_array) /
 261+	do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_non_essential,
 262+		   sizeof(core_padconf_array_non_essential) /
 263 		   sizeof(struct pad_conf_entry));
 264 
 265-	do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array,
 266-		   sizeof(wkup_padconf_array) /
 267+	do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_non_essential,
 268+		   sizeof(wkup_padconf_array_non_essential) /
 269 		   sizeof(struct pad_conf_entry));
 270 }
 271 
 272diff --git a/board/ti/panda/panda.h b/board/ti/panda/panda.h
 273deleted file mode 100644
 274index e3d090e..0000000
 275--- a/board/ti/panda/panda.h
 276+++ /dev/null
 277@@ -1,264 +0,0 @@
 278-/*
 279- * (C) Copyright 2010
 280- * Texas Instruments Incorporated, <www.ti.com>
 281- *
 282- *	Balaji Krishnamoorthy	<balajitk@ti.com>
 283- *	Aneesh V		<aneesh@ti.com>
 284- *
 285- * See file CREDITS for list of people who contributed to this
 286- * project.
 287- *
 288- * This program is free software; you can redistribute it and/or
 289- * modify it under the terms of the GNU General Public License as
 290- * published by the Free Software Foundation; either version 2 of
 291- * the License, or (at your option) any later version.
 292- *
 293- * This program is distributed in the hope that it will be useful,
 294- * but WITHOUT ANY WARRANTY; without even the implied warranty of
 295- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 296- * GNU General Public License for more details.
 297- *
 298- * You should have received a copy of the GNU General Public License
 299- * along with this program; if not, write to the Free Software
 300- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 301- * MA 02111-1307 USA
 302- */
 303-
 304-#ifndef _PANDA_H_
 305-#define _PANDA_H_
 306-
 307-#include <asm/io.h>
 308-#include <asm/arch/mux_omap4.h>
 309-
 310-const struct pad_conf_entry core_padconf_array[] = {
 311-	{GPMC_AD0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* sdmmc2_dat0 */
 312-	{GPMC_AD1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, 	/* sdmmc2_dat1 */
 313-	{GPMC_AD2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* sdmmc2_dat2 */
 314-	{GPMC_AD3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* sdmmc2_dat3 */
 315-	{GPMC_AD4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* sdmmc2_dat4 */
 316-	{GPMC_AD5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* sdmmc2_dat5 */
 317-	{GPMC_AD6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* sdmmc2_dat6 */
 318-	{GPMC_AD7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* sdmmc2_dat7 */
 319-	{GPMC_AD8, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M3)},	/* gpio_32 */
 320-	{GPMC_AD9, (PTU | IEN | M3)},					/* gpio_33 */
 321-	{GPMC_AD10, (PTU | IEN | M3)},					/* gpio_34 */
 322-	{GPMC_AD11, (PTU | IEN | M3)},					/* gpio_35 */
 323-	{GPMC_AD12, (PTU | IEN | M3)},					/* gpio_36 */
 324-	{GPMC_AD13, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)},	/* gpio_37 */
 325-	{GPMC_AD14, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)},	/* gpio_38 */
 326-	{GPMC_AD15, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)},	/* gpio_39 */
 327-	{GPMC_A16, (M3)},						/* gpio_40 */
 328-	{GPMC_A17, (PTD | M3)},						/* gpio_41 */
 329-	{GPMC_A18, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row6 */
 330-	{GPMC_A19, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row7 */
 331-	{GPMC_A20, (IEN | M3)},						/* gpio_44 */
 332-	{GPMC_A21, (M3)},						/* gpio_45 */
 333-	{GPMC_A22, (M3)},						/* gpio_46 */
 334-	{GPMC_A23, (OFF_EN | OFF_PD | OFF_IN | M1)},			/* kpd_col7 */
 335-	{GPMC_A24, (PTD | M3)},						/* gpio_48 */
 336-	{GPMC_A25, (PTD | M3)},						/* gpio_49 */
 337-	{GPMC_NCS0, (M3)},						/* gpio_50 */
 338-	{GPMC_NCS1, (IEN | M3)},					/* gpio_51 */
 339-	{GPMC_NCS2, (IEN | M3)},					/* gpio_52 */
 340-	{GPMC_NCS3, (IEN | M3)},					/* gpio_53 */
 341-	{GPMC_NWP, (M3)},						/* gpio_54 */
 342-	{GPMC_CLK, (PTD | M3)},						/* gpio_55 */
 343-	{GPMC_NADV_ALE, (M3)},						/* gpio_56 */
 344-	{GPMC_NOE, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M1)},		/* sdmmc2_clk */
 345-	{GPMC_NWE, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* sdmmc2_cmd */
 346-	{GPMC_NBE0_CLE, (M3)},						/* gpio_59 */
 347-	{GPMC_NBE1, (PTD | M3)},					/* gpio_60 */
 348-	{GPMC_WAIT0, (PTU | IEN | M3)},					/* gpio_61 */
 349-	{GPMC_WAIT1,  (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)},	/* gpio_62 */
 350-	{C2C_DATA11, (PTD | M3)},					/* gpio_100 */
 351-	{C2C_DATA12, (PTU | IEN | M3)},					/* gpio_101 */
 352-	{C2C_DATA13, (PTD | M3)},					/* gpio_102 */
 353-	{C2C_DATA14, (M1)},						/* dsi2_te0 */
 354-	{C2C_DATA15, (PTD | M3)},					/* gpio_104 */
 355-	{HDMI_HPD, (M0)},						/* hdmi_hpd */
 356-	{HDMI_CEC, (M0)},						/* hdmi_cec */
 357-	{HDMI_DDC_SCL, (PTU | M0)},					/* hdmi_ddc_scl */
 358-	{HDMI_DDC_SDA, (PTU | IEN | M0)},				/* hdmi_ddc_sda */
 359-	{CSI21_DX0, (IEN | M0)},					/* csi21_dx0 */
 360-	{CSI21_DY0, (IEN | M0)},					/* csi21_dy0 */
 361-	{CSI21_DX1, (IEN | M0)},					/* csi21_dx1 */
 362-	{CSI21_DY1, (IEN | M0)},					/* csi21_dy1 */
 363-	{CSI21_DX2, (IEN | M0)},					/* csi21_dx2 */
 364-	{CSI21_DY2, (IEN | M0)},					/* csi21_dy2 */
 365-	{CSI21_DX3, (PTD | M7)},					/* csi21_dx3 */
 366-	{CSI21_DY3, (PTD | M7)},					/* csi21_dy3 */
 367-	{CSI21_DX4, (PTD | OFF_EN | OFF_PD | OFF_IN | M7)},		/* csi21_dx4 */
 368-	{CSI21_DY4, (PTD | OFF_EN | OFF_PD | OFF_IN | M7)},		/* csi21_dy4 */
 369-	{CSI22_DX0, (IEN | M0)},					/* csi22_dx0 */
 370-	{CSI22_DY0, (IEN | M0)},					/* csi22_dy0 */
 371-	{CSI22_DX1, (IEN | M0)},					/* csi22_dx1 */
 372-	{CSI22_DY1, (IEN | M0)},					/* csi22_dy1 */
 373-	{CAM_SHUTTER, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)},		/* cam_shutter */
 374-	{CAM_STROBE, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)},		/* cam_strobe */
 375-	{CAM_GLOBALRESET, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)},	/* gpio_83 */
 376-	{USBB1_ULPITLL_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/* usbb1_ulpiphy_clk */
 377-	{USBB1_ULPITLL_STP, (OFF_EN | OFF_OUT_PTD | M4)},		/* usbb1_ulpiphy_stp */
 378-	{USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dir */
 379-	{USBB1_ULPITLL_NXT, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_nxt */
 380-	{USBB1_ULPITLL_DAT0, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat0 */
 381-	{USBB1_ULPITLL_DAT1, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat1 */
 382-	{USBB1_ULPITLL_DAT2, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat2 */
 383-	{USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat3 */
 384-	{USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat4 */
 385-	{USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat5 */
 386-	{USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat6 */
 387-	{USBB1_ULPITLL_DAT7, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat7 */
 388-	{USBB1_HSIC_DATA, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* usbb1_hsic_data */
 389-	{USBB1_HSIC_STROBE, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* usbb1_hsic_strobe */
 390-	{USBC1_ICUSB_DP, (IEN | M0)},					/* usbc1_icusb_dp */
 391-	{USBC1_ICUSB_DM, (IEN | M0)},					/* usbc1_icusb_dm */
 392-	{SDMMC1_CLK, (PTU | OFF_EN | OFF_OUT_PTD | M0)},		/* sdmmc1_clk */
 393-	{SDMMC1_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc1_cmd */
 394-	{SDMMC1_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc1_dat0 */
 395-	{SDMMC1_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc1_dat1 */
 396-	{SDMMC1_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc1_dat2 */
 397-	{SDMMC1_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc1_dat3 */
 398-	{SDMMC1_DAT4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc1_dat4 */
 399-	{SDMMC1_DAT5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc1_dat5 */
 400-	{SDMMC1_DAT6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc1_dat6 */
 401-	{SDMMC1_DAT7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc1_dat7 */
 402-	{ABE_MCBSP2_CLKX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_mcbsp2_clkx */
 403-	{ABE_MCBSP2_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)},		/* abe_mcbsp2_dr */
 404-	{ABE_MCBSP2_DX, (OFF_EN | OFF_OUT_PTD | M0)},			/* abe_mcbsp2_dx */
 405-	{ABE_MCBSP2_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_mcbsp2_fsx */
 406-	{ABE_MCBSP1_CLKX, (IEN | M1)},					/* abe_slimbus1_clock */
 407-	{ABE_MCBSP1_DR, (IEN | M1)},					/* abe_slimbus1_data */
 408-	{ABE_MCBSP1_DX, (OFF_EN | OFF_OUT_PTD | M0)},			/* abe_mcbsp1_dx */
 409-	{ABE_MCBSP1_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_mcbsp1_fsx */
 410-	{ABE_PDM_UL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_pdm_ul_data */
 411-	{ABE_PDM_DL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_pdm_dl_data */
 412-	{ABE_PDM_FRAME, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_pdm_frame */
 413-	{ABE_PDM_LB_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_pdm_lb_clk */
 414-	{ABE_CLKS, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_clks */
 415-	{ABE_DMIC_CLK1, (M0)},						/* abe_dmic_clk1 */
 416-	{ABE_DMIC_DIN1, (IEN | M0)},					/* abe_dmic_din1 */
 417-	{ABE_DMIC_DIN2, (IEN | M0)},					/* abe_dmic_din2 */
 418-	{ABE_DMIC_DIN3, (IEN | M0)},					/* abe_dmic_din3 */
 419-	{UART2_CTS, (PTU | IEN | M0)},					/* uart2_cts */
 420-	{UART2_RTS, (M0)},						/* uart2_rts */
 421-	{UART2_RX, (PTU | IEN | M0)},					/* uart2_rx */
 422-	{UART2_TX, (M0)},						/* uart2_tx */
 423-	{HDQ_SIO, (M3)},						/* gpio_127 */
 424-	{I2C1_SCL, (PTU | IEN | M0)},					/* i2c1_scl */
 425-	{I2C1_SDA, (PTU | IEN | M0)},					/* i2c1_sda */
 426-	{I2C2_SCL, (PTU | IEN | M0)},					/* i2c2_scl */
 427-	{I2C2_SDA, (PTU | IEN | M0)},					/* i2c2_sda */
 428-	{I2C3_SCL, (PTU | IEN | M0)},					/* i2c3_scl */
 429-	{I2C3_SDA, (PTU | IEN | M0)},					/* i2c3_sda */
 430-	{I2C4_SCL, (PTU | IEN | M0)},					/* i2c4_scl */
 431-	{I2C4_SDA, (PTU | IEN | M0)},					/* i2c4_sda */
 432-	{MCSPI1_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi1_clk */
 433-	{MCSPI1_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi1_somi */
 434-	{MCSPI1_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi1_simo */
 435-	{MCSPI1_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* mcspi1_cs0 */
 436-	{MCSPI1_CS1, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M3)},	/* mcspi1_cs1 */
 437-	{MCSPI1_CS2, (PTU | OFF_EN | OFF_OUT_PTU | M3)},		/* gpio_139 */
 438-	{MCSPI1_CS3, (PTU | IEN | M3)},					/* gpio_140 */
 439-	{UART3_CTS_RCTX, (PTU | IEN | M0)},				/* uart3_tx */
 440-	{UART3_RTS_SD, (M0)},						/* uart3_rts_sd */
 441-	{UART3_RX_IRRX, (IEN | M0)},					/* uart3_rx */
 442-	{UART3_TX_IRTX, (M0)},						/* uart3_tx */
 443-	{SDMMC5_CLK, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M0)},		/* sdmmc5_clk */
 444-	{SDMMC5_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc5_cmd */
 445-	{SDMMC5_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc5_dat0 */
 446-	{SDMMC5_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc5_dat1 */
 447-	{SDMMC5_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc5_dat2 */
 448-	{SDMMC5_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc5_dat3 */
 449-	{MCSPI4_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi4_clk */
 450-	{MCSPI4_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi4_simo */
 451-	{MCSPI4_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi4_somi */
 452-	{MCSPI4_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* mcspi4_cs0 */
 453-	{UART4_RX, (IEN | M0)},						/* uart4_rx */
 454-	{UART4_TX, (M0)},						/* uart4_tx */
 455-	{USBB2_ULPITLL_CLK, (IEN | M3)},				/* gpio_157 */
 456-	{USBB2_ULPITLL_STP, (IEN | M5)},				/* dispc2_data23 */
 457-	{USBB2_ULPITLL_DIR, (IEN | M5)},				/* dispc2_data22 */
 458-	{USBB2_ULPITLL_NXT, (IEN | M5)},				/* dispc2_data21 */
 459-	{USBB2_ULPITLL_DAT0, (IEN | M5)},				/* dispc2_data20 */
 460-	{USBB2_ULPITLL_DAT1, (IEN | M5)},				/* dispc2_data19 */
 461-	{USBB2_ULPITLL_DAT2, (IEN | M5)},				/* dispc2_data18 */
 462-	{USBB2_ULPITLL_DAT3, (IEN | M5)},				/* dispc2_data15 */
 463-	{USBB2_ULPITLL_DAT4, (IEN | M5)},				/* dispc2_data14 */
 464-	{USBB2_ULPITLL_DAT5, (IEN | M5)},				/* dispc2_data13 */
 465-	{USBB2_ULPITLL_DAT6, (IEN | M5)},				/* dispc2_data12 */
 466-	{USBB2_ULPITLL_DAT7, (IEN | M5)},				/* dispc2_data11 */
 467-	{USBB2_HSIC_DATA, (PTD | OFF_EN | OFF_OUT_PTU | M3)},		/* gpio_169 */
 468-	{USBB2_HSIC_STROBE, (PTD | OFF_EN | OFF_OUT_PTU | M3)},		/* gpio_170 */
 469-	{UNIPRO_TX0, (PTD | IEN | M3)},					/* gpio_171 */
 470-	{UNIPRO_TY0, (OFF_EN | OFF_PD | OFF_IN | M1)},			/* kpd_col1 */
 471-	{UNIPRO_TX1, (OFF_EN | OFF_PD | OFF_IN | M1)},			/* kpd_col2 */
 472-	{UNIPRO_TY1, (OFF_EN | OFF_PD | OFF_IN | M1)},			/* kpd_col3 */
 473-	{UNIPRO_TX2, (PTU | IEN | M3)},					/* gpio_0 */
 474-	{UNIPRO_TY2, (PTU | IEN | M3)},					/* gpio_1 */
 475-	{UNIPRO_RX0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row0 */
 476-	{UNIPRO_RY0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row1 */
 477-	{UNIPRO_RX1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row2 */
 478-	{UNIPRO_RY1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row3 */
 479-	{UNIPRO_RX2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row4 */
 480-	{UNIPRO_RY2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row5 */
 481-	{USBA0_OTG_CE, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M0)},	/* usba0_otg_ce */
 482-	{USBA0_OTG_DP, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* usba0_otg_dp */
 483-	{USBA0_OTG_DM, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* usba0_otg_dm */
 484-	{FREF_CLK1_OUT, (M0)},						/* fref_clk1_out */
 485-	{FREF_CLK2_OUT, (PTU | IEN | M3)},				/* gpio_182 */
 486-	{SYS_NIRQ1, (PTU | IEN | M0)},					/* sys_nirq1 */
 487-	{SYS_NIRQ2, (PTU | IEN | M0)},					/* sys_nirq2 */
 488-	{SYS_BOOT0, (PTU | IEN | M3)},					/* gpio_184 */
 489-	{SYS_BOOT1, (M3)},						/* gpio_185 */
 490-	{SYS_BOOT2, (PTD | IEN | M3)},					/* gpio_186 */
 491-	{SYS_BOOT3, (M3)},						/* gpio_187 */
 492-	{SYS_BOOT4, (M3)},						/* gpio_188 */
 493-	{SYS_BOOT5, (PTD | IEN | M3)},					/* gpio_189 */
 494-	{DPM_EMU0, (IEN | M0)},						/* dpm_emu0 */
 495-	{DPM_EMU1, (IEN | M0)},						/* dpm_emu1 */
 496-	{DPM_EMU2, (IEN | M0)},						/* dpm_emu2 */
 497-	{DPM_EMU3, (IEN | M5)},						/* dispc2_data10 */
 498-	{DPM_EMU4, (IEN | M5)},						/* dispc2_data9 */
 499-	{DPM_EMU5, (IEN | M5)},						/* dispc2_data16 */
 500-	{DPM_EMU6, (IEN | M5)},						/* dispc2_data17 */
 501-	{DPM_EMU7, (IEN | M5)},						/* dispc2_hsync */
 502-	{DPM_EMU8, (IEN | M5)},						/* dispc2_pclk */
 503-	{DPM_EMU9, (IEN | M5)},						/* dispc2_vsync */
 504-	{DPM_EMU10, (IEN | M5)},					/* dispc2_de */
 505-	{DPM_EMU11, (IEN | M5)},					/* dispc2_data8 */
 506-	{DPM_EMU12, (IEN | M5)},					/* dispc2_data7 */
 507-	{DPM_EMU13, (IEN | M5)},					/* dispc2_data6 */
 508-	{DPM_EMU14, (IEN | M5)},					/* dispc2_data5 */
 509-	{DPM_EMU15, (IEN | M5)},					/* dispc2_data4 */
 510-	{DPM_EMU16, (M3)},						/* gpio_27 */
 511-	{DPM_EMU17, (IEN | M5)},					/* dispc2_data2 */
 512-	{DPM_EMU18, (IEN | M5)},					/* dispc2_data1 */
 513-	{DPM_EMU19, (IEN | M5)},					/* dispc2_data0 */
 514-};
 515-
 516-const struct pad_conf_entry wkup_padconf_array[] = {
 517-	{PAD0_SIM_IO, (IEN | M0)},					/* sim_io */
 518-	{PAD1_SIM_CLK, (M0)},						/* sim_clk */
 519-	{PAD0_SIM_RESET, (M0)},						/* sim_reset */
 520-	{PAD1_SIM_CD, (PTU | IEN | M0)},				/* sim_cd */
 521-	{PAD0_SIM_PWRCTRL, (M0)},					/* sim_pwrctrl */
 522-	{PAD1_SR_SCL, (PTU | IEN | M0)},				/* sr_scl */
 523-	{PAD0_SR_SDA, (PTU | IEN | M0)},				/* sr_sda */
 524-	{PAD1_FREF_XTAL_IN, (M0)},					/* # */
 525-	{PAD0_FREF_SLICER_IN, (M0)},					/* fref_slicer_in */
 526-	{PAD1_FREF_CLK_IOREQ, (M0)},					/* fref_clk_ioreq */
 527-	{PAD0_FREF_CLK0_OUT, (M2)},					/* sys_drm_msecure */
 528-	{PAD1_FREF_CLK3_REQ, (M3)},					/* gpio_wk30 */
 529-	{PAD0_FREF_CLK3_OUT, (M0)},					/* fref_clk3_out */
 530-	{PAD1_FREF_CLK4_REQ, (PTU | OFF_EN | OFF_OUT_PTU | M3)},	/* led status_1 */
 531-	{PAD0_FREF_CLK4_OUT, (PTU | OFF_EN | OFF_OUT_PTU | M3)},	/* led status_2 */
 532-	{PAD1_SYS_32K, (IEN | M0)},					/* sys_32k */
 533-	{PAD0_SYS_NRESPWRON, (M0)},					/* sys_nrespwron */
 534-	{PAD1_SYS_NRESWARM, (M0)},					/* sys_nreswarm */
 535-	{PAD0_SYS_PWR_REQ, (PTU | M0)},					/* sys_pwr_req */
 536-	{PAD1_SYS_PWRON_RESET, (M3)},					/* gpio_wk29 */
 537-	{PAD0_SYS_BOOT6, (IEN | M3)},					/* gpio_wk9 */
 538-	{PAD1_SYS_BOOT7, (IEN | M3)},					/* gpio_wk10 */
 539-};
 540-
 541-#endif
 542diff --git a/board/ti/panda/panda_mux_data.h b/board/ti/panda/panda_mux_data.h
 543new file mode 100644
 544index 0000000..8bb7fe5
 545--- /dev/null
 546+++ b/board/ti/panda/panda_mux_data.h
 547@@ -0,0 +1,229 @@
 548+/*
 549+ * (C) Copyright 2010
 550+ * Texas Instruments Incorporated, <www.ti.com>
 551+ *
 552+ *	Balaji Krishnamoorthy	<balajitk@ti.com>
 553+ *	Aneesh V		<aneesh@ti.com>
 554+ *
 555+ * See file CREDITS for list of people who contributed to this
 556+ * project.
 557+ *
 558+ * This program is free software; you can redistribute it and/or
 559+ * modify it under the terms of the GNU General Public License as
 560+ * published by the Free Software Foundation; either version 2 of
 561+ * the License, or (at your option) any later version.
 562+ *
 563+ * This program is distributed in the hope that it will be useful,
 564+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
 565+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 566+ * GNU General Public License for more details.
 567+ *
 568+ * You should have received a copy of the GNU General Public License
 569+ * along with this program; if not, write to the Free Software
 570+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 571+ * MA 02111-1307 USA
 572+ */
 573+
 574+#ifndef _PANDA_MUX_DATA_H_
 575+#define _PANDA_MUX_DATA_H_
 576+
 577+#include <asm/io.h>
 578+#include <asm/arch/mux_omap4.h>
 579+
 580+const struct pad_conf_entry core_padconf_array_non_essential[] = {
 581+	{GPMC_AD8, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M3)},	/* gpio_32 */
 582+	{GPMC_AD9, (PTU | IEN | M3)},					/* gpio_33 */
 583+	{GPMC_AD10, (PTU | IEN | M3)},					/* gpio_34 */
 584+	{GPMC_AD11, (PTU | IEN | M3)},					/* gpio_35 */
 585+	{GPMC_AD12, (PTU | IEN | M3)},					/* gpio_36 */
 586+	{GPMC_AD13, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)},	/* gpio_37 */
 587+	{GPMC_AD14, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)},	/* gpio_38 */
 588+	{GPMC_AD15, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)},	/* gpio_39 */
 589+	{GPMC_A16, (M3)},						/* gpio_40 */
 590+	{GPMC_A17, (PTD | M3)},						/* gpio_41 */
 591+	{GPMC_A18, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row6 */
 592+	{GPMC_A19, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row7 */
 593+	{GPMC_A20, (IEN | M3)},						/* gpio_44 */
 594+	{GPMC_A21, (M3)},						/* gpio_45 */
 595+	{GPMC_A22, (M3)},						/* gpio_46 */
 596+	{GPMC_A23, (OFF_EN | OFF_PD | OFF_IN | M1)},			/* kpd_col7 */
 597+	{GPMC_A24, (PTD | M3)},						/* gpio_48 */
 598+	{GPMC_A25, (PTD | M3)},						/* gpio_49 */
 599+	{GPMC_NCS0, (M3)},						/* gpio_50 */
 600+	{GPMC_NCS1, (IEN | M3)},					/* gpio_51 */
 601+	{GPMC_NCS2, (IEN | M3)},					/* gpio_52 */
 602+	{GPMC_NCS3, (IEN | M3)},					/* gpio_53 */
 603+	{GPMC_NWP, (M3)},						/* gpio_54 */
 604+	{GPMC_CLK, (PTD | M3)},						/* gpio_55 */
 605+	{GPMC_NADV_ALE, (M3)},						/* gpio_56 */
 606+	{GPMC_NBE0_CLE, (M3)},						/* gpio_59 */
 607+	{GPMC_NBE1, (PTD | M3)},					/* gpio_60 */
 608+	{GPMC_WAIT0, (PTU | IEN | M3)},					/* gpio_61 */
 609+	{GPMC_WAIT1,  (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)},	/* gpio_62 */
 610+	{C2C_DATA11, (PTD | M3)},					/* gpio_100 */
 611+	{C2C_DATA12, (PTU | IEN | M3)},					/* gpio_101 */
 612+	{C2C_DATA13, (PTD | M3)},					/* gpio_102 */
 613+	{C2C_DATA14, (M1)},						/* dsi2_te0 */
 614+	{C2C_DATA15, (PTD | M3)},					/* gpio_104 */
 615+	{HDMI_HPD, (M0)},						/* hdmi_hpd */
 616+	{HDMI_CEC, (M0)},						/* hdmi_cec */
 617+	{HDMI_DDC_SCL, (PTU | M0)},					/* hdmi_ddc_scl */
 618+	{HDMI_DDC_SDA, (PTU | IEN | M0)},				/* hdmi_ddc_sda */
 619+	{CSI21_DX0, (IEN | M0)},					/* csi21_dx0 */
 620+	{CSI21_DY0, (IEN | M0)},					/* csi21_dy0 */
 621+	{CSI21_DX1, (IEN | M0)},					/* csi21_dx1 */
 622+	{CSI21_DY1, (IEN | M0)},					/* csi21_dy1 */
 623+	{CSI21_DX2, (IEN | M0)},					/* csi21_dx2 */
 624+	{CSI21_DY2, (IEN | M0)},					/* csi21_dy2 */
 625+	{CSI21_DX3, (PTD | M7)},					/* csi21_dx3 */
 626+	{CSI21_DY3, (PTD | M7)},					/* csi21_dy3 */
 627+	{CSI21_DX4, (PTD | OFF_EN | OFF_PD | OFF_IN | M7)},		/* csi21_dx4 */
 628+	{CSI21_DY4, (PTD | OFF_EN | OFF_PD | OFF_IN | M7)},		/* csi21_dy4 */
 629+	{CSI22_DX0, (IEN | M0)},					/* csi22_dx0 */
 630+	{CSI22_DY0, (IEN | M0)},					/* csi22_dy0 */
 631+	{CSI22_DX1, (IEN | M0)},					/* csi22_dx1 */
 632+	{CSI22_DY1, (IEN | M0)},					/* csi22_dy1 */
 633+	{CAM_SHUTTER, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)},		/* cam_shutter */
 634+	{CAM_STROBE, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)},		/* cam_strobe */
 635+	{CAM_GLOBALRESET, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)},	/* gpio_83 */
 636+	{USBB1_ULPITLL_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/* usbb1_ulpiphy_clk */
 637+	{USBB1_ULPITLL_STP, (OFF_EN | OFF_OUT_PTD | M4)},		/* usbb1_ulpiphy_stp */
 638+	{USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dir */
 639+	{USBB1_ULPITLL_NXT, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_nxt */
 640+	{USBB1_ULPITLL_DAT0, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat0 */
 641+	{USBB1_ULPITLL_DAT1, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat1 */
 642+	{USBB1_ULPITLL_DAT2, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat2 */
 643+	{USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat3 */
 644+	{USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat4 */
 645+	{USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat5 */
 646+	{USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat6 */
 647+	{USBB1_ULPITLL_DAT7, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat7 */
 648+	{USBB1_HSIC_DATA, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* usbb1_hsic_data */
 649+	{USBB1_HSIC_STROBE, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* usbb1_hsic_strobe */
 650+	{USBC1_ICUSB_DP, (IEN | M0)},					/* usbc1_icusb_dp */
 651+	{USBC1_ICUSB_DM, (IEN | M0)},					/* usbc1_icusb_dm */
 652+	{ABE_MCBSP2_CLKX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_mcbsp2_clkx */
 653+	{ABE_MCBSP2_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)},		/* abe_mcbsp2_dr */
 654+	{ABE_MCBSP2_DX, (OFF_EN | OFF_OUT_PTD | M0)},			/* abe_mcbsp2_dx */
 655+	{ABE_MCBSP2_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_mcbsp2_fsx */
 656+	{ABE_MCBSP1_CLKX, (IEN | M1)},					/* abe_slimbus1_clock */
 657+	{ABE_MCBSP1_DR, (IEN | M1)},					/* abe_slimbus1_data */
 658+	{ABE_MCBSP1_DX, (OFF_EN | OFF_OUT_PTD | M0)},			/* abe_mcbsp1_dx */
 659+	{ABE_MCBSP1_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_mcbsp1_fsx */
 660+	{ABE_PDM_UL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_pdm_ul_data */
 661+	{ABE_PDM_DL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_pdm_dl_data */
 662+	{ABE_PDM_FRAME, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_pdm_frame */
 663+	{ABE_PDM_LB_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_pdm_lb_clk */
 664+	{ABE_CLKS, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_clks */
 665+	{ABE_DMIC_CLK1, (M0)},						/* abe_dmic_clk1 */
 666+	{ABE_DMIC_DIN1, (IEN | M0)},					/* abe_dmic_din1 */
 667+	{ABE_DMIC_DIN2, (IEN | M0)},					/* abe_dmic_din2 */
 668+	{ABE_DMIC_DIN3, (IEN | M0)},					/* abe_dmic_din3 */
 669+	{UART2_CTS, (PTU | IEN | M0)},					/* uart2_cts */
 670+	{UART2_RTS, (M0)},						/* uart2_rts */
 671+	{UART2_RX, (PTU | IEN | M0)},					/* uart2_rx */
 672+	{UART2_TX, (M0)},						/* uart2_tx */
 673+	{HDQ_SIO, (M3)},						/* gpio_127 */
 674+	{MCSPI1_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi1_clk */
 675+	{MCSPI1_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi1_somi */
 676+	{MCSPI1_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi1_simo */
 677+	{MCSPI1_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* mcspi1_cs0 */
 678+	{MCSPI1_CS1, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M3)},	/* mcspi1_cs1 */
 679+	{MCSPI1_CS2, (PTU | OFF_EN | OFF_OUT_PTU | M3)},		/* gpio_139 */
 680+	{MCSPI1_CS3, (PTU | IEN | M3)},					/* gpio_140 */
 681+	{SDMMC5_CLK, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M0)},		/* sdmmc5_clk */
 682+	{SDMMC5_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc5_cmd */
 683+	{SDMMC5_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc5_dat0 */
 684+	{SDMMC5_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc5_dat1 */
 685+	{SDMMC5_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc5_dat2 */
 686+	{SDMMC5_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc5_dat3 */
 687+	{MCSPI4_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi4_clk */
 688+	{MCSPI4_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi4_simo */
 689+	{MCSPI4_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi4_somi */
 690+	{MCSPI4_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* mcspi4_cs0 */
 691+	{UART4_RX, (IEN | M0)},						/* uart4_rx */
 692+	{UART4_TX, (M0)},						/* uart4_tx */
 693+	{USBB2_ULPITLL_CLK, (IEN | M3)},				/* gpio_157 */
 694+	{USBB2_ULPITLL_STP, (IEN | M5)},				/* dispc2_data23 */
 695+	{USBB2_ULPITLL_DIR, (IEN | M5)},				/* dispc2_data22 */
 696+	{USBB2_ULPITLL_NXT, (IEN | M5)},				/* dispc2_data21 */
 697+	{USBB2_ULPITLL_DAT0, (IEN | M5)},				/* dispc2_data20 */
 698+	{USBB2_ULPITLL_DAT1, (IEN | M5)},				/* dispc2_data19 */
 699+	{USBB2_ULPITLL_DAT2, (IEN | M5)},				/* dispc2_data18 */
 700+	{USBB2_ULPITLL_DAT3, (IEN | M5)},				/* dispc2_data15 */
 701+	{USBB2_ULPITLL_DAT4, (IEN | M5)},				/* dispc2_data14 */
 702+	{USBB2_ULPITLL_DAT5, (IEN | M5)},				/* dispc2_data13 */
 703+	{USBB2_ULPITLL_DAT6, (IEN | M5)},				/* dispc2_data12 */
 704+	{USBB2_ULPITLL_DAT7, (IEN | M5)},				/* dispc2_data11 */
 705+	{USBB2_HSIC_DATA, (PTD | OFF_EN | OFF_OUT_PTU | M3)},		/* gpio_169 */
 706+	{USBB2_HSIC_STROBE, (PTD | OFF_EN | OFF_OUT_PTU | M3)},		/* gpio_170 */
 707+	{UNIPRO_TX0, (PTD | IEN | M3)},					/* gpio_171 */
 708+	{UNIPRO_TY0, (OFF_EN | OFF_PD | OFF_IN | M1)},			/* kpd_col1 */
 709+	{UNIPRO_TX1, (OFF_EN | OFF_PD | OFF_IN | M1)},			/* kpd_col2 */
 710+	{UNIPRO_TY1, (OFF_EN | OFF_PD | OFF_IN | M1)},			/* kpd_col3 */
 711+	{UNIPRO_TX2, (PTU | IEN | M3)},					/* gpio_0 */
 712+	{UNIPRO_TY2, (PTU | IEN | M3)},					/* gpio_1 */
 713+	{UNIPRO_RX0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row0 */
 714+	{UNIPRO_RY0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row1 */
 715+	{UNIPRO_RX1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row2 */
 716+	{UNIPRO_RY1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row3 */
 717+	{UNIPRO_RX2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row4 */
 718+	{UNIPRO_RY2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row5 */
 719+	{USBA0_OTG_CE, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M0)},	/* usba0_otg_ce */
 720+	{USBA0_OTG_DP, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* usba0_otg_dp */
 721+	{USBA0_OTG_DM, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* usba0_otg_dm */
 722+	{FREF_CLK1_OUT, (M0)},						/* fref_clk1_out */
 723+	{FREF_CLK2_OUT, (PTU | IEN | M3)},				/* gpio_182 */
 724+	{SYS_NIRQ1, (PTU | IEN | M0)},					/* sys_nirq1 */
 725+	{SYS_NIRQ2, (PTU | IEN | M0)},					/* sys_nirq2 */
 726+	{SYS_BOOT0, (PTU | IEN | M3)},					/* gpio_184 */
 727+	{SYS_BOOT1, (M3)},						/* gpio_185 */
 728+	{SYS_BOOT2, (PTD | IEN | M3)},					/* gpio_186 */
 729+	{SYS_BOOT3, (M3)},						/* gpio_187 */
 730+	{SYS_BOOT4, (M3)},						/* gpio_188 */
 731+	{SYS_BOOT5, (PTD | IEN | M3)},					/* gpio_189 */
 732+	{DPM_EMU0, (IEN | M0)},						/* dpm_emu0 */
 733+	{DPM_EMU1, (IEN | M0)},						/* dpm_emu1 */
 734+	{DPM_EMU2, (IEN | M0)},						/* dpm_emu2 */
 735+	{DPM_EMU3, (IEN | M5)},						/* dispc2_data10 */
 736+	{DPM_EMU4, (IEN | M5)},						/* dispc2_data9 */
 737+	{DPM_EMU5, (IEN | M5)},						/* dispc2_data16 */
 738+	{DPM_EMU6, (IEN | M5)},						/* dispc2_data17 */
 739+	{DPM_EMU7, (IEN | M5)},						/* dispc2_hsync */
 740+	{DPM_EMU8, (IEN | M5)},						/* dispc2_pclk */
 741+	{DPM_EMU9, (IEN | M5)},						/* dispc2_vsync */
 742+	{DPM_EMU10, (IEN | M5)},					/* dispc2_de */
 743+	{DPM_EMU11, (IEN | M5)},					/* dispc2_data8 */
 744+	{DPM_EMU12, (IEN | M5)},					/* dispc2_data7 */
 745+	{DPM_EMU13, (IEN | M5)},					/* dispc2_data6 */
 746+	{DPM_EMU14, (IEN | M5)},					/* dispc2_data5 */
 747+	{DPM_EMU15, (IEN | M5)},					/* dispc2_data4 */
 748+	{DPM_EMU16, (M3)},						/* gpio_27 */
 749+	{DPM_EMU17, (IEN | M5)},					/* dispc2_data2 */
 750+	{DPM_EMU18, (IEN | M5)},					/* dispc2_data1 */
 751+	{DPM_EMU19, (IEN | M5)},					/* dispc2_data0 */
 752+};
 753+
 754+const struct pad_conf_entry wkup_padconf_array_non_essential[] = {
 755+	{PAD0_SIM_IO, (IEN | M0)},					/* sim_io */
 756+	{PAD1_SIM_CLK, (M0)},						/* sim_clk */
 757+	{PAD0_SIM_RESET, (M0)},						/* sim_reset */
 758+	{PAD1_SIM_CD, (PTU | IEN | M0)},				/* sim_cd */
 759+	{PAD0_SIM_PWRCTRL, (M0)},					/* sim_pwrctrl */
 760+	{PAD1_FREF_XTAL_IN, (M0)},					/* # */
 761+	{PAD0_FREF_SLICER_IN, (M0)},					/* fref_slicer_in */
 762+	{PAD1_FREF_CLK_IOREQ, (M0)},					/* fref_clk_ioreq */
 763+	{PAD0_FREF_CLK0_OUT, (M2)},					/* sys_drm_msecure */
 764+	{PAD1_FREF_CLK3_REQ, (M3)},					/* gpio_wk30 */
 765+	{PAD0_FREF_CLK3_OUT, (M0)},					/* fref_clk3_out */
 766+	{PAD1_FREF_CLK4_REQ, (PTU | OFF_EN | OFF_OUT_PTU | M3)},	/* led status_1 */
 767+	{PAD0_FREF_CLK4_OUT, (PTU | OFF_EN | OFF_OUT_PTU | M3)},	/* led status_2 */
 768+	{PAD0_SYS_NRESPWRON, (M0)},					/* sys_nrespwron */
 769+	{PAD1_SYS_NRESWARM, (M0)},					/* sys_nreswarm */
 770+	{PAD0_SYS_PWR_REQ, (PTU | M0)},					/* sys_pwr_req */
 771+	{PAD1_SYS_PWRON_RESET, (M3)},					/* gpio_wk29 */
 772+	{PAD0_SYS_BOOT6, (IEN | M3)},					/* gpio_wk9 */
 773+	{PAD1_SYS_BOOT7, (IEN | M3)},					/* gpio_wk10 */
 774+};
 775+
 776+#endif /* _PANDA_MUX_DATA_H_ */
 777diff --git a/board/ti/sdp4430/sdp.c b/board/ti/sdp4430/sdp.c
 778index b13c4c5..a5ea682 100644
 779--- a/board/ti/sdp4430/sdp.c
 780+++ b/board/ti/sdp4430/sdp.c
 781@@ -27,7 +27,7 @@
 782 #include <asm/arch/sys_proto.h>
 783 #include <asm/arch/mmc_host_def.h>
 784 
 785-#include "sdp.h"
 786+#include "sdp4430_mux_data.h"
 787 
 788 DECLARE_GLOBAL_DATA_PTR;
 789 
 790@@ -70,27 +70,14 @@ int misc_init_r(void)
 791 	return 0;
 792 }
 793 
 794-void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
 795+void set_muxconf_regs_non_essential(void)
 796 {
 797-	int i;
 798-	struct pad_conf_entry *pad = (struct pad_conf_entry *) array;
 799-
 800-	for (i = 0; i < size; i++, pad++)
 801-		writew(pad->val, base + pad->offset);
 802-}
 803-
 804-/**
 805- * @brief set_muxconf_regs Setting up the configuration Mux registers
 806- * specific to the board.
 807- */
 808-void set_muxconf_regs(void)
 809-{
 810-	do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array,
 811-		   sizeof(core_padconf_array) /
 812+	do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_non_essential,
 813+		   sizeof(core_padconf_array_non_essential) /
 814 		   sizeof(struct pad_conf_entry));
 815 
 816-	do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array,
 817-		   sizeof(wkup_padconf_array) /
 818+	do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_non_essential,
 819+		   sizeof(wkup_padconf_array_non_essential) /
 820 		   sizeof(struct pad_conf_entry));
 821 }
 822 
 823diff --git a/board/ti/sdp4430/sdp.h b/board/ti/sdp4430/sdp.h
 824deleted file mode 100644
 825index bf41067..0000000
 826--- a/board/ti/sdp4430/sdp.h
 827+++ /dev/null
 828@@ -1,264 +0,0 @@
 829-/*
 830- * (C) Copyright 2010
 831- * Texas Instruments Incorporated, <www.ti.com>
 832- *
 833- *	Balaji Krishnamoorthy	<balajitk@ti.com>
 834- *	Aneesh V		<aneesh@ti.com>
 835- *
 836- * See file CREDITS for list of people who contributed to this
 837- * project.
 838- *
 839- * This program is free software; you can redistribute it and/or
 840- * modify it under the terms of the GNU General Public License as
 841- * published by the Free Software Foundation; either version 2 of
 842- * the License, or (at your option) any later version.
 843- *
 844- * This program is distributed in the hope that it will be useful,
 845- * but WITHOUT ANY WARRANTY; without even the implied warranty of
 846- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 847- * GNU General Public License for more details.
 848- *
 849- * You should have received a copy of the GNU General Public License
 850- * along with this program; if not, write to the Free Software
 851- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 852- * MA 02111-1307 USA
 853- */
 854-
 855-#ifndef _SDP_H_
 856-#define _SDP_H_
 857-
 858-#include <asm/io.h>
 859-#include <asm/arch/mux_omap4.h>
 860-
 861-const struct pad_conf_entry core_padconf_array[] = {
 862-	{GPMC_AD0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* sdmmc2_dat0 */
 863-	{GPMC_AD1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, 	/* sdmmc2_dat1 */
 864-	{GPMC_AD2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* sdmmc2_dat2 */
 865-	{GPMC_AD3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* sdmmc2_dat3 */
 866-	{GPMC_AD4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* sdmmc2_dat4 */
 867-	{GPMC_AD5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* sdmmc2_dat5 */
 868-	{GPMC_AD6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* sdmmc2_dat6 */
 869-	{GPMC_AD7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* sdmmc2_dat7 */
 870-	{GPMC_AD8, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M3)},	/* gpio_32 */
 871-	{GPMC_AD9, (PTU | IEN | M3)},					/* gpio_33 */
 872-	{GPMC_AD10, (PTU | IEN | M3)},					/* gpio_34 */
 873-	{GPMC_AD11, (PTU | IEN | M3)},					/* gpio_35 */
 874-	{GPMC_AD12, (PTU | IEN | M3)},					/* gpio_36 */
 875-	{GPMC_AD13, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)},	/* gpio_37 */
 876-	{GPMC_AD14, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)},	/* gpio_38 */
 877-	{GPMC_AD15, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)},	/* gpio_39 */
 878-	{GPMC_A16, (M3)},						/* gpio_40 */
 879-	{GPMC_A17, (PTD | M3)},						/* gpio_41 */
 880-	{GPMC_A18, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row6 */
 881-	{GPMC_A19, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row7 */
 882-	{GPMC_A20, (IEN | M3)},						/* gpio_44 */
 883-	{GPMC_A21, (M3)},						/* gpio_45 */
 884-	{GPMC_A22, (OFF_EN | OFF_PD | OFF_IN | M1)},			/* kpd_col6 */
 885-	{GPMC_A23, (OFF_EN | OFF_PD | OFF_IN | M1)},			/* kpd_col7 */
 886-	{GPMC_A24, (PTD | M3)},						/* gpio_48 */
 887-	{GPMC_A25, (PTD | M3)},						/* gpio_49 */
 888-	{GPMC_NCS0, (M3)},						/* gpio_50 */
 889-	{GPMC_NCS1, (IEN | M3)},					/* gpio_51 */
 890-	{GPMC_NCS2, (IEN | M3)},					/* gpio_52 */
 891-	{GPMC_NCS3, (IEN | M3)},					/* gpio_53 */
 892-	{GPMC_NWP, (M3)},						/* gpio_54 */
 893-	{GPMC_CLK, (PTD | M3)},						/* gpio_55 */
 894-	{GPMC_NADV_ALE, (M3)},						/* gpio_56 */
 895-	{GPMC_NOE, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M1)},		/* sdmmc2_clk */
 896-	{GPMC_NWE, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* sdmmc2_cmd */
 897-	{GPMC_NBE0_CLE, (M3)},						/* gpio_59 */
 898-	{GPMC_NBE1, (PTD | M3)},					/* gpio_60 */
 899-	{GPMC_WAIT0, (PTU | IEN | M3)},					/* gpio_61 */
 900-	{GPMC_WAIT1, (IEN | M3)},					/* gpio_62 */
 901-	{C2C_DATA11, (PTD | M3)},					/* gpio_100 */
 902-	{C2C_DATA12, (M1)},						/* dsi1_te0 */
 903-	{C2C_DATA13, (PTD | M3)},					/* gpio_102 */
 904-	{C2C_DATA14, (M1)},						/* dsi2_te0 */
 905-	{C2C_DATA15, (PTD | M3)},					/* gpio_104 */
 906-	{HDMI_HPD, (M0)},						/* hdmi_hpd */
 907-	{HDMI_CEC, (M0)},						/* hdmi_cec */
 908-	{HDMI_DDC_SCL, (PTU | M0)},					/* hdmi_ddc_scl */
 909-	{HDMI_DDC_SDA, (PTU | IEN | M0)},				/* hdmi_ddc_sda */
 910-	{CSI21_DX0, (IEN | M0)},					/* csi21_dx0 */
 911-	{CSI21_DY0, (IEN | M0)},					/* csi21_dy0 */
 912-	{CSI21_DX1, (IEN | M0)},					/* csi21_dx1 */
 913-	{CSI21_DY1, (IEN | M0)},					/* csi21_dy1 */
 914-	{CSI21_DX2, (IEN | M0)},					/* csi21_dx2 */
 915-	{CSI21_DY2, (IEN | M0)},					/* csi21_dy2 */
 916-	{CSI21_DX3, (PTD | M7)},					/* csi21_dx3 */
 917-	{CSI21_DY3, (PTD | M7)},					/* csi21_dy3 */
 918-	{CSI21_DX4, (PTD | OFF_EN | OFF_PD | OFF_IN | M7)},		/* csi21_dx4 */
 919-	{CSI21_DY4, (PTD | OFF_EN | OFF_PD | OFF_IN | M7)},		/* csi21_dy4 */
 920-	{CSI22_DX0, (IEN | M0)},					/* csi22_dx0 */
 921-	{CSI22_DY0, (IEN | M0)},					/* csi22_dy0 */
 922-	{CSI22_DX1, (IEN | M0)},					/* csi22_dx1 */
 923-	{CSI22_DY1, (IEN | M0)},					/* csi22_dy1 */
 924-	{CAM_SHUTTER, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)},		/* cam_shutter */
 925-	{CAM_STROBE, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)},		/* cam_strobe */
 926-	{CAM_GLOBALRESET, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)},	/* gpio_83 */
 927-	{USBB1_ULPITLL_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M4)},/* usbb1_ulpiphy_clk */
 928-	{USBB1_ULPITLL_STP, (OFF_EN | OFF_OUT_PTD | M4)},		/* usbb1_ulpiphy_stp */
 929-	{USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dir */
 930-	{USBB1_ULPITLL_NXT, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_nxt */
 931-	{USBB1_ULPITLL_DAT0, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat0 */
 932-	{USBB1_ULPITLL_DAT1, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat1 */
 933-	{USBB1_ULPITLL_DAT2, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat2 */
 934-	{USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat3 */
 935-	{USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat4 */
 936-	{USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat5 */
 937-	{USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat6 */
 938-	{USBB1_ULPITLL_DAT7, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)},	/* usbb1_ulpiphy_dat7 */
 939-	{USBB1_HSIC_DATA, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* usbb1_hsic_data */
 940-	{USBB1_HSIC_STROBE, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* usbb1_hsic_strobe */
 941-	{USBC1_ICUSB_DP, (IEN | M0)},					/* usbc1_icusb_dp */
 942-	{USBC1_ICUSB_DM, (IEN | M0)},					/* usbc1_icusb_dm */
 943-	{SDMMC1_CLK, (PTU | OFF_EN | OFF_OUT_PTD | M0)},		/* sdmmc1_clk */
 944-	{SDMMC1_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc1_cmd */
 945-	{SDMMC1_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc1_dat0 */
 946-	{SDMMC1_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc1_dat1 */
 947-	{SDMMC1_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc1_dat2 */
 948-	{SDMMC1_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc1_dat3 */
 949-	{SDMMC1_DAT4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc1_dat4 */
 950-	{SDMMC1_DAT5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc1_dat5 */
 951-	{SDMMC1_DAT6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc1_dat6 */
 952-	{SDMMC1_DAT7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc1_dat7 */
 953-	{ABE_MCBSP2_CLKX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_mcbsp2_clkx */
 954-	{ABE_MCBSP2_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)},		/* abe_mcbsp2_dr */
 955-	{ABE_MCBSP2_DX, (OFF_EN | OFF_OUT_PTD | M0)},			/* abe_mcbsp2_dx */
 956-	{ABE_MCBSP2_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_mcbsp2_fsx */
 957-	{ABE_MCBSP1_CLKX, (IEN | M1)},					/* abe_slimbus1_clock */
 958-	{ABE_MCBSP1_DR, (IEN | M1)},					/* abe_slimbus1_data */
 959-	{ABE_MCBSP1_DX, (OFF_EN | OFF_OUT_PTD | M0)},			/* abe_mcbsp1_dx */
 960-	{ABE_MCBSP1_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_mcbsp1_fsx */
 961-	{ABE_PDM_UL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_pdm_ul_data */
 962-	{ABE_PDM_DL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_pdm_dl_data */
 963-	{ABE_PDM_FRAME, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_pdm_frame */
 964-	{ABE_PDM_LB_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_pdm_lb_clk */
 965-	{ABE_CLKS, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* abe_clks */
 966-	{ABE_DMIC_CLK1, (M0)},						/* abe_dmic_clk1 */
 967-	{ABE_DMIC_DIN1, (IEN | M0)},					/* abe_dmic_din1 */
 968-	{ABE_DMIC_DIN2, (IEN | M0)},					/* abe_dmic_din2 */
 969-	{ABE_DMIC_DIN3, (IEN | M0)},					/* abe_dmic_din3 */
 970-	{UART2_CTS, (PTU | IEN | M0)},					/* uart2_cts */
 971-	{UART2_RTS, (M0)},						/* uart2_rts */
 972-	{UART2_RX, (PTU | IEN | M0)},					/* uart2_rx */
 973-	{UART2_TX, (M0)},						/* uart2_tx */
 974-	{HDQ_SIO, (M3)},						/* gpio_127 */
 975-	{I2C1_SCL, (PTU | IEN | M0)},					/* i2c1_scl */
 976-	{I2C1_SDA, (PTU | IEN | M0)},					/* i2c1_sda */
 977-	{I2C2_SCL, (PTU | IEN | M0)},					/* i2c2_scl */
 978-	{I2C2_SDA, (PTU | IEN | M0)},					/* i2c2_sda */
 979-	{I2C3_SCL, (PTU | IEN | M0)},					/* i2c3_scl */
 980-	{I2C3_SDA, (PTU | IEN | M0)},					/* i2c3_sda */
 981-	{I2C4_SCL, (PTU | IEN | M0)},					/* i2c4_scl */
 982-	{I2C4_SDA, (PTU | IEN | M0)},					/* i2c4_sda */
 983-	{MCSPI1_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi1_clk */
 984-	{MCSPI1_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi1_somi */
 985-	{MCSPI1_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi1_simo */
 986-	{MCSPI1_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* mcspi1_cs0 */
 987-	{MCSPI1_CS1, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M3)},	/* mcspi1_cs1 */
 988-	{MCSPI1_CS2, (PTU | OFF_EN | OFF_OUT_PTU | M3)},		/* gpio_139 */
 989-	{MCSPI1_CS3, (PTU | IEN | M3)},					/* gpio_140 */
 990-	{UART3_CTS_RCTX, (PTU | IEN | M0)},				/* uart3_tx */
 991-	{UART3_RTS_SD, (M0)},						/* uart3_rts_sd */
 992-	{UART3_RX_IRRX, (IEN | M0)},					/* uart3_rx */
 993-	{UART3_TX_IRTX, (M0)},						/* uart3_tx */
 994-	{SDMMC5_CLK, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M0)},		/* sdmmc5_clk */
 995-	{SDMMC5_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc5_cmd */
 996-	{SDMMC5_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc5_dat0 */
 997-	{SDMMC5_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc5_dat1 */
 998-	{SDMMC5_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc5_dat2 */
 999-	{SDMMC5_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* sdmmc5_dat3 */
1000-	{MCSPI4_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi4_clk */
1001-	{MCSPI4_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi4_simo */
1002-	{MCSPI4_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* mcspi4_somi */
1003-	{MCSPI4_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)},	/* mcspi4_cs0 */
1004-	{UART4_RX, (IEN | M0)},						/* uart4_rx */
1005-	{UART4_TX, (M0)},						/* uart4_tx */
1006-	{USBB2_ULPITLL_CLK, (IEN | M3)},				/* gpio_157 */
1007-	{USBB2_ULPITLL_STP, (IEN | M5)},				/* dispc2_data23 */
1008-	{USBB2_ULPITLL_DIR, (IEN | M5)},				/* dispc2_data22 */
1009-	{USBB2_ULPITLL_NXT, (IEN | M5)},				/* dispc2_data21 */
1010-	{USBB2_ULPITLL_DAT0, (IEN | M5)},				/* dispc2_data20 */
1011-	{USBB2_ULPITLL_DAT1, (IEN | M5)},				/* dispc2_data19 */
1012-	{USBB2_ULPITLL_DAT2, (IEN | M5)},				/* dispc2_data18 *…

Large files files are truncated, but you can click here to view the full file