/drivers/scsi/mpt2sas/mpt2sas_base.c

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2013 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/kernel.h>
  43. #include <linux/module.h>
  44. #include <linux/errno.h>
  45. #include <linux/init.h>
  46. #include <linux/slab.h>
  47. #include <linux/types.h>
  48. #include <linux/pci.h>
  49. #include <linux/kdev_t.h>
  50. #include <linux/blkdev.h>
  51. #include <linux/delay.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/dma-mapping.h>
  54. #include <linux/sort.h>
  55. #include <linux/io.h>
  56. #include <linux/time.h>
  57. #include <linux/kthread.h>
  58. #include <linux/aer.h>
  59. #include "mpt2sas_base.h"
  60. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  61. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  62. #define MAX_HBA_QUEUE_DEPTH 30000
  63. #define MAX_CHAIN_DEPTH 100000
  64. static int max_queue_depth = -1;
  65. module_param(max_queue_depth, int, 0);
  66. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  67. static int max_sgl_entries = -1;
  68. module_param(max_sgl_entries, int, 0);
  69. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  70. static int msix_disable = -1;
  71. module_param(msix_disable, int, 0);
  72. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  73. static int mpt2sas_fwfault_debug;
  74. MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
  75. "and halt firmware - (default=0)");
  76. static int disable_discovery = -1;
  77. module_param(disable_discovery, int, 0);
  78. MODULE_PARM_DESC(disable_discovery, " disable discovery ");
  79. /**
  80. * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
  81. *
  82. */
  83. static int
  84. _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
  85. {
  86. int ret = param_set_int(val, kp);
  87. struct MPT2SAS_ADAPTER *ioc;
  88. if (ret)
  89. return ret;
  90. printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
  91. list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
  92. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  93. return 0;
  94. }
  95. module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
  96. param_get_int, &mpt2sas_fwfault_debug, 0644);
  97. /**
  98. * mpt2sas_remove_dead_ioc_func - kthread context to remove dead ioc
  99. * @arg: input argument, used to derive ioc
  100. *
  101. * Return 0 if controller is removed from pci subsystem.
  102. * Return -1 for other case.
  103. */
  104. static int mpt2sas_remove_dead_ioc_func(void *arg)
  105. {
  106. struct MPT2SAS_ADAPTER *ioc = (struct MPT2SAS_ADAPTER *)arg;
  107. struct pci_dev *pdev;
  108. if ((ioc == NULL))
  109. return -1;
  110. pdev = ioc->pdev;
  111. if ((pdev == NULL))
  112. return -1;
  113. pci_stop_and_remove_bus_device(pdev);
  114. return 0;
  115. }
  116. /**
  117. * _base_fault_reset_work - workq handling ioc fault conditions
  118. * @work: input argument, used to derive ioc
  119. * Context: sleep.
  120. *
  121. * Return nothing.
  122. */
  123. static void
  124. _base_fault_reset_work(struct work_struct *work)
  125. {
  126. struct MPT2SAS_ADAPTER *ioc =
  127. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  128. unsigned long flags;
  129. u32 doorbell;
  130. int rc;
  131. struct task_struct *p;
  132. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  133. if (ioc->shost_recovery || ioc->pci_error_recovery)
  134. goto rearm_timer;
  135. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  136. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  137. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
  138. printk(MPT2SAS_INFO_FMT "%s : SAS host is non-operational !!!!\n",
  139. ioc->name, __func__);
  140. /* It may be possible that EEH recovery can resolve some of
  141. * pci bus failure issues rather removing the dead ioc function
  142. * by considering controller is in a non-operational state. So
  143. * here priority is given to the EEH recovery. If it doesn't
  144. * not resolve this issue, mpt2sas driver will consider this
  145. * controller to non-operational state and remove the dead ioc
  146. * function.
  147. */
  148. if (ioc->non_operational_loop++ < 5) {
  149. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock,
  150. flags);
  151. goto rearm_timer;
  152. }
  153. /*
  154. * Call _scsih_flush_pending_cmds callback so that we flush all
  155. * pending commands back to OS. This call is required to aovid
  156. * deadlock at block layer. Dead IOC will fail to do diag reset,
  157. * and this call is safe since dead ioc will never return any
  158. * command back from HW.
  159. */
  160. ioc->schedule_dead_ioc_flush_running_cmds(ioc);
  161. /*
  162. * Set remove_host flag early since kernel thread will
  163. * take some time to execute.
  164. */
  165. ioc->remove_host = 1;
  166. /*Remove the Dead Host */
  167. p = kthread_run(mpt2sas_remove_dead_ioc_func, ioc,
  168. "mpt2sas_dead_ioc_%d", ioc->id);
  169. if (IS_ERR(p)) {
  170. printk(MPT2SAS_ERR_FMT
  171. "%s: Running mpt2sas_dead_ioc thread failed !!!!\n",
  172. ioc->name, __func__);
  173. } else {
  174. printk(MPT2SAS_ERR_FMT
  175. "%s: Running mpt2sas_dead_ioc thread success !!!!\n",
  176. ioc->name, __func__);
  177. }
  178. return; /* don't rearm timer */
  179. }
  180. ioc->non_operational_loop = 0;
  181. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  182. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  183. FORCE_BIG_HAMMER);
  184. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  185. __func__, (rc == 0) ? "success" : "failed");
  186. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  187. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  188. mpt2sas_base_fault_info(ioc, doorbell &
  189. MPI2_DOORBELL_DATA_MASK);
  190. }
  191. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  192. rearm_timer:
  193. if (ioc->fault_reset_work_q)
  194. queue_delayed_work(ioc->fault_reset_work_q,
  195. &ioc->fault_reset_work,
  196. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  197. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  198. }
  199. /**
  200. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  201. * @ioc: per adapter object
  202. * Context: sleep.
  203. *
  204. * Return nothing.
  205. */
  206. void
  207. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  208. {
  209. unsigned long flags;
  210. if (ioc->fault_reset_work_q)
  211. return;
  212. /* initialize fault polling */
  213. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  214. snprintf(ioc->fault_reset_work_q_name,
  215. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  216. ioc->fault_reset_work_q =
  217. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  218. if (!ioc->fault_reset_work_q) {
  219. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  220. ioc->name, __func__, __LINE__);
  221. return;
  222. }
  223. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  224. if (ioc->fault_reset_work_q)
  225. queue_delayed_work(ioc->fault_reset_work_q,
  226. &ioc->fault_reset_work,
  227. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  228. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  229. }
  230. /**
  231. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  232. * @ioc: per adapter object
  233. * Context: sleep.
  234. *
  235. * Return nothing.
  236. */
  237. void
  238. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  239. {
  240. unsigned long flags;
  241. struct workqueue_struct *wq;
  242. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  243. wq = ioc->fault_reset_work_q;
  244. ioc->fault_reset_work_q = NULL;
  245. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  246. if (wq) {
  247. if (!cancel_delayed_work(&ioc->fault_reset_work))
  248. flush_workqueue(wq);
  249. destroy_workqueue(wq);
  250. }
  251. }
  252. /**
  253. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  254. * @ioc: per adapter object
  255. * @fault_code: fault code
  256. *
  257. * Return nothing.
  258. */
  259. void
  260. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  261. {
  262. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  263. ioc->name, fault_code);
  264. }
  265. /**
  266. * mpt2sas_halt_firmware - halt's mpt controller firmware
  267. * @ioc: per adapter object
  268. *
  269. * For debugging timeout related issues. Writing 0xCOFFEE00
  270. * to the doorbell register will halt controller firmware. With
  271. * the purpose to stop both driver and firmware, the enduser can
  272. * obtain a ring buffer from controller UART.
  273. */
  274. void
  275. mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
  276. {
  277. u32 doorbell;
  278. if (!ioc->fwfault_debug)
  279. return;
  280. dump_stack();
  281. doorbell = readl(&ioc->chip->Doorbell);
  282. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  283. mpt2sas_base_fault_info(ioc , doorbell);
  284. else {
  285. writel(0xC0FFEE00, &ioc->chip->Doorbell);
  286. printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
  287. "timeout\n", ioc->name);
  288. }
  289. panic("panic in %s\n", __func__);
  290. }
  291. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  292. /**
  293. * _base_sas_ioc_info - verbose translation of the ioc status
  294. * @ioc: per adapter object
  295. * @mpi_reply: reply mf payload returned from firmware
  296. * @request_hdr: request mf
  297. *
  298. * Return nothing.
  299. */
  300. static void
  301. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  302. MPI2RequestHeader_t *request_hdr)
  303. {
  304. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  305. MPI2_IOCSTATUS_MASK;
  306. char *desc = NULL;
  307. u16 frame_sz;
  308. char *func_str = NULL;
  309. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  310. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  311. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  312. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  313. return;
  314. if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
  315. return;
  316. switch (ioc_status) {
  317. /****************************************************************************
  318. * Common IOCStatus values for all replies
  319. ****************************************************************************/
  320. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  321. desc = "invalid function";
  322. break;
  323. case MPI2_IOCSTATUS_BUSY:
  324. desc = "busy";
  325. break;
  326. case MPI2_IOCSTATUS_INVALID_SGL:
  327. desc = "invalid sgl";
  328. break;
  329. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  330. desc = "internal error";
  331. break;
  332. case MPI2_IOCSTATUS_INVALID_VPID:
  333. desc = "invalid vpid";
  334. break;
  335. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  336. desc = "insufficient resources";
  337. break;
  338. case MPI2_IOCSTATUS_INVALID_FIELD:
  339. desc = "invalid field";
  340. break;
  341. case MPI2_IOCSTATUS_INVALID_STATE:
  342. desc = "invalid state";
  343. break;
  344. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  345. desc = "op state not supported";
  346. break;
  347. /****************************************************************************
  348. * Config IOCStatus values
  349. ****************************************************************************/
  350. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  351. desc = "config invalid action";
  352. break;
  353. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  354. desc = "config invalid type";
  355. break;
  356. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  357. desc = "config invalid page";
  358. break;
  359. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  360. desc = "config invalid data";
  361. break;
  362. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  363. desc = "config no defaults";
  364. break;
  365. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  366. desc = "config cant commit";
  367. break;
  368. /****************************************************************************
  369. * SCSI IO Reply
  370. ****************************************************************************/
  371. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  372. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  373. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  374. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  375. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  376. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  377. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  378. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  379. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  380. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  381. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  382. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  383. break;
  384. /****************************************************************************
  385. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  386. ****************************************************************************/
  387. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  388. desc = "eedp guard error";
  389. break;
  390. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  391. desc = "eedp ref tag error";
  392. break;
  393. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  394. desc = "eedp app tag error";
  395. break;
  396. /****************************************************************************
  397. * SCSI Target values
  398. ****************************************************************************/
  399. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  400. desc = "target invalid io index";
  401. break;
  402. case MPI2_IOCSTATUS_TARGET_ABORTED:
  403. desc = "target aborted";
  404. break;
  405. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  406. desc = "target no conn retryable";
  407. break;
  408. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  409. desc = "target no connection";
  410. break;
  411. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  412. desc = "target xfer count mismatch";
  413. break;
  414. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  415. desc = "target data offset error";
  416. break;
  417. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  418. desc = "target too much write data";
  419. break;
  420. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  421. desc = "target iu too short";
  422. break;
  423. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  424. desc = "target ack nak timeout";
  425. break;
  426. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  427. desc = "target nak received";
  428. break;
  429. /****************************************************************************
  430. * Serial Attached SCSI values
  431. ****************************************************************************/
  432. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  433. desc = "smp request failed";
  434. break;
  435. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  436. desc = "smp data overrun";
  437. break;
  438. /****************************************************************************
  439. * Diagnostic Buffer Post / Diagnostic Release values
  440. ****************************************************************************/
  441. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  442. desc = "diagnostic released";
  443. break;
  444. default:
  445. break;
  446. }
  447. if (!desc)
  448. return;
  449. switch (request_hdr->Function) {
  450. case MPI2_FUNCTION_CONFIG:
  451. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  452. func_str = "config_page";
  453. break;
  454. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  455. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  456. func_str = "task_mgmt";
  457. break;
  458. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  459. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  460. func_str = "sas_iounit_ctl";
  461. break;
  462. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  463. frame_sz = sizeof(Mpi2SepRequest_t);
  464. func_str = "enclosure";
  465. break;
  466. case MPI2_FUNCTION_IOC_INIT:
  467. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  468. func_str = "ioc_init";
  469. break;
  470. case MPI2_FUNCTION_PORT_ENABLE:
  471. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  472. func_str = "port_enable";
  473. break;
  474. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  475. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  476. func_str = "smp_passthru";
  477. break;
  478. default:
  479. frame_sz = 32;
  480. func_str = "unknown";
  481. break;
  482. }
  483. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  484. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  485. _debug_dump_mf(request_hdr, frame_sz/4);
  486. }
  487. /**
  488. * _base_display_event_data - verbose translation of firmware asyn events
  489. * @ioc: per adapter object
  490. * @mpi_reply: reply mf payload returned from firmware
  491. *
  492. * Return nothing.
  493. */
  494. static void
  495. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  496. Mpi2EventNotificationReply_t *mpi_reply)
  497. {
  498. char *desc = NULL;
  499. u16 event;
  500. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  501. return;
  502. event = le16_to_cpu(mpi_reply->Event);
  503. switch (event) {
  504. case MPI2_EVENT_LOG_DATA:
  505. desc = "Log Data";
  506. break;
  507. case MPI2_EVENT_STATE_CHANGE:
  508. desc = "Status Change";
  509. break;
  510. case MPI2_EVENT_HARD_RESET_RECEIVED:
  511. desc = "Hard Reset Received";
  512. break;
  513. case MPI2_EVENT_EVENT_CHANGE:
  514. desc = "Event Change";
  515. break;
  516. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  517. desc = "Device Status Change";
  518. break;
  519. case MPI2_EVENT_IR_OPERATION_STATUS:
  520. if (!ioc->hide_ir_msg)
  521. desc = "IR Operation Status";
  522. break;
  523. case MPI2_EVENT_SAS_DISCOVERY:
  524. {
  525. Mpi2EventDataSasDiscovery_t *event_data =
  526. (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
  527. printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
  528. (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
  529. "start" : "stop");
  530. if (event_data->DiscoveryStatus)
  531. printk("discovery_status(0x%08x)",
  532. le32_to_cpu(event_data->DiscoveryStatus));
  533. printk("\n");
  534. return;
  535. }
  536. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  537. desc = "SAS Broadcast Primitive";
  538. break;
  539. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  540. desc = "SAS Init Device Status Change";
  541. break;
  542. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  543. desc = "SAS Init Table Overflow";
  544. break;
  545. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  546. desc = "SAS Topology Change List";
  547. break;
  548. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  549. desc = "SAS Enclosure Device Status Change";
  550. break;
  551. case MPI2_EVENT_IR_VOLUME:
  552. if (!ioc->hide_ir_msg)
  553. desc = "IR Volume";
  554. break;
  555. case MPI2_EVENT_IR_PHYSICAL_DISK:
  556. if (!ioc->hide_ir_msg)
  557. desc = "IR Physical Disk";
  558. break;
  559. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  560. if (!ioc->hide_ir_msg)
  561. desc = "IR Configuration Change List";
  562. break;
  563. case MPI2_EVENT_LOG_ENTRY_ADDED:
  564. if (!ioc->hide_ir_msg)
  565. desc = "Log Entry Added";
  566. break;
  567. }
  568. if (!desc)
  569. return;
  570. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  571. }
  572. #endif
  573. /**
  574. * _base_sas_log_info - verbose translation of firmware log info
  575. * @ioc: per adapter object
  576. * @log_info: log info
  577. *
  578. * Return nothing.
  579. */
  580. static void
  581. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  582. {
  583. union loginfo_type {
  584. u32 loginfo;
  585. struct {
  586. u32 subcode:16;
  587. u32 code:8;
  588. u32 originator:4;
  589. u32 bus_type:4;
  590. } dw;
  591. };
  592. union loginfo_type sas_loginfo;
  593. char *originator_str = NULL;
  594. sas_loginfo.loginfo = log_info;
  595. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  596. return;
  597. /* each nexus loss loginfo */
  598. if (log_info == 0x31170000)
  599. return;
  600. /* eat the loginfos associated with task aborts */
  601. if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info ==
  602. 0x31140000 || log_info == 0x31130000))
  603. return;
  604. switch (sas_loginfo.dw.originator) {
  605. case 0:
  606. originator_str = "IOP";
  607. break;
  608. case 1:
  609. originator_str = "PL";
  610. break;
  611. case 2:
  612. if (!ioc->hide_ir_msg)
  613. originator_str = "IR";
  614. else
  615. originator_str = "WarpDrive";
  616. break;
  617. }
  618. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  619. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  620. originator_str, sas_loginfo.dw.code,
  621. sas_loginfo.dw.subcode);
  622. }
  623. /**
  624. * _base_display_reply_info -
  625. * @ioc: per adapter object
  626. * @smid: system request message index
  627. * @msix_index: MSIX table index supplied by the OS
  628. * @reply: reply message frame(lower 32bit addr)
  629. *
  630. * Return nothing.
  631. */
  632. static void
  633. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  634. u32 reply)
  635. {
  636. MPI2DefaultReply_t *mpi_reply;
  637. u16 ioc_status;
  638. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  639. if (unlikely(!mpi_reply)) {
  640. printk(MPT2SAS_ERR_FMT "mpi_reply not valid at %s:%d/%s()!\n",
  641. ioc->name, __FILE__, __LINE__, __func__);
  642. return;
  643. }
  644. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  645. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  646. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  647. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  648. _base_sas_ioc_info(ioc , mpi_reply,
  649. mpt2sas_base_get_msg_frame(ioc, smid));
  650. }
  651. #endif
  652. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  653. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  654. }
  655. /**
  656. * mpt2sas_base_done - base internal command completion routine
  657. * @ioc: per adapter object
  658. * @smid: system request message index
  659. * @msix_index: MSIX table index supplied by the OS
  660. * @reply: reply message frame(lower 32bit addr)
  661. *
  662. * Return 1 meaning mf should be freed from _base_interrupt
  663. * 0 means the mf is freed from this function.
  664. */
  665. u8
  666. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  667. u32 reply)
  668. {
  669. MPI2DefaultReply_t *mpi_reply;
  670. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  671. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  672. return 1;
  673. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  674. return 1;
  675. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  676. if (mpi_reply) {
  677. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  678. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  679. }
  680. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  681. complete(&ioc->base_cmds.done);
  682. return 1;
  683. }
  684. /**
  685. * _base_async_event - main callback handler for firmware asyn events
  686. * @ioc: per adapter object
  687. * @msix_index: MSIX table index supplied by the OS
  688. * @reply: reply message frame(lower 32bit addr)
  689. *
  690. * Returns void.
  691. */
  692. static void
  693. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  694. {
  695. Mpi2EventNotificationReply_t *mpi_reply;
  696. Mpi2EventAckRequest_t *ack_request;
  697. u16 smid;
  698. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  699. if (!mpi_reply)
  700. return;
  701. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  702. return;
  703. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  704. _base_display_event_data(ioc, mpi_reply);
  705. #endif
  706. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  707. goto out;
  708. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  709. if (!smid) {
  710. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  711. ioc->name, __func__);
  712. goto out;
  713. }
  714. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  715. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  716. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  717. ack_request->Event = mpi_reply->Event;
  718. ack_request->EventContext = mpi_reply->EventContext;
  719. ack_request->VF_ID = 0; /* TODO */
  720. ack_request->VP_ID = 0;
  721. mpt2sas_base_put_smid_default(ioc, smid);
  722. out:
  723. /* scsih callback handler */
  724. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  725. /* ctl callback handler */
  726. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  727. return;
  728. }
  729. /**
  730. * _base_get_cb_idx - obtain the callback index
  731. * @ioc: per adapter object
  732. * @smid: system request message index
  733. *
  734. * Return callback index.
  735. */
  736. static u8
  737. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  738. {
  739. int i;
  740. u8 cb_idx;
  741. if (smid < ioc->hi_priority_smid) {
  742. i = smid - 1;
  743. cb_idx = ioc->scsi_lookup[i].cb_idx;
  744. } else if (smid < ioc->internal_smid) {
  745. i = smid - ioc->hi_priority_smid;
  746. cb_idx = ioc->hpr_lookup[i].cb_idx;
  747. } else if (smid <= ioc->hba_queue_depth) {
  748. i = smid - ioc->internal_smid;
  749. cb_idx = ioc->internal_lookup[i].cb_idx;
  750. } else
  751. cb_idx = 0xFF;
  752. return cb_idx;
  753. }
  754. /**
  755. * _base_mask_interrupts - disable interrupts
  756. * @ioc: per adapter object
  757. *
  758. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  759. *
  760. * Return nothing.
  761. */
  762. static void
  763. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  764. {
  765. u32 him_register;
  766. ioc->mask_interrupts = 1;
  767. him_register = readl(&ioc->chip->HostInterruptMask);
  768. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  769. writel(him_register, &ioc->chip->HostInterruptMask);
  770. readl(&ioc->chip->HostInterruptMask);
  771. }
  772. /**
  773. * _base_unmask_interrupts - enable interrupts
  774. * @ioc: per adapter object
  775. *
  776. * Enabling only Reply Interrupts
  777. *
  778. * Return nothing.
  779. */
  780. static void
  781. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  782. {
  783. u32 him_register;
  784. him_register = readl(&ioc->chip->HostInterruptMask);
  785. him_register &= ~MPI2_HIM_RIM;
  786. writel(him_register, &ioc->chip->HostInterruptMask);
  787. ioc->mask_interrupts = 0;
  788. }
  789. union reply_descriptor {
  790. u64 word;
  791. struct {
  792. u32 low;
  793. u32 high;
  794. } u;
  795. };
  796. /**
  797. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  798. * @irq: irq number (not used)
  799. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  800. * @r: pt_regs pointer (not used)
  801. *
  802. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  803. */
  804. static irqreturn_t
  805. _base_interrupt(int irq, void *bus_id)
  806. {
  807. struct adapter_reply_queue *reply_q = bus_id;
  808. union reply_descriptor rd;
  809. u32 completed_cmds;
  810. u8 request_desript_type;
  811. u16 smid;
  812. u8 cb_idx;
  813. u32 reply;
  814. u8 msix_index = reply_q->msix_index;
  815. struct MPT2SAS_ADAPTER *ioc = reply_q->ioc;
  816. Mpi2ReplyDescriptorsUnion_t *rpf;
  817. u8 rc;
  818. if (ioc->mask_interrupts)
  819. return IRQ_NONE;
  820. if (!atomic_add_unless(&reply_q->busy, 1, 1))
  821. return IRQ_NONE;
  822. rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
  823. request_desript_type = rpf->Default.ReplyFlags
  824. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  825. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
  826. atomic_dec(&reply_q->busy);
  827. return IRQ_NONE;
  828. }
  829. completed_cmds = 0;
  830. cb_idx = 0xFF;
  831. do {
  832. rd.word = le64_to_cpu(rpf->Words);
  833. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  834. goto out;
  835. reply = 0;
  836. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  837. if (request_desript_type ==
  838. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  839. reply = le32_to_cpu
  840. (rpf->AddressReply.ReplyFrameAddress);
  841. if (reply > ioc->reply_dma_max_address ||
  842. reply < ioc->reply_dma_min_address)
  843. reply = 0;
  844. } else if (request_desript_type ==
  845. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  846. goto next;
  847. else if (request_desript_type ==
  848. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  849. goto next;
  850. if (smid) {
  851. cb_idx = _base_get_cb_idx(ioc, smid);
  852. if ((likely(cb_idx < MPT_MAX_CALLBACKS))
  853. && (likely(mpt_callbacks[cb_idx] != NULL))) {
  854. rc = mpt_callbacks[cb_idx](ioc, smid,
  855. msix_index, reply);
  856. if (reply)
  857. _base_display_reply_info(ioc, smid,
  858. msix_index, reply);
  859. if (rc)
  860. mpt2sas_base_free_smid(ioc, smid);
  861. }
  862. }
  863. if (!smid)
  864. _base_async_event(ioc, msix_index, reply);
  865. /* reply free queue handling */
  866. if (reply) {
  867. ioc->reply_free_host_index =
  868. (ioc->reply_free_host_index ==
  869. (ioc->reply_free_queue_depth - 1)) ?
  870. 0 : ioc->reply_free_host_index + 1;
  871. ioc->reply_free[ioc->reply_free_host_index] =
  872. cpu_to_le32(reply);
  873. wmb();
  874. writel(ioc->reply_free_host_index,
  875. &ioc->chip->ReplyFreeHostIndex);
  876. }
  877. next:
  878. rpf->Words = cpu_to_le64(ULLONG_MAX);
  879. reply_q->reply_post_host_index =
  880. (reply_q->reply_post_host_index ==
  881. (ioc->reply_post_queue_depth - 1)) ? 0 :
  882. reply_q->reply_post_host_index + 1;
  883. request_desript_type =
  884. reply_q->reply_post_free[reply_q->reply_post_host_index].
  885. Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  886. completed_cmds++;
  887. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  888. goto out;
  889. if (!reply_q->reply_post_host_index)
  890. rpf = reply_q->reply_post_free;
  891. else
  892. rpf++;
  893. } while (1);
  894. out:
  895. if (!completed_cmds) {
  896. atomic_dec(&reply_q->busy);
  897. return IRQ_NONE;
  898. }
  899. wmb();
  900. if (ioc->is_warpdrive) {
  901. writel(reply_q->reply_post_host_index,
  902. ioc->reply_post_host_index[msix_index]);
  903. atomic_dec(&reply_q->busy);
  904. return IRQ_HANDLED;
  905. }
  906. writel(reply_q->reply_post_host_index | (msix_index <<
  907. MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex);
  908. atomic_dec(&reply_q->busy);
  909. return IRQ_HANDLED;
  910. }
  911. /**
  912. * _base_is_controller_msix_enabled - is controller support muli-reply queues
  913. * @ioc: per adapter object
  914. *
  915. */
  916. static inline int
  917. _base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc)
  918. {
  919. return (ioc->facts.IOCCapabilities &
  920. MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
  921. }
  922. /**
  923. * mpt2sas_base_flush_reply_queues - flushing the MSIX reply queues
  924. * @ioc: per adapter object
  925. * Context: ISR conext
  926. *
  927. * Called when a Task Management request has completed. We want
  928. * to flush the other reply queues so all the outstanding IO has been
  929. * completed back to OS before we process the TM completetion.
  930. *
  931. * Return nothing.
  932. */
  933. void
  934. mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  935. {
  936. struct adapter_reply_queue *reply_q;
  937. /* If MSIX capability is turned off
  938. * then multi-queues are not enabled
  939. */
  940. if (!_base_is_controller_msix_enabled(ioc))
  941. return;
  942. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  943. if (ioc->shost_recovery)
  944. return;
  945. /* TMs are on msix_index == 0 */
  946. if (reply_q->msix_index == 0)
  947. continue;
  948. _base_interrupt(reply_q->vector, (void *)reply_q);
  949. }
  950. }
  951. /**
  952. * mpt2sas_base_release_callback_handler - clear interrupt callback handler
  953. * @cb_idx: callback index
  954. *
  955. * Return nothing.
  956. */
  957. void
  958. mpt2sas_base_release_callback_handler(u8 cb_idx)
  959. {
  960. mpt_callbacks[cb_idx] = NULL;
  961. }
  962. /**
  963. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  964. * @cb_func: callback function
  965. *
  966. * Returns cb_func.
  967. */
  968. u8
  969. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  970. {
  971. u8 cb_idx;
  972. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  973. if (mpt_callbacks[cb_idx] == NULL)
  974. break;
  975. mpt_callbacks[cb_idx] = cb_func;
  976. return cb_idx;
  977. }
  978. /**
  979. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  980. *
  981. * Return nothing.
  982. */
  983. void
  984. mpt2sas_base_initialize_callback_handler(void)
  985. {
  986. u8 cb_idx;
  987. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  988. mpt2sas_base_release_callback_handler(cb_idx);
  989. }
  990. /**
  991. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  992. * @ioc: per adapter object
  993. * @paddr: virtual address for SGE
  994. *
  995. * Create a zero length scatter gather entry to insure the IOCs hardware has
  996. * something to use if the target device goes brain dead and tries
  997. * to send data even when none is asked for.
  998. *
  999. * Return nothing.
  1000. */
  1001. void
  1002. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  1003. {
  1004. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  1005. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  1006. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  1007. MPI2_SGE_FLAGS_SHIFT);
  1008. ioc->base_add_sg_single(paddr, flags_length, -1);
  1009. }
  1010. /**
  1011. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  1012. * @paddr: virtual address for SGE
  1013. * @flags_length: SGE flags and data transfer length
  1014. * @dma_addr: Physical address
  1015. *
  1016. * Return nothing.
  1017. */
  1018. static void
  1019. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1020. {
  1021. Mpi2SGESimple32_t *sgel = paddr;
  1022. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  1023. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1024. sgel->FlagsLength = cpu_to_le32(flags_length);
  1025. sgel->Address = cpu_to_le32(dma_addr);
  1026. }
  1027. /**
  1028. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  1029. * @paddr: virtual address for SGE
  1030. * @flags_length: SGE flags and data transfer length
  1031. * @dma_addr: Physical address
  1032. *
  1033. * Return nothing.
  1034. */
  1035. static void
  1036. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1037. {
  1038. Mpi2SGESimple64_t *sgel = paddr;
  1039. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  1040. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1041. sgel->FlagsLength = cpu_to_le32(flags_length);
  1042. sgel->Address = cpu_to_le64(dma_addr);
  1043. }
  1044. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  1045. /**
  1046. * _base_config_dma_addressing - set dma addressing
  1047. * @ioc: per adapter object
  1048. * @pdev: PCI device struct
  1049. *
  1050. * Returns 0 for success, non-zero for failure.
  1051. */
  1052. static int
  1053. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  1054. {
  1055. struct sysinfo s;
  1056. char *desc = NULL;
  1057. if (sizeof(dma_addr_t) > 4) {
  1058. const uint64_t required_mask =
  1059. dma_get_required_mask(&pdev->dev);
  1060. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  1061. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  1062. DMA_BIT_MASK(64))) {
  1063. ioc->base_add_sg_single = &_base_add_sg_single_64;
  1064. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  1065. desc = "64";
  1066. goto out;
  1067. }
  1068. }
  1069. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  1070. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  1071. ioc->base_add_sg_single = &_base_add_sg_single_32;
  1072. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  1073. desc = "32";
  1074. } else
  1075. return -ENODEV;
  1076. out:
  1077. si_meminfo(&s);
  1078. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  1079. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  1080. return 0;
  1081. }
  1082. /**
  1083. * _base_check_enable_msix - checks MSIX capabable.
  1084. * @ioc: per adapter object
  1085. *
  1086. * Check to see if card is capable of MSIX, and set number
  1087. * of available msix vectors
  1088. */
  1089. static int
  1090. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1091. {
  1092. int base;
  1093. u16 message_control;
  1094. /* Check whether controller SAS2008 B0 controller,
  1095. if it is SAS2008 B0 controller use IO-APIC instead of MSIX */
  1096. if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 &&
  1097. ioc->pdev->revision == 0x01) {
  1098. return -EINVAL;
  1099. }
  1100. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  1101. if (!base) {
  1102. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  1103. "supported\n", ioc->name));
  1104. return -EINVAL;
  1105. }
  1106. /* get msix vector count */
  1107. /* NUMA_IO not supported for older controllers */
  1108. if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
  1109. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
  1110. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
  1111. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
  1112. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
  1113. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
  1114. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
  1115. ioc->msix_vector_count = 1;
  1116. else {
  1117. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  1118. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  1119. }
  1120. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  1121. "vector_count(%d)\n", ioc->name, ioc->msix_vector_count));
  1122. return 0;
  1123. }
  1124. /**
  1125. * _base_free_irq - free irq
  1126. * @ioc: per adapter object
  1127. *
  1128. * Freeing respective reply_queue from the list.
  1129. */
  1130. static void
  1131. _base_free_irq(struct MPT2SAS_ADAPTER *ioc)
  1132. {
  1133. struct adapter_reply_queue *reply_q, *next;
  1134. if (list_empty(&ioc->reply_queue_list))
  1135. return;
  1136. list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
  1137. list_del(&reply_q->list);
  1138. synchronize_irq(reply_q->vector);
  1139. free_irq(reply_q->vector, reply_q);
  1140. kfree(reply_q);
  1141. }
  1142. }
  1143. /**
  1144. * _base_request_irq - request irq
  1145. * @ioc: per adapter object
  1146. * @index: msix index into vector table
  1147. * @vector: irq vector
  1148. *
  1149. * Inserting respective reply_queue into the list.
  1150. */
  1151. static int
  1152. _base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector)
  1153. {
  1154. struct adapter_reply_queue *reply_q;
  1155. int r;
  1156. reply_q = kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
  1157. if (!reply_q) {
  1158. printk(MPT2SAS_ERR_FMT "unable to allocate memory %d!\n",
  1159. ioc->name, (int)sizeof(struct adapter_reply_queue));
  1160. return -ENOMEM;
  1161. }
  1162. reply_q->ioc = ioc;
  1163. reply_q->msix_index = index;
  1164. reply_q->vector = vector;
  1165. atomic_set(&reply_q->busy, 0);
  1166. if (ioc->msix_enable)
  1167. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
  1168. MPT2SAS_DRIVER_NAME, ioc->id, index);
  1169. else
  1170. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
  1171. MPT2SAS_DRIVER_NAME, ioc->id);
  1172. r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
  1173. reply_q);
  1174. if (r) {
  1175. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1176. reply_q->name, vector);
  1177. kfree(reply_q);
  1178. return -EBUSY;
  1179. }
  1180. INIT_LIST_HEAD(&reply_q->list);
  1181. list_add_tail(&reply_q->list, &ioc->reply_queue_list);
  1182. return 0;
  1183. }
  1184. /**
  1185. * _base_assign_reply_queues - assigning msix index for each cpu
  1186. * @ioc: per adapter object
  1187. *
  1188. * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
  1189. *
  1190. * It would nice if we could call irq_set_affinity, however it is not
  1191. * an exported symbol
  1192. */
  1193. static void
  1194. _base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  1195. {
  1196. struct adapter_reply_queue *reply_q;
  1197. int cpu_id;
  1198. int cpu_grouping, loop, grouping, grouping_mod;
  1199. if (!_base_is_controller_msix_enabled(ioc))
  1200. return;
  1201. memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
  1202. /* when there are more cpus than available msix vectors,
  1203. * then group cpus togeather on same irq
  1204. */
  1205. if (ioc->cpu_count > ioc->msix_vector_count) {
  1206. grouping = ioc->cpu_count / ioc->msix_vector_count;
  1207. grouping_mod = ioc->cpu_count % ioc->msix_vector_count;
  1208. if (grouping < 2 || (grouping == 2 && !grouping_mod))
  1209. cpu_grouping = 2;
  1210. else if (grouping < 4 || (grouping == 4 && !grouping_mod))
  1211. cpu_grouping = 4;
  1212. else if (grouping < 8 || (grouping == 8 && !grouping_mod))
  1213. cpu_grouping = 8;
  1214. else
  1215. cpu_grouping = 16;
  1216. } else
  1217. cpu_grouping = 0;
  1218. loop = 0;
  1219. reply_q = list_entry(ioc->reply_queue_list.next,
  1220. struct adapter_reply_queue, list);
  1221. for_each_online_cpu(cpu_id) {
  1222. if (!cpu_grouping) {
  1223. ioc->cpu_msix_table[cpu_id] = reply_q->msix_index;
  1224. reply_q = list_entry(reply_q->list.next,
  1225. struct adapter_reply_queue, list);
  1226. } else {
  1227. if (loop < cpu_grouping) {
  1228. ioc->cpu_msix_table[cpu_id] =
  1229. reply_q->msix_index;
  1230. loop++;
  1231. } else {
  1232. reply_q = list_entry(reply_q->list.next,
  1233. struct adapter_reply_queue, list);
  1234. ioc->cpu_msix_table[cpu_id] =
  1235. reply_q->msix_index;
  1236. loop = 1;
  1237. }
  1238. }
  1239. }
  1240. }
  1241. /**
  1242. * _base_disable_msix - disables msix
  1243. * @ioc: per adapter object
  1244. *
  1245. */
  1246. static void
  1247. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  1248. {
  1249. if (ioc->msix_enable) {
  1250. pci_disable_msix(ioc->pdev);
  1251. ioc->msix_enable = 0;
  1252. }
  1253. }
  1254. /**
  1255. * _base_enable_msix - enables msix, failback to io_apic
  1256. * @ioc: per adapter object
  1257. *
  1258. */
  1259. static int
  1260. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1261. {
  1262. struct msix_entry *entries, *a;
  1263. int r;
  1264. int i;
  1265. u8 try_msix = 0;
  1266. if (msix_disable == -1 || msix_disable == 0)
  1267. try_msix = 1;
  1268. if (!try_msix)
  1269. goto try_ioapic;
  1270. if (_base_check_enable_msix(ioc) != 0)
  1271. goto try_ioapic;
  1272. ioc->reply_queue_count = min_t(int, ioc->cpu_count,
  1273. ioc->msix_vector_count);
  1274. entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
  1275. GFP_KERNEL);
  1276. if (!entries) {
  1277. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc "
  1278. "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__,
  1279. __LINE__, __func__));
  1280. goto try_ioapic;
  1281. }
  1282. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
  1283. a->entry = i;
  1284. r = pci_enable_msix(ioc->pdev, entries, ioc->reply_queue_count);
  1285. if (r) {
  1286. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  1287. "failed (r=%d) !!!\n", ioc->name, r));
  1288. kfree(entries);
  1289. goto try_ioapic;
  1290. }
  1291. ioc->msix_enable = 1;
  1292. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
  1293. r = _base_request_irq(ioc, i, a->vector);
  1294. if (r) {
  1295. _base_free_irq(ioc);
  1296. _base_disable_msix(ioc);
  1297. kfree(entries);
  1298. goto try_ioapic;
  1299. }
  1300. }
  1301. kfree(entries);
  1302. return 0;
  1303. /* failback to io_apic interrupt routing */
  1304. try_ioapic:
  1305. r = _base_request_irq(ioc, 0, ioc->pdev->irq);
  1306. return r;
  1307. }
  1308. /**
  1309. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1310. * @ioc: per adapter object
  1311. *
  1312. * Returns 0 for success, non-zero for failure.
  1313. */
  1314. int
  1315. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1316. {
  1317. struct pci_dev *pdev = ioc->pdev;
  1318. u32 memap_sz;
  1319. u32 pio_sz;
  1320. int i, r = 0;
  1321. u64 pio_chip = 0;
  1322. u64 chip_phys = 0;
  1323. struct adapter_reply_queue *reply_q;
  1324. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
  1325. ioc->name, __func__));
  1326. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1327. if (pci_enable_device_mem(pdev)) {
  1328. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1329. "failed\n", ioc->name);
  1330. ioc->bars = 0;
  1331. return -ENODEV;
  1332. }
  1333. if (pci_request_selected_regions(pdev, ioc->bars,
  1334. MPT2SAS_DRIVER_NAME)) {
  1335. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1336. "failed\n", ioc->name);
  1337. ioc->bars = 0;
  1338. r = -ENODEV;
  1339. goto out_fail;
  1340. }
  1341. /* AER (Advanced Error Reporting) hooks */
  1342. pci_enable_pcie_error_reporting(pdev);
  1343. pci_set_master(pdev);
  1344. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1345. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1346. ioc->name, pci_name(pdev));
  1347. r = -ENODEV;
  1348. goto out_fail;
  1349. }
  1350. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1351. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  1352. if (pio_sz)
  1353. continue;
  1354. pio_chip = (u64)pci_resource_start(pdev, i);
  1355. pio_sz = pci_resource_len(pdev, i);
  1356. } else {
  1357. if (memap_sz)
  1358. continue;
  1359. /* verify memory resource is valid before using */
  1360. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  1361. ioc->chip_phys = pci_resource_start(pdev, i);
  1362. chip_phys = (u64)ioc->chip_phys;
  1363. memap_sz = pci_resource_len(pdev, i);
  1364. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1365. if (ioc->chip == NULL) {
  1366. printk(MPT2SAS_ERR_FMT "unable to map "
  1367. "adapter memory!\n", ioc->name);
  1368. r = -EINVAL;
  1369. goto out_fail;
  1370. }
  1371. }
  1372. }
  1373. }
  1374. _base_mask_interrupts(ioc);
  1375. r = _base_enable_msix(ioc);
  1376. if (r)
  1377. goto out_fail;
  1378. list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
  1379. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1380. reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1381. "IO-APIC enabled"), reply_q->vector);
  1382. printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
  1383. ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
  1384. printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
  1385. ioc->name, (unsigned long long)pio_chip, pio_sz);
  1386. /* Save PCI configuration state for recovery from PCI AER/EEH errors */
  1387. pci_save_state(pdev);
  1388. return 0;
  1389. out_fail:
  1390. if (ioc->chip_phys)
  1391. iounmap(ioc->chip);
  1392. ioc->chip_phys = 0;
  1393. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1394. pci_disable_pcie_error_reporting(pdev);
  1395. pci_disable_device(pdev);
  1396. return r;
  1397. }
  1398. /**
  1399. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1400. * @ioc: per adapter object
  1401. * @smid: system request message index(smid zero is invalid)
  1402. *
  1403. * Returns virt pointer to message frame.
  1404. */
  1405. void *
  1406. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1407. {
  1408. return (void *)(ioc->request + (smid * ioc->request_sz));
  1409. }
  1410. /**
  1411. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1412. * @ioc: per adapter object
  1413. * @smid: system request message index
  1414. *
  1415. * Returns virt pointer to sense buffer.
  1416. */
  1417. void *
  1418. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1419. {
  1420. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1421. }
  1422. /**
  1423. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1424. * @ioc: per adapter object
  1425. * @smid: system request message index
  1426. *
  1427. * Returns phys pointer to the low 32bit address of the sense buffer.
  1428. */
  1429. __le32
  1430. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1431. {
  1432. return cpu_to_le32(ioc->sense_dma +
  1433. ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1434. }
  1435. /**
  1436. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1437. * @ioc: per adapter object
  1438. * @phys_addr: lower 32 physical addr of the reply
  1439. *
  1440. * Converts 32bit lower physical addr into a virt address.
  1441. */
  1442. void *
  1443. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1444. {
  1445. if (!phys_addr)
  1446. return NULL;
  1447. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1448. }
  1449. /**
  1450. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1451. * @ioc: per adapter object
  1452. * @cb_idx: callback index
  1453. *
  1454. * Returns smid (zero is invalid)
  1455. */
  1456. u16
  1457. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1458. {
  1459. unsigned long flags;
  1460. struct request_tracker *request;
  1461. u16 smid;
  1462. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1463. if (list_empty(&ioc->internal_free_list)) {
  1464. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1465. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1466. ioc->name, __func__);
  1467. return 0;
  1468. }
  1469. request = list_entry(ioc->internal_free_list.next,
  1470. struct request_tracker, tracker_list);
  1471. request->cb_idx = cb_idx;
  1472. smid = request->smid;
  1473. list_del(&request->tracker_list);
  1474. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1475. return smid;
  1476. }
  1477. /**
  1478. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1479. * @ioc: per adapter object
  1480. * @cb_idx: callback index
  1481. * @scmd: pointer to scsi command object
  1482. *
  1483. * Returns smid (zero is invalid)
  1484. */
  1485. u16
  1486. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1487. struct scsi_cmnd *scmd)
  1488. {
  1489. unsigned long flags;
  1490. struct scsiio_tracker *request;
  1491. u16 smid;
  1492. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1493. if (list_empty(&ioc->free_list)) {
  1494. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1495. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1496. ioc->name, __func__);
  1497. return 0;
  1498. }
  1499. request = list_entry(ioc->free_list.next,
  1500. struct scsiio_tracker, tracker_list);
  1501. request->scmd = scmd;
  1502. request->cb_idx = cb_idx;
  1503. smid = request->smid;
  1504. list_del(&request->tracker_list);
  1505. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1506. return smid;
  1507. }
  1508. /**
  1509. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1510. * @ioc: per adapter object
  1511. * @cb_idx: callback index
  1512. *
  1513. * Returns smid (zero is invalid)
  1514. */
  1515. u16
  1516. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1517. {
  1518. unsigned long flags;
  1519. struct request_tracker *request;
  1520. u16 smid;
  1521. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1522. if (list_empty(&ioc->hpr_free_list)) {
  1523. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1524. return 0;
  1525. }
  1526. request = list_entry(ioc->hpr_free_list.next,
  1527. struct request_tracker, tracker_list);
  1528. request->cb_idx = cb_idx;
  1529. smid = request->smid;
  1530. list_del(&request->tracker_list);
  1531. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1532. return smid;
  1533. }
  1534. /**
  1535. * mpt2sas_base_free_smid - put smid back on free_list
  1536. * @ioc: per adapter object
  1537. * @smid: system request message index
  1538. *
  1539. * Return nothing.
  1540. */
  1541. void
  1542. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1543. {
  1544. unsigned long flags;
  1545. int i;
  1546. struct chain_tracker *chain_req, *next;
  1547. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1548. if (smid < ioc->hi_priority_smid) {
  1549. /* scsiio queue */
  1550. i = smid - 1;
  1551. if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
  1552. list_for_each_entry_safe(chain_req, next,
  1553. &ioc->scsi_lookup[i].chain_list, tracker_list) {
  1554. list_del_init(&chain_req->tracker_list);
  1555. list_add_tail(&chain_req->tracker_list,
  1556. &ioc->free_chain_list);
  1557. }
  1558. }
  1559. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1560. ioc->scsi_lookup[i].scmd = NULL;
  1561. ioc->scsi_lookup[i].direct_io = 0;
  1562. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  1563. &ioc->free_list);
  1564. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1565. /*
  1566. * See _wait_for_commands_to_complete() call with regards
  1567. * to this code.
  1568. */
  1569. if (ioc->shost_recovery && ioc->pending_io_count) {
  1570. if (ioc->pending_io_count == 1)
  1571. wake_up(&ioc->reset_wq);
  1572. ioc->pending_io_count--;
  1573. }
  1574. return;
  1575. } else if (smid < ioc->internal_smid) {
  1576. /* hi-priority */
  1577. i = smid - ioc->hi_priority_smid;
  1578. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1579. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  1580. &ioc->hpr_free_list);
  1581. } else if (smid <= ioc->hba_queue_depth) {
  1582. /* internal queue */
  1583. i = smid - ioc->internal_smid;
  1584. ioc->internal_lookup[i].cb_idx = 0xFF;
  1585. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  1586. &ioc->internal_free_list);
  1587. }
  1588. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1589. }
  1590. /**
  1591. * _base_writeq - 64 bit write to MMIO
  1592. * @ioc: per adapter object
  1593. * @b: data payload
  1594. * @addr: address in MMIO space
  1595. * @writeq_lock: spin lock
  1596. *
  1597. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1598. * care of 32 bit environment where its not quarenteed to send the entire word
  1599. * in one transfer.
  1600. */
  1601. #ifndef writeq
  1602. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1603. spinlock_t *writeq_lock)
  1604. {
  1605. unsigned long flags;
  1606. __u64 data_out = cpu_to_le64(b);
  1607. spin_lock_irqsave(writeq_lock, flags);
  1608. writel((u32)(data_out), addr);
  1609. writel((u32)(data_out >> 32), (addr + 4));
  1610. spin_unlock_irqrestore(writeq_lock, flags);
  1611. }
  1612. #else
  1613. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1614. spinlock_t *writeq_lock)
  1615. {
  1616. writeq(cpu_to_le64(b), addr);
  1617. }
  1618. #endif
  1619. static inline u8
  1620. _base_get_msix_index(struct MPT2SAS_ADAPTER *ioc)
  1621. {
  1622. return ioc->cpu_msix_table[raw_smp_processor_id()];
  1623. }
  1624. /**
  1625. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1626. * @ioc: per adapter object
  1627. * @smid: system request message index
  1628. * @handle: device handle
  1629. *
  1630. * Return nothing.
  1631. */
  1632. void
  1633. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1634. {
  1635. Mpi2RequestDescriptorUnion_t descriptor;
  1636. u64 *request = (u64 *)&descriptor;
  1637. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1638. descr