44 JMP label // JMP 16
45 CALL foo(SB)
46▶// CALL (AX*4) // TODO: This line is silently dropped on the floor!
47 CALL foo+4(SB)(AX*4)
48 CALL *4(SP) // CALL 4(SP)
· · ·
49 CALL *(AX) // CALL (AX)
50 CALL *(SP) // CALL (SP)
51▶// CALL *(AX*4) // TODO: This line is silently dropped on the floor!
52 CALL *(AX)(AX*4) // CALL (AX)(AX*4)
53 CALL 4(SP)
· · ·
54 CALL (AX)
55 CALL (SP)
56▶// CALL (AX*4) // TODO: This line is silently dropped on the floor!
57 JCS 2(PC)
58 JMP (AX)(AX*4)
55 JMP *(R12) // JMP (R12)
56 JCS 2(PC)
57▶// JMP *(R12*4) // TODO: This line is silently dropped on the floor!
58 JCS 2(PC)
59 JMP *(R12)(R13*4) // JMP (R12)(R13*4)
· · ·
63 JMP *(SP) // JMP (SP)
64 JCS 2(PC)
65▶// JMP *(AX*4) // TODO: This line is silently dropped on the floor!
66 JCS 2(PC)
67 JMP *(AX)(AX*4) // JMP (AX)(AX*4)
· · ·
71 JMP (R12)
72 JCS 2(PC)
73▶// JMP (R12*4) // TODO: This line is silently dropped on the floor!
74 JCS 2(PC)
75 JMP (R12)(R13*4)
· · ·
79 JMP (SP)
80 JCS 2(PC)
81▶// JMP (AX*4) // TODO: This line is silently dropped on the floor!
82 JCS 2(PC)
83 JMP (AX)(AX*4)
493 BLSRQ DX, R14 // c4e288f3ca
494 BLSRQ R11, R14 // c4c288f3cb
495▶ //TODO: BNDCL (BX), BND2 // f30f1a13
496 //TODO: BNDCL (R11), BND2 // f3410f1a13
497 //TODO: BNDCL DX, BND2 // f30f1ad2
· · ·
496▶ //TODO: BNDCL (R11), BND2 // f3410f1a13
497 //TODO: BNDCL DX, BND2 // f30f1ad2
498 //TODO: BNDCL R11, BND2 // f3410f1ad3
· · ·
497▶ //TODO: BNDCL DX, BND2 // f30f1ad2
498 //TODO: BNDCL R11, BND2 // f3410f1ad3
499 //TODO: BNDCL (BX), BND3 // f30f1a1b
· · ·
498▶ //TODO: BNDCL R11, BND2 // f3410f1ad3
499 //TODO: BNDCL (BX), BND3 // f30f1a1b
500 //TODO: BNDCL (R11), BND3 // f3410f1a1b
· · ·
499▶ //TODO: BNDCL (BX), BND3 // f30f1a1b
500 //TODO: BNDCL (R11), BND3 // f3410f1a1b
501 //TODO: BNDCL DX, BND3 // f30f1ada
+ 625 more matches in this file
25 MOVL (AX)(Y0*1), AX // ERROR "invalid instruction"
26 // VSIB/VM is invalid without vector index.
27▶ // TODO(quasilyte): improve error message (#21860).
28 // "invalid VSIB address (missing vector index)"
29 VPGATHERQQ Y2, (BP), Y1 // ERROR "invalid instruction"
· · ·
86 VADDSUBPS X0, X20, X2 // ERROR "invalid instruction"
87 // Use of K0 for write mask (Yknot0).
88▶ // TODO(quasilyte): improve error message (#21860).
89 // "K0 can't be used for write mask"
90 VADDPD X0, X1, K0, X2 // ERROR "invalid instruction"
· · ·
92 VADDPD Z0, Z1, K0, Z2 // ERROR "invalid instruction"
93 // VEX-encoded VSIB can't use High-16 registers as index (unlike EVEX).
94▶ // TODO(quasilyte): improve error message (#21860).
95 VPGATHERQQ X2, (BP)(X20*2), X3 // ERROR "invalid instruction"
96 VPGATHERQQ Y2, (BP)(Y20*2), Y3 // ERROR "invalid instruction"
· · ·
97 // YzrMulti4 expects exactly 4 registers referenced by REG_LIST.
98▶ // TODO(quasilyte): improve error message (#21860).
99 V4FMADDPS (AX), [Z0-Z4], K1, Z7 // ERROR "invalid instruction"
100 V4FMADDPS (AX), [Z0-Z0], K1, Z7 // ERROR "invalid instruction"
· · ·
101 // Invalid ranges in REG_LIST (low > high).
102▶ // TODO(quasilyte): improve error message (#21860).
103 V4FMADDPS (AX), [Z4-Z0], K1, Z7 // ERROR "invalid instruction"
104 V4FMADDPS (AX), [Z1-Z0], K1, Z7 // ERROR "invalid instruction"
+ 1 more matches in this file
614 AND $1, ZR // fb0340b2ff031b8a
615 ANDW $1, ZR // fb030032ff031b0a
616▶ // TODO: this could have better encoding
617 ANDW $-1, R10 // 1b0080124a011b0a
618 AND $8, R0, RSP // 1f007d92
6// The uncommented cases means they can be handled by assembler
7// and they are consistent with disassembler decoding.
8▶// TODO means they cannot be handled by current assembler.
9
10#include "../../../../../runtime/textflag.h"
· · ·
170 LDAXRB (R19), R16 // 70fe5f08
171 LDAXRH (R5), R8 // a8fc5f48
172▶ //TODO LDNP 0xcc(RSP), ZR, R12 // ecff5928
173 //TODO LDNP 0x40(R28), R9, R5 // 852744a8
174 //TODO LDPSW -0xd0(R2), R0, R12 // 4c00e668
· · ·
173▶ //TODO LDNP 0x40(R28), R9, R5 // 852744a8
174 //TODO LDPSW -0xd0(R2), R0, R12 // 4c00e668
175 //TODO LDPSW 0x5c(R4), R8, R5 // 85a0cb69
· · ·
174▶ //TODO LDPSW -0xd0(R2), R0, R12 // 4c00e668
175 //TODO LDPSW 0x5c(R4), R8, R5 // 85a0cb69
176 //TODO LDPSW 0x6c(R12), R2, R27 // 9b894d69
· · ·
175▶ //TODO LDPSW 0x5c(R4), R8, R5 // 85a0cb69
176 //TODO LDPSW 0x6c(R12), R2, R27 // 9b894d69
177 MOVWU.P -84(R15), R9 // e9c55ab8
+ 168 more matches in this file
59 ZADDPT Z23.D, Z13.D, P1.M, Z13.D // ed06c404
60 ZADDPT Z7.D, Z6.D, Z23.D // d708e704
61▶ // TODO: ADDQP
62 ZADDQV Z25.S, P3, V5.S4 // 252f8504
63 // TODO: ADDSUBP
· · ·
63▶ // TODO: ADDSUBP
64 ZAESD Z7.B, Z6.B, Z6.B // e6e42245
65 ZAESE Z7.B, Z6.B, Z6.B // e6e02245
· · ·
98 ZBFMLSLB Z7.H, Z6.H, Z23.S // d7a0e764
99 ZBFMLSLT Z7.H, Z6.H, Z23.S // d7a4e764
100▶ // TODO: BFMMLA <Zda>.H, <Zn>.H, <Zm>.H
101 ZBFMMLA Z7.H, Z6.H, Z23.S // d7e46764
102 ZBFMUL Z23.H, Z13.H, P1.M, Z13.H // ed860265
· · ·
127 ZCMPHS Z0.H, Z2.H, P0.Z, P14.H // 4e004024
128 ZCMPHS Z0.D, Z12.S, P0.Z, P14.S // 8ec18024
129▶ // TODO: CMPLE
130 // TODO: CMPLO
131 // TODO: CMPLS
· · ·
130▶ // TODO: CMPLO
131 // TODO: CMPLS
132 // TODO: CMPLT
+ 28 more matches in this file
58 ZADDPT Z1.S, Z26.S, P14.M, Z7.D // ERROR "illegal combination from SVE"
59 ZADDPT Z1.S, Z26.S, Z11.B // ERROR "illegal combination from SVE"
60▶ // TODO: ADDQP
61 ZADDQV Z1.S, P13.Z, V11.D2 // ERROR "illegal combination from SVE"
62 // TODO: ADDSUBP
· · ·
62▶ // TODO: ADDSUBP
63 ZAESD Z1.S, Z26.S, Z11.B // ERROR "illegal combination from SVE"
64 ZAESE Z1.S, Z26.S, Z11.B // ERROR "illegal combination from SVE"
· · ·
97 ZBFMLSLB Z1.S, Z26.S, Z11.B // ERROR "illegal combination from SVE"
98 ZBFMLSLT Z1.S, Z26.S, Z11.B // ERROR "illegal combination from SVE"
99▶ // TODO: BFMMLA <Zda>.H, <Zn>.H, <Zm>.H
100 ZBFMMLA Z1.S, Z26.S, Z11.B // ERROR "illegal combination from SVE"
101 ZBFMUL Z1.S, Z26.S, P14.M, Z7.D // ERROR "illegal combination from SVE"
· · ·
252 ZFMLSLB Z1.S, Z26.S, Z11.B // ERROR "illegal combination from SVE"
253 ZFMLSLT Z1.S, Z26.S, Z11.B // ERROR "illegal combination from SVE"
254▶ // TODO: FMMLA <Zda>.H, <Zn>.H, <Zm>.H
255 ZFMMLA Z1.S, Z26.S, Z11.B // ERROR "illegal combination from SVE"
256 ZFMMLA Z1.S, Z26.S, Z11.B // ERROR "illegal combination from SVE"
· · ·
359 ZRSUBHNT Z1.S, Z26.S, Z11.B // ERROR "illegal combination from SVE"
360 ZSABA Z1.S, Z26.S, Z11.B // ERROR "illegal combination from SVE"
361▶ // TODO: SABAL <Zda>.<T>, <Zn>.<Tb>, <Zm>.<Tb>
362 ZSABALB Z1.S, Z26.S, Z11.B // ERROR "illegal combination from SVE"
363 ZSABALT Z1.S, Z26.S, Z11.B // ERROR "illegal combination from SVE"
+ 22 more matches in this file
42 MOVWZ $-2147483648, R5 // 3ca08000
43
44▶ // TODO: These are preprocessed by the assembler into MOVD $const>>shift, R5; SLD $shift, R5.
45 // This only captures the MOVD. Should the SLD be appended to the encoding by the test?
46 // Hex constant 0x20004000000
· · ·
48 // Hex constant 0xFFFFFE0004000000
49 MOVD $-2198956146688, R5 // 38a08001
50▶ // TODO: On GOPPC64={power8,power9}, this is preprocessed into MOVD $-1, R5; RLDC R5, $33, $63, R5.
51 // This only captures the MOVD. Should the RLDC be appended to the encoding by the test?
52 // Hex constant 0xFFFFFFFE00000001
· · ·
193 ADD $-8589869055, R5 // 3fe0fffe63ff00017bff83e463ff00017cbf2a14 or 0602000138a50001
194
195▶ //TODO: this compiles to add r5,r6,r0. It should be addi r5,r6,0.
196 // this is OK since r0 == $0, but the latter is preferred.
197 ADD $0, R6, R5 // 7ca60214
· · ·
198
199▶ //TODO: the assembler rewrites these into ADDIS $19, R5, Rx and ADD $-10617, Rx, Rx, but the test only sees the first ADDIS
200 ADD $1234567, R5 // 3ca50013 or 0600001238a5d687
201 ADD $1234567, R5, R6 // 3cc50013 or 0600001238c5d687
· · ·
261 XOR $983040, R3, R4 // 6c64000f
262
263▶ // TODO: cleanup inconsistency of printing CMPx opcodes with explicit CR arguments.
264 CMP R3, R4 // 7c232000
265 CMP R3, R0 // 7c230000
1324 MOVQ R13, 104(SP)
1325retry:
1326▶ // TODO: Consider passing g.m.p in as an argument so they can be shared
1327 // across a sequence of write barriers.
1328 MOVQ g_m(R14), R13
· · ·
1355 // here is NOSPLIT, so nothing will observe these.
1356 //
1357▶ // TODO: We could strike a different balance; e.g., saving X0
1358 // and not saving GP registers that are less likely to be used.
1359 MOVQ DI, 0(SP)
641 MOVD R15, asmcgocallSaveOffset(R1)
642
643▶ MOVD R0, 0(R1) // clear back chain pointer (TODO can we give it real back trace information?)
644
645 // This is a "global call", so put the global entry point in r12
· · ·
718 MOVD R7, 0(R1) // Save frame pointer to allow manual backtrace with gdb
719#else
720▶ MOVD R0, 0(R1) // clear back chain pointer (TODO can we give it real back trace information?)
721#endif
722 // This is a "global call", so put the global entry point in r12
555 SUB R2, R5
556 MOVD R5, 160(R15) // save depth in old g stack (can't just save SP, as stack might be copied during a callback)
557▶ MOVD $0, 0(R15) // clear back chain pointer (TODO can we give it real back trace information?)
558 MOVD R4, R2 // arg in R2
559 BL R3 // can clobber: R0-R5, R14, F0-F3, F5, F7-F15
75// but take the return address as an argument and thus don't require the
76// indirection through a trampoline.
77▶// TODO: Remove the inline assembly trampoline once a PC argument has been added to libfuzzer's int compare hooks.
78TEXT runtime·libfuzzerCallTraceIntCmp(SB), NOSPLIT, $0-32
79 MOVQ fn+0(FP), AX
56 CMPB internal∕cpu·X86+const_offsetX86HasAVX2(SB), $1
57 JE loop_preheader_avx2
58▶ // TODO: for really big clears, use MOVNTDQ, even without AVX2.
59
60loop:
· · ·
86 // For smaller sizes MOVNTDQ may be faster or slower depending on hardware.
87 // For larger sizes it is always faster, even on dual Xeons with 30M cache.
88▶ // TODO take into account actual LLC size. E. g. glibc uses LLC size/2.
89 CMPQ BX, $0x2000000
90 JAE loop_preheader_avx2_huge
407// Common function used to call tsan's atomic functions
408// R3 = *ThreadState
409▶// R4 = TODO: What's this supposed to be?
410// R5 = caller pc
411// R6 = addr of incoming arg list
· · ·
457
458 MOVD g_racectx(g), R3
459▶ MOVD R8, R4 // pc being called same TODO as above
460 MOVD (R1), R5 // caller pc from latest LR
461 BL racecall<>(SB)